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-rw-r--r--sound/soc/codecs/tlv320dac33.c269
1 files changed, 108 insertions, 161 deletions
diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c
index 776ac80cc1a8..71d7be8ac488 100644
--- a/sound/soc/codecs/tlv320dac33.c
+++ b/sound/soc/codecs/tlv320dac33.c
@@ -42,14 +42,15 @@
42#include <sound/tlv320dac33-plat.h> 42#include <sound/tlv320dac33-plat.h>
43#include "tlv320dac33.h" 43#include "tlv320dac33.h"
44 44
45#define DAC33_BUFFER_SIZE_BYTES 24576 /* bytes, 12288 16 bit words, 45/*
46 * 6144 stereo */ 46 * The internal FIFO is 24576 bytes long
47#define DAC33_BUFFER_SIZE_SAMPLES 6144 47 * It can be configured to hold 16bit or 24bit samples
48 48 * In 16bit configuration the FIFO can hold 6144 stereo samples
49#define NSAMPLE_MAX 5700 49 * In 24bit configuration the FIFO can hold 4096 stereo samples
50 50 */
51#define MODE7_LTHR 10 51#define DAC33_FIFO_SIZE_16BIT 6144
52#define MODE7_UTHR (DAC33_BUFFER_SIZE_SAMPLES - 10) 52#define DAC33_FIFO_SIZE_24BIT 4096
53#define DAC33_MODE7_MARGIN 10 /* Safety margin for FIFO in Mode7 */
53 54
54#define BURST_BASEFREQ_HZ 49152000 55#define BURST_BASEFREQ_HZ 49152000
55 56
@@ -99,16 +100,11 @@ struct tlv320dac33_priv {
99 unsigned int refclk; 100 unsigned int refclk;
100 101
101 unsigned int alarm_threshold; /* set to be half of LATENCY_TIME_MS */ 102 unsigned int alarm_threshold; /* set to be half of LATENCY_TIME_MS */
102 unsigned int nsample_min; /* nsample should not be lower than
103 * this */
104 unsigned int nsample_max; /* nsample should not be higher than
105 * this */
106 enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */ 103 enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */
104 unsigned int fifo_size; /* Size of the FIFO in samples */
107 unsigned int nsample; /* burst read amount from host */ 105 unsigned int nsample; /* burst read amount from host */
108 int mode1_latency; /* latency caused by the i2c writes in 106 int mode1_latency; /* latency caused by the i2c writes in
109 * us */ 107 * us */
110 int auto_fifo_config; /* Configure the FIFO based on the
111 * period size */
112 u8 burst_bclkdiv; /* BCLK divider value in burst mode */ 108 u8 burst_bclkdiv; /* BCLK divider value in burst mode */
113 unsigned int burst_rate; /* Interface speed in Burst modes */ 109 unsigned int burst_rate; /* Interface speed in Burst modes */
114 110
@@ -302,7 +298,6 @@ static void dac33_init_chip(struct snd_soc_codec *codec)
302 if (unlikely(!dac33->chip_power)) 298 if (unlikely(!dac33->chip_power))
303 return; 299 return;
304 300
305 /* 44-46: DAC Control Registers */
306 /* A : DAC sample rate Fsref/1.5 */ 301 /* A : DAC sample rate Fsref/1.5 */
307 dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0)); 302 dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
308 /* B : DAC src=normal, not muted */ 303 /* B : DAC src=normal, not muted */
@@ -325,6 +320,10 @@ static void dac33_init_chip(struct snd_soc_codec *codec)
325 dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL)); 320 dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL));
326 dac33_write(codec, DAC33_LINER_TO_RLO_VOL, 321 dac33_write(codec, DAC33_LINER_TO_RLO_VOL,
327 dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL)); 322 dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL));
323
324 dac33_write(codec, DAC33_OUT_AMP_CTRL,
325 dac33_read_reg_cache(codec, DAC33_OUT_AMP_CTRL));
326
328} 327}
329 328
330static inline int dac33_read_id(struct snd_soc_codec *codec) 329static inline int dac33_read_id(struct snd_soc_codec *codec)
@@ -436,73 +435,6 @@ static int dac33_playback_event(struct snd_soc_dapm_widget *w,
436 return 0; 435 return 0;
437} 436}
438 437
439static int dac33_get_nsample(struct snd_kcontrol *kcontrol,
440 struct snd_ctl_elem_value *ucontrol)
441{
442 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
443 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
444
445 ucontrol->value.integer.value[0] = dac33->nsample;
446
447 return 0;
448}
449
450static int dac33_set_nsample(struct snd_kcontrol *kcontrol,
451 struct snd_ctl_elem_value *ucontrol)
452{
453 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
454 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
455 int ret = 0;
456
457 if (dac33->nsample == ucontrol->value.integer.value[0])
458 return 0;
459
460 if (ucontrol->value.integer.value[0] < dac33->nsample_min ||
461 ucontrol->value.integer.value[0] > dac33->nsample_max) {
462 ret = -EINVAL;
463 } else {
464 dac33->nsample = ucontrol->value.integer.value[0];
465 /* Re calculate the burst time */
466 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
467 dac33->nsample);
468 }
469
470 return ret;
471}
472
473static int dac33_get_uthr(struct snd_kcontrol *kcontrol,
474 struct snd_ctl_elem_value *ucontrol)
475{
476 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
477 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
478
479 ucontrol->value.integer.value[0] = dac33->uthr;
480
481 return 0;
482}
483
484static int dac33_set_uthr(struct snd_kcontrol *kcontrol,
485 struct snd_ctl_elem_value *ucontrol)
486{
487 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
488 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
489 int ret = 0;
490
491 if (dac33->substream)
492 return -EBUSY;
493
494 if (dac33->uthr == ucontrol->value.integer.value[0])
495 return 0;
496
497 if (ucontrol->value.integer.value[0] < (MODE7_LTHR + 10) ||
498 ucontrol->value.integer.value[0] > MODE7_UTHR)
499 ret = -EINVAL;
500 else
501 dac33->uthr = ucontrol->value.integer.value[0];
502
503 return ret;
504}
505
506static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol, 438static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
507 struct snd_ctl_elem_value *ucontrol) 439 struct snd_ctl_elem_value *ucontrol)
508{ 440{
@@ -587,13 +519,6 @@ static const struct snd_kcontrol_new dac33_mode_snd_controls[] = {
587 dac33_get_fifo_mode, dac33_set_fifo_mode), 519 dac33_get_fifo_mode, dac33_set_fifo_mode),
588}; 520};
589 521
590static const struct snd_kcontrol_new dac33_fifo_snd_controls[] = {
591 SOC_SINGLE_EXT("nSample", 0, 0, 5900, 0,
592 dac33_get_nsample, dac33_set_nsample),
593 SOC_SINGLE_EXT("UTHR", 0, 0, MODE7_UTHR, 0,
594 dac33_get_uthr, dac33_set_uthr),
595};
596
597/* Analog bypass */ 522/* Analog bypass */
598static const struct snd_kcontrol_new dac33_dapm_abypassl_control = 523static const struct snd_kcontrol_new dac33_dapm_abypassl_control =
599 SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1); 524 SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1);
@@ -601,6 +526,25 @@ static const struct snd_kcontrol_new dac33_dapm_abypassl_control =
601static const struct snd_kcontrol_new dac33_dapm_abypassr_control = 526static const struct snd_kcontrol_new dac33_dapm_abypassr_control =
602 SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1); 527 SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1);
603 528
529/* LOP L/R invert selection */
530static const char *dac33_lr_lom_texts[] = {"DAC", "LOP"};
531
532static const struct soc_enum dac33_left_lom_enum =
533 SOC_ENUM_SINGLE(DAC33_OUT_AMP_CTRL, 3,
534 ARRAY_SIZE(dac33_lr_lom_texts),
535 dac33_lr_lom_texts);
536
537static const struct snd_kcontrol_new dac33_dapm_left_lom_control =
538SOC_DAPM_ENUM("Route", dac33_left_lom_enum);
539
540static const struct soc_enum dac33_right_lom_enum =
541 SOC_ENUM_SINGLE(DAC33_OUT_AMP_CTRL, 2,
542 ARRAY_SIZE(dac33_lr_lom_texts),
543 dac33_lr_lom_texts);
544
545static const struct snd_kcontrol_new dac33_dapm_right_lom_control =
546SOC_DAPM_ENUM("Route", dac33_right_lom_enum);
547
604static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = { 548static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = {
605 SND_SOC_DAPM_OUTPUT("LEFT_LO"), 549 SND_SOC_DAPM_OUTPUT("LEFT_LO"),
606 SND_SOC_DAPM_OUTPUT("RIGHT_LO"), 550 SND_SOC_DAPM_OUTPUT("RIGHT_LO"),
@@ -617,6 +561,18 @@ static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = {
617 SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0, 561 SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0,
618 &dac33_dapm_abypassr_control), 562 &dac33_dapm_abypassr_control),
619 563
564 SND_SOC_DAPM_MUX("Left LOM Inverted From", SND_SOC_NOPM, 0, 0,
565 &dac33_dapm_left_lom_control),
566 SND_SOC_DAPM_MUX("Right LOM Inverted From", SND_SOC_NOPM, 0, 0,
567 &dac33_dapm_right_lom_control),
568 /*
569 * For DAPM path, when only the anlog bypass path is enabled, and the
570 * LOP inverted from the corresponding DAC side.
571 * This is needed, so we can attach the DAC power supply in this case.
572 */
573 SND_SOC_DAPM_PGA("Left Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
574 SND_SOC_DAPM_PGA("Right Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
575
620 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amplifier", 576 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amplifier",
621 DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0), 577 DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0),
622 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amplifier", 578 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amplifier",
@@ -639,11 +595,22 @@ static const struct snd_soc_dapm_route audio_map[] = {
639 {"Output Left Amplifier", NULL, "DACL"}, 595 {"Output Left Amplifier", NULL, "DACL"},
640 {"Output Right Amplifier", NULL, "DACR"}, 596 {"Output Right Amplifier", NULL, "DACR"},
641 597
642 {"Output Left Amplifier", NULL, "Analog Left Bypass"}, 598 {"Left Bypass PGA", NULL, "Analog Left Bypass"},
643 {"Output Right Amplifier", NULL, "Analog Right Bypass"}, 599 {"Right Bypass PGA", NULL, "Analog Right Bypass"},
644 600
645 {"Output Left Amplifier", NULL, "Left DAC Power"}, 601 {"Left LOM Inverted From", "DAC", "Left Bypass PGA"},
646 {"Output Right Amplifier", NULL, "Right DAC Power"}, 602 {"Right LOM Inverted From", "DAC", "Right Bypass PGA"},
603 {"Left LOM Inverted From", "LOP", "Analog Left Bypass"},
604 {"Right LOM Inverted From", "LOP", "Analog Right Bypass"},
605
606 {"Output Left Amplifier", NULL, "Left LOM Inverted From"},
607 {"Output Right Amplifier", NULL, "Right LOM Inverted From"},
608
609 {"DACL", NULL, "Left DAC Power"},
610 {"DACR", NULL, "Right DAC Power"},
611
612 {"Left Bypass PGA", NULL, "Left DAC Power"},
613 {"Right Bypass PGA", NULL, "Right DAC Power"},
647 614
648 /* output */ 615 /* output */
649 {"LEFT_LO", NULL, "Output Left Amplifier"}, 616 {"LEFT_LO", NULL, "Output Left Amplifier"},
@@ -732,7 +699,7 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
732 spin_unlock_irq(&dac33->lock); 699 spin_unlock_irq(&dac33->lock);
733 700
734 dac33_write16(codec, DAC33_PREFILL_MSB, 701 dac33_write16(codec, DAC33_PREFILL_MSB,
735 DAC33_THRREG(MODE7_LTHR)); 702 DAC33_THRREG(DAC33_MODE7_MARGIN));
736 703
737 /* Enable Upper Threshold IRQ */ 704 /* Enable Upper Threshold IRQ */
738 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT); 705 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT);
@@ -842,6 +809,8 @@ static int dac33_startup(struct snd_pcm_substream *substream,
842 /* Stream started, save the substream pointer */ 809 /* Stream started, save the substream pointer */
843 dac33->substream = substream; 810 dac33->substream = substream;
844 811
812 snd_pcm_hw_constraint_msbits(substream->runtime, 0, 32, 24);
813
845 return 0; 814 return 0;
846} 815}
847 816
@@ -853,18 +822,17 @@ static void dac33_shutdown(struct snd_pcm_substream *substream,
853 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); 822 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
854 823
855 dac33->substream = NULL; 824 dac33->substream = NULL;
856
857 /* Reset the nSample restrictions */
858 dac33->nsample_min = 0;
859 dac33->nsample_max = NSAMPLE_MAX;
860} 825}
861 826
827#define CALC_BURST_RATE(bclkdiv, bclk_per_sample) \
828 (BURST_BASEFREQ_HZ / bclkdiv / bclk_per_sample)
862static int dac33_hw_params(struct snd_pcm_substream *substream, 829static int dac33_hw_params(struct snd_pcm_substream *substream,
863 struct snd_pcm_hw_params *params, 830 struct snd_pcm_hw_params *params,
864 struct snd_soc_dai *dai) 831 struct snd_soc_dai *dai)
865{ 832{
866 struct snd_soc_pcm_runtime *rtd = substream->private_data; 833 struct snd_soc_pcm_runtime *rtd = substream->private_data;
867 struct snd_soc_codec *codec = rtd->codec; 834 struct snd_soc_codec *codec = rtd->codec;
835 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
868 836
869 /* Check parameters for validity */ 837 /* Check parameters for validity */
870 switch (params_rate(params)) { 838 switch (params_rate(params)) {
@@ -879,6 +847,12 @@ static int dac33_hw_params(struct snd_pcm_substream *substream,
879 847
880 switch (params_format(params)) { 848 switch (params_format(params)) {
881 case SNDRV_PCM_FORMAT_S16_LE: 849 case SNDRV_PCM_FORMAT_S16_LE:
850 dac33->fifo_size = DAC33_FIFO_SIZE_16BIT;
851 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 32);
852 break;
853 case SNDRV_PCM_FORMAT_S32_LE:
854 dac33->fifo_size = DAC33_FIFO_SIZE_24BIT;
855 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 64);
882 break; 856 break;
883 default: 857 default:
884 dev_err(codec->dev, "unsupported format %d\n", 858 dev_err(codec->dev, "unsupported format %d\n",
@@ -933,6 +907,9 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
933 aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16); 907 aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16);
934 fifoctrl_a |= DAC33_WIDTH; 908 fifoctrl_a |= DAC33_WIDTH;
935 break; 909 break;
910 case SNDRV_PCM_FORMAT_S32_LE:
911 aictrl_a |= (DAC33_NCYCL_32 | DAC33_WLEN_24);
912 break;
936 default: 913 default:
937 dev_err(codec->dev, "unsupported format %d\n", 914 dev_err(codec->dev, "unsupported format %d\n",
938 substream->runtime->format); 915 substream->runtime->format);
@@ -1067,7 +1044,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
1067 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 1044 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C,
1068 dac33->burst_bclkdiv); 1045 dac33->burst_bclkdiv);
1069 else 1046 else
1070 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32); 1047 if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE)
1048 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
1049 else
1050 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 16);
1071 1051
1072 switch (dac33->fifo_mode) { 1052 switch (dac33->fifo_mode) {
1073 case DAC33_FIFO_MODE1: 1053 case DAC33_FIFO_MODE1:
@@ -1080,7 +1060,8 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
1080 * at the bottom, and also at the top of the FIFO 1060 * at the bottom, and also at the top of the FIFO
1081 */ 1061 */
1082 dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr)); 1062 dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr));
1083 dac33_write16(codec, DAC33_LTHR_MSB, DAC33_THRREG(MODE7_LTHR)); 1063 dac33_write16(codec, DAC33_LTHR_MSB,
1064 DAC33_THRREG(DAC33_MODE7_MARGIN));
1084 break; 1065 break;
1085 default: 1066 default:
1086 break; 1067 break;
@@ -1109,42 +1090,21 @@ static void dac33_calculate_times(struct snd_pcm_substream *substream)
1109 /* Number of samples under i2c latency */ 1090 /* Number of samples under i2c latency */
1110 dac33->alarm_threshold = US_TO_SAMPLES(rate, 1091 dac33->alarm_threshold = US_TO_SAMPLES(rate,
1111 dac33->mode1_latency); 1092 dac33->mode1_latency);
1112 nsample_limit = DAC33_BUFFER_SIZE_SAMPLES - 1093 nsample_limit = dac33->fifo_size - dac33->alarm_threshold;
1113 dac33->alarm_threshold; 1094
1114 1095 if (period_size <= dac33->alarm_threshold)
1115 if (dac33->auto_fifo_config) {
1116 if (period_size <= dac33->alarm_threshold)
1117 /*
1118 * Configure nSamaple to number of periods,
1119 * which covers the latency requironment.
1120 */
1121 dac33->nsample = period_size *
1122 ((dac33->alarm_threshold / period_size) +
1123 (dac33->alarm_threshold % period_size ?
1124 1 : 0));
1125 else if (period_size > nsample_limit)
1126 dac33->nsample = nsample_limit;
1127 else
1128 dac33->nsample = period_size;
1129 } else {
1130 /* nSample time shall not be shorter than i2c latency */
1131 dac33->nsample_min = dac33->alarm_threshold;
1132 /* 1096 /*
1133 * nSample should not be bigger than alsa buffer minus 1097 * Configure nSamaple to number of periods,
1134 * size of one period to avoid overruns 1098 * which covers the latency requironment.
1135 */ 1099 */
1136 dac33->nsample_max = substream->runtime->buffer_size - 1100 dac33->nsample = period_size *
1137 period_size; 1101 ((dac33->alarm_threshold / period_size) +
1138 1102 (dac33->alarm_threshold % period_size ?
1139 if (dac33->nsample_max > nsample_limit) 1103 1 : 0));
1140 dac33->nsample_max = nsample_limit; 1104 else if (period_size > nsample_limit)
1141 1105 dac33->nsample = nsample_limit;
1142 /* Correct the nSample if it is outside of the ranges */ 1106 else
1143 if (dac33->nsample < dac33->nsample_min) 1107 dac33->nsample = period_size;
1144 dac33->nsample = dac33->nsample_min;
1145 if (dac33->nsample > dac33->nsample_max)
1146 dac33->nsample = dac33->nsample_max;
1147 }
1148 1108
1149 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate, 1109 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
1150 dac33->nsample); 1110 dac33->nsample);
@@ -1152,19 +1112,16 @@ static void dac33_calculate_times(struct snd_pcm_substream *substream)
1152 dac33->t_stamp2 = 0; 1112 dac33->t_stamp2 = 0;
1153 break; 1113 break;
1154 case DAC33_FIFO_MODE7: 1114 case DAC33_FIFO_MODE7:
1155 if (dac33->auto_fifo_config) { 1115 dac33->uthr = UTHR_FROM_PERIOD_SIZE(period_size, rate,
1156 dac33->uthr = UTHR_FROM_PERIOD_SIZE( 1116 dac33->burst_rate) + 9;
1157 period_size, 1117 if (dac33->uthr > (dac33->fifo_size - DAC33_MODE7_MARGIN))
1158 rate, 1118 dac33->uthr = dac33->fifo_size - DAC33_MODE7_MARGIN;
1159 dac33->burst_rate) + 9; 1119 if (dac33->uthr < (DAC33_MODE7_MARGIN + 10))
1160 if (dac33->uthr > MODE7_UTHR) 1120 dac33->uthr = (DAC33_MODE7_MARGIN + 10);
1161 dac33->uthr = MODE7_UTHR; 1121
1162 if (dac33->uthr < (MODE7_LTHR + 10))
1163 dac33->uthr = (MODE7_LTHR + 10);
1164 }
1165 dac33->mode7_us_to_lthr = 1122 dac33->mode7_us_to_lthr =
1166 SAMPLES_TO_US(substream->runtime->rate, 1123 SAMPLES_TO_US(substream->runtime->rate,
1167 dac33->uthr - MODE7_LTHR + 1); 1124 dac33->uthr - DAC33_MODE7_MARGIN + 1);
1168 dac33->t_stamp1 = 0; 1125 dac33->t_stamp1 = 0;
1169 break; 1126 break;
1170 default: 1127 default:
@@ -1282,8 +1239,8 @@ static snd_pcm_sframes_t dac33_dai_delay(
1282 samples += (samples_in - samples_out); 1239 samples += (samples_in - samples_out);
1283 1240
1284 if (likely(samples > 0)) 1241 if (likely(samples > 0))
1285 delay = samples > DAC33_BUFFER_SIZE_SAMPLES ? 1242 delay = samples > dac33->fifo_size ?
1286 DAC33_BUFFER_SIZE_SAMPLES : samples; 1243 dac33->fifo_size : samples;
1287 else 1244 else
1288 delay = 0; 1245 delay = 0;
1289 } 1246 }
@@ -1335,7 +1292,7 @@ static snd_pcm_sframes_t dac33_dai_delay(
1335 samples_in = US_TO_SAMPLES( 1292 samples_in = US_TO_SAMPLES(
1336 dac33->burst_rate, 1293 dac33->burst_rate,
1337 time_delta); 1294 time_delta);
1338 delay = MODE7_LTHR + samples_in - samples_out; 1295 delay = DAC33_MODE7_MARGIN + samples_in - samples_out;
1339 1296
1340 if (unlikely(delay > uthr)) 1297 if (unlikely(delay > uthr))
1341 delay = uthr; 1298 delay = uthr;
@@ -1486,14 +1443,10 @@ static int dac33_soc_probe(struct snd_soc_codec *codec)
1486 snd_soc_add_controls(codec, dac33_snd_controls, 1443 snd_soc_add_controls(codec, dac33_snd_controls,
1487 ARRAY_SIZE(dac33_snd_controls)); 1444 ARRAY_SIZE(dac33_snd_controls));
1488 /* Only add the FIFO controls, if we have valid IRQ number */ 1445 /* Only add the FIFO controls, if we have valid IRQ number */
1489 if (dac33->irq >= 0) { 1446 if (dac33->irq >= 0)
1490 snd_soc_add_controls(codec, dac33_mode_snd_controls, 1447 snd_soc_add_controls(codec, dac33_mode_snd_controls,
1491 ARRAY_SIZE(dac33_mode_snd_controls)); 1448 ARRAY_SIZE(dac33_mode_snd_controls));
1492 /* FIFO usage controls only, if autoio config is not selected */ 1449
1493 if (!dac33->auto_fifo_config)
1494 snd_soc_add_controls(codec, dac33_fifo_snd_controls,
1495 ARRAY_SIZE(dac33_fifo_snd_controls));
1496 }
1497 dac33_add_widgets(codec); 1450 dac33_add_widgets(codec);
1498 1451
1499err_power: 1452err_power:
@@ -1542,7 +1495,7 @@ static struct snd_soc_codec_driver soc_codec_dev_tlv320dac33 = {
1542 1495
1543#define DAC33_RATES (SNDRV_PCM_RATE_44100 | \ 1496#define DAC33_RATES (SNDRV_PCM_RATE_44100 | \
1544 SNDRV_PCM_RATE_48000) 1497 SNDRV_PCM_RATE_48000)
1545#define DAC33_FORMATS SNDRV_PCM_FMTBIT_S16_LE 1498#define DAC33_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1546 1499
1547static struct snd_soc_dai_ops dac33_dai_ops = { 1500static struct snd_soc_dai_ops dac33_dai_ops = {
1548 .startup = dac33_startup, 1501 .startup = dac33_startup,
@@ -1590,17 +1543,11 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client,
1590 1543
1591 dac33->power_gpio = pdata->power_gpio; 1544 dac33->power_gpio = pdata->power_gpio;
1592 dac33->burst_bclkdiv = pdata->burst_bclkdiv; 1545 dac33->burst_bclkdiv = pdata->burst_bclkdiv;
1593 /* Pre calculate the burst rate */
1594 dac33->burst_rate = BURST_BASEFREQ_HZ / dac33->burst_bclkdiv / 32;
1595 dac33->keep_bclk = pdata->keep_bclk; 1546 dac33->keep_bclk = pdata->keep_bclk;
1596 dac33->auto_fifo_config = pdata->auto_fifo_config;
1597 dac33->mode1_latency = pdata->mode1_latency; 1547 dac33->mode1_latency = pdata->mode1_latency;
1598 if (!dac33->mode1_latency) 1548 if (!dac33->mode1_latency)
1599 dac33->mode1_latency = 10000; /* 10ms */ 1549 dac33->mode1_latency = 10000; /* 10ms */
1600 dac33->irq = client->irq; 1550 dac33->irq = client->irq;
1601 dac33->nsample = NSAMPLE_MAX;
1602 dac33->nsample_max = NSAMPLE_MAX;
1603 dac33->uthr = MODE7_UTHR;
1604 /* Disable FIFO use by default */ 1551 /* Disable FIFO use by default */
1605 dac33->fifo_mode = DAC33_FIFO_BYPASS; 1552 dac33->fifo_mode = DAC33_FIFO_BYPASS;
1606 1553