diff options
Diffstat (limited to 'sound/soc/codecs/tlv320aic32x4.c')
-rw-r--r-- | sound/soc/codecs/tlv320aic32x4.c | 65 |
1 files changed, 26 insertions, 39 deletions
diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index e93b9d1ae1dd..b21c610051c0 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c | |||
@@ -528,40 +528,33 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec, | |||
528 | enum snd_soc_bias_level level) | 528 | enum snd_soc_bias_level level) |
529 | { | 529 | { |
530 | struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); | 530 | struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); |
531 | u8 value; | ||
532 | 531 | ||
533 | switch (level) { | 532 | switch (level) { |
534 | case SND_SOC_BIAS_ON: | 533 | case SND_SOC_BIAS_ON: |
535 | if (aic32x4->master) { | 534 | if (aic32x4->master) { |
536 | /* Switch on PLL */ | 535 | /* Switch on PLL */ |
537 | value = snd_soc_read(codec, AIC32X4_PLLPR); | 536 | snd_soc_update_bits(codec, AIC32X4_PLLPR, |
538 | snd_soc_write(codec, AIC32X4_PLLPR, | 537 | AIC32X4_PLLEN, AIC32X4_PLLEN); |
539 | (value | AIC32X4_PLLEN)); | ||
540 | 538 | ||
541 | /* Switch on NDAC Divider */ | 539 | /* Switch on NDAC Divider */ |
542 | value = snd_soc_read(codec, AIC32X4_NDAC); | 540 | snd_soc_update_bits(codec, AIC32X4_NDAC, |
543 | snd_soc_write(codec, AIC32X4_NDAC, | 541 | AIC32X4_NDACEN, AIC32X4_NDACEN); |
544 | value | AIC32X4_NDACEN); | ||
545 | 542 | ||
546 | /* Switch on MDAC Divider */ | 543 | /* Switch on MDAC Divider */ |
547 | value = snd_soc_read(codec, AIC32X4_MDAC); | 544 | snd_soc_update_bits(codec, AIC32X4_MDAC, |
548 | snd_soc_write(codec, AIC32X4_MDAC, | 545 | AIC32X4_MDACEN, AIC32X4_MDACEN); |
549 | value | AIC32X4_MDACEN); | ||
550 | 546 | ||
551 | /* Switch on NADC Divider */ | 547 | /* Switch on NADC Divider */ |
552 | value = snd_soc_read(codec, AIC32X4_NADC); | 548 | snd_soc_update_bits(codec, AIC32X4_NADC, |
553 | snd_soc_write(codec, AIC32X4_NADC, | 549 | AIC32X4_NADCEN, AIC32X4_NADCEN); |
554 | value | AIC32X4_MDACEN); | ||
555 | 550 | ||
556 | /* Switch on MADC Divider */ | 551 | /* Switch on MADC Divider */ |
557 | value = snd_soc_read(codec, AIC32X4_MADC); | 552 | snd_soc_update_bits(codec, AIC32X4_MADC, |
558 | snd_soc_write(codec, AIC32X4_MADC, | 553 | AIC32X4_MADCEN, AIC32X4_MADCEN); |
559 | value | AIC32X4_MDACEN); | ||
560 | 554 | ||
561 | /* Switch on BCLK_N Divider */ | 555 | /* Switch on BCLK_N Divider */ |
562 | value = snd_soc_read(codec, AIC32X4_BCLKN); | 556 | snd_soc_update_bits(codec, AIC32X4_BCLKN, |
563 | snd_soc_write(codec, AIC32X4_BCLKN, | 557 | AIC32X4_BCLKEN, AIC32X4_BCLKEN); |
564 | value | AIC32X4_BCLKEN); | ||
565 | } | 558 | } |
566 | break; | 559 | break; |
567 | case SND_SOC_BIAS_PREPARE: | 560 | case SND_SOC_BIAS_PREPARE: |
@@ -569,34 +562,28 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec, | |||
569 | case SND_SOC_BIAS_STANDBY: | 562 | case SND_SOC_BIAS_STANDBY: |
570 | if (aic32x4->master) { | 563 | if (aic32x4->master) { |
571 | /* Switch off PLL */ | 564 | /* Switch off PLL */ |
572 | value = snd_soc_read(codec, AIC32X4_PLLPR); | 565 | snd_soc_update_bits(codec, AIC32X4_PLLPR, |
573 | snd_soc_write(codec, AIC32X4_PLLPR, | 566 | AIC32X4_PLLEN, 0); |
574 | (value & ~AIC32X4_PLLEN)); | ||
575 | 567 | ||
576 | /* Switch off NDAC Divider */ | 568 | /* Switch off NDAC Divider */ |
577 | value = snd_soc_read(codec, AIC32X4_NDAC); | 569 | snd_soc_update_bits(codec, AIC32X4_NDAC, |
578 | snd_soc_write(codec, AIC32X4_NDAC, | 570 | AIC32X4_NDACEN, 0); |
579 | value & ~AIC32X4_NDACEN); | ||
580 | 571 | ||
581 | /* Switch off MDAC Divider */ | 572 | /* Switch off MDAC Divider */ |
582 | value = snd_soc_read(codec, AIC32X4_MDAC); | 573 | snd_soc_update_bits(codec, AIC32X4_MDAC, |
583 | snd_soc_write(codec, AIC32X4_MDAC, | 574 | AIC32X4_MDACEN, 0); |
584 | value & ~AIC32X4_MDACEN); | ||
585 | 575 | ||
586 | /* Switch off NADC Divider */ | 576 | /* Switch off NADC Divider */ |
587 | value = snd_soc_read(codec, AIC32X4_NADC); | 577 | snd_soc_update_bits(codec, AIC32X4_NADC, |
588 | snd_soc_write(codec, AIC32X4_NADC, | 578 | AIC32X4_NADCEN, 0); |
589 | value & ~AIC32X4_NDACEN); | ||
590 | 579 | ||
591 | /* Switch off MADC Divider */ | 580 | /* Switch off MADC Divider */ |
592 | value = snd_soc_read(codec, AIC32X4_MADC); | 581 | snd_soc_update_bits(codec, AIC32X4_MADC, |
593 | snd_soc_write(codec, AIC32X4_MADC, | 582 | AIC32X4_MADCEN, 0); |
594 | value & ~AIC32X4_MDACEN); | ||
595 | value = snd_soc_read(codec, AIC32X4_BCLKN); | ||
596 | 583 | ||
597 | /* Switch off BCLK_N Divider */ | 584 | /* Switch off BCLK_N Divider */ |
598 | snd_soc_write(codec, AIC32X4_BCLKN, | 585 | snd_soc_update_bits(codec, AIC32X4_BCLKN, |
599 | value & ~AIC32X4_BCLKEN); | 586 | AIC32X4_BCLKEN, 0); |
600 | } | 587 | } |
601 | break; | 588 | break; |
602 | case SND_SOC_BIAS_OFF: | 589 | case SND_SOC_BIAS_OFF: |
@@ -685,10 +672,10 @@ static int aic32x4_probe(struct snd_soc_codec *codec) | |||
685 | } | 672 | } |
686 | 673 | ||
687 | /* Mic PGA routing */ | 674 | /* Mic PGA routing */ |
688 | if (aic32x4->micpga_routing | AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) { | 675 | if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) { |
689 | snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K); | 676 | snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K); |
690 | } | 677 | } |
691 | if (aic32x4->micpga_routing | AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) { | 678 | if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) { |
692 | snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K); | 679 | snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K); |
693 | } | 680 | } |
694 | 681 | ||