diff options
Diffstat (limited to 'sound/soc/codecs/sta32x.h')
-rw-r--r-- | sound/soc/codecs/sta32x.h | 210 |
1 files changed, 210 insertions, 0 deletions
diff --git a/sound/soc/codecs/sta32x.h b/sound/soc/codecs/sta32x.h new file mode 100644 index 000000000000..b97ee5a75667 --- /dev/null +++ b/sound/soc/codecs/sta32x.h | |||
@@ -0,0 +1,210 @@ | |||
1 | /* | ||
2 | * Codec driver for ST STA32x 2.1-channel high-efficiency digital audio system | ||
3 | * | ||
4 | * Copyright: 2011 Raumfeld GmbH | ||
5 | * Author: Johannes Stezenbach <js@sig21.net> | ||
6 | * | ||
7 | * based on code from: | ||
8 | * Wolfson Microelectronics PLC. | ||
9 | * Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | ||
12 | * under the terms of the GNU General Public License as published by the | ||
13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
14 | * option) any later version. | ||
15 | */ | ||
16 | #ifndef _ASOC_STA_32X_H | ||
17 | #define _ASOC_STA_32X_H | ||
18 | |||
19 | /* STA326 register addresses */ | ||
20 | |||
21 | #define STA32X_REGISTER_COUNT 0x2d | ||
22 | |||
23 | #define STA32X_CONFA 0x00 | ||
24 | #define STA32X_CONFB 0x01 | ||
25 | #define STA32X_CONFC 0x02 | ||
26 | #define STA32X_CONFD 0x03 | ||
27 | #define STA32X_CONFE 0x04 | ||
28 | #define STA32X_CONFF 0x05 | ||
29 | #define STA32X_MMUTE 0x06 | ||
30 | #define STA32X_MVOL 0x07 | ||
31 | #define STA32X_C1VOL 0x08 | ||
32 | #define STA32X_C2VOL 0x09 | ||
33 | #define STA32X_C3VOL 0x0a | ||
34 | #define STA32X_AUTO1 0x0b | ||
35 | #define STA32X_AUTO2 0x0c | ||
36 | #define STA32X_AUTO3 0x0d | ||
37 | #define STA32X_C1CFG 0x0e | ||
38 | #define STA32X_C2CFG 0x0f | ||
39 | #define STA32X_C3CFG 0x10 | ||
40 | #define STA32X_TONE 0x11 | ||
41 | #define STA32X_L1AR 0x12 | ||
42 | #define STA32X_L1ATRT 0x13 | ||
43 | #define STA32X_L2AR 0x14 | ||
44 | #define STA32X_L2ATRT 0x15 | ||
45 | #define STA32X_CFADDR2 0x16 | ||
46 | #define STA32X_B1CF1 0x17 | ||
47 | #define STA32X_B1CF2 0x18 | ||
48 | #define STA32X_B1CF3 0x19 | ||
49 | #define STA32X_B2CF1 0x1a | ||
50 | #define STA32X_B2CF2 0x1b | ||
51 | #define STA32X_B2CF3 0x1c | ||
52 | #define STA32X_A1CF1 0x1d | ||
53 | #define STA32X_A1CF2 0x1e | ||
54 | #define STA32X_A1CF3 0x1f | ||
55 | #define STA32X_A2CF1 0x20 | ||
56 | #define STA32X_A2CF2 0x21 | ||
57 | #define STA32X_A2CF3 0x22 | ||
58 | #define STA32X_B0CF1 0x23 | ||
59 | #define STA32X_B0CF2 0x24 | ||
60 | #define STA32X_B0CF3 0x25 | ||
61 | #define STA32X_CFUD 0x26 | ||
62 | #define STA32X_MPCC1 0x27 | ||
63 | #define STA32X_MPCC2 0x28 | ||
64 | /* Reserved 0x29 */ | ||
65 | /* Reserved 0x2a */ | ||
66 | #define STA32X_Reserved 0x2a | ||
67 | #define STA32X_FDRC1 0x2b | ||
68 | #define STA32X_FDRC2 0x2c | ||
69 | /* Reserved 0x2d */ | ||
70 | |||
71 | |||
72 | /* STA326 register field definitions */ | ||
73 | |||
74 | /* 0x00 CONFA */ | ||
75 | #define STA32X_CONFA_MCS_MASK 0x03 | ||
76 | #define STA32X_CONFA_MCS_SHIFT 0 | ||
77 | #define STA32X_CONFA_IR_MASK 0x18 | ||
78 | #define STA32X_CONFA_IR_SHIFT 3 | ||
79 | #define STA32X_CONFA_TWRB 0x20 | ||
80 | #define STA32X_CONFA_TWAB 0x40 | ||
81 | #define STA32X_CONFA_FDRB 0x80 | ||
82 | |||
83 | /* 0x01 CONFB */ | ||
84 | #define STA32X_CONFB_SAI_MASK 0x0f | ||
85 | #define STA32X_CONFB_SAI_SHIFT 0 | ||
86 | #define STA32X_CONFB_SAIFB 0x10 | ||
87 | #define STA32X_CONFB_DSCKE 0x20 | ||
88 | #define STA32X_CONFB_C1IM 0x40 | ||
89 | #define STA32X_CONFB_C2IM 0x80 | ||
90 | |||
91 | /* 0x02 CONFC */ | ||
92 | #define STA32X_CONFC_OM_MASK 0x03 | ||
93 | #define STA32X_CONFC_OM_SHIFT 0 | ||
94 | #define STA32X_CONFC_CSZ_MASK 0x7c | ||
95 | #define STA32X_CONFC_CSZ_SHIFT 2 | ||
96 | |||
97 | /* 0x03 CONFD */ | ||
98 | #define STA32X_CONFD_HPB 0x01 | ||
99 | #define STA32X_CONFD_HPB_SHIFT 0 | ||
100 | #define STA32X_CONFD_DEMP 0x02 | ||
101 | #define STA32X_CONFD_DEMP_SHIFT 1 | ||
102 | #define STA32X_CONFD_DSPB 0x04 | ||
103 | #define STA32X_CONFD_DSPB_SHIFT 2 | ||
104 | #define STA32X_CONFD_PSL 0x08 | ||
105 | #define STA32X_CONFD_PSL_SHIFT 3 | ||
106 | #define STA32X_CONFD_BQL 0x10 | ||
107 | #define STA32X_CONFD_BQL_SHIFT 4 | ||
108 | #define STA32X_CONFD_DRC 0x20 | ||
109 | #define STA32X_CONFD_DRC_SHIFT 5 | ||
110 | #define STA32X_CONFD_ZDE 0x40 | ||
111 | #define STA32X_CONFD_ZDE_SHIFT 6 | ||
112 | #define STA32X_CONFD_MME 0x80 | ||
113 | #define STA32X_CONFD_MME_SHIFT 7 | ||
114 | |||
115 | /* 0x04 CONFE */ | ||
116 | #define STA32X_CONFE_MPCV 0x01 | ||
117 | #define STA32X_CONFE_MPCV_SHIFT 0 | ||
118 | #define STA32X_CONFE_MPC 0x02 | ||
119 | #define STA32X_CONFE_MPC_SHIFT 1 | ||
120 | #define STA32X_CONFE_AME 0x08 | ||
121 | #define STA32X_CONFE_AME_SHIFT 3 | ||
122 | #define STA32X_CONFE_PWMS 0x10 | ||
123 | #define STA32X_CONFE_PWMS_SHIFT 4 | ||
124 | #define STA32X_CONFE_ZCE 0x40 | ||
125 | #define STA32X_CONFE_ZCE_SHIFT 6 | ||
126 | #define STA32X_CONFE_SVE 0x80 | ||
127 | #define STA32X_CONFE_SVE_SHIFT 7 | ||
128 | |||
129 | /* 0x05 CONFF */ | ||
130 | #define STA32X_CONFF_OCFG_MASK 0x03 | ||
131 | #define STA32X_CONFF_OCFG_SHIFT 0 | ||
132 | #define STA32X_CONFF_IDE 0x04 | ||
133 | #define STA32X_CONFF_IDE_SHIFT 3 | ||
134 | #define STA32X_CONFF_BCLE 0x08 | ||
135 | #define STA32X_CONFF_ECLE 0x20 | ||
136 | #define STA32X_CONFF_PWDN 0x40 | ||
137 | #define STA32X_CONFF_EAPD 0x80 | ||
138 | |||
139 | /* 0x06 MMUTE */ | ||
140 | #define STA32X_MMUTE_MMUTE 0x01 | ||
141 | |||
142 | /* 0x0b AUTO1 */ | ||
143 | #define STA32X_AUTO1_AMEQ_MASK 0x03 | ||
144 | #define STA32X_AUTO1_AMEQ_SHIFT 0 | ||
145 | #define STA32X_AUTO1_AMV_MASK 0xc0 | ||
146 | #define STA32X_AUTO1_AMV_SHIFT 2 | ||
147 | #define STA32X_AUTO1_AMGC_MASK 0x30 | ||
148 | #define STA32X_AUTO1_AMGC_SHIFT 4 | ||
149 | #define STA32X_AUTO1_AMPS 0x80 | ||
150 | |||
151 | /* 0x0c AUTO2 */ | ||
152 | #define STA32X_AUTO2_AMAME 0x01 | ||
153 | #define STA32X_AUTO2_AMAM_MASK 0x0e | ||
154 | #define STA32X_AUTO2_AMAM_SHIFT 1 | ||
155 | #define STA32X_AUTO2_XO_MASK 0xf0 | ||
156 | #define STA32X_AUTO2_XO_SHIFT 4 | ||
157 | |||
158 | /* 0x0d AUTO3 */ | ||
159 | #define STA32X_AUTO3_PEQ_MASK 0x1f | ||
160 | #define STA32X_AUTO3_PEQ_SHIFT 0 | ||
161 | |||
162 | /* 0x0e 0x0f 0x10 CxCFG */ | ||
163 | #define STA32X_CxCFG_TCB 0x01 /* only C1 and C2 */ | ||
164 | #define STA32X_CxCFG_TCB_SHIFT 0 | ||
165 | #define STA32X_CxCFG_EQBP 0x02 /* only C1 and C2 */ | ||
166 | #define STA32X_CxCFG_EQBP_SHIFT 1 | ||
167 | #define STA32X_CxCFG_VBP 0x03 | ||
168 | #define STA32X_CxCFG_VBP_SHIFT 2 | ||
169 | #define STA32X_CxCFG_BO 0x04 | ||
170 | #define STA32X_CxCFG_LS_MASK 0x30 | ||
171 | #define STA32X_CxCFG_LS_SHIFT 4 | ||
172 | #define STA32X_CxCFG_OM_MASK 0xc0 | ||
173 | #define STA32X_CxCFG_OM_SHIFT 6 | ||
174 | |||
175 | /* 0x11 TONE */ | ||
176 | #define STA32X_TONE_BTC_SHIFT 0 | ||
177 | #define STA32X_TONE_TTC_SHIFT 4 | ||
178 | |||
179 | /* 0x12 0x13 0x14 0x15 limiter attack/release */ | ||
180 | #define STA32X_LxA_SHIFT 0 | ||
181 | #define STA32X_LxR_SHIFT 4 | ||
182 | |||
183 | /* 0x26 CFUD */ | ||
184 | #define STA32X_CFUD_W1 0x01 | ||
185 | #define STA32X_CFUD_WA 0x02 | ||
186 | #define STA32X_CFUD_R1 0x04 | ||
187 | #define STA32X_CFUD_RA 0x08 | ||
188 | |||
189 | |||
190 | /* biquad filter coefficient table offsets */ | ||
191 | #define STA32X_C1_BQ_BASE 0 | ||
192 | #define STA32X_C2_BQ_BASE 20 | ||
193 | #define STA32X_CH_BQ_NUM 4 | ||
194 | #define STA32X_BQ_NUM_COEF 5 | ||
195 | #define STA32X_XO_HP_BQ_BASE 40 | ||
196 | #define STA32X_XO_LP_BQ_BASE 45 | ||
197 | #define STA32X_C1_PRESCALE 50 | ||
198 | #define STA32X_C2_PRESCALE 51 | ||
199 | #define STA32X_C1_POSTSCALE 52 | ||
200 | #define STA32X_C2_POSTSCALE 53 | ||
201 | #define STA32X_C3_POSTSCALE 54 | ||
202 | #define STA32X_TW_POSTSCALE 55 | ||
203 | #define STA32X_C1_MIX1 56 | ||
204 | #define STA32X_C1_MIX2 57 | ||
205 | #define STA32X_C2_MIX1 58 | ||
206 | #define STA32X_C2_MIX2 59 | ||
207 | #define STA32X_C3_MIX1 60 | ||
208 | #define STA32X_C3_MIX2 61 | ||
209 | |||
210 | #endif /* _ASOC_STA_32X_H */ | ||