diff options
Diffstat (limited to 'sound/soc/codecs/sta32x.c')
-rw-r--r-- | sound/soc/codecs/sta32x.c | 33 |
1 files changed, 14 insertions, 19 deletions
diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c index 5c7def3979c0..bb82408ab8e1 100644 --- a/sound/soc/codecs/sta32x.c +++ b/sound/soc/codecs/sta32x.c | |||
@@ -756,25 +756,19 @@ static int sta32x_probe(struct snd_soc_codec *codec) | |||
756 | return ret; | 756 | return ret; |
757 | } | 757 | } |
758 | 758 | ||
759 | /* read reg reset values into cache */ | 759 | /* Chip documentation explicitly requires that the reset values |
760 | for (i = 0; i < STA32X_REGISTER_COUNT; i++) | 760 | * of reserved register bits are left untouched. |
761 | snd_soc_cache_write(codec, i, sta32x_regs[i]); | 761 | * Write the register default value to cache for reserved registers, |
762 | 762 | * so the write to the these registers are suppressed by the cache | |
763 | /* preserve reset values of reserved register bits */ | 763 | * restore code when it skips writes of default registers. |
764 | snd_soc_cache_write(codec, STA32X_CONFC, | 764 | */ |
765 | codec->hw_read(codec, STA32X_CONFC)); | 765 | snd_soc_cache_write(codec, STA32X_CONFC, 0xc2); |
766 | snd_soc_cache_write(codec, STA32X_CONFE, | 766 | snd_soc_cache_write(codec, STA32X_CONFE, 0xc2); |
767 | codec->hw_read(codec, STA32X_CONFE)); | 767 | snd_soc_cache_write(codec, STA32X_CONFF, 0x5c); |
768 | snd_soc_cache_write(codec, STA32X_CONFF, | 768 | snd_soc_cache_write(codec, STA32X_MMUTE, 0x10); |
769 | codec->hw_read(codec, STA32X_CONFF)); | 769 | snd_soc_cache_write(codec, STA32X_AUTO1, 0x60); |
770 | snd_soc_cache_write(codec, STA32X_MMUTE, | 770 | snd_soc_cache_write(codec, STA32X_AUTO3, 0x00); |
771 | codec->hw_read(codec, STA32X_MMUTE)); | 771 | snd_soc_cache_write(codec, STA32X_C3CFG, 0x40); |
772 | snd_soc_cache_write(codec, STA32X_AUTO1, | ||
773 | codec->hw_read(codec, STA32X_AUTO1)); | ||
774 | snd_soc_cache_write(codec, STA32X_AUTO3, | ||
775 | codec->hw_read(codec, STA32X_AUTO3)); | ||
776 | snd_soc_cache_write(codec, STA32X_C3CFG, | ||
777 | codec->hw_read(codec, STA32X_C3CFG)); | ||
778 | 772 | ||
779 | /* FIXME enable thermal warning adjustment and recovery */ | 773 | /* FIXME enable thermal warning adjustment and recovery */ |
780 | snd_soc_update_bits(codec, STA32X_CONFA, | 774 | snd_soc_update_bits(codec, STA32X_CONFA, |
@@ -837,6 +831,7 @@ static const struct snd_soc_codec_driver sta32x_codec = { | |||
837 | .resume = sta32x_resume, | 831 | .resume = sta32x_resume, |
838 | .reg_cache_size = STA32X_REGISTER_COUNT, | 832 | .reg_cache_size = STA32X_REGISTER_COUNT, |
839 | .reg_word_size = sizeof(u8), | 833 | .reg_word_size = sizeof(u8), |
834 | .reg_cache_default = sta32x_regs, | ||
840 | .volatile_register = sta32x_reg_is_volatile, | 835 | .volatile_register = sta32x_reg_is_volatile, |
841 | .set_bias_level = sta32x_set_bias_level, | 836 | .set_bias_level = sta32x_set_bias_level, |
842 | .controls = sta32x_snd_controls, | 837 | .controls = sta32x_snd_controls, |