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-rw-r--r--sound/soc/codecs/rt286.c1222
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diff --git a/sound/soc/codecs/rt286.c b/sound/soc/codecs/rt286.c
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+++ b/sound/soc/codecs/rt286.c
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1/*
2 * rt286.c -- RT286 ALSA SoC audio codec driver
3 *
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
19#include <linux/spi/spi.h>
20#include <linux/acpi.h>
21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
25#include <sound/soc-dapm.h>
26#include <sound/initval.h>
27#include <sound/tlv.h>
28#include <sound/jack.h>
29#include <linux/workqueue.h>
30#include <sound/rt286.h>
31#include <sound/hda_verbs.h>
32
33#include "rt286.h"
34
35#define RT286_VENDOR_ID 0x10ec0286
36
37struct rt286_priv {
38 struct regmap *regmap;
39 struct rt286_platform_data pdata;
40 struct i2c_client *i2c;
41 struct snd_soc_jack *jack;
42 struct delayed_work jack_detect_work;
43 int sys_clk;
44 struct reg_default *index_cache;
45};
46
47static struct reg_default rt286_index_def[] = {
48 { 0x01, 0xaaaa },
49 { 0x02, 0x8aaa },
50 { 0x03, 0x0002 },
51 { 0x04, 0xaf01 },
52 { 0x08, 0x000d },
53 { 0x09, 0xd810 },
54 { 0x0a, 0x0060 },
55 { 0x0b, 0x0000 },
56 { 0x0d, 0x2800 },
57 { 0x0f, 0x0000 },
58 { 0x19, 0x0a17 },
59 { 0x20, 0x0020 },
60 { 0x33, 0x0208 },
61 { 0x49, 0x0004 },
62 { 0x4f, 0x50e9 },
63 { 0x50, 0x2c00 },
64 { 0x63, 0x2902 },
65 { 0x67, 0x1111 },
66 { 0x68, 0x1016 },
67 { 0x69, 0x273f },
68};
69#define INDEX_CACHE_SIZE ARRAY_SIZE(rt286_index_def)
70
71static const struct reg_default rt286_reg[] = {
72 { 0x00170500, 0x00000400 },
73 { 0x00220000, 0x00000031 },
74 { 0x00239000, 0x0000007f },
75 { 0x0023a000, 0x0000007f },
76 { 0x00270500, 0x00000400 },
77 { 0x00370500, 0x00000400 },
78 { 0x00870500, 0x00000400 },
79 { 0x00920000, 0x00000031 },
80 { 0x00935000, 0x000000c3 },
81 { 0x00936000, 0x000000c3 },
82 { 0x00970500, 0x00000400 },
83 { 0x00b37000, 0x00000097 },
84 { 0x00b37200, 0x00000097 },
85 { 0x00b37300, 0x00000097 },
86 { 0x00c37000, 0x00000000 },
87 { 0x00c37100, 0x00000080 },
88 { 0x01270500, 0x00000400 },
89 { 0x01370500, 0x00000400 },
90 { 0x01371f00, 0x411111f0 },
91 { 0x01439000, 0x00000080 },
92 { 0x0143a000, 0x00000080 },
93 { 0x01470700, 0x00000000 },
94 { 0x01470500, 0x00000400 },
95 { 0x01470c00, 0x00000000 },
96 { 0x01470100, 0x00000000 },
97 { 0x01837000, 0x00000000 },
98 { 0x01870500, 0x00000400 },
99 { 0x02050000, 0x00000000 },
100 { 0x02139000, 0x00000080 },
101 { 0x0213a000, 0x00000080 },
102 { 0x02170100, 0x00000000 },
103 { 0x02170500, 0x00000400 },
104 { 0x02170700, 0x00000000 },
105 { 0x02270100, 0x00000000 },
106 { 0x02370100, 0x00000000 },
107 { 0x02040000, 0x00004002 },
108 { 0x01870700, 0x00000020 },
109 { 0x00830000, 0x000000c3 },
110 { 0x00930000, 0x000000c3 },
111 { 0x01270700, 0x00000000 },
112};
113
114static bool rt286_volatile_register(struct device *dev, unsigned int reg)
115{
116 switch (reg) {
117 case 0 ... 0xff:
118 case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
119 case RT286_GET_HP_SENSE:
120 case RT286_GET_MIC1_SENSE:
121 case RT286_PROC_COEF:
122 return true;
123 default:
124 return false;
125 }
126
127
128}
129
130static bool rt286_readable_register(struct device *dev, unsigned int reg)
131{
132 switch (reg) {
133 case 0 ... 0xff:
134 case RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
135 case RT286_GET_HP_SENSE:
136 case RT286_GET_MIC1_SENSE:
137 case RT286_SET_AUDIO_POWER:
138 case RT286_SET_HPO_POWER:
139 case RT286_SET_SPK_POWER:
140 case RT286_SET_DMIC1_POWER:
141 case RT286_SPK_MUX:
142 case RT286_HPO_MUX:
143 case RT286_ADC0_MUX:
144 case RT286_ADC1_MUX:
145 case RT286_SET_MIC1:
146 case RT286_SET_PIN_HPO:
147 case RT286_SET_PIN_SPK:
148 case RT286_SET_PIN_DMIC1:
149 case RT286_SPK_EAPD:
150 case RT286_SET_AMP_GAIN_HPO:
151 case RT286_SET_DMIC2_DEFAULT:
152 case RT286_DACL_GAIN:
153 case RT286_DACR_GAIN:
154 case RT286_ADCL_GAIN:
155 case RT286_ADCR_GAIN:
156 case RT286_MIC_GAIN:
157 case RT286_SPOL_GAIN:
158 case RT286_SPOR_GAIN:
159 case RT286_HPOL_GAIN:
160 case RT286_HPOR_GAIN:
161 case RT286_F_DAC_SWITCH:
162 case RT286_F_RECMIX_SWITCH:
163 case RT286_REC_MIC_SWITCH:
164 case RT286_REC_I2S_SWITCH:
165 case RT286_REC_LINE_SWITCH:
166 case RT286_REC_BEEP_SWITCH:
167 case RT286_DAC_FORMAT:
168 case RT286_ADC_FORMAT:
169 case RT286_COEF_INDEX:
170 case RT286_PROC_COEF:
171 case RT286_SET_AMP_GAIN_ADC_IN1:
172 case RT286_SET_AMP_GAIN_ADC_IN2:
173 case RT286_SET_POWER(RT286_DAC_OUT1):
174 case RT286_SET_POWER(RT286_DAC_OUT2):
175 case RT286_SET_POWER(RT286_ADC_IN1):
176 case RT286_SET_POWER(RT286_ADC_IN2):
177 case RT286_SET_POWER(RT286_DMIC2):
178 case RT286_SET_POWER(RT286_MIC1):
179 return true;
180 default:
181 return false;
182 }
183}
184
185static int rt286_hw_write(void *context, unsigned int reg, unsigned int value)
186{
187 struct i2c_client *client = context;
188 struct rt286_priv *rt286 = i2c_get_clientdata(client);
189 u8 data[4];
190 int ret, i;
191
192 /*handle index registers*/
193 if (reg <= 0xff) {
194 rt286_hw_write(client, RT286_COEF_INDEX, reg);
195 reg = RT286_PROC_COEF;
196 for (i = 0; i < INDEX_CACHE_SIZE; i++) {
197 if (reg == rt286->index_cache[i].reg) {
198 rt286->index_cache[i].def = value;
199 break;
200 }
201
202 }
203 }
204
205 data[0] = (reg >> 24) & 0xff;
206 data[1] = (reg >> 16) & 0xff;
207 /*
208 * 4 bit VID: reg should be 0
209 * 12 bit VID: value should be 0
210 * So we use an OR operator to handle it rather than use if condition.
211 */
212 data[2] = ((reg >> 8) & 0xff) | ((value >> 8) & 0xff);
213 data[3] = value & 0xff;
214
215 ret = i2c_master_send(client, data, 4);
216
217 if (ret == 4)
218 return 0;
219 else
220 pr_err("ret=%d\n", ret);
221 if (ret < 0)
222 return ret;
223 else
224 return -EIO;
225}
226
227static int rt286_hw_read(void *context, unsigned int reg, unsigned int *value)
228{
229 struct i2c_client *client = context;
230 struct i2c_msg xfer[2];
231 int ret;
232 __be32 be_reg;
233 unsigned int index, vid, buf = 0x0;
234
235 /*handle index registers*/
236 if (reg <= 0xff) {
237 rt286_hw_write(client, RT286_COEF_INDEX, reg);
238 reg = RT286_PROC_COEF;
239 }
240
241 reg = reg | 0x80000;
242 vid = (reg >> 8) & 0xfff;
243
244 if (AC_VERB_GET_AMP_GAIN_MUTE == (vid & 0xf00)) {
245 index = (reg >> 8) & 0xf;
246 reg = (reg & ~0xf0f) | index;
247 }
248 be_reg = cpu_to_be32(reg);
249
250 /* Write register */
251 xfer[0].addr = client->addr;
252 xfer[0].flags = 0;
253 xfer[0].len = 4;
254 xfer[0].buf = (u8 *)&be_reg;
255
256 /* Read data */
257 xfer[1].addr = client->addr;
258 xfer[1].flags = I2C_M_RD;
259 xfer[1].len = 4;
260 xfer[1].buf = (u8 *)&buf;
261
262 ret = i2c_transfer(client->adapter, xfer, 2);
263 if (ret < 0)
264 return ret;
265 else if (ret != 2)
266 return -EIO;
267
268 *value = be32_to_cpu(buf);
269
270 return 0;
271}
272
273static void rt286_index_sync(struct snd_soc_codec *codec)
274{
275 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
276 int i;
277
278 for (i = 0; i < INDEX_CACHE_SIZE; i++) {
279 snd_soc_write(codec, rt286->index_cache[i].reg,
280 rt286->index_cache[i].def);
281 }
282}
283
284static int rt286_support_power_controls[] = {
285 RT286_DAC_OUT1,
286 RT286_DAC_OUT2,
287 RT286_ADC_IN1,
288 RT286_ADC_IN2,
289 RT286_MIC1,
290 RT286_DMIC1,
291 RT286_DMIC2,
292 RT286_SPK_OUT,
293 RT286_HP_OUT,
294};
295#define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls)
296
297static int rt286_jack_detect(struct rt286_priv *rt286, bool *hp, bool *mic)
298{
299 unsigned int val, buf;
300 int i;
301
302 *hp = false;
303 *mic = false;
304
305 if (rt286->pdata.cbj_en) {
306 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
307 *hp = buf & 0x80000000;
308 if (*hp) {
309 /* power on HV,VERF */
310 regmap_update_bits(rt286->regmap,
311 RT286_POWER_CTRL1, 0x1001, 0x0);
312 /* power LDO1 */
313 regmap_update_bits(rt286->regmap,
314 RT286_POWER_CTRL2, 0x4, 0x4);
315 regmap_write(rt286->regmap, RT286_SET_MIC1, 0x24);
316 regmap_read(rt286->regmap, RT286_CBJ_CTRL2, &val);
317
318 msleep(200);
319 i = 40;
320 while (((val & 0x0800) == 0) && (i > 0)) {
321 regmap_read(rt286->regmap,
322 RT286_CBJ_CTRL2, &val);
323 i--;
324 msleep(20);
325 }
326
327 if (0x0400 == (val & 0x0700)) {
328 *mic = false;
329
330 regmap_write(rt286->regmap,
331 RT286_SET_MIC1, 0x20);
332 /* power off HV,VERF */
333 regmap_update_bits(rt286->regmap,
334 RT286_POWER_CTRL1, 0x1001, 0x1001);
335 regmap_update_bits(rt286->regmap,
336 RT286_A_BIAS_CTRL3, 0xc000, 0x0000);
337 regmap_update_bits(rt286->regmap,
338 RT286_CBJ_CTRL1, 0x0030, 0x0000);
339 regmap_update_bits(rt286->regmap,
340 RT286_A_BIAS_CTRL2, 0xc000, 0x0000);
341 } else if ((0x0200 == (val & 0x0700)) ||
342 (0x0100 == (val & 0x0700))) {
343 *mic = true;
344 regmap_update_bits(rt286->regmap,
345 RT286_A_BIAS_CTRL3, 0xc000, 0x8000);
346 regmap_update_bits(rt286->regmap,
347 RT286_CBJ_CTRL1, 0x0030, 0x0020);
348 regmap_update_bits(rt286->regmap,
349 RT286_A_BIAS_CTRL2, 0xc000, 0x8000);
350 } else {
351 *mic = false;
352 }
353
354 regmap_update_bits(rt286->regmap,
355 RT286_MISC_CTRL1,
356 0x0060, 0x0000);
357 } else {
358 regmap_update_bits(rt286->regmap,
359 RT286_MISC_CTRL1,
360 0x0060, 0x0020);
361 regmap_update_bits(rt286->regmap,
362 RT286_A_BIAS_CTRL3,
363 0xc000, 0x8000);
364 regmap_update_bits(rt286->regmap,
365 RT286_CBJ_CTRL1,
366 0x0030, 0x0020);
367 regmap_update_bits(rt286->regmap,
368 RT286_A_BIAS_CTRL2,
369 0xc000, 0x8000);
370
371 *mic = false;
372 }
373 } else {
374 regmap_read(rt286->regmap, RT286_GET_HP_SENSE, &buf);
375 *hp = buf & 0x80000000;
376 regmap_read(rt286->regmap, RT286_GET_MIC1_SENSE, &buf);
377 *mic = buf & 0x80000000;
378 }
379
380 return 0;
381}
382
383static void rt286_jack_detect_work(struct work_struct *work)
384{
385 struct rt286_priv *rt286 =
386 container_of(work, struct rt286_priv, jack_detect_work.work);
387 int status = 0;
388 bool hp = false;
389 bool mic = false;
390
391 rt286_jack_detect(rt286, &hp, &mic);
392
393 if (hp == true)
394 status |= SND_JACK_HEADPHONE;
395
396 if (mic == true)
397 status |= SND_JACK_MICROPHONE;
398
399 snd_soc_jack_report(rt286->jack, status,
400 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
401}
402
403int rt286_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
404{
405 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
406
407 rt286->jack = jack;
408
409 /* Send an initial empty report */
410 snd_soc_jack_report(rt286->jack, 0,
411 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
412
413 return 0;
414}
415EXPORT_SYMBOL_GPL(rt286_mic_detect);
416
417static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
418static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
419
420static const struct snd_kcontrol_new rt286_snd_controls[] = {
421 SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT286_DACL_GAIN,
422 RT286_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
423 SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT286_ADCL_GAIN,
424 RT286_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
425 SOC_SINGLE_TLV("AMIC Volume", RT286_MIC_GAIN,
426 0, 0x3, 0, mic_vol_tlv),
427 SOC_DOUBLE_R("Speaker Playback Switch", RT286_SPOL_GAIN,
428 RT286_SPOR_GAIN, RT286_MUTE_SFT, 1, 1),
429};
430
431/* Digital Mixer */
432static const struct snd_kcontrol_new rt286_front_mix[] = {
433 SOC_DAPM_SINGLE("DAC Switch", RT286_F_DAC_SWITCH,
434 RT286_MUTE_SFT, 1, 1),
435 SOC_DAPM_SINGLE("RECMIX Switch", RT286_F_RECMIX_SWITCH,
436 RT286_MUTE_SFT, 1, 1),
437};
438
439/* Analog Input Mixer */
440static const struct snd_kcontrol_new rt286_rec_mix[] = {
441 SOC_DAPM_SINGLE("Mic1 Switch", RT286_REC_MIC_SWITCH,
442 RT286_MUTE_SFT, 1, 1),
443 SOC_DAPM_SINGLE("I2S Switch", RT286_REC_I2S_SWITCH,
444 RT286_MUTE_SFT, 1, 1),
445 SOC_DAPM_SINGLE("Line1 Switch", RT286_REC_LINE_SWITCH,
446 RT286_MUTE_SFT, 1, 1),
447 SOC_DAPM_SINGLE("Beep Switch", RT286_REC_BEEP_SWITCH,
448 RT286_MUTE_SFT, 1, 1),
449};
450
451static const struct snd_kcontrol_new spo_enable_control =
452 SOC_DAPM_SINGLE("Switch", RT286_SET_PIN_SPK,
453 RT286_SET_PIN_SFT, 1, 0);
454
455static const struct snd_kcontrol_new hpol_enable_control =
456 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOL_GAIN,
457 RT286_MUTE_SFT, 1, 1);
458
459static const struct snd_kcontrol_new hpor_enable_control =
460 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOR_GAIN,
461 RT286_MUTE_SFT, 1, 1);
462
463/* ADC0 source */
464static const char * const rt286_adc_src[] = {
465 "Mic", "RECMIX", "Dmic"
466};
467
468static const int rt286_adc_values[] = {
469 0, 4, 5,
470};
471
472static SOC_VALUE_ENUM_SINGLE_DECL(
473 rt286_adc0_enum, RT286_ADC0_MUX, RT286_ADC_SEL_SFT,
474 RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
475
476static const struct snd_kcontrol_new rt286_adc0_mux =
477 SOC_DAPM_ENUM("ADC 0 source", rt286_adc0_enum);
478
479static SOC_VALUE_ENUM_SINGLE_DECL(
480 rt286_adc1_enum, RT286_ADC1_MUX, RT286_ADC_SEL_SFT,
481 RT286_ADC_SEL_MASK, rt286_adc_src, rt286_adc_values);
482
483static const struct snd_kcontrol_new rt286_adc1_mux =
484 SOC_DAPM_ENUM("ADC 1 source", rt286_adc1_enum);
485
486static const char * const rt286_dac_src[] = {
487 "Front", "Surround"
488};
489/* HP-OUT source */
490static SOC_ENUM_SINGLE_DECL(rt286_hpo_enum, RT286_HPO_MUX,
491 0, rt286_dac_src);
492
493static const struct snd_kcontrol_new rt286_hpo_mux =
494SOC_DAPM_ENUM("HPO source", rt286_hpo_enum);
495
496/* SPK-OUT source */
497static SOC_ENUM_SINGLE_DECL(rt286_spo_enum, RT286_SPK_MUX,
498 0, rt286_dac_src);
499
500static const struct snd_kcontrol_new rt286_spo_mux =
501SOC_DAPM_ENUM("SPO source", rt286_spo_enum);
502
503static int rt286_spk_event(struct snd_soc_dapm_widget *w,
504 struct snd_kcontrol *kcontrol, int event)
505{
506 struct snd_soc_codec *codec = w->codec;
507
508 switch (event) {
509 case SND_SOC_DAPM_POST_PMU:
510 snd_soc_write(codec,
511 RT286_SPK_EAPD, RT286_SET_EAPD_HIGH);
512 break;
513 case SND_SOC_DAPM_PRE_PMD:
514 snd_soc_write(codec,
515 RT286_SPK_EAPD, RT286_SET_EAPD_LOW);
516 break;
517
518 default:
519 return 0;
520 }
521
522 return 0;
523}
524
525static int rt286_set_dmic1_event(struct snd_soc_dapm_widget *w,
526 struct snd_kcontrol *kcontrol, int event)
527{
528 struct snd_soc_codec *codec = w->codec;
529
530 switch (event) {
531 case SND_SOC_DAPM_POST_PMU:
532 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0x20);
533 break;
534 case SND_SOC_DAPM_PRE_PMD:
535 snd_soc_write(codec, RT286_SET_PIN_DMIC1, 0);
536 break;
537 default:
538 return 0;
539 }
540
541 return 0;
542}
543
544static int rt286_adc_event(struct snd_soc_dapm_widget *w,
545 struct snd_kcontrol *kcontrol, int event)
546{
547 struct snd_soc_codec *codec = w->codec;
548 unsigned int nid;
549
550 nid = (w->reg >> 20) & 0xff;
551
552 switch (event) {
553 case SND_SOC_DAPM_POST_PMU:
554 snd_soc_update_bits(codec,
555 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
556 0x7080, 0x7000);
557 break;
558 case SND_SOC_DAPM_PRE_PMD:
559 snd_soc_update_bits(codec,
560 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
561 0x7080, 0x7080);
562 break;
563 default:
564 return 0;
565 }
566
567 return 0;
568}
569
570static const struct snd_soc_dapm_widget rt286_dapm_widgets[] = {
571 /* Input Lines */
572 SND_SOC_DAPM_INPUT("DMIC1 Pin"),
573 SND_SOC_DAPM_INPUT("DMIC2 Pin"),
574 SND_SOC_DAPM_INPUT("MIC1"),
575 SND_SOC_DAPM_INPUT("LINE1"),
576 SND_SOC_DAPM_INPUT("Beep"),
577
578 /* DMIC */
579 SND_SOC_DAPM_PGA_E("DMIC1", RT286_SET_POWER(RT286_DMIC1), 0, 1,
580 NULL, 0, rt286_set_dmic1_event,
581 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
582 SND_SOC_DAPM_PGA("DMIC2", RT286_SET_POWER(RT286_DMIC2), 0, 1,
583 NULL, 0),
584 SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
585 0, 0, NULL, 0),
586
587 /* REC Mixer */
588 SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
589 rt286_rec_mix, ARRAY_SIZE(rt286_rec_mix)),
590
591 /* ADCs */
592 SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
593 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
594
595 /* ADC Mux */
596 SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT286_SET_POWER(RT286_ADC_IN1), 0, 1,
597 &rt286_adc0_mux, rt286_adc_event, SND_SOC_DAPM_PRE_PMD |
598 SND_SOC_DAPM_POST_PMU),
599 SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT286_SET_POWER(RT286_ADC_IN2), 0, 1,
600 &rt286_adc1_mux, rt286_adc_event, SND_SOC_DAPM_PRE_PMD |
601 SND_SOC_DAPM_POST_PMU),
602
603 /* Audio Interface */
604 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
605 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
606 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
607 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
608
609 /* Output Side */
610 /* DACs */
611 SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
612 SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
613
614 /* Output Mux */
615 SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt286_spo_mux),
616 SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt286_hpo_mux),
617
618 SND_SOC_DAPM_SUPPLY("HP Power", RT286_SET_PIN_HPO,
619 RT286_SET_PIN_SFT, 0, NULL, 0),
620
621 /* Output Mixer */
622 SND_SOC_DAPM_MIXER("Front", RT286_SET_POWER(RT286_DAC_OUT1), 0, 1,
623 rt286_front_mix, ARRAY_SIZE(rt286_front_mix)),
624 SND_SOC_DAPM_PGA("Surround", RT286_SET_POWER(RT286_DAC_OUT2), 0, 1,
625 NULL, 0),
626
627 /* Output Pga */
628 SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
629 &spo_enable_control, rt286_spk_event,
630 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
631 SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
632 &hpol_enable_control),
633 SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
634 &hpor_enable_control),
635
636 /* Output Lines */
637 SND_SOC_DAPM_OUTPUT("SPOL"),
638 SND_SOC_DAPM_OUTPUT("SPOR"),
639 SND_SOC_DAPM_OUTPUT("HPO Pin"),
640 SND_SOC_DAPM_OUTPUT("SPDIF"),
641};
642
643static const struct snd_soc_dapm_route rt286_dapm_routes[] = {
644 {"DMIC1", NULL, "DMIC1 Pin"},
645 {"DMIC2", NULL, "DMIC2 Pin"},
646 {"DMIC1", NULL, "DMIC Receiver"},
647 {"DMIC2", NULL, "DMIC Receiver"},
648
649 {"RECMIX", "Beep Switch", "Beep"},
650 {"RECMIX", "Line1 Switch", "LINE1"},
651 {"RECMIX", "Mic1 Switch", "MIC1"},
652
653 {"ADC 0 Mux", "Dmic", "DMIC1"},
654 {"ADC 0 Mux", "RECMIX", "RECMIX"},
655 {"ADC 0 Mux", "Mic", "MIC1"},
656 {"ADC 1 Mux", "Dmic", "DMIC2"},
657 {"ADC 1 Mux", "RECMIX", "RECMIX"},
658 {"ADC 1 Mux", "Mic", "MIC1"},
659
660 {"ADC 0", NULL, "ADC 0 Mux"},
661 {"ADC 1", NULL, "ADC 1 Mux"},
662
663 {"AIF1TX", NULL, "ADC 0"},
664 {"AIF2TX", NULL, "ADC 1"},
665
666 {"DAC 0", NULL, "AIF1RX"},
667 {"DAC 1", NULL, "AIF2RX"},
668
669 {"Front", "DAC Switch", "DAC 0"},
670 {"Front", "RECMIX Switch", "RECMIX"},
671
672 {"Surround", NULL, "DAC 1"},
673
674 {"SPK Mux", "Front", "Front"},
675 {"SPK Mux", "Surround", "Surround"},
676
677 {"HPO Mux", "Front", "Front"},
678 {"HPO Mux", "Surround", "Surround"},
679
680 {"SPO", "Switch", "SPK Mux"},
681 {"HPO L", "Switch", "HPO Mux"},
682 {"HPO R", "Switch", "HPO Mux"},
683 {"HPO L", NULL, "HP Power"},
684 {"HPO R", NULL, "HP Power"},
685
686 {"SPOL", NULL, "SPO"},
687 {"SPOR", NULL, "SPO"},
688 {"HPO Pin", NULL, "HPO L"},
689 {"HPO Pin", NULL, "HPO R"},
690};
691
692static int rt286_hw_params(struct snd_pcm_substream *substream,
693 struct snd_pcm_hw_params *params,
694 struct snd_soc_dai *dai)
695{
696 struct snd_soc_codec *codec = dai->codec;
697 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
698 unsigned int val = 0;
699 int d_len_code;
700
701 switch (params_rate(params)) {
702 /* bit 14 0:48K 1:44.1K */
703 case 44100:
704 val |= 0x4000;
705 break;
706 case 48000:
707 break;
708 default:
709 dev_err(codec->dev, "Unsupported sample rate %d\n",
710 params_rate(params));
711 return -EINVAL;
712 }
713 switch (rt286->sys_clk) {
714 case 12288000:
715 case 24576000:
716 if (params_rate(params) != 48000) {
717 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
718 params_rate(params), rt286->sys_clk);
719 return -EINVAL;
720 }
721 break;
722 case 11289600:
723 case 22579200:
724 if (params_rate(params) != 44100) {
725 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
726 params_rate(params), rt286->sys_clk);
727 return -EINVAL;
728 }
729 break;
730 }
731
732 if (params_channels(params) <= 16) {
733 /* bit 3:0 Number of Channel */
734 val |= (params_channels(params) - 1);
735 } else {
736 dev_err(codec->dev, "Unsupported channels %d\n",
737 params_channels(params));
738 return -EINVAL;
739 }
740
741 d_len_code = 0;
742 switch (params_width(params)) {
743 /* bit 6:4 Bits per Sample */
744 case 16:
745 d_len_code = 0;
746 val |= (0x1 << 4);
747 break;
748 case 32:
749 d_len_code = 2;
750 val |= (0x4 << 4);
751 break;
752 case 20:
753 d_len_code = 1;
754 val |= (0x2 << 4);
755 break;
756 case 24:
757 d_len_code = 2;
758 val |= (0x3 << 4);
759 break;
760 case 8:
761 d_len_code = 3;
762 break;
763 default:
764 return -EINVAL;
765 }
766
767 snd_soc_update_bits(codec,
768 RT286_I2S_CTRL1, 0x0018, d_len_code << 3);
769 dev_dbg(codec->dev, "format val = 0x%x\n", val);
770
771 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
772 snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x407f, val);
773 else
774 snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x407f, val);
775
776 return 0;
777}
778
779static int rt286_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
780{
781 struct snd_soc_codec *codec = dai->codec;
782
783 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
784 case SND_SOC_DAIFMT_CBM_CFM:
785 snd_soc_update_bits(codec,
786 RT286_I2S_CTRL1, 0x800, 0x800);
787 break;
788 case SND_SOC_DAIFMT_CBS_CFS:
789 snd_soc_update_bits(codec,
790 RT286_I2S_CTRL1, 0x800, 0x0);
791 break;
792 default:
793 return -EINVAL;
794 }
795
796 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
797 case SND_SOC_DAIFMT_I2S:
798 snd_soc_update_bits(codec,
799 RT286_I2S_CTRL1, 0x300, 0x0);
800 break;
801 case SND_SOC_DAIFMT_LEFT_J:
802 snd_soc_update_bits(codec,
803 RT286_I2S_CTRL1, 0x300, 0x1 << 8);
804 break;
805 case SND_SOC_DAIFMT_DSP_A:
806 snd_soc_update_bits(codec,
807 RT286_I2S_CTRL1, 0x300, 0x2 << 8);
808 break;
809 case SND_SOC_DAIFMT_DSP_B:
810 snd_soc_update_bits(codec,
811 RT286_I2S_CTRL1, 0x300, 0x3 << 8);
812 break;
813 default:
814 return -EINVAL;
815 }
816 /* bit 15 Stream Type 0:PCM 1:Non-PCM */
817 snd_soc_update_bits(codec, RT286_DAC_FORMAT, 0x8000, 0);
818 snd_soc_update_bits(codec, RT286_ADC_FORMAT, 0x8000, 0);
819
820 return 0;
821}
822
823static int rt286_set_dai_sysclk(struct snd_soc_dai *dai,
824 int clk_id, unsigned int freq, int dir)
825{
826 struct snd_soc_codec *codec = dai->codec;
827 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
828
829 dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq);
830
831 if (RT286_SCLK_S_MCLK == clk_id) {
832 snd_soc_update_bits(codec,
833 RT286_I2S_CTRL2, 0x0100, 0x0);
834 snd_soc_update_bits(codec,
835 RT286_PLL_CTRL1, 0x20, 0x20);
836 } else {
837 snd_soc_update_bits(codec,
838 RT286_I2S_CTRL2, 0x0100, 0x0100);
839 snd_soc_update_bits(codec,
840 RT286_PLL_CTRL, 0x4, 0x4);
841 snd_soc_update_bits(codec,
842 RT286_PLL_CTRL1, 0x20, 0x0);
843 }
844
845 switch (freq) {
846 case 19200000:
847 if (RT286_SCLK_S_MCLK == clk_id) {
848 dev_err(codec->dev, "Should not use MCLK\n");
849 return -EINVAL;
850 }
851 snd_soc_update_bits(codec,
852 RT286_I2S_CTRL2, 0x40, 0x40);
853 break;
854 case 24000000:
855 if (RT286_SCLK_S_MCLK == clk_id) {
856 dev_err(codec->dev, "Should not use MCLK\n");
857 return -EINVAL;
858 }
859 snd_soc_update_bits(codec,
860 RT286_I2S_CTRL2, 0x40, 0x0);
861 break;
862 case 12288000:
863 case 11289600:
864 snd_soc_update_bits(codec,
865 RT286_I2S_CTRL2, 0x8, 0x0);
866 snd_soc_update_bits(codec,
867 RT286_CLK_DIV, 0xfc1e, 0x0004);
868 break;
869 case 24576000:
870 case 22579200:
871 snd_soc_update_bits(codec,
872 RT286_I2S_CTRL2, 0x8, 0x8);
873 snd_soc_update_bits(codec,
874 RT286_CLK_DIV, 0xfc1e, 0x5406);
875 break;
876 default:
877 dev_err(codec->dev, "Unsupported system clock\n");
878 return -EINVAL;
879 }
880
881 rt286->sys_clk = freq;
882
883 return 0;
884}
885
886static int rt286_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
887{
888 struct snd_soc_codec *codec = dai->codec;
889
890 dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
891 if (50 == ratio)
892 snd_soc_update_bits(codec,
893 RT286_I2S_CTRL1, 0x1000, 0x1000);
894 else
895 snd_soc_update_bits(codec,
896 RT286_I2S_CTRL1, 0x1000, 0x0);
897
898
899 return 0;
900}
901
902static int rt286_set_bias_level(struct snd_soc_codec *codec,
903 enum snd_soc_bias_level level)
904{
905 switch (level) {
906 case SND_SOC_BIAS_PREPARE:
907 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
908 snd_soc_write(codec,
909 RT286_SET_AUDIO_POWER, AC_PWRST_D0);
910 snd_soc_update_bits(codec,
911 RT286_DC_GAIN, 0x200, 0x200);
912 }
913 break;
914
915 case SND_SOC_BIAS_ON:
916 mdelay(10);
917 break;
918
919 case SND_SOC_BIAS_STANDBY:
920 snd_soc_write(codec,
921 RT286_SET_AUDIO_POWER, AC_PWRST_D3);
922 snd_soc_update_bits(codec,
923 RT286_DC_GAIN, 0x200, 0x0);
924 break;
925
926 default:
927 break;
928 }
929 codec->dapm.bias_level = level;
930
931 return 0;
932}
933
934static irqreturn_t rt286_irq(int irq, void *data)
935{
936 struct rt286_priv *rt286 = data;
937 bool hp = false;
938 bool mic = false;
939 int status = 0;
940
941 rt286_jack_detect(rt286, &hp, &mic);
942
943 /* Clear IRQ */
944 regmap_update_bits(rt286->regmap, RT286_IRQ_CTRL, 0x1, 0x1);
945
946 if (hp == true)
947 status |= SND_JACK_HEADPHONE;
948
949 if (mic == true)
950 status |= SND_JACK_MICROPHONE;
951
952 snd_soc_jack_report(rt286->jack, status,
953 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
954
955 pm_wakeup_event(&rt286->i2c->dev, 300);
956
957 return IRQ_HANDLED;
958}
959
960static int rt286_probe(struct snd_soc_codec *codec)
961{
962 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
963
964 codec->dapm.bias_level = SND_SOC_BIAS_OFF;
965
966 if (rt286->i2c->irq) {
967 regmap_update_bits(rt286->regmap,
968 RT286_IRQ_CTRL, 0x2, 0x2);
969
970 INIT_DELAYED_WORK(&rt286->jack_detect_work,
971 rt286_jack_detect_work);
972 schedule_delayed_work(&rt286->jack_detect_work,
973 msecs_to_jiffies(1250));
974 }
975
976 return 0;
977}
978
979static int rt286_remove(struct snd_soc_codec *codec)
980{
981 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
982
983 cancel_delayed_work_sync(&rt286->jack_detect_work);
984
985 return 0;
986}
987
988#ifdef CONFIG_PM
989static int rt286_suspend(struct snd_soc_codec *codec)
990{
991 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
992
993 regcache_cache_only(rt286->regmap, true);
994 regcache_mark_dirty(rt286->regmap);
995
996 return 0;
997}
998
999static int rt286_resume(struct snd_soc_codec *codec)
1000{
1001 struct rt286_priv *rt286 = snd_soc_codec_get_drvdata(codec);
1002
1003 regcache_cache_only(rt286->regmap, false);
1004 rt286_index_sync(codec);
1005 regcache_sync(rt286->regmap);
1006
1007 return 0;
1008}
1009#else
1010#define rt286_suspend NULL
1011#define rt286_resume NULL
1012#endif
1013
1014#define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1015#define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1016 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1017
1018static const struct snd_soc_dai_ops rt286_aif_dai_ops = {
1019 .hw_params = rt286_hw_params,
1020 .set_fmt = rt286_set_dai_fmt,
1021 .set_sysclk = rt286_set_dai_sysclk,
1022 .set_bclk_ratio = rt286_set_bclk_ratio,
1023};
1024
1025static struct snd_soc_dai_driver rt286_dai[] = {
1026 {
1027 .name = "rt286-aif1",
1028 .id = RT286_AIF1,
1029 .playback = {
1030 .stream_name = "AIF1 Playback",
1031 .channels_min = 1,
1032 .channels_max = 2,
1033 .rates = RT286_STEREO_RATES,
1034 .formats = RT286_FORMATS,
1035 },
1036 .capture = {
1037 .stream_name = "AIF1 Capture",
1038 .channels_min = 1,
1039 .channels_max = 2,
1040 .rates = RT286_STEREO_RATES,
1041 .formats = RT286_FORMATS,
1042 },
1043 .ops = &rt286_aif_dai_ops,
1044 .symmetric_rates = 1,
1045 },
1046 {
1047 .name = "rt286-aif2",
1048 .id = RT286_AIF2,
1049 .playback = {
1050 .stream_name = "AIF2 Playback",
1051 .channels_min = 1,
1052 .channels_max = 2,
1053 .rates = RT286_STEREO_RATES,
1054 .formats = RT286_FORMATS,
1055 },
1056 .capture = {
1057 .stream_name = "AIF2 Capture",
1058 .channels_min = 1,
1059 .channels_max = 2,
1060 .rates = RT286_STEREO_RATES,
1061 .formats = RT286_FORMATS,
1062 },
1063 .ops = &rt286_aif_dai_ops,
1064 .symmetric_rates = 1,
1065 },
1066
1067};
1068
1069static struct snd_soc_codec_driver soc_codec_dev_rt286 = {
1070 .probe = rt286_probe,
1071 .remove = rt286_remove,
1072 .suspend = rt286_suspend,
1073 .resume = rt286_resume,
1074 .set_bias_level = rt286_set_bias_level,
1075 .idle_bias_off = true,
1076 .controls = rt286_snd_controls,
1077 .num_controls = ARRAY_SIZE(rt286_snd_controls),
1078 .dapm_widgets = rt286_dapm_widgets,
1079 .num_dapm_widgets = ARRAY_SIZE(rt286_dapm_widgets),
1080 .dapm_routes = rt286_dapm_routes,
1081 .num_dapm_routes = ARRAY_SIZE(rt286_dapm_routes),
1082};
1083
1084static const struct regmap_config rt286_regmap = {
1085 .reg_bits = 32,
1086 .val_bits = 32,
1087 .max_register = 0x02370100,
1088 .volatile_reg = rt286_volatile_register,
1089 .readable_reg = rt286_readable_register,
1090 .reg_write = rt286_hw_write,
1091 .reg_read = rt286_hw_read,
1092 .cache_type = REGCACHE_RBTREE,
1093 .reg_defaults = rt286_reg,
1094 .num_reg_defaults = ARRAY_SIZE(rt286_reg),
1095};
1096
1097static const struct i2c_device_id rt286_i2c_id[] = {
1098 {"rt286", 0},
1099 {}
1100};
1101MODULE_DEVICE_TABLE(i2c, rt286_i2c_id);
1102
1103static const struct acpi_device_id rt286_acpi_match[] = {
1104 { "INT343A", 0 },
1105 {},
1106};
1107MODULE_DEVICE_TABLE(acpi, rt286_acpi_match);
1108
1109static int rt286_i2c_probe(struct i2c_client *i2c,
1110 const struct i2c_device_id *id)
1111{
1112 struct rt286_platform_data *pdata = dev_get_platdata(&i2c->dev);
1113 struct rt286_priv *rt286;
1114 int i, ret;
1115
1116 rt286 = devm_kzalloc(&i2c->dev, sizeof(*rt286),
1117 GFP_KERNEL);
1118 if (NULL == rt286)
1119 return -ENOMEM;
1120
1121 rt286->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt286_regmap);
1122 if (IS_ERR(rt286->regmap)) {
1123 ret = PTR_ERR(rt286->regmap);
1124 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1125 ret);
1126 return ret;
1127 }
1128
1129 regmap_read(rt286->regmap,
1130 RT286_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret);
1131 if (ret != RT286_VENDOR_ID) {
1132 dev_err(&i2c->dev,
1133 "Device with ID register %x is not rt286\n", ret);
1134 return -ENODEV;
1135 }
1136
1137 rt286->index_cache = rt286_index_def;
1138 rt286->i2c = i2c;
1139 i2c_set_clientdata(i2c, rt286);
1140
1141 if (pdata)
1142 rt286->pdata = *pdata;
1143
1144 regmap_write(rt286->regmap, RT286_SET_AUDIO_POWER, AC_PWRST_D3);
1145
1146 for (i = 0; i < RT286_POWER_REG_LEN; i++)
1147 regmap_write(rt286->regmap,
1148 RT286_SET_POWER(rt286_support_power_controls[i]),
1149 AC_PWRST_D1);
1150
1151 if (!rt286->pdata.cbj_en) {
1152 regmap_write(rt286->regmap, RT286_CBJ_CTRL2, 0x0000);
1153 regmap_write(rt286->regmap, RT286_MIC1_DET_CTRL, 0x0816);
1154 regmap_write(rt286->regmap, RT286_MISC_CTRL1, 0x0000);
1155 regmap_update_bits(rt286->regmap,
1156 RT286_CBJ_CTRL1, 0xf000, 0xb000);
1157 } else {
1158 regmap_update_bits(rt286->regmap,
1159 RT286_CBJ_CTRL1, 0xf000, 0x5000);
1160 }
1161
1162 mdelay(10);
1163
1164 if (!rt286->pdata.gpio2_en)
1165 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0x4000);
1166 else
1167 regmap_write(rt286->regmap, RT286_SET_DMIC2_DEFAULT, 0);
1168
1169 mdelay(10);
1170
1171 /*Power down LDO2*/
1172 regmap_update_bits(rt286->regmap, RT286_POWER_CTRL2, 0x8, 0x0);
1173
1174 /*Set depop parameter*/
1175 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL2, 0x403a, 0x401a);
1176 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL3, 0xf777, 0x4737);
1177 regmap_update_bits(rt286->regmap, RT286_DEPOP_CTRL4, 0x00ff, 0x003f);
1178
1179 if (rt286->i2c->irq) {
1180 ret = request_threaded_irq(rt286->i2c->irq, NULL, rt286_irq,
1181 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt286", rt286);
1182 if (ret != 0) {
1183 dev_err(&i2c->dev,
1184 "Failed to reguest IRQ: %d\n", ret);
1185 return ret;
1186 }
1187 }
1188
1189 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt286,
1190 rt286_dai, ARRAY_SIZE(rt286_dai));
1191
1192 return ret;
1193}
1194
1195static int rt286_i2c_remove(struct i2c_client *i2c)
1196{
1197 struct rt286_priv *rt286 = i2c_get_clientdata(i2c);
1198
1199 if (i2c->irq)
1200 free_irq(i2c->irq, rt286);
1201 snd_soc_unregister_codec(&i2c->dev);
1202
1203 return 0;
1204}
1205
1206
1207static struct i2c_driver rt286_i2c_driver = {
1208 .driver = {
1209 .name = "rt286",
1210 .owner = THIS_MODULE,
1211 .acpi_match_table = ACPI_PTR(rt286_acpi_match),
1212 },
1213 .probe = rt286_i2c_probe,
1214 .remove = rt286_i2c_remove,
1215 .id_table = rt286_i2c_id,
1216};
1217
1218module_i2c_driver(rt286_i2c_driver);
1219
1220MODULE_DESCRIPTION("ASoC RT286 driver");
1221MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1222MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-20 23:41:47 -0500