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Diffstat (limited to 'sound/soc/codecs/arizona.c')
-rw-r--r--sound/soc/codecs/arizona.c204
1 files changed, 130 insertions, 74 deletions
diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c
index fea991031be1..e4295fee8f13 100644
--- a/sound/soc/codecs/arizona.c
+++ b/sound/soc/codecs/arizona.c
@@ -93,7 +93,7 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
93 switch (event) { 93 switch (event) {
94 case SND_SOC_DAPM_PRE_PMU: 94 case SND_SOC_DAPM_PRE_PMU:
95 if (!priv->spk_ena && manual_ena) { 95 if (!priv->spk_ena && manual_ena) {
96 snd_soc_write(codec, 0x4f5, 0x25a); 96 regmap_write_async(arizona->regmap, 0x4f5, 0x25a);
97 priv->spk_ena_pending = true; 97 priv->spk_ena_pending = true;
98 } 98 }
99 break; 99 break;
@@ -105,12 +105,13 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
105 return -EBUSY; 105 return -EBUSY;
106 } 106 }
107 107
108 snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, 108 regmap_update_bits_async(arizona->regmap,
109 1 << w->shift, 1 << w->shift); 109 ARIZONA_OUTPUT_ENABLES_1,
110 1 << w->shift, 1 << w->shift);
110 111
111 if (priv->spk_ena_pending) { 112 if (priv->spk_ena_pending) {
112 msleep(75); 113 msleep(75);
113 snd_soc_write(codec, 0x4f5, 0xda); 114 regmap_write_async(arizona->regmap, 0x4f5, 0xda);
114 priv->spk_ena_pending = false; 115 priv->spk_ena_pending = false;
115 priv->spk_ena++; 116 priv->spk_ena++;
116 } 117 }
@@ -119,16 +120,19 @@ static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
119 if (manual_ena) { 120 if (manual_ena) {
120 priv->spk_ena--; 121 priv->spk_ena--;
121 if (!priv->spk_ena) 122 if (!priv->spk_ena)
122 snd_soc_write(codec, 0x4f5, 0x25a); 123 regmap_write_async(arizona->regmap,
124 0x4f5, 0x25a);
123 } 125 }
124 126
125 snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1, 127 regmap_update_bits_async(arizona->regmap,
126 1 << w->shift, 0); 128 ARIZONA_OUTPUT_ENABLES_1,
129 1 << w->shift, 0);
127 break; 130 break;
128 case SND_SOC_DAPM_POST_PMD: 131 case SND_SOC_DAPM_POST_PMD:
129 if (manual_ena) { 132 if (manual_ena) {
130 if (!priv->spk_ena) 133 if (!priv->spk_ena)
131 snd_soc_write(codec, 0x4f5, 0x0da); 134 regmap_write_async(arizona->regmap,
135 0x4f5, 0x0da);
132 } 136 }
133 break; 137 break;
134 } 138 }
@@ -292,6 +296,10 @@ const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
292 "AIF1RX8", 296 "AIF1RX8",
293 "AIF2RX1", 297 "AIF2RX1",
294 "AIF2RX2", 298 "AIF2RX2",
299 "AIF2RX3",
300 "AIF2RX4",
301 "AIF2RX5",
302 "AIF2RX6",
295 "AIF3RX1", 303 "AIF3RX1",
296 "AIF3RX2", 304 "AIF3RX2",
297 "SLIMRX1", 305 "SLIMRX1",
@@ -395,6 +403,10 @@ int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
395 0x27, 403 0x27,
396 0x28, /* AIF2RX1 */ 404 0x28, /* AIF2RX1 */
397 0x29, 405 0x29,
406 0x2a,
407 0x2b,
408 0x2c,
409 0x2d,
398 0x30, /* AIF3RX1 */ 410 0x30, /* AIF3RX1 */
399 0x31, 411 0x31,
400 0x38, /* SLIMRX1 */ 412 0x38, /* SLIMRX1 */
@@ -486,6 +498,22 @@ const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = {
486EXPORT_SYMBOL_GPL(arizona_rate_val); 498EXPORT_SYMBOL_GPL(arizona_rate_val);
487 499
488 500
501const struct soc_enum arizona_isrc_fsh[] = {
502 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1,
503 ARIZONA_ISRC1_FSH_SHIFT, 0xf,
504 ARIZONA_RATE_ENUM_SIZE,
505 arizona_rate_text, arizona_rate_val),
506 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_1,
507 ARIZONA_ISRC2_FSH_SHIFT, 0xf,
508 ARIZONA_RATE_ENUM_SIZE,
509 arizona_rate_text, arizona_rate_val),
510 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_1,
511 ARIZONA_ISRC3_FSH_SHIFT, 0xf,
512 ARIZONA_RATE_ENUM_SIZE,
513 arizona_rate_text, arizona_rate_val),
514};
515EXPORT_SYMBOL_GPL(arizona_isrc_fsh);
516
489const struct soc_enum arizona_isrc_fsl[] = { 517const struct soc_enum arizona_isrc_fsl[] = {
490 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2, 518 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2,
491 ARIZONA_ISRC1_FSL_SHIFT, 0xf, 519 ARIZONA_ISRC1_FSL_SHIFT, 0xf,
@@ -502,6 +530,13 @@ const struct soc_enum arizona_isrc_fsl[] = {
502}; 530};
503EXPORT_SYMBOL_GPL(arizona_isrc_fsl); 531EXPORT_SYMBOL_GPL(arizona_isrc_fsl);
504 532
533const struct soc_enum arizona_asrc_rate1 =
534 SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE1,
535 ARIZONA_ASRC_RATE1_SHIFT, 0xf,
536 ARIZONA_RATE_ENUM_SIZE - 1,
537 arizona_rate_text, arizona_rate_val);
538EXPORT_SYMBOL_GPL(arizona_asrc_rate1);
539
505static const char *arizona_vol_ramp_text[] = { 540static const char *arizona_vol_ramp_text[] = {
506 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB", 541 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
507 "15ms/6dB", "30ms/6dB", 542 "15ms/6dB", "30ms/6dB",
@@ -560,6 +595,16 @@ const struct soc_enum arizona_ng_hold =
560 4, arizona_ng_hold_text); 595 4, arizona_ng_hold_text);
561EXPORT_SYMBOL_GPL(arizona_ng_hold); 596EXPORT_SYMBOL_GPL(arizona_ng_hold);
562 597
598static const char * const arizona_in_hpf_cut_text[] = {
599 "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz"
600};
601
602const struct soc_enum arizona_in_hpf_cut_enum =
603 SOC_ENUM_SINGLE(ARIZONA_HPF_CONTROL, ARIZONA_IN_HPF_CUT_SHIFT,
604 ARRAY_SIZE(arizona_in_hpf_cut_text),
605 arizona_in_hpf_cut_text);
606EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum);
607
563static const char * const arizona_in_dmic_osr_text[] = { 608static const char * const arizona_in_dmic_osr_text[] = {
564 "1.536MHz", "3.072MHz", "6.144MHz", 609 "1.536MHz", "3.072MHz", "6.144MHz",
565}; 610};
@@ -669,6 +714,7 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w,
669 int event) 714 int event)
670{ 715{
671 struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec); 716 struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec);
717 struct arizona *arizona = priv->arizona;
672 unsigned int mask = 1 << w->shift; 718 unsigned int mask = 1 << w->shift;
673 unsigned int val; 719 unsigned int val;
674 720
@@ -691,7 +737,8 @@ int arizona_hp_ev(struct snd_soc_dapm_widget *w,
691 if (priv->arizona->hpdet_magic) 737 if (priv->arizona->hpdet_magic)
692 val = 0; 738 val = 0;
693 739
694 snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val); 740 regmap_update_bits_async(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1,
741 mask, val);
695 742
696 return arizona_out_ev(w, kcontrol, event); 743 return arizona_out_ev(w, kcontrol, event);
697} 744}
@@ -846,6 +893,8 @@ EXPORT_SYMBOL_GPL(arizona_set_sysclk);
846static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 893static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
847{ 894{
848 struct snd_soc_codec *codec = dai->codec; 895 struct snd_soc_codec *codec = dai->codec;
896 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
897 struct arizona *arizona = priv->arizona;
849 int lrclk, bclk, mode, base; 898 int lrclk, bclk, mode, base;
850 899
851 base = dai->driver->base; 900 base = dai->driver->base;
@@ -902,17 +951,19 @@ static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
902 return -EINVAL; 951 return -EINVAL;
903 } 952 }
904 953
905 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL, 954 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_BCLK_CTRL,
906 ARIZONA_AIF1_BCLK_INV | ARIZONA_AIF1_BCLK_MSTR, 955 ARIZONA_AIF1_BCLK_INV |
907 bclk); 956 ARIZONA_AIF1_BCLK_MSTR,
908 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_PIN_CTRL, 957 bclk);
909 ARIZONA_AIF1TX_LRCLK_INV | 958 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_TX_PIN_CTRL,
910 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk); 959 ARIZONA_AIF1TX_LRCLK_INV |
911 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_PIN_CTRL, 960 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
912 ARIZONA_AIF1RX_LRCLK_INV | 961 regmap_update_bits_async(arizona->regmap,
913 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk); 962 base + ARIZONA_AIF_RX_PIN_CTRL,
914 snd_soc_update_bits(codec, base + ARIZONA_AIF_FORMAT, 963 ARIZONA_AIF1RX_LRCLK_INV |
915 ARIZONA_AIF1_FMT_MASK, mode); 964 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
965 regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FORMAT,
966 ARIZONA_AIF1_FMT_MASK, mode);
916 967
917 return 0; 968 return 0;
918} 969}
@@ -1164,18 +1215,22 @@ static int arizona_hw_params(struct snd_pcm_substream *substream,
1164 if (ret != 0) 1215 if (ret != 0)
1165 return ret; 1216 return ret;
1166 1217
1167 snd_soc_update_bits(codec, base + ARIZONA_AIF_BCLK_CTRL, 1218 regmap_update_bits_async(arizona->regmap,
1168 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk); 1219 base + ARIZONA_AIF_BCLK_CTRL,
1169 snd_soc_update_bits(codec, base + ARIZONA_AIF_TX_BCLK_RATE, 1220 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
1170 ARIZONA_AIF1TX_BCPF_MASK, lrclk); 1221 regmap_update_bits_async(arizona->regmap,
1171 snd_soc_update_bits(codec, base + ARIZONA_AIF_RX_BCLK_RATE, 1222 base + ARIZONA_AIF_TX_BCLK_RATE,
1172 ARIZONA_AIF1RX_BCPF_MASK, lrclk); 1223 ARIZONA_AIF1TX_BCPF_MASK, lrclk);
1173 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_1, 1224 regmap_update_bits_async(arizona->regmap,
1174 ARIZONA_AIF1TX_WL_MASK | 1225 base + ARIZONA_AIF_RX_BCLK_RATE,
1175 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame); 1226 ARIZONA_AIF1RX_BCPF_MASK, lrclk);
1176 snd_soc_update_bits(codec, base + ARIZONA_AIF_FRAME_CTRL_2, 1227 regmap_update_bits_async(arizona->regmap,
1177 ARIZONA_AIF1RX_WL_MASK | 1228 base + ARIZONA_AIF_FRAME_CTRL_1,
1178 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame); 1229 ARIZONA_AIF1TX_WL_MASK |
1230 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
1231 regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FRAME_CTRL_2,
1232 ARIZONA_AIF1RX_WL_MASK |
1233 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
1179 1234
1180 return 0; 1235 return 0;
1181} 1236}
@@ -1428,31 +1483,31 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
1428 struct arizona_fll_cfg *cfg, int source, 1483 struct arizona_fll_cfg *cfg, int source,
1429 bool sync) 1484 bool sync)
1430{ 1485{
1431 regmap_update_bits(arizona->regmap, base + 3, 1486 regmap_update_bits_async(arizona->regmap, base + 3,
1432 ARIZONA_FLL1_THETA_MASK, cfg->theta); 1487 ARIZONA_FLL1_THETA_MASK, cfg->theta);
1433 regmap_update_bits(arizona->regmap, base + 4, 1488 regmap_update_bits_async(arizona->regmap, base + 4,
1434 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda); 1489 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
1435 regmap_update_bits(arizona->regmap, base + 5, 1490 regmap_update_bits_async(arizona->regmap, base + 5,
1436 ARIZONA_FLL1_FRATIO_MASK, 1491 ARIZONA_FLL1_FRATIO_MASK,
1437 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT); 1492 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
1438 regmap_update_bits(arizona->regmap, base + 6, 1493 regmap_update_bits_async(arizona->regmap, base + 6,
1439 ARIZONA_FLL1_CLK_REF_DIV_MASK | 1494 ARIZONA_FLL1_CLK_REF_DIV_MASK |
1440 ARIZONA_FLL1_CLK_REF_SRC_MASK, 1495 ARIZONA_FLL1_CLK_REF_SRC_MASK,
1441 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT | 1496 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
1442 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT); 1497 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
1443 1498
1444 if (sync) 1499 if (sync)
1445 regmap_update_bits(arizona->regmap, base + 0x7, 1500 regmap_update_bits_async(arizona->regmap, base + 0x7,
1446 ARIZONA_FLL1_GAIN_MASK, 1501 ARIZONA_FLL1_GAIN_MASK,
1447 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); 1502 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
1448 else 1503 else
1449 regmap_update_bits(arizona->regmap, base + 0x9, 1504 regmap_update_bits_async(arizona->regmap, base + 0x9,
1450 ARIZONA_FLL1_GAIN_MASK, 1505 ARIZONA_FLL1_GAIN_MASK,
1451 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT); 1506 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
1452 1507
1453 regmap_update_bits(arizona->regmap, base + 2, 1508 regmap_update_bits_async(arizona->regmap, base + 2,
1454 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK, 1509 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
1455 ARIZONA_FLL1_CTRL_UPD | cfg->n); 1510 ARIZONA_FLL1_CTRL_UPD | cfg->n);
1456} 1511}
1457 1512
1458static bool arizona_is_enabled_fll(struct arizona_fll *fll) 1513static bool arizona_is_enabled_fll(struct arizona_fll *fll)
@@ -1485,9 +1540,9 @@ static void arizona_enable_fll(struct arizona_fll *fll,
1485 */ 1540 */
1486 if (fll->ref_src >= 0 && fll->ref_freq && 1541 if (fll->ref_src >= 0 && fll->ref_freq &&
1487 fll->ref_src != fll->sync_src) { 1542 fll->ref_src != fll->sync_src) {
1488 regmap_update_bits(arizona->regmap, fll->base + 5, 1543 regmap_update_bits_async(arizona->regmap, fll->base + 5,
1489 ARIZONA_FLL1_OUTDIV_MASK, 1544 ARIZONA_FLL1_OUTDIV_MASK,
1490 ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); 1545 ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1491 1546
1492 arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, 1547 arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,
1493 false); 1548 false);
@@ -1497,15 +1552,15 @@ static void arizona_enable_fll(struct arizona_fll *fll,
1497 use_sync = true; 1552 use_sync = true;
1498 } 1553 }
1499 } else if (fll->sync_src >= 0) { 1554 } else if (fll->sync_src >= 0) {
1500 regmap_update_bits(arizona->regmap, fll->base + 5, 1555 regmap_update_bits_async(arizona->regmap, fll->base + 5,
1501 ARIZONA_FLL1_OUTDIV_MASK, 1556 ARIZONA_FLL1_OUTDIV_MASK,
1502 sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); 1557 sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
1503 1558
1504 arizona_apply_fll(arizona, fll->base, sync, 1559 arizona_apply_fll(arizona, fll->base, sync,
1505 fll->sync_src, false); 1560 fll->sync_src, false);
1506 1561
1507 regmap_update_bits(arizona->regmap, fll->base + 0x11, 1562 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
1508 ARIZONA_FLL1_SYNC_ENA, 0); 1563 ARIZONA_FLL1_SYNC_ENA, 0);
1509 } else { 1564 } else {
1510 arizona_fll_err(fll, "No clocks provided\n"); 1565 arizona_fll_err(fll, "No clocks provided\n");
1511 return; 1566 return;
@@ -1516,11 +1571,12 @@ static void arizona_enable_fll(struct arizona_fll *fll,
1516 * sync source. 1571 * sync source.
1517 */ 1572 */
1518 if (use_sync && fll->sync_freq > 100000) 1573 if (use_sync && fll->sync_freq > 100000)
1519 regmap_update_bits(arizona->regmap, fll->base + 0x17, 1574 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
1520 ARIZONA_FLL1_SYNC_BW, 0); 1575 ARIZONA_FLL1_SYNC_BW, 0);
1521 else 1576 else
1522 regmap_update_bits(arizona->regmap, fll->base + 0x17, 1577 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
1523 ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW); 1578 ARIZONA_FLL1_SYNC_BW,
1579 ARIZONA_FLL1_SYNC_BW);
1524 1580
1525 if (!arizona_is_enabled_fll(fll)) 1581 if (!arizona_is_enabled_fll(fll))
1526 pm_runtime_get(arizona->dev); 1582 pm_runtime_get(arizona->dev);
@@ -1528,14 +1584,14 @@ static void arizona_enable_fll(struct arizona_fll *fll,
1528 /* Clear any pending completions */ 1584 /* Clear any pending completions */
1529 try_wait_for_completion(&fll->ok); 1585 try_wait_for_completion(&fll->ok);
1530 1586
1531 regmap_update_bits(arizona->regmap, fll->base + 1, 1587 regmap_update_bits_async(arizona->regmap, fll->base + 1,
1532 ARIZONA_FLL1_FREERUN, 0); 1588 ARIZONA_FLL1_FREERUN, 0);
1533 regmap_update_bits(arizona->regmap, fll->base + 1, 1589 regmap_update_bits_async(arizona->regmap, fll->base + 1,
1534 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); 1590 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
1535 if (use_sync) 1591 if (use_sync)
1536 regmap_update_bits(arizona->regmap, fll->base + 0x11, 1592 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
1537 ARIZONA_FLL1_SYNC_ENA, 1593 ARIZONA_FLL1_SYNC_ENA,
1538 ARIZONA_FLL1_SYNC_ENA); 1594 ARIZONA_FLL1_SYNC_ENA);
1539 1595
1540 ret = wait_for_completion_timeout(&fll->ok, 1596 ret = wait_for_completion_timeout(&fll->ok,
1541 msecs_to_jiffies(250)); 1597 msecs_to_jiffies(250));
@@ -1548,8 +1604,8 @@ static void arizona_disable_fll(struct arizona_fll *fll)
1548 struct arizona *arizona = fll->arizona; 1604 struct arizona *arizona = fll->arizona;
1549 bool change; 1605 bool change;
1550 1606
1551 regmap_update_bits(arizona->regmap, fll->base + 1, 1607 regmap_update_bits_async(arizona->regmap, fll->base + 1,
1552 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN); 1608 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
1553 regmap_update_bits_check(arizona->regmap, fll->base + 1, 1609 regmap_update_bits_check(arizona->regmap, fll->base + 1,
1554 ARIZONA_FLL1_ENA, 0, &change); 1610 ARIZONA_FLL1_ENA, 0, &change);
1555 regmap_update_bits(arizona->regmap, fll->base + 0x11, 1611 regmap_update_bits(arizona->regmap, fll->base + 0x11,
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-20 08:59:12 -0500