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Diffstat (limited to 'sound/soc/codecs/alc5632.h')
-rw-r--r-- | sound/soc/codecs/alc5632.h | 251 |
1 files changed, 251 insertions, 0 deletions
diff --git a/sound/soc/codecs/alc5632.h b/sound/soc/codecs/alc5632.h new file mode 100644 index 000000000000..357651ec074e --- /dev/null +++ b/sound/soc/codecs/alc5632.h | |||
@@ -0,0 +1,251 @@ | |||
1 | /* | ||
2 | * alc5632.h -- ALC5632 ALSA SoC Audio Codec | ||
3 | * | ||
4 | * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net> | ||
5 | * | ||
6 | * Authors: Leon Romanovsky <leon@leon.nu> | ||
7 | * Andrey Danin <danindrey@mail.ru> | ||
8 | * Ilya Petrov <ilya.muromec@gmail.com> | ||
9 | * Marc Dietrich <marvin24@gmx.de> | ||
10 | * | ||
11 | * Based on alc5623.h by Arnaud Patard | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License version 2 as | ||
15 | * published by the Free Software Foundation. | ||
16 | */ | ||
17 | |||
18 | #ifndef _ALC5632_H | ||
19 | #define _ALC5632_H | ||
20 | |||
21 | #define ALC5632_RESET 0x00 | ||
22 | /* speaker output vol 2 2 */ | ||
23 | /* line output vol 4 2 */ | ||
24 | /* HP output vol 4 0 4 */ | ||
25 | #define ALC5632_SPK_OUT_VOL 0x02 /* spe out vol */ | ||
26 | #define ALC5632_SPK_OUT_VOL_STEP 1.5 | ||
27 | #define ALC5632_HP_OUT_VOL 0x04 /* hp out vol */ | ||
28 | #define ALC5632_AUX_OUT_VOL 0x06 /* aux out vol */ | ||
29 | #define ALC5632_PHONE_IN_VOL 0x08 /* phone in vol */ | ||
30 | #define ALC5632_LINE_IN_VOL 0x0A /* line in vol */ | ||
31 | #define ALC5632_STEREO_DAC_IN_VOL 0x0C /* stereo dac in vol */ | ||
32 | #define ALC5632_MIC_VOL 0x0E /* mic in vol */ | ||
33 | /* stero dac/mic routing */ | ||
34 | #define ALC5632_MIC_ROUTING_CTRL 0x10 | ||
35 | #define ALC5632_MIC_ROUTE_MONOMIX (1 << 0) | ||
36 | #define ALC5632_MIC_ROUTE_SPK (1 << 1) | ||
37 | #define ALC5632_MIC_ROUTE_HP (1 << 2) | ||
38 | |||
39 | #define ALC5632_ADC_REC_GAIN 0x12 /* rec gain */ | ||
40 | #define ALC5632_ADC_REC_GAIN_RANGE 0x1F1F | ||
41 | #define ALC5632_ADC_REC_GAIN_BASE (-16.5) | ||
42 | #define ALC5632_ADC_REC_GAIN_STEP 1.5 | ||
43 | |||
44 | #define ALC5632_ADC_REC_MIXER 0x14 /* mixer control */ | ||
45 | #define ALC5632_ADC_REC_MIC1 (1 << 6) | ||
46 | #define ALC5632_ADC_REC_MIC2 (1 << 5) | ||
47 | #define ALC5632_ADC_REC_LINE_IN (1 << 4) | ||
48 | #define ALC5632_ADC_REC_AUX (1 << 3) | ||
49 | #define ALC5632_ADC_REC_HP (1 << 2) | ||
50 | #define ALC5632_ADC_REC_SPK (1 << 1) | ||
51 | #define ALC5632_ADC_REC_MONOMIX (1 << 0) | ||
52 | |||
53 | #define ALC5632_VOICE_DAC_VOL 0x18 /* voice dac vol */ | ||
54 | /* ALC5632_OUTPUT_MIXER_CTRL : */ | ||
55 | /* same remark as for reg 2 line vs speaker */ | ||
56 | #define ALC5632_OUTPUT_MIXER_CTRL 0x1C /* out mix ctrl */ | ||
57 | #define ALC5632_OUTPUT_MIXER_RP (1 << 14) | ||
58 | #define ALC5632_OUTPUT_MIXER_WEEK (1 << 12) | ||
59 | #define ALC5632_OUTPUT_MIXER_HP (1 << 10) | ||
60 | #define ALC5632_OUTPUT_MIXER_AUX_SPK (2 << 6) | ||
61 | #define ALC5632_OUTPUT_MIXER_AUX_HP_LR (1 << 6) | ||
62 | #define ALC5632_OUTPUT_MIXER_HP_R (1 << 8) | ||
63 | #define ALC5632_OUTPUT_MIXER_HP_L (1 << 9) | ||
64 | |||
65 | #define ALC5632_MIC_CTRL 0x22 /* mic phone ctrl */ | ||
66 | #define ALC5632_MIC_BOOST_BYPASS 0 | ||
67 | #define ALC5632_MIC_BOOST_20DB 1 | ||
68 | #define ALC5632_MIC_BOOST_30DB 2 | ||
69 | #define ALC5632_MIC_BOOST_40DB 3 | ||
70 | |||
71 | #define ALC5632_DIGI_BOOST_CTRL 0x24 /* digi mic / bost ctl */ | ||
72 | #define ALC5632_MIC_BOOST_RANGE 7 | ||
73 | #define ALC5632_MIC_BOOST_STEP 6 | ||
74 | #define ALC5632_PWR_DOWN_CTRL_STATUS 0x26 | ||
75 | #define ALC5632_PWR_DOWN_CTRL_STATUS_MASK 0xEF00 | ||
76 | #define ALC5632_PWR_VREF_PR3 (1 << 11) | ||
77 | #define ALC5632_PWR_VREF_PR2 (1 << 10) | ||
78 | #define ALC5632_PWR_VREF_STATUS (1 << 3) | ||
79 | #define ALC5632_PWR_AMIX_STATUS (1 << 2) | ||
80 | #define ALC5632_PWR_DAC_STATUS (1 << 1) | ||
81 | #define ALC5632_PWR_ADC_STATUS (1 << 0) | ||
82 | /* stereo/voice DAC / stereo adc func ctrl */ | ||
83 | #define ALC5632_DAC_FUNC_SELECT 0x2E | ||
84 | |||
85 | /* Main serial data port ctrl (i2s) */ | ||
86 | #define ALC5632_DAI_CONTROL 0x34 | ||
87 | |||
88 | #define ALC5632_DAI_SDP_MASTER_MODE (0 << 15) | ||
89 | #define ALC5632_DAI_SDP_SLAVE_MODE (1 << 15) | ||
90 | #define ALC5632_DAI_SADLRCK_MODE (1 << 14) | ||
91 | /* 0:voice, 1:main */ | ||
92 | #define ALC5632_DAI_MAIN_I2S_SYSCLK_SEL (1 << 8) | ||
93 | #define ALC5632_DAI_MAIN_I2S_BCLK_POL_CTRL (1 << 7) | ||
94 | /* 0:normal, 1:invert */ | ||
95 | #define ALC5632_DAI_MAIN_I2S_LRCK_INV (1 << 6) | ||
96 | #define ALC5632_DAI_I2S_DL_MASK (3 << 2) | ||
97 | #define ALC5632_DAI_I2S_DL_8 (3 << 2) | ||
98 | #define ALC5632_DAI_I2S_DL_24 (2 << 2) | ||
99 | #define ALC5632_DAI_I2S_DL_20 (1 << 2) | ||
100 | #define ALC5632_DAI_I2S_DL_16 (0 << 2) | ||
101 | #define ALC5632_DAI_I2S_DF_MASK (3 << 0) | ||
102 | #define ALC5632_DAI_I2S_DF_PCM_B (3 << 0) | ||
103 | #define ALC5632_DAI_I2S_DF_PCM_A (2 << 0) | ||
104 | #define ALC5632_DAI_I2S_DF_LEFT (1 << 0) | ||
105 | #define ALC5632_DAI_I2S_DF_I2S (0 << 0) | ||
106 | /* extend serial data port control (VoDAC_i2c/pcm) */ | ||
107 | #define ALC5632_DAI_CONTROL2 0x36 | ||
108 | /* 0:gpio func, 1:voice pcm */ | ||
109 | #define ALC5632_DAI_VOICE_PCM_ENABLE (1 << 15) | ||
110 | /* 0:master, 1:slave */ | ||
111 | #define ALC5632_DAI_VOICE_MODE_SEL (1 << 14) | ||
112 | /* 0:disable, 1:enable */ | ||
113 | #define ALC5632_DAI_HPF_CLK_CTRL (1 << 13) | ||
114 | /* 0:main, 1:voice */ | ||
115 | #define ALC5632_DAI_VOICE_I2S_SYSCLK_SEL (1 << 8) | ||
116 | /* 0:normal, 1:invert */ | ||
117 | #define ALC5632_DAI_VOICE_VBCLK_SYSCLK_SEL (1 << 7) | ||
118 | /* 0:normal, 1:invert */ | ||
119 | #define ALC5632_DAI_VOICE_I2S_LR_INV (1 << 6) | ||
120 | #define ALC5632_DAI_VOICE_DL_MASK (3 << 2) | ||
121 | #define ALC5632_DAI_VOICE_DL_16 (0 << 2) | ||
122 | #define ALC5632_DAI_VOICE_DL_20 (1 << 2) | ||
123 | #define ALC5632_DAI_VOICE_DL_24 (2 << 2) | ||
124 | #define ALC5632_DAI_VOICE_DL_8 (3 << 2) | ||
125 | #define ALC5632_DAI_VOICE_DF_MASK (3 << 0) | ||
126 | #define ALC5632_DAI_VOICE_DF_I2S (0 << 0) | ||
127 | #define ALC5632_DAI_VOICE_DF_LEFT (1 << 0) | ||
128 | #define ALC5632_DAI_VOICE_DF_PCM_A (2 << 0) | ||
129 | #define ALC5632_DAI_VOICE_DF_PCM_B (3 << 0) | ||
130 | |||
131 | #define ALC5632_PWR_MANAG_ADD1 0x3A | ||
132 | #define ALC5632_PWR_MANAG_ADD1_MASK 0xEFFF | ||
133 | #define ALC5632_PWR_ADD1_DAC_L_EN (1 << 15) | ||
134 | #define ALC5632_PWR_ADD1_DAC_R_EN (1 << 14) | ||
135 | #define ALC5632_PWR_ADD1_ZERO_CROSS (1 << 13) | ||
136 | #define ALC5632_PWR_ADD1_MAIN_I2S_EN (1 << 11) | ||
137 | #define ALC5632_PWR_ADD1_SPK_AMP_EN (1 << 10) | ||
138 | #define ALC5632_PWR_ADD1_HP_OUT_AMP (1 << 9) | ||
139 | #define ALC5632_PWR_ADD1_HP_OUT_ENH_AMP (1 << 8) | ||
140 | #define ALC5632_PWR_ADD1_VOICE_DAC_MIX (1 << 7) | ||
141 | #define ALC5632_PWR_ADD1_SOFTGEN_EN (1 << 6) | ||
142 | #define ALC5632_PWR_ADD1_MIC1_SHORT_CURR (1 << 5) | ||
143 | #define ALC5632_PWR_ADD1_MIC2_SHORT_CURR (1 << 4) | ||
144 | #define ALC5632_PWR_ADD1_MIC1_EN (1 << 3) | ||
145 | #define ALC5632_PWR_ADD1_MIC2_EN (1 << 2) | ||
146 | #define ALC5632_PWR_ADD1_MAIN_BIAS (1 << 1) | ||
147 | #define ALC5632_PWR_ADD1_DAC_REF (1 << 0) | ||
148 | |||
149 | #define ALC5632_PWR_MANAG_ADD2 0x3C | ||
150 | #define ALC5632_PWR_MANAG_ADD2_MASK 0x7FFF | ||
151 | #define ALC5632_PWR_ADD2_PLL1 (1 << 15) | ||
152 | #define ALC5632_PWR_ADD2_PLL2 (1 << 14) | ||
153 | #define ALC5632_PWR_ADD2_VREF (1 << 13) | ||
154 | #define ALC5632_PWR_ADD2_OVT_DET (1 << 12) | ||
155 | #define ALC5632_PWR_ADD2_VOICE_DAC (1 << 10) | ||
156 | #define ALC5632_PWR_ADD2_L_DAC_CLK (1 << 9) | ||
157 | #define ALC5632_PWR_ADD2_R_DAC_CLK (1 << 8) | ||
158 | #define ALC5632_PWR_ADD2_L_ADC_CLK_GAIN (1 << 7) | ||
159 | #define ALC5632_PWR_ADD2_R_ADC_CLK_GAIN (1 << 6) | ||
160 | #define ALC5632_PWR_ADD2_L_HP_MIXER (1 << 5) | ||
161 | #define ALC5632_PWR_ADD2_R_HP_MIXER (1 << 4) | ||
162 | #define ALC5632_PWR_ADD2_SPK_MIXER (1 << 3) | ||
163 | #define ALC5632_PWR_ADD2_MONO_MIXER (1 << 2) | ||
164 | #define ALC5632_PWR_ADD2_L_ADC_REC_MIXER (1 << 1) | ||
165 | #define ALC5632_PWR_ADD2_R_ADC_REC_MIXER (1 << 0) | ||
166 | |||
167 | #define ALC5632_PWR_MANAG_ADD3 0x3E | ||
168 | #define ALC5632_PWR_MANAG_ADD3_MASK 0x7CFF | ||
169 | #define ALC5632_PWR_ADD3_AUXOUT_VOL (1 << 14) | ||
170 | #define ALC5632_PWR_ADD3_SPK_L_OUT (1 << 13) | ||
171 | #define ALC5632_PWR_ADD3_SPK_R_OUT (1 << 12) | ||
172 | #define ALC5632_PWR_ADD3_HP_L_OUT_VOL (1 << 11) | ||
173 | #define ALC5632_PWR_ADD3_HP_R_OUT_VOL (1 << 10) | ||
174 | #define ALC5632_PWR_ADD3_LINEIN_L_VOL (1 << 7) | ||
175 | #define ALC5632_PWR_ADD3_LINEIN_R_VOL (1 << 6) | ||
176 | #define ALC5632_PWR_ADD3_AUXIN_VOL (1 << 5) | ||
177 | #define ALC5632_PWR_ADD3_AUXIN_MIX (1 << 4) | ||
178 | #define ALC5632_PWR_ADD3_MIC1_VOL (1 << 3) | ||
179 | #define ALC5632_PWR_ADD3_MIC2_VOL (1 << 2) | ||
180 | #define ALC5632_PWR_ADD3_MIC1_BOOST_AD (1 << 1) | ||
181 | #define ALC5632_PWR_ADD3_MIC2_BOOST_AD (1 << 0) | ||
182 | |||
183 | #define ALC5632_GPCR1 0x40 | ||
184 | #define ALC5632_GPCR1_CLK_SYS_SRC_SEL_PLL1 (1 << 15) | ||
185 | #define ALC5632_GPCR1_CLK_SYS_SRC_SEL_MCLK (0 << 15) | ||
186 | #define ALC5632_GPCR1_DAC_HI_FLT_EN (1 << 10) | ||
187 | #define ALC5632_GPCR1_SPK_AMP_CTRL (7 << 1) | ||
188 | #define ALC5632_GPCR1_VDD_100 (5 << 1) | ||
189 | #define ALC5632_GPCR1_VDD_125 (4 << 1) | ||
190 | #define ALC5632_GPCR1_VDD_150 (3 << 1) | ||
191 | #define ALC5632_GPCR1_VDD_175 (2 << 1) | ||
192 | #define ALC5632_GPCR1_VDD_200 (1 << 1) | ||
193 | #define ALC5632_GPCR1_VDD_225 (0 << 1) | ||
194 | |||
195 | #define ALC5632_GPCR2 0x42 | ||
196 | #define ALC5632_GPCR2_PLL1_SOUR_SEL (3 << 12) | ||
197 | #define ALC5632_PLL_FR_MCLK (0 << 12) | ||
198 | #define ALC5632_PLL_FR_BCLK (2 << 12) | ||
199 | #define ALC5632_PLL_FR_VBCLK (3 << 12) | ||
200 | #define ALC5632_GPCR2_CLK_PLL_PRE_DIV1 (0 << 0) | ||
201 | |||
202 | #define ALC5632_PLL1_CTRL 0x44 | ||
203 | #define ALC5632_PLL1_CTRL_N_VAL(n) (((n) & 0x0f) << 8) | ||
204 | #define ALC5632_PLL1_M_BYPASS (1 << 7) | ||
205 | #define ALC5632_PLL1_CTRL_K_VAL(k) (((k) & 0x07) << 4) | ||
206 | #define ALC5632_PLL1_CTRL_M_VAL(m) (((m) & 0x0f) << 0) | ||
207 | |||
208 | #define ALC5632_PLL2_CTRL 0x46 | ||
209 | #define ALC5632_PLL2_EN (1 << 15) | ||
210 | #define ALC5632_PLL2_RATIO (0 << 15) | ||
211 | |||
212 | #define ALC5632_GPIO_PIN_CONFIG 0x4C | ||
213 | #define ALC5632_GPIO_PIN_POLARITY 0x4E | ||
214 | #define ALC5632_GPIO_PIN_STICKY 0x50 | ||
215 | #define ALC5632_GPIO_PIN_WAKEUP 0x52 | ||
216 | #define ALC5632_GPIO_PIN_STATUS 0x54 | ||
217 | #define ALC5632_GPIO_PIN_SHARING 0x56 | ||
218 | #define ALC5632_OVER_CURR_STATUS 0x58 | ||
219 | #define ALC5632_SOFTVOL_CTRL 0x5A | ||
220 | #define ALC5632_GPIO_OUPUT_PIN_CTRL 0x5C | ||
221 | |||
222 | #define ALC5632_MISC_CTRL 0x5E | ||
223 | #define ALC5632_MISC_DISABLE_FAST_VREG (1 << 15) | ||
224 | #define ALC5632_MISC_AVC_TRGT_SEL (3 << 12) | ||
225 | #define ALC5632_MISC_AVC_TRGT_RIGHT (1 << 12) | ||
226 | #define ALC5632_MISC_AVC_TRGT_LEFT (2 << 12) | ||
227 | #define ALC5632_MISC_AVC_TRGT_BOTH (3 << 12) | ||
228 | #define ALC5632_MISC_HP_DEPOP_MODE1_EN (1 << 9) | ||
229 | #define ALC5632_MISC_HP_DEPOP_MODE2_EN (1 << 8) | ||
230 | #define ALC5632_MISC_HP_DEPOP_MUTE_L (1 << 7) | ||
231 | #define ALC5632_MISC_HP_DEPOP_MUTE_R (1 << 6) | ||
232 | #define ALC5632_MISC_HP_DEPOP_MUTE (1 << 5) | ||
233 | #define ALC5632_MISC_GPIO_WAKEUP_CTRL (1 << 1) | ||
234 | #define ALC5632_MISC_IRQOUT_INV_CTRL (1 << 0) | ||
235 | |||
236 | #define ALC5632_DAC_CLK_CTRL1 0x60 | ||
237 | #define ALC5632_DAC_CLK_CTRL2 0x62 | ||
238 | #define ALC5632_DAC_CLK_CTRL2_DIV1_2 (1 << 0) | ||
239 | #define ALC5632_VOICE_DAC_PCM_CLK_CTRL1 0x64 | ||
240 | #define ALC5632_PSEUDO_SPATIAL_CTRL 0x68 | ||
241 | #define ALC5632_HID_CTRL_INDEX 0x6A | ||
242 | #define ALC5632_HID_CTRL_DATA 0x6C | ||
243 | #define ALC5632_EQ_CTRL 0x6E | ||
244 | |||
245 | /* undocumented */ | ||
246 | #define ALC5632_VENDOR_ID1 0x7C | ||
247 | #define ALC5632_VENDOR_ID2 0x7E | ||
248 | |||
249 | #define ALC5632_MAX_REGISTER 0x7E | ||
250 | |||
251 | #endif | ||