diff options
Diffstat (limited to 'sound/soc/codecs/alc5623.h')
| -rw-r--r-- | sound/soc/codecs/alc5623.h | 161 |
1 files changed, 161 insertions, 0 deletions
diff --git a/sound/soc/codecs/alc5623.h b/sound/soc/codecs/alc5623.h new file mode 100644 index 000000000000..f3d68260d425 --- /dev/null +++ b/sound/soc/codecs/alc5623.h | |||
| @@ -0,0 +1,161 @@ | |||
| 1 | /* | ||
| 2 | * alc5623.h -- alc562[123] ALSA Soc Audio driver | ||
| 3 | * | ||
| 4 | * Copyright 2008 Realtek Microelectronics | ||
| 5 | * Copyright 2010 Arnaud Patard <arnaud.patard@rtp-net.org> | ||
| 6 | * | ||
| 7 | * Author: flove <flove@realtek.com> | ||
| 8 | * Arnaud Patard <arnaud.patard@rtp-net.org> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | * | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef _ALC5623_H | ||
| 17 | #define _ALC5623_H | ||
| 18 | |||
| 19 | #define ALC5623_RESET 0x00 | ||
| 20 | /* 5621 5622 5623 */ | ||
| 21 | /* speaker output vol 2 2 */ | ||
| 22 | /* line output vol 4 2 */ | ||
| 23 | /* HP output vol 4 0 4 */ | ||
| 24 | #define ALC5623_SPK_OUT_VOL 0x02 | ||
| 25 | #define ALC5623_HP_OUT_VOL 0x04 | ||
| 26 | #define ALC5623_MONO_AUX_OUT_VOL 0x06 | ||
| 27 | #define ALC5623_AUXIN_VOL 0x08 | ||
| 28 | #define ALC5623_LINE_IN_VOL 0x0A | ||
| 29 | #define ALC5623_STEREO_DAC_VOL 0x0C | ||
| 30 | #define ALC5623_MIC_VOL 0x0E | ||
| 31 | #define ALC5623_MIC_ROUTING_CTRL 0x10 | ||
| 32 | #define ALC5623_ADC_REC_GAIN 0x12 | ||
| 33 | #define ALC5623_ADC_REC_MIXER 0x14 | ||
| 34 | #define ALC5623_SOFT_VOL_CTRL_TIME 0x16 | ||
| 35 | /* ALC5623_OUTPUT_MIXER_CTRL : */ | ||
| 36 | /* same remark as for reg 2 line vs speaker */ | ||
| 37 | #define ALC5623_OUTPUT_MIXER_CTRL 0x1C | ||
| 38 | #define ALC5623_MIC_CTRL 0x22 | ||
| 39 | |||
| 40 | #define ALC5623_DAI_CONTROL 0x34 | ||
| 41 | #define ALC5623_DAI_SDP_MASTER_MODE (0 << 15) | ||
| 42 | #define ALC5623_DAI_SDP_SLAVE_MODE (1 << 15) | ||
| 43 | #define ALC5623_DAI_I2S_PCM_MODE (1 << 14) | ||
| 44 | #define ALC5623_DAI_MAIN_I2S_BCLK_POL_CTRL (1 << 7) | ||
| 45 | #define ALC5623_DAI_ADC_DATA_L_R_SWAP (1 << 5) | ||
| 46 | #define ALC5623_DAI_DAC_DATA_L_R_SWAP (1 << 4) | ||
| 47 | #define ALC5623_DAI_I2S_DL_MASK (3 << 2) | ||
| 48 | #define ALC5623_DAI_I2S_DL_32 (3 << 2) | ||
| 49 | #define ALC5623_DAI_I2S_DL_24 (2 << 2) | ||
| 50 | #define ALC5623_DAI_I2S_DL_20 (1 << 2) | ||
| 51 | #define ALC5623_DAI_I2S_DL_16 (0 << 2) | ||
| 52 | #define ALC5623_DAI_I2S_DF_PCM (3 << 0) | ||
| 53 | #define ALC5623_DAI_I2S_DF_LEFT (2 << 0) | ||
| 54 | #define ALC5623_DAI_I2S_DF_RIGHT (1 << 0) | ||
| 55 | #define ALC5623_DAI_I2S_DF_I2S (0 << 0) | ||
| 56 | |||
| 57 | #define ALC5623_STEREO_AD_DA_CLK_CTRL 0x36 | ||
| 58 | #define ALC5623_COMPANDING_CTRL 0x38 | ||
| 59 | |||
| 60 | #define ALC5623_PWR_MANAG_ADD1 0x3A | ||
| 61 | #define ALC5623_PWR_ADD1_MAIN_I2S_EN (1 << 15) | ||
| 62 | #define ALC5623_PWR_ADD1_ZC_DET_PD_EN (1 << 14) | ||
| 63 | #define ALC5623_PWR_ADD1_MIC1_BIAS_EN (1 << 11) | ||
| 64 | #define ALC5623_PWR_ADD1_SHORT_CURR_DET_EN (1 << 10) | ||
| 65 | #define ALC5623_PWR_ADD1_SOFTGEN_EN (1 << 8) /* rsvd on 5622 */ | ||
| 66 | #define ALC5623_PWR_ADD1_DEPOP_BUF_HP (1 << 6) /* rsvd on 5622 */ | ||
| 67 | #define ALC5623_PWR_ADD1_HP_OUT_AMP (1 << 5) | ||
| 68 | #define ALC5623_PWR_ADD1_HP_OUT_ENH_AMP (1 << 4) /* rsvd on 5622 */ | ||
| 69 | #define ALC5623_PWR_ADD1_DEPOP_BUF_AUX (1 << 2) | ||
| 70 | #define ALC5623_PWR_ADD1_AUX_OUT_AMP (1 << 1) | ||
| 71 | #define ALC5623_PWR_ADD1_AUX_OUT_ENH_AMP (1 << 0) /* rsvd on 5622 */ | ||
| 72 | |||
| 73 | #define ALC5623_PWR_MANAG_ADD2 0x3C | ||
| 74 | #define ALC5623_PWR_ADD2_LINEOUT (1 << 15) /* rt5623 */ | ||
| 75 | #define ALC5623_PWR_ADD2_CLASS_AB (1 << 15) /* rt5621 */ | ||
| 76 | #define ALC5623_PWR_ADD2_CLASS_D (1 << 14) /* rt5621 */ | ||
| 77 | #define ALC5623_PWR_ADD2_VREF (1 << 13) | ||
| 78 | #define ALC5623_PWR_ADD2_PLL (1 << 12) | ||
| 79 | #define ALC5623_PWR_ADD2_DAC_REF_CIR (1 << 10) | ||
| 80 | #define ALC5623_PWR_ADD2_L_DAC_CLK (1 << 9) | ||
| 81 | #define ALC5623_PWR_ADD2_R_DAC_CLK (1 << 8) | ||
| 82 | #define ALC5623_PWR_ADD2_L_ADC_CLK_GAIN (1 << 7) | ||
| 83 | #define ALC5623_PWR_ADD2_R_ADC_CLK_GAIN (1 << 6) | ||
| 84 | #define ALC5623_PWR_ADD2_L_HP_MIXER (1 << 5) | ||
| 85 | #define ALC5623_PWR_ADD2_R_HP_MIXER (1 << 4) | ||
| 86 | #define ALC5623_PWR_ADD2_SPK_MIXER (1 << 3) | ||
| 87 | #define ALC5623_PWR_ADD2_MONO_MIXER (1 << 2) | ||
| 88 | #define ALC5623_PWR_ADD2_L_ADC_REC_MIXER (1 << 1) | ||
| 89 | #define ALC5623_PWR_ADD2_R_ADC_REC_MIXER (1 << 0) | ||
| 90 | |||
| 91 | #define ALC5623_PWR_MANAG_ADD3 0x3E | ||
| 92 | #define ALC5623_PWR_ADD3_MAIN_BIAS (1 << 15) | ||
| 93 | #define ALC5623_PWR_ADD3_AUXOUT_L_VOL_AMP (1 << 14) | ||
| 94 | #define ALC5623_PWR_ADD3_AUXOUT_R_VOL_AMP (1 << 13) | ||
| 95 | #define ALC5623_PWR_ADD3_SPK_OUT (1 << 12) | ||
| 96 | #define ALC5623_PWR_ADD3_HP_L_OUT_VOL (1 << 10) | ||
| 97 | #define ALC5623_PWR_ADD3_HP_R_OUT_VOL (1 << 9) | ||
| 98 | #define ALC5623_PWR_ADD3_LINEIN_L_VOL (1 << 7) | ||
| 99 | #define ALC5623_PWR_ADD3_LINEIN_R_VOL (1 << 6) | ||
| 100 | #define ALC5623_PWR_ADD3_AUXIN_L_VOL (1 << 5) | ||
| 101 | #define ALC5623_PWR_ADD3_AUXIN_R_VOL (1 << 4) | ||
| 102 | #define ALC5623_PWR_ADD3_MIC1_FUN_CTRL (1 << 3) | ||
| 103 | #define ALC5623_PWR_ADD3_MIC2_FUN_CTRL (1 << 2) | ||
| 104 | #define ALC5623_PWR_ADD3_MIC1_BOOST_AD (1 << 1) | ||
| 105 | #define ALC5623_PWR_ADD3_MIC2_BOOST_AD (1 << 0) | ||
| 106 | |||
| 107 | #define ALC5623_ADD_CTRL_REG 0x40 | ||
| 108 | |||
| 109 | #define ALC5623_GLOBAL_CLK_CTRL_REG 0x42 | ||
| 110 | #define ALC5623_GBL_CLK_SYS_SOUR_SEL_PLL (1 << 15) | ||
| 111 | #define ALC5623_GBL_CLK_SYS_SOUR_SEL_MCLK (0 << 15) | ||
| 112 | #define ALC5623_GBL_CLK_PLL_SOUR_SEL_BITCLK (1 << 14) | ||
| 113 | #define ALC5623_GBL_CLK_PLL_SOUR_SEL_MCLK (0 << 14) | ||
| 114 | #define ALC5623_GBL_CLK_PLL_DIV_RATIO_DIV8 (3 << 1) | ||
| 115 | #define ALC5623_GBL_CLK_PLL_DIV_RATIO_DIV4 (2 << 1) | ||
| 116 | #define ALC5623_GBL_CLK_PLL_DIV_RATIO_DIV2 (1 << 1) | ||
| 117 | #define ALC5623_GBL_CLK_PLL_DIV_RATIO_DIV1 (0 << 1) | ||
| 118 | #define ALC5623_GBL_CLK_PLL_PRE_DIV2 (1 << 0) | ||
| 119 | #define ALC5623_GBL_CLK_PLL_PRE_DIV1 (0 << 0) | ||
| 120 | |||
| 121 | #define ALC5623_PLL_CTRL 0x44 | ||
| 122 | #define ALC5623_PLL_CTRL_N_VAL(n) (((n)&0xff) << 8) | ||
| 123 | #define ALC5623_PLL_CTRL_K_VAL(k) (((k)&0x7) << 4) | ||
| 124 | #define ALC5623_PLL_CTRL_M_VAL(m) ((m)&0xf) | ||
| 125 | |||
| 126 | #define ALC5623_GPIO_OUTPUT_PIN_CTRL 0x4A | ||
| 127 | #define ALC5623_GPIO_PIN_CONFIG 0x4C | ||
| 128 | #define ALC5623_GPIO_PIN_POLARITY 0x4E | ||
| 129 | #define ALC5623_GPIO_PIN_STICKY 0x50 | ||
| 130 | #define ALC5623_GPIO_PIN_WAKEUP 0x52 | ||
| 131 | #define ALC5623_GPIO_PIN_STATUS 0x54 | ||
| 132 | #define ALC5623_GPIO_PIN_SHARING 0x56 | ||
| 133 | #define ALC5623_OVER_CURR_STATUS 0x58 | ||
| 134 | #define ALC5623_JACK_DET_CTRL 0x5A | ||
| 135 | |||
| 136 | #define ALC5623_MISC_CTRL 0x5E | ||
| 137 | #define ALC5623_MISC_DISABLE_FAST_VREG (1 << 15) | ||
| 138 | #define ALC5623_MISC_SPK_CLASS_AB_OC_PD (1 << 13) /* 5621 */ | ||
| 139 | #define ALC5623_MISC_SPK_CLASS_AB_OC_DET (1 << 12) /* 5621 */ | ||
| 140 | #define ALC5623_MISC_HP_DEPOP_MODE3_EN (1 << 10) | ||
| 141 | #define ALC5623_MISC_HP_DEPOP_MODE2_EN (1 << 9) | ||
| 142 | #define ALC5623_MISC_HP_DEPOP_MODE1_EN (1 << 8) | ||
| 143 | #define ALC5623_MISC_AUXOUT_DEPOP_MODE3_EN (1 << 6) | ||
| 144 | #define ALC5623_MISC_AUXOUT_DEPOP_MODE2_EN (1 << 5) | ||
| 145 | #define ALC5623_MISC_AUXOUT_DEPOP_MODE1_EN (1 << 4) | ||
| 146 | #define ALC5623_MISC_M_DAC_L_INPUT (1 << 3) | ||
| 147 | #define ALC5623_MISC_M_DAC_R_INPUT (1 << 2) | ||
| 148 | #define ALC5623_MISC_IRQOUT_INV_CTRL (1 << 0) | ||
| 149 | |||
| 150 | #define ALC5623_PSEDUEO_SPATIAL_CTRL 0x60 | ||
| 151 | #define ALC5623_EQ_CTRL 0x62 | ||
| 152 | #define ALC5623_EQ_MODE_ENABLE 0x66 | ||
| 153 | #define ALC5623_AVC_CTRL 0x68 | ||
| 154 | #define ALC5623_HID_CTRL_INDEX 0x6A | ||
| 155 | #define ALC5623_HID_CTRL_DATA 0x6C | ||
| 156 | #define ALC5623_VENDOR_ID1 0x7C | ||
| 157 | #define ALC5623_VENDOR_ID2 0x7E | ||
| 158 | |||
| 159 | #define ALC5623_PLL_FR_MCLK 0 | ||
| 160 | #define ALC5623_PLL_FR_BCK 1 | ||
| 161 | #endif | ||