diff options
Diffstat (limited to 'sound/soc/codecs/adau1701.c')
-rw-r--r-- | sound/soc/codecs/adau1701.c | 298 |
1 files changed, 232 insertions, 66 deletions
diff --git a/sound/soc/codecs/adau1701.c b/sound/soc/codecs/adau1701.c index b6b1a773bd37..d1124a5b3471 100644 --- a/sound/soc/codecs/adau1701.c +++ b/sound/soc/codecs/adau1701.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/of.h> | 16 | #include <linux/of.h> |
17 | #include <linux/of_gpio.h> | 17 | #include <linux/of_gpio.h> |
18 | #include <linux/of_device.h> | 18 | #include <linux/of_device.h> |
19 | #include <linux/regmap.h> | ||
19 | #include <sound/core.h> | 20 | #include <sound/core.h> |
20 | #include <sound/pcm.h> | 21 | #include <sound/pcm.h> |
21 | #include <sound/pcm_params.h> | 22 | #include <sound/pcm_params.h> |
@@ -24,16 +25,19 @@ | |||
24 | #include "sigmadsp.h" | 25 | #include "sigmadsp.h" |
25 | #include "adau1701.h" | 26 | #include "adau1701.h" |
26 | 27 | ||
27 | #define ADAU1701_DSPCTRL 0x1c | 28 | #define ADAU1701_DSPCTRL 0x081c |
28 | #define ADAU1701_SEROCTL 0x1e | 29 | #define ADAU1701_SEROCTL 0x081e |
29 | #define ADAU1701_SERICTL 0x1f | 30 | #define ADAU1701_SERICTL 0x081f |
30 | 31 | ||
31 | #define ADAU1701_AUXNPOW 0x22 | 32 | #define ADAU1701_AUXNPOW 0x0822 |
33 | #define ADAU1701_PINCONF_0 0x0820 | ||
34 | #define ADAU1701_PINCONF_1 0x0821 | ||
35 | #define ADAU1701_AUXNPOW 0x0822 | ||
32 | 36 | ||
33 | #define ADAU1701_OSCIPOW 0x26 | 37 | #define ADAU1701_OSCIPOW 0x0826 |
34 | #define ADAU1701_DACSET 0x27 | 38 | #define ADAU1701_DACSET 0x0827 |
35 | 39 | ||
36 | #define ADAU1701_NUM_REGS 0x28 | 40 | #define ADAU1701_MAX_REGISTER 0x0828 |
37 | 41 | ||
38 | #define ADAU1701_DSPCTRL_CR (1 << 2) | 42 | #define ADAU1701_DSPCTRL_CR (1 << 2) |
39 | #define ADAU1701_DSPCTRL_DAM (1 << 3) | 43 | #define ADAU1701_DSPCTRL_DAM (1 << 3) |
@@ -87,11 +91,18 @@ | |||
87 | #define ADAU1701_OSCIPOW_OPD 0x04 | 91 | #define ADAU1701_OSCIPOW_OPD 0x04 |
88 | #define ADAU1701_DACSET_DACINIT 1 | 92 | #define ADAU1701_DACSET_DACINIT 1 |
89 | 93 | ||
94 | #define ADAU1707_CLKDIV_UNSET (-1UL) | ||
95 | |||
90 | #define ADAU1701_FIRMWARE "adau1701.bin" | 96 | #define ADAU1701_FIRMWARE "adau1701.bin" |
91 | 97 | ||
92 | struct adau1701 { | 98 | struct adau1701 { |
93 | int gpio_nreset; | 99 | int gpio_nreset; |
100 | int gpio_pll_mode[2]; | ||
94 | unsigned int dai_fmt; | 101 | unsigned int dai_fmt; |
102 | unsigned int pll_clkdiv; | ||
103 | unsigned int sysclk; | ||
104 | struct regmap *regmap; | ||
105 | u8 pin_config[12]; | ||
95 | }; | 106 | }; |
96 | 107 | ||
97 | static const struct snd_kcontrol_new adau1701_controls[] = { | 108 | static const struct snd_kcontrol_new adau1701_controls[] = { |
@@ -123,10 +134,13 @@ static const struct snd_soc_dapm_route adau1701_dapm_routes[] = { | |||
123 | { "ADC", NULL, "IN1" }, | 134 | { "ADC", NULL, "IN1" }, |
124 | }; | 135 | }; |
125 | 136 | ||
126 | static unsigned int adau1701_register_size(struct snd_soc_codec *codec, | 137 | static unsigned int adau1701_register_size(struct device *dev, |
127 | unsigned int reg) | 138 | unsigned int reg) |
128 | { | 139 | { |
129 | switch (reg) { | 140 | switch (reg) { |
141 | case ADAU1701_PINCONF_0: | ||
142 | case ADAU1701_PINCONF_1: | ||
143 | return 3; | ||
130 | case ADAU1701_DSPCTRL: | 144 | case ADAU1701_DSPCTRL: |
131 | case ADAU1701_SEROCTL: | 145 | case ADAU1701_SEROCTL: |
132 | case ADAU1701_AUXNPOW: | 146 | case ADAU1701_AUXNPOW: |
@@ -137,33 +151,42 @@ static unsigned int adau1701_register_size(struct snd_soc_codec *codec, | |||
137 | return 1; | 151 | return 1; |
138 | } | 152 | } |
139 | 153 | ||
140 | dev_err(codec->dev, "Unsupported register address: %d\n", reg); | 154 | dev_err(dev, "Unsupported register address: %d\n", reg); |
141 | return 0; | 155 | return 0; |
142 | } | 156 | } |
143 | 157 | ||
144 | static int adau1701_write(struct snd_soc_codec *codec, unsigned int reg, | 158 | static bool adau1701_volatile_reg(struct device *dev, unsigned int reg) |
145 | unsigned int value) | ||
146 | { | 159 | { |
160 | switch (reg) { | ||
161 | case ADAU1701_DACSET: | ||
162 | return true; | ||
163 | default: | ||
164 | return false; | ||
165 | } | ||
166 | } | ||
167 | |||
168 | static int adau1701_reg_write(void *context, unsigned int reg, | ||
169 | unsigned int value) | ||
170 | { | ||
171 | struct i2c_client *client = context; | ||
147 | unsigned int i; | 172 | unsigned int i; |
148 | unsigned int size; | 173 | unsigned int size; |
149 | uint8_t buf[4]; | 174 | uint8_t buf[5]; |
150 | int ret; | 175 | int ret; |
151 | 176 | ||
152 | size = adau1701_register_size(codec, reg); | 177 | size = adau1701_register_size(&client->dev, reg); |
153 | if (size == 0) | 178 | if (size == 0) |
154 | return -EINVAL; | 179 | return -EINVAL; |
155 | 180 | ||
156 | snd_soc_cache_write(codec, reg, value); | 181 | buf[0] = reg >> 8; |
157 | 182 | buf[1] = reg & 0xff; | |
158 | buf[0] = 0x08; | ||
159 | buf[1] = reg; | ||
160 | 183 | ||
161 | for (i = size + 1; i >= 2; --i) { | 184 | for (i = size + 1; i >= 2; --i) { |
162 | buf[i] = value; | 185 | buf[i] = value; |
163 | value >>= 8; | 186 | value >>= 8; |
164 | } | 187 | } |
165 | 188 | ||
166 | ret = i2c_master_send(to_i2c_client(codec->dev), buf, size + 2); | 189 | ret = i2c_master_send(client, buf, size + 2); |
167 | if (ret == size + 2) | 190 | if (ret == size + 2) |
168 | return 0; | 191 | return 0; |
169 | else if (ret < 0) | 192 | else if (ret < 0) |
@@ -172,47 +195,105 @@ static int adau1701_write(struct snd_soc_codec *codec, unsigned int reg, | |||
172 | return -EIO; | 195 | return -EIO; |
173 | } | 196 | } |
174 | 197 | ||
175 | static unsigned int adau1701_read(struct snd_soc_codec *codec, unsigned int reg) | 198 | static int adau1701_reg_read(void *context, unsigned int reg, |
199 | unsigned int *value) | ||
176 | { | 200 | { |
177 | unsigned int value; | 201 | int ret; |
178 | unsigned int ret; | 202 | unsigned int i; |
203 | unsigned int size; | ||
204 | uint8_t send_buf[2], recv_buf[3]; | ||
205 | struct i2c_client *client = context; | ||
206 | struct i2c_msg msgs[2]; | ||
179 | 207 | ||
180 | ret = snd_soc_cache_read(codec, reg, &value); | 208 | size = adau1701_register_size(&client->dev, reg); |
181 | if (ret) | 209 | if (size == 0) |
182 | return ret; | 210 | return -EINVAL; |
183 | 211 | ||
184 | return value; | 212 | send_buf[0] = reg >> 8; |
185 | } | 213 | send_buf[1] = reg & 0xff; |
186 | 214 | ||
187 | static void adau1701_reset(struct snd_soc_codec *codec) | 215 | msgs[0].addr = client->addr; |
188 | { | 216 | msgs[0].len = sizeof(send_buf); |
189 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); | 217 | msgs[0].buf = send_buf; |
218 | msgs[0].flags = 0; | ||
190 | 219 | ||
191 | if (!gpio_is_valid(adau1701->gpio_nreset)) | 220 | msgs[1].addr = client->addr; |
192 | return; | 221 | msgs[1].len = size; |
222 | msgs[1].buf = recv_buf; | ||
223 | msgs[1].flags = I2C_M_RD; | ||
193 | 224 | ||
194 | gpio_set_value(adau1701->gpio_nreset, 0); | 225 | ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); |
195 | /* minimum reset time is 20ns */ | 226 | if (ret < 0) |
196 | udelay(1); | 227 | return ret; |
197 | gpio_set_value(adau1701->gpio_nreset, 1); | 228 | else if (ret != ARRAY_SIZE(msgs)) |
198 | /* power-up time may be as long as 85ms */ | 229 | return -EIO; |
199 | mdelay(85); | 230 | |
231 | *value = 0; | ||
232 | |||
233 | for (i = 0; i < size; i++) | ||
234 | *value |= recv_buf[i] << (i * 8); | ||
235 | |||
236 | return 0; | ||
200 | } | 237 | } |
201 | 238 | ||
202 | static int adau1701_init(struct snd_soc_codec *codec) | 239 | static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv) |
203 | { | 240 | { |
204 | int ret; | 241 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
205 | struct i2c_client *client = to_i2c_client(codec->dev); | 242 | struct i2c_client *client = to_i2c_client(codec->dev); |
243 | int ret; | ||
206 | 244 | ||
207 | adau1701_reset(codec); | 245 | if (clkdiv != ADAU1707_CLKDIV_UNSET && |
246 | gpio_is_valid(adau1701->gpio_pll_mode[0]) && | ||
247 | gpio_is_valid(adau1701->gpio_pll_mode[1])) { | ||
248 | switch (clkdiv) { | ||
249 | case 64: | ||
250 | gpio_set_value(adau1701->gpio_pll_mode[0], 0); | ||
251 | gpio_set_value(adau1701->gpio_pll_mode[1], 0); | ||
252 | break; | ||
253 | case 256: | ||
254 | gpio_set_value(adau1701->gpio_pll_mode[0], 0); | ||
255 | gpio_set_value(adau1701->gpio_pll_mode[1], 1); | ||
256 | break; | ||
257 | case 384: | ||
258 | gpio_set_value(adau1701->gpio_pll_mode[0], 1); | ||
259 | gpio_set_value(adau1701->gpio_pll_mode[1], 0); | ||
260 | break; | ||
261 | case 0: /* fallback */ | ||
262 | case 512: | ||
263 | gpio_set_value(adau1701->gpio_pll_mode[0], 1); | ||
264 | gpio_set_value(adau1701->gpio_pll_mode[1], 1); | ||
265 | break; | ||
266 | } | ||
267 | } | ||
208 | 268 | ||
209 | ret = process_sigma_firmware(client, ADAU1701_FIRMWARE); | 269 | adau1701->pll_clkdiv = clkdiv; |
210 | if (ret) { | 270 | |
211 | dev_warn(codec->dev, "Failed to load firmware\n"); | 271 | if (gpio_is_valid(adau1701->gpio_nreset)) { |
212 | return ret; | 272 | gpio_set_value(adau1701->gpio_nreset, 0); |
273 | /* minimum reset time is 20ns */ | ||
274 | udelay(1); | ||
275 | gpio_set_value(adau1701->gpio_nreset, 1); | ||
276 | /* power-up time may be as long as 85ms */ | ||
277 | mdelay(85); | ||
278 | } | ||
279 | |||
280 | /* | ||
281 | * Postpone the firmware download to a point in time when we | ||
282 | * know the correct PLL setup | ||
283 | */ | ||
284 | if (clkdiv != ADAU1707_CLKDIV_UNSET) { | ||
285 | ret = process_sigma_firmware(client, ADAU1701_FIRMWARE); | ||
286 | if (ret) { | ||
287 | dev_warn(codec->dev, "Failed to load firmware\n"); | ||
288 | return ret; | ||
289 | } | ||
213 | } | 290 | } |
214 | 291 | ||
215 | snd_soc_write(codec, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT); | 292 | regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT); |
293 | regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR); | ||
294 | |||
295 | regcache_mark_dirty(adau1701->regmap); | ||
296 | regcache_sync(adau1701->regmap); | ||
216 | 297 | ||
217 | return 0; | 298 | return 0; |
218 | } | 299 | } |
@@ -253,7 +334,7 @@ static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec, | |||
253 | mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK; | 334 | mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK; |
254 | } | 335 | } |
255 | 336 | ||
256 | snd_soc_update_bits(codec, ADAU1701_SEROCTL, mask, val); | 337 | regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val); |
257 | 338 | ||
258 | return 0; | 339 | return 0; |
259 | } | 340 | } |
@@ -281,7 +362,7 @@ static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec, | |||
281 | return -EINVAL; | 362 | return -EINVAL; |
282 | } | 363 | } |
283 | 364 | ||
284 | snd_soc_update_bits(codec, ADAU1701_SERICTL, | 365 | regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL, |
285 | ADAU1701_SERICTL_MODE_MASK, val); | 366 | ADAU1701_SERICTL_MODE_MASK, val); |
286 | 367 | ||
287 | return 0; | 368 | return 0; |
@@ -291,8 +372,22 @@ static int adau1701_hw_params(struct snd_pcm_substream *substream, | |||
291 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | 372 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) |
292 | { | 373 | { |
293 | struct snd_soc_codec *codec = dai->codec; | 374 | struct snd_soc_codec *codec = dai->codec; |
375 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); | ||
376 | unsigned int clkdiv = adau1701->sysclk / params_rate(params); | ||
294 | snd_pcm_format_t format; | 377 | snd_pcm_format_t format; |
295 | unsigned int val; | 378 | unsigned int val; |
379 | int ret; | ||
380 | |||
381 | /* | ||
382 | * If the mclk/lrclk ratio changes, the chip needs updated PLL | ||
383 | * mode GPIO settings, and a full reset cycle, including a new | ||
384 | * firmware upload. | ||
385 | */ | ||
386 | if (clkdiv != adau1701->pll_clkdiv) { | ||
387 | ret = adau1701_reset(codec, clkdiv); | ||
388 | if (ret < 0) | ||
389 | return ret; | ||
390 | } | ||
296 | 391 | ||
297 | switch (params_rate(params)) { | 392 | switch (params_rate(params)) { |
298 | case 192000: | 393 | case 192000: |
@@ -308,7 +403,7 @@ static int adau1701_hw_params(struct snd_pcm_substream *substream, | |||
308 | return -EINVAL; | 403 | return -EINVAL; |
309 | } | 404 | } |
310 | 405 | ||
311 | snd_soc_update_bits(codec, ADAU1701_DSPCTRL, | 406 | regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, |
312 | ADAU1701_DSPCTRL_SR_MASK, val); | 407 | ADAU1701_DSPCTRL_SR_MASK, val); |
313 | 408 | ||
314 | format = params_format(params); | 409 | format = params_format(params); |
@@ -384,8 +479,8 @@ static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
384 | 479 | ||
385 | adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; | 480 | adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
386 | 481 | ||
387 | snd_soc_write(codec, ADAU1701_SERICTL, serictl); | 482 | regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl); |
388 | snd_soc_update_bits(codec, ADAU1701_SEROCTL, | 483 | regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, |
389 | ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl); | 484 | ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl); |
390 | 485 | ||
391 | return 0; | 486 | return 0; |
@@ -395,6 +490,7 @@ static int adau1701_set_bias_level(struct snd_soc_codec *codec, | |||
395 | enum snd_soc_bias_level level) | 490 | enum snd_soc_bias_level level) |
396 | { | 491 | { |
397 | unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD; | 492 | unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD; |
493 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); | ||
398 | 494 | ||
399 | switch (level) { | 495 | switch (level) { |
400 | case SND_SOC_BIAS_ON: | 496 | case SND_SOC_BIAS_ON: |
@@ -403,11 +499,13 @@ static int adau1701_set_bias_level(struct snd_soc_codec *codec, | |||
403 | break; | 499 | break; |
404 | case SND_SOC_BIAS_STANDBY: | 500 | case SND_SOC_BIAS_STANDBY: |
405 | /* Enable VREF and VREF buffer */ | 501 | /* Enable VREF and VREF buffer */ |
406 | snd_soc_update_bits(codec, ADAU1701_AUXNPOW, mask, 0x00); | 502 | regmap_update_bits(adau1701->regmap, |
503 | ADAU1701_AUXNPOW, mask, 0x00); | ||
407 | break; | 504 | break; |
408 | case SND_SOC_BIAS_OFF: | 505 | case SND_SOC_BIAS_OFF: |
409 | /* Disable VREF and VREF buffer */ | 506 | /* Disable VREF and VREF buffer */ |
410 | snd_soc_update_bits(codec, ADAU1701_AUXNPOW, mask, mask); | 507 | regmap_update_bits(adau1701->regmap, |
508 | ADAU1701_AUXNPOW, mask, mask); | ||
411 | break; | 509 | break; |
412 | } | 510 | } |
413 | 511 | ||
@@ -419,6 +517,7 @@ static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute) | |||
419 | { | 517 | { |
420 | struct snd_soc_codec *codec = dai->codec; | 518 | struct snd_soc_codec *codec = dai->codec; |
421 | unsigned int mask = ADAU1701_DSPCTRL_DAM; | 519 | unsigned int mask = ADAU1701_DSPCTRL_DAM; |
520 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); | ||
422 | unsigned int val; | 521 | unsigned int val; |
423 | 522 | ||
424 | if (mute) | 523 | if (mute) |
@@ -426,7 +525,7 @@ static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute) | |||
426 | else | 525 | else |
427 | val = mask; | 526 | val = mask; |
428 | 527 | ||
429 | snd_soc_update_bits(codec, ADAU1701_DSPCTRL, mask, val); | 528 | regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val); |
430 | 529 | ||
431 | return 0; | 530 | return 0; |
432 | } | 531 | } |
@@ -435,6 +534,7 @@ static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id, | |||
435 | int source, unsigned int freq, int dir) | 534 | int source, unsigned int freq, int dir) |
436 | { | 535 | { |
437 | unsigned int val; | 536 | unsigned int val; |
537 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); | ||
438 | 538 | ||
439 | switch (clk_id) { | 539 | switch (clk_id) { |
440 | case ADAU1701_CLK_SRC_OSC: | 540 | case ADAU1701_CLK_SRC_OSC: |
@@ -447,7 +547,9 @@ static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id, | |||
447 | return -EINVAL; | 547 | return -EINVAL; |
448 | } | 548 | } |
449 | 549 | ||
450 | snd_soc_update_bits(codec, ADAU1701_OSCIPOW, ADAU1701_OSCIPOW_OPD, val); | 550 | regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW, |
551 | ADAU1701_OSCIPOW_OPD, val); | ||
552 | adau1701->sysclk = freq; | ||
451 | 553 | ||
452 | return 0; | 554 | return 0; |
453 | } | 555 | } |
@@ -494,15 +596,35 @@ MODULE_DEVICE_TABLE(of, adau1701_dt_ids); | |||
494 | 596 | ||
495 | static int adau1701_probe(struct snd_soc_codec *codec) | 597 | static int adau1701_probe(struct snd_soc_codec *codec) |
496 | { | 598 | { |
497 | int ret; | 599 | int i, ret; |
498 | 600 | unsigned int val; | |
499 | codec->control_data = to_i2c_client(codec->dev); | 601 | struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec); |
500 | 602 | ||
501 | ret = adau1701_init(codec); | 603 | /* |
502 | if (ret) | 604 | * Let the pll_clkdiv variable default to something that won't happen |
605 | * at runtime. That way, we can postpone the firmware download from | ||
606 | * adau1701_reset() to a point in time when we know the correct PLL | ||
607 | * mode parameters. | ||
608 | */ | ||
609 | adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET; | ||
610 | |||
611 | /* initalize with pre-configured pll mode settings */ | ||
612 | ret = adau1701_reset(codec, adau1701->pll_clkdiv); | ||
613 | if (ret < 0) | ||
503 | return ret; | 614 | return ret; |
504 | 615 | ||
505 | snd_soc_write(codec, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR); | 616 | /* set up pin config */ |
617 | val = 0; | ||
618 | for (i = 0; i < 6; i++) | ||
619 | val |= adau1701->pin_config[i] << (i * 4); | ||
620 | |||
621 | regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val); | ||
622 | |||
623 | val = 0; | ||
624 | for (i = 0; i < 6; i++) | ||
625 | val |= adau1701->pin_config[i + 6] << (i * 4); | ||
626 | |||
627 | regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val); | ||
506 | 628 | ||
507 | return 0; | 629 | return 0; |
508 | } | 630 | } |
@@ -512,9 +634,6 @@ static struct snd_soc_codec_driver adau1701_codec_drv = { | |||
512 | .set_bias_level = adau1701_set_bias_level, | 634 | .set_bias_level = adau1701_set_bias_level, |
513 | .idle_bias_off = true, | 635 | .idle_bias_off = true, |
514 | 636 | ||
515 | .reg_cache_size = ADAU1701_NUM_REGS, | ||
516 | .reg_word_size = sizeof(u16), | ||
517 | |||
518 | .controls = adau1701_controls, | 637 | .controls = adau1701_controls, |
519 | .num_controls = ARRAY_SIZE(adau1701_controls), | 638 | .num_controls = ARRAY_SIZE(adau1701_controls), |
520 | .dapm_widgets = adau1701_dapm_widgets, | 639 | .dapm_widgets = adau1701_dapm_widgets, |
@@ -522,28 +641,58 @@ static struct snd_soc_codec_driver adau1701_codec_drv = { | |||
522 | .dapm_routes = adau1701_dapm_routes, | 641 | .dapm_routes = adau1701_dapm_routes, |
523 | .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes), | 642 | .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes), |
524 | 643 | ||
525 | .write = adau1701_write, | ||
526 | .read = adau1701_read, | ||
527 | |||
528 | .set_sysclk = adau1701_set_sysclk, | 644 | .set_sysclk = adau1701_set_sysclk, |
529 | }; | 645 | }; |
530 | 646 | ||
647 | static const struct regmap_config adau1701_regmap = { | ||
648 | .reg_bits = 16, | ||
649 | .val_bits = 32, | ||
650 | .max_register = ADAU1701_MAX_REGISTER, | ||
651 | .cache_type = REGCACHE_RBTREE, | ||
652 | .volatile_reg = adau1701_volatile_reg, | ||
653 | .reg_write = adau1701_reg_write, | ||
654 | .reg_read = adau1701_reg_read, | ||
655 | }; | ||
656 | |||
531 | static int adau1701_i2c_probe(struct i2c_client *client, | 657 | static int adau1701_i2c_probe(struct i2c_client *client, |
532 | const struct i2c_device_id *id) | 658 | const struct i2c_device_id *id) |
533 | { | 659 | { |
534 | struct adau1701 *adau1701; | 660 | struct adau1701 *adau1701; |
535 | struct device *dev = &client->dev; | 661 | struct device *dev = &client->dev; |
536 | int gpio_nreset = -EINVAL; | 662 | int gpio_nreset = -EINVAL; |
663 | int gpio_pll_mode[2] = { -EINVAL, -EINVAL }; | ||
537 | int ret; | 664 | int ret; |
538 | 665 | ||
539 | adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL); | 666 | adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL); |
540 | if (!adau1701) | 667 | if (!adau1701) |
541 | return -ENOMEM; | 668 | return -ENOMEM; |
542 | 669 | ||
670 | adau1701->regmap = devm_regmap_init(dev, NULL, client, | ||
671 | &adau1701_regmap); | ||
672 | if (IS_ERR(adau1701->regmap)) | ||
673 | return PTR_ERR(adau1701->regmap); | ||
674 | |||
543 | if (dev->of_node) { | 675 | if (dev->of_node) { |
544 | gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0); | 676 | gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0); |
545 | if (gpio_nreset < 0 && gpio_nreset != -ENOENT) | 677 | if (gpio_nreset < 0 && gpio_nreset != -ENOENT) |
546 | return gpio_nreset; | 678 | return gpio_nreset; |
679 | |||
680 | gpio_pll_mode[0] = of_get_named_gpio(dev->of_node, | ||
681 | "adi,pll-mode-gpios", 0); | ||
682 | if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT) | ||
683 | return gpio_pll_mode[0]; | ||
684 | |||
685 | gpio_pll_mode[1] = of_get_named_gpio(dev->of_node, | ||
686 | "adi,pll-mode-gpios", 1); | ||
687 | if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT) | ||
688 | return gpio_pll_mode[1]; | ||
689 | |||
690 | of_property_read_u32(dev->of_node, "adi,pll-clkdiv", | ||
691 | &adau1701->pll_clkdiv); | ||
692 | |||
693 | of_property_read_u8_array(dev->of_node, "adi,pin-config", | ||
694 | adau1701->pin_config, | ||
695 | ARRAY_SIZE(adau1701->pin_config)); | ||
547 | } | 696 | } |
548 | 697 | ||
549 | if (gpio_is_valid(gpio_nreset)) { | 698 | if (gpio_is_valid(gpio_nreset)) { |
@@ -553,7 +702,24 @@ static int adau1701_i2c_probe(struct i2c_client *client, | |||
553 | return ret; | 702 | return ret; |
554 | } | 703 | } |
555 | 704 | ||
705 | if (gpio_is_valid(gpio_pll_mode[0]) && | ||
706 | gpio_is_valid(gpio_pll_mode[1])) { | ||
707 | ret = devm_gpio_request_one(dev, gpio_pll_mode[0], | ||
708 | GPIOF_OUT_INIT_LOW, | ||
709 | "ADAU1701 PLL mode 0"); | ||
710 | if (ret < 0) | ||
711 | return ret; | ||
712 | |||
713 | ret = devm_gpio_request_one(dev, gpio_pll_mode[1], | ||
714 | GPIOF_OUT_INIT_LOW, | ||
715 | "ADAU1701 PLL mode 1"); | ||
716 | if (ret < 0) | ||
717 | return ret; | ||
718 | } | ||
719 | |||
556 | adau1701->gpio_nreset = gpio_nreset; | 720 | adau1701->gpio_nreset = gpio_nreset; |
721 | adau1701->gpio_pll_mode[0] = gpio_pll_mode[0]; | ||
722 | adau1701->gpio_pll_mode[1] = gpio_pll_mode[1]; | ||
557 | 723 | ||
558 | i2c_set_clientdata(client, adau1701); | 724 | i2c_set_clientdata(client, adau1701); |
559 | ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv, | 725 | ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv, |