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-rw-r--r--sound/soc/au1x/dbdma2.c9
-rw-r--r--sound/soc/au1x/dma.c14
2 files changed, 0 insertions, 23 deletions
diff --git a/sound/soc/au1x/dbdma2.c b/sound/soc/au1x/dbdma2.c
index 3b4eafaf30d3..17a24d804734 100644
--- a/sound/soc/au1x/dbdma2.c
+++ b/sound/soc/au1x/dbdma2.c
@@ -65,19 +65,10 @@ struct au1xpsc_audio_dmadata {
65#define AU1XPSC_PERIOD_MIN_BYTES 1024 65#define AU1XPSC_PERIOD_MIN_BYTES 1024
66#define AU1XPSC_BUFFER_MIN_BYTES 65536 66#define AU1XPSC_BUFFER_MIN_BYTES 65536
67 67
68#define AU1XPSC_PCM_FMTS \
69 (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
70 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
71 SNDRV_PCM_FMTBIT_U16_LE | SNDRV_PCM_FMTBIT_U16_BE | \
72 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE | \
73 SNDRV_PCM_FMTBIT_U32_LE | SNDRV_PCM_FMTBIT_U32_BE | \
74 0)
75
76/* PCM hardware DMA capabilities - platform specific */ 68/* PCM hardware DMA capabilities - platform specific */
77static const struct snd_pcm_hardware au1xpsc_pcm_hardware = { 69static const struct snd_pcm_hardware au1xpsc_pcm_hardware = {
78 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | 70 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
79 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH, 71 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH,
80 .formats = AU1XPSC_PCM_FMTS,
81 .period_bytes_min = AU1XPSC_PERIOD_MIN_BYTES, 72 .period_bytes_min = AU1XPSC_PERIOD_MIN_BYTES,
82 .period_bytes_max = 4096 * 1024 - 1, 73 .period_bytes_max = 4096 * 1024 - 1,
83 .periods_min = 2, 74 .periods_min = 2,
diff --git a/sound/soc/au1x/dma.c b/sound/soc/au1x/dma.c
index befd1074f9bd..e920b60bf6c2 100644
--- a/sound/soc/au1x/dma.c
+++ b/sound/soc/au1x/dma.c
@@ -21,14 +21,6 @@
21 21
22#include "psc.h" 22#include "psc.h"
23 23
24#define ALCHEMY_PCM_FMTS \
25 (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
26 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
27 SNDRV_PCM_FMTBIT_U16_LE | SNDRV_PCM_FMTBIT_U16_BE | \
28 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE | \
29 SNDRV_PCM_FMTBIT_U32_LE | SNDRV_PCM_FMTBIT_U32_BE | \
30 0)
31
32struct pcm_period { 24struct pcm_period {
33 u32 start; 25 u32 start;
34 u32 relative_end; /* relative to start of buffer */ 26 u32 relative_end; /* relative to start of buffer */
@@ -171,12 +163,6 @@ static irqreturn_t au1000_dma_interrupt(int irq, void *ptr)
171static const struct snd_pcm_hardware alchemy_pcm_hardware = { 163static const struct snd_pcm_hardware alchemy_pcm_hardware = {
172 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | 164 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
173 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH, 165 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH,
174 .formats = ALCHEMY_PCM_FMTS,
175 .rates = SNDRV_PCM_RATE_8000_192000,
176 .rate_min = SNDRV_PCM_RATE_8000,
177 .rate_max = SNDRV_PCM_RATE_192000,
178 .channels_min = 2,
179 .channels_max = 2,
180 .period_bytes_min = 1024, 166 .period_bytes_min = 1024,
181 .period_bytes_max = 16 * 1024 - 1, 167 .period_bytes_max = 16 * 1024 - 1,
182 .periods_min = 4, 168 .periods_min = 4,