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1/*
2 * Driver for Sound Cors PDAudioCF soundcard
3 *
4 * Copyright (c) 2003 by Jaroslav Kysela <perex@suse.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __PDAUDIOCF_H
22#define __PDAUDIOCF_H
23
24#include <sound/pcm.h>
25#include <asm/io.h>
26#include <linux/interrupt.h>
27#include <pcmcia/cs_types.h>
28#include <pcmcia/cs.h>
29#include <pcmcia/cistpl.h>
30#include <pcmcia/ds.h>
31
32#include <sound/ak4117.h>
33
34/* PDAUDIOCF registers */
35#define PDAUDIOCF_REG_MD 0x00 /* music data, R/O */
36#define PDAUDIOCF_REG_WDP 0x02 /* write data pointer / 2, R/O */
37#define PDAUDIOCF_REG_RDP 0x04 /* read data pointer / 2, R/O */
38#define PDAUDIOCF_REG_TCR 0x06 /* test control register W/O */
39#define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */
40#define PDAUDIOCF_REG_ISR 0x0a /* interrupt status, R/O */
41#define PDAUDIOCF_REG_IER 0x0c /* interrupt enable, R/W */
42#define PDAUDIOCF_REG_AK_IFR 0x0e /* AK interface register, R/W */
43
44/* PDAUDIOCF_REG_TCR */
45#define PDAUDIOCF_ELIMAKMBIT (1<<0) /* simulate AKM music data */
46#define PDAUDIOCF_TESTDATASEL (1<<1) /* test data selection, 0 = 0x55, 1 = pseudo-random */
47
48/* PDAUDIOCF_REG_SCR */
49#define PDAUDIOCF_AK_SBP (1<<0) /* serial port busy flag */
50#define PDAUDIOCF_RST (1<<2) /* FPGA, AKM + SRAM buffer reset */
51#define PDAUDIOCF_PDN (1<<3) /* power down bit */
52#define PDAUDIOCF_CLKDIV0 (1<<4) /* choose 24.576Mhz clock divided by 1,2,3 or 4 */
53#define PDAUDIOCF_CLKDIV1 (1<<5)
54#define PDAUDIOCF_RECORD (1<<6) /* start capturing to SRAM */
55#define PDAUDIOCF_AK_SDD (1<<7) /* music data detected */
56#define PDAUDIOCF_RED_LED_OFF (1<<8) /* red LED off override */
57#define PDAUDIOCF_BLUE_LED_OFF (1<<9) /* blue LED off override */
58#define PDAUDIOCF_DATAFMT0 (1<<10) /* data format bits: 00 = 16-bit, 01 = 18-bit */
59#define PDAUDIOCF_DATAFMT1 (1<<11) /* 10 = 20-bit, 11 = 24-bit, all right justified */
60#define PDAUDIOCF_FPGAREV(x) ((x>>12)&0x0f) /* FPGA revision */
61
62/* PDAUDIOCF_REG_ISR */
63#define PDAUDIOCF_IRQLVL (1<<0) /* Buffer level IRQ */
64#define PDAUDIOCF_IRQOVR (1<<1) /* Overrun IRQ */
65#define PDAUDIOCF_IRQAKM (1<<2) /* AKM IRQ */
66
67/* PDAUDIOCF_REG_IER */
68#define PDAUDIOCF_IRQLVLEN0 (1<<0) /* fill threshold levels; 00 = none, 01 = 1/8th of buffer */
69#define PDAUDIOCF_IRQLVLEN1 (1<<1) /* 10 = 1/4th of buffer, 11 = 1/2th of buffer */
70#define PDAUDIOCF_IRQOVREN (1<<2) /* enable overrun IRQ */
71#define PDAUDIOCF_IRQAKMEN (1<<3) /* enable AKM IRQ */
72#define PDAUDIOCF_BLUEDUTY0 (1<<8) /* blue LED duty cycle; 00 = 100%, 01 = 50% */
73#define PDAUDIOCF_BLUEDUTY1 (1<<9) /* 02 = 25%, 11 = 12% */
74#define PDAUDIOCF_REDDUTY0 (1<<10) /* red LED duty cycle; 00 = 100%, 01 = 50% */
75#define PDAUDIOCF_REDDUTY1 (1<<11) /* 02 = 25%, 11 = 12% */
76#define PDAUDIOCF_BLUESDD (1<<12) /* blue LED against SDD bit */
77#define PDAUDIOCF_BLUEMODULATE (1<<13) /* save power when 100% duty cycle selected */
78#define PDAUDIOCF_REDMODULATE (1<<14) /* save power when 100% duty cycle selected */
79#define PDAUDIOCF_HALFRATE (1<<15) /* slow both LED blinks by half (also spdif detect rate) */
80
81/* chip status */
82#define PDAUDIOCF_STAT_IS_STALE (1<<0)
83#define PDAUDIOCF_STAT_IS_CONFIGURED (1<<1)
84#define PDAUDIOCF_STAT_IS_SUSPENDED (1<<2)
85
86typedef struct {
87 snd_card_t *card;
88 int index;
89
90 unsigned long port;
91 int irq;
92
93 spinlock_t reg_lock;
94 unsigned short regmap[8];
95 unsigned short suspend_reg_scr;
96 struct tasklet_struct tq;
97
98 spinlock_t ak4117_lock;
99 ak4117_t *ak4117;
100
101 unsigned int chip_status;
102
103 snd_pcm_t *pcm;
104 snd_pcm_substream_t *pcm_substream;
105 unsigned int pcm_running: 1;
106 unsigned int pcm_channels;
107 unsigned int pcm_swab;
108 unsigned int pcm_little;
109 unsigned int pcm_frame;
110 unsigned int pcm_sample;
111 unsigned int pcm_xor;
112 unsigned int pcm_size;
113 unsigned int pcm_period;
114 unsigned int pcm_tdone;
115 unsigned int pcm_hwptr;
116 void *pcm_area;
117
118 /* pcmcia stuff */
119 dev_link_t link;
120 dev_node_t node;
121} pdacf_t;
122
123static inline void pdacf_reg_write(pdacf_t *chip, unsigned char reg, unsigned short val)
124{
125 outw(chip->regmap[reg>>1] = val, chip->port + reg);
126}
127
128static inline unsigned short pdacf_reg_read(pdacf_t *chip, unsigned char reg)
129{
130 return inw(chip->port + reg);
131}
132
133pdacf_t *snd_pdacf_create(snd_card_t *card);
134int snd_pdacf_ak4117_create(pdacf_t *pdacf);
135void snd_pdacf_powerdown(pdacf_t *chip);
136#ifdef CONFIG_PM
137int snd_pdacf_suspend(snd_card_t *card, pm_message_t state);
138int snd_pdacf_resume(snd_card_t *card);
139#endif
140int snd_pdacf_pcm_new(pdacf_t *chip);
141irqreturn_t pdacf_interrupt(int irq, void *dev, struct pt_regs *regs);
142void pdacf_tasklet(unsigned long private_data);
143void pdacf_reinit(pdacf_t *chip, int resume);
144
145#endif /* __PDAUDIOCF_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-15 23:35:43 -0500