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-rw-r--r--sound/pci/ac97/ac97_codec.c2
-rw-r--r--sound/pci/ac97/ac97_pcm.c9
2 files changed, 11 insertions, 0 deletions
diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c
index 3b589104510b..9bde76c4c6a2 100644
--- a/sound/pci/ac97/ac97_codec.c
+++ b/sound/pci/ac97/ac97_codec.c
@@ -2046,6 +2046,8 @@ int snd_ac97_mixer(ac97_bus_t *bus, ac97_template_t *template, ac97_t **rac97)
2046 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, AC97_GP_DRSS_MASK, AC97_GP_DRSS_78); 2046 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, AC97_GP_DRSS_MASK, AC97_GP_DRSS_78);
2047 if ((snd_ac97_read(ac97, AC97_GENERAL_PURPOSE) & AC97_GP_DRSS_MASK) == AC97_GP_DRSS_78) 2047 if ((snd_ac97_read(ac97, AC97_GENERAL_PURPOSE) & AC97_GP_DRSS_MASK) == AC97_GP_DRSS_78)
2048 ac97->flags |= AC97_DOUBLE_RATE; 2048 ac97->flags |= AC97_DOUBLE_RATE;
2049 /* restore to slots 10/11 to avoid the confliction with surrounds */
2050 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, AC97_GP_DRSS_MASK, 0);
2049 } 2051 }
2050 if (ac97->ext_id & AC97_EI_VRA) { /* VRA support */ 2052 if (ac97->ext_id & AC97_EI_VRA) { /* VRA support */
2051 snd_ac97_determine_rates(ac97, AC97_PCM_FRONT_DAC_RATE, 0, &ac97->rates[AC97_RATES_FRONT_DAC]); 2053 snd_ac97_determine_rates(ac97, AC97_PCM_FRONT_DAC_RATE, 0, &ac97->rates[AC97_RATES_FRONT_DAC]);
diff --git a/sound/pci/ac97/ac97_pcm.c b/sound/pci/ac97/ac97_pcm.c
index dd289b9512e1..ded13165d635 100644
--- a/sound/pci/ac97/ac97_pcm.c
+++ b/sound/pci/ac97/ac97_pcm.c
@@ -303,6 +303,15 @@ int snd_ac97_set_rate(ac97_t *ac97, int reg, unsigned int rate)
303 AC97_EA_DRA, dbl ? AC97_EA_DRA : 0); 303 AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
304 snd_ac97_update(ac97, reg, tmp & 0xffff); 304 snd_ac97_update(ac97, reg, tmp & 0xffff);
305 snd_ac97_read(ac97, reg); 305 snd_ac97_read(ac97, reg);
306 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) {
307 /* Intel controllers require double rate data to be put in
308 * slots 7+8
309 */
310 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE,
311 AC97_GP_DRSS_MASK,
312 dbl ? AC97_GP_DRSS_78 : 0);
313 snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
314 }
306 return 0; 315 return 0;
307} 316}
308 317