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Diffstat (limited to 'sound/pci/via82xx.c')
-rw-r--r--sound/pci/via82xx.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/sound/pci/via82xx.c b/sound/pci/via82xx.c
index 42c48f0ce8e8..4889600387c8 100644
--- a/sound/pci/via82xx.c
+++ b/sound/pci/via82xx.c
@@ -547,8 +547,7 @@ static void snd_via82xx_codec_wait(ac97_t *ac97)
547 int err; 547 int err;
548 err = snd_via82xx_codec_ready(chip, ac97->num); 548 err = snd_via82xx_codec_ready(chip, ac97->num);
549 /* here we need to wait fairly for long time.. */ 549 /* here we need to wait fairly for long time.. */
550 set_current_state(TASK_UNINTERRUPTIBLE); 550 msleep(500);
551 schedule_timeout(HZ/2);
552} 551}
553 552
554static void snd_via82xx_codec_write(ac97_t *ac97, 553static void snd_via82xx_codec_write(ac97_t *ac97,
@@ -1847,7 +1846,7 @@ static void __devinit snd_via82xx_proc_init(via82xx_t *chip)
1847static int snd_via82xx_chip_init(via82xx_t *chip) 1846static int snd_via82xx_chip_init(via82xx_t *chip)
1848{ 1847{
1849 unsigned int val; 1848 unsigned int val;
1850 int max_count; 1849 unsigned long end_time;
1851 unsigned char pval; 1850 unsigned char pval;
1852 1851
1853#if 0 /* broken on K7M? */ 1852#if 0 /* broken on K7M? */
@@ -1889,14 +1888,14 @@ static int snd_via82xx_chip_init(via82xx_t *chip)
1889 } 1888 }
1890 1889
1891 /* wait until codec ready */ 1890 /* wait until codec ready */
1892 max_count = ((3 * HZ) / 4) + 1; 1891 end_time = jiffies + msecs_to_jiffies(750);
1893 do { 1892 do {
1894 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval); 1893 pci_read_config_byte(chip->pci, VIA_ACLINK_STAT, &pval);
1895 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */ 1894 if (pval & VIA_ACLINK_C00_READY) /* primary codec ready */
1896 break; 1895 break;
1897 set_current_state(TASK_UNINTERRUPTIBLE); 1896 set_current_state(TASK_UNINTERRUPTIBLE);
1898 schedule_timeout(1); 1897 schedule_timeout(1);
1899 } while (--max_count > 0); 1898 } while (time_before(jiffies, end_time));
1900 1899
1901 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY) 1900 if ((val = snd_via82xx_codec_xread(chip)) & VIA_REG_AC97_BUSY)
1902 snd_printk("AC'97 codec is not ready [0x%x]\n", val); 1901 snd_printk("AC'97 codec is not ready [0x%x]\n", val);
@@ -1905,7 +1904,7 @@ static int snd_via82xx_chip_init(via82xx_t *chip)
1905 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | 1904 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
1906 VIA_REG_AC97_SECONDARY_VALID | 1905 VIA_REG_AC97_SECONDARY_VALID |
1907 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); 1906 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
1908 max_count = ((3 * HZ) / 4) + 1; 1907 end_time = jiffies + msecs_to_jiffies(750);
1909 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ | 1908 snd_via82xx_codec_xwrite(chip, VIA_REG_AC97_READ |
1910 VIA_REG_AC97_SECONDARY_VALID | 1909 VIA_REG_AC97_SECONDARY_VALID |
1911 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT)); 1910 (VIA_REG_AC97_CODEC_ID_SECONDARY << VIA_REG_AC97_CODEC_ID_SHIFT));
@@ -1916,7 +1915,7 @@ static int snd_via82xx_chip_init(via82xx_t *chip)
1916 } 1915 }
1917 set_current_state(TASK_INTERRUPTIBLE); 1916 set_current_state(TASK_INTERRUPTIBLE);
1918 schedule_timeout(1); 1917 schedule_timeout(1);
1919 } while (--max_count > 0); 1918 } while (time_before(jiffies, end_time));
1920 /* This is ok, the most of motherboards have only one codec */ 1919 /* This is ok, the most of motherboards have only one codec */
1921 1920
1922 __ac97_ok2: 1921 __ac97_ok2:
@@ -2178,7 +2177,7 @@ static int __devinit check_dxs_list(struct pci_dev *pci)
2178 { .subvendor = 0x147b, .subdevice = 0x1413, .action = VIA_DXS_ENABLE }, /* ABIT KV8 Pro */ 2177 { .subvendor = 0x147b, .subdevice = 0x1413, .action = VIA_DXS_ENABLE }, /* ABIT KV8 Pro */
2179 { .subvendor = 0x147b, .subdevice = 0x1415, .action = VIA_DXS_NO_VRA }, /* Abit AV8 */ 2178 { .subvendor = 0x147b, .subdevice = 0x1415, .action = VIA_DXS_NO_VRA }, /* Abit AV8 */
2180 { .subvendor = 0x14ff, .subdevice = 0x0403, .action = VIA_DXS_ENABLE }, /* Twinhead mobo */ 2179 { .subvendor = 0x14ff, .subdevice = 0x0403, .action = VIA_DXS_ENABLE }, /* Twinhead mobo */
2181 { .subvendor = 0x14ff, .subdevice = 0x0408, .action = VIA_DXS_NO_VRA }, /* Twinhead mobo */ 2180 { .subvendor = 0x14ff, .subdevice = 0x0408, .action = VIA_DXS_SRC }, /* Twinhead laptop */
2182 { .subvendor = 0x1584, .subdevice = 0x8120, .action = VIA_DXS_ENABLE }, /* Gericom/Targa/Vobis/Uniwill laptop */ 2181 { .subvendor = 0x1584, .subdevice = 0x8120, .action = VIA_DXS_ENABLE }, /* Gericom/Targa/Vobis/Uniwill laptop */
2183 { .subvendor = 0x1584, .subdevice = 0x8123, .action = VIA_DXS_NO_VRA }, /* Uniwill (Targa Visionary XP-210) */ 2182 { .subvendor = 0x1584, .subdevice = 0x8123, .action = VIA_DXS_NO_VRA }, /* Uniwill (Targa Visionary XP-210) */
2184 { .subvendor = 0x161f, .subdevice = 0x202b, .action = VIA_DXS_NO_VRA }, /* Amira Note book */ 2183 { .subvendor = 0x161f, .subdevice = 0x202b, .action = VIA_DXS_NO_VRA }, /* Amira Note book */
@@ -2187,6 +2186,7 @@ static int __devinit check_dxs_list(struct pci_dev *pci)
2187 { .subvendor = 0x1695, .subdevice = 0x3005, .action = VIA_DXS_ENABLE }, /* EPoX EP-8K9A */ 2186 { .subvendor = 0x1695, .subdevice = 0x3005, .action = VIA_DXS_ENABLE }, /* EPoX EP-8K9A */
2188 { .subvendor = 0x1849, .subdevice = 0x3059, .action = VIA_DXS_NO_VRA }, /* ASRock K7VM2 */ 2187 { .subvendor = 0x1849, .subdevice = 0x3059, .action = VIA_DXS_NO_VRA }, /* ASRock K7VM2 */
2189 { .subvendor = 0x1919, .subdevice = 0x200a, .action = VIA_DXS_NO_VRA }, /* Soltek SL-K8Tpro-939 */ 2188 { .subvendor = 0x1919, .subdevice = 0x200a, .action = VIA_DXS_NO_VRA }, /* Soltek SL-K8Tpro-939 */
2189 { .subvendor = 0x4005, .subdevice = 0x4710, .action = VIA_DXS_SRC }, /* MSI K7T266 Pro2 (MS-6380 V2.0) BIOS 3.7 */
2190 { } /* terminator */ 2190 { } /* terminator */
2191 }; 2191 };
2192 struct dxs_whitelist *w; 2192 struct dxs_whitelist *w;