diff options
Diffstat (limited to 'sound/pci/ice1712/ice1712.h')
-rw-r--r-- | sound/pci/ice1712/ice1712.h | 52 |
1 files changed, 26 insertions, 26 deletions
diff --git a/sound/pci/ice1712/ice1712.h b/sound/pci/ice1712/ice1712.h index 762fbd7a7507..fdae6deba16b 100644 --- a/sound/pci/ice1712/ice1712.h +++ b/sound/pci/ice1712/ice1712.h | |||
@@ -20,7 +20,7 @@ | |||
20 | * along with this program; if not, write to the Free Software | 20 | * along with this program; if not, write to the Free Software |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include <sound/control.h> | 25 | #include <sound/control.h> |
26 | #include <sound/ac97_codec.h> | 26 | #include <sound/ac97_codec.h> |
@@ -112,7 +112,7 @@ | |||
112 | */ | 112 | */ |
113 | 113 | ||
114 | #define ICEDS(ice, x) ((ice)->dmapath_port + ICE1712_DS_##x) | 114 | #define ICEDS(ice, x) ((ice)->dmapath_port + ICE1712_DS_##x) |
115 | 115 | ||
116 | #define ICE1712_DS_INTMASK 0x00 /* word - interrupt mask */ | 116 | #define ICE1712_DS_INTMASK 0x00 /* word - interrupt mask */ |
117 | #define ICE1712_DS_INTSTAT 0x02 /* word - interrupt status */ | 117 | #define ICE1712_DS_INTSTAT 0x02 /* word - interrupt status */ |
118 | #define ICE1712_DS_DATA 0x04 /* dword - channel data */ | 118 | #define ICE1712_DS_DATA 0x04 /* dword - channel data */ |
@@ -121,7 +121,7 @@ | |||
121 | /* | 121 | /* |
122 | * Consumer section channel registers | 122 | * Consumer section channel registers |
123 | */ | 123 | */ |
124 | 124 | ||
125 | #define ICE1712_DSC_ADDR0 0x00 /* dword - base address 0 */ | 125 | #define ICE1712_DSC_ADDR0 0x00 /* dword - base address 0 */ |
126 | #define ICE1712_DSC_COUNT0 0x01 /* word - count 0 */ | 126 | #define ICE1712_DSC_COUNT0 0x01 /* word - count 0 */ |
127 | #define ICE1712_DSC_ADDR1 0x02 /* dword - base address 1 */ | 127 | #define ICE1712_DSC_ADDR1 0x02 /* dword - base address 1 */ |
@@ -138,7 +138,7 @@ | |||
138 | #define ICE1712_DSC_RATE 0x05 /* dword - rate */ | 138 | #define ICE1712_DSC_RATE 0x05 /* dword - rate */ |
139 | #define ICE1712_DSC_VOLUME 0x06 /* word - volume control */ | 139 | #define ICE1712_DSC_VOLUME 0x06 /* word - volume control */ |
140 | 140 | ||
141 | /* | 141 | /* |
142 | * Professional multi-track direct control registers | 142 | * Professional multi-track direct control registers |
143 | */ | 143 | */ |
144 | 144 | ||
@@ -214,7 +214,7 @@ | |||
214 | 214 | ||
215 | 215 | ||
216 | /* | 216 | /* |
217 | * | 217 | * |
218 | */ | 218 | */ |
219 | 219 | ||
220 | struct snd_ice1712; | 220 | struct snd_ice1712; |
@@ -253,12 +253,12 @@ enum { | |||
253 | ICE_EEP1_ADC_ID2, | 253 | ICE_EEP1_ADC_ID2, |
254 | ICE_EEP1_ADC_ID3 | 254 | ICE_EEP1_ADC_ID3 |
255 | }; | 255 | }; |
256 | 256 | ||
257 | #define ice_has_con_ac97(ice) (!((ice)->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) | 257 | #define ice_has_con_ac97(ice) (!((ice)->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) |
258 | 258 | ||
259 | 259 | ||
260 | struct snd_ak4xxx_private { | 260 | struct snd_ak4xxx_private { |
261 | unsigned int cif: 1; /* CIF mode */ | 261 | unsigned int cif:1; /* CIF mode */ |
262 | unsigned char caddr; /* C0 and C1 bits */ | 262 | unsigned char caddr; /* C0 and C1 bits */ |
263 | unsigned int data_mask; /* DATA gpio bit */ | 263 | unsigned int data_mask; /* DATA gpio bit */ |
264 | unsigned int clk_mask; /* CLK gpio bit */ | 264 | unsigned int clk_mask; /* CLK gpio bit */ |
@@ -306,11 +306,11 @@ struct snd_ice1712 { | |||
306 | struct snd_pcm *pcm; | 306 | struct snd_pcm *pcm; |
307 | struct snd_pcm *pcm_ds; | 307 | struct snd_pcm *pcm_ds; |
308 | struct snd_pcm *pcm_pro; | 308 | struct snd_pcm *pcm_pro; |
309 | struct snd_pcm_substream *playback_con_substream; | 309 | struct snd_pcm_substream *playback_con_substream; |
310 | struct snd_pcm_substream *playback_con_substream_ds[6]; | 310 | struct snd_pcm_substream *playback_con_substream_ds[6]; |
311 | struct snd_pcm_substream *capture_con_substream; | 311 | struct snd_pcm_substream *capture_con_substream; |
312 | struct snd_pcm_substream *playback_pro_substream; | 312 | struct snd_pcm_substream *playback_pro_substream; |
313 | struct snd_pcm_substream *capture_pro_substream; | 313 | struct snd_pcm_substream *capture_pro_substream; |
314 | unsigned int playback_pro_size; | 314 | unsigned int playback_pro_size; |
315 | unsigned int capture_pro_size; | 315 | unsigned int capture_pro_size; |
316 | unsigned int playback_con_virt_addr[6]; | 316 | unsigned int playback_con_virt_addr[6]; |
@@ -326,15 +326,15 @@ struct snd_ice1712 { | |||
326 | struct snd_ice1712_eeprom eeprom; | 326 | struct snd_ice1712_eeprom eeprom; |
327 | 327 | ||
328 | unsigned int pro_volumes[20]; | 328 | unsigned int pro_volumes[20]; |
329 | unsigned int omni: 1; /* Delta Omni I/O */ | 329 | unsigned int omni:1; /* Delta Omni I/O */ |
330 | unsigned int dxr_enable: 1; /* Terratec DXR enable for DMX6FIRE */ | 330 | unsigned int dxr_enable:1; /* Terratec DXR enable for DMX6FIRE */ |
331 | unsigned int vt1724: 1; | 331 | unsigned int vt1724:1; |
332 | unsigned int vt1720: 1; | 332 | unsigned int vt1720:1; |
333 | unsigned int has_spdif: 1; /* VT1720/4 - has SPDIF I/O */ | 333 | unsigned int has_spdif:1; /* VT1720/4 - has SPDIF I/O */ |
334 | unsigned int force_pdma4: 1; /* VT1720/4 - PDMA4 as non-spdif */ | 334 | unsigned int force_pdma4:1; /* VT1720/4 - PDMA4 as non-spdif */ |
335 | unsigned int force_rdma1: 1; /* VT1720/4 - RDMA1 as non-spdif */ | 335 | unsigned int force_rdma1:1; /* VT1720/4 - RDMA1 as non-spdif */ |
336 | unsigned int midi_output: 1; /* VT1720/4: MIDI output triggered */ | 336 | unsigned int midi_output:1; /* VT1720/4: MIDI output triggered */ |
337 | unsigned int midi_input: 1; /* VT1720/4: MIDI input triggered */ | 337 | unsigned int midi_input:1; /* VT1720/4: MIDI input triggered */ |
338 | unsigned int num_total_dacs; /* total DACs */ | 338 | unsigned int num_total_dacs; /* total DACs */ |
339 | unsigned int num_total_adcs; /* total ADCs */ | 339 | unsigned int num_total_adcs; /* total ADCs */ |
340 | unsigned int cur_rate; /* current rate */ | 340 | unsigned int cur_rate; /* current rate */ |
@@ -351,7 +351,7 @@ struct snd_ice1712 { | |||
351 | struct snd_i2c_bus *i2c; /* I2C bus */ | 351 | struct snd_i2c_bus *i2c; /* I2C bus */ |
352 | struct snd_i2c_device *cs8427; /* CS8427 I2C device */ | 352 | struct snd_i2c_device *cs8427; /* CS8427 I2C device */ |
353 | unsigned int cs8427_timeout; /* CS8427 reset timeout in HZ/100 */ | 353 | unsigned int cs8427_timeout; /* CS8427 reset timeout in HZ/100 */ |
354 | 354 | ||
355 | struct ice1712_gpio { | 355 | struct ice1712_gpio { |
356 | unsigned int direction; /* current direction bits */ | 356 | unsigned int direction; /* current direction bits */ |
357 | unsigned int write_mask; /* current mask bits */ | 357 | unsigned int write_mask; /* current mask bits */ |
@@ -455,7 +455,7 @@ static inline int snd_ice1712_gpio_read_bits(struct snd_ice1712 *ice, | |||
455 | { | 455 | { |
456 | ice->gpio.direction &= ~mask; | 456 | ice->gpio.direction &= ~mask; |
457 | snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); | 457 | snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); |
458 | return (snd_ice1712_gpio_read(ice) & mask); | 458 | return snd_ice1712_gpio_read(ice) & mask; |
459 | } | 459 | } |
460 | 460 | ||
461 | int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice); | 461 | int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice); |
@@ -467,13 +467,13 @@ int snd_ice1712_akm4xxx_build_controls(struct snd_ice1712 *ice); | |||
467 | 467 | ||
468 | int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr); | 468 | int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr); |
469 | 469 | ||
470 | static inline void snd_ice1712_write(struct snd_ice1712 * ice, u8 addr, u8 data) | 470 | static inline void snd_ice1712_write(struct snd_ice1712 *ice, u8 addr, u8 data) |
471 | { | 471 | { |
472 | outb(addr, ICEREG(ice, INDEX)); | 472 | outb(addr, ICEREG(ice, INDEX)); |
473 | outb(data, ICEREG(ice, DATA)); | 473 | outb(data, ICEREG(ice, DATA)); |
474 | } | 474 | } |
475 | 475 | ||
476 | static inline u8 snd_ice1712_read(struct snd_ice1712 * ice, u8 addr) | 476 | static inline u8 snd_ice1712_read(struct snd_ice1712 *ice, u8 addr) |
477 | { | 477 | { |
478 | outb(addr, ICEREG(ice, INDEX)); | 478 | outb(addr, ICEREG(ice, INDEX)); |
479 | return inb(ICEREG(ice, DATA)); | 479 | return inb(ICEREG(ice, DATA)); |
@@ -491,7 +491,7 @@ struct snd_ice1712_card_info { | |||
491 | char *driver; | 491 | char *driver; |
492 | int (*chip_init)(struct snd_ice1712 *); | 492 | int (*chip_init)(struct snd_ice1712 *); |
493 | int (*build_controls)(struct snd_ice1712 *); | 493 | int (*build_controls)(struct snd_ice1712 *); |
494 | unsigned int no_mpu401: 1; | 494 | unsigned int no_mpu401:1; |
495 | unsigned int mpu401_1_info_flags; | 495 | unsigned int mpu401_1_info_flags; |
496 | unsigned int mpu401_2_info_flags; | 496 | unsigned int mpu401_2_info_flags; |
497 | const char *mpu401_1_name; | 497 | const char *mpu401_1_name; |