1 files changed, 15 insertions, 6 deletions

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index fa4442e8e1a4..d3bd3e748067 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -121,8 +121,8 @@ module_param(power_save_controller, bool, 0644);
 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
 #endif
 
-static bool align_buffer_size = 1;
-module_param(align_buffer_size, bool, 0644);
+static int align_buffer_size = -1;
+module_param(align_buffer_size, bint, 0644);
 MODULE_PARM_DESC(align_buffer_size,
                 "Force buffer and period sizes to be multiple of 128 bytes.");
 
@@ -515,6 +515,7 @@ enum {
 #define AZX_DCAPS_SYNC_WRITE    (1 << 19)       /* sync each cmd write */
 #define AZX_DCAPS_OLD_SSYNC     (1 << 20)       /* Old SSYNC reg for ICH */
 #define AZX_DCAPS_BUFSIZE       (1 << 21)       /* no buffer size alignment */
+#define AZX_DCAPS_ALIGN_BUFSIZE (1 << 22)       /* buffer size alignment */
 
 /* quirks for ATI SB / AMD Hudson */
 #define AZX_DCAPS_PRESET_ATI_SB \
@@ -527,7 +528,8 @@ enum {
 
 /* quirks for Nvidia */
 #define AZX_DCAPS_PRESET_NVIDIA \
-        (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI)
+        (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
+         AZX_DCAPS_ALIGN_BUFSIZE)
 
 static char *driver_short_names[] __devinitdata = {
         [AZX_DRIVER_ICH] = "HDA Intel",
@@ -2774,9 +2776,16 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
         }
 
         /* disable buffer size rounding to 128-byte multiples if supported */
-        chip->align_buffer_size = align_buffer_size;
-        if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
-                chip->align_buffer_size = 0;
+        if (align_buffer_size >= 0)
+                chip->align_buffer_size = !!align_buffer_size;
+        else {
+                if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
+                        chip->align_buffer_size = 0;
+                else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
+                        chip->align_buffer_size = 1;
+                else
+                        chip->align_buffer_size = 1;
+        }
 
         /* allow 64bit DMA address if supported by H/W */
         if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))