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Diffstat (limited to 'sound/pci/hda/patch_sigmatel.c')
-rw-r--r--sound/pci/hda/patch_sigmatel.c1000
1 files changed, 761 insertions, 239 deletions
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index 3f25de72966b..bf950195107c 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -39,12 +39,25 @@
39 39
40enum { 40enum {
41 STAC_REF, 41 STAC_REF,
42 STAC_9200_DELL_D21,
43 STAC_9200_DELL_D22,
44 STAC_9200_DELL_D23,
45 STAC_9200_DELL_M21,
46 STAC_9200_DELL_M22,
47 STAC_9200_DELL_M23,
48 STAC_9200_DELL_M24,
49 STAC_9200_DELL_M25,
50 STAC_9200_DELL_M26,
51 STAC_9200_DELL_M27,
52 STAC_9200_GATEWAY,
42 STAC_9200_MODELS 53 STAC_9200_MODELS
43}; 54};
44 55
45enum { 56enum {
46 STAC_9205_REF, 57 STAC_9205_REF,
47 STAC_M43xx, 58 STAC_9205_DELL_M42,
59 STAC_9205_DELL_M43,
60 STAC_9205_DELL_M44,
48 STAC_9205_MODELS 61 STAC_9205_MODELS
49}; 62};
50 63
@@ -60,19 +73,22 @@ enum {
60 STAC_D945_REF, 73 STAC_D945_REF,
61 STAC_D945GTP3, 74 STAC_D945GTP3,
62 STAC_D945GTP5, 75 STAC_D945GTP5,
63 STAC_922X_DELL,
64 STAC_INTEL_MAC_V1, 76 STAC_INTEL_MAC_V1,
65 STAC_INTEL_MAC_V2, 77 STAC_INTEL_MAC_V2,
66 STAC_INTEL_MAC_V3, 78 STAC_INTEL_MAC_V3,
67 STAC_INTEL_MAC_V4, 79 STAC_INTEL_MAC_V4,
68 STAC_INTEL_MAC_V5, 80 STAC_INTEL_MAC_V5,
69 /* for backward compitability */ 81 /* for backward compatibility */
70 STAC_MACMINI, 82 STAC_MACMINI,
71 STAC_MACBOOK, 83 STAC_MACBOOK,
72 STAC_MACBOOK_PRO_V1, 84 STAC_MACBOOK_PRO_V1,
73 STAC_MACBOOK_PRO_V2, 85 STAC_MACBOOK_PRO_V2,
74 STAC_IMAC_INTEL, 86 STAC_IMAC_INTEL,
75 STAC_IMAC_INTEL_20, 87 STAC_IMAC_INTEL_20,
88 STAC_922X_DELL_D81,
89 STAC_922X_DELL_D82,
90 STAC_922X_DELL_M81,
91 STAC_922X_DELL_M82,
76 STAC_922X_MODELS 92 STAC_922X_MODELS
77}; 93};
78 94
@@ -80,6 +96,7 @@ enum {
80 STAC_D965_REF, 96 STAC_D965_REF,
81 STAC_D965_3ST, 97 STAC_D965_3ST,
82 STAC_D965_5ST, 98 STAC_D965_5ST,
99 STAC_DELL_3ST,
83 STAC_927X_MODELS 100 STAC_927X_MODELS
84}; 101};
85 102
@@ -95,6 +112,8 @@ struct sigmatel_spec {
95 unsigned int hp_detect: 1; 112 unsigned int hp_detect: 1;
96 unsigned int gpio_mute: 1; 113 unsigned int gpio_mute: 1;
97 114
115 unsigned int gpio_mask, gpio_data;
116
98 /* playback */ 117 /* playback */
99 struct hda_multi_out multiout; 118 struct hda_multi_out multiout;
100 hda_nid_t dac_nids[5]; 119 hda_nid_t dac_nids[5];
@@ -127,6 +146,8 @@ struct sigmatel_spec {
127 146
128 /* i/o switches */ 147 /* i/o switches */
129 unsigned int io_switch[2]; 148 unsigned int io_switch[2];
149 unsigned int clfe_swap;
150 unsigned int aloopback;
130 151
131 struct hda_pcm pcm_rec[2]; /* PCM information */ 152 struct hda_pcm pcm_rec[2]; /* PCM information */
132 153
@@ -162,8 +183,9 @@ static hda_nid_t stac925x_dac_nids[1] = {
162 0x02, 183 0x02,
163}; 184};
164 185
165static hda_nid_t stac925x_dmic_nids[1] = { 186#define STAC925X_NUM_DMICS 1
166 0x15, 187static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
188 0x15, 0
167}; 189};
168 190
169static hda_nid_t stac922x_adc_nids[2] = { 191static hda_nid_t stac922x_adc_nids[2] = {
@@ -190,8 +212,9 @@ static hda_nid_t stac9205_mux_nids[2] = {
190 0x19, 0x1a 212 0x19, 0x1a
191}; 213};
192 214
193static hda_nid_t stac9205_dmic_nids[2] = { 215#define STAC9205_NUM_DMICS 2
194 0x17, 0x18, 216static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
217 0x17, 0x18, 0
195}; 218};
196 219
197static hda_nid_t stac9200_pin_nids[8] = { 220static hda_nid_t stac9200_pin_nids[8] = {
@@ -276,12 +299,97 @@ static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_e
276 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]); 299 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
277} 300}
278 301
302#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
303
304static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
305 struct snd_ctl_elem_value *ucontrol)
306{
307 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
308 struct sigmatel_spec *spec = codec->spec;
309
310 ucontrol->value.integer.value[0] = spec->aloopback;
311 return 0;
312}
313
314static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
315 struct snd_ctl_elem_value *ucontrol)
316{
317 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
318 struct sigmatel_spec *spec = codec->spec;
319 unsigned int dac_mode;
320
321 if (spec->aloopback == ucontrol->value.integer.value[0])
322 return 0;
323
324 spec->aloopback = ucontrol->value.integer.value[0];
325
326
327 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
328 kcontrol->private_value & 0xFFFF, 0x0);
329
330 if (spec->aloopback) {
331 snd_hda_power_up(codec);
332 dac_mode |= 0x40;
333 } else {
334 snd_hda_power_down(codec);
335 dac_mode &= ~0x40;
336 }
337
338 snd_hda_codec_write_cache(codec, codec->afg, 0,
339 kcontrol->private_value >> 16, dac_mode);
340
341 return 1;
342}
343
344static int stac92xx_volknob_info(struct snd_kcontrol *kcontrol,
345 struct snd_ctl_elem_info *uinfo)
346{
347 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
348 uinfo->count = 1;
349 uinfo->value.integer.min = 0;
350 uinfo->value.integer.max = 127;
351 return 0;
352}
353
354static int stac92xx_volknob_get(struct snd_kcontrol *kcontrol,
355 struct snd_ctl_elem_value *ucontrol)
356{
357 ucontrol->value.integer.value[0] = kcontrol->private_value & 0xff;
358 return 0;
359}
360
361static int stac92xx_volknob_put(struct snd_kcontrol *kcontrol,
362 struct snd_ctl_elem_value *ucontrol)
363{
364 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
365 unsigned int val = kcontrol->private_value & 0xff;
366
367 if (val == ucontrol->value.integer.value[0])
368 return 0;
369
370 val = ucontrol->value.integer.value[0];
371 kcontrol->private_value &= ~0xff;
372 kcontrol->private_value |= val;
373
374 snd_hda_codec_write_cache(codec, kcontrol->private_value >> 16, 0,
375 AC_VERB_SET_VOLUME_KNOB_CONTROL, val | 0x80);
376 return 1;
377}
378
379
279static struct hda_verb stac9200_core_init[] = { 380static struct hda_verb stac9200_core_init[] = {
280 /* set dac0mux for dac converter */ 381 /* set dac0mux for dac converter */
281 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 382 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
282 {} 383 {}
283}; 384};
284 385
386static struct hda_verb stac9200_eapd_init[] = {
387 /* set dac0mux for dac converter */
388 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
389 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
390 {}
391};
392
285static struct hda_verb stac925x_core_init[] = { 393static struct hda_verb stac925x_core_init[] = {
286 /* set dac0mux for dac converter */ 394 /* set dac0mux for dac converter */
287 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, 395 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
@@ -316,17 +424,43 @@ static struct hda_verb stac9205_core_init[] = {
316 {} 424 {}
317}; 425};
318 426
427#define STAC_INPUT_SOURCE(cnt) \
428 { \
429 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
430 .name = "Input Source", \
431 .count = cnt, \
432 .info = stac92xx_mux_enum_info, \
433 .get = stac92xx_mux_enum_get, \
434 .put = stac92xx_mux_enum_put, \
435 }
436
437#define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
438 { \
439 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
440 .name = "Analog Loopback", \
441 .count = 1, \
442 .info = stac92xx_aloopback_info, \
443 .get = stac92xx_aloopback_get, \
444 .put = stac92xx_aloopback_put, \
445 .private_value = verb_read | (verb_write << 16), \
446 }
447
448#define STAC_VOLKNOB(knob_nid) \
449 { \
450 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
451 .name = "Master Playback Volume", \
452 .count = 1, \
453 .info = stac92xx_volknob_info, \
454 .get = stac92xx_volknob_get, \
455 .put = stac92xx_volknob_put, \
456 .private_value = 127 | (knob_nid << 16), \
457 }
458
459
319static struct snd_kcontrol_new stac9200_mixer[] = { 460static struct snd_kcontrol_new stac9200_mixer[] = {
320 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT), 461 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
321 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT), 462 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
322 { 463 STAC_INPUT_SOURCE(1),
323 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
324 .name = "Input Source",
325 .count = 1,
326 .info = stac92xx_mux_enum_info,
327 .get = stac92xx_mux_enum_get,
328 .put = stac92xx_mux_enum_put,
329 },
330 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT), 464 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
331 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT), 465 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
332 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT), 466 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
@@ -334,86 +468,68 @@ static struct snd_kcontrol_new stac9200_mixer[] = {
334}; 468};
335 469
336static struct snd_kcontrol_new stac925x_mixer[] = { 470static struct snd_kcontrol_new stac925x_mixer[] = {
337 { 471 STAC_INPUT_SOURCE(1),
338 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
339 .name = "Input Source",
340 .count = 1,
341 .info = stac92xx_mux_enum_info,
342 .get = stac92xx_mux_enum_get,
343 .put = stac92xx_mux_enum_put,
344 },
345 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT), 472 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
346 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT), 473 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
347 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT), 474 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
348 { } /* end */ 475 { } /* end */
349}; 476};
350 477
351/* This needs to be generated dynamically based on sequence */ 478static struct snd_kcontrol_new stac9205_mixer[] = {
352static struct snd_kcontrol_new stac922x_mixer[] = {
353 { 479 {
354 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 480 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
355 .name = "Input Source", 481 .name = "Digital Input Source",
356 .count = 1, 482 .count = 1,
357 .info = stac92xx_mux_enum_info, 483 .info = stac92xx_dmux_enum_info,
358 .get = stac92xx_mux_enum_get, 484 .get = stac92xx_dmux_enum_get,
359 .put = stac92xx_mux_enum_put, 485 .put = stac92xx_dmux_enum_put,
360 }, 486 },
361 HDA_CODEC_VOLUME("Capture Volume", 0x17, 0x0, HDA_INPUT), 487 STAC_INPUT_SOURCE(2),
362 HDA_CODEC_MUTE("Capture Switch", 0x17, 0x0, HDA_INPUT), 488 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
363 HDA_CODEC_VOLUME("Mux Capture Volume", 0x12, 0x0, HDA_OUTPUT), 489 STAC_VOLKNOB(0x24),
490
491 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
492 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
493 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
494
495 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
496 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
497 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
498
364 { } /* end */ 499 { } /* end */
365}; 500};
366 501
367/* This needs to be generated dynamically based on sequence */ 502/* This needs to be generated dynamically based on sequence */
368static struct snd_kcontrol_new stac9227_mixer[] = { 503static struct snd_kcontrol_new stac922x_mixer[] = {
369 { 504 STAC_INPUT_SOURCE(2),
370 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 505 STAC_VOLKNOB(0x16),
371 .name = "Input Source", 506 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
372 .count = 1, 507 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
373 .info = stac92xx_mux_enum_info, 508 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
374 .get = stac92xx_mux_enum_get, 509
375 .put = stac92xx_mux_enum_put, 510 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
376 }, 511 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
377 HDA_CODEC_VOLUME("Capture Volume", 0x15, 0x0, HDA_OUTPUT), 512 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
378 HDA_CODEC_MUTE("Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
379 { } /* end */ 513 { } /* end */
380}; 514};
381 515
516
382static struct snd_kcontrol_new stac927x_mixer[] = { 517static struct snd_kcontrol_new stac927x_mixer[] = {
383 { 518 STAC_INPUT_SOURCE(3),
384 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 519 STAC_VOLKNOB(0x24),
385 .name = "Input Source", 520 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
386 .count = 1,
387 .info = stac92xx_mux_enum_info,
388 .get = stac92xx_mux_enum_get,
389 .put = stac92xx_mux_enum_put,
390 },
391 HDA_CODEC_VOLUME("InMux Capture Volume", 0x15, 0x0, HDA_OUTPUT),
392 HDA_CODEC_VOLUME("InVol Capture Volume", 0x18, 0x0, HDA_INPUT),
393 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1b, 0x0, HDA_OUTPUT),
394 { } /* end */
395};
396 521
397static struct snd_kcontrol_new stac9205_mixer[] = { 522 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
398 { 523 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
399 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 524 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
400 .name = "Digital Input Source", 525
401 .count = 1, 526 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
402 .info = stac92xx_dmux_enum_info, 527 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
403 .get = stac92xx_dmux_enum_get, 528 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
404 .put = stac92xx_dmux_enum_put, 529
405 }, 530 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
406 { 531 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
407 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 532 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
408 .name = "Input Source",
409 .count = 1,
410 .info = stac92xx_mux_enum_info,
411 .get = stac92xx_mux_enum_get,
412 .put = stac92xx_mux_enum_put,
413 },
414 HDA_CODEC_VOLUME("InMux Capture Volume", 0x19, 0x0, HDA_OUTPUT),
415 HDA_CODEC_VOLUME("InVol Capture Volume", 0x1b, 0x0, HDA_INPUT),
416 HDA_CODEC_MUTE("ADCMux Capture Switch", 0x1d, 0x0, HDA_OUTPUT),
417 { } /* end */ 533 { } /* end */
418}; 534};
419 535
@@ -451,12 +567,145 @@ static unsigned int ref9200_pin_configs[8] = {
451 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, 567 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
452}; 568};
453 569
570/*
571 STAC 9200 pin configs for
572 102801A8
573 102801DE
574 102801E8
575*/
576static unsigned int dell9200_d21_pin_configs[8] = {
577 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
578 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
579};
580
581/*
582 STAC 9200 pin configs for
583 102801C0
584 102801C1
585*/
586static unsigned int dell9200_d22_pin_configs[8] = {
587 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
588 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
589};
590
591/*
592 STAC 9200 pin configs for
593 102801C4 (Dell Dimension E310)
594 102801C5
595 102801C7
596 102801D9
597 102801DA
598 102801E3
599*/
600static unsigned int dell9200_d23_pin_configs[8] = {
601 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
602 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
603};
604
605
606/*
607 STAC 9200-32 pin configs for
608 102801B5 (Dell Inspiron 630m)
609 102801D8 (Dell Inspiron 640m)
610*/
611static unsigned int dell9200_m21_pin_configs[8] = {
612 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
613 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
614};
615
616/*
617 STAC 9200-32 pin configs for
618 102801C2 (Dell Latitude D620)
619 102801C8
620 102801CC (Dell Latitude D820)
621 102801D4
622 102801D6
623*/
624static unsigned int dell9200_m22_pin_configs[8] = {
625 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
626 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
627};
628
629/*
630 STAC 9200-32 pin configs for
631 102801CE (Dell XPS M1710)
632 102801CF (Dell Precision M90)
633*/
634static unsigned int dell9200_m23_pin_configs[8] = {
635 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
636 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
637};
638
639/*
640 STAC 9200-32 pin configs for
641 102801C9
642 102801CA
643 102801CB (Dell Latitude 120L)
644 102801D3
645*/
646static unsigned int dell9200_m24_pin_configs[8] = {
647 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
648 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
649};
650
651/*
652 STAC 9200-32 pin configs for
653 102801BD (Dell Inspiron E1505n)
654 102801EE
655 102801EF
656*/
657static unsigned int dell9200_m25_pin_configs[8] = {
658 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
659 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
660};
661
662/*
663 STAC 9200-32 pin configs for
664 102801F5 (Dell Inspiron 1501)
665 102801F6
666*/
667static unsigned int dell9200_m26_pin_configs[8] = {
668 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
669 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
670};
671
672/*
673 STAC 9200-32
674 102801CD (Dell Inspiron E1705/9400)
675*/
676static unsigned int dell9200_m27_pin_configs[8] = {
677 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
678 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
679};
680
681
454static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = { 682static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
455 [STAC_REF] = ref9200_pin_configs, 683 [STAC_REF] = ref9200_pin_configs,
684 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
685 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
686 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
687 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
688 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
689 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
690 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
691 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
692 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
693 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
456}; 694};
457 695
458static const char *stac9200_models[STAC_9200_MODELS] = { 696static const char *stac9200_models[STAC_9200_MODELS] = {
459 [STAC_REF] = "ref", 697 [STAC_REF] = "ref",
698 [STAC_9200_DELL_D21] = "dell-d21",
699 [STAC_9200_DELL_D22] = "dell-d22",
700 [STAC_9200_DELL_D23] = "dell-d23",
701 [STAC_9200_DELL_M21] = "dell-m21",
702 [STAC_9200_DELL_M22] = "dell-m22",
703 [STAC_9200_DELL_M23] = "dell-m23",
704 [STAC_9200_DELL_M24] = "dell-m24",
705 [STAC_9200_DELL_M25] = "dell-m25",
706 [STAC_9200_DELL_M26] = "dell-m26",
707 [STAC_9200_DELL_M27] = "dell-m27",
708 [STAC_9200_GATEWAY] = "gateway",
460}; 709};
461 710
462static struct snd_pci_quirk stac9200_cfg_tbl[] = { 711static struct snd_pci_quirk stac9200_cfg_tbl[] = {
@@ -464,30 +713,72 @@ static struct snd_pci_quirk stac9200_cfg_tbl[] = {
464 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 713 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
465 "DFI LanParty", STAC_REF), 714 "DFI LanParty", STAC_REF),
466 /* Dell laptops have BIOS problem */ 715 /* Dell laptops have BIOS problem */
716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
717 "unknown Dell", STAC_9200_DELL_D21),
467 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, 718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
468 "Dell Inspiron 630m", STAC_REF), 719 "Dell Inspiron 630m", STAC_9200_DELL_M21),
720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
721 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
723 "unknown Dell", STAC_9200_DELL_D22),
724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
725 "unknown Dell", STAC_9200_DELL_D22),
469 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, 726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
470 "Dell Latitude D620", STAC_REF), 727 "Dell Latitude D620", STAC_9200_DELL_M22),
728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
729 "unknown Dell", STAC_9200_DELL_D23),
730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
731 "unknown Dell", STAC_9200_DELL_D23),
732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
733 "unknown Dell", STAC_9200_DELL_M22),
734 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
735 "unknown Dell", STAC_9200_DELL_M24),
736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
737 "unknown Dell", STAC_9200_DELL_M24),
471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, 738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
472 "Dell Latitude 120L", STAC_REF), 739 "Dell Latitude 120L", STAC_9200_DELL_M24),
473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, 740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
474 "Dell Latitude D820", STAC_REF), 741 "Dell Latitude D820", STAC_9200_DELL_M22),
475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, 742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
476 "Dell Inspiron E1705/9400", STAC_REF), 743 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, 744 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
478 "Dell XPS M1710", STAC_REF), 745 "Dell XPS M1710", STAC_9200_DELL_M23),
479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, 746 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
480 "Dell Precision M90", STAC_REF), 747 "Dell Precision M90", STAC_9200_DELL_M23),
748 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
749 "unknown Dell", STAC_9200_DELL_M22),
750 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
751 "unknown Dell", STAC_9200_DELL_M22),
481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, 752 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
482 "unknown Dell", STAC_REF), 753 "unknown Dell", STAC_9200_DELL_M22),
483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, 754 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
484 "Dell Inspiron 640m", STAC_REF), 755 "Dell Inspiron 640m", STAC_9200_DELL_M21),
756 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
757 "unknown Dell", STAC_9200_DELL_D23),
758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
759 "unknown Dell", STAC_9200_DELL_D23),
760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
761 "unknown Dell", STAC_9200_DELL_D21),
762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
763 "unknown Dell", STAC_9200_DELL_D23),
764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
765 "unknown Dell", STAC_9200_DELL_D21),
766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
767 "unknown Dell", STAC_9200_DELL_M25),
768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
769 "unknown Dell", STAC_9200_DELL_M25),
485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, 770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
486 "Dell Inspiron 1501", STAC_REF), 771 "Dell Inspiron 1501", STAC_9200_DELL_M26),
487 772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
773 "unknown Dell", STAC_9200_DELL_M26),
488 /* Panasonic */ 774 /* Panasonic */
489 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF), 775 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
490 776 /* Gateway machines needs EAPD to be set on resume */
777 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
778 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
779 STAC_9200_GATEWAY),
780 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
781 STAC_9200_GATEWAY),
491 {} /* terminator */ 782 {} /* terminator */
492}; 783};
493 784
@@ -543,6 +834,51 @@ static unsigned int ref922x_pin_configs[10] = {
543 0x40000100, 0x40000100, 834 0x40000100, 0x40000100,
544}; 835};
545 836
837/*
838 STAC 922X pin configs for
839 102801A7
840 102801AB
841 102801A9
842 102801D1
843 102801D2
844*/
845static unsigned int dell_922x_d81_pin_configs[10] = {
846 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
847 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
848 0x01813122, 0x400001f2,
849};
850
851/*
852 STAC 922X pin configs for
853 102801AC
854 102801D0
855*/
856static unsigned int dell_922x_d82_pin_configs[10] = {
857 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
858 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
859 0x01813122, 0x400001f1,
860};
861
862/*
863 STAC 922X pin configs for
864 102801BF
865*/
866static unsigned int dell_922x_m81_pin_configs[10] = {
867 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
868 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
869 0x40C003f1, 0x405003f0,
870};
871
872/*
873 STAC 9221 A1 pin configs for
874 102801D7 (Dell XPS M1210)
875*/
876static unsigned int dell_922x_m82_pin_configs[10] = {
877 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
878 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
879 0x508003f3, 0x405003f4,
880};
881
546static unsigned int d945gtp3_pin_configs[10] = { 882static unsigned int d945gtp3_pin_configs[10] = {
547 0x0221401f, 0x01a19022, 0x01813021, 0x01014010, 883 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
548 0x40000100, 0x40000100, 0x40000100, 0x40000100, 884 0x40000100, 0x40000100, 0x40000100, 0x40000100,
@@ -585,48 +921,49 @@ static unsigned int intel_mac_v5_pin_configs[10] = {
585 0x400000fc, 0x400000fb, 921 0x400000fc, 0x400000fb,
586}; 922};
587 923
588static unsigned int stac922x_dell_pin_configs[10] = {
589 0x0221121e, 0x408103ff, 0x02a1123e, 0x90100310,
590 0x408003f1, 0x0221122f, 0x03451340, 0x40c003f2,
591 0x50a003f3, 0x405003f4
592};
593 924
594static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = { 925static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
595 [STAC_D945_REF] = ref922x_pin_configs, 926 [STAC_D945_REF] = ref922x_pin_configs,
596 [STAC_D945GTP3] = d945gtp3_pin_configs, 927 [STAC_D945GTP3] = d945gtp3_pin_configs,
597 [STAC_D945GTP5] = d945gtp5_pin_configs, 928 [STAC_D945GTP5] = d945gtp5_pin_configs,
598 [STAC_922X_DELL] = stac922x_dell_pin_configs,
599 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs, 929 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
600 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs, 930 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
601 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs, 931 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
602 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs, 932 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
603 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs, 933 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
604 /* for backward compitability */ 934 /* for backward compatibility */
605 [STAC_MACMINI] = intel_mac_v3_pin_configs, 935 [STAC_MACMINI] = intel_mac_v3_pin_configs,
606 [STAC_MACBOOK] = intel_mac_v5_pin_configs, 936 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
607 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs, 937 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
608 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs, 938 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
609 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs, 939 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
610 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs, 940 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
941 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
942 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
943 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
944 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
611}; 945};
612 946
613static const char *stac922x_models[STAC_922X_MODELS] = { 947static const char *stac922x_models[STAC_922X_MODELS] = {
614 [STAC_D945_REF] = "ref", 948 [STAC_D945_REF] = "ref",
615 [STAC_D945GTP5] = "5stack", 949 [STAC_D945GTP5] = "5stack",
616 [STAC_D945GTP3] = "3stack", 950 [STAC_D945GTP3] = "3stack",
617 [STAC_922X_DELL] = "dell",
618 [STAC_INTEL_MAC_V1] = "intel-mac-v1", 951 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
619 [STAC_INTEL_MAC_V2] = "intel-mac-v2", 952 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
620 [STAC_INTEL_MAC_V3] = "intel-mac-v3", 953 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
621 [STAC_INTEL_MAC_V4] = "intel-mac-v4", 954 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
622 [STAC_INTEL_MAC_V5] = "intel-mac-v5", 955 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
623 /* for backward compitability */ 956 /* for backward compatibility */
624 [STAC_MACMINI] = "macmini", 957 [STAC_MACMINI] = "macmini",
625 [STAC_MACBOOK] = "macbook", 958 [STAC_MACBOOK] = "macbook",
626 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1", 959 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
627 [STAC_MACBOOK_PRO_V2] = "macbook-pro", 960 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
628 [STAC_IMAC_INTEL] = "imac-intel", 961 [STAC_IMAC_INTEL] = "imac-intel",
629 [STAC_IMAC_INTEL_20] = "imac-intel-20", 962 [STAC_IMAC_INTEL_20] = "imac-intel-20",
963 [STAC_922X_DELL_D81] = "dell-d81",
964 [STAC_922X_DELL_D82] = "dell-d82",
965 [STAC_922X_DELL_M81] = "dell-m81",
966 [STAC_922X_DELL_M82] = "dell-m82",
630}; 967};
631 968
632static struct snd_pci_quirk stac922x_cfg_tbl[] = { 969static struct snd_pci_quirk stac922x_cfg_tbl[] = {
@@ -690,9 +1027,25 @@ static struct snd_pci_quirk stac922x_cfg_tbl[] = {
690 /* Apple Mac Mini (early 2006) */ 1027 /* Apple Mac Mini (early 2006) */
691 SND_PCI_QUIRK(0x8384, 0x7680, 1028 SND_PCI_QUIRK(0x8384, 0x7680,
692 "Mac Mini", STAC_INTEL_MAC_V3), 1029 "Mac Mini", STAC_INTEL_MAC_V3),
693 /* Dell */ 1030 /* Dell systems */
694 SND_PCI_QUIRK(0x1028, 0x01d7, "Dell XPS M1210", STAC_922X_DELL), 1031 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
695 1032 "unknown Dell", STAC_922X_DELL_D81),
1033 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1034 "unknown Dell", STAC_922X_DELL_D81),
1035 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1036 "unknown Dell", STAC_922X_DELL_D81),
1037 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1038 "unknown Dell", STAC_922X_DELL_D82),
1039 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1040 "unknown Dell", STAC_922X_DELL_M81),
1041 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1042 "unknown Dell", STAC_922X_DELL_D82),
1043 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1044 "unknown Dell", STAC_922X_DELL_D81),
1045 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1046 "unknown Dell", STAC_922X_DELL_D81),
1047 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1048 "Dell XPS M1210", STAC_922X_DELL_M82),
696 {} /* terminator */ 1049 {} /* terminator */
697}; 1050};
698 1051
@@ -717,16 +1070,25 @@ static unsigned int d965_5st_pin_configs[14] = {
717 0x40000100, 0x40000100 1070 0x40000100, 0x40000100
718}; 1071};
719 1072
1073static unsigned int dell_3st_pin_configs[14] = {
1074 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1075 0x01111212, 0x01116211, 0x01813050, 0x01112214,
1076 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
1077 0x40c003fc, 0x40000100
1078};
1079
720static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = { 1080static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
721 [STAC_D965_REF] = ref927x_pin_configs, 1081 [STAC_D965_REF] = ref927x_pin_configs,
722 [STAC_D965_3ST] = d965_3st_pin_configs, 1082 [STAC_D965_3ST] = d965_3st_pin_configs,
723 [STAC_D965_5ST] = d965_5st_pin_configs, 1083 [STAC_D965_5ST] = d965_5st_pin_configs,
1084 [STAC_DELL_3ST] = dell_3st_pin_configs,
724}; 1085};
725 1086
726static const char *stac927x_models[STAC_927X_MODELS] = { 1087static const char *stac927x_models[STAC_927X_MODELS] = {
727 [STAC_D965_REF] = "ref", 1088 [STAC_D965_REF] = "ref",
728 [STAC_D965_3ST] = "3stack", 1089 [STAC_D965_3ST] = "3stack",
729 [STAC_D965_5ST] = "5stack", 1090 [STAC_D965_5ST] = "5stack",
1091 [STAC_DELL_3ST] = "dell-3stack",
730}; 1092};
731 1093
732static struct snd_pci_quirk stac927x_cfg_tbl[] = { 1094static struct snd_pci_quirk stac927x_cfg_tbl[] = {
@@ -753,7 +1115,13 @@ static struct snd_pci_quirk stac927x_cfg_tbl[] = {
753 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST), 1115 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
754 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST), 1116 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
755 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST), 1117 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
1118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST),
1119 /* Dell 3 stack systems */
1120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
1121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
756 /* 965 based 5 stack systems */ 1123 /* 965 based 5 stack systems */
1124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST),
757 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST), 1125 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
758 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST), 1126 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
759 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST), 1127 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
@@ -772,23 +1140,97 @@ static unsigned int ref9205_pin_configs[12] = {
772 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030 1140 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
773}; 1141};
774 1142
1143/*
1144 STAC 9205 pin configs for
1145 102801F1
1146 102801F2
1147 102801FC
1148 102801FD
1149 10280204
1150 1028021F
1151*/
1152static unsigned int dell_9205_m42_pin_configs[12] = {
1153 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1154 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1155 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1156};
1157
1158/*
1159 STAC 9205 pin configs for
1160 102801F9
1161 102801FA
1162 102801FE
1163 102801FF (Dell Precision M4300)
1164 10280206
1165 10280200
1166 10280201
1167*/
1168static unsigned int dell_9205_m43_pin_configs[12] = {
1169 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1170 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1171 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1172};
1173
1174static unsigned int dell_9205_m44_pin_configs[12] = {
1175 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1176 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1177 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1178};
1179
775static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = { 1180static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
776 [STAC_REF] = ref9205_pin_configs, 1181 [STAC_9205_REF] = ref9205_pin_configs,
777 [STAC_M43xx] = NULL, 1182 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1183 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1184 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
778}; 1185};
779 1186
780static const char *stac9205_models[STAC_9205_MODELS] = { 1187static const char *stac9205_models[STAC_9205_MODELS] = {
781 [STAC_9205_REF] = "ref", 1188 [STAC_9205_REF] = "ref",
1189 [STAC_9205_DELL_M42] = "dell-m42",
1190 [STAC_9205_DELL_M43] = "dell-m43",
1191 [STAC_9205_DELL_M44] = "dell-m44",
782}; 1192};
783 1193
784static struct snd_pci_quirk stac9205_cfg_tbl[] = { 1194static struct snd_pci_quirk stac9205_cfg_tbl[] = {
785 /* SigmaTel reference board */ 1195 /* SigmaTel reference board */
786 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1196 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
787 "DFI LanParty", STAC_9205_REF), 1197 "DFI LanParty", STAC_9205_REF),
788 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x01f8, 1198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
789 "Dell Precision", STAC_M43xx), 1199 "unknown Dell", STAC_9205_DELL_M42),
790 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x01ff, 1200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
791 "Dell Precision", STAC_M43xx), 1201 "unknown Dell", STAC_9205_DELL_M42),
1202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
1203 "Dell Precision", STAC_9205_DELL_M43),
1204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1205 "Dell Precision", STAC_9205_DELL_M43),
1206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1207 "Dell Precision", STAC_9205_DELL_M43),
1208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1209 "Dell Precision", STAC_9205_DELL_M43),
1210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1211 "Dell Precision", STAC_9205_DELL_M43),
1212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1213 "unknown Dell", STAC_9205_DELL_M42),
1214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1215 "unknown Dell", STAC_9205_DELL_M42),
1216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1217 "Dell Precision", STAC_9205_DELL_M43),
1218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
1219 "Dell Precision M4300", STAC_9205_DELL_M43),
1220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1221 "Dell Precision", STAC_9205_DELL_M43),
1222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1223 "Dell Inspiron", STAC_9205_DELL_M44),
1224 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1225 "Dell Inspiron", STAC_9205_DELL_M44),
1226 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1227 "Dell Inspiron", STAC_9205_DELL_M44),
1228 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1229 "Dell Inspiron", STAC_9205_DELL_M44),
1230 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1231 "unknown Dell", STAC_9205_DELL_M42),
1232 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1233 "Dell Inspiron", STAC_9205_DELL_M44),
792 {} /* terminator */ 1234 {} /* terminator */
793}; 1235};
794 1236
@@ -854,20 +1296,20 @@ static void stac92xx_set_config_regs(struct hda_codec *codec)
854 spec->pin_configs[i]); 1296 spec->pin_configs[i]);
855} 1297}
856 1298
857static void stac92xx_enable_gpio_mask(struct hda_codec *codec, 1299static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
858 int gpio_mask, int gpio_data)
859{ 1300{
1301 struct sigmatel_spec *spec = codec->spec;
860 /* Configure GPIOx as output */ 1302 /* Configure GPIOx as output */
861 snd_hda_codec_write(codec, codec->afg, 0, 1303 snd_hda_codec_write_cache(codec, codec->afg, 0,
862 AC_VERB_SET_GPIO_DIRECTION, gpio_mask); 1304 AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
863 /* Configure GPIOx as CMOS */ 1305 /* Configure GPIOx as CMOS */
864 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0x00000000); 1306 snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
865 /* Assert GPIOx */ 1307 /* Assert GPIOx */
866 snd_hda_codec_write(codec, codec->afg, 0, 1308 snd_hda_codec_write_cache(codec, codec->afg, 0,
867 AC_VERB_SET_GPIO_DATA, gpio_data); 1309 AC_VERB_SET_GPIO_DATA, spec->gpio_data);
868 /* Enable GPIOx */ 1310 /* Enable GPIOx */
869 snd_hda_codec_write(codec, codec->afg, 0, 1311 snd_hda_codec_write_cache(codec, codec->afg, 0,
870 AC_VERB_SET_GPIO_MASK, gpio_mask); 1312 AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
871} 1313}
872 1314
873/* 1315/*
@@ -1000,10 +1442,9 @@ static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1000}; 1442};
1001 1443
1002static struct hda_pcm_stream stac92xx_pcm_analog_capture = { 1444static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
1003 .substreams = 2,
1004 .channels_min = 2, 1445 .channels_min = 2,
1005 .channels_max = 2, 1446 .channels_max = 2,
1006 /* NID is set in stac92xx_build_pcms */ 1447 /* NID + .substreams is set in stac92xx_build_pcms */
1007 .ops = { 1448 .ops = {
1008 .prepare = stac92xx_capture_pcm_prepare, 1449 .prepare = stac92xx_capture_pcm_prepare,
1009 .cleanup = stac92xx_capture_pcm_cleanup 1450 .cleanup = stac92xx_capture_pcm_cleanup
@@ -1022,6 +1463,7 @@ static int stac92xx_build_pcms(struct hda_codec *codec)
1022 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback; 1463 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
1023 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture; 1464 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
1024 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0]; 1465 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
1466 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
1025 1467
1026 if (spec->alt_switch) { 1468 if (spec->alt_switch) {
1027 codec->num_pcms++; 1469 codec->num_pcms++;
@@ -1066,17 +1508,11 @@ static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
1066static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type) 1508static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
1067 1509
1068{ 1510{
1069 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type); 1511 snd_hda_codec_write_cache(codec, nid, 0,
1512 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
1070} 1513}
1071 1514
1072static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1515#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
1073{
1074 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1075 uinfo->count = 1;
1076 uinfo->value.integer.min = 0;
1077 uinfo->value.integer.max = 1;
1078 return 0;
1079}
1080 1516
1081static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1517static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1082{ 1518{
@@ -1109,6 +1545,36 @@ static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_
1109 return 1; 1545 return 1;
1110} 1546}
1111 1547
1548#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
1549
1550static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
1551 struct snd_ctl_elem_value *ucontrol)
1552{
1553 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1554 struct sigmatel_spec *spec = codec->spec;
1555
1556 ucontrol->value.integer.value[0] = spec->clfe_swap;
1557 return 0;
1558}
1559
1560static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
1561 struct snd_ctl_elem_value *ucontrol)
1562{
1563 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
1564 struct sigmatel_spec *spec = codec->spec;
1565 hda_nid_t nid = kcontrol->private_value & 0xff;
1566
1567 if (spec->clfe_swap == ucontrol->value.integer.value[0])
1568 return 0;
1569
1570 spec->clfe_swap = ucontrol->value.integer.value[0];
1571
1572 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
1573 spec->clfe_swap ? 0x4 : 0x0);
1574
1575 return 1;
1576}
1577
1112#define STAC_CODEC_IO_SWITCH(xname, xpval) \ 1578#define STAC_CODEC_IO_SWITCH(xname, xpval) \
1113 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1579 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1114 .name = xname, \ 1580 .name = xname, \
@@ -1119,17 +1585,28 @@ static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_
1119 .private_value = xpval, \ 1585 .private_value = xpval, \
1120 } 1586 }
1121 1587
1588#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
1589 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1590 .name = xname, \
1591 .index = 0, \
1592 .info = stac92xx_clfe_switch_info, \
1593 .get = stac92xx_clfe_switch_get, \
1594 .put = stac92xx_clfe_switch_put, \
1595 .private_value = xpval, \
1596 }
1122 1597
1123enum { 1598enum {
1124 STAC_CTL_WIDGET_VOL, 1599 STAC_CTL_WIDGET_VOL,
1125 STAC_CTL_WIDGET_MUTE, 1600 STAC_CTL_WIDGET_MUTE,
1126 STAC_CTL_WIDGET_IO_SWITCH, 1601 STAC_CTL_WIDGET_IO_SWITCH,
1602 STAC_CTL_WIDGET_CLFE_SWITCH
1127}; 1603};
1128 1604
1129static struct snd_kcontrol_new stac92xx_control_templates[] = { 1605static struct snd_kcontrol_new stac92xx_control_templates[] = {
1130 HDA_CODEC_VOLUME(NULL, 0, 0, 0), 1606 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
1131 HDA_CODEC_MUTE(NULL, 0, 0, 0), 1607 HDA_CODEC_MUTE(NULL, 0, 0, 0),
1132 STAC_CODEC_IO_SWITCH(NULL, 0), 1608 STAC_CODEC_IO_SWITCH(NULL, 0),
1609 STAC_CODEC_CLFE_SWITCH(NULL, 0),
1133}; 1610};
1134 1611
1135/* add dynamic controls */ 1612/* add dynamic controls */
@@ -1182,7 +1659,8 @@ static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cf
1182 case 3: 1659 case 3:
1183 /* add line-in as side */ 1660 /* add line-in as side */
1184 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) { 1661 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
1185 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_LINE]; 1662 cfg->line_out_pins[cfg->line_outs] =
1663 cfg->input_pins[AUTO_PIN_LINE];
1186 spec->line_switch = 1; 1664 spec->line_switch = 1;
1187 cfg->line_outs++; 1665 cfg->line_outs++;
1188 } 1666 }
@@ -1190,12 +1668,14 @@ static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cf
1190 case 2: 1668 case 2:
1191 /* add line-in as clfe and mic as side */ 1669 /* add line-in as clfe and mic as side */
1192 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) { 1670 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
1193 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_LINE]; 1671 cfg->line_out_pins[cfg->line_outs] =
1672 cfg->input_pins[AUTO_PIN_LINE];
1194 spec->line_switch = 1; 1673 spec->line_switch = 1;
1195 cfg->line_outs++; 1674 cfg->line_outs++;
1196 } 1675 }
1197 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) { 1676 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
1198 cfg->line_out_pins[3] = cfg->input_pins[AUTO_PIN_MIC]; 1677 cfg->line_out_pins[cfg->line_outs] =
1678 cfg->input_pins[AUTO_PIN_MIC];
1199 spec->mic_switch = 1; 1679 spec->mic_switch = 1;
1200 cfg->line_outs++; 1680 cfg->line_outs++;
1201 } 1681 }
@@ -1203,12 +1683,14 @@ static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cf
1203 case 1: 1683 case 1:
1204 /* add line-in as surr and mic as clfe */ 1684 /* add line-in as surr and mic as clfe */
1205 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) { 1685 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
1206 cfg->line_out_pins[1] = cfg->input_pins[AUTO_PIN_LINE]; 1686 cfg->line_out_pins[cfg->line_outs] =
1687 cfg->input_pins[AUTO_PIN_LINE];
1207 spec->line_switch = 1; 1688 spec->line_switch = 1;
1208 cfg->line_outs++; 1689 cfg->line_outs++;
1209 } 1690 }
1210 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) { 1691 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
1211 cfg->line_out_pins[2] = cfg->input_pins[AUTO_PIN_MIC]; 1692 cfg->line_out_pins[cfg->line_outs] =
1693 cfg->input_pins[AUTO_PIN_MIC];
1212 spec->mic_switch = 1; 1694 spec->mic_switch = 1;
1213 cfg->line_outs++; 1695 cfg->line_outs++;
1214 } 1696 }
@@ -1282,8 +1764,8 @@ static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
1282 spec->multiout.num_dacs++; 1764 spec->multiout.num_dacs++;
1283 if (conn_len > 1) { 1765 if (conn_len > 1) {
1284 /* select this DAC in the pin's input mux */ 1766 /* select this DAC in the pin's input mux */
1285 snd_hda_codec_write(codec, nid, 0, 1767 snd_hda_codec_write_cache(codec, nid, 0,
1286 AC_VERB_SET_CONNECT_SEL, j); 1768 AC_VERB_SET_CONNECT_SEL, j);
1287 1769
1288 } 1770 }
1289 } 1771 }
@@ -1318,7 +1800,7 @@ static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_
1318} 1800}
1319 1801
1320/* add playback controls from the parsed DAC table */ 1802/* add playback controls from the parsed DAC table */
1321static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec, 1803static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
1322 const struct auto_pin_cfg *cfg) 1804 const struct auto_pin_cfg *cfg)
1323{ 1805{
1324 static const char *chname[4] = { 1806 static const char *chname[4] = {
@@ -1327,6 +1809,10 @@ static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec,
1327 hda_nid_t nid; 1809 hda_nid_t nid;
1328 int i, err; 1810 int i, err;
1329 1811
1812 struct sigmatel_spec *spec = codec->spec;
1813 unsigned int wid_caps;
1814
1815
1330 for (i = 0; i < cfg->line_outs; i++) { 1816 for (i = 0; i < cfg->line_outs; i++) {
1331 if (!spec->multiout.dac_nids[i]) 1817 if (!spec->multiout.dac_nids[i])
1332 continue; 1818 continue;
@@ -1341,6 +1827,18 @@ static int stac92xx_auto_create_multi_out_ctls(struct sigmatel_spec *spec,
1341 err = create_controls(spec, "LFE", nid, 2); 1827 err = create_controls(spec, "LFE", nid, 2);
1342 if (err < 0) 1828 if (err < 0)
1343 return err; 1829 return err;
1830
1831 wid_caps = get_wcaps(codec, nid);
1832
1833 if (wid_caps & AC_WCAP_LR_SWAP) {
1834 err = stac92xx_add_control(spec,
1835 STAC_CTL_WIDGET_CLFE_SWITCH,
1836 "Swap Center/LFE Playback Switch", nid);
1837
1838 if (err < 0)
1839 return err;
1840 }
1841
1344 } else { 1842 } else {
1345 err = create_controls(spec, chname[i], nid, 3); 1843 err = create_controls(spec, chname[i], nid, 3);
1346 if (err < 0) 1844 if (err < 0)
@@ -1536,9 +2034,9 @@ static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const
1536 * NID lists. Hopefully this won't get confused. 2034 * NID lists. Hopefully this won't get confused.
1537 */ 2035 */
1538 for (i = 0; i < spec->num_muxes; i++) { 2036 for (i = 0; i < spec->num_muxes; i++) {
1539 snd_hda_codec_write(codec, spec->mux_nids[i], 0, 2037 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
1540 AC_VERB_SET_CONNECT_SEL, 2038 AC_VERB_SET_CONNECT_SEL,
1541 imux->items[0].index); 2039 imux->items[0].index);
1542 } 2040 }
1543 } 2041 }
1544 2042
@@ -1593,9 +2091,19 @@ static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out
1593 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0) 2091 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
1594 return err; 2092 return err;
1595 2093
1596 if ((err = stac92xx_auto_create_multi_out_ctls(spec, &spec->autocfg)) < 0 || 2094 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
1597 (err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg)) < 0 || 2095
1598 (err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0) 2096 if (err < 0)
2097 return err;
2098
2099 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2100
2101 if (err < 0)
2102 return err;
2103
2104 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2105
2106 if (err < 0)
1599 return err; 2107 return err;
1600 2108
1601 if (spec->num_dmics > 0) 2109 if (spec->num_dmics > 0)
@@ -1764,9 +2272,9 @@ static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
1764 unsigned int event) 2272 unsigned int event)
1765{ 2273{
1766 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) 2274 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
1767 snd_hda_codec_write(codec, nid, 0, 2275 snd_hda_codec_write_cache(codec, nid, 0,
1768 AC_VERB_SET_UNSOLICITED_ENABLE, 2276 AC_VERB_SET_UNSOLICITED_ENABLE,
1769 (AC_USRSP_EN | event)); 2277 (AC_USRSP_EN | event));
1770} 2278}
1771 2279
1772static int stac92xx_init(struct hda_codec *codec) 2280static int stac92xx_init(struct hda_codec *codec)
@@ -1870,7 +2378,7 @@ static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
1870 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN)) 2378 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
1871 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN); 2379 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
1872 2380
1873 snd_hda_codec_write(codec, nid, 0, 2381 snd_hda_codec_write_cache(codec, nid, 0,
1874 AC_VERB_SET_PIN_WIDGET_CONTROL, 2382 AC_VERB_SET_PIN_WIDGET_CONTROL,
1875 pin_ctl | flag); 2383 pin_ctl | flag);
1876} 2384}
@@ -1880,7 +2388,7 @@ static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
1880{ 2388{
1881 unsigned int pin_ctl = snd_hda_codec_read(codec, nid, 2389 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
1882 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00); 2390 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
1883 snd_hda_codec_write(codec, nid, 0, 2391 snd_hda_codec_write_cache(codec, nid, 0,
1884 AC_VERB_SET_PIN_WIDGET_CONTROL, 2392 AC_VERB_SET_PIN_WIDGET_CONTROL,
1885 pin_ctl & ~flag); 2393 pin_ctl & ~flag);
1886} 2394}
@@ -1936,22 +2444,22 @@ static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
1936 } 2444 }
1937} 2445}
1938 2446
1939#ifdef CONFIG_PM 2447#ifdef SND_HDA_NEEDS_RESUME
1940static int stac92xx_resume(struct hda_codec *codec) 2448static int stac92xx_resume(struct hda_codec *codec)
1941{ 2449{
1942 struct sigmatel_spec *spec = codec->spec; 2450 struct sigmatel_spec *spec = codec->spec;
1943 int i;
1944 2451
1945 stac92xx_init(codec);
1946 stac92xx_set_config_regs(codec); 2452 stac92xx_set_config_regs(codec);
1947 snd_hda_resume_ctls(codec, spec->mixer); 2453 snd_hda_sequence_write(codec, spec->init);
1948 for (i = 0; i < spec->num_mixers; i++) 2454 if (spec->gpio_mute) {
1949 snd_hda_resume_ctls(codec, spec->mixers[i]); 2455 stac922x_gpio_mute(codec, 0, 0);
1950 if (spec->multiout.dig_out_nid) 2456 stac922x_gpio_mute(codec, 1, 0);
1951 snd_hda_resume_spdif_out(codec); 2457 }
1952 if (spec->dig_in_nid) 2458 snd_hda_codec_resume_amp(codec);
1953 snd_hda_resume_spdif_in(codec); 2459 snd_hda_codec_resume_cache(codec);
1954 2460 /* invoke unsolicited event to reset the HP state */
2461 if (spec->hp_detect)
2462 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
1955 return 0; 2463 return 0;
1956} 2464}
1957#endif 2465#endif
@@ -1962,7 +2470,7 @@ static struct hda_codec_ops stac92xx_patch_ops = {
1962 .init = stac92xx_init, 2470 .init = stac92xx_init,
1963 .free = stac92xx_free, 2471 .free = stac92xx_free,
1964 .unsol_event = stac92xx_unsol_event, 2472 .unsol_event = stac92xx_unsol_event,
1965#ifdef CONFIG_PM 2473#ifdef SND_HDA_NEEDS_RESUME
1966 .resume = stac92xx_resume, 2474 .resume = stac92xx_resume,
1967#endif 2475#endif
1968}; 2476};
@@ -2002,8 +2510,12 @@ static int patch_stac9200(struct hda_codec *codec)
2002 spec->mux_nids = stac9200_mux_nids; 2510 spec->mux_nids = stac9200_mux_nids;
2003 spec->num_muxes = 1; 2511 spec->num_muxes = 1;
2004 spec->num_dmics = 0; 2512 spec->num_dmics = 0;
2513 spec->num_adcs = 1;
2005 2514
2006 spec->init = stac9200_core_init; 2515 if (spec->board_config == STAC_9200_GATEWAY)
2516 spec->init = stac9200_eapd_init;
2517 else
2518 spec->init = stac9200_core_init;
2007 spec->mixer = stac9200_mixer; 2519 spec->mixer = stac9200_mixer;
2008 2520
2009 err = stac9200_parse_auto_config(codec); 2521 err = stac9200_parse_auto_config(codec);
@@ -2053,12 +2565,13 @@ static int patch_stac925x(struct hda_codec *codec)
2053 spec->adc_nids = stac925x_adc_nids; 2565 spec->adc_nids = stac925x_adc_nids;
2054 spec->mux_nids = stac925x_mux_nids; 2566 spec->mux_nids = stac925x_mux_nids;
2055 spec->num_muxes = 1; 2567 spec->num_muxes = 1;
2568 spec->num_adcs = 1;
2056 switch (codec->vendor_id) { 2569 switch (codec->vendor_id) {
2057 case 0x83847632: /* STAC9202 */ 2570 case 0x83847632: /* STAC9202 */
2058 case 0x83847633: /* STAC9202D */ 2571 case 0x83847633: /* STAC9202D */
2059 case 0x83847636: /* STAC9251 */ 2572 case 0x83847636: /* STAC9251 */
2060 case 0x83847637: /* STAC9251D */ 2573 case 0x83847637: /* STAC9251D */
2061 spec->num_dmics = 1; 2574 spec->num_dmics = STAC925X_NUM_DMICS;
2062 spec->dmic_nids = stac925x_dmic_nids; 2575 spec->dmic_nids = stac925x_dmic_nids;
2063 break; 2576 break;
2064 default: 2577 default:
@@ -2156,6 +2669,7 @@ static int patch_stac922x(struct hda_codec *codec)
2156 spec->adc_nids = stac922x_adc_nids; 2669 spec->adc_nids = stac922x_adc_nids;
2157 spec->mux_nids = stac922x_mux_nids; 2670 spec->mux_nids = stac922x_mux_nids;
2158 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids); 2671 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
2672 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
2159 spec->num_dmics = 0; 2673 spec->num_dmics = 0;
2160 2674
2161 spec->init = stac922x_core_init; 2675 spec->init = stac922x_core_init;
@@ -2224,22 +2738,25 @@ static int patch_stac927x(struct hda_codec *codec)
2224 spec->adc_nids = stac927x_adc_nids; 2738 spec->adc_nids = stac927x_adc_nids;
2225 spec->mux_nids = stac927x_mux_nids; 2739 spec->mux_nids = stac927x_mux_nids;
2226 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids); 2740 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
2741 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
2227 spec->num_dmics = 0; 2742 spec->num_dmics = 0;
2228 spec->init = d965_core_init; 2743 spec->init = d965_core_init;
2229 spec->mixer = stac9227_mixer; 2744 spec->mixer = stac927x_mixer;
2230 break; 2745 break;
2231 case STAC_D965_5ST: 2746 case STAC_D965_5ST:
2232 spec->adc_nids = stac927x_adc_nids; 2747 spec->adc_nids = stac927x_adc_nids;
2233 spec->mux_nids = stac927x_mux_nids; 2748 spec->mux_nids = stac927x_mux_nids;
2234 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids); 2749 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
2750 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
2235 spec->num_dmics = 0; 2751 spec->num_dmics = 0;
2236 spec->init = d965_core_init; 2752 spec->init = d965_core_init;
2237 spec->mixer = stac9227_mixer; 2753 spec->mixer = stac927x_mixer;
2238 break; 2754 break;
2239 default: 2755 default:
2240 spec->adc_nids = stac927x_adc_nids; 2756 spec->adc_nids = stac927x_adc_nids;
2241 spec->mux_nids = stac927x_mux_nids; 2757 spec->mux_nids = stac927x_mux_nids;
2242 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids); 2758 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
2759 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
2243 spec->num_dmics = 0; 2760 spec->num_dmics = 0;
2244 spec->init = stac927x_core_init; 2761 spec->init = stac927x_core_init;
2245 spec->mixer = stac927x_mixer; 2762 spec->mixer = stac927x_mixer;
@@ -2247,7 +2764,8 @@ static int patch_stac927x(struct hda_codec *codec)
2247 2764
2248 spec->multiout.dac_nids = spec->dac_nids; 2765 spec->multiout.dac_nids = spec->dac_nids;
2249 /* GPIO0 High = Enable EAPD */ 2766 /* GPIO0 High = Enable EAPD */
2250 stac92xx_enable_gpio_mask(codec, 0x00000001, 0x00000001); 2767 spec->gpio_mask = spec->gpio_data = 0x00000001;
2768 stac92xx_enable_gpio_mask(codec);
2251 2769
2252 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20); 2770 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
2253 if (!err) { 2771 if (!err) {
@@ -2272,7 +2790,7 @@ static int patch_stac927x(struct hda_codec *codec)
2272static int patch_stac9205(struct hda_codec *codec) 2790static int patch_stac9205(struct hda_codec *codec)
2273{ 2791{
2274 struct sigmatel_spec *spec; 2792 struct sigmatel_spec *spec;
2275 int err, gpio_mask, gpio_data; 2793 int err;
2276 2794
2277 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 2795 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2278 if (spec == NULL) 2796 if (spec == NULL)
@@ -2299,10 +2817,11 @@ static int patch_stac9205(struct hda_codec *codec)
2299 } 2817 }
2300 2818
2301 spec->adc_nids = stac9205_adc_nids; 2819 spec->adc_nids = stac9205_adc_nids;
2820 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
2302 spec->mux_nids = stac9205_mux_nids; 2821 spec->mux_nids = stac9205_mux_nids;
2303 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids); 2822 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
2304 spec->dmic_nids = stac9205_dmic_nids; 2823 spec->dmic_nids = stac9205_dmic_nids;
2305 spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids); 2824 spec->num_dmics = STAC9205_NUM_DMICS;
2306 spec->dmux_nid = 0x1d; 2825 spec->dmux_nid = 0x1d;
2307 2826
2308 spec->init = stac9205_core_init; 2827 spec->init = stac9205_core_init;
@@ -2310,20 +2829,25 @@ static int patch_stac9205(struct hda_codec *codec)
2310 2829
2311 spec->multiout.dac_nids = spec->dac_nids; 2830 spec->multiout.dac_nids = spec->dac_nids;
2312 2831
2313 if (spec->board_config == STAC_M43xx) { 2832 switch (spec->board_config){
2833 case STAC_9205_DELL_M43:
2314 /* Enable SPDIF in/out */ 2834 /* Enable SPDIF in/out */
2315 stac92xx_set_config_reg(codec, 0x1f, 0x01441030); 2835 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
2316 stac92xx_set_config_reg(codec, 0x20, 0x1c410030); 2836 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
2317 2837
2318 gpio_mask = 0x00000007; /* GPIO0-2 */ 2838 spec->gpio_mask = 0x00000007; /* GPIO0-2 */
2319 /* GPIO0 High = EAPD, GPIO1 Low = DRM, 2839 /* GPIO0 High = EAPD, GPIO1 Low = DRM,
2320 * GPIO2 High = Headphone Mute 2840 * GPIO2 High = Headphone Mute
2321 */ 2841 */
2322 gpio_data = 0x00000005; 2842 spec->gpio_data = 0x00000005;
2323 } else 2843 break;
2324 gpio_mask = gpio_data = 0x00000001; /* GPIO0 High = EAPD */ 2844 default:
2845 /* GPIO0 High = EAPD */
2846 spec->gpio_mask = spec->gpio_data = 0x00000001;
2847 break;
2848 }
2325 2849
2326 stac92xx_enable_gpio_mask(codec, gpio_mask, gpio_data); 2850 stac92xx_enable_gpio_mask(codec);
2327 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20); 2851 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
2328 if (!err) { 2852 if (!err) {
2329 if (spec->board_config < 0) { 2853 if (spec->board_config < 0) {
@@ -2355,7 +2879,7 @@ static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
2355static hda_nid_t vaio_mux_nids[] = { 0x15 }; 2879static hda_nid_t vaio_mux_nids[] = { 0x15 };
2356 2880
2357static struct hda_input_mux vaio_mux = { 2881static struct hda_input_mux vaio_mux = {
2358 .num_items = 2, 2882 .num_items = 3,
2359 .items = { 2883 .items = {
2360 /* { "HP", 0x0 }, */ 2884 /* { "HP", 0x0 }, */
2361 { "Mic Jack", 0x1 }, 2885 { "Mic Jack", 0x1 },
@@ -2366,6 +2890,7 @@ static struct hda_input_mux vaio_mux = {
2366 2890
2367static struct hda_verb vaio_init[] = { 2891static struct hda_verb vaio_init[] = {
2368 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */ 2892 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
2893 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
2369 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */ 2894 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
2370 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */ 2895 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
2371 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */ 2896 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
@@ -2397,61 +2922,28 @@ static struct hda_verb vaio_ar_init[] = {
2397}; 2922};
2398 2923
2399/* bind volumes of both NID 0x02 and 0x05 */ 2924/* bind volumes of both NID 0x02 and 0x05 */
2400static int vaio_master_vol_put(struct snd_kcontrol *kcontrol, 2925static struct hda_bind_ctls vaio_bind_master_vol = {
2401 struct snd_ctl_elem_value *ucontrol) 2926 .ops = &snd_hda_bind_vol,
2402{ 2927 .values = {
2403 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2928 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2404 long *valp = ucontrol->value.integer.value; 2929 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2405 int change; 2930 0
2406 2931 },
2407 change = snd_hda_codec_amp_update(codec, 0x02, 0, HDA_OUTPUT, 0, 2932};
2408 0x7f, valp[0] & 0x7f);
2409 change |= snd_hda_codec_amp_update(codec, 0x02, 1, HDA_OUTPUT, 0,
2410 0x7f, valp[1] & 0x7f);
2411 snd_hda_codec_amp_update(codec, 0x05, 0, HDA_OUTPUT, 0,
2412 0x7f, valp[0] & 0x7f);
2413 snd_hda_codec_amp_update(codec, 0x05, 1, HDA_OUTPUT, 0,
2414 0x7f, valp[1] & 0x7f);
2415 return change;
2416}
2417 2933
2418/* bind volumes of both NID 0x02 and 0x05 */ 2934/* bind volumes of both NID 0x02 and 0x05 */
2419static int vaio_master_sw_put(struct snd_kcontrol *kcontrol, 2935static struct hda_bind_ctls vaio_bind_master_sw = {
2420 struct snd_ctl_elem_value *ucontrol) 2936 .ops = &snd_hda_bind_sw,
2421{ 2937 .values = {
2422 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2938 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2423 long *valp = ucontrol->value.integer.value; 2939 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
2424 int change; 2940 0,
2425 2941 },
2426 change = snd_hda_codec_amp_update(codec, 0x02, 0, HDA_OUTPUT, 0, 2942};
2427 0x80, (valp[0] ? 0 : 0x80));
2428 change |= snd_hda_codec_amp_update(codec, 0x02, 1, HDA_OUTPUT, 0,
2429 0x80, (valp[1] ? 0 : 0x80));
2430 snd_hda_codec_amp_update(codec, 0x05, 0, HDA_OUTPUT, 0,
2431 0x80, (valp[0] ? 0 : 0x80));
2432 snd_hda_codec_amp_update(codec, 0x05, 1, HDA_OUTPUT, 0,
2433 0x80, (valp[1] ? 0 : 0x80));
2434 return change;
2435}
2436 2943
2437static struct snd_kcontrol_new vaio_mixer[] = { 2944static struct snd_kcontrol_new vaio_mixer[] = {
2438 { 2945 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2439 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2946 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
2440 .name = "Master Playback Volume",
2441 .info = snd_hda_mixer_amp_volume_info,
2442 .get = snd_hda_mixer_amp_volume_get,
2443 .put = vaio_master_vol_put,
2444 .tlv = { .c = snd_hda_mixer_amp_tlv },
2445 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2446 },
2447 {
2448 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2449 .name = "Master Playback Switch",
2450 .info = snd_hda_mixer_amp_switch_info,
2451 .get = snd_hda_mixer_amp_switch_get,
2452 .put = vaio_master_sw_put,
2453 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2454 },
2455 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */ 2947 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2456 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT), 2948 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2457 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT), 2949 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
@@ -2467,22 +2959,8 @@ static struct snd_kcontrol_new vaio_mixer[] = {
2467}; 2959};
2468 2960
2469static struct snd_kcontrol_new vaio_ar_mixer[] = { 2961static struct snd_kcontrol_new vaio_ar_mixer[] = {
2470 { 2962 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
2471 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2963 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
2472 .name = "Master Playback Volume",
2473 .info = snd_hda_mixer_amp_volume_info,
2474 .get = snd_hda_mixer_amp_volume_get,
2475 .put = vaio_master_vol_put,
2476 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2477 },
2478 {
2479 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2480 .name = "Master Playback Switch",
2481 .info = snd_hda_mixer_amp_switch_info,
2482 .get = snd_hda_mixer_amp_switch_get,
2483 .put = vaio_master_sw_put,
2484 .private_value = HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
2485 },
2486 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */ 2964 /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
2487 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT), 2965 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
2488 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT), 2966 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
@@ -2504,6 +2982,49 @@ static struct hda_codec_ops stac9872_patch_ops = {
2504 .build_pcms = stac92xx_build_pcms, 2982 .build_pcms = stac92xx_build_pcms,
2505 .init = stac92xx_init, 2983 .init = stac92xx_init,
2506 .free = stac92xx_free, 2984 .free = stac92xx_free,
2985#ifdef SND_HDA_NEEDS_RESUME
2986 .resume = stac92xx_resume,
2987#endif
2988};
2989
2990static int stac9872_vaio_init(struct hda_codec *codec)
2991{
2992 int err;
2993
2994 err = stac92xx_init(codec);
2995 if (err < 0)
2996 return err;
2997 if (codec->patch_ops.unsol_event)
2998 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2999 return 0;
3000}
3001
3002static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
3003{
3004 if (get_pin_presence(codec, 0x0a)) {
3005 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3006 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3007 } else {
3008 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
3009 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
3010 }
3011}
3012
3013static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
3014{
3015 switch (res >> 26) {
3016 case STAC_HP_EVENT:
3017 stac9872_vaio_hp_detect(codec, res);
3018 break;
3019 }
3020}
3021
3022static struct hda_codec_ops stac9872_vaio_patch_ops = {
3023 .build_controls = stac92xx_build_controls,
3024 .build_pcms = stac92xx_build_pcms,
3025 .init = stac9872_vaio_init,
3026 .free = stac92xx_free,
3027 .unsol_event = stac9872_vaio_unsol_event,
2507#ifdef CONFIG_PM 3028#ifdef CONFIG_PM
2508 .resume = stac92xx_resume, 3029 .resume = stac92xx_resume,
2509#endif 3030#endif
@@ -2564,6 +3085,7 @@ static int patch_stac9872(struct hda_codec *codec)
2564 spec->adc_nids = vaio_adcs; 3085 spec->adc_nids = vaio_adcs;
2565 spec->input_mux = &vaio_mux; 3086 spec->input_mux = &vaio_mux;
2566 spec->mux_nids = vaio_mux_nids; 3087 spec->mux_nids = vaio_mux_nids;
3088 codec->patch_ops = stac9872_vaio_patch_ops;
2567 break; 3089 break;
2568 3090
2569 case CXD9872AKD_VAIO: 3091 case CXD9872AKD_VAIO:
@@ -2577,10 +3099,10 @@ static int patch_stac9872(struct hda_codec *codec)
2577 spec->adc_nids = vaio_adcs; 3099 spec->adc_nids = vaio_adcs;
2578 spec->input_mux = &vaio_mux; 3100 spec->input_mux = &vaio_mux;
2579 spec->mux_nids = vaio_mux_nids; 3101 spec->mux_nids = vaio_mux_nids;
3102 codec->patch_ops = stac9872_patch_ops;
2580 break; 3103 break;
2581 } 3104 }
2582 3105
2583 codec->patch_ops = stac9872_patch_ops;
2584 return 0; 3106 return 0;
2585} 3107}
2586 3108
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-27 14:07:11 -0500