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Diffstat (limited to 'sound/pci/hda/hda_intel.c')
-rw-r--r--sound/pci/hda/hda_intel.c382
1 files changed, 277 insertions, 105 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 92bc8b3fa2a0..3fa0f9704909 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * 2 *
3 * hda_intel.c - Implementation of primary alsa driver code base for Intel HD Audio. 3 * hda_intel.c - Implementation of primary alsa driver code base
4 * for Intel HD Audio.
4 * 5 *
5 * Copyright(c) 2004 Intel Corporation. All rights reserved. 6 * Copyright(c) 2004 Intel Corporation. All rights reserved.
6 * 7 *
@@ -64,14 +65,27 @@ MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
64module_param(model, charp, 0444); 65module_param(model, charp, 0444);
65MODULE_PARM_DESC(model, "Use the given board model."); 66MODULE_PARM_DESC(model, "Use the given board model.");
66module_param(position_fix, int, 0444); 67module_param(position_fix, int, 0444);
67MODULE_PARM_DESC(position_fix, "Fix DMA pointer (0 = auto, 1 = none, 2 = POSBUF, 3 = FIFO size)."); 68MODULE_PARM_DESC(position_fix, "Fix DMA pointer "
69 "(0 = auto, 1 = none, 2 = POSBUF, 3 = FIFO size).");
68module_param(probe_mask, int, 0444); 70module_param(probe_mask, int, 0444);
69MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1)."); 71MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
70module_param(single_cmd, bool, 0444); 72module_param(single_cmd, bool, 0444);
71MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs (for debugging only)."); 73MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
74 "(for debugging only).");
72module_param(enable_msi, int, 0); 75module_param(enable_msi, int, 0);
73MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)"); 76MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
74 77
78#ifdef CONFIG_SND_HDA_POWER_SAVE
79/* power_save option is defined in hda_codec.c */
80
81/* reset the HD-audio controller in power save mode.
82 * this may give more power-saving, but will take longer time to
83 * wake up.
84 */
85static int power_save_controller = 1;
86module_param(power_save_controller, bool, 0644);
87MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
88#endif
75 89
76/* just for backward compatibility */ 90/* just for backward compatibility */
77static int enable; 91static int enable;
@@ -98,6 +112,7 @@ MODULE_DESCRIPTION("Intel HDA driver");
98 112
99#define SFX "hda-intel: " 113#define SFX "hda-intel: "
100 114
115
101/* 116/*
102 * registers 117 * registers
103 */ 118 */
@@ -213,15 +228,16 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
213#define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */ 228#define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */
214#define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */ 229#define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */
215#define SD_INT_COMPLETE 0x04 /* completion interrupt */ 230#define SD_INT_COMPLETE 0x04 /* completion interrupt */
216#define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|SD_INT_COMPLETE) 231#define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\
232 SD_INT_COMPLETE)
217 233
218/* SD_STS */ 234/* SD_STS */
219#define SD_STS_FIFO_READY 0x20 /* FIFO ready */ 235#define SD_STS_FIFO_READY 0x20 /* FIFO ready */
220 236
221/* INTCTL and INTSTS */ 237/* INTCTL and INTSTS */
222#define ICH6_INT_ALL_STREAM 0xff /* all stream interrupts */ 238#define ICH6_INT_ALL_STREAM 0xff /* all stream interrupts */
223#define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ 239#define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */
224#define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ 240#define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */
225 241
226/* GCTL unsolicited response enable bit */ 242/* GCTL unsolicited response enable bit */
227#define ICH6_GCTL_UREN (1<<8) 243#define ICH6_GCTL_UREN (1<<8)
@@ -257,22 +273,26 @@ enum {
257 */ 273 */
258 274
259struct azx_dev { 275struct azx_dev {
260 u32 *bdl; /* virtual address of the BDL */ 276 u32 *bdl; /* virtual address of the BDL */
261 dma_addr_t bdl_addr; /* physical address of the BDL */ 277 dma_addr_t bdl_addr; /* physical address of the BDL */
262 u32 *posbuf; /* position buffer pointer */ 278 u32 *posbuf; /* position buffer pointer */
263 279
264 unsigned int bufsize; /* size of the play buffer in bytes */ 280 unsigned int bufsize; /* size of the play buffer in bytes */
265 unsigned int fragsize; /* size of each period in bytes */ 281 unsigned int fragsize; /* size of each period in bytes */
266 unsigned int frags; /* number for period in the play buffer */ 282 unsigned int frags; /* number for period in the play buffer */
267 unsigned int fifo_size; /* FIFO size */ 283 unsigned int fifo_size; /* FIFO size */
268 284
269 void __iomem *sd_addr; /* stream descriptor pointer */ 285 void __iomem *sd_addr; /* stream descriptor pointer */
270 286
271 u32 sd_int_sta_mask; /* stream int status mask */ 287 u32 sd_int_sta_mask; /* stream int status mask */
272 288
273 /* pcm support */ 289 /* pcm support */
274 struct snd_pcm_substream *substream; /* assigned substream, set in PCM open */ 290 struct snd_pcm_substream *substream; /* assigned substream,
275 unsigned int format_val; /* format value to be set in the controller and the codec */ 291 * set in PCM open
292 */
293 unsigned int format_val; /* format value to be set in the
294 * controller and the codec
295 */
276 unsigned char stream_tag; /* assigned stream */ 296 unsigned char stream_tag; /* assigned stream */
277 unsigned char index; /* stream index */ 297 unsigned char index; /* stream index */
278 /* for sanity check of position buffer */ 298 /* for sanity check of position buffer */
@@ -337,6 +357,7 @@ struct azx {
337 357
338 /* flags */ 358 /* flags */
339 int position_fix; 359 int position_fix;
360 unsigned int running :1;
340 unsigned int initialized :1; 361 unsigned int initialized :1;
341 unsigned int single_cmd :1; 362 unsigned int single_cmd :1;
342 unsigned int polling_mode :1; 363 unsigned int polling_mode :1;
@@ -418,7 +439,8 @@ static int azx_alloc_cmd_io(struct azx *chip)
418 int err; 439 int err;
419 440
420 /* single page (at least 4096 bytes) must suffice for both ringbuffes */ 441 /* single page (at least 4096 bytes) must suffice for both ringbuffes */
421 err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 442 err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
443 snd_dma_pci_data(chip->pci),
422 PAGE_SIZE, &chip->rb); 444 PAGE_SIZE, &chip->rb);
423 if (err < 0) { 445 if (err < 0) {
424 snd_printk(KERN_ERR SFX "cannot allocate CORB/RIRB\n"); 446 snd_printk(KERN_ERR SFX "cannot allocate CORB/RIRB\n");
@@ -531,9 +553,9 @@ static unsigned int azx_rirb_get_response(struct hda_codec *codec)
531 azx_update_rirb(chip); 553 azx_update_rirb(chip);
532 spin_unlock_irq(&chip->reg_lock); 554 spin_unlock_irq(&chip->reg_lock);
533 } 555 }
534 if (! chip->rirb.cmds) 556 if (!chip->rirb.cmds)
535 return chip->rirb.res; /* the last value */ 557 return chip->rirb.res; /* the last value */
536 schedule_timeout(1); 558 schedule_timeout_uninterruptible(1);
537 } while (time_after_eq(timeout, jiffies)); 559 } while (time_after_eq(timeout, jiffies));
538 560
539 if (chip->msi) { 561 if (chip->msi) {
@@ -585,16 +607,19 @@ static int azx_single_send_cmd(struct hda_codec *codec, u32 val)
585 607
586 while (timeout--) { 608 while (timeout--) {
587 /* check ICB busy bit */ 609 /* check ICB busy bit */
588 if (! (azx_readw(chip, IRS) & ICH6_IRS_BUSY)) { 610 if (!((azx_readw(chip, IRS) & ICH6_IRS_BUSY))) {
589 /* Clear IRV valid bit */ 611 /* Clear IRV valid bit */
590 azx_writew(chip, IRS, azx_readw(chip, IRS) | ICH6_IRS_VALID); 612 azx_writew(chip, IRS, azx_readw(chip, IRS) |
613 ICH6_IRS_VALID);
591 azx_writel(chip, IC, val); 614 azx_writel(chip, IC, val);
592 azx_writew(chip, IRS, azx_readw(chip, IRS) | ICH6_IRS_BUSY); 615 azx_writew(chip, IRS, azx_readw(chip, IRS) |
616 ICH6_IRS_BUSY);
593 return 0; 617 return 0;
594 } 618 }
595 udelay(1); 619 udelay(1);
596 } 620 }
597 snd_printd(SFX "send_cmd timeout: IRS=0x%x, val=0x%x\n", azx_readw(chip, IRS), val); 621 snd_printd(SFX "send_cmd timeout: IRS=0x%x, val=0x%x\n",
622 azx_readw(chip, IRS), val);
598 return -EIO; 623 return -EIO;
599} 624}
600 625
@@ -610,7 +635,8 @@ static unsigned int azx_single_get_response(struct hda_codec *codec)
610 return azx_readl(chip, IR); 635 return azx_readl(chip, IR);
611 udelay(1); 636 udelay(1);
612 } 637 }
613 snd_printd(SFX "get_response timeout: IRS=0x%x\n", azx_readw(chip, IRS)); 638 snd_printd(SFX "get_response timeout: IRS=0x%x\n",
639 azx_readw(chip, IRS));
614 return (unsigned int)-1; 640 return (unsigned int)-1;
615} 641}
616 642
@@ -652,12 +678,18 @@ static unsigned int azx_get_response(struct hda_codec *codec)
652 return azx_rirb_get_response(codec); 678 return azx_rirb_get_response(codec);
653} 679}
654 680
681#ifdef CONFIG_SND_HDA_POWER_SAVE
682static void azx_power_notify(struct hda_codec *codec);
683#endif
655 684
656/* reset codec link */ 685/* reset codec link */
657static int azx_reset(struct azx *chip) 686static int azx_reset(struct azx *chip)
658{ 687{
659 int count; 688 int count;
660 689
690 /* clear STATESTS */
691 azx_writeb(chip, STATESTS, STATESTS_INT_MASK);
692
661 /* reset controller */ 693 /* reset controller */
662 azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_RESET); 694 azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_RESET);
663 695
@@ -777,18 +809,12 @@ static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev)
777 809
778 810
779/* 811/*
780 * initialize the chip 812 * reset and start the controller registers
781 */ 813 */
782static void azx_init_chip(struct azx *chip) 814static void azx_init_chip(struct azx *chip)
783{ 815{
784 unsigned char reg; 816 if (chip->initialized)
785 817 return;
786 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
787 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
788 * Ensuring these bits are 0 clears playback static on some HD Audio codecs
789 */
790 pci_read_config_byte (chip->pci, ICH6_PCIREG_TCSEL, &reg);
791 pci_write_config_byte(chip->pci, ICH6_PCIREG_TCSEL, reg & 0xf8);
792 818
793 /* reset controller */ 819 /* reset controller */
794 azx_reset(chip); 820 azx_reset(chip);
@@ -805,19 +831,45 @@ static void azx_init_chip(struct azx *chip)
805 azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); 831 azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
806 azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr)); 832 azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
807 833
834 chip->initialized = 1;
835}
836
837/*
838 * initialize the PCI registers
839 */
840/* update bits in a PCI register byte */
841static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
842 unsigned char mask, unsigned char val)
843{
844 unsigned char data;
845
846 pci_read_config_byte(pci, reg, &data);
847 data &= ~mask;
848 data |= (val & mask);
849 pci_write_config_byte(pci, reg, data);
850}
851
852static void azx_init_pci(struct azx *chip)
853{
854 /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
855 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
856 * Ensuring these bits are 0 clears playback static on some HD Audio
857 * codecs
858 */
859 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
860
808 switch (chip->driver_type) { 861 switch (chip->driver_type) {
809 case AZX_DRIVER_ATI: 862 case AZX_DRIVER_ATI:
810 /* For ATI SB450 azalia HD audio, we need to enable snoop */ 863 /* For ATI SB450 azalia HD audio, we need to enable snoop */
811 pci_read_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 864 update_pci_byte(chip->pci,
812 &reg); 865 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
813 pci_write_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 866 0x07, ATI_SB450_HDAUDIO_ENABLE_SNOOP);
814 (reg & 0xf8) | ATI_SB450_HDAUDIO_ENABLE_SNOOP);
815 break; 867 break;
816 case AZX_DRIVER_NVIDIA: 868 case AZX_DRIVER_NVIDIA:
817 /* For NVIDIA HDA, enable snoop */ 869 /* For NVIDIA HDA, enable snoop */
818 pci_read_config_byte(chip->pci,NVIDIA_HDA_TRANSREG_ADDR, &reg); 870 update_pci_byte(chip->pci,
819 pci_write_config_byte(chip->pci,NVIDIA_HDA_TRANSREG_ADDR, 871 NVIDIA_HDA_TRANSREG_ADDR,
820 (reg & 0xf0) | NVIDIA_HDA_ENABLE_COHBITS); 872 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
821 break; 873 break;
822 } 874 }
823} 875}
@@ -857,7 +909,7 @@ static irqreturn_t azx_interrupt(int irq, void *dev_id)
857 /* clear rirb int */ 909 /* clear rirb int */
858 status = azx_readb(chip, RIRBSTS); 910 status = azx_readb(chip, RIRBSTS);
859 if (status & RIRB_INT_MASK) { 911 if (status & RIRB_INT_MASK) {
860 if (! chip->single_cmd && (status & RIRB_INT_RESPONSE)) 912 if (!chip->single_cmd && (status & RIRB_INT_RESPONSE))
861 azx_update_rirb(chip); 913 azx_update_rirb(chip);
862 azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); 914 azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);
863 } 915 }
@@ -911,9 +963,11 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)
911 int timeout; 963 int timeout;
912 964
913 /* make sure the run bit is zero for SD */ 965 /* make sure the run bit is zero for SD */
914 azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & ~SD_CTL_DMA_START); 966 azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) &
967 ~SD_CTL_DMA_START);
915 /* reset stream */ 968 /* reset stream */
916 azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | SD_CTL_STREAM_RESET); 969 azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) |
970 SD_CTL_STREAM_RESET);
917 udelay(3); 971 udelay(3);
918 timeout = 300; 972 timeout = 300;
919 while (!((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && 973 while (!((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) &&
@@ -931,7 +985,7 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)
931 985
932 /* program the stream_tag */ 986 /* program the stream_tag */
933 azx_sd_writel(azx_dev, SD_CTL, 987 azx_sd_writel(azx_dev, SD_CTL,
934 (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK) | 988 (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK)|
935 (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT)); 989 (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT));
936 990
937 /* program the length of samples in cyclic buffer */ 991 /* program the length of samples in cyclic buffer */
@@ -951,11 +1005,13 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev)
951 azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl_addr)); 1005 azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl_addr));
952 1006
953 /* enable the position buffer */ 1007 /* enable the position buffer */
954 if (! (azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) 1008 if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE))
955 azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE); 1009 azx_writel(chip, DPLBASE,
1010 (u32)chip->posbuf.addr |ICH6_DPLBASE_ENABLE);
956 1011
957 /* set the interrupt enable bits in the descriptor control register */ 1012 /* set the interrupt enable bits in the descriptor control register */
958 azx_sd_writel(azx_dev, SD_CTL, azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK); 1013 azx_sd_writel(azx_dev, SD_CTL,
1014 azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK);
959 1015
960 return 0; 1016 return 0;
961} 1017}
@@ -986,8 +1042,12 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model)
986 bus_temp.pci = chip->pci; 1042 bus_temp.pci = chip->pci;
987 bus_temp.ops.command = azx_send_cmd; 1043 bus_temp.ops.command = azx_send_cmd;
988 bus_temp.ops.get_response = azx_get_response; 1044 bus_temp.ops.get_response = azx_get_response;
1045#ifdef CONFIG_SND_HDA_POWER_SAVE
1046 bus_temp.ops.pm_notify = azx_power_notify;
1047#endif
989 1048
990 if ((err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus)) < 0) 1049 err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus);
1050 if (err < 0)
991 return err; 1051 return err;
992 1052
993 codecs = audio_codecs = 0; 1053 codecs = audio_codecs = 0;
@@ -1038,7 +1098,7 @@ static inline struct azx_dev *azx_assign_device(struct azx *chip, int stream)
1038 nums = chip->capture_streams; 1098 nums = chip->capture_streams;
1039 } 1099 }
1040 for (i = 0; i < nums; i++, dev++) 1100 for (i = 0; i < nums; i++, dev++)
1041 if (! chip->azx_dev[dev].opened) { 1101 if (!chip->azx_dev[dev].opened) {
1042 chip->azx_dev[dev].opened = 1; 1102 chip->azx_dev[dev].opened = 1;
1043 return &chip->azx_dev[dev]; 1103 return &chip->azx_dev[dev];
1044 } 1104 }
@@ -1052,7 +1112,8 @@ static inline void azx_release_device(struct azx_dev *azx_dev)
1052} 1112}
1053 1113
1054static struct snd_pcm_hardware azx_pcm_hw = { 1114static struct snd_pcm_hardware azx_pcm_hw = {
1055 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1115 .info = (SNDRV_PCM_INFO_MMAP |
1116 SNDRV_PCM_INFO_INTERLEAVED |
1056 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1117 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1057 SNDRV_PCM_INFO_MMAP_VALID | 1118 SNDRV_PCM_INFO_MMAP_VALID |
1058 /* No full-resume yet implemented */ 1119 /* No full-resume yet implemented */
@@ -1105,8 +1166,11 @@ static int azx_pcm_open(struct snd_pcm_substream *substream)
1105 128); 1166 128);
1106 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1167 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
1107 128); 1168 128);
1108 if ((err = hinfo->ops.open(hinfo, apcm->codec, substream)) < 0) { 1169 snd_hda_power_up(apcm->codec);
1170 err = hinfo->ops.open(hinfo, apcm->codec, substream);
1171 if (err < 0) {
1109 azx_release_device(azx_dev); 1172 azx_release_device(azx_dev);
1173 snd_hda_power_down(apcm->codec);
1110 mutex_unlock(&chip->open_mutex); 1174 mutex_unlock(&chip->open_mutex);
1111 return err; 1175 return err;
1112 } 1176 }
@@ -1135,13 +1199,16 @@ static int azx_pcm_close(struct snd_pcm_substream *substream)
1135 spin_unlock_irqrestore(&chip->reg_lock, flags); 1199 spin_unlock_irqrestore(&chip->reg_lock, flags);
1136 azx_release_device(azx_dev); 1200 azx_release_device(azx_dev);
1137 hinfo->ops.close(hinfo, apcm->codec, substream); 1201 hinfo->ops.close(hinfo, apcm->codec, substream);
1202 snd_hda_power_down(apcm->codec);
1138 mutex_unlock(&chip->open_mutex); 1203 mutex_unlock(&chip->open_mutex);
1139 return 0; 1204 return 0;
1140} 1205}
1141 1206
1142static int azx_pcm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *hw_params) 1207static int azx_pcm_hw_params(struct snd_pcm_substream *substream,
1208 struct snd_pcm_hw_params *hw_params)
1143{ 1209{
1144 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1210 return snd_pcm_lib_malloc_pages(substream,
1211 params_buffer_bytes(hw_params));
1145} 1212}
1146 1213
1147static int azx_pcm_hw_free(struct snd_pcm_substream *substream) 1214static int azx_pcm_hw_free(struct snd_pcm_substream *substream)
@@ -1175,13 +1242,15 @@ static int azx_pcm_prepare(struct snd_pcm_substream *substream)
1175 runtime->channels, 1242 runtime->channels,
1176 runtime->format, 1243 runtime->format,
1177 hinfo->maxbps); 1244 hinfo->maxbps);
1178 if (! azx_dev->format_val) { 1245 if (!azx_dev->format_val) {
1179 snd_printk(KERN_ERR SFX "invalid format_val, rate=%d, ch=%d, format=%d\n", 1246 snd_printk(KERN_ERR SFX
1247 "invalid format_val, rate=%d, ch=%d, format=%d\n",
1180 runtime->rate, runtime->channels, runtime->format); 1248 runtime->rate, runtime->channels, runtime->format);
1181 return -EINVAL; 1249 return -EINVAL;
1182 } 1250 }
1183 1251
1184 snd_printdd("azx_pcm_prepare: bufsize=0x%x, fragsize=0x%x, format=0x%x\n", 1252 snd_printdd("azx_pcm_prepare: bufsize=0x%x, fragsize=0x%x, "
1253 "format=0x%x\n",
1185 azx_dev->bufsize, azx_dev->fragsize, azx_dev->format_val); 1254 azx_dev->bufsize, azx_dev->fragsize, azx_dev->format_val);
1186 azx_setup_periods(azx_dev); 1255 azx_setup_periods(azx_dev);
1187 azx_setup_controller(chip, azx_dev); 1256 azx_setup_controller(chip, azx_dev);
@@ -1223,7 +1292,8 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1223 cmd == SNDRV_PCM_TRIGGER_SUSPEND || 1292 cmd == SNDRV_PCM_TRIGGER_SUSPEND ||
1224 cmd == SNDRV_PCM_TRIGGER_STOP) { 1293 cmd == SNDRV_PCM_TRIGGER_STOP) {
1225 int timeout = 5000; 1294 int timeout = 5000;
1226 while (azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START && --timeout) 1295 while ((azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START) &&
1296 --timeout)
1227 ; 1297 ;
1228 } 1298 }
1229 return err; 1299 return err;
@@ -1241,7 +1311,7 @@ static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream)
1241 /* use the position buffer */ 1311 /* use the position buffer */
1242 pos = le32_to_cpu(*azx_dev->posbuf); 1312 pos = le32_to_cpu(*azx_dev->posbuf);
1243 if (chip->position_fix == POS_FIX_AUTO && 1313 if (chip->position_fix == POS_FIX_AUTO &&
1244 azx_dev->period_intr == 1 && ! pos) { 1314 azx_dev->period_intr == 1 && !pos) {
1245 printk(KERN_WARNING 1315 printk(KERN_WARNING
1246 "hda-intel: Invalid position buffer, " 1316 "hda-intel: Invalid position buffer, "
1247 "using LPIB read method instead.\n"); 1317 "using LPIB read method instead.\n");
@@ -1292,7 +1362,8 @@ static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec,
1292 snd_assert(cpcm->name, return -EINVAL); 1362 snd_assert(cpcm->name, return -EINVAL);
1293 1363
1294 err = snd_pcm_new(chip->card, cpcm->name, pcm_dev, 1364 err = snd_pcm_new(chip->card, cpcm->name, pcm_dev,
1295 cpcm->stream[0].substreams, cpcm->stream[1].substreams, 1365 cpcm->stream[0].substreams,
1366 cpcm->stream[1].substreams,
1296 &pcm); 1367 &pcm);
1297 if (err < 0) 1368 if (err < 0)
1298 return err; 1369 return err;
@@ -1322,26 +1393,27 @@ static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec,
1322 1393
1323static int __devinit azx_pcm_create(struct azx *chip) 1394static int __devinit azx_pcm_create(struct azx *chip)
1324{ 1395{
1325 struct list_head *p;
1326 struct hda_codec *codec; 1396 struct hda_codec *codec;
1327 int c, err; 1397 int c, err;
1328 int pcm_dev; 1398 int pcm_dev;
1329 1399
1330 if ((err = snd_hda_build_pcms(chip->bus)) < 0) 1400 err = snd_hda_build_pcms(chip->bus);
1401 if (err < 0)
1331 return err; 1402 return err;
1332 1403
1333 /* create audio PCMs */ 1404 /* create audio PCMs */
1334 pcm_dev = 0; 1405 pcm_dev = 0;
1335 list_for_each(p, &chip->bus->codec_list) { 1406 list_for_each_entry(codec, &chip->bus->codec_list, list) {
1336 codec = list_entry(p, struct hda_codec, list);
1337 for (c = 0; c < codec->num_pcms; c++) { 1407 for (c = 0; c < codec->num_pcms; c++) {
1338 if (codec->pcm_info[c].is_modem) 1408 if (codec->pcm_info[c].is_modem)
1339 continue; /* create later */ 1409 continue; /* create later */
1340 if (pcm_dev >= AZX_MAX_AUDIO_PCMS) { 1410 if (pcm_dev >= AZX_MAX_AUDIO_PCMS) {
1341 snd_printk(KERN_ERR SFX "Too many audio PCMs\n"); 1411 snd_printk(KERN_ERR SFX
1412 "Too many audio PCMs\n");
1342 return -EINVAL; 1413 return -EINVAL;
1343 } 1414 }
1344 err = create_codec_pcm(chip, codec, &codec->pcm_info[c], pcm_dev); 1415 err = create_codec_pcm(chip, codec,
1416 &codec->pcm_info[c], pcm_dev);
1345 if (err < 0) 1417 if (err < 0)
1346 return err; 1418 return err;
1347 pcm_dev++; 1419 pcm_dev++;
@@ -1350,16 +1422,17 @@ static int __devinit azx_pcm_create(struct azx *chip)
1350 1422
1351 /* create modem PCMs */ 1423 /* create modem PCMs */
1352 pcm_dev = AZX_MAX_AUDIO_PCMS; 1424 pcm_dev = AZX_MAX_AUDIO_PCMS;
1353 list_for_each(p, &chip->bus->codec_list) { 1425 list_for_each_entry(codec, &chip->bus->codec_list, list) {
1354 codec = list_entry(p, struct hda_codec, list);
1355 for (c = 0; c < codec->num_pcms; c++) { 1426 for (c = 0; c < codec->num_pcms; c++) {
1356 if (! codec->pcm_info[c].is_modem) 1427 if (!codec->pcm_info[c].is_modem)
1357 continue; /* already created */ 1428 continue; /* already created */
1358 if (pcm_dev >= AZX_MAX_PCMS) { 1429 if (pcm_dev >= AZX_MAX_PCMS) {
1359 snd_printk(KERN_ERR SFX "Too many modem PCMs\n"); 1430 snd_printk(KERN_ERR SFX
1431 "Too many modem PCMs\n");
1360 return -EINVAL; 1432 return -EINVAL;
1361 } 1433 }
1362 err = create_codec_pcm(chip, codec, &codec->pcm_info[c], pcm_dev); 1434 err = create_codec_pcm(chip, codec,
1435 &codec->pcm_info[c], pcm_dev);
1363 if (err < 0) 1436 if (err < 0)
1364 return err; 1437 return err;
1365 chip->pcm[pcm_dev]->dev_class = SNDRV_PCM_CLASS_MODEM; 1438 chip->pcm[pcm_dev]->dev_class = SNDRV_PCM_CLASS_MODEM;
@@ -1386,7 +1459,8 @@ static int __devinit azx_init_stream(struct azx *chip)
1386 int i; 1459 int i;
1387 1460
1388 /* initialize each stream (aka device) 1461 /* initialize each stream (aka device)
1389 * assign the starting bdl address to each stream (device) and initialize 1462 * assign the starting bdl address to each stream (device)
1463 * and initialize
1390 */ 1464 */
1391 for (i = 0; i < chip->num_streams; i++) { 1465 for (i = 0; i < chip->num_streams; i++) {
1392 unsigned int off = sizeof(u32) * (i * AZX_MAX_FRAG * 4); 1466 unsigned int off = sizeof(u32) * (i * AZX_MAX_FRAG * 4);
@@ -1423,6 +1497,46 @@ static int azx_acquire_irq(struct azx *chip, int do_disconnect)
1423} 1497}
1424 1498
1425 1499
1500static void azx_stop_chip(struct azx *chip)
1501{
1502 if (!chip->initialized)
1503 return;
1504
1505 /* disable interrupts */
1506 azx_int_disable(chip);
1507 azx_int_clear(chip);
1508
1509 /* disable CORB/RIRB */
1510 azx_free_cmd_io(chip);
1511
1512 /* disable position buffer */
1513 azx_writel(chip, DPLBASE, 0);
1514 azx_writel(chip, DPUBASE, 0);
1515
1516 chip->initialized = 0;
1517}
1518
1519#ifdef CONFIG_SND_HDA_POWER_SAVE
1520/* power-up/down the controller */
1521static void azx_power_notify(struct hda_codec *codec)
1522{
1523 struct azx *chip = codec->bus->private_data;
1524 struct hda_codec *c;
1525 int power_on = 0;
1526
1527 list_for_each_entry(c, &codec->bus->codec_list, list) {
1528 if (c->power_on) {
1529 power_on = 1;
1530 break;
1531 }
1532 }
1533 if (power_on)
1534 azx_init_chip(chip);
1535 else if (chip->running && power_save_controller)
1536 azx_stop_chip(chip);
1537}
1538#endif /* CONFIG_SND_HDA_POWER_SAVE */
1539
1426#ifdef CONFIG_PM 1540#ifdef CONFIG_PM
1427/* 1541/*
1428 * power management 1542 * power management
@@ -1436,8 +1550,9 @@ static int azx_suspend(struct pci_dev *pci, pm_message_t state)
1436 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1550 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1437 for (i = 0; i < chip->pcm_devs; i++) 1551 for (i = 0; i < chip->pcm_devs; i++)
1438 snd_pcm_suspend_all(chip->pcm[i]); 1552 snd_pcm_suspend_all(chip->pcm[i]);
1439 snd_hda_suspend(chip->bus, state); 1553 if (chip->initialized)
1440 azx_free_cmd_io(chip); 1554 snd_hda_suspend(chip->bus, state);
1555 azx_stop_chip(chip);
1441 if (chip->irq >= 0) { 1556 if (chip->irq >= 0) {
1442 synchronize_irq(chip->irq); 1557 synchronize_irq(chip->irq);
1443 free_irq(chip->irq, chip); 1558 free_irq(chip->irq, chip);
@@ -1470,7 +1585,11 @@ static int azx_resume(struct pci_dev *pci)
1470 chip->msi = 0; 1585 chip->msi = 0;
1471 if (azx_acquire_irq(chip, 1) < 0) 1586 if (azx_acquire_irq(chip, 1) < 0)
1472 return -EIO; 1587 return -EIO;
1473 azx_init_chip(chip); 1588 azx_init_pci(chip);
1589
1590 if (snd_hda_codecs_inuse(chip->bus))
1591 azx_init_chip(chip);
1592
1474 snd_hda_resume(chip->bus); 1593 snd_hda_resume(chip->bus);
1475 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1594 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1476 return 0; 1595 return 0;
@@ -1485,20 +1604,9 @@ static int azx_free(struct azx *chip)
1485{ 1604{
1486 if (chip->initialized) { 1605 if (chip->initialized) {
1487 int i; 1606 int i;
1488
1489 for (i = 0; i < chip->num_streams; i++) 1607 for (i = 0; i < chip->num_streams; i++)
1490 azx_stream_stop(chip, &chip->azx_dev[i]); 1608 azx_stream_stop(chip, &chip->azx_dev[i]);
1491 1609 azx_stop_chip(chip);
1492 /* disable interrupts */
1493 azx_int_disable(chip);
1494 azx_int_clear(chip);
1495
1496 /* disable CORB/RIRB */
1497 azx_free_cmd_io(chip);
1498
1499 /* disable position buffer */
1500 azx_writel(chip, DPLBASE, 0);
1501 azx_writel(chip, DPUBASE, 0);
1502 } 1610 }
1503 1611
1504 if (chip->irq >= 0) { 1612 if (chip->irq >= 0) {
@@ -1534,6 +1642,7 @@ static int azx_dev_free(struct snd_device *device)
1534 */ 1642 */
1535static struct snd_pci_quirk position_fix_list[] __devinitdata = { 1643static struct snd_pci_quirk position_fix_list[] __devinitdata = {
1536 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_NONE), 1644 SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_NONE),
1645 SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_NONE),
1537 {} 1646 {}
1538}; 1647};
1539 1648
@@ -1544,7 +1653,7 @@ static int __devinit check_position_fix(struct azx *chip, int fix)
1544 if (fix == POS_FIX_AUTO) { 1653 if (fix == POS_FIX_AUTO) {
1545 q = snd_pci_quirk_lookup(chip->pci, position_fix_list); 1654 q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1546 if (q) { 1655 if (q) {
1547 snd_printdd(KERN_INFO 1656 printk(KERN_INFO
1548 "hda_intel: position_fix set to %d " 1657 "hda_intel: position_fix set to %d "
1549 "for device %04x:%04x\n", 1658 "for device %04x:%04x\n",
1550 q->value, q->subvendor, q->subdevice); 1659 q->value, q->subvendor, q->subdevice);
@@ -1555,6 +1664,36 @@ static int __devinit check_position_fix(struct azx *chip, int fix)
1555} 1664}
1556 1665
1557/* 1666/*
1667 * black-lists for probe_mask
1668 */
1669static struct snd_pci_quirk probe_mask_list[] __devinitdata = {
1670 /* Thinkpad often breaks the controller communication when accessing
1671 * to the non-working (or non-existing) modem codec slot.
1672 */
1673 SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1674 SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1675 SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1676 {}
1677};
1678
1679static void __devinit check_probe_mask(struct azx *chip)
1680{
1681 const struct snd_pci_quirk *q;
1682
1683 if (probe_mask == -1) {
1684 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1685 if (q) {
1686 printk(KERN_INFO
1687 "hda_intel: probe_mask set to 0x%x "
1688 "for device %04x:%04x\n",
1689 q->value, q->subvendor, q->subdevice);
1690 probe_mask = q->value;
1691 }
1692 }
1693}
1694
1695
1696/*
1558 * constructor 1697 * constructor
1559 */ 1698 */
1560static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, 1699static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
@@ -1589,6 +1728,7 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
1589 chip->msi = enable_msi; 1728 chip->msi = enable_msi;
1590 1729
1591 chip->position_fix = check_position_fix(chip, position_fix); 1730 chip->position_fix = check_position_fix(chip, position_fix);
1731 check_probe_mask(chip);
1592 1732
1593 chip->single_cmd = single_cmd; 1733 chip->single_cmd = single_cmd;
1594 1734
@@ -1650,37 +1790,43 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
1650 break; 1790 break;
1651 } 1791 }
1652 chip->num_streams = chip->playback_streams + chip->capture_streams; 1792 chip->num_streams = chip->playback_streams + chip->capture_streams;
1653 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), GFP_KERNEL); 1793 chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1794 GFP_KERNEL);
1654 if (!chip->azx_dev) { 1795 if (!chip->azx_dev) {
1655 snd_printk(KERN_ERR "cannot malloc azx_dev\n"); 1796 snd_printk(KERN_ERR "cannot malloc azx_dev\n");
1656 goto errout; 1797 goto errout;
1657 } 1798 }
1658 1799
1659 /* allocate memory for the BDL for each stream */ 1800 /* allocate memory for the BDL for each stream */
1660 if ((err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 1801 err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
1661 BDL_SIZE, &chip->bdl)) < 0) { 1802 snd_dma_pci_data(chip->pci),
1803 BDL_SIZE, &chip->bdl);
1804 if (err < 0) {
1662 snd_printk(KERN_ERR SFX "cannot allocate BDL\n"); 1805 snd_printk(KERN_ERR SFX "cannot allocate BDL\n");
1663 goto errout; 1806 goto errout;
1664 } 1807 }
1665 /* allocate memory for the position buffer */ 1808 /* allocate memory for the position buffer */
1666 if ((err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), 1809 err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
1667 chip->num_streams * 8, &chip->posbuf)) < 0) { 1810 snd_dma_pci_data(chip->pci),
1811 chip->num_streams * 8, &chip->posbuf);
1812 if (err < 0) {
1668 snd_printk(KERN_ERR SFX "cannot allocate posbuf\n"); 1813 snd_printk(KERN_ERR SFX "cannot allocate posbuf\n");
1669 goto errout; 1814 goto errout;
1670 } 1815 }
1671 /* allocate CORB/RIRB */ 1816 /* allocate CORB/RIRB */
1672 if (! chip->single_cmd) 1817 if (!chip->single_cmd) {
1673 if ((err = azx_alloc_cmd_io(chip)) < 0) 1818 err = azx_alloc_cmd_io(chip);
1819 if (err < 0)
1674 goto errout; 1820 goto errout;
1821 }
1675 1822
1676 /* initialize streams */ 1823 /* initialize streams */
1677 azx_init_stream(chip); 1824 azx_init_stream(chip);
1678 1825
1679 /* initialize chip */ 1826 /* initialize chip */
1827 azx_init_pci(chip);
1680 azx_init_chip(chip); 1828 azx_init_chip(chip);
1681 1829
1682 chip->initialized = 1;
1683
1684 /* codec detection */ 1830 /* codec detection */
1685 if (!chip->codec_mask) { 1831 if (!chip->codec_mask) {
1686 snd_printk(KERN_ERR SFX "no codecs found!\n"); 1832 snd_printk(KERN_ERR SFX "no codecs found!\n");
@@ -1688,14 +1834,16 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
1688 goto errout; 1834 goto errout;
1689 } 1835 }
1690 1836
1691 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) <0) { 1837 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1838 if (err <0) {
1692 snd_printk(KERN_ERR SFX "Error creating device [card]!\n"); 1839 snd_printk(KERN_ERR SFX "Error creating device [card]!\n");
1693 goto errout; 1840 goto errout;
1694 } 1841 }
1695 1842
1696 strcpy(card->driver, "HDA-Intel"); 1843 strcpy(card->driver, "HDA-Intel");
1697 strcpy(card->shortname, driver_short_names[chip->driver_type]); 1844 strcpy(card->shortname, driver_short_names[chip->driver_type]);
1698 sprintf(card->longname, "%s at 0x%lx irq %i", card->shortname, chip->addr, chip->irq); 1845 sprintf(card->longname, "%s at 0x%lx irq %i",
1846 card->shortname, chip->addr, chip->irq);
1699 1847
1700 *rchip = chip; 1848 *rchip = chip;
1701 return 0; 1849 return 0;
@@ -1705,7 +1853,21 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
1705 return err; 1853 return err;
1706} 1854}
1707 1855
1708static int __devinit azx_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1856static void power_down_all_codecs(struct azx *chip)
1857{
1858#ifdef CONFIG_SND_HDA_POWER_SAVE
1859 /* The codecs were powered up in snd_hda_codec_new().
1860 * Now all initialization done, so turn them down if possible
1861 */
1862 struct hda_codec *codec;
1863 list_for_each_entry(codec, &chip->bus->codec_list, list) {
1864 snd_hda_power_down(codec);
1865 }
1866#endif
1867}
1868
1869static int __devinit azx_probe(struct pci_dev *pci,
1870 const struct pci_device_id *pci_id)
1709{ 1871{
1710 struct snd_card *card; 1872 struct snd_card *card;
1711 struct azx *chip; 1873 struct azx *chip;
@@ -1725,31 +1887,37 @@ static int __devinit azx_probe(struct pci_dev *pci, const struct pci_device_id *
1725 card->private_data = chip; 1887 card->private_data = chip;
1726 1888
1727 /* create codec instances */ 1889 /* create codec instances */
1728 if ((err = azx_codec_create(chip, model)) < 0) { 1890 err = azx_codec_create(chip, model);
1891 if (err < 0) {
1729 snd_card_free(card); 1892 snd_card_free(card);
1730 return err; 1893 return err;
1731 } 1894 }
1732 1895
1733 /* create PCM streams */ 1896 /* create PCM streams */
1734 if ((err = azx_pcm_create(chip)) < 0) { 1897 err = azx_pcm_create(chip);
1898 if (err < 0) {
1735 snd_card_free(card); 1899 snd_card_free(card);
1736 return err; 1900 return err;
1737 } 1901 }
1738 1902
1739 /* create mixer controls */ 1903 /* create mixer controls */
1740 if ((err = azx_mixer_create(chip)) < 0) { 1904 err = azx_mixer_create(chip);
1905 if (err < 0) {
1741 snd_card_free(card); 1906 snd_card_free(card);
1742 return err; 1907 return err;
1743 } 1908 }
1744 1909
1745 snd_card_set_dev(card, &pci->dev); 1910 snd_card_set_dev(card, &pci->dev);
1746 1911
1747 if ((err = snd_card_register(card)) < 0) { 1912 err = snd_card_register(card);
1913 if (err < 0) {
1748 snd_card_free(card); 1914 snd_card_free(card);
1749 return err; 1915 return err;
1750 } 1916 }
1751 1917
1752 pci_set_drvdata(pci, card); 1918 pci_set_drvdata(pci, card);
1919 chip->running = 1;
1920 power_down_all_codecs(chip);
1753 1921
1754 return err; 1922 return err;
1755} 1923}
@@ -1791,6 +1959,10 @@ static struct pci_device_id azx_ids[] = {
1791 { 0x10de, 0x0775, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ 1959 { 0x10de, 0x0775, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */
1792 { 0x10de, 0x0776, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ 1960 { 0x10de, 0x0776, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */
1793 { 0x10de, 0x0777, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ 1961 { 0x10de, 0x0777, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */
1962 { 0x10de, 0x0ac0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP79 */
1963 { 0x10de, 0x0ac1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP79 */
1964 { 0x10de, 0x0ac2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP79 */
1965 { 0x10de, 0x0ac3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP79 */
1794 { 0, } 1966 { 0, }
1795}; 1967};
1796MODULE_DEVICE_TABLE(pci, azx_ids); 1968MODULE_DEVICE_TABLE(pci, azx_ids);