diff options
Diffstat (limited to 'sound/pci/hda/hda_intel.c')
-rw-r--r-- | sound/pci/hda/hda_intel.c | 146 |
1 files changed, 122 insertions, 24 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 1c53e337ecb2..9f316c1b2790 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -222,9 +222,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; | |||
222 | #define RIRB_INT_OVERRUN 0x04 | 222 | #define RIRB_INT_OVERRUN 0x04 |
223 | #define RIRB_INT_MASK 0x05 | 223 | #define RIRB_INT_MASK 0x05 |
224 | 224 | ||
225 | /* STATESTS int mask: SD2,SD1,SD0 */ | 225 | /* STATESTS int mask: S3,SD2,SD1,SD0 */ |
226 | #define AZX_MAX_CODECS 3 | 226 | #define AZX_MAX_CODECS 4 |
227 | #define STATESTS_INT_MASK 0x07 | 227 | #define STATESTS_INT_MASK 0x0f |
228 | 228 | ||
229 | /* SD_CTL bits */ | 229 | /* SD_CTL bits */ |
230 | #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ | 230 | #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ |
@@ -286,6 +286,11 @@ enum { | |||
286 | #define INTEL_SCH_HDA_DEVC 0x78 | 286 | #define INTEL_SCH_HDA_DEVC 0x78 |
287 | #define INTEL_SCH_HDA_DEVC_NOSNOOP (0x1<<11) | 287 | #define INTEL_SCH_HDA_DEVC_NOSNOOP (0x1<<11) |
288 | 288 | ||
289 | /* Define IN stream 0 FIFO size offset in VIA controller */ | ||
290 | #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90 | ||
291 | /* Define VIA HD Audio Device ID*/ | ||
292 | #define VIA_HDAC_DEVICE_ID 0x3288 | ||
293 | |||
289 | 294 | ||
290 | /* | 295 | /* |
291 | */ | 296 | */ |
@@ -317,6 +322,12 @@ struct azx_dev { | |||
317 | unsigned int running :1; | 322 | unsigned int running :1; |
318 | unsigned int irq_pending :1; | 323 | unsigned int irq_pending :1; |
319 | unsigned int irq_ignore :1; | 324 | unsigned int irq_ignore :1; |
325 | /* | ||
326 | * For VIA: | ||
327 | * A flag to ensure DMA position is 0 | ||
328 | * when link position is not greater than FIFO size | ||
329 | */ | ||
330 | unsigned int insufficient :1; | ||
320 | }; | 331 | }; |
321 | 332 | ||
322 | /* CORB/RIRB */ | 333 | /* CORB/RIRB */ |
@@ -379,6 +390,7 @@ struct azx { | |||
379 | unsigned int polling_mode :1; | 390 | unsigned int polling_mode :1; |
380 | unsigned int msi :1; | 391 | unsigned int msi :1; |
381 | unsigned int irq_pending_warned :1; | 392 | unsigned int irq_pending_warned :1; |
393 | unsigned int via_dmapos_patch :1; /* enable DMA-position fix for VIA */ | ||
382 | 394 | ||
383 | /* for debugging */ | 395 | /* for debugging */ |
384 | unsigned int last_cmd; /* last issued command (to sync) */ | 396 | unsigned int last_cmd; /* last issued command (to sync) */ |
@@ -398,6 +410,7 @@ enum { | |||
398 | AZX_DRIVER_ULI, | 410 | AZX_DRIVER_ULI, |
399 | AZX_DRIVER_NVIDIA, | 411 | AZX_DRIVER_NVIDIA, |
400 | AZX_DRIVER_TERA, | 412 | AZX_DRIVER_TERA, |
413 | AZX_NUM_DRIVERS, /* keep this as last entry */ | ||
401 | }; | 414 | }; |
402 | 415 | ||
403 | static char *driver_short_names[] __devinitdata = { | 416 | static char *driver_short_names[] __devinitdata = { |
@@ -818,6 +831,11 @@ static void azx_int_clear(struct azx *chip) | |||
818 | /* start a stream */ | 831 | /* start a stream */ |
819 | static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) | 832 | static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) |
820 | { | 833 | { |
834 | /* | ||
835 | * Before stream start, initialize parameter | ||
836 | */ | ||
837 | azx_dev->insufficient = 1; | ||
838 | |||
821 | /* enable SIE */ | 839 | /* enable SIE */ |
822 | azx_writeb(chip, INTCTL, | 840 | azx_writeb(chip, INTCTL, |
823 | azx_readb(chip, INTCTL) | (1 << azx_dev->index)); | 841 | azx_readb(chip, INTCTL) | (1 << azx_dev->index)); |
@@ -998,7 +1016,6 @@ static int setup_bdle(struct snd_pcm_substream *substream, | |||
998 | struct azx_dev *azx_dev, u32 **bdlp, | 1016 | struct azx_dev *azx_dev, u32 **bdlp, |
999 | int ofs, int size, int with_ioc) | 1017 | int ofs, int size, int with_ioc) |
1000 | { | 1018 | { |
1001 | struct snd_sg_buf *sgbuf = snd_pcm_substream_sgbuf(substream); | ||
1002 | u32 *bdl = *bdlp; | 1019 | u32 *bdl = *bdlp; |
1003 | 1020 | ||
1004 | while (size > 0) { | 1021 | while (size > 0) { |
@@ -1008,14 +1025,12 @@ static int setup_bdle(struct snd_pcm_substream *substream, | |||
1008 | if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES) | 1025 | if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES) |
1009 | return -EINVAL; | 1026 | return -EINVAL; |
1010 | 1027 | ||
1011 | addr = snd_pcm_sgbuf_get_addr(sgbuf, ofs); | 1028 | addr = snd_pcm_sgbuf_get_addr(substream, ofs); |
1012 | /* program the address field of the BDL entry */ | 1029 | /* program the address field of the BDL entry */ |
1013 | bdl[0] = cpu_to_le32((u32)addr); | 1030 | bdl[0] = cpu_to_le32((u32)addr); |
1014 | bdl[1] = cpu_to_le32(upper_32_bits(addr)); | 1031 | bdl[1] = cpu_to_le32(upper_32_bits(addr)); |
1015 | /* program the size field of the BDL entry */ | 1032 | /* program the size field of the BDL entry */ |
1016 | chunk = PAGE_SIZE - (ofs % PAGE_SIZE); | 1033 | chunk = snd_pcm_sgbuf_get_chunk_size(substream, ofs, size); |
1017 | if (size < chunk) | ||
1018 | chunk = size; | ||
1019 | bdl[2] = cpu_to_le32(chunk); | 1034 | bdl[2] = cpu_to_le32(chunk); |
1020 | /* program the IOC to enable interrupt | 1035 | /* program the IOC to enable interrupt |
1021 | * only when the whole fragment is processed | 1036 | * only when the whole fragment is processed |
@@ -1151,7 +1166,8 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) | |||
1151 | 1166 | ||
1152 | /* enable the position buffer */ | 1167 | /* enable the position buffer */ |
1153 | if (chip->position_fix == POS_FIX_POSBUF || | 1168 | if (chip->position_fix == POS_FIX_POSBUF || |
1154 | chip->position_fix == POS_FIX_AUTO) { | 1169 | chip->position_fix == POS_FIX_AUTO || |
1170 | chip->via_dmapos_patch) { | ||
1155 | if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) | 1171 | if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) |
1156 | azx_writel(chip, DPLBASE, | 1172 | azx_writel(chip, DPLBASE, |
1157 | (u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE); | 1173 | (u32)chip->posbuf.addr | ICH6_DPLBASE_ENABLE); |
@@ -1169,23 +1185,26 @@ static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) | |||
1169 | * Codec initialization | 1185 | * Codec initialization |
1170 | */ | 1186 | */ |
1171 | 1187 | ||
1172 | static unsigned int azx_max_codecs[] __devinitdata = { | 1188 | /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */ |
1173 | [AZX_DRIVER_ICH] = 4, /* Some ICH9 boards use SD3 */ | 1189 | static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] __devinitdata = { |
1174 | [AZX_DRIVER_SCH] = 3, | ||
1175 | [AZX_DRIVER_ATI] = 4, | ||
1176 | [AZX_DRIVER_ATIHDMI] = 4, | ||
1177 | [AZX_DRIVER_VIA] = 3, /* FIXME: correct? */ | ||
1178 | [AZX_DRIVER_SIS] = 3, /* FIXME: correct? */ | ||
1179 | [AZX_DRIVER_ULI] = 3, /* FIXME: correct? */ | ||
1180 | [AZX_DRIVER_NVIDIA] = 3, /* FIXME: correct? */ | ||
1181 | [AZX_DRIVER_TERA] = 1, | 1190 | [AZX_DRIVER_TERA] = 1, |
1182 | }; | 1191 | }; |
1183 | 1192 | ||
1193 | /* number of slots to probe as default | ||
1194 | * this can be different from azx_max_codecs[] -- e.g. some boards | ||
1195 | * report wrongly the non-existing 4th slot availability | ||
1196 | */ | ||
1197 | static unsigned int azx_default_codecs[AZX_NUM_DRIVERS] __devinitdata = { | ||
1198 | [AZX_DRIVER_ICH] = 3, | ||
1199 | [AZX_DRIVER_ATI] = 3, | ||
1200 | }; | ||
1201 | |||
1184 | static int __devinit azx_codec_create(struct azx *chip, const char *model, | 1202 | static int __devinit azx_codec_create(struct azx *chip, const char *model, |
1185 | unsigned int codec_probe_mask) | 1203 | unsigned int codec_probe_mask) |
1186 | { | 1204 | { |
1187 | struct hda_bus_template bus_temp; | 1205 | struct hda_bus_template bus_temp; |
1188 | int c, codecs, audio_codecs, err; | 1206 | int c, codecs, audio_codecs, err; |
1207 | int def_slots, max_slots; | ||
1189 | 1208 | ||
1190 | memset(&bus_temp, 0, sizeof(bus_temp)); | 1209 | memset(&bus_temp, 0, sizeof(bus_temp)); |
1191 | bus_temp.private_data = chip; | 1210 | bus_temp.private_data = chip; |
@@ -1201,8 +1220,17 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model, | |||
1201 | if (err < 0) | 1220 | if (err < 0) |
1202 | return err; | 1221 | return err; |
1203 | 1222 | ||
1223 | if (chip->driver_type == AZX_DRIVER_NVIDIA) | ||
1224 | chip->bus->needs_damn_long_delay = 1; | ||
1225 | |||
1204 | codecs = audio_codecs = 0; | 1226 | codecs = audio_codecs = 0; |
1205 | for (c = 0; c < AZX_MAX_CODECS; c++) { | 1227 | max_slots = azx_max_codecs[chip->driver_type]; |
1228 | if (!max_slots) | ||
1229 | max_slots = AZX_MAX_CODECS; | ||
1230 | def_slots = azx_default_codecs[chip->driver_type]; | ||
1231 | if (!def_slots) | ||
1232 | def_slots = max_slots; | ||
1233 | for (c = 0; c < def_slots; c++) { | ||
1206 | if ((chip->codec_mask & (1 << c)) & codec_probe_mask) { | 1234 | if ((chip->codec_mask & (1 << c)) & codec_probe_mask) { |
1207 | struct hda_codec *codec; | 1235 | struct hda_codec *codec; |
1208 | err = snd_hda_codec_new(chip->bus, c, &codec); | 1236 | err = snd_hda_codec_new(chip->bus, c, &codec); |
@@ -1215,7 +1243,7 @@ static int __devinit azx_codec_create(struct azx *chip, const char *model, | |||
1215 | } | 1243 | } |
1216 | if (!audio_codecs) { | 1244 | if (!audio_codecs) { |
1217 | /* probe additional slots if no codec is found */ | 1245 | /* probe additional slots if no codec is found */ |
1218 | for (; c < azx_max_codecs[chip->driver_type]; c++) { | 1246 | for (; c < max_slots; c++) { |
1219 | if ((chip->codec_mask & (1 << c)) & codec_probe_mask) { | 1247 | if ((chip->codec_mask & (1 << c)) & codec_probe_mask) { |
1220 | err = snd_hda_codec_new(chip->bus, c, NULL); | 1248 | err = snd_hda_codec_new(chip->bus, c, NULL); |
1221 | if (err < 0) | 1249 | if (err < 0) |
@@ -1507,13 +1535,71 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) | |||
1507 | return 0; | 1535 | return 0; |
1508 | } | 1536 | } |
1509 | 1537 | ||
1538 | /* get the current DMA position with correction on VIA chips */ | ||
1539 | static unsigned int azx_via_get_position(struct azx *chip, | ||
1540 | struct azx_dev *azx_dev) | ||
1541 | { | ||
1542 | unsigned int link_pos, mini_pos, bound_pos; | ||
1543 | unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos; | ||
1544 | unsigned int fifo_size; | ||
1545 | |||
1546 | link_pos = azx_sd_readl(azx_dev, SD_LPIB); | ||
1547 | if (azx_dev->index >= 4) { | ||
1548 | /* Playback, no problem using link position */ | ||
1549 | return link_pos; | ||
1550 | } | ||
1551 | |||
1552 | /* Capture */ | ||
1553 | /* For new chipset, | ||
1554 | * use mod to get the DMA position just like old chipset | ||
1555 | */ | ||
1556 | mod_dma_pos = le32_to_cpu(*azx_dev->posbuf); | ||
1557 | mod_dma_pos %= azx_dev->period_bytes; | ||
1558 | |||
1559 | /* azx_dev->fifo_size can't get FIFO size of in stream. | ||
1560 | * Get from base address + offset. | ||
1561 | */ | ||
1562 | fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET); | ||
1563 | |||
1564 | if (azx_dev->insufficient) { | ||
1565 | /* Link position never gather than FIFO size */ | ||
1566 | if (link_pos <= fifo_size) | ||
1567 | return 0; | ||
1568 | |||
1569 | azx_dev->insufficient = 0; | ||
1570 | } | ||
1571 | |||
1572 | if (link_pos <= fifo_size) | ||
1573 | mini_pos = azx_dev->bufsize + link_pos - fifo_size; | ||
1574 | else | ||
1575 | mini_pos = link_pos - fifo_size; | ||
1576 | |||
1577 | /* Find nearest previous boudary */ | ||
1578 | mod_mini_pos = mini_pos % azx_dev->period_bytes; | ||
1579 | mod_link_pos = link_pos % azx_dev->period_bytes; | ||
1580 | if (mod_link_pos >= fifo_size) | ||
1581 | bound_pos = link_pos - mod_link_pos; | ||
1582 | else if (mod_dma_pos >= mod_mini_pos) | ||
1583 | bound_pos = mini_pos - mod_mini_pos; | ||
1584 | else { | ||
1585 | bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes; | ||
1586 | if (bound_pos >= azx_dev->bufsize) | ||
1587 | bound_pos = 0; | ||
1588 | } | ||
1589 | |||
1590 | /* Calculate real DMA position we want */ | ||
1591 | return bound_pos + mod_dma_pos; | ||
1592 | } | ||
1593 | |||
1510 | static unsigned int azx_get_position(struct azx *chip, | 1594 | static unsigned int azx_get_position(struct azx *chip, |
1511 | struct azx_dev *azx_dev) | 1595 | struct azx_dev *azx_dev) |
1512 | { | 1596 | { |
1513 | unsigned int pos; | 1597 | unsigned int pos; |
1514 | 1598 | ||
1515 | if (chip->position_fix == POS_FIX_POSBUF || | 1599 | if (chip->via_dmapos_patch) |
1516 | chip->position_fix == POS_FIX_AUTO) { | 1600 | pos = azx_via_get_position(chip, azx_dev); |
1601 | else if (chip->position_fix == POS_FIX_POSBUF || | ||
1602 | chip->position_fix == POS_FIX_AUTO) { | ||
1517 | /* use the position buffer */ | 1603 | /* use the position buffer */ |
1518 | pos = le32_to_cpu(*azx_dev->posbuf); | 1604 | pos = le32_to_cpu(*azx_dev->posbuf); |
1519 | } else { | 1605 | } else { |
@@ -1559,6 +1645,8 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev) | |||
1559 | chip->position_fix = POS_FIX_POSBUF; | 1645 | chip->position_fix = POS_FIX_POSBUF; |
1560 | } | 1646 | } |
1561 | 1647 | ||
1648 | if (!bdl_pos_adj[chip->dev_index]) | ||
1649 | return 1; /* no delayed ack */ | ||
1562 | if (pos % azx_dev->period_bytes > azx_dev->period_bytes / 2) | 1650 | if (pos % azx_dev->period_bytes > azx_dev->period_bytes / 2) |
1563 | return 0; /* NG - it's below the period boundary */ | 1651 | return 0; /* NG - it's below the period boundary */ |
1564 | return 1; /* OK, it's fine */ | 1652 | return 1; /* OK, it's fine */ |
@@ -1646,7 +1734,8 @@ static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec, | |||
1646 | if (!cpcm->stream[0].substreams && !cpcm->stream[1].substreams) | 1734 | if (!cpcm->stream[0].substreams && !cpcm->stream[1].substreams) |
1647 | return 0; | 1735 | return 0; |
1648 | 1736 | ||
1649 | snd_assert(cpcm->name, return -EINVAL); | 1737 | if (snd_BUG_ON(!cpcm->name)) |
1738 | return -EINVAL; | ||
1650 | 1739 | ||
1651 | err = snd_pcm_new(chip->card, cpcm->name, cpcm->device, | 1740 | err = snd_pcm_new(chip->card, cpcm->name, cpcm->device, |
1652 | cpcm->stream[0].substreams, | 1741 | cpcm->stream[0].substreams, |
@@ -1670,7 +1759,7 @@ static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec, | |||
1670 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &azx_pcm_ops); | 1759 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &azx_pcm_ops); |
1671 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, | 1760 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
1672 | snd_dma_pci_data(chip->pci), | 1761 | snd_dma_pci_data(chip->pci), |
1673 | 1024 * 64, 1024 * 1024); | 1762 | 1024 * 64, 32 * 1024 * 1024); |
1674 | chip->pcm[cpcm->device] = pcm; | 1763 | chip->pcm[cpcm->device] = pcm; |
1675 | return 0; | 1764 | return 0; |
1676 | } | 1765 | } |
@@ -1946,6 +2035,15 @@ static int __devinit check_position_fix(struct azx *chip, int fix) | |||
1946 | { | 2035 | { |
1947 | const struct snd_pci_quirk *q; | 2036 | const struct snd_pci_quirk *q; |
1948 | 2037 | ||
2038 | /* Check VIA HD Audio Controller exist */ | ||
2039 | if (chip->pci->vendor == PCI_VENDOR_ID_VIA && | ||
2040 | chip->pci->device == VIA_HDAC_DEVICE_ID) { | ||
2041 | chip->via_dmapos_patch = 1; | ||
2042 | /* Use link position directly, avoid any transfer problem. */ | ||
2043 | return POS_FIX_LPIB; | ||
2044 | } | ||
2045 | chip->via_dmapos_patch = 0; | ||
2046 | |||
1949 | if (fix == POS_FIX_AUTO) { | 2047 | if (fix == POS_FIX_AUTO) { |
1950 | q = snd_pci_quirk_lookup(chip->pci, position_fix_list); | 2048 | q = snd_pci_quirk_lookup(chip->pci, position_fix_list); |
1951 | if (q) { | 2049 | if (q) { |