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Diffstat (limited to 'sound/pci/cs46xx/cs46xx_lib.c')
-rw-r--r--sound/pci/cs46xx/cs46xx_lib.c22
1 files changed, 16 insertions, 6 deletions
diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c
index 1be96ead4244..3f99a5e8528c 100644
--- a/sound/pci/cs46xx/cs46xx_lib.c
+++ b/sound/pci/cs46xx/cs46xx_lib.c
@@ -2238,11 +2238,11 @@ static void snd_cs46xx_codec_reset (struct snd_ac97 * ac97)
2238 2238
2239 /* set the desired CODEC mode */ 2239 /* set the desired CODEC mode */
2240 if (ac97->num == CS46XX_PRIMARY_CODEC_INDEX) { 2240 if (ac97->num == CS46XX_PRIMARY_CODEC_INDEX) {
2241 snd_printdd("cs46xx: CODOEC1 mode %04x\n",0x0); 2241 snd_printdd("cs46xx: CODEC1 mode %04x\n", 0x0);
2242 snd_cs46xx_ac97_write(ac97,AC97_CSR_ACMODE,0x0); 2242 snd_cs46xx_ac97_write(ac97, AC97_CSR_ACMODE, 0x0);
2243 } else if (ac97->num == CS46XX_SECONDARY_CODEC_INDEX) { 2243 } else if (ac97->num == CS46XX_SECONDARY_CODEC_INDEX) {
2244 snd_printdd("cs46xx: CODOEC2 mode %04x\n",0x3); 2244 snd_printdd("cs46xx: CODEC2 mode %04x\n", 0x3);
2245 snd_cs46xx_ac97_write(ac97,AC97_CSR_ACMODE,0x3); 2245 snd_cs46xx_ac97_write(ac97, AC97_CSR_ACMODE, 0x3);
2246 } else { 2246 } else {
2247 snd_BUG(); /* should never happen ... */ 2247 snd_BUG(); /* should never happen ... */
2248 } 2248 }
@@ -2266,7 +2266,7 @@ static void snd_cs46xx_codec_reset (struct snd_ac97 * ac97)
2266 return; 2266 return;
2267 2267
2268 /* test if we can write to the record gain volume register */ 2268 /* test if we can write to the record gain volume register */
2269 snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x8a05); 2269 snd_ac97_write(ac97, AC97_REC_GAIN, 0x8a05);
2270 if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05) 2270 if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05)
2271 return; 2271 return;
2272 2272
@@ -3597,7 +3597,7 @@ static struct cs_card_type __devinitdata cards[] = {
3597#ifdef CONFIG_PM 3597#ifdef CONFIG_PM
3598static unsigned int saved_regs[] = { 3598static unsigned int saved_regs[] = {
3599 BA0_ACOSV, 3599 BA0_ACOSV,
3600 BA0_ASER_FADDR, 3600 /*BA0_ASER_FADDR,*/
3601 BA0_ASER_MASTER, 3601 BA0_ASER_MASTER,
3602 BA1_PVOL, 3602 BA1_PVOL,
3603 BA1_CVOL, 3603 BA1_CVOL,
@@ -3644,6 +3644,7 @@ int snd_cs46xx_resume(struct pci_dev *pci)
3644#ifdef CONFIG_SND_CS46XX_NEW_DSP 3644#ifdef CONFIG_SND_CS46XX_NEW_DSP
3645 int i; 3645 int i;
3646#endif 3646#endif
3647 unsigned int tmp;
3647 3648
3648 pci_set_power_state(pci, PCI_D0); 3649 pci_set_power_state(pci, PCI_D0);
3649 pci_restore_state(pci); 3650 pci_restore_state(pci);
@@ -3685,6 +3686,15 @@ int snd_cs46xx_resume(struct pci_dev *pci)
3685 snd_ac97_resume(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]); 3686 snd_ac97_resume(chip->ac97[CS46XX_PRIMARY_CODEC_INDEX]);
3686 snd_ac97_resume(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]); 3687 snd_ac97_resume(chip->ac97[CS46XX_SECONDARY_CODEC_INDEX]);
3687 3688
3689 /*
3690 * Stop capture DMA.
3691 */
3692 tmp = snd_cs46xx_peek(chip, BA1_CCTL);
3693 chip->capt.ctl = tmp & 0x0000ffff;
3694 snd_cs46xx_poke(chip, BA1_CCTL, tmp & 0xffff0000);
3695
3696 mdelay(5);
3697
3688 /* reset playback/capture */ 3698 /* reset playback/capture */
3689 snd_cs46xx_set_play_sample_rate(chip, 8000); 3699 snd_cs46xx_set_play_sample_rate(chip, 8000);
3690 snd_cs46xx_set_capture_sample_rate(chip, 8000); 3700 snd_cs46xx_set_capture_sample_rate(chip, 8000);