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Diffstat (limited to 'sound/pci/cs46xx/cs46xx_lib.c')
-rw-r--r--sound/pci/cs46xx/cs46xx_lib.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c
index fd4c50c88bc9..ff28af1f658e 100644
--- a/sound/pci/cs46xx/cs46xx_lib.c
+++ b/sound/pci/cs46xx/cs46xx_lib.c
@@ -2400,8 +2400,7 @@ static void snd_cs46xx_codec_reset (ac97_t * ac97)
2400 if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05) 2400 if ((err = snd_ac97_read(ac97, AC97_REC_GAIN)) == 0x8a05)
2401 return; 2401 return;
2402 2402
2403 set_current_state(TASK_UNINTERRUPTIBLE); 2403 msleep(10);
2404 schedule_timeout(HZ/100);
2405 } while (time_after_eq(end_time, jiffies)); 2404 } while (time_after_eq(end_time, jiffies));
2406 2405
2407 snd_printk("CS46xx secondary codec dont respond!\n"); 2406 snd_printk("CS46xx secondary codec dont respond!\n");
@@ -2435,8 +2434,7 @@ static int __devinit cs46xx_detect_codec(cs46xx_t *chip, int codec)
2435 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97[codec]); 2434 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97[codec]);
2436 return err; 2435 return err;
2437 } 2436 }
2438 set_current_state(TASK_INTERRUPTIBLE); 2437 msleep(10);
2439 schedule_timeout(HZ/100);
2440 } 2438 }
2441 snd_printdd("snd_cs46xx: codec %d detection timeout\n", codec); 2439 snd_printdd("snd_cs46xx: codec %d detection timeout\n", codec);
2442 return -ENXIO; 2440 return -ENXIO;
@@ -3018,8 +3016,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip)
3018 /* 3016 /*
3019 * Wait until the PLL has stabilized. 3017 * Wait until the PLL has stabilized.
3020 */ 3018 */
3021 set_current_state(TASK_UNINTERRUPTIBLE); 3019 msleep(100);
3022 schedule_timeout(HZ/10); /* 100ms */
3023 3020
3024 /* 3021 /*
3025 * Turn on clocking of the core so that we can setup the serial ports. 3022 * Turn on clocking of the core so that we can setup the serial ports.
@@ -3072,8 +3069,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip)
3072 */ 3069 */
3073 if (snd_cs46xx_peekBA0(chip, BA0_ACSTS) & ACSTS_CRDY) 3070 if (snd_cs46xx_peekBA0(chip, BA0_ACSTS) & ACSTS_CRDY)
3074 goto ok1; 3071 goto ok1;
3075 set_current_state(TASK_UNINTERRUPTIBLE); 3072 msleep(10);
3076 schedule_timeout((HZ+99)/100);
3077 } 3073 }
3078 3074
3079 3075
@@ -3122,8 +3118,7 @@ static int snd_cs46xx_chip_init(cs46xx_t *chip)
3122 */ 3118 */
3123 if ((snd_cs46xx_peekBA0(chip, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4)) 3119 if ((snd_cs46xx_peekBA0(chip, BA0_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) == (ACISV_ISV3 | ACISV_ISV4))
3124 goto ok2; 3120 goto ok2;
3125 set_current_state(TASK_UNINTERRUPTIBLE); 3121 msleep(10);
3126 schedule_timeout((HZ+99)/100);
3127 } 3122 }
3128 3123
3129#ifndef CONFIG_SND_CS46XX_NEW_DSP 3124#ifndef CONFIG_SND_CS46XX_NEW_DSP