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-rw-r--r--sound/oss/Kconfig4
-rw-r--r--sound/oss/Makefile1
-rw-r--r--sound/oss/ac97_codec.c1203
-rw-r--r--sound/oss/au1550_ac97.c2147
4 files changed, 0 insertions, 3355 deletions
diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig
index 76c090218073..6c93e051f9ae 100644
--- a/sound/oss/Kconfig
+++ b/sound/oss/Kconfig
@@ -22,10 +22,6 @@ config SOUND_VWSND
22 <file:Documentation/sound/oss/vwsnd> for more info on this driver's 22 <file:Documentation/sound/oss/vwsnd> for more info on this driver's
23 capabilities. 23 capabilities.
24 24
25config SOUND_AU1550_AC97
26 tristate "Au1550/Au1200 AC97 Sound"
27 depends on SOC_AU1550 || SOC_AU1200
28
29config SOUND_MSNDCLAS 25config SOUND_MSNDCLAS
30 tristate "Support for Turtle Beach MultiSound Classic, Tahiti, Monterey" 26 tristate "Support for Turtle Beach MultiSound Classic, Tahiti, Monterey"
31 depends on (m || !STANDALONE) && ISA 27 depends on (m || !STANDALONE) && ISA
diff --git a/sound/oss/Makefile b/sound/oss/Makefile
index 90ffb99c6b17..77f21b68bf0f 100644
--- a/sound/oss/Makefile
+++ b/sound/oss/Makefile
@@ -25,7 +25,6 @@ obj-$(CONFIG_SOUND_WAVEARTIST) += waveartist.o
25obj-$(CONFIG_SOUND_MSNDCLAS) += msnd.o msnd_classic.o 25obj-$(CONFIG_SOUND_MSNDCLAS) += msnd.o msnd_classic.o
26obj-$(CONFIG_SOUND_MSNDPIN) += msnd.o msnd_pinnacle.o 26obj-$(CONFIG_SOUND_MSNDPIN) += msnd.o msnd_pinnacle.o
27obj-$(CONFIG_SOUND_VWSND) += vwsnd.o 27obj-$(CONFIG_SOUND_VWSND) += vwsnd.o
28obj-$(CONFIG_SOUND_AU1550_AC97) += au1550_ac97.o ac97_codec.o
29obj-$(CONFIG_SOUND_BCM_CS4297A) += swarm_cs4297a.o 28obj-$(CONFIG_SOUND_BCM_CS4297A) += swarm_cs4297a.o
30 29
31obj-$(CONFIG_DMASOUND) += dmasound/ 30obj-$(CONFIG_DMASOUND) += dmasound/
diff --git a/sound/oss/ac97_codec.c b/sound/oss/ac97_codec.c
deleted file mode 100644
index 0cd23d94888f..000000000000
--- a/sound/oss/ac97_codec.c
+++ /dev/null
@@ -1,1203 +0,0 @@
1/*
2 * ac97_codec.c: Generic AC97 mixer/modem module
3 *
4 * Derived from ac97 mixer in maestro and trident driver.
5 *
6 * Copyright 2000 Silicon Integrated System Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 **************************************************************************
23 *
24 * The Intel Audio Codec '97 specification is available at:
25 * http://download.intel.com/support/motherboards/desktop/sb/ac97_r23.pdf
26 *
27 **************************************************************************
28 *
29 * History
30 * May 02, 2003 Liam Girdwood <lrg@slimlogic.co.uk>
31 * Removed non existent WM9700
32 * Added support for WM9705, WM9708, WM9709, WM9710, WM9711
33 * WM9712 and WM9717
34 * Mar 28, 2002 Randolph Bentson <bentson@holmsjoen.com>
35 * corrections to support WM9707 in ViewPad 1000
36 * v0.4 Mar 15 2000 Ollie Lho
37 * dual codecs support verified with 4 channels output
38 * v0.3 Feb 22 2000 Ollie Lho
39 * bug fix for record mask setting
40 * v0.2 Feb 10 2000 Ollie Lho
41 * add ac97_read_proc for /proc/driver/{vendor}/ac97
42 * v0.1 Jan 14 2000 Ollie Lho <ollie@sis.com.tw>
43 * Isolated from trident.c to support multiple ac97 codec
44 */
45#include <linux/module.h>
46#include <linux/kernel.h>
47#include <linux/slab.h>
48#include <linux/string.h>
49#include <linux/errno.h>
50#include <linux/bitops.h>
51#include <linux/delay.h>
52#include <linux/pci.h>
53#include <linux/ac97_codec.h>
54#include <asm/uaccess.h>
55#include <linux/mutex.h>
56
57#define CODEC_ID_BUFSZ 14
58
59static int ac97_read_mixer(struct ac97_codec *codec, int oss_channel);
60static void ac97_write_mixer(struct ac97_codec *codec, int oss_channel,
61 unsigned int left, unsigned int right);
62static void ac97_set_mixer(struct ac97_codec *codec, unsigned int oss_mixer, unsigned int val );
63static int ac97_recmask_io(struct ac97_codec *codec, int rw, int mask);
64static int ac97_mixer_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg);
65
66static int ac97_init_mixer(struct ac97_codec *codec);
67
68static int wolfson_init03(struct ac97_codec * codec);
69static int wolfson_init04(struct ac97_codec * codec);
70static int wolfson_init05(struct ac97_codec * codec);
71static int wolfson_init11(struct ac97_codec * codec);
72static int wolfson_init13(struct ac97_codec * codec);
73static int tritech_init(struct ac97_codec * codec);
74static int tritech_maestro_init(struct ac97_codec * codec);
75static int sigmatel_9708_init(struct ac97_codec *codec);
76static int sigmatel_9721_init(struct ac97_codec *codec);
77static int sigmatel_9744_init(struct ac97_codec *codec);
78static int ad1886_init(struct ac97_codec *codec);
79static int eapd_control(struct ac97_codec *codec, int);
80static int crystal_digital_control(struct ac97_codec *codec, int slots, int rate, int mode);
81static int cmedia_init(struct ac97_codec * codec);
82static int cmedia_digital_control(struct ac97_codec *codec, int slots, int rate, int mode);
83static int generic_digital_control(struct ac97_codec *codec, int slots, int rate, int mode);
84
85
86/*
87 * AC97 operations.
88 *
89 * If you are adding a codec then you should be able to use
90 * eapd_ops - any codec that supports EAPD amp control (most)
91 * null_ops - any ancient codec that supports nothing
92 *
93 * The three functions are
94 * init - used for non AC97 standard initialisation
95 * amplifier - used to do amplifier control (1=on 0=off)
96 * digital - switch to digital modes (0 = analog)
97 *
98 * Not all codecs support all features, not all drivers use all the
99 * operations yet
100 */
101
102static struct ac97_ops null_ops = { NULL, NULL, NULL };
103static struct ac97_ops default_ops = { NULL, eapd_control, NULL };
104static struct ac97_ops default_digital_ops = { NULL, eapd_control, generic_digital_control};
105static struct ac97_ops wolfson_ops03 = { wolfson_init03, NULL, NULL };
106static struct ac97_ops wolfson_ops04 = { wolfson_init04, NULL, NULL };
107static struct ac97_ops wolfson_ops05 = { wolfson_init05, NULL, NULL };
108static struct ac97_ops wolfson_ops11 = { wolfson_init11, NULL, NULL };
109static struct ac97_ops wolfson_ops13 = { wolfson_init13, NULL, NULL };
110static struct ac97_ops tritech_ops = { tritech_init, NULL, NULL };
111static struct ac97_ops tritech_m_ops = { tritech_maestro_init, NULL, NULL };
112static struct ac97_ops sigmatel_9708_ops = { sigmatel_9708_init, NULL, NULL };
113static struct ac97_ops sigmatel_9721_ops = { sigmatel_9721_init, NULL, NULL };
114static struct ac97_ops sigmatel_9744_ops = { sigmatel_9744_init, NULL, NULL };
115static struct ac97_ops crystal_digital_ops = { NULL, eapd_control, crystal_digital_control };
116static struct ac97_ops ad1886_ops = { ad1886_init, eapd_control, NULL };
117static struct ac97_ops cmedia_ops = { NULL, eapd_control, NULL};
118static struct ac97_ops cmedia_digital_ops = { cmedia_init, eapd_control, cmedia_digital_control};
119
120/* sorted by vendor/device id */
121static const struct {
122 u32 id;
123 char *name;
124 struct ac97_ops *ops;
125 int flags;
126} ac97_codec_ids[] = {
127 {0x41445303, "Analog Devices AD1819", &null_ops},
128 {0x41445340, "Analog Devices AD1881", &null_ops},
129 {0x41445348, "Analog Devices AD1881A", &null_ops},
130 {0x41445360, "Analog Devices AD1885", &default_ops},
131 {0x41445361, "Analog Devices AD1886", &ad1886_ops},
132 {0x41445370, "Analog Devices AD1981", &null_ops},
133 {0x41445372, "Analog Devices AD1981A", &null_ops},
134 {0x41445374, "Analog Devices AD1981B", &null_ops},
135 {0x41445460, "Analog Devices AD1885", &default_ops},
136 {0x41445461, "Analog Devices AD1886", &ad1886_ops},
137 {0x414B4D00, "Asahi Kasei AK4540", &null_ops},
138 {0x414B4D01, "Asahi Kasei AK4542", &null_ops},
139 {0x414B4D02, "Asahi Kasei AK4543", &null_ops},
140 {0x414C4326, "ALC100P", &null_ops},
141 {0x414C4710, "ALC200/200P", &null_ops},
142 {0x414C4720, "ALC650", &default_digital_ops},
143 {0x434D4941, "CMedia", &cmedia_ops, AC97_NO_PCM_VOLUME },
144 {0x434D4942, "CMedia", &cmedia_ops, AC97_NO_PCM_VOLUME },
145 {0x434D4961, "CMedia", &cmedia_digital_ops, AC97_NO_PCM_VOLUME },
146 {0x43525900, "Cirrus Logic CS4297", &default_ops},
147 {0x43525903, "Cirrus Logic CS4297", &default_ops},
148 {0x43525913, "Cirrus Logic CS4297A rev A", &default_ops},
149 {0x43525914, "Cirrus Logic CS4297A rev B", &default_ops},
150 {0x43525923, "Cirrus Logic CS4298", &null_ops},
151 {0x4352592B, "Cirrus Logic CS4294", &null_ops},
152 {0x4352592D, "Cirrus Logic CS4294", &null_ops},
153 {0x43525931, "Cirrus Logic CS4299 rev A", &crystal_digital_ops},
154 {0x43525933, "Cirrus Logic CS4299 rev C", &crystal_digital_ops},
155 {0x43525934, "Cirrus Logic CS4299 rev D", &crystal_digital_ops},
156 {0x43585430, "CXT48", &default_ops, AC97_DELUDED_MODEM },
157 {0x43585442, "CXT66", &default_ops, AC97_DELUDED_MODEM },
158 {0x44543031, "Diamond Technology DT0893", &default_ops},
159 {0x45838308, "ESS Allegro ES1988", &null_ops},
160 {0x49434511, "ICE1232", &null_ops}, /* I hope --jk */
161 {0x4e534331, "National Semiconductor LM4549", &null_ops},
162 {0x53494c22, "Silicon Laboratory Si3036", &null_ops},
163 {0x53494c23, "Silicon Laboratory Si3038", &null_ops},
164 {0x545200FF, "TriTech TR?????", &tritech_m_ops},
165 {0x54524102, "TriTech TR28022", &null_ops},
166 {0x54524103, "TriTech TR28023", &null_ops},
167 {0x54524106, "TriTech TR28026", &null_ops},
168 {0x54524108, "TriTech TR28028", &tritech_ops},
169 {0x54524123, "TriTech TR A5", &null_ops},
170 {0x574D4C03, "Wolfson WM9703/07/08/17", &wolfson_ops03},
171 {0x574D4C04, "Wolfson WM9704M/WM9704Q", &wolfson_ops04},
172 {0x574D4C05, "Wolfson WM9705/WM9710", &wolfson_ops05},
173 {0x574D4C09, "Wolfson WM9709", &null_ops},
174 {0x574D4C12, "Wolfson WM9711/9712", &wolfson_ops11},
175 {0x574D4C13, "Wolfson WM9713", &wolfson_ops13, AC97_DEFAULT_POWER_OFF},
176 {0x83847600, "SigmaTel STAC????", &null_ops},
177 {0x83847604, "SigmaTel STAC9701/3/4/5", &null_ops},
178 {0x83847605, "SigmaTel STAC9704", &null_ops},
179 {0x83847608, "SigmaTel STAC9708", &sigmatel_9708_ops},
180 {0x83847609, "SigmaTel STAC9721/23", &sigmatel_9721_ops},
181 {0x83847644, "SigmaTel STAC9744/45", &sigmatel_9744_ops},
182 {0x83847652, "SigmaTel STAC9752/53", &default_ops},
183 {0x83847656, "SigmaTel STAC9756/57", &sigmatel_9744_ops},
184 {0x83847666, "SigmaTel STAC9750T", &sigmatel_9744_ops},
185 {0x83847684, "SigmaTel STAC9783/84?", &null_ops},
186 {0x57454301, "Winbond 83971D", &null_ops},
187};
188
189/* this table has default mixer values for all OSS mixers. */
190static struct mixer_defaults {
191 int mixer;
192 unsigned int value;
193} mixer_defaults[SOUND_MIXER_NRDEVICES] = {
194 /* all values 0 -> 100 in bytes */
195 {SOUND_MIXER_VOLUME, 0x4343},
196 {SOUND_MIXER_BASS, 0x4343},
197 {SOUND_MIXER_TREBLE, 0x4343},
198 {SOUND_MIXER_PCM, 0x4343},
199 {SOUND_MIXER_SPEAKER, 0x4343},
200 {SOUND_MIXER_LINE, 0x4343},
201 {SOUND_MIXER_MIC, 0x0000},
202 {SOUND_MIXER_CD, 0x4343},
203 {SOUND_MIXER_ALTPCM, 0x4343},
204 {SOUND_MIXER_IGAIN, 0x4343},
205 {SOUND_MIXER_LINE1, 0x4343},
206 {SOUND_MIXER_PHONEIN, 0x4343},
207 {SOUND_MIXER_PHONEOUT, 0x4343},
208 {SOUND_MIXER_VIDEO, 0x4343},
209 {-1,0}
210};
211
212/* table to scale scale from OSS mixer value to AC97 mixer register value */
213static struct ac97_mixer_hw {
214 unsigned char offset;
215 int scale;
216} ac97_hw[SOUND_MIXER_NRDEVICES]= {
217 [SOUND_MIXER_VOLUME] = {AC97_MASTER_VOL_STEREO,64},
218 [SOUND_MIXER_BASS] = {AC97_MASTER_TONE, 16},
219 [SOUND_MIXER_TREBLE] = {AC97_MASTER_TONE, 16},
220 [SOUND_MIXER_PCM] = {AC97_PCMOUT_VOL, 32},
221 [SOUND_MIXER_SPEAKER] = {AC97_PCBEEP_VOL, 16},
222 [SOUND_MIXER_LINE] = {AC97_LINEIN_VOL, 32},
223 [SOUND_MIXER_MIC] = {AC97_MIC_VOL, 32},
224 [SOUND_MIXER_CD] = {AC97_CD_VOL, 32},
225 [SOUND_MIXER_ALTPCM] = {AC97_HEADPHONE_VOL, 64},
226 [SOUND_MIXER_IGAIN] = {AC97_RECORD_GAIN, 16},
227 [SOUND_MIXER_LINE1] = {AC97_AUX_VOL, 32},
228 [SOUND_MIXER_PHONEIN] = {AC97_PHONE_VOL, 32},
229 [SOUND_MIXER_PHONEOUT] = {AC97_MASTER_VOL_MONO, 64},
230 [SOUND_MIXER_VIDEO] = {AC97_VIDEO_VOL, 32},
231};
232
233/* the following tables allow us to go from OSS <-> ac97 quickly. */
234enum ac97_recsettings {
235 AC97_REC_MIC=0,
236 AC97_REC_CD,
237 AC97_REC_VIDEO,
238 AC97_REC_AUX,
239 AC97_REC_LINE,
240 AC97_REC_STEREO, /* combination of all enabled outputs.. */
241 AC97_REC_MONO, /*.. or the mono equivalent */
242 AC97_REC_PHONE
243};
244
245static const unsigned int ac97_rm2oss[] = {
246 [AC97_REC_MIC] = SOUND_MIXER_MIC,
247 [AC97_REC_CD] = SOUND_MIXER_CD,
248 [AC97_REC_VIDEO] = SOUND_MIXER_VIDEO,
249 [AC97_REC_AUX] = SOUND_MIXER_LINE1,
250 [AC97_REC_LINE] = SOUND_MIXER_LINE,
251 [AC97_REC_STEREO]= SOUND_MIXER_IGAIN,
252 [AC97_REC_PHONE] = SOUND_MIXER_PHONEIN
253};
254
255/* indexed by bit position */
256static const unsigned int ac97_oss_rm[] = {
257 [SOUND_MIXER_MIC] = AC97_REC_MIC,
258 [SOUND_MIXER_CD] = AC97_REC_CD,
259 [SOUND_MIXER_VIDEO] = AC97_REC_VIDEO,
260 [SOUND_MIXER_LINE1] = AC97_REC_AUX,
261 [SOUND_MIXER_LINE] = AC97_REC_LINE,
262 [SOUND_MIXER_IGAIN] = AC97_REC_STEREO,
263 [SOUND_MIXER_PHONEIN] = AC97_REC_PHONE
264};
265
266static LIST_HEAD(codecs);
267static LIST_HEAD(codec_drivers);
268static DEFINE_MUTEX(codec_mutex);
269
270/* reads the given OSS mixer from the ac97 the caller must have insured that the ac97 knows
271 about that given mixer, and should be holding a spinlock for the card */
272static int ac97_read_mixer(struct ac97_codec *codec, int oss_channel)
273{
274 u16 val;
275 int ret = 0;
276 int scale;
277 struct ac97_mixer_hw *mh = &ac97_hw[oss_channel];
278
279 val = codec->codec_read(codec , mh->offset);
280
281 if (val & AC97_MUTE) {
282 ret = 0;
283 } else if (AC97_STEREO_MASK & (1 << oss_channel)) {
284 /* nice stereo mixers .. */
285 int left,right;
286
287 left = (val >> 8) & 0x7f;
288 right = val & 0x7f;
289
290 if (oss_channel == SOUND_MIXER_IGAIN) {
291 right = (right * 100) / mh->scale;
292 left = (left * 100) / mh->scale;
293 } else {
294 /* these may have 5 or 6 bit resolution */
295 if(oss_channel == SOUND_MIXER_VOLUME || oss_channel == SOUND_MIXER_ALTPCM)
296 scale = (1 << codec->bit_resolution);
297 else
298 scale = mh->scale;
299
300 right = 100 - ((right * 100) / scale);
301 left = 100 - ((left * 100) / scale);
302 }
303 ret = left | (right << 8);
304 } else if (oss_channel == SOUND_MIXER_SPEAKER) {
305 ret = 100 - ((((val & 0x1e)>>1) * 100) / mh->scale);
306 } else if (oss_channel == SOUND_MIXER_PHONEIN) {
307 ret = 100 - (((val & 0x1f) * 100) / mh->scale);
308 } else if (oss_channel == SOUND_MIXER_PHONEOUT) {
309 scale = (1 << codec->bit_resolution);
310 ret = 100 - (((val & 0x1f) * 100) / scale);
311 } else if (oss_channel == SOUND_MIXER_MIC) {
312 ret = 100 - (((val & 0x1f) * 100) / mh->scale);
313 /* the low bit is optional in the tone sliders and masking
314 it lets us avoid the 0xf 'bypass'.. */
315 } else if (oss_channel == SOUND_MIXER_BASS) {
316 ret = 100 - ((((val >> 8) & 0xe) * 100) / mh->scale);
317 } else if (oss_channel == SOUND_MIXER_TREBLE) {
318 ret = 100 - (((val & 0xe) * 100) / mh->scale);
319 }
320
321#ifdef DEBUG
322 printk("ac97_codec: read OSS mixer %2d (%s ac97 register 0x%02x), "
323 "0x%04x -> 0x%04x\n",
324 oss_channel, codec->id ? "Secondary" : "Primary",
325 mh->offset, val, ret);
326#endif
327
328 return ret;
329}
330
331/* write the OSS encoded volume to the given OSS encoded mixer, again caller's job to
332 make sure all is well in arg land, call with spinlock held */
333static void ac97_write_mixer(struct ac97_codec *codec, int oss_channel,
334 unsigned int left, unsigned int right)
335{
336 u16 val = 0;
337 int scale;
338 struct ac97_mixer_hw *mh = &ac97_hw[oss_channel];
339
340#ifdef DEBUG
341 printk("ac97_codec: wrote OSS mixer %2d (%s ac97 register 0x%02x), "
342 "left vol:%2d, right vol:%2d:",
343 oss_channel, codec->id ? "Secondary" : "Primary",
344 mh->offset, left, right);
345#endif
346
347 if (AC97_STEREO_MASK & (1 << oss_channel)) {
348 /* stereo mixers */
349 if (left == 0 && right == 0) {
350 val = AC97_MUTE;
351 } else {
352 if (oss_channel == SOUND_MIXER_IGAIN) {
353 right = (right * mh->scale) / 100;
354 left = (left * mh->scale) / 100;
355 if (right >= mh->scale)
356 right = mh->scale-1;
357 if (left >= mh->scale)
358 left = mh->scale-1;
359 } else {
360 /* these may have 5 or 6 bit resolution */
361 if (oss_channel == SOUND_MIXER_VOLUME ||
362 oss_channel == SOUND_MIXER_ALTPCM)
363 scale = (1 << codec->bit_resolution);
364 else
365 scale = mh->scale;
366
367 right = ((100 - right) * scale) / 100;
368 left = ((100 - left) * scale) / 100;
369 if (right >= scale)
370 right = scale-1;
371 if (left >= scale)
372 left = scale-1;
373 }
374 val = (left << 8) | right;
375 }
376 } else if (oss_channel == SOUND_MIXER_BASS) {
377 val = codec->codec_read(codec , mh->offset) & ~0x0f00;
378 left = ((100 - left) * mh->scale) / 100;
379 if (left >= mh->scale)
380 left = mh->scale-1;
381 val |= (left << 8) & 0x0e00;
382 } else if (oss_channel == SOUND_MIXER_TREBLE) {
383 val = codec->codec_read(codec , mh->offset) & ~0x000f;
384 left = ((100 - left) * mh->scale) / 100;
385 if (left >= mh->scale)
386 left = mh->scale-1;
387 val |= left & 0x000e;
388 } else if(left == 0) {
389 val = AC97_MUTE;
390 } else if (oss_channel == SOUND_MIXER_SPEAKER) {
391 left = ((100 - left) * mh->scale) / 100;
392 if (left >= mh->scale)
393 left = mh->scale-1;
394 val = left << 1;
395 } else if (oss_channel == SOUND_MIXER_PHONEIN) {
396 left = ((100 - left) * mh->scale) / 100;
397 if (left >= mh->scale)
398 left = mh->scale-1;
399 val = left;
400 } else if (oss_channel == SOUND_MIXER_PHONEOUT) {
401 scale = (1 << codec->bit_resolution);
402 left = ((100 - left) * scale) / 100;
403 if (left >= mh->scale)
404 left = mh->scale-1;
405 val = left;
406 } else if (oss_channel == SOUND_MIXER_MIC) {
407 val = codec->codec_read(codec , mh->offset) & ~0x801f;
408 left = ((100 - left) * mh->scale) / 100;
409 if (left >= mh->scale)
410 left = mh->scale-1;
411 val |= left;
412 /* the low bit is optional in the tone sliders and masking
413 it lets us avoid the 0xf 'bypass'.. */
414 }
415#ifdef DEBUG
416 printk(" 0x%04x", val);
417#endif
418
419 codec->codec_write(codec, mh->offset, val);
420
421#ifdef DEBUG
422 val = codec->codec_read(codec, mh->offset);
423 printk(" -> 0x%04x\n", val);
424#endif
425}
426
427/* a thin wrapper for write_mixer */
428static void ac97_set_mixer(struct ac97_codec *codec, unsigned int oss_mixer, unsigned int val )
429{
430 unsigned int left,right;
431
432 /* cleanse input a little */
433 right = ((val >> 8) & 0xff) ;
434 left = (val & 0xff) ;
435
436 if (right > 100) right = 100;
437 if (left > 100) left = 100;
438
439 codec->mixer_state[oss_mixer] = (right << 8) | left;
440 codec->write_mixer(codec, oss_mixer, left, right);
441}
442
443/* read or write the recmask, the ac97 can really have left and right recording
444 inputs independently set, but OSS doesn't seem to want us to express that to
445 the user. the caller guarantees that we have a supported bit set, and they
446 must be holding the card's spinlock */
447static int ac97_recmask_io(struct ac97_codec *codec, int rw, int mask)
448{
449 unsigned int val;
450
451 if (rw) {
452 /* read it from the card */
453 val = codec->codec_read(codec, AC97_RECORD_SELECT);
454#ifdef DEBUG
455 printk("ac97_codec: ac97 recmask to set to 0x%04x\n", val);
456#endif
457 return (1 << ac97_rm2oss[val & 0x07]);
458 }
459
460 /* else, write the first set in the mask as the
461 output */
462 /* clear out current set value first (AC97 supports only 1 input!) */
463 val = (1 << ac97_rm2oss[codec->codec_read(codec, AC97_RECORD_SELECT) & 0x07]);
464 if (mask != val)
465 mask &= ~val;
466
467 val = ffs(mask);
468 val = ac97_oss_rm[val-1];
469 val |= val << 8; /* set both channels */
470
471#ifdef DEBUG
472 printk("ac97_codec: setting ac97 recmask to 0x%04x\n", val);
473#endif
474
475 codec->codec_write(codec, AC97_RECORD_SELECT, val);
476
477 return 0;
478};
479
480static int ac97_mixer_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg)
481{
482 int i, val = 0;
483
484 if (cmd == SOUND_MIXER_INFO) {
485 mixer_info info;
486 memset(&info, 0, sizeof(info));
487 strlcpy(info.id, codec->name, sizeof(info.id));
488 strlcpy(info.name, codec->name, sizeof(info.name));
489 info.modify_counter = codec->modcnt;
490 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
491 return -EFAULT;
492 return 0;
493 }
494 if (cmd == SOUND_OLD_MIXER_INFO) {
495 _old_mixer_info info;
496 memset(&info, 0, sizeof(info));
497 strlcpy(info.id, codec->name, sizeof(info.id));
498 strlcpy(info.name, codec->name, sizeof(info.name));
499 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
500 return -EFAULT;
501 return 0;
502 }
503
504 if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
505 return -EINVAL;
506
507 if (cmd == OSS_GETVERSION)
508 return put_user(SOUND_VERSION, (int __user *)arg);
509
510 if (_SIOC_DIR(cmd) == _SIOC_READ) {
511 switch (_IOC_NR(cmd)) {
512 case SOUND_MIXER_RECSRC: /* give them the current record source */
513 if (!codec->recmask_io) {
514 val = 0;
515 } else {
516 val = codec->recmask_io(codec, 1, 0);
517 }
518 break;
519
520 case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
521 val = codec->supported_mixers;
522 break;
523
524 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
525 val = codec->record_sources;
526 break;
527
528 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
529 val = codec->stereo_mixers;
530 break;
531
532 case SOUND_MIXER_CAPS:
533 val = SOUND_CAP_EXCL_INPUT;
534 break;
535
536 default: /* read a specific mixer */
537 i = _IOC_NR(cmd);
538
539 if (!supported_mixer(codec, i))
540 return -EINVAL;
541
542 /* do we ever want to touch the hardware? */
543 /* val = codec->read_mixer(codec, i); */
544 val = codec->mixer_state[i];
545 break;
546 }
547 return put_user(val, (int __user *)arg);
548 }
549
550 if (_SIOC_DIR(cmd) == (_SIOC_WRITE|_SIOC_READ)) {
551 codec->modcnt++;
552 if (get_user(val, (int __user *)arg))
553 return -EFAULT;
554
555 switch (_IOC_NR(cmd)) {
556 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
557 if (!codec->recmask_io) return -EINVAL;
558 if (!val) return 0;
559 if (!(val &= codec->record_sources)) return -EINVAL;
560
561 codec->recmask_io(codec, 0, val);
562
563 return 0;
564 default: /* write a specific mixer */
565 i = _IOC_NR(cmd);
566
567 if (!supported_mixer(codec, i))
568 return -EINVAL;
569
570 ac97_set_mixer(codec, i, val);
571
572 return 0;
573 }
574 }
575 return -EINVAL;
576}
577
578/**
579 * codec_id - Turn id1/id2 into a PnP string
580 * @id1: Vendor ID1
581 * @id2: Vendor ID2
582 * @buf: CODEC_ID_BUFSZ byte buffer
583 *
584 * Fills buf with a zero terminated PnP ident string for the id1/id2
585 * pair. For convenience the return is the passed in buffer pointer.
586 */
587
588static char *codec_id(u16 id1, u16 id2, char *buf)
589{
590 if(id1&0x8080) {
591 snprintf(buf, CODEC_ID_BUFSZ, "0x%04x:0x%04x", id1, id2);
592 } else {
593 buf[0] = (id1 >> 8);
594 buf[1] = (id1 & 0xFF);
595 buf[2] = (id2 >> 8);
596 snprintf(buf+3, CODEC_ID_BUFSZ - 3, "%d", id2&0xFF);
597 }
598 return buf;
599}
600
601/**
602 * ac97_check_modem - Check if the Codec is a modem
603 * @codec: codec to check
604 *
605 * Return true if the device is an AC97 1.0 or AC97 2.0 modem
606 */
607
608static int ac97_check_modem(struct ac97_codec *codec)
609{
610 /* Check for an AC97 1.0 soft modem (ID1) */
611 if(codec->codec_read(codec, AC97_RESET) & 2)
612 return 1;
613 /* Check for an AC97 2.x soft modem */
614 codec->codec_write(codec, AC97_EXTENDED_MODEM_ID, 0L);
615 if(codec->codec_read(codec, AC97_EXTENDED_MODEM_ID) & 1)
616 return 1;
617 return 0;
618}
619
620
621/**
622 * ac97_alloc_codec - Allocate an AC97 codec
623 *
624 * Returns a new AC97 codec structure. AC97 codecs may become
625 * refcounted soon so this interface is needed. Returns with
626 * one reference taken.
627 */
628
629struct ac97_codec *ac97_alloc_codec(void)
630{
631 struct ac97_codec *codec = kzalloc(sizeof(struct ac97_codec), GFP_KERNEL);
632 if(!codec)
633 return NULL;
634
635 spin_lock_init(&codec->lock);
636 INIT_LIST_HEAD(&codec->list);
637 return codec;
638}
639
640EXPORT_SYMBOL(ac97_alloc_codec);
641
642/**
643 * ac97_release_codec - Release an AC97 codec
644 * @codec: codec to release
645 *
646 * Release an allocated AC97 codec. This will be refcounted in
647 * time but for the moment is trivial. Calls the unregister
648 * handler if the codec is now defunct.
649 */
650
651void ac97_release_codec(struct ac97_codec *codec)
652{
653 /* Remove from the list first, we don't want to be
654 "rediscovered" */
655 mutex_lock(&codec_mutex);
656 list_del(&codec->list);
657 mutex_unlock(&codec_mutex);
658 /*
659 * The driver needs to deal with internal
660 * locking to avoid accidents here.
661 */
662 if(codec->driver)
663 codec->driver->remove(codec, codec->driver);
664 kfree(codec);
665}
666
667EXPORT_SYMBOL(ac97_release_codec);
668
669/**
670 * ac97_probe_codec - Initialize and setup AC97-compatible codec
671 * @codec: (in/out) Kernel info for a single AC97 codec
672 *
673 * Reset the AC97 codec, then initialize the mixer and
674 * the rest of the @codec structure.
675 *
676 * The codec_read and codec_write fields of @codec are
677 * required to be setup and working when this function
678 * is called. All other fields are set by this function.
679 *
680 * codec_wait field of @codec can optionally be provided
681 * when calling this function. If codec_wait is not %NULL,
682 * this function will call codec_wait any time it is
683 * necessary to wait for the audio chip to reach the
684 * codec-ready state. If codec_wait is %NULL, then
685 * the default behavior is to call schedule_timeout.
686 * Currently codec_wait is used to wait for AC97 codec
687 * reset to complete.
688 *
689 * Some codecs will power down when a register reset is
690 * performed. We now check for such codecs.
691 *
692 * Returns 1 (true) on success, or 0 (false) on failure.
693 */
694
695int ac97_probe_codec(struct ac97_codec *codec)
696{
697 u16 id1, id2;
698 u16 audio;
699 int i;
700 char cidbuf[CODEC_ID_BUFSZ];
701 u16 f;
702 struct list_head *l;
703 struct ac97_driver *d;
704
705 /* wait for codec-ready state */
706 if (codec->codec_wait)
707 codec->codec_wait(codec);
708 else
709 udelay(10);
710
711 /* will the codec power down if register reset ? */
712 id1 = codec->codec_read(codec, AC97_VENDOR_ID1);
713 id2 = codec->codec_read(codec, AC97_VENDOR_ID2);
714 codec->name = NULL;
715 codec->codec_ops = &null_ops;
716 for (i = 0; i < ARRAY_SIZE(ac97_codec_ids); i++) {
717 if (ac97_codec_ids[i].id == ((id1 << 16) | id2)) {
718 codec->type = ac97_codec_ids[i].id;
719 codec->name = ac97_codec_ids[i].name;
720 codec->codec_ops = ac97_codec_ids[i].ops;
721 codec->flags = ac97_codec_ids[i].flags;
722 break;
723 }
724 }
725
726 codec->model = (id1 << 16) | id2;
727 if ((codec->flags & AC97_DEFAULT_POWER_OFF) == 0) {
728 /* reset codec and wait for the ready bit before we continue */
729 codec->codec_write(codec, AC97_RESET, 0L);
730 if (codec->codec_wait)
731 codec->codec_wait(codec);
732 else
733 udelay(10);
734 }
735
736 /* probing AC97 codec, AC97 2.0 says that bit 15 of register 0x00 (reset) should
737 * be read zero.
738 *
739 * FIXME: is the following comment outdated? -jgarzik
740 * Probing of AC97 in this way is not reliable, it is not even SAFE !!
741 */
742 if ((audio = codec->codec_read(codec, AC97_RESET)) & 0x8000) {
743 printk(KERN_ERR "ac97_codec: %s ac97 codec not present\n",
744 (codec->id & 0x2) ? (codec->id&1 ? "4th" : "Tertiary")
745 : (codec->id&1 ? "Secondary": "Primary"));
746 return 0;
747 }
748
749 /* probe for Modem Codec */
750 codec->modem = ac97_check_modem(codec);
751
752 /* enable SPDIF */
753 f = codec->codec_read(codec, AC97_EXTENDED_STATUS);
754 if((codec->codec_ops == &null_ops) && (f & 4))
755 codec->codec_ops = &default_digital_ops;
756
757 /* A device which thinks its a modem but isn't */
758 if(codec->flags & AC97_DELUDED_MODEM)
759 codec->modem = 0;
760
761 if (codec->name == NULL)
762 codec->name = "Unknown";
763 printk(KERN_INFO "ac97_codec: AC97 %s codec, id: %s (%s)\n",
764 codec->modem ? "Modem" : (audio ? "Audio" : ""),
765 codec_id(id1, id2, cidbuf), codec->name);
766
767 if(!ac97_init_mixer(codec))
768 return 0;
769
770 /*
771 * Attach last so the caller can override the mixer
772 * callbacks.
773 */
774
775 mutex_lock(&codec_mutex);
776 list_add(&codec->list, &codecs);
777
778 list_for_each(l, &codec_drivers) {
779 d = list_entry(l, struct ac97_driver, list);
780 if ((codec->model ^ d->codec_id) & d->codec_mask)
781 continue;
782 if(d->probe(codec, d) == 0)
783 {
784 codec->driver = d;
785 break;
786 }
787 }
788
789 mutex_unlock(&codec_mutex);
790 return 1;
791}
792
793static int ac97_init_mixer(struct ac97_codec *codec)
794{
795 u16 cap;
796 int i;
797
798 cap = codec->codec_read(codec, AC97_RESET);
799
800 /* mixer masks */
801 codec->supported_mixers = AC97_SUPPORTED_MASK;
802 codec->stereo_mixers = AC97_STEREO_MASK;
803 codec->record_sources = AC97_RECORD_MASK;
804 if (!(cap & 0x04))
805 codec->supported_mixers &= ~(SOUND_MASK_BASS|SOUND_MASK_TREBLE);
806 if (!(cap & 0x10))
807 codec->supported_mixers &= ~SOUND_MASK_ALTPCM;
808
809
810 /* detect bit resolution */
811 codec->codec_write(codec, AC97_MASTER_VOL_STEREO, 0x2020);
812 if(codec->codec_read(codec, AC97_MASTER_VOL_STEREO) == 0x2020)
813 codec->bit_resolution = 6;
814 else
815 codec->bit_resolution = 5;
816
817 /* generic OSS to AC97 wrapper */
818 codec->read_mixer = ac97_read_mixer;
819 codec->write_mixer = ac97_write_mixer;
820 codec->recmask_io = ac97_recmask_io;
821 codec->mixer_ioctl = ac97_mixer_ioctl;
822
823 /* initialize mixer channel volumes */
824 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
825 struct mixer_defaults *md = &mixer_defaults[i];
826 if (md->mixer == -1)
827 break;
828 if (!supported_mixer(codec, md->mixer))
829 continue;
830 ac97_set_mixer(codec, md->mixer, md->value);
831 }
832
833 /* codec specific initialization for 4-6 channel output or secondary codec stuff */
834 if (codec->codec_ops->init != NULL) {
835 codec->codec_ops->init(codec);
836 }
837
838 /*
839 * Volume is MUTE only on this device. We have to initialise
840 * it but its useless beyond that.
841 */
842 if(codec->flags & AC97_NO_PCM_VOLUME)
843 {
844 codec->supported_mixers &= ~SOUND_MASK_PCM;
845 printk(KERN_WARNING "AC97 codec does not have proper volume support.\n");
846 }
847 return 1;
848}
849
850#define AC97_SIGMATEL_ANALOG 0x6c /* Analog Special */
851#define AC97_SIGMATEL_DAC2INVERT 0x6e
852#define AC97_SIGMATEL_BIAS1 0x70
853#define AC97_SIGMATEL_BIAS2 0x72
854#define AC97_SIGMATEL_MULTICHN 0x74 /* Multi-Channel programming */
855#define AC97_SIGMATEL_CIC1 0x76
856#define AC97_SIGMATEL_CIC2 0x78
857
858
859static int sigmatel_9708_init(struct ac97_codec * codec)
860{
861 u16 codec72, codec6c;
862
863 codec72 = codec->codec_read(codec, AC97_SIGMATEL_BIAS2) & 0x8000;
864 codec6c = codec->codec_read(codec, AC97_SIGMATEL_ANALOG);
865
866 if ((codec72==0) && (codec6c==0)) {
867 codec->codec_write(codec, AC97_SIGMATEL_CIC1, 0xabba);
868 codec->codec_write(codec, AC97_SIGMATEL_CIC2, 0x1000);
869 codec->codec_write(codec, AC97_SIGMATEL_BIAS1, 0xabba);
870 codec->codec_write(codec, AC97_SIGMATEL_BIAS2, 0x0007);
871 } else if ((codec72==0x8000) && (codec6c==0)) {
872 codec->codec_write(codec, AC97_SIGMATEL_CIC1, 0xabba);
873 codec->codec_write(codec, AC97_SIGMATEL_CIC2, 0x1001);
874 codec->codec_write(codec, AC97_SIGMATEL_DAC2INVERT, 0x0008);
875 } else if ((codec72==0x8000) && (codec6c==0x0080)) {
876 /* nothing */
877 }
878 codec->codec_write(codec, AC97_SIGMATEL_MULTICHN, 0x0000);
879 return 0;
880}
881
882
883static int sigmatel_9721_init(struct ac97_codec * codec)
884{
885 /* Only set up secondary codec */
886 if (codec->id == 0)
887 return 0;
888
889 codec->codec_write(codec, AC97_SURROUND_MASTER, 0L);
890
891 /* initialize SigmaTel STAC9721/23 as secondary codec, decoding AC link
892 sloc 3,4 = 0x01, slot 7,8 = 0x00, */
893 codec->codec_write(codec, AC97_SIGMATEL_MULTICHN, 0x00);
894
895 /* we don't have the crystal when we are on an AMR card, so use
896 BIT_CLK as our clock source. Write the magic word ABBA and read
897 back to enable register 0x78 */
898 codec->codec_write(codec, AC97_SIGMATEL_CIC1, 0xabba);
899 codec->codec_read(codec, AC97_SIGMATEL_CIC1);
900
901 /* sync all the clocks*/
902 codec->codec_write(codec, AC97_SIGMATEL_CIC2, 0x3802);
903
904 return 0;
905}
906
907
908static int sigmatel_9744_init(struct ac97_codec * codec)
909{
910 // patch for SigmaTel
911 codec->codec_write(codec, AC97_SIGMATEL_CIC1, 0xabba);
912 codec->codec_write(codec, AC97_SIGMATEL_CIC2, 0x0000); // is this correct? --jk
913 codec->codec_write(codec, AC97_SIGMATEL_BIAS1, 0xabba);
914 codec->codec_write(codec, AC97_SIGMATEL_BIAS2, 0x0002);
915 codec->codec_write(codec, AC97_SIGMATEL_MULTICHN, 0x0000);
916 return 0;
917}
918
919static int cmedia_init(struct ac97_codec *codec)
920{
921 /* Initialise the CMedia 9739 */
922 /*
923 We could set various options here
924 Register 0x20 bit 0x100 sets mic as center bass
925 Also do multi_channel_ctrl &=~0x3000 |=0x1000
926
927 For now we set up the GPIO and PC beep
928 */
929
930 u16 v;
931
932 /* MIC */
933 codec->codec_write(codec, 0x64, 0x3000);
934 v = codec->codec_read(codec, 0x64);
935 v &= ~0x8000;
936 codec->codec_write(codec, 0x64, v);
937 codec->codec_write(codec, 0x70, 0x0100);
938 codec->codec_write(codec, 0x72, 0x0020);
939 return 0;
940}
941
942#define AC97_WM97XX_FMIXER_VOL 0x72
943#define AC97_WM97XX_RMIXER_VOL 0x74
944#define AC97_WM97XX_TEST 0x5a
945#define AC97_WM9704_RPCM_VOL 0x70
946#define AC97_WM9711_OUT3VOL 0x16
947
948static int wolfson_init03(struct ac97_codec * codec)
949{
950 /* this is known to work for the ViewSonic ViewPad 1000 */
951 codec->codec_write(codec, AC97_WM97XX_FMIXER_VOL, 0x0808);
952 codec->codec_write(codec, AC97_GENERAL_PURPOSE, 0x8000);
953 return 0;
954}
955
956static int wolfson_init04(struct ac97_codec * codec)
957{
958 codec->codec_write(codec, AC97_WM97XX_FMIXER_VOL, 0x0808);
959 codec->codec_write(codec, AC97_WM97XX_RMIXER_VOL, 0x0808);
960
961 // patch for DVD noise
962 codec->codec_write(codec, AC97_WM97XX_TEST, 0x0200);
963
964 // init vol as PCM vol
965 codec->codec_write(codec, AC97_WM9704_RPCM_VOL,
966 codec->codec_read(codec, AC97_PCMOUT_VOL));
967
968 /* set rear surround volume */
969 codec->codec_write(codec, AC97_SURROUND_MASTER, 0x0000);
970 return 0;
971}
972
973/* WM9705, WM9710 */
974static int wolfson_init05(struct ac97_codec * codec)
975{
976 /* set front mixer volume */
977 codec->codec_write(codec, AC97_WM97XX_FMIXER_VOL, 0x0808);
978 return 0;
979}
980
981/* WM9711, WM9712 */
982static int wolfson_init11(struct ac97_codec * codec)
983{
984 /* stop pop's during suspend/resume */
985 codec->codec_write(codec, AC97_WM97XX_TEST,
986 codec->codec_read(codec, AC97_WM97XX_TEST) & 0xffbf);
987
988 /* set out3 volume */
989 codec->codec_write(codec, AC97_WM9711_OUT3VOL, 0x0808);
990 return 0;
991}
992
993/* WM9713 */
994static int wolfson_init13(struct ac97_codec * codec)
995{
996 codec->codec_write(codec, AC97_RECORD_GAIN, 0x00a0);
997 codec->codec_write(codec, AC97_POWER_CONTROL, 0x0000);
998 codec->codec_write(codec, AC97_EXTENDED_MODEM_ID, 0xDA00);
999 codec->codec_write(codec, AC97_EXTEND_MODEM_STAT, 0x3810);
1000 codec->codec_write(codec, AC97_PHONE_VOL, 0x0808);
1001 codec->codec_write(codec, AC97_PCBEEP_VOL, 0x0808);
1002
1003 return 0;
1004}
1005
1006static int tritech_init(struct ac97_codec * codec)
1007{
1008 codec->codec_write(codec, 0x26, 0x0300);
1009 codec->codec_write(codec, 0x26, 0x0000);
1010 codec->codec_write(codec, AC97_SURROUND_MASTER, 0x0000);
1011 codec->codec_write(codec, AC97_RESERVED_3A, 0x0000);
1012 return 0;
1013}
1014
1015
1016/* copied from drivers/sound/maestro.c */
1017static int tritech_maestro_init(struct ac97_codec * codec)
1018{
1019 /* no idea what this does */
1020 codec->codec_write(codec, 0x2A, 0x0001);
1021 codec->codec_write(codec, 0x2C, 0x0000);
1022 codec->codec_write(codec, 0x2C, 0XFFFF);
1023 return 0;
1024}
1025
1026
1027
1028/*
1029 * Presario700 workaround
1030 * for Jack Sense/SPDIF Register mis-setting causing
1031 * no audible output
1032 * by Santiago Nullo 04/05/2002
1033 */
1034
1035#define AC97_AD1886_JACK_SENSE 0x72
1036
1037static int ad1886_init(struct ac97_codec * codec)
1038{
1039 /* from AD1886 Specs */
1040 codec->codec_write(codec, AC97_AD1886_JACK_SENSE, 0x0010);
1041 return 0;
1042}
1043
1044
1045
1046
1047/*
1048 * This is basically standard AC97. It should work as a default for
1049 * almost all modern codecs. Note that some cards wire EAPD *backwards*
1050 * That side of it is up to the card driver not us to cope with.
1051 *
1052 */
1053
1054static int eapd_control(struct ac97_codec * codec, int on)
1055{
1056 if(on)
1057 codec->codec_write(codec, AC97_POWER_CONTROL,
1058 codec->codec_read(codec, AC97_POWER_CONTROL)|0x8000);
1059 else
1060 codec->codec_write(codec, AC97_POWER_CONTROL,
1061 codec->codec_read(codec, AC97_POWER_CONTROL)&~0x8000);
1062 return 0;
1063}
1064
1065static int generic_digital_control(struct ac97_codec *codec, int slots, int rate, int mode)
1066{
1067 u16 reg;
1068
1069 reg = codec->codec_read(codec, AC97_SPDIF_CONTROL);
1070
1071 switch(rate)
1072 {
1073 /* Off by default */
1074 default:
1075 case 0:
1076 reg = codec->codec_read(codec, AC97_EXTENDED_STATUS);
1077 codec->codec_write(codec, AC97_EXTENDED_STATUS, (reg & ~AC97_EA_SPDIF));
1078 if(rate == 0)
1079 return 0;
1080 return -EINVAL;
1081 case 1:
1082 reg = (reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_48K;
1083 break;
1084 case 2:
1085 reg = (reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_44K;
1086 break;
1087 case 3:
1088 reg = (reg & AC97_SC_SPSR_MASK) | AC97_SC_SPSR_32K;
1089 break;
1090 }
1091
1092 reg &= ~AC97_SC_CC_MASK;
1093 reg |= (mode & AUDIO_CCMASK) << 6;
1094
1095 if(mode & AUDIO_DIGITAL)
1096 reg |= 2;
1097 if(mode & AUDIO_PRO)
1098 reg |= 1;
1099 if(mode & AUDIO_DRS)
1100 reg |= 0x4000;
1101
1102 codec->codec_write(codec, AC97_SPDIF_CONTROL, reg);
1103
1104 reg = codec->codec_read(codec, AC97_EXTENDED_STATUS);
1105 reg &= (AC97_EA_SLOT_MASK);
1106 reg |= AC97_EA_VRA | AC97_EA_SPDIF | slots;
1107 codec->codec_write(codec, AC97_EXTENDED_STATUS, reg);
1108
1109 reg = codec->codec_read(codec, AC97_EXTENDED_STATUS);
1110 if(!(reg & 0x0400))
1111 {
1112 codec->codec_write(codec, AC97_EXTENDED_STATUS, reg & ~ AC97_EA_SPDIF);
1113 return -EINVAL;
1114 }
1115 return 0;
1116}
1117
1118/*
1119 * Crystal digital audio control (CS4299)
1120 */
1121
1122static int crystal_digital_control(struct ac97_codec *codec, int slots, int rate, int mode)
1123{
1124 u16 cv;
1125
1126 if(mode & AUDIO_DIGITAL)
1127 return -EINVAL;
1128
1129 switch(rate)
1130 {
1131 case 0: cv = 0x0; break; /* SPEN off */
1132 case 48000: cv = 0x8004; break; /* 48KHz digital */
1133 case 44100: cv = 0x8104; break; /* 44.1KHz digital */
1134 case 32768: /* 32Khz */
1135 default:
1136 return -EINVAL;
1137 }
1138 codec->codec_write(codec, 0x68, cv);
1139 return 0;
1140}
1141
1142/*
1143 * CMedia digital audio control
1144 * Needs more work.
1145 */
1146
1147static int cmedia_digital_control(struct ac97_codec *codec, int slots, int rate, int mode)
1148{
1149 u16 cv;
1150
1151 if(mode & AUDIO_DIGITAL)
1152 return -EINVAL;
1153
1154 switch(rate)
1155 {
1156 case 0: cv = 0x0001; break; /* SPEN off */
1157 case 48000: cv = 0x0009; break; /* 48KHz digital */
1158 default:
1159 return -EINVAL;
1160 }
1161 codec->codec_write(codec, 0x2A, 0x05c4);
1162 codec->codec_write(codec, 0x6C, cv);
1163
1164 /* Switch on mix to surround */
1165 cv = codec->codec_read(codec, 0x64);
1166 cv &= ~0x0200;
1167 if(mode)
1168 cv |= 0x0200;
1169 codec->codec_write(codec, 0x64, cv);
1170 return 0;
1171}
1172
1173
1174/* copied from drivers/sound/maestro.c */
1175#if 0 /* there has been 1 person on the planet with a pt101 that we
1176 know of. If they care, they can put this back in :) */
1177static int pt101_init(struct ac97_codec * codec)
1178{
1179 printk(KERN_INFO "ac97_codec: PT101 Codec detected, initializing but _not_ installing mixer device.\n");
1180 /* who knows.. */
1181 codec->codec_write(codec, 0x2A, 0x0001);
1182 codec->codec_write(codec, 0x2C, 0x0000);
1183 codec->codec_write(codec, 0x2C, 0xFFFF);
1184 codec->codec_write(codec, 0x10, 0x9F1F);
1185 codec->codec_write(codec, 0x12, 0x0808);
1186 codec->codec_write(codec, 0x14, 0x9F1F);
1187 codec->codec_write(codec, 0x16, 0x9F1F);
1188 codec->codec_write(codec, 0x18, 0x0404);
1189 codec->codec_write(codec, 0x1A, 0x0000);
1190 codec->codec_write(codec, 0x1C, 0x0000);
1191 codec->codec_write(codec, 0x02, 0x0404);
1192 codec->codec_write(codec, 0x04, 0x0808);
1193 codec->codec_write(codec, 0x0C, 0x801F);
1194 codec->codec_write(codec, 0x0E, 0x801F);
1195 return 0;
1196}
1197#endif
1198
1199
1200EXPORT_SYMBOL(ac97_probe_codec);
1201
1202MODULE_LICENSE("GPL");
1203
diff --git a/sound/oss/au1550_ac97.c b/sound/oss/au1550_ac97.c
deleted file mode 100644
index a8f626d99c5b..000000000000
--- a/sound/oss/au1550_ac97.c
+++ /dev/null
@@ -1,2147 +0,0 @@
1/*
2 * au1550_ac97.c -- Sound driver for Alchemy Au1550 MIPS Internet Edge
3 * Processor.
4 *
5 * Copyright 2004 Embedded Edge, LLC
6 * dan@embeddededge.com
7 *
8 * Mostly copied from the au1000.c driver and some from the
9 * PowerMac dbdma driver.
10 * We assume the processor can do memory coherent DMA.
11 *
12 * Ported to 2.6 by Matt Porter <mporter@kernel.crashing.org>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 *
19 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
22 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
25 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * You should have received a copy of the GNU General Public License along
31 * with this program; if not, write to the Free Software Foundation, Inc.,
32 * 675 Mass Ave, Cambridge, MA 02139, USA.
33 *
34 */
35
36#undef DEBUG
37
38#include <linux/module.h>
39#include <linux/string.h>
40#include <linux/ioport.h>
41#include <linux/sched.h>
42#include <linux/delay.h>
43#include <linux/sound.h>
44#include <linux/slab.h>
45#include <linux/soundcard.h>
46#include <linux/init.h>
47#include <linux/interrupt.h>
48#include <linux/kernel.h>
49#include <linux/poll.h>
50#include <linux/bitops.h>
51#include <linux/spinlock.h>
52#include <linux/ac97_codec.h>
53#include <linux/mutex.h>
54
55#include <asm/io.h>
56#include <asm/uaccess.h>
57#include <asm/hardirq.h>
58#include <asm/mach-au1x00/au1xxx_psc.h>
59#include <asm/mach-au1x00/au1xxx_dbdma.h>
60#include <asm/mach-au1x00/au1xxx.h>
61
62#undef OSS_DOCUMENTED_MIXER_SEMANTICS
63
64/* misc stuff */
65#define POLL_COUNT 0x50000
66#define AC97_EXT_DACS (AC97_EXTID_SDAC | AC97_EXTID_CDAC | AC97_EXTID_LDAC)
67
68/* The number of DBDMA ring descriptors to allocate. No sense making
69 * this too large....if you can't keep up with a few you aren't likely
70 * to be able to with lots of them, either.
71 */
72#define NUM_DBDMA_DESCRIPTORS 4
73
74#define err(format, arg...) printk(KERN_ERR format "\n" , ## arg)
75
76/* Boot options
77 * 0 = no VRA, 1 = use VRA if codec supports it
78 */
79static DEFINE_MUTEX(au1550_ac97_mutex);
80static int vra = 1;
81module_param(vra, bool, 0);
82MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
83
84static struct au1550_state {
85 /* soundcore stuff */
86 int dev_audio;
87
88 struct ac97_codec *codec;
89 unsigned codec_base_caps; /* AC'97 reg 00h, "Reset Register" */
90 unsigned codec_ext_caps; /* AC'97 reg 28h, "Extended Audio ID" */
91 int no_vra; /* do not use VRA */
92
93 spinlock_t lock;
94 struct mutex open_mutex;
95 struct mutex sem;
96 fmode_t open_mode;
97 wait_queue_head_t open_wait;
98
99 struct dmabuf {
100 u32 dmanr;
101 unsigned sample_rate;
102 unsigned src_factor;
103 unsigned sample_size;
104 int num_channels;
105 int dma_bytes_per_sample;
106 int user_bytes_per_sample;
107 int cnt_factor;
108
109 void *rawbuf;
110 unsigned buforder;
111 unsigned numfrag;
112 unsigned fragshift;
113 void *nextIn;
114 void *nextOut;
115 int count;
116 unsigned total_bytes;
117 unsigned error;
118 wait_queue_head_t wait;
119
120 /* redundant, but makes calculations easier */
121 unsigned fragsize;
122 unsigned dma_fragsize;
123 unsigned dmasize;
124 unsigned dma_qcount;
125
126 /* OSS stuff */
127 unsigned mapped:1;
128 unsigned ready:1;
129 unsigned stopped:1;
130 unsigned ossfragshift;
131 int ossmaxfrags;
132 unsigned subdivision;
133 } dma_dac, dma_adc;
134} au1550_state;
135
136static unsigned
137ld2(unsigned int x)
138{
139 unsigned r = 0;
140
141 if (x >= 0x10000) {
142 x >>= 16;
143 r += 16;
144 }
145 if (x >= 0x100) {
146 x >>= 8;
147 r += 8;
148 }
149 if (x >= 0x10) {
150 x >>= 4;
151 r += 4;
152 }
153 if (x >= 4) {
154 x >>= 2;
155 r += 2;
156 }
157 if (x >= 2)
158 r++;
159 return r;
160}
161
162static void
163au1550_delay(int msec)
164{
165 if (in_interrupt())
166 return;
167
168 schedule_timeout_uninterruptible(msecs_to_jiffies(msec));
169}
170
171static u16
172rdcodec(struct ac97_codec *codec, u8 addr)
173{
174 struct au1550_state *s = codec->private_data;
175 unsigned long flags;
176 u32 cmd, val;
177 u16 data;
178 int i;
179
180 spin_lock_irqsave(&s->lock, flags);
181
182 for (i = 0; i < POLL_COUNT; i++) {
183 val = au_readl(PSC_AC97STAT);
184 au_sync();
185 if (!(val & PSC_AC97STAT_CP))
186 break;
187 }
188 if (i == POLL_COUNT)
189 err("rdcodec: codec cmd pending expired!");
190
191 cmd = (u32)PSC_AC97CDC_INDX(addr);
192 cmd |= PSC_AC97CDC_RD; /* read command */
193 au_writel(cmd, PSC_AC97CDC);
194 au_sync();
195
196 /* now wait for the data
197 */
198 for (i = 0; i < POLL_COUNT; i++) {
199 val = au_readl(PSC_AC97STAT);
200 au_sync();
201 if (!(val & PSC_AC97STAT_CP))
202 break;
203 }
204 if (i == POLL_COUNT) {
205 err("rdcodec: read poll expired!");
206 data = 0;
207 goto out;
208 }
209
210 /* wait for command done?
211 */
212 for (i = 0; i < POLL_COUNT; i++) {
213 val = au_readl(PSC_AC97EVNT);
214 au_sync();
215 if (val & PSC_AC97EVNT_CD)
216 break;
217 }
218 if (i == POLL_COUNT) {
219 err("rdcodec: read cmdwait expired!");
220 data = 0;
221 goto out;
222 }
223
224 data = au_readl(PSC_AC97CDC) & 0xffff;
225 au_sync();
226
227 /* Clear command done event.
228 */
229 au_writel(PSC_AC97EVNT_CD, PSC_AC97EVNT);
230 au_sync();
231
232 out:
233 spin_unlock_irqrestore(&s->lock, flags);
234
235 return data;
236}
237
238
239static void
240wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
241{
242 struct au1550_state *s = codec->private_data;
243 unsigned long flags;
244 u32 cmd, val;
245 int i;
246
247 spin_lock_irqsave(&s->lock, flags);
248
249 for (i = 0; i < POLL_COUNT; i++) {
250 val = au_readl(PSC_AC97STAT);
251 au_sync();
252 if (!(val & PSC_AC97STAT_CP))
253 break;
254 }
255 if (i == POLL_COUNT)
256 err("wrcodec: codec cmd pending expired!");
257
258 cmd = (u32)PSC_AC97CDC_INDX(addr);
259 cmd |= (u32)data;
260 au_writel(cmd, PSC_AC97CDC);
261 au_sync();
262
263 for (i = 0; i < POLL_COUNT; i++) {
264 val = au_readl(PSC_AC97STAT);
265 au_sync();
266 if (!(val & PSC_AC97STAT_CP))
267 break;
268 }
269 if (i == POLL_COUNT)
270 err("wrcodec: codec cmd pending expired!");
271
272 for (i = 0; i < POLL_COUNT; i++) {
273 val = au_readl(PSC_AC97EVNT);
274 au_sync();
275 if (val & PSC_AC97EVNT_CD)
276 break;
277 }
278 if (i == POLL_COUNT)
279 err("wrcodec: read cmdwait expired!");
280
281 /* Clear command done event.
282 */
283 au_writel(PSC_AC97EVNT_CD, PSC_AC97EVNT);
284 au_sync();
285
286 spin_unlock_irqrestore(&s->lock, flags);
287}
288
289static void
290waitcodec(struct ac97_codec *codec)
291{
292 u16 temp;
293 u32 val;
294 int i;
295
296 /* codec_wait is used to wait for a ready state after
297 * an AC97C_RESET.
298 */
299 au1550_delay(10);
300
301 /* first poll the CODEC_READY tag bit
302 */
303 for (i = 0; i < POLL_COUNT; i++) {
304 val = au_readl(PSC_AC97STAT);
305 au_sync();
306 if (val & PSC_AC97STAT_CR)
307 break;
308 }
309 if (i == POLL_COUNT) {
310 err("waitcodec: CODEC_READY poll expired!");
311 return;
312 }
313
314 /* get AC'97 powerdown control/status register
315 */
316 temp = rdcodec(codec, AC97_POWER_CONTROL);
317
318 /* If anything is powered down, power'em up
319 */
320 if (temp & 0x7f00) {
321 /* Power on
322 */
323 wrcodec(codec, AC97_POWER_CONTROL, 0);
324 au1550_delay(100);
325
326 /* Reread
327 */
328 temp = rdcodec(codec, AC97_POWER_CONTROL);
329 }
330
331 /* Check if Codec REF,ANL,DAC,ADC ready
332 */
333 if ((temp & 0x7f0f) != 0x000f)
334 err("codec reg 26 status (0x%x) not ready!!", temp);
335}
336
337/* stop the ADC before calling */
338static void
339set_adc_rate(struct au1550_state *s, unsigned rate)
340{
341 struct dmabuf *adc = &s->dma_adc;
342 struct dmabuf *dac = &s->dma_dac;
343 unsigned adc_rate, dac_rate;
344 u16 ac97_extstat;
345
346 if (s->no_vra) {
347 /* calc SRC factor
348 */
349 adc->src_factor = ((96000 / rate) + 1) >> 1;
350 adc->sample_rate = 48000 / adc->src_factor;
351 return;
352 }
353
354 adc->src_factor = 1;
355
356 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
357
358 rate = rate > 48000 ? 48000 : rate;
359
360 /* enable VRA
361 */
362 wrcodec(s->codec, AC97_EXTENDED_STATUS,
363 ac97_extstat | AC97_EXTSTAT_VRA);
364
365 /* now write the sample rate
366 */
367 wrcodec(s->codec, AC97_PCM_LR_ADC_RATE, (u16) rate);
368
369 /* read it back for actual supported rate
370 */
371 adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
372
373 pr_debug("set_adc_rate: set to %d Hz\n", adc_rate);
374
375 /* some codec's don't allow unequal DAC and ADC rates, in which case
376 * writing one rate reg actually changes both.
377 */
378 dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
379 if (dac->num_channels > 2)
380 wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, dac_rate);
381 if (dac->num_channels > 4)
382 wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, dac_rate);
383
384 adc->sample_rate = adc_rate;
385 dac->sample_rate = dac_rate;
386}
387
388/* stop the DAC before calling */
389static void
390set_dac_rate(struct au1550_state *s, unsigned rate)
391{
392 struct dmabuf *dac = &s->dma_dac;
393 struct dmabuf *adc = &s->dma_adc;
394 unsigned adc_rate, dac_rate;
395 u16 ac97_extstat;
396
397 if (s->no_vra) {
398 /* calc SRC factor
399 */
400 dac->src_factor = ((96000 / rate) + 1) >> 1;
401 dac->sample_rate = 48000 / dac->src_factor;
402 return;
403 }
404
405 dac->src_factor = 1;
406
407 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
408
409 rate = rate > 48000 ? 48000 : rate;
410
411 /* enable VRA
412 */
413 wrcodec(s->codec, AC97_EXTENDED_STATUS,
414 ac97_extstat | AC97_EXTSTAT_VRA);
415
416 /* now write the sample rate
417 */
418 wrcodec(s->codec, AC97_PCM_FRONT_DAC_RATE, (u16) rate);
419
420 /* I don't support different sample rates for multichannel,
421 * so make these channels the same.
422 */
423 if (dac->num_channels > 2)
424 wrcodec(s->codec, AC97_PCM_SURR_DAC_RATE, (u16) rate);
425 if (dac->num_channels > 4)
426 wrcodec(s->codec, AC97_PCM_LFE_DAC_RATE, (u16) rate);
427 /* read it back for actual supported rate
428 */
429 dac_rate = rdcodec(s->codec, AC97_PCM_FRONT_DAC_RATE);
430
431 pr_debug("set_dac_rate: set to %d Hz\n", dac_rate);
432
433 /* some codec's don't allow unequal DAC and ADC rates, in which case
434 * writing one rate reg actually changes both.
435 */
436 adc_rate = rdcodec(s->codec, AC97_PCM_LR_ADC_RATE);
437
438 dac->sample_rate = dac_rate;
439 adc->sample_rate = adc_rate;
440}
441
442static void
443stop_dac(struct au1550_state *s)
444{
445 struct dmabuf *db = &s->dma_dac;
446 u32 stat;
447 unsigned long flags;
448
449 if (db->stopped)
450 return;
451
452 spin_lock_irqsave(&s->lock, flags);
453
454 au_writel(PSC_AC97PCR_TP, PSC_AC97PCR);
455 au_sync();
456
457 /* Wait for Transmit Busy to show disabled.
458 */
459 do {
460 stat = au_readl(PSC_AC97STAT);
461 au_sync();
462 } while ((stat & PSC_AC97STAT_TB) != 0);
463
464 au1xxx_dbdma_reset(db->dmanr);
465
466 db->stopped = 1;
467
468 spin_unlock_irqrestore(&s->lock, flags);
469}
470
471static void
472stop_adc(struct au1550_state *s)
473{
474 struct dmabuf *db = &s->dma_adc;
475 unsigned long flags;
476 u32 stat;
477
478 if (db->stopped)
479 return;
480
481 spin_lock_irqsave(&s->lock, flags);
482
483 au_writel(PSC_AC97PCR_RP, PSC_AC97PCR);
484 au_sync();
485
486 /* Wait for Receive Busy to show disabled.
487 */
488 do {
489 stat = au_readl(PSC_AC97STAT);
490 au_sync();
491 } while ((stat & PSC_AC97STAT_RB) != 0);
492
493 au1xxx_dbdma_reset(db->dmanr);
494
495 db->stopped = 1;
496
497 spin_unlock_irqrestore(&s->lock, flags);
498}
499
500
501static void
502set_xmit_slots(int num_channels)
503{
504 u32 ac97_config, stat;
505
506 ac97_config = au_readl(PSC_AC97CFG);
507 au_sync();
508 ac97_config &= ~(PSC_AC97CFG_TXSLOT_MASK | PSC_AC97CFG_DE_ENABLE);
509 au_writel(ac97_config, PSC_AC97CFG);
510 au_sync();
511
512 switch (num_channels) {
513 case 6: /* stereo with surround and center/LFE,
514 * slots 3,4,6,7,8,9
515 */
516 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(6);
517 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(9);
518
519 case 4: /* stereo with surround, slots 3,4,7,8 */
520 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(7);
521 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(8);
522
523 case 2: /* stereo, slots 3,4 */
524 case 1: /* mono */
525 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(3);
526 ac97_config |= PSC_AC97CFG_TXSLOT_ENA(4);
527 }
528
529 au_writel(ac97_config, PSC_AC97CFG);
530 au_sync();
531
532 ac97_config |= PSC_AC97CFG_DE_ENABLE;
533 au_writel(ac97_config, PSC_AC97CFG);
534 au_sync();
535
536 /* Wait for Device ready.
537 */
538 do {
539 stat = au_readl(PSC_AC97STAT);
540 au_sync();
541 } while ((stat & PSC_AC97STAT_DR) == 0);
542}
543
544static void
545set_recv_slots(int num_channels)
546{
547 u32 ac97_config, stat;
548
549 ac97_config = au_readl(PSC_AC97CFG);
550 au_sync();
551 ac97_config &= ~(PSC_AC97CFG_RXSLOT_MASK | PSC_AC97CFG_DE_ENABLE);
552 au_writel(ac97_config, PSC_AC97CFG);
553 au_sync();
554
555 /* Always enable slots 3 and 4 (stereo). Slot 6 is
556 * optional Mic ADC, which we don't support yet.
557 */
558 ac97_config |= PSC_AC97CFG_RXSLOT_ENA(3);
559 ac97_config |= PSC_AC97CFG_RXSLOT_ENA(4);
560
561 au_writel(ac97_config, PSC_AC97CFG);
562 au_sync();
563
564 ac97_config |= PSC_AC97CFG_DE_ENABLE;
565 au_writel(ac97_config, PSC_AC97CFG);
566 au_sync();
567
568 /* Wait for Device ready.
569 */
570 do {
571 stat = au_readl(PSC_AC97STAT);
572 au_sync();
573 } while ((stat & PSC_AC97STAT_DR) == 0);
574}
575
576/* Hold spinlock for both start_dac() and start_adc() calls */
577static void
578start_dac(struct au1550_state *s)
579{
580 struct dmabuf *db = &s->dma_dac;
581
582 if (!db->stopped)
583 return;
584
585 set_xmit_slots(db->num_channels);
586 au_writel(PSC_AC97PCR_TC, PSC_AC97PCR);
587 au_sync();
588 au_writel(PSC_AC97PCR_TS, PSC_AC97PCR);
589 au_sync();
590
591 au1xxx_dbdma_start(db->dmanr);
592
593 db->stopped = 0;
594}
595
596static void
597start_adc(struct au1550_state *s)
598{
599 struct dmabuf *db = &s->dma_adc;
600 int i;
601
602 if (!db->stopped)
603 return;
604
605 /* Put two buffers on the ring to get things started.
606 */
607 for (i=0; i<2; i++) {
608 au1xxx_dbdma_put_dest(db->dmanr, virt_to_phys(db->nextIn),
609 db->dma_fragsize, DDMA_FLAGS_IE);
610
611 db->nextIn += db->dma_fragsize;
612 if (db->nextIn >= db->rawbuf + db->dmasize)
613 db->nextIn -= db->dmasize;
614 }
615
616 set_recv_slots(db->num_channels);
617 au1xxx_dbdma_start(db->dmanr);
618 au_writel(PSC_AC97PCR_RC, PSC_AC97PCR);
619 au_sync();
620 au_writel(PSC_AC97PCR_RS, PSC_AC97PCR);
621 au_sync();
622
623 db->stopped = 0;
624}
625
626static int
627prog_dmabuf(struct au1550_state *s, struct dmabuf *db)
628{
629 unsigned user_bytes_per_sec;
630 unsigned bufs;
631 unsigned rate = db->sample_rate;
632
633 if (!db->rawbuf) {
634 db->ready = db->mapped = 0;
635 db->buforder = 5; /* 32 * PAGE_SIZE */
636 db->rawbuf = kmalloc((PAGE_SIZE << db->buforder), GFP_KERNEL);
637 if (!db->rawbuf)
638 return -ENOMEM;
639 }
640
641 db->cnt_factor = 1;
642 if (db->sample_size == 8)
643 db->cnt_factor *= 2;
644 if (db->num_channels == 1)
645 db->cnt_factor *= 2;
646 db->cnt_factor *= db->src_factor;
647
648 db->count = 0;
649 db->dma_qcount = 0;
650 db->nextIn = db->nextOut = db->rawbuf;
651
652 db->user_bytes_per_sample = (db->sample_size>>3) * db->num_channels;
653 db->dma_bytes_per_sample = 2 * ((db->num_channels == 1) ?
654 2 : db->num_channels);
655
656 user_bytes_per_sec = rate * db->user_bytes_per_sample;
657 bufs = PAGE_SIZE << db->buforder;
658 if (db->ossfragshift) {
659 if ((1000 << db->ossfragshift) < user_bytes_per_sec)
660 db->fragshift = ld2(user_bytes_per_sec/1000);
661 else
662 db->fragshift = db->ossfragshift;
663 } else {
664 db->fragshift = ld2(user_bytes_per_sec / 100 /
665 (db->subdivision ? db->subdivision : 1));
666 if (db->fragshift < 3)
667 db->fragshift = 3;
668 }
669
670 db->fragsize = 1 << db->fragshift;
671 db->dma_fragsize = db->fragsize * db->cnt_factor;
672 db->numfrag = bufs / db->dma_fragsize;
673
674 while (db->numfrag < 4 && db->fragshift > 3) {
675 db->fragshift--;
676 db->fragsize = 1 << db->fragshift;
677 db->dma_fragsize = db->fragsize * db->cnt_factor;
678 db->numfrag = bufs / db->dma_fragsize;
679 }
680
681 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
682 db->numfrag = db->ossmaxfrags;
683
684 db->dmasize = db->dma_fragsize * db->numfrag;
685 memset(db->rawbuf, 0, bufs);
686
687 pr_debug("prog_dmabuf: rate=%d, samplesize=%d, channels=%d\n",
688 rate, db->sample_size, db->num_channels);
689 pr_debug("prog_dmabuf: fragsize=%d, cnt_factor=%d, dma_fragsize=%d\n",
690 db->fragsize, db->cnt_factor, db->dma_fragsize);
691 pr_debug("prog_dmabuf: numfrag=%d, dmasize=%d\n", db->numfrag, db->dmasize);
692
693 db->ready = 1;
694 return 0;
695}
696
697static int
698prog_dmabuf_adc(struct au1550_state *s)
699{
700 stop_adc(s);
701 return prog_dmabuf(s, &s->dma_adc);
702
703}
704
705static int
706prog_dmabuf_dac(struct au1550_state *s)
707{
708 stop_dac(s);
709 return prog_dmabuf(s, &s->dma_dac);
710}
711
712
713static void dac_dma_interrupt(int irq, void *dev_id)
714{
715 struct au1550_state *s = (struct au1550_state *) dev_id;
716 struct dmabuf *db = &s->dma_dac;
717 u32 ac97c_stat;
718
719 spin_lock(&s->lock);
720
721 ac97c_stat = au_readl(PSC_AC97STAT);
722 if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
723 pr_debug("AC97C status = 0x%08x\n", ac97c_stat);
724 db->dma_qcount--;
725
726 if (db->count >= db->fragsize) {
727 if (au1xxx_dbdma_put_source(db->dmanr,
728 virt_to_phys(db->nextOut), db->fragsize,
729 DDMA_FLAGS_IE) == 0) {
730 err("qcount < 2 and no ring room!");
731 }
732 db->nextOut += db->fragsize;
733 if (db->nextOut >= db->rawbuf + db->dmasize)
734 db->nextOut -= db->dmasize;
735 db->count -= db->fragsize;
736 db->total_bytes += db->dma_fragsize;
737 db->dma_qcount++;
738 }
739
740 /* wake up anybody listening */
741 if (waitqueue_active(&db->wait))
742 wake_up(&db->wait);
743
744 spin_unlock(&s->lock);
745}
746
747
748static void adc_dma_interrupt(int irq, void *dev_id)
749{
750 struct au1550_state *s = (struct au1550_state *)dev_id;
751 struct dmabuf *dp = &s->dma_adc;
752 u32 obytes;
753 char *obuf;
754
755 spin_lock(&s->lock);
756
757 /* Pull the buffer from the dma queue.
758 */
759 au1xxx_dbdma_get_dest(dp->dmanr, (void *)(&obuf), &obytes);
760
761 if ((dp->count + obytes) > dp->dmasize) {
762 /* Overrun. Stop ADC and log the error
763 */
764 spin_unlock(&s->lock);
765 stop_adc(s);
766 dp->error++;
767 err("adc overrun");
768 return;
769 }
770
771 /* Put a new empty buffer on the destination DMA.
772 */
773 au1xxx_dbdma_put_dest(dp->dmanr, virt_to_phys(dp->nextIn),
774 dp->dma_fragsize, DDMA_FLAGS_IE);
775
776 dp->nextIn += dp->dma_fragsize;
777 if (dp->nextIn >= dp->rawbuf + dp->dmasize)
778 dp->nextIn -= dp->dmasize;
779
780 dp->count += obytes;
781 dp->total_bytes += obytes;
782
783 /* wake up anybody listening
784 */
785 if (waitqueue_active(&dp->wait))
786 wake_up(&dp->wait);
787
788 spin_unlock(&s->lock);
789}
790
791static loff_t
792au1550_llseek(struct file *file, loff_t offset, int origin)
793{
794 return -ESPIPE;
795}
796
797
798static int
799au1550_open_mixdev(struct inode *inode, struct file *file)
800{
801 mutex_lock(&au1550_ac97_mutex);
802 file->private_data = &au1550_state;
803 mutex_unlock(&au1550_ac97_mutex);
804 return 0;
805}
806
807static int
808au1550_release_mixdev(struct inode *inode, struct file *file)
809{
810 return 0;
811}
812
813static int
814mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
815 unsigned long arg)
816{
817 return codec->mixer_ioctl(codec, cmd, arg);
818}
819
820static long
821au1550_ioctl_mixdev(struct file *file, unsigned int cmd, unsigned long arg)
822{
823 struct au1550_state *s = file->private_data;
824 struct ac97_codec *codec = s->codec;
825 int ret;
826
827 mutex_lock(&au1550_ac97_mutex);
828 ret = mixdev_ioctl(codec, cmd, arg);
829 mutex_unlock(&au1550_ac97_mutex);
830
831 return ret;
832}
833
834static /*const */ struct file_operations au1550_mixer_fops = {
835 .owner = THIS_MODULE,
836 .llseek = au1550_llseek,
837 .unlocked_ioctl = au1550_ioctl_mixdev,
838 .open = au1550_open_mixdev,
839 .release = au1550_release_mixdev,
840};
841
842static int
843drain_dac(struct au1550_state *s, int nonblock)
844{
845 unsigned long flags;
846 int count, tmo;
847
848 if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
849 return 0;
850
851 for (;;) {
852 spin_lock_irqsave(&s->lock, flags);
853 count = s->dma_dac.count;
854 spin_unlock_irqrestore(&s->lock, flags);
855 if (count <= s->dma_dac.fragsize)
856 break;
857 if (signal_pending(current))
858 break;
859 if (nonblock)
860 return -EBUSY;
861 tmo = 1000 * count / (s->no_vra ?
862 48000 : s->dma_dac.sample_rate);
863 tmo /= s->dma_dac.dma_bytes_per_sample;
864 au1550_delay(tmo);
865 }
866 if (signal_pending(current))
867 return -ERESTARTSYS;
868 return 0;
869}
870
871static inline u8 S16_TO_U8(s16 ch)
872{
873 return (u8) (ch >> 8) + 0x80;
874}
875static inline s16 U8_TO_S16(u8 ch)
876{
877 return (s16) (ch - 0x80) << 8;
878}
879
880/*
881 * Translates user samples to dma buffer suitable for AC'97 DAC data:
882 * If mono, copy left channel to right channel in dma buffer.
883 * If 8 bit samples, cvt to 16-bit before writing to dma buffer.
884 * If interpolating (no VRA), duplicate every audio frame src_factor times.
885 */
886static int
887translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf,
888 int dmacount)
889{
890 int sample, i;
891 int interp_bytes_per_sample;
892 int num_samples;
893 int mono = (db->num_channels == 1);
894 char usersample[12];
895 s16 ch, dmasample[6];
896
897 if (db->sample_size == 16 && !mono && db->src_factor == 1) {
898 /* no translation necessary, just copy
899 */
900 if (copy_from_user(dmabuf, userbuf, dmacount))
901 return -EFAULT;
902 return dmacount;
903 }
904
905 interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
906 num_samples = dmacount / interp_bytes_per_sample;
907
908 for (sample = 0; sample < num_samples; sample++) {
909 if (copy_from_user(usersample, userbuf,
910 db->user_bytes_per_sample)) {
911 return -EFAULT;
912 }
913
914 for (i = 0; i < db->num_channels; i++) {
915 if (db->sample_size == 8)
916 ch = U8_TO_S16(usersample[i]);
917 else
918 ch = *((s16 *) (&usersample[i * 2]));
919 dmasample[i] = ch;
920 if (mono)
921 dmasample[i + 1] = ch; /* right channel */
922 }
923
924 /* duplicate every audio frame src_factor times
925 */
926 for (i = 0; i < db->src_factor; i++)
927 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
928
929 userbuf += db->user_bytes_per_sample;
930 dmabuf += interp_bytes_per_sample;
931 }
932
933 return num_samples * interp_bytes_per_sample;
934}
935
936/*
937 * Translates AC'97 ADC samples to user buffer:
938 * If mono, send only left channel to user buffer.
939 * If 8 bit samples, cvt from 16 to 8 bit before writing to user buffer.
940 * If decimating (no VRA), skip over src_factor audio frames.
941 */
942static int
943translate_to_user(struct dmabuf *db, char* userbuf, char* dmabuf,
944 int dmacount)
945{
946 int sample, i;
947 int interp_bytes_per_sample;
948 int num_samples;
949 int mono = (db->num_channels == 1);
950 char usersample[12];
951
952 if (db->sample_size == 16 && !mono && db->src_factor == 1) {
953 /* no translation necessary, just copy
954 */
955 if (copy_to_user(userbuf, dmabuf, dmacount))
956 return -EFAULT;
957 return dmacount;
958 }
959
960 interp_bytes_per_sample = db->dma_bytes_per_sample * db->src_factor;
961 num_samples = dmacount / interp_bytes_per_sample;
962
963 for (sample = 0; sample < num_samples; sample++) {
964 for (i = 0; i < db->num_channels; i++) {
965 if (db->sample_size == 8)
966 usersample[i] =
967 S16_TO_U8(*((s16 *) (&dmabuf[i * 2])));
968 else
969 *((s16 *) (&usersample[i * 2])) =
970 *((s16 *) (&dmabuf[i * 2]));
971 }
972
973 if (copy_to_user(userbuf, usersample,
974 db->user_bytes_per_sample)) {
975 return -EFAULT;
976 }
977
978 userbuf += db->user_bytes_per_sample;
979 dmabuf += interp_bytes_per_sample;
980 }
981
982 return num_samples * interp_bytes_per_sample;
983}
984
985/*
986 * Copy audio data to/from user buffer from/to dma buffer, taking care
987 * that we wrap when reading/writing the dma buffer. Returns actual byte
988 * count written to or read from the dma buffer.
989 */
990static int
991copy_dmabuf_user(struct dmabuf *db, char* userbuf, int count, int to_user)
992{
993 char *bufptr = to_user ? db->nextOut : db->nextIn;
994 char *bufend = db->rawbuf + db->dmasize;
995 int cnt, ret;
996
997 if (bufptr + count > bufend) {
998 int partial = (int) (bufend - bufptr);
999 if (to_user) {
1000 if ((cnt = translate_to_user(db, userbuf,
1001 bufptr, partial)) < 0)
1002 return cnt;
1003 ret = cnt;
1004 if ((cnt = translate_to_user(db, userbuf + partial,
1005 db->rawbuf,
1006 count - partial)) < 0)
1007 return cnt;
1008 ret += cnt;
1009 } else {
1010 if ((cnt = translate_from_user(db, bufptr, userbuf,
1011 partial)) < 0)
1012 return cnt;
1013 ret = cnt;
1014 if ((cnt = translate_from_user(db, db->rawbuf,
1015 userbuf + partial,
1016 count - partial)) < 0)
1017 return cnt;
1018 ret += cnt;
1019 }
1020 } else {
1021 if (to_user)
1022 ret = translate_to_user(db, userbuf, bufptr, count);
1023 else
1024 ret = translate_from_user(db, bufptr, userbuf, count);
1025 }
1026
1027 return ret;
1028}
1029
1030
1031static ssize_t
1032au1550_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1033{
1034 struct au1550_state *s = file->private_data;
1035 struct dmabuf *db = &s->dma_adc;
1036 DECLARE_WAITQUEUE(wait, current);
1037 ssize_t ret;
1038 unsigned long flags;
1039 int cnt, usercnt, avail;
1040
1041 if (db->mapped)
1042 return -ENXIO;
1043 if (!access_ok(VERIFY_WRITE, buffer, count))
1044 return -EFAULT;
1045 ret = 0;
1046
1047 count *= db->cnt_factor;
1048
1049 mutex_lock(&s->sem);
1050 add_wait_queue(&db->wait, &wait);
1051
1052 while (count > 0) {
1053 /* wait for samples in ADC dma buffer
1054 */
1055 do {
1056 spin_lock_irqsave(&s->lock, flags);
1057 if (db->stopped)
1058 start_adc(s);
1059 avail = db->count;
1060 if (avail <= 0)
1061 __set_current_state(TASK_INTERRUPTIBLE);
1062 spin_unlock_irqrestore(&s->lock, flags);
1063 if (avail <= 0) {
1064 if (file->f_flags & O_NONBLOCK) {
1065 if (!ret)
1066 ret = -EAGAIN;
1067 goto out;
1068 }
1069 mutex_unlock(&s->sem);
1070 schedule();
1071 if (signal_pending(current)) {
1072 if (!ret)
1073 ret = -ERESTARTSYS;
1074 goto out2;
1075 }
1076 mutex_lock(&s->sem);
1077 }
1078 } while (avail <= 0);
1079
1080 /* copy from nextOut to user
1081 */
1082 if ((cnt = copy_dmabuf_user(db, buffer,
1083 count > avail ?
1084 avail : count, 1)) < 0) {
1085 if (!ret)
1086 ret = -EFAULT;
1087 goto out;
1088 }
1089
1090 spin_lock_irqsave(&s->lock, flags);
1091 db->count -= cnt;
1092 db->nextOut += cnt;
1093 if (db->nextOut >= db->rawbuf + db->dmasize)
1094 db->nextOut -= db->dmasize;
1095 spin_unlock_irqrestore(&s->lock, flags);
1096
1097 count -= cnt;
1098 usercnt = cnt / db->cnt_factor;
1099 buffer += usercnt;
1100 ret += usercnt;
1101 } /* while (count > 0) */
1102
1103out:
1104 mutex_unlock(&s->sem);
1105out2:
1106 remove_wait_queue(&db->wait, &wait);
1107 set_current_state(TASK_RUNNING);
1108 return ret;
1109}
1110
1111static ssize_t
1112au1550_write(struct file *file, const char *buffer, size_t count, loff_t * ppos)
1113{
1114 struct au1550_state *s = file->private_data;
1115 struct dmabuf *db = &s->dma_dac;
1116 DECLARE_WAITQUEUE(wait, current);
1117 ssize_t ret = 0;
1118 unsigned long flags;
1119 int cnt, usercnt, avail;
1120
1121 pr_debug("write: count=%d\n", count);
1122
1123 if (db->mapped)
1124 return -ENXIO;
1125 if (!access_ok(VERIFY_READ, buffer, count))
1126 return -EFAULT;
1127
1128 count *= db->cnt_factor;
1129
1130 mutex_lock(&s->sem);
1131 add_wait_queue(&db->wait, &wait);
1132
1133 while (count > 0) {
1134 /* wait for space in playback buffer
1135 */
1136 do {
1137 spin_lock_irqsave(&s->lock, flags);
1138 avail = (int) db->dmasize - db->count;
1139 if (avail <= 0)
1140 __set_current_state(TASK_INTERRUPTIBLE);
1141 spin_unlock_irqrestore(&s->lock, flags);
1142 if (avail <= 0) {
1143 if (file->f_flags & O_NONBLOCK) {
1144 if (!ret)
1145 ret = -EAGAIN;
1146 goto out;
1147 }
1148 mutex_unlock(&s->sem);
1149 schedule();
1150 if (signal_pending(current)) {
1151 if (!ret)
1152 ret = -ERESTARTSYS;
1153 goto out2;
1154 }
1155 mutex_lock(&s->sem);
1156 }
1157 } while (avail <= 0);
1158
1159 /* copy from user to nextIn
1160 */
1161 if ((cnt = copy_dmabuf_user(db, (char *) buffer,
1162 count > avail ?
1163 avail : count, 0)) < 0) {
1164 if (!ret)
1165 ret = -EFAULT;
1166 goto out;
1167 }
1168
1169 spin_lock_irqsave(&s->lock, flags);
1170 db->count += cnt;
1171 db->nextIn += cnt;
1172 if (db->nextIn >= db->rawbuf + db->dmasize)
1173 db->nextIn -= db->dmasize;
1174
1175 /* If the data is available, we want to keep two buffers
1176 * on the dma queue. If the queue count reaches zero,
1177 * we know the dma has stopped.
1178 */
1179 while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
1180 if (au1xxx_dbdma_put_source(db->dmanr,
1181 virt_to_phys(db->nextOut), db->fragsize,
1182 DDMA_FLAGS_IE) == 0) {
1183 err("qcount < 2 and no ring room!");
1184 }
1185 db->nextOut += db->fragsize;
1186 if (db->nextOut >= db->rawbuf + db->dmasize)
1187 db->nextOut -= db->dmasize;
1188 db->total_bytes += db->dma_fragsize;
1189 if (db->dma_qcount == 0)
1190 start_dac(s);
1191 db->dma_qcount++;
1192 }
1193 spin_unlock_irqrestore(&s->lock, flags);
1194
1195 count -= cnt;
1196 usercnt = cnt / db->cnt_factor;
1197 buffer += usercnt;
1198 ret += usercnt;
1199 } /* while (count > 0) */
1200
1201out:
1202 mutex_unlock(&s->sem);
1203out2:
1204 remove_wait_queue(&db->wait, &wait);
1205 set_current_state(TASK_RUNNING);
1206 return ret;
1207}
1208
1209
1210/* No kernel lock - we have our own spinlock */
1211static unsigned int
1212au1550_poll(struct file *file, struct poll_table_struct *wait)
1213{
1214 struct au1550_state *s = file->private_data;
1215 unsigned long flags;
1216 unsigned int mask = 0;
1217
1218 if (file->f_mode & FMODE_WRITE) {
1219 if (!s->dma_dac.ready)
1220 return 0;
1221 poll_wait(file, &s->dma_dac.wait, wait);
1222 }
1223 if (file->f_mode & FMODE_READ) {
1224 if (!s->dma_adc.ready)
1225 return 0;
1226 poll_wait(file, &s->dma_adc.wait, wait);
1227 }
1228
1229 spin_lock_irqsave(&s->lock, flags);
1230
1231 if (file->f_mode & FMODE_READ) {
1232 if (s->dma_adc.count >= (signed)s->dma_adc.dma_fragsize)
1233 mask |= POLLIN | POLLRDNORM;
1234 }
1235 if (file->f_mode & FMODE_WRITE) {
1236 if (s->dma_dac.mapped) {
1237 if (s->dma_dac.count >=
1238 (signed)s->dma_dac.dma_fragsize)
1239 mask |= POLLOUT | POLLWRNORM;
1240 } else {
1241 if ((signed) s->dma_dac.dmasize >=
1242 s->dma_dac.count + (signed)s->dma_dac.dma_fragsize)
1243 mask |= POLLOUT | POLLWRNORM;
1244 }
1245 }
1246 spin_unlock_irqrestore(&s->lock, flags);
1247 return mask;
1248}
1249
1250static int
1251au1550_mmap(struct file *file, struct vm_area_struct *vma)
1252{
1253 struct au1550_state *s = file->private_data;
1254 struct dmabuf *db;
1255 unsigned long size;
1256 int ret = 0;
1257
1258 mutex_lock(&au1550_ac97_mutex);
1259 mutex_lock(&s->sem);
1260 if (vma->vm_flags & VM_WRITE)
1261 db = &s->dma_dac;
1262 else if (vma->vm_flags & VM_READ)
1263 db = &s->dma_adc;
1264 else {
1265 ret = -EINVAL;
1266 goto out;
1267 }
1268 if (vma->vm_pgoff != 0) {
1269 ret = -EINVAL;
1270 goto out;
1271 }
1272 size = vma->vm_end - vma->vm_start;
1273 if (size > (PAGE_SIZE << db->buforder)) {
1274 ret = -EINVAL;
1275 goto out;
1276 }
1277 if (remap_pfn_range(vma, vma->vm_start, page_to_pfn(virt_to_page(db->rawbuf)),
1278 size, vma->vm_page_prot)) {
1279 ret = -EAGAIN;
1280 goto out;
1281 }
1282 vma->vm_flags &= ~VM_IO;
1283 db->mapped = 1;
1284out:
1285 mutex_unlock(&s->sem);
1286 mutex_unlock(&au1550_ac97_mutex);
1287 return ret;
1288}
1289
1290#ifdef DEBUG
1291static struct ioctl_str_t {
1292 unsigned int cmd;
1293 const char *str;
1294} ioctl_str[] = {
1295 {SNDCTL_DSP_RESET, "SNDCTL_DSP_RESET"},
1296 {SNDCTL_DSP_SYNC, "SNDCTL_DSP_SYNC"},
1297 {SNDCTL_DSP_SPEED, "SNDCTL_DSP_SPEED"},
1298 {SNDCTL_DSP_STEREO, "SNDCTL_DSP_STEREO"},
1299 {SNDCTL_DSP_GETBLKSIZE, "SNDCTL_DSP_GETBLKSIZE"},
1300 {SNDCTL_DSP_SAMPLESIZE, "SNDCTL_DSP_SAMPLESIZE"},
1301 {SNDCTL_DSP_CHANNELS, "SNDCTL_DSP_CHANNELS"},
1302 {SOUND_PCM_WRITE_CHANNELS, "SOUND_PCM_WRITE_CHANNELS"},
1303 {SOUND_PCM_WRITE_FILTER, "SOUND_PCM_WRITE_FILTER"},
1304 {SNDCTL_DSP_POST, "SNDCTL_DSP_POST"},
1305 {SNDCTL_DSP_SUBDIVIDE, "SNDCTL_DSP_SUBDIVIDE"},
1306 {SNDCTL_DSP_SETFRAGMENT, "SNDCTL_DSP_SETFRAGMENT"},
1307 {SNDCTL_DSP_GETFMTS, "SNDCTL_DSP_GETFMTS"},
1308 {SNDCTL_DSP_SETFMT, "SNDCTL_DSP_SETFMT"},
1309 {SNDCTL_DSP_GETOSPACE, "SNDCTL_DSP_GETOSPACE"},
1310 {SNDCTL_DSP_GETISPACE, "SNDCTL_DSP_GETISPACE"},
1311 {SNDCTL_DSP_NONBLOCK, "SNDCTL_DSP_NONBLOCK"},
1312 {SNDCTL_DSP_GETCAPS, "SNDCTL_DSP_GETCAPS"},
1313 {SNDCTL_DSP_GETTRIGGER, "SNDCTL_DSP_GETTRIGGER"},
1314 {SNDCTL_DSP_SETTRIGGER, "SNDCTL_DSP_SETTRIGGER"},
1315 {SNDCTL_DSP_GETIPTR, "SNDCTL_DSP_GETIPTR"},
1316 {SNDCTL_DSP_GETOPTR, "SNDCTL_DSP_GETOPTR"},
1317 {SNDCTL_DSP_MAPINBUF, "SNDCTL_DSP_MAPINBUF"},
1318 {SNDCTL_DSP_MAPOUTBUF, "SNDCTL_DSP_MAPOUTBUF"},
1319 {SNDCTL_DSP_SETSYNCRO, "SNDCTL_DSP_SETSYNCRO"},
1320 {SNDCTL_DSP_SETDUPLEX, "SNDCTL_DSP_SETDUPLEX"},
1321 {SNDCTL_DSP_GETODELAY, "SNDCTL_DSP_GETODELAY"},
1322 {SNDCTL_DSP_GETCHANNELMASK, "SNDCTL_DSP_GETCHANNELMASK"},
1323 {SNDCTL_DSP_BIND_CHANNEL, "SNDCTL_DSP_BIND_CHANNEL"},
1324 {OSS_GETVERSION, "OSS_GETVERSION"},
1325 {SOUND_PCM_READ_RATE, "SOUND_PCM_READ_RATE"},
1326 {SOUND_PCM_READ_CHANNELS, "SOUND_PCM_READ_CHANNELS"},
1327 {SOUND_PCM_READ_BITS, "SOUND_PCM_READ_BITS"},
1328 {SOUND_PCM_READ_FILTER, "SOUND_PCM_READ_FILTER"}
1329};
1330#endif
1331
1332static int
1333dma_count_done(struct dmabuf *db)
1334{
1335 if (db->stopped)
1336 return 0;
1337
1338 return db->dma_fragsize - au1xxx_get_dma_residue(db->dmanr);
1339}
1340
1341
1342static int
1343au1550_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1344{
1345 struct au1550_state *s = file->private_data;
1346 unsigned long flags;
1347 audio_buf_info abinfo;
1348 count_info cinfo;
1349 int count;
1350 int val, mapped, ret, diff;
1351
1352 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1353 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1354
1355#ifdef DEBUG
1356 for (count = 0; count < ARRAY_SIZE(ioctl_str); count++) {
1357 if (ioctl_str[count].cmd == cmd)
1358 break;
1359 }
1360 if (count < ARRAY_SIZE(ioctl_str))
1361 pr_debug("ioctl %s, arg=0x%lxn", ioctl_str[count].str, arg);
1362 else
1363 pr_debug("ioctl 0x%x unknown, arg=0x%lx\n", cmd, arg);
1364#endif
1365
1366 switch (cmd) {
1367 case OSS_GETVERSION:
1368 return put_user(SOUND_VERSION, (int *) arg);
1369
1370 case SNDCTL_DSP_SYNC:
1371 if (file->f_mode & FMODE_WRITE)
1372 return drain_dac(s, file->f_flags & O_NONBLOCK);
1373 return 0;
1374
1375 case SNDCTL_DSP_SETDUPLEX:
1376 return 0;
1377
1378 case SNDCTL_DSP_GETCAPS:
1379 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME |
1380 DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1381
1382 case SNDCTL_DSP_RESET:
1383 if (file->f_mode & FMODE_WRITE) {
1384 stop_dac(s);
1385 synchronize_irq();
1386 s->dma_dac.count = s->dma_dac.total_bytes = 0;
1387 s->dma_dac.nextIn = s->dma_dac.nextOut =
1388 s->dma_dac.rawbuf;
1389 }
1390 if (file->f_mode & FMODE_READ) {
1391 stop_adc(s);
1392 synchronize_irq();
1393 s->dma_adc.count = s->dma_adc.total_bytes = 0;
1394 s->dma_adc.nextIn = s->dma_adc.nextOut =
1395 s->dma_adc.rawbuf;
1396 }
1397 return 0;
1398
1399 case SNDCTL_DSP_SPEED:
1400 if (get_user(val, (int *) arg))
1401 return -EFAULT;
1402 if (val >= 0) {
1403 if (file->f_mode & FMODE_READ) {
1404 stop_adc(s);
1405 set_adc_rate(s, val);
1406 }
1407 if (file->f_mode & FMODE_WRITE) {
1408 stop_dac(s);
1409 set_dac_rate(s, val);
1410 }
1411 if (s->open_mode & FMODE_READ)
1412 if ((ret = prog_dmabuf_adc(s)))
1413 return ret;
1414 if (s->open_mode & FMODE_WRITE)
1415 if ((ret = prog_dmabuf_dac(s)))
1416 return ret;
1417 }
1418 return put_user((file->f_mode & FMODE_READ) ?
1419 s->dma_adc.sample_rate :
1420 s->dma_dac.sample_rate,
1421 (int *)arg);
1422
1423 case SNDCTL_DSP_STEREO:
1424 if (get_user(val, (int *) arg))
1425 return -EFAULT;
1426 if (file->f_mode & FMODE_READ) {
1427 stop_adc(s);
1428 s->dma_adc.num_channels = val ? 2 : 1;
1429 if ((ret = prog_dmabuf_adc(s)))
1430 return ret;
1431 }
1432 if (file->f_mode & FMODE_WRITE) {
1433 stop_dac(s);
1434 s->dma_dac.num_channels = val ? 2 : 1;
1435 if (s->codec_ext_caps & AC97_EXT_DACS) {
1436 /* disable surround and center/lfe in AC'97
1437 */
1438 u16 ext_stat = rdcodec(s->codec,
1439 AC97_EXTENDED_STATUS);
1440 wrcodec(s->codec, AC97_EXTENDED_STATUS,
1441 ext_stat | (AC97_EXTSTAT_PRI |
1442 AC97_EXTSTAT_PRJ |
1443 AC97_EXTSTAT_PRK));
1444 }
1445 if ((ret = prog_dmabuf_dac(s)))
1446 return ret;
1447 }
1448 return 0;
1449
1450 case SNDCTL_DSP_CHANNELS:
1451 if (get_user(val, (int *) arg))
1452 return -EFAULT;
1453 if (val != 0) {
1454 if (file->f_mode & FMODE_READ) {
1455 if (val < 0 || val > 2)
1456 return -EINVAL;
1457 stop_adc(s);
1458 s->dma_adc.num_channels = val;
1459 if ((ret = prog_dmabuf_adc(s)))
1460 return ret;
1461 }
1462 if (file->f_mode & FMODE_WRITE) {
1463 switch (val) {
1464 case 1:
1465 case 2:
1466 break;
1467 case 3:
1468 case 5:
1469 return -EINVAL;
1470 case 4:
1471 if (!(s->codec_ext_caps &
1472 AC97_EXTID_SDAC))
1473 return -EINVAL;
1474 break;
1475 case 6:
1476 if ((s->codec_ext_caps &
1477 AC97_EXT_DACS) != AC97_EXT_DACS)
1478 return -EINVAL;
1479 break;
1480 default:
1481 return -EINVAL;
1482 }
1483
1484 stop_dac(s);
1485 if (val <= 2 &&
1486 (s->codec_ext_caps & AC97_EXT_DACS)) {
1487 /* disable surround and center/lfe
1488 * channels in AC'97
1489 */
1490 u16 ext_stat =
1491 rdcodec(s->codec,
1492 AC97_EXTENDED_STATUS);
1493 wrcodec(s->codec,
1494 AC97_EXTENDED_STATUS,
1495 ext_stat | (AC97_EXTSTAT_PRI |
1496 AC97_EXTSTAT_PRJ |
1497 AC97_EXTSTAT_PRK));
1498 } else if (val >= 4) {
1499 /* enable surround, center/lfe
1500 * channels in AC'97
1501 */
1502 u16 ext_stat =
1503 rdcodec(s->codec,
1504 AC97_EXTENDED_STATUS);
1505 ext_stat &= ~AC97_EXTSTAT_PRJ;
1506 if (val == 6)
1507 ext_stat &=
1508 ~(AC97_EXTSTAT_PRI |
1509 AC97_EXTSTAT_PRK);
1510 wrcodec(s->codec,
1511 AC97_EXTENDED_STATUS,
1512 ext_stat);
1513 }
1514
1515 s->dma_dac.num_channels = val;
1516 if ((ret = prog_dmabuf_dac(s)))
1517 return ret;
1518 }
1519 }
1520 return put_user(val, (int *) arg);
1521
1522 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1523 return put_user(AFMT_S16_LE | AFMT_U8, (int *) arg);
1524
1525 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt */
1526 if (get_user(val, (int *) arg))
1527 return -EFAULT;
1528 if (val != AFMT_QUERY) {
1529 if (file->f_mode & FMODE_READ) {
1530 stop_adc(s);
1531 if (val == AFMT_S16_LE)
1532 s->dma_adc.sample_size = 16;
1533 else {
1534 val = AFMT_U8;
1535 s->dma_adc.sample_size = 8;
1536 }
1537 if ((ret = prog_dmabuf_adc(s)))
1538 return ret;
1539 }
1540 if (file->f_mode & FMODE_WRITE) {
1541 stop_dac(s);
1542 if (val == AFMT_S16_LE)
1543 s->dma_dac.sample_size = 16;
1544 else {
1545 val = AFMT_U8;
1546 s->dma_dac.sample_size = 8;
1547 }
1548 if ((ret = prog_dmabuf_dac(s)))
1549 return ret;
1550 }
1551 } else {
1552 if (file->f_mode & FMODE_READ)
1553 val = (s->dma_adc.sample_size == 16) ?
1554 AFMT_S16_LE : AFMT_U8;
1555 else
1556 val = (s->dma_dac.sample_size == 16) ?
1557 AFMT_S16_LE : AFMT_U8;
1558 }
1559 return put_user(val, (int *) arg);
1560
1561 case SNDCTL_DSP_POST:
1562 return 0;
1563
1564 case SNDCTL_DSP_GETTRIGGER:
1565 val = 0;
1566 spin_lock_irqsave(&s->lock, flags);
1567 if (file->f_mode & FMODE_READ && !s->dma_adc.stopped)
1568 val |= PCM_ENABLE_INPUT;
1569 if (file->f_mode & FMODE_WRITE && !s->dma_dac.stopped)
1570 val |= PCM_ENABLE_OUTPUT;
1571 spin_unlock_irqrestore(&s->lock, flags);
1572 return put_user(val, (int *) arg);
1573
1574 case SNDCTL_DSP_SETTRIGGER:
1575 if (get_user(val, (int *) arg))
1576 return -EFAULT;
1577 if (file->f_mode & FMODE_READ) {
1578 if (val & PCM_ENABLE_INPUT) {
1579 spin_lock_irqsave(&s->lock, flags);
1580 start_adc(s);
1581 spin_unlock_irqrestore(&s->lock, flags);
1582 } else
1583 stop_adc(s);
1584 }
1585 if (file->f_mode & FMODE_WRITE) {
1586 if (val & PCM_ENABLE_OUTPUT) {
1587 spin_lock_irqsave(&s->lock, flags);
1588 start_dac(s);
1589 spin_unlock_irqrestore(&s->lock, flags);
1590 } else
1591 stop_dac(s);
1592 }
1593 return 0;
1594
1595 case SNDCTL_DSP_GETOSPACE:
1596 if (!(file->f_mode & FMODE_WRITE))
1597 return -EINVAL;
1598 abinfo.fragsize = s->dma_dac.fragsize;
1599 spin_lock_irqsave(&s->lock, flags);
1600 count = s->dma_dac.count;
1601 count -= dma_count_done(&s->dma_dac);
1602 spin_unlock_irqrestore(&s->lock, flags);
1603 if (count < 0)
1604 count = 0;
1605 abinfo.bytes = (s->dma_dac.dmasize - count) /
1606 s->dma_dac.cnt_factor;
1607 abinfo.fragstotal = s->dma_dac.numfrag;
1608 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1609 pr_debug("ioctl SNDCTL_DSP_GETOSPACE: bytes=%d, fragments=%d\n", abinfo.bytes, abinfo.fragments);
1610 return copy_to_user((void *) arg, &abinfo,
1611 sizeof(abinfo)) ? -EFAULT : 0;
1612
1613 case SNDCTL_DSP_GETISPACE:
1614 if (!(file->f_mode & FMODE_READ))
1615 return -EINVAL;
1616 abinfo.fragsize = s->dma_adc.fragsize;
1617 spin_lock_irqsave(&s->lock, flags);
1618 count = s->dma_adc.count;
1619 count += dma_count_done(&s->dma_adc);
1620 spin_unlock_irqrestore(&s->lock, flags);
1621 if (count < 0)
1622 count = 0;
1623 abinfo.bytes = count / s->dma_adc.cnt_factor;
1624 abinfo.fragstotal = s->dma_adc.numfrag;
1625 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1626 return copy_to_user((void *) arg, &abinfo,
1627 sizeof(abinfo)) ? -EFAULT : 0;
1628
1629 case SNDCTL_DSP_NONBLOCK:
1630 spin_lock(&file->f_lock);
1631 file->f_flags |= O_NONBLOCK;
1632 spin_unlock(&file->f_lock);
1633 return 0;
1634
1635 case SNDCTL_DSP_GETODELAY:
1636 if (!(file->f_mode & FMODE_WRITE))
1637 return -EINVAL;
1638 spin_lock_irqsave(&s->lock, flags);
1639 count = s->dma_dac.count;
1640 count -= dma_count_done(&s->dma_dac);
1641 spin_unlock_irqrestore(&s->lock, flags);
1642 if (count < 0)
1643 count = 0;
1644 count /= s->dma_dac.cnt_factor;
1645 return put_user(count, (int *) arg);
1646
1647 case SNDCTL_DSP_GETIPTR:
1648 if (!(file->f_mode & FMODE_READ))
1649 return -EINVAL;
1650 spin_lock_irqsave(&s->lock, flags);
1651 cinfo.bytes = s->dma_adc.total_bytes;
1652 count = s->dma_adc.count;
1653 if (!s->dma_adc.stopped) {
1654 diff = dma_count_done(&s->dma_adc);
1655 count += diff;
1656 cinfo.bytes += diff;
1657 cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) + diff -
1658 virt_to_phys(s->dma_adc.rawbuf);
1659 } else
1660 cinfo.ptr = virt_to_phys(s->dma_adc.nextIn) -
1661 virt_to_phys(s->dma_adc.rawbuf);
1662 if (s->dma_adc.mapped)
1663 s->dma_adc.count &= (s->dma_adc.dma_fragsize-1);
1664 spin_unlock_irqrestore(&s->lock, flags);
1665 if (count < 0)
1666 count = 0;
1667 cinfo.blocks = count >> s->dma_adc.fragshift;
1668 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo));
1669
1670 case SNDCTL_DSP_GETOPTR:
1671 if (!(file->f_mode & FMODE_READ))
1672 return -EINVAL;
1673 spin_lock_irqsave(&s->lock, flags);
1674 cinfo.bytes = s->dma_dac.total_bytes;
1675 count = s->dma_dac.count;
1676 if (!s->dma_dac.stopped) {
1677 diff = dma_count_done(&s->dma_dac);
1678 count -= diff;
1679 cinfo.bytes += diff;
1680 cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) + diff -
1681 virt_to_phys(s->dma_dac.rawbuf);
1682 } else
1683 cinfo.ptr = virt_to_phys(s->dma_dac.nextOut) -
1684 virt_to_phys(s->dma_dac.rawbuf);
1685 if (s->dma_dac.mapped)
1686 s->dma_dac.count &= (s->dma_dac.dma_fragsize-1);
1687 spin_unlock_irqrestore(&s->lock, flags);
1688 if (count < 0)
1689 count = 0;
1690 cinfo.blocks = count >> s->dma_dac.fragshift;
1691 return copy_to_user((void *) arg, &cinfo, sizeof(cinfo));
1692
1693 case SNDCTL_DSP_GETBLKSIZE:
1694 if (file->f_mode & FMODE_WRITE)
1695 return put_user(s->dma_dac.fragsize, (int *) arg);
1696 else
1697 return put_user(s->dma_adc.fragsize, (int *) arg);
1698
1699 case SNDCTL_DSP_SETFRAGMENT:
1700 if (get_user(val, (int *) arg))
1701 return -EFAULT;
1702 if (file->f_mode & FMODE_READ) {
1703 stop_adc(s);
1704 s->dma_adc.ossfragshift = val & 0xffff;
1705 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1706 if (s->dma_adc.ossfragshift < 4)
1707 s->dma_adc.ossfragshift = 4;
1708 if (s->dma_adc.ossfragshift > 15)
1709 s->dma_adc.ossfragshift = 15;
1710 if (s->dma_adc.ossmaxfrags < 4)
1711 s->dma_adc.ossmaxfrags = 4;
1712 if ((ret = prog_dmabuf_adc(s)))
1713 return ret;
1714 }
1715 if (file->f_mode & FMODE_WRITE) {
1716 stop_dac(s);
1717 s->dma_dac.ossfragshift = val & 0xffff;
1718 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1719 if (s->dma_dac.ossfragshift < 4)
1720 s->dma_dac.ossfragshift = 4;
1721 if (s->dma_dac.ossfragshift > 15)
1722 s->dma_dac.ossfragshift = 15;
1723 if (s->dma_dac.ossmaxfrags < 4)
1724 s->dma_dac.ossmaxfrags = 4;
1725 if ((ret = prog_dmabuf_dac(s)))
1726 return ret;
1727 }
1728 return 0;
1729
1730 case SNDCTL_DSP_SUBDIVIDE:
1731 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1732 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1733 return -EINVAL;
1734 if (get_user(val, (int *) arg))
1735 return -EFAULT;
1736 if (val != 1 && val != 2 && val != 4)
1737 return -EINVAL;
1738 if (file->f_mode & FMODE_READ) {
1739 stop_adc(s);
1740 s->dma_adc.subdivision = val;
1741 if ((ret = prog_dmabuf_adc(s)))
1742 return ret;
1743 }
1744 if (file->f_mode & FMODE_WRITE) {
1745 stop_dac(s);
1746 s->dma_dac.subdivision = val;
1747 if ((ret = prog_dmabuf_dac(s)))
1748 return ret;
1749 }
1750 return 0;
1751
1752 case SOUND_PCM_READ_RATE:
1753 return put_user((file->f_mode & FMODE_READ) ?
1754 s->dma_adc.sample_rate :
1755 s->dma_dac.sample_rate,
1756 (int *)arg);
1757
1758 case SOUND_PCM_READ_CHANNELS:
1759 if (file->f_mode & FMODE_READ)
1760 return put_user(s->dma_adc.num_channels, (int *)arg);
1761 else
1762 return put_user(s->dma_dac.num_channels, (int *)arg);
1763
1764 case SOUND_PCM_READ_BITS:
1765 if (file->f_mode & FMODE_READ)
1766 return put_user(s->dma_adc.sample_size, (int *)arg);
1767 else
1768 return put_user(s->dma_dac.sample_size, (int *)arg);
1769
1770 case SOUND_PCM_WRITE_FILTER:
1771 case SNDCTL_DSP_SETSYNCRO:
1772 case SOUND_PCM_READ_FILTER:
1773 return -EINVAL;
1774 }
1775
1776 return mixdev_ioctl(s->codec, cmd, arg);
1777}
1778
1779static long
1780au1550_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1781{
1782 int ret;
1783
1784 mutex_lock(&au1550_ac97_mutex);
1785 ret = au1550_ioctl(file, cmd, arg);
1786 mutex_unlock(&au1550_ac97_mutex);
1787
1788 return ret;
1789}
1790
1791static int
1792au1550_open(struct inode *inode, struct file *file)
1793{
1794 int minor = MINOR(inode->i_rdev);
1795 DECLARE_WAITQUEUE(wait, current);
1796 struct au1550_state *s = &au1550_state;
1797 int ret;
1798
1799#ifdef DEBUG
1800 if (file->f_flags & O_NONBLOCK)
1801 pr_debug("open: non-blocking\n");
1802 else
1803 pr_debug("open: blocking\n");
1804#endif
1805
1806 file->private_data = s;
1807 mutex_lock(&au1550_ac97_mutex);
1808 /* wait for device to become free */
1809 mutex_lock(&s->open_mutex);
1810 while (s->open_mode & file->f_mode) {
1811 ret = -EBUSY;
1812 if (file->f_flags & O_NONBLOCK)
1813 goto out;
1814 add_wait_queue(&s->open_wait, &wait);
1815 __set_current_state(TASK_INTERRUPTIBLE);
1816 mutex_unlock(&s->open_mutex);
1817 schedule();
1818 remove_wait_queue(&s->open_wait, &wait);
1819 set_current_state(TASK_RUNNING);
1820 ret = -ERESTARTSYS;
1821 if (signal_pending(current))
1822 goto out2;
1823 mutex_lock(&s->open_mutex);
1824 }
1825
1826 stop_dac(s);
1827 stop_adc(s);
1828
1829 if (file->f_mode & FMODE_READ) {
1830 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
1831 s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
1832 s->dma_adc.num_channels = 1;
1833 s->dma_adc.sample_size = 8;
1834 set_adc_rate(s, 8000);
1835 if ((minor & 0xf) == SND_DEV_DSP16)
1836 s->dma_adc.sample_size = 16;
1837 }
1838
1839 if (file->f_mode & FMODE_WRITE) {
1840 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
1841 s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
1842 s->dma_dac.num_channels = 1;
1843 s->dma_dac.sample_size = 8;
1844 set_dac_rate(s, 8000);
1845 if ((minor & 0xf) == SND_DEV_DSP16)
1846 s->dma_dac.sample_size = 16;
1847 }
1848
1849 if (file->f_mode & FMODE_READ) {
1850 if ((ret = prog_dmabuf_adc(s)))
1851 goto out;
1852 }
1853 if (file->f_mode & FMODE_WRITE) {
1854 if ((ret = prog_dmabuf_dac(s)))
1855 goto out;
1856 }
1857
1858 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1859 mutex_init(&s->sem);
1860 ret = 0;
1861out:
1862 mutex_unlock(&s->open_mutex);
1863out2:
1864 mutex_unlock(&au1550_ac97_mutex);
1865 return ret;
1866}
1867
1868static int
1869au1550_release(struct inode *inode, struct file *file)
1870{
1871 struct au1550_state *s = file->private_data;
1872
1873 mutex_lock(&au1550_ac97_mutex);
1874
1875 if (file->f_mode & FMODE_WRITE) {
1876 mutex_unlock(&au1550_ac97_mutex);
1877 drain_dac(s, file->f_flags & O_NONBLOCK);
1878 mutex_lock(&au1550_ac97_mutex);
1879 }
1880
1881 mutex_lock(&s->open_mutex);
1882 if (file->f_mode & FMODE_WRITE) {
1883 stop_dac(s);
1884 kfree(s->dma_dac.rawbuf);
1885 s->dma_dac.rawbuf = NULL;
1886 }
1887 if (file->f_mode & FMODE_READ) {
1888 stop_adc(s);
1889 kfree(s->dma_adc.rawbuf);
1890 s->dma_adc.rawbuf = NULL;
1891 }
1892 s->open_mode &= ((~file->f_mode) & (FMODE_READ|FMODE_WRITE));
1893 mutex_unlock(&s->open_mutex);
1894 wake_up(&s->open_wait);
1895 mutex_unlock(&au1550_ac97_mutex);
1896 return 0;
1897}
1898
1899static /*const */ struct file_operations au1550_audio_fops = {
1900 .owner = THIS_MODULE,
1901 .llseek = au1550_llseek,
1902 .read = au1550_read,
1903 .write = au1550_write,
1904 .poll = au1550_poll,
1905 .unlocked_ioctl = au1550_unlocked_ioctl,
1906 .mmap = au1550_mmap,
1907 .open = au1550_open,
1908 .release = au1550_release,
1909};
1910
1911MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com");
1912MODULE_DESCRIPTION("Au1550 AC97 Audio Driver");
1913MODULE_LICENSE("GPL");
1914
1915
1916static int __devinit
1917au1550_probe(void)
1918{
1919 struct au1550_state *s = &au1550_state;
1920 int val;
1921
1922 memset(s, 0, sizeof(struct au1550_state));
1923
1924 init_waitqueue_head(&s->dma_adc.wait);
1925 init_waitqueue_head(&s->dma_dac.wait);
1926 init_waitqueue_head(&s->open_wait);
1927 mutex_init(&s->open_mutex);
1928 spin_lock_init(&s->lock);
1929
1930 s->codec = ac97_alloc_codec();
1931 if(s->codec == NULL) {
1932 err("Out of memory");
1933 return -1;
1934 }
1935 s->codec->private_data = s;
1936 s->codec->id = 0;
1937 s->codec->codec_read = rdcodec;
1938 s->codec->codec_write = wrcodec;
1939 s->codec->codec_wait = waitcodec;
1940
1941 if (!request_mem_region(CPHYSADDR(AC97_PSC_SEL),
1942 0x30, "Au1550 AC97")) {
1943 err("AC'97 ports in use");
1944 }
1945
1946 /* Allocate the DMA Channels
1947 */
1948 if ((s->dma_dac.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_MEM_CHAN,
1949 DBDMA_AC97_TX_CHAN, dac_dma_interrupt, (void *)s)) == 0) {
1950 err("Can't get DAC DMA");
1951 goto err_dma1;
1952 }
1953 au1xxx_dbdma_set_devwidth(s->dma_dac.dmanr, 16);
1954 if (au1xxx_dbdma_ring_alloc(s->dma_dac.dmanr,
1955 NUM_DBDMA_DESCRIPTORS) == 0) {
1956 err("Can't get DAC DMA descriptors");
1957 goto err_dma1;
1958 }
1959
1960 if ((s->dma_adc.dmanr = au1xxx_dbdma_chan_alloc(DBDMA_AC97_RX_CHAN,
1961 DBDMA_MEM_CHAN, adc_dma_interrupt, (void *)s)) == 0) {
1962 err("Can't get ADC DMA");
1963 goto err_dma2;
1964 }
1965 au1xxx_dbdma_set_devwidth(s->dma_adc.dmanr, 16);
1966 if (au1xxx_dbdma_ring_alloc(s->dma_adc.dmanr,
1967 NUM_DBDMA_DESCRIPTORS) == 0) {
1968 err("Can't get ADC DMA descriptors");
1969 goto err_dma2;
1970 }
1971
1972 pr_info("DAC: DMA%d, ADC: DMA%d", DBDMA_AC97_TX_CHAN, DBDMA_AC97_RX_CHAN);
1973
1974 /* register devices */
1975
1976 if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0)
1977 goto err_dev1;
1978 if ((s->codec->dev_mixer =
1979 register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
1980 goto err_dev2;
1981
1982 /* The GPIO for the appropriate PSC was configured by the
1983 * board specific start up.
1984 *
1985 * configure PSC for AC'97
1986 */
1987 au_writel(0, AC97_PSC_CTRL); /* Disable PSC */
1988 au_sync();
1989 au_writel((PSC_SEL_CLK_SERCLK | PSC_SEL_PS_AC97MODE), AC97_PSC_SEL);
1990 au_sync();
1991
1992 /* cold reset the AC'97
1993 */
1994 au_writel(PSC_AC97RST_RST, PSC_AC97RST);
1995 au_sync();
1996 au1550_delay(10);
1997 au_writel(0, PSC_AC97RST);
1998 au_sync();
1999
2000 /* need to delay around 500msec(bleech) to give
2001 some CODECs enough time to wakeup */
2002 au1550_delay(500);
2003
2004 /* warm reset the AC'97 to start the bitclk
2005 */
2006 au_writel(PSC_AC97RST_SNC, PSC_AC97RST);
2007 au_sync();
2008 udelay(100);
2009 au_writel(0, PSC_AC97RST);
2010 au_sync();
2011
2012 /* Enable PSC
2013 */
2014 au_writel(PSC_CTRL_ENABLE, AC97_PSC_CTRL);
2015 au_sync();
2016
2017 /* Wait for PSC ready.
2018 */
2019 do {
2020 val = au_readl(PSC_AC97STAT);
2021 au_sync();
2022 } while ((val & PSC_AC97STAT_SR) == 0);
2023
2024 /* Configure AC97 controller.
2025 * Deep FIFO, 16-bit sample, DMA, make sure DMA matches fifo size.
2026 */
2027 val = PSC_AC97CFG_SET_LEN(16);
2028 val |= PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8;
2029
2030 /* Enable device so we can at least
2031 * talk over the AC-link.
2032 */
2033 au_writel(val, PSC_AC97CFG);
2034 au_writel(PSC_AC97MSK_ALLMASK, PSC_AC97MSK);
2035 au_sync();
2036 val |= PSC_AC97CFG_DE_ENABLE;
2037 au_writel(val, PSC_AC97CFG);
2038 au_sync();
2039
2040 /* Wait for Device ready.
2041 */
2042 do {
2043 val = au_readl(PSC_AC97STAT);
2044 au_sync();
2045 } while ((val & PSC_AC97STAT_DR) == 0);
2046
2047 /* codec init */
2048 if (!ac97_probe_codec(s->codec))
2049 goto err_dev3;
2050
2051 s->codec_base_caps = rdcodec(s->codec, AC97_RESET);
2052 s->codec_ext_caps = rdcodec(s->codec, AC97_EXTENDED_ID);
2053 pr_info("AC'97 Base/Extended ID = %04x/%04x",
2054 s->codec_base_caps, s->codec_ext_caps);
2055
2056 if (!(s->codec_ext_caps & AC97_EXTID_VRA)) {
2057 /* codec does not support VRA
2058 */
2059 s->no_vra = 1;
2060 } else if (!vra) {
2061 /* Boot option says disable VRA
2062 */
2063 u16 ac97_extstat = rdcodec(s->codec, AC97_EXTENDED_STATUS);
2064 wrcodec(s->codec, AC97_EXTENDED_STATUS,
2065 ac97_extstat & ~AC97_EXTSTAT_VRA);
2066 s->no_vra = 1;
2067 }
2068 if (s->no_vra)
2069 pr_info("no VRA, interpolating and decimating");
2070
2071 /* set mic to be the recording source */
2072 val = SOUND_MASK_MIC;
2073 mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC,
2074 (unsigned long) &val);
2075
2076 return 0;
2077
2078 err_dev3:
2079 unregister_sound_mixer(s->codec->dev_mixer);
2080 err_dev2:
2081 unregister_sound_dsp(s->dev_audio);
2082 err_dev1:
2083 au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
2084 err_dma2:
2085 au1xxx_dbdma_chan_free(s->dma_dac.dmanr);
2086 err_dma1:
2087 release_mem_region(CPHYSADDR(AC97_PSC_SEL), 0x30);
2088
2089 ac97_release_codec(s->codec);
2090 return -1;
2091}
2092
2093static void __devinit
2094au1550_remove(void)
2095{
2096 struct au1550_state *s = &au1550_state;
2097
2098 if (!s)
2099 return;
2100 synchronize_irq();
2101 au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
2102 au1xxx_dbdma_chan_free(s->dma_dac.dmanr);
2103 release_mem_region(CPHYSADDR(AC97_PSC_SEL), 0x30);
2104 unregister_sound_dsp(s->dev_audio);
2105 unregister_sound_mixer(s->codec->dev_mixer);
2106 ac97_release_codec(s->codec);
2107}
2108
2109static int __init
2110init_au1550(void)
2111{
2112 return au1550_probe();
2113}
2114
2115static void __exit
2116cleanup_au1550(void)
2117{
2118 au1550_remove();
2119}
2120
2121module_init(init_au1550);
2122module_exit(cleanup_au1550);
2123
2124#ifndef MODULE
2125
2126static int __init
2127au1550_setup(char *options)
2128{
2129 char *this_opt;
2130
2131 if (!options || !*options)
2132 return 0;
2133
2134 while ((this_opt = strsep(&options, ","))) {
2135 if (!*this_opt)
2136 continue;
2137 if (!strncmp(this_opt, "vra", 3)) {
2138 vra = 1;
2139 }
2140 }
2141
2142 return 1;
2143}
2144
2145__setup("au1550_audio=", au1550_setup);
2146
2147#endif /* MODULE */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 09:04:15 -0500