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-rw-r--r--sound/oss/mad16.c1112
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diff --git a/sound/oss/mad16.c b/sound/oss/mad16.c
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1/*
2 * Copyright (C) by Hannu Savolainen 1993-1997
3 *
4 * mad16.c
5 *
6 * Initialization code for OPTi MAD16 compatible audio chips. Including
7 *
8 * OPTi 82C928 MAD16 (replaced by C929)
9 * OAK OTI-601D Mozart
10 * OAK OTI-605 Mozart (later version with MPU401 Midi)
11 * OPTi 82C929 MAD16 Pro
12 * OPTi 82C930
13 * OPTi 82C924
14 *
15 * These audio interface chips don't produce sound themselves. They just
16 * connect some other components (OPL-[234] and a WSS compatible codec)
17 * to the PC bus and perform I/O, DMA and IRQ address decoding. There is
18 * also a UART for the MPU-401 mode (not 82C928/Mozart).
19 * The Mozart chip appears to be compatible with the 82C928, although later
20 * issues of the card, using the OTI-605 chip, have an MPU-401 compatible Midi
21 * port. This port is configured differently to that of the OPTi audio chips.
22 *
23 * Changes
24 *
25 * Alan Cox Clean up, added module selections.
26 *
27 * A. Wik Added support for Opti924 PnP.
28 * Improved debugging support. 16-May-1998
29 * Fixed bug. 16-Jun-1998
30 *
31 * Torsten Duwe Made Opti924 PnP support non-destructive
32 * 23-Dec-1998
33 *
34 * Paul Grayson Added support for Midi on later Mozart cards.
35 * 25-Nov-1999
36 * Christoph Hellwig Adapted to module_init/module_exit.
37 * Arnaldo C. de Melo got rid of attach_uart401 21-Sep-2000
38 *
39 * Pavel Rabel Clean up Nov-2000
40 */
41
42#include <linux/init.h>
43#include <linux/module.h>
44#include <linux/gameport.h>
45#include <linux/spinlock.h>
46#include "sound_config.h"
47
48#include "ad1848.h"
49#include "sb.h"
50#include "mpu401.h"
51
52#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
53#define SUPPORT_JOYSTICK 1
54#endif
55
56static int mad16_conf;
57static int mad16_cdsel;
58static DEFINE_SPINLOCK(lock);
59
60#define C928 1
61#define MOZART 2
62#define C929 3
63#define C930 4
64#define C924 5
65
66/*
67 * Registers
68 *
69 * The MAD16 occupies I/O ports 0xf8d to 0xf93 (fixed locations).
70 * All ports are inactive by default. They can be activated by
71 * writing 0xE2 or 0xE3 to the password register. The password is valid
72 * only until the next I/O read or write.
73 *
74 * 82C930 uses 0xE4 as the password and indirect addressing to access
75 * the config registers.
76 */
77
78#define MC0_PORT 0xf8c /* Dummy port */
79#define MC1_PORT 0xf8d /* SB address, CD-ROM interface type, joystick */
80#define MC2_PORT 0xf8e /* CD-ROM address, IRQ, DMA, plus OPL4 bit */
81#define MC3_PORT 0xf8f
82#define PASSWD_REG 0xf8f
83#define MC4_PORT 0xf90
84#define MC5_PORT 0xf91
85#define MC6_PORT 0xf92
86#define MC7_PORT 0xf93
87#define MC8_PORT 0xf94
88#define MC9_PORT 0xf95
89#define MC10_PORT 0xf96
90#define MC11_PORT 0xf97
91#define MC12_PORT 0xf98
92
93static int board_type = C928;
94
95static int *mad16_osp;
96static int c931_detected; /* minor differences from C930 */
97static char c924pnp; /* " " " C924 */
98static int debug; /* debugging output */
99
100#ifdef DDB
101#undef DDB
102#endif
103#define DDB(x) do {if (debug) x;} while (0)
104
105static unsigned char mad_read(int port)
106{
107 unsigned long flags;
108 unsigned char tmp;
109
110 spin_lock_irqsave(&lock,flags);
111
112 switch (board_type) /* Output password */
113 {
114 case C928:
115 case MOZART:
116 outb((0xE2), PASSWD_REG);
117 break;
118
119 case C929:
120 outb((0xE3), PASSWD_REG);
121 break;
122
123 case C930:
124 /* outb(( 0xE4), PASSWD_REG); */
125 break;
126
127 case C924:
128 /* the c924 has its ports relocated by -128 if
129 PnP is enabled -aw */
130 if (!c924pnp)
131 outb((0xE5), PASSWD_REG); else
132 outb((0xE5), PASSWD_REG - 0x80);
133 break;
134 }
135
136 if (board_type == C930)
137 {
138 outb((port - MC0_PORT), 0xe0e); /* Write to index reg */
139 tmp = inb(0xe0f); /* Read from data reg */
140 }
141 else
142 if (!c924pnp)
143 tmp = inb(port); else
144 tmp = inb(port-0x80);
145 spin_unlock_irqrestore(&lock,flags);
146
147 return tmp;
148}
149
150static void mad_write(int port, int value)
151{
152 unsigned long flags;
153
154 spin_lock_irqsave(&lock,flags);
155
156 switch (board_type) /* Output password */
157 {
158 case C928:
159 case MOZART:
160 outb((0xE2), PASSWD_REG);
161 break;
162
163 case C929:
164 outb((0xE3), PASSWD_REG);
165 break;
166
167 case C930:
168 /* outb(( 0xE4), PASSWD_REG); */
169 break;
170
171 case C924:
172 if (!c924pnp)
173 outb((0xE5), PASSWD_REG); else
174 outb((0xE5), PASSWD_REG - 0x80);
175 break;
176 }
177
178 if (board_type == C930)
179 {
180 outb((port - MC0_PORT), 0xe0e); /* Write to index reg */
181 outb(((unsigned char) (value & 0xff)), 0xe0f);
182 }
183 else
184 if (!c924pnp)
185 outb(((unsigned char) (value & 0xff)), port); else
186 outb(((unsigned char) (value & 0xff)), port-0x80);
187 spin_unlock_irqrestore(&lock,flags);
188}
189
190static int __init detect_c930(void)
191{
192 unsigned char tmp = mad_read(MC1_PORT);
193
194 if ((tmp & 0x06) != 0x06)
195 {
196 DDB(printk("Wrong C930 signature (%x)\n", tmp));
197 /* return 0; */
198 }
199 mad_write(MC1_PORT, 0);
200
201 if (mad_read(MC1_PORT) != 0x06)
202 {
203 DDB(printk("Wrong C930 signature2 (%x)\n", tmp));
204 /* return 0; */
205 }
206 mad_write(MC1_PORT, tmp); /* Restore bits */
207
208 mad_write(MC7_PORT, 0);
209 if ((tmp = mad_read(MC7_PORT)) != 0)
210 {
211 DDB(printk("MC7 not writable (%x)\n", tmp));
212 return 0;
213 }
214 mad_write(MC7_PORT, 0xcb);
215 if ((tmp = mad_read(MC7_PORT)) != 0xcb)
216 {
217 DDB(printk("MC7 not writable2 (%x)\n", tmp));
218 return 0;
219 }
220
221 tmp = mad_read(MC0_PORT+18);
222 if (tmp == 0xff || tmp == 0x00)
223 return 1;
224 /* We probably have a C931 */
225 DDB(printk("Detected C931 config=0x%02x\n", tmp));
226 c931_detected = 1;
227
228 /*
229 * We cannot configure the chip if it is in PnP mode.
230 * If we have a CSN assigned (bit 8 in MC13) we first try
231 * a software reset, then a software power off, finally
232 * Clearing PnP mode. The last option is not
233 * Bit 8 in MC13
234 */
235 if ((mad_read(MC0_PORT+13) & 0x80) == 0)
236 return 1;
237
238 /* Software reset */
239 mad_write(MC9_PORT, 0x02);
240 mad_write(MC9_PORT, 0x00);
241
242 if ((mad_read(MC0_PORT+13) & 0x80) == 0)
243 return 1;
244
245 /* Power off, and on again */
246 mad_write(MC9_PORT, 0xc2);
247 mad_write(MC9_PORT, 0xc0);
248
249 if ((mad_read(MC0_PORT+13) & 0x80) == 0)
250 return 1;
251
252#if 0
253 /* Force off PnP mode. This is not recommended because
254 * the PnP bios will not recognize the chip on the next
255 * warm boot and may assignd different resources to other
256 * PnP/PCI cards.
257 */
258 mad_write(MC0_PORT+17, 0x04);
259#endif
260 return 1;
261}
262
263static int __init detect_mad16(void)
264{
265 unsigned char tmp, tmp2, bit;
266 int i, port;
267
268 /*
269 * Check that reading a register doesn't return bus float (0xff)
270 * when the card is accessed using password. This may fail in case
271 * the card is in low power mode. Normally at least the power saving
272 * mode bit should be 0.
273 */
274
275 if ((tmp = mad_read(MC1_PORT)) == 0xff)
276 {
277 DDB(printk("MC1_PORT returned 0xff\n"));
278 return 0;
279 }
280 for (i = 0xf8d; i <= 0xf98; i++)
281 if (!c924pnp)
282 DDB(printk("Port %0x (init value) = %0x\n", i, mad_read(i)));
283 else
284 DDB(printk("Port %0x (init value) = %0x\n", i-0x80, mad_read(i)));
285
286 if (board_type == C930)
287 return detect_c930();
288
289 /*
290 * Now check that the gate is closed on first I/O after writing
291 * the password. (This is how a MAD16 compatible card works).
292 */
293
294 if ((tmp2 = inb(MC1_PORT)) == tmp) /* It didn't close */
295 {
296 DDB(printk("MC1_PORT didn't close after read (0x%02x)\n", tmp2));
297 return 0;
298 }
299
300 bit = (c924pnp) ? 0x20 : 0x80;
301 port = (c924pnp) ? MC2_PORT : MC1_PORT;
302
303 tmp = mad_read(port);
304 mad_write(port, tmp ^ bit); /* Toggle a bit */
305 if ((tmp2 = mad_read(port)) != (tmp ^ bit)) /* Compare the bit */
306 {
307 mad_write(port, tmp); /* Restore */
308 DDB(printk("Bit revert test failed (0x%02x, 0x%02x)\n", tmp, tmp2));
309 return 0;
310 }
311 mad_write(port, tmp); /* Restore */
312 return 1; /* Bingo */
313}
314
315static int __init wss_init(struct address_info *hw_config)
316{
317 /*
318 * Check if the IO port returns valid signature. The original MS Sound
319 * system returns 0x04 while some cards (AudioTrix Pro for example)
320 * return 0x00.
321 */
322
323 if ((inb(hw_config->io_base + 3) & 0x3f) != 0x04 &&
324 (inb(hw_config->io_base + 3) & 0x3f) != 0x00)
325 {
326 DDB(printk("No MSS signature detected on port 0x%x (0x%x)\n", hw_config->io_base, inb(hw_config->io_base + 3)));
327 return 0;
328 }
329 /*
330 * Check that DMA0 is not in use with a 8 bit board.
331 */
332 if (hw_config->dma == 0 && inb(hw_config->io_base + 3) & 0x80)
333 {
334 printk("MSS: Can't use DMA0 with a 8 bit card/slot\n");
335 return 0;
336 }
337 if (hw_config->irq > 9 && inb(hw_config->io_base + 3) & 0x80)
338 printk(KERN_ERR "MSS: Can't use IRQ%d with a 8 bit card/slot\n", hw_config->irq);
339 return 1;
340}
341
342static void __init init_c930(struct address_info *hw_config, int base)
343{
344 unsigned char cfg = 0;
345
346 cfg |= (0x0f & mad16_conf);
347
348 if(c931_detected)
349 {
350 /* Bit 0 has reversd meaning. Bits 1 and 2 sese
351 reversed on write.
352 Support only IDE cdrom. IDE port programmed
353 somewhere else. */
354 cfg = (cfg & 0x09) ^ 0x07;
355 }
356 cfg |= base << 4;
357 mad_write(MC1_PORT, cfg);
358
359 /* MC2 is CD configuration. Don't touch it. */
360
361 mad_write(MC3_PORT, 0); /* Disable SB mode IRQ and DMA */
362
363 /* bit 2 of MC4 reverses it's meaning between the C930
364 and the C931. */
365 cfg = c931_detected ? 0x04 : 0x00;
366
367 if(mad16_cdsel & 0x20)
368 mad_write(MC4_PORT, 0x62|cfg); /* opl4 */
369 else
370 mad_write(MC4_PORT, 0x52|cfg); /* opl3 */
371
372 mad_write(MC5_PORT, 0x3C); /* Init it into mode2 */
373 mad_write(MC6_PORT, 0x02); /* Enable WSS, Disable MPU and SB */
374 mad_write(MC7_PORT, 0xCB);
375 mad_write(MC10_PORT, 0x11);
376}
377
378static int __init chip_detect(void)
379{
380 int i;
381
382 /*
383 * Then try to detect with the old password
384 */
385 board_type = C924;
386
387 DDB(printk("Detect using password = 0xE5\n"));
388
389 if (detect_mad16()) {
390 return 1;
391 }
392
393 board_type = C928;
394
395 DDB(printk("Detect using password = 0xE2\n"));
396
397 if (detect_mad16())
398 {
399 unsigned char model;
400
401 if (((model = mad_read(MC3_PORT)) & 0x03) == 0x03) {
402 DDB(printk("mad16.c: Mozart detected\n"));
403 board_type = MOZART;
404 } else {
405 DDB(printk("mad16.c: 82C928 detected???\n"));
406 board_type = C928;
407 }
408 return 1;
409 }
410
411 board_type = C929;
412
413 DDB(printk("Detect using password = 0xE3\n"));
414
415 if (detect_mad16())
416 {
417 DDB(printk("mad16.c: 82C929 detected\n"));
418 return 1;
419 }
420
421 if (inb(PASSWD_REG) != 0xff)
422 return 0;
423
424 /*
425 * First relocate MC# registers to 0xe0e/0xe0f, disable password
426 */
427
428 outb((0xE4), PASSWD_REG);
429 outb((0x80), PASSWD_REG);
430
431 board_type = C930;
432
433 DDB(printk("Detect using password = 0xE4\n"));
434
435 for (i = 0xf8d; i <= 0xf93; i++)
436 DDB(printk("port %03x = %02x\n", i, mad_read(i)));
437
438 if(detect_mad16()) {
439 DDB(printk("mad16.c: 82C930 detected\n"));
440 return 1;
441 }
442
443 /* The C931 has the password reg at F8D */
444 outb((0xE4), 0xF8D);
445 outb((0x80), 0xF8D);
446 DDB(printk("Detect using password = 0xE4 for C931\n"));
447
448 if (detect_mad16()) {
449 return 1;
450 }
451
452 board_type = C924;
453 c924pnp++;
454 DDB(printk("Detect using password = 0xE5 (again), port offset -0x80\n"));
455 if (detect_mad16()) {
456 DDB(printk("mad16.c: 82C924 PnP detected\n"));
457 return 1;
458 }
459
460 c924pnp=0;
461
462 return 0;
463}
464
465static int __init probe_mad16(struct address_info *hw_config)
466{
467 int i;
468 unsigned char tmp;
469 unsigned char cs4231_mode = 0;
470
471 int ad_flags = 0;
472
473 signed char bits;
474
475 static char dma_bits[4] = {
476 1, 2, 0, 3
477 };
478
479 int config_port = hw_config->io_base + 0, version_port = hw_config->io_base + 3;
480 int dma = hw_config->dma, dma2 = hw_config->dma2;
481 unsigned char dma2_bit = 0;
482 int base;
483 struct resource *ports;
484
485 mad16_osp = hw_config->osp;
486
487 switch (hw_config->io_base) {
488 case 0x530:
489 base = 0;
490 break;
491 case 0xe80:
492 base = 1;
493 break;
494 case 0xf40:
495 base = 2;
496 break;
497 case 0x604:
498 base = 3;
499 break;
500 default:
501 printk(KERN_ERR "MAD16/Mozart: Bad WSS base address 0x%x\n", hw_config->io_base);
502 return 0;
503 }
504
505 if (dma != 0 && dma != 1 && dma != 3) {
506 printk(KERN_ERR "MSS: Bad DMA %d\n", dma);
507 return 0;
508 }
509
510 /*
511 * Check that all ports return 0xff (bus float) when no password
512 * is written to the password register.
513 */
514
515 DDB(printk("--- Detecting MAD16 / Mozart ---\n"));
516 if (!chip_detect())
517 return 0;
518
519 switch (hw_config->irq) {
520 case 7:
521 bits = 8;
522 break;
523 case 9:
524 bits = 0x10;
525 break;
526 case 10:
527 bits = 0x18;
528 break;
529 case 12:
530 bits = 0x20;
531 break;
532 case 5: /* Also IRQ5 is possible on C930 */
533 if (board_type == C930 || c924pnp) {
534 bits = 0x28;
535 break;
536 }
537 default:
538 printk(KERN_ERR "MAD16/Mozart: Bad IRQ %d\n", hw_config->irq);
539 return 0;
540 }
541
542 ports = request_region(hw_config->io_base + 4, 4, "ad1848");
543 if (!ports) {
544 printk(KERN_ERR "MSS: I/O port conflict\n");
545 return 0;
546 }
547 if (!request_region(hw_config->io_base, 4, "mad16 WSS config")) {
548 release_region(hw_config->io_base + 4, 4);
549 printk(KERN_ERR "MSS: I/O port conflict\n");
550 return 0;
551 }
552
553 if (board_type == C930) {
554 init_c930(hw_config, base);
555 goto got_it;
556 }
557
558 for (i = 0xf8d; i <= 0xf93; i++) {
559 if (!c924pnp)
560 DDB(printk("port %03x = %02x\n", i, mad_read(i)));
561 else
562 DDB(printk("port %03x = %02x\n", i-0x80, mad_read(i)));
563 }
564
565/*
566 * Set the WSS address
567 */
568
569 tmp = (mad_read(MC1_PORT) & 0x0f) | 0x80; /* Enable WSS, Disable SB */
570 tmp |= base << 4; /* WSS port select bits */
571
572 /*
573 * Set optional CD-ROM and joystick settings.
574 */
575
576 tmp &= ~0x0f;
577 tmp |= (mad16_conf & 0x0f); /* CD-ROM and joystick bits */
578 mad_write(MC1_PORT, tmp);
579
580 tmp = mad16_cdsel;
581 mad_write(MC2_PORT, tmp);
582 mad_write(MC3_PORT, 0xf0); /* Disable SB */
583
584 if (board_type == C924) /* Specific C924 init values */
585 {
586 mad_write(MC4_PORT, 0xA0);
587 mad_write(MC5_PORT, 0x05);
588 mad_write(MC6_PORT, 0x03);
589 }
590 if (!ad1848_detect(ports, &ad_flags, mad16_osp))
591 goto fail;
592
593 if (ad_flags & (AD_F_CS4231 | AD_F_CS4248))
594 cs4231_mode = 0x02; /* CS4248/CS4231 sync delay switch */
595
596 if (board_type == C929)
597 {
598 mad_write(MC4_PORT, 0xa2);
599 mad_write(MC5_PORT, 0xA5 | cs4231_mode);
600 mad_write(MC6_PORT, 0x03); /* Disable MPU401 */
601 }
602 else
603 {
604 mad_write(MC4_PORT, 0x02);
605 mad_write(MC5_PORT, 0x30 | cs4231_mode);
606 }
607
608 for (i = 0xf8d; i <= 0xf93; i++) {
609 if (!c924pnp)
610 DDB(printk("port %03x after init = %02x\n", i, mad_read(i)));
611 else
612 DDB(printk("port %03x after init = %02x\n", i-0x80, mad_read(i)));
613 }
614
615got_it:
616 ad_flags = 0;
617 if (!ad1848_detect(ports, &ad_flags, mad16_osp))
618 goto fail;
619
620 if (!wss_init(hw_config))
621 goto fail;
622
623 /*
624 * Set the IRQ and DMA addresses.
625 */
626
627 outb((bits | 0x40), config_port);
628 if ((inb(version_port) & 0x40) == 0)
629 printk(KERN_ERR "[IRQ Conflict?]\n");
630
631 /*
632 * Handle the capture DMA channel
633 */
634
635 if (ad_flags & AD_F_CS4231 && dma2 != -1 && dma2 != dma)
636 {
637 if (!((dma == 0 && dma2 == 1) ||
638 (dma == 1 && dma2 == 0) ||
639 (dma == 3 && dma2 == 0)))
640 { /* Unsupported combination. Try to swap channels */
641 int tmp = dma;
642
643 dma = dma2;
644 dma2 = tmp;
645 }
646 if ((dma == 0 && dma2 == 1) || (dma == 1 && dma2 == 0) ||
647 (dma == 3 && dma2 == 0))
648 {
649 dma2_bit = 0x04; /* Enable capture DMA */
650 }
651 else
652 {
653 printk("MAD16: Invalid capture DMA\n");
654 dma2 = dma;
655 }
656 }
657 else dma2 = dma;
658
659 outb((bits | dma_bits[dma] | dma2_bit), config_port); /* Write IRQ+DMA setup */
660
661 hw_config->slots[0] = ad1848_init("mad16 WSS", ports,
662 hw_config->irq,
663 dma,
664 dma2, 0,
665 hw_config->osp,
666 THIS_MODULE);
667 return 1;
668
669fail:
670 release_region(hw_config->io_base + 4, 4);
671 release_region(hw_config->io_base, 4);
672 return 0;
673}
674
675static int __init probe_mad16_mpu(struct address_info *hw_config)
676{
677 unsigned char tmp;
678
679 if (board_type < C929) /* Early chip. No MPU support. Just SB MIDI */
680 {
681
682#ifdef CONFIG_MAD16_OLDCARD
683
684 tmp = mad_read(MC3_PORT);
685
686 /*
687 * MAD16 SB base is defined by the WSS base. It cannot be changed
688 * alone.
689 * Ignore configured I/O base. Use the active setting.
690 */
691
692 if (mad_read(MC1_PORT) & 0x20)
693 hw_config->io_base = 0x240;
694 else
695 hw_config->io_base = 0x220;
696
697 switch (hw_config->irq)
698 {
699 case 5:
700 tmp = (tmp & 0x3f) | 0x80;
701 break;
702 case 7:
703 tmp = (tmp & 0x3f);
704 break;
705 case 11:
706 tmp = (tmp & 0x3f) | 0x40;
707 break;
708 default:
709 printk(KERN_ERR "mad16/Mozart: Invalid MIDI IRQ\n");
710 return 0;
711 }
712
713 mad_write(MC3_PORT, tmp | 0x04);
714 hw_config->driver_use_1 = SB_MIDI_ONLY;
715 if (!request_region(hw_config->io_base, 16, "soundblaster"))
716 return 0;
717 if (!sb_dsp_detect(hw_config, 0, 0, NULL)) {
718 release_region(hw_config->io_base, 16);
719 return 0;
720 }
721
722 if (mad_read(MC1_PORT) & 0x20)
723 hw_config->io_base = 0x240;
724 else
725 hw_config->io_base = 0x220;
726
727 hw_config->name = "Mad16/Mozart";
728 sb_dsp_init(hw_config, THIS_MODULE);
729 return 1;
730#else
731 /* assuming all later Mozart cards are identified as
732 * either 82C928 or Mozart. If so, following code attempts
733 * to set MPU register. TODO - add probing
734 */
735
736 tmp = mad_read(MC8_PORT);
737
738 switch (hw_config->irq)
739 {
740 case 5:
741 tmp |= 0x08;
742 break;
743 case 7:
744 tmp |= 0x10;
745 break;
746 case 9:
747 tmp |= 0x18;
748 break;
749 case 10:
750 tmp |= 0x20;
751 break;
752 case 11:
753 tmp |= 0x28;
754 break;
755 default:
756 printk(KERN_ERR "mad16/MOZART: invalid mpu_irq\n");
757 return 0;
758 }
759
760 switch (hw_config->io_base)
761 {
762 case 0x300:
763 tmp |= 0x01;
764 break;
765 case 0x310:
766 tmp |= 0x03;
767 break;
768 case 0x320:
769 tmp |= 0x05;
770 break;
771 case 0x330:
772 tmp |= 0x07;
773 break;
774 default:
775 printk(KERN_ERR "mad16/MOZART: invalid mpu_io\n");
776 return 0;
777 }
778
779 mad_write(MC8_PORT, tmp); /* write MPU port parameters */
780 goto probe_401;
781#endif
782 }
783 tmp = mad_read(MC6_PORT) & 0x83;
784 tmp |= 0x80; /* MPU-401 enable */
785
786 /* Set the MPU base bits */
787
788 switch (hw_config->io_base)
789 {
790 case 0x300:
791 tmp |= 0x60;
792 break;
793 case 0x310:
794 tmp |= 0x40;
795 break;
796 case 0x320:
797 tmp |= 0x20;
798 break;
799 case 0x330:
800 tmp |= 0x00;
801 break;
802 default:
803 printk(KERN_ERR "MAD16: Invalid MIDI port 0x%x\n", hw_config->io_base);
804 return 0;
805 }
806
807 /* Set the MPU IRQ bits */
808
809 switch (hw_config->irq)
810 {
811 case 5:
812 tmp |= 0x10;
813 break;
814 case 7:
815 tmp |= 0x18;
816 break;
817 case 9:
818 tmp |= 0x00;
819 break;
820 case 10:
821 tmp |= 0x08;
822 break;
823 default:
824 printk(KERN_ERR "MAD16: Invalid MIDI IRQ %d\n", hw_config->irq);
825 break;
826 }
827
828 mad_write(MC6_PORT, tmp); /* Write MPU401 config */
829
830#ifndef CONFIG_MAD16_OLDCARD
831probe_401:
832#endif
833 hw_config->driver_use_1 = SB_MIDI_ONLY;
834 hw_config->name = "Mad16/Mozart";
835 return probe_uart401(hw_config, THIS_MODULE);
836}
837
838static void __exit unload_mad16(struct address_info *hw_config)
839{
840 ad1848_unload(hw_config->io_base + 4,
841 hw_config->irq,
842 hw_config->dma,
843 hw_config->dma2, 0);
844 release_region(hw_config->io_base, 4);
845 sound_unload_audiodev(hw_config->slots[0]);
846}
847
848static void __exit unload_mad16_mpu(struct address_info *hw_config)
849{
850#ifdef CONFIG_MAD16_OLDCARD
851 if (board_type < C929) /* Early chip. No MPU support. Just SB MIDI */
852 {
853 sb_dsp_unload(hw_config, 0);
854 return;
855 }
856#endif
857
858 unload_uart401(hw_config);
859}
860
861static struct address_info cfg;
862static struct address_info cfg_mpu;
863
864static int found_mpu;
865
866static int __initdata mpu_io = 0;
867static int __initdata mpu_irq = 0;
868static int __initdata io = -1;
869static int __initdata dma = -1;
870static int __initdata dma16 = -1; /* Set this for modules that need it */
871static int __initdata irq = -1;
872static int __initdata cdtype = 0;
873static int __initdata cdirq = 0;
874static int __initdata cdport = 0x340;
875static int __initdata cddma = -1;
876static int __initdata opl4 = 0;
877static int __initdata joystick = 0;
878
879module_param(mpu_io, int, 0);
880module_param(mpu_irq, int, 0);
881module_param(io, int, 0);
882module_param(dma, int, 0);
883module_param(dma16, int, 0);
884module_param(irq, int, 0);
885module_param(cdtype, int, 0);
886module_param(cdirq, int, 0);
887module_param(cdport, int, 0);
888module_param(cddma, int, 0);
889module_param(opl4, int, 0);
890module_param(joystick, bool, 0);
891module_param(debug, bool, 0644);
892
893static int __initdata dma_map[2][8] =
894{
895 {0x03, -1, -1, -1, -1, 0x00, 0x01, 0x02},
896 {0x03, -1, 0x01, 0x00, -1, -1, -1, -1}
897};
898
899static int __initdata irq_map[16] =
900{
901 0x00, -1, -1, 0x0A,
902 -1, 0x04, -1, 0x08,
903 -1, 0x10, 0x14, 0x18,
904 -1, -1, -1, -1
905};
906
907#ifdef SUPPORT_JOYSTICK
908
909static struct gameport *gameport;
910
911static int __devinit mad16_register_gameport(int io_port)
912{
913 if (!request_region(io_port, 1, "mad16 gameport")) {
914 printk(KERN_ERR "mad16: gameport address 0x%#x already in use\n", io_port);
915 return -EBUSY;
916 }
917
918 gameport = gameport_allocate_port();
919 if (!gameport) {
920 printk(KERN_ERR "mad16: can not allocate memory for gameport\n");
921 release_region(io_port, 1);
922 return -ENOMEM;
923 }
924
925 gameport_set_name(gameport, "MAD16 Gameport");
926 gameport_set_phys(gameport, "isa%04x/gameport0", io_port);
927 gameport->io = io_port;
928
929 gameport_register_port(gameport);
930
931 return 0;
932}
933
934static inline void mad16_unregister_gameport(void)
935{
936 if (gameport) {
937 /* the gameport was initialized so we must free it up */
938 gameport_unregister_port(gameport);
939 gameport = NULL;
940 release_region(0x201, 1);
941 }
942}
943#else
944static inline int mad16_register_gameport(int io_port) { return -ENOSYS; }
945static inline void mad16_unregister_gameport(void) { }
946#endif
947
948static int __devinit init_mad16(void)
949{
950 int dmatype = 0;
951
952 printk(KERN_INFO "MAD16 audio driver Copyright (C) by Hannu Savolainen 1993-1996\n");
953
954 printk(KERN_INFO "CDROM ");
955 switch (cdtype)
956 {
957 case 0x00:
958 printk("Disabled");
959 cdirq = 0;
960 break;
961 case 0x02:
962 printk("Sony CDU31A");
963 dmatype = 1;
964 if(cddma == -1) cddma = 3;
965 break;
966 case 0x04:
967 printk("Mitsumi");
968 dmatype = 0;
969 if(cddma == -1) cddma = 5;
970 break;
971 case 0x06:
972 printk("Panasonic Lasermate");
973 dmatype = 1;
974 if(cddma == -1) cddma = 3;
975 break;
976 case 0x08:
977 printk("Secondary IDE");
978 dmatype = 0;
979 if(cddma == -1) cddma = 5;
980 break;
981 case 0x0A:
982 printk("Primary IDE");
983 dmatype = 0;
984 if(cddma == -1) cddma = 5;
985 break;
986 default:
987 printk("\n");
988 printk(KERN_ERR "Invalid CDROM type\n");
989 return -EINVAL;
990 }
991
992 /*
993 * Build the config words
994 */
995
996 mad16_conf = (joystick ^ 1) | cdtype;
997 mad16_cdsel = 0;
998 if (opl4)
999 mad16_cdsel |= 0x20;
1000
1001 if(cdtype){
1002 if (cddma > 7 || cddma < 0 || dma_map[dmatype][cddma] == -1)
1003 {
1004 printk("\n");
1005 printk(KERN_ERR "Invalid CDROM DMA\n");
1006 return -EINVAL;
1007 }
1008 if (cddma)
1009 printk(", DMA %d", cddma);
1010 else
1011 printk(", no DMA");
1012
1013 if (!cdirq)
1014 printk(", no IRQ");
1015 else if (cdirq < 0 || cdirq > 15 || irq_map[cdirq] == -1)
1016 {
1017 printk(", invalid IRQ (disabling)");
1018 cdirq = 0;
1019 }
1020 else printk(", IRQ %d", cdirq);
1021
1022 mad16_cdsel |= dma_map[dmatype][cddma];
1023
1024 if (cdtype < 0x08)
1025 {
1026 switch (cdport)
1027 {
1028 case 0x340:
1029 mad16_cdsel |= 0x00;
1030 break;
1031 case 0x330:
1032 mad16_cdsel |= 0x40;
1033 break;
1034 case 0x360:
1035 mad16_cdsel |= 0x80;
1036 break;
1037 case 0x320:
1038 mad16_cdsel |= 0xC0;
1039 break;
1040 default:
1041 printk(KERN_ERR "Unknown CDROM I/O base %d\n", cdport);
1042 return -EINVAL;
1043 }
1044 }
1045 mad16_cdsel |= irq_map[cdirq];
1046 }
1047
1048 printk(".\n");
1049
1050 cfg.io_base = io;
1051 cfg.irq = irq;
1052 cfg.dma = dma;
1053 cfg.dma2 = dma16;
1054
1055 if (cfg.io_base == -1 || cfg.dma == -1 || cfg.irq == -1) {
1056 printk(KERN_ERR "I/O, DMA and irq are mandatory\n");
1057 return -EINVAL;
1058 }
1059
1060 if (!request_region(MC0_PORT, 12, "mad16"))
1061 return -EBUSY;
1062
1063 if (!probe_mad16(&cfg)) {
1064 release_region(MC0_PORT, 12);
1065 return -ENODEV;
1066 }
1067
1068 cfg_mpu.io_base = mpu_io;
1069 cfg_mpu.irq = mpu_irq;
1070
1071 found_mpu = probe_mad16_mpu(&cfg_mpu);
1072
1073 if (joystick)
1074 mad16_register_gameport(0x201);
1075
1076 return 0;
1077}
1078
1079static void __exit cleanup_mad16(void)
1080{
1081 if (found_mpu)
1082 unload_mad16_mpu(&cfg_mpu);
1083 mad16_unregister_gameport();
1084 unload_mad16(&cfg);
1085 release_region(MC0_PORT, 12);
1086}
1087
1088module_init(init_mad16);
1089module_exit(cleanup_mad16);
1090
1091#ifndef MODULE
1092static int __init setup_mad16(char *str)
1093{
1094 /* io, irq */
1095 int ints[8];
1096
1097 str = get_options(str, ARRAY_SIZE(ints), ints);
1098
1099 io = ints[1];
1100 irq = ints[2];
1101 dma = ints[3];
1102 dma16 = ints[4];
1103 mpu_io = ints[5];
1104 mpu_irq = ints[6];
1105 joystick = ints[7];
1106
1107 return 1;
1108}
1109
1110__setup("mad16=", setup_mad16);
1111#endif
1112MODULE_LICENSE("GPL");