diff options
Diffstat (limited to 'sound/arm')
-rw-r--r-- | sound/arm/pxa2xx-ac97-lib.c | 50 |
1 files changed, 6 insertions, 44 deletions
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index 7587a748ea06..ee687283b6a1 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c | |||
@@ -32,6 +32,8 @@ static struct clk *ac97_clk; | |||
32 | static struct clk *ac97conf_clk; | 32 | static struct clk *ac97conf_clk; |
33 | static int reset_gpio; | 33 | static int reset_gpio; |
34 | 34 | ||
35 | extern void pxa27x_assert_ac97reset(int reset_gpio, int on); | ||
36 | |||
35 | /* | 37 | /* |
36 | * Beware PXA27x bugs: | 38 | * Beware PXA27x bugs: |
37 | * | 39 | * |
@@ -42,45 +44,6 @@ static int reset_gpio; | |||
42 | * 1 jiffy timeout if interrupt never comes). | 44 | * 1 jiffy timeout if interrupt never comes). |
43 | */ | 45 | */ |
44 | 46 | ||
45 | enum { | ||
46 | RESETGPIO_FORCE_HIGH, | ||
47 | RESETGPIO_FORCE_LOW, | ||
48 | RESETGPIO_NORMAL_ALTFUNC | ||
49 | }; | ||
50 | |||
51 | /** | ||
52 | * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA | ||
53 | * @mode: chosen action | ||
54 | * | ||
55 | * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line | ||
56 | * must be done to insure proper work of AC97 reset line. This function | ||
57 | * computes the correct gpio_mode for further use by reset functions, and | ||
58 | * applied the change through pxa_gpio_mode. | ||
59 | */ | ||
60 | static void set_resetgpio_mode(int resetgpio_action) | ||
61 | { | ||
62 | int mode = 0; | ||
63 | |||
64 | if (reset_gpio) | ||
65 | switch (resetgpio_action) { | ||
66 | case RESETGPIO_NORMAL_ALTFUNC: | ||
67 | if (reset_gpio == 113) | ||
68 | mode = 113 | GPIO_ALT_FN_2_OUT; | ||
69 | if (reset_gpio == 95) | ||
70 | mode = 95 | GPIO_ALT_FN_1_OUT; | ||
71 | break; | ||
72 | case RESETGPIO_FORCE_LOW: | ||
73 | mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW; | ||
74 | break; | ||
75 | case RESETGPIO_FORCE_HIGH: | ||
76 | mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH; | ||
77 | break; | ||
78 | }; | ||
79 | |||
80 | if (mode) | ||
81 | pxa_gpio_mode(mode); | ||
82 | } | ||
83 | |||
84 | unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) | 47 | unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
85 | { | 48 | { |
86 | unsigned short val = -1; | 49 | unsigned short val = -1; |
@@ -174,12 +137,11 @@ static inline void pxa_ac97_warm_pxa27x(void) | |||
174 | { | 137 | { |
175 | gsr_bits = 0; | 138 | gsr_bits = 0; |
176 | 139 | ||
177 | /* warm reset broken on Bulverde, | 140 | /* warm reset broken on Bulverde, so manually keep AC97 reset high */ |
178 | so manually keep AC97 reset high */ | 141 | pxa27x_assert_ac97reset(reset_gpio, 1); |
179 | set_resetgpio_mode(RESETGPIO_FORCE_HIGH); | ||
180 | udelay(10); | 142 | udelay(10); |
181 | GCR |= GCR_WARM_RST; | 143 | GCR |= GCR_WARM_RST; |
182 | set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); | 144 | pxa27x_assert_ac97reset(reset_gpio, 0); |
183 | udelay(500); | 145 | udelay(500); |
184 | } | 146 | } |
185 | 147 | ||
@@ -385,7 +347,7 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) | |||
385 | 347 | ||
386 | if (cpu_is_pxa27x()) { | 348 | if (cpu_is_pxa27x()) { |
387 | /* Use GPIO 113 as AC97 Reset on Bulverde */ | 349 | /* Use GPIO 113 as AC97 Reset on Bulverde */ |
388 | set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); | 350 | pxa27x_assert_ac97reset(reset_gpio, 0); |
389 | ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); | 351 | ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); |
390 | if (IS_ERR(ac97conf_clk)) { | 352 | if (IS_ERR(ac97conf_clk)) { |
391 | ret = PTR_ERR(ac97conf_clk); | 353 | ret = PTR_ERR(ac97conf_clk); |