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-rw-r--r--sound/arm/aaci.c6
-rw-r--r--sound/arm/pxa2xx-ac97-lib.c71
2 files changed, 69 insertions, 8 deletions
diff --git a/sound/arm/aaci.c b/sound/arm/aaci.c
index 7d39aac9ec14..7fbd68fab944 100644
--- a/sound/arm/aaci.c
+++ b/sound/arm/aaci.c
@@ -90,7 +90,7 @@ static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
90 */ 90 */
91 do { 91 do {
92 v = readl(aaci->base + AACI_SLFR); 92 v = readl(aaci->base + AACI_SLFR);
93 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && timeout--); 93 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
94 94
95 if (!timeout) 95 if (!timeout)
96 dev_err(&aaci->dev->dev, 96 dev_err(&aaci->dev->dev,
@@ -126,7 +126,7 @@ static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
126 */ 126 */
127 do { 127 do {
128 v = readl(aaci->base + AACI_SLFR); 128 v = readl(aaci->base + AACI_SLFR);
129 } while ((v & SLFR_1TXB) && timeout--); 129 } while ((v & SLFR_1TXB) && --timeout);
130 130
131 if (!timeout) { 131 if (!timeout) {
132 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n"); 132 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
@@ -147,7 +147,7 @@ static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
147 do { 147 do {
148 cond_resched(); 148 cond_resched();
149 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV); 149 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
150 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && timeout--); 150 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
151 151
152 if (!timeout) { 152 if (!timeout) {
153 dev_err(&aaci->dev->dev, "timeout on RX valid\n"); 153 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c
index 35afd0c33be5..2e6355f4cbb9 100644
--- a/sound/arm/pxa2xx-ac97-lib.c
+++ b/sound/arm/pxa2xx-ac97-lib.c
@@ -31,6 +31,7 @@ static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
31static volatile long gsr_bits; 31static volatile long gsr_bits;
32static struct clk *ac97_clk; 32static struct clk *ac97_clk;
33static struct clk *ac97conf_clk; 33static struct clk *ac97conf_clk;
34static int reset_gpio;
34 35
35/* 36/*
36 * Beware PXA27x bugs: 37 * Beware PXA27x bugs:
@@ -42,6 +43,45 @@ static struct clk *ac97conf_clk;
42 * 1 jiffy timeout if interrupt never comes). 43 * 1 jiffy timeout if interrupt never comes).
43 */ 44 */
44 45
46enum {
47 RESETGPIO_FORCE_HIGH,
48 RESETGPIO_FORCE_LOW,
49 RESETGPIO_NORMAL_ALTFUNC
50};
51
52/**
53 * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA
54 * @mode: chosen action
55 *
56 * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line
57 * must be done to insure proper work of AC97 reset line. This function
58 * computes the correct gpio_mode for further use by reset functions, and
59 * applied the change through pxa_gpio_mode.
60 */
61static void set_resetgpio_mode(int resetgpio_action)
62{
63 int mode = 0;
64
65 if (reset_gpio)
66 switch (resetgpio_action) {
67 case RESETGPIO_NORMAL_ALTFUNC:
68 if (reset_gpio == 113)
69 mode = 113 | GPIO_OUT | GPIO_DFLT_LOW;
70 if (reset_gpio == 95)
71 mode = 95 | GPIO_ALT_FN_1_OUT;
72 break;
73 case RESETGPIO_FORCE_LOW:
74 mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW;
75 break;
76 case RESETGPIO_FORCE_HIGH:
77 mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH;
78 break;
79 };
80
81 if (mode)
82 pxa_gpio_mode(mode);
83}
84
45unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 85unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
46{ 86{
47 unsigned short val = -1; 87 unsigned short val = -1;
@@ -137,10 +177,10 @@ static inline void pxa_ac97_warm_pxa27x(void)
137 177
138 /* warm reset broken on Bulverde, 178 /* warm reset broken on Bulverde,
139 so manually keep AC97 reset high */ 179 so manually keep AC97 reset high */
140 pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); 180 set_resetgpio_mode(RESETGPIO_FORCE_HIGH);
141 udelay(10); 181 udelay(10);
142 GCR |= GCR_WARM_RST; 182 GCR |= GCR_WARM_RST;
143 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); 183 set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
144 udelay(500); 184 udelay(500);
145} 185}
146 186
@@ -308,8 +348,8 @@ int pxa2xx_ac97_hw_resume(void)
308 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); 348 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
309 } 349 }
310 if (cpu_is_pxa27x()) { 350 if (cpu_is_pxa27x()) {
311 /* Use GPIO 113 as AC97 Reset on Bulverde */ 351 /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */
312 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); 352 set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
313 } 353 }
314 clk_enable(ac97_clk); 354 clk_enable(ac97_clk);
315 return 0; 355 return 0;
@@ -320,6 +360,27 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume);
320int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) 360int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev)
321{ 361{
322 int ret; 362 int ret;
363 struct pxa2xx_ac97_platform_data *pdata = dev->dev.platform_data;
364
365 if (pdata) {
366 switch (pdata->reset_gpio) {
367 case 95:
368 case 113:
369 reset_gpio = pdata->reset_gpio;
370 break;
371 case 0:
372 reset_gpio = 113;
373 break;
374 case -1:
375 break;
376 default:
377 dev_err(&dev->dev, "Invalid reset GPIO %d\n",
378 pdata->reset_gpio);
379 }
380 } else {
381 if (cpu_is_pxa27x())
382 reset_gpio = 113;
383 }
323 384
324 if (cpu_is_pxa25x() || cpu_is_pxa27x()) { 385 if (cpu_is_pxa25x() || cpu_is_pxa27x()) {
325 pxa_gpio_mode(GPIO31_SYNC_AC97_MD); 386 pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
@@ -330,7 +391,7 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev)
330 391
331 if (cpu_is_pxa27x()) { 392 if (cpu_is_pxa27x()) {
332 /* Use GPIO 113 as AC97 Reset on Bulverde */ 393 /* Use GPIO 113 as AC97 Reset on Bulverde */
333 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); 394 set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC);
334 ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); 395 ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
335 if (IS_ERR(ac97conf_clk)) { 396 if (IS_ERR(ac97conf_clk)) {
336 ret = PTR_ERR(ac97conf_clk); 397 ret = PTR_ERR(ac97conf_clk);