diff options
Diffstat (limited to 'sound/arm/pxa2xx-ac97-lib.c')
-rw-r--r-- | sound/arm/pxa2xx-ac97-lib.c | 68 |
1 files changed, 6 insertions, 62 deletions
diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index 6fdca97186e7..88eec3847df2 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c | |||
@@ -22,7 +22,6 @@ | |||
22 | 22 | ||
23 | #include <asm/irq.h> | 23 | #include <asm/irq.h> |
24 | #include <mach/regs-ac97.h> | 24 | #include <mach/regs-ac97.h> |
25 | #include <mach/pxa2xx-gpio.h> | ||
26 | #include <mach/audio.h> | 25 | #include <mach/audio.h> |
27 | 26 | ||
28 | static DEFINE_MUTEX(car_mutex); | 27 | static DEFINE_MUTEX(car_mutex); |
@@ -32,6 +31,8 @@ static struct clk *ac97_clk; | |||
32 | static struct clk *ac97conf_clk; | 31 | static struct clk *ac97conf_clk; |
33 | static int reset_gpio; | 32 | static int reset_gpio; |
34 | 33 | ||
34 | extern void pxa27x_assert_ac97reset(int reset_gpio, int on); | ||
35 | |||
35 | /* | 36 | /* |
36 | * Beware PXA27x bugs: | 37 | * Beware PXA27x bugs: |
37 | * | 38 | * |
@@ -42,45 +43,6 @@ static int reset_gpio; | |||
42 | * 1 jiffy timeout if interrupt never comes). | 43 | * 1 jiffy timeout if interrupt never comes). |
43 | */ | 44 | */ |
44 | 45 | ||
45 | enum { | ||
46 | RESETGPIO_FORCE_HIGH, | ||
47 | RESETGPIO_FORCE_LOW, | ||
48 | RESETGPIO_NORMAL_ALTFUNC | ||
49 | }; | ||
50 | |||
51 | /** | ||
52 | * set_resetgpio_mode - computes and sets the AC97_RESET gpio mode on PXA | ||
53 | * @mode: chosen action | ||
54 | * | ||
55 | * As the PXA27x CPUs suffer from a AC97 bug, a manual control of the reset line | ||
56 | * must be done to insure proper work of AC97 reset line. This function | ||
57 | * computes the correct gpio_mode for further use by reset functions, and | ||
58 | * applied the change through pxa_gpio_mode. | ||
59 | */ | ||
60 | static void set_resetgpio_mode(int resetgpio_action) | ||
61 | { | ||
62 | int mode = 0; | ||
63 | |||
64 | if (reset_gpio) | ||
65 | switch (resetgpio_action) { | ||
66 | case RESETGPIO_NORMAL_ALTFUNC: | ||
67 | if (reset_gpio == 113) | ||
68 | mode = 113 | GPIO_ALT_FN_2_OUT; | ||
69 | if (reset_gpio == 95) | ||
70 | mode = 95 | GPIO_ALT_FN_1_OUT; | ||
71 | break; | ||
72 | case RESETGPIO_FORCE_LOW: | ||
73 | mode = reset_gpio | GPIO_OUT | GPIO_DFLT_LOW; | ||
74 | break; | ||
75 | case RESETGPIO_FORCE_HIGH: | ||
76 | mode = reset_gpio | GPIO_OUT | GPIO_DFLT_HIGH; | ||
77 | break; | ||
78 | }; | ||
79 | |||
80 | if (mode) | ||
81 | pxa_gpio_mode(mode); | ||
82 | } | ||
83 | |||
84 | unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) | 46 | unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) |
85 | { | 47 | { |
86 | unsigned short val = -1; | 48 | unsigned short val = -1; |
@@ -174,12 +136,11 @@ static inline void pxa_ac97_warm_pxa27x(void) | |||
174 | { | 136 | { |
175 | gsr_bits = 0; | 137 | gsr_bits = 0; |
176 | 138 | ||
177 | /* warm reset broken on Bulverde, | 139 | /* warm reset broken on Bulverde, so manually keep AC97 reset high */ |
178 | so manually keep AC97 reset high */ | 140 | pxa27x_assert_ac97reset(reset_gpio, 1); |
179 | set_resetgpio_mode(RESETGPIO_FORCE_HIGH); | ||
180 | udelay(10); | 141 | udelay(10); |
181 | GCR |= GCR_WARM_RST; | 142 | GCR |= GCR_WARM_RST; |
182 | set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); | 143 | pxa27x_assert_ac97reset(reset_gpio, 0); |
183 | udelay(500); | 144 | udelay(500); |
184 | } | 145 | } |
185 | 146 | ||
@@ -345,16 +306,6 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_suspend); | |||
345 | 306 | ||
346 | int pxa2xx_ac97_hw_resume(void) | 307 | int pxa2xx_ac97_hw_resume(void) |
347 | { | 308 | { |
348 | if (cpu_is_pxa25x() || cpu_is_pxa27x()) { | ||
349 | pxa_gpio_mode(GPIO31_SYNC_AC97_MD); | ||
350 | pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD); | ||
351 | pxa_gpio_mode(GPIO28_BITCLK_AC97_MD); | ||
352 | pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); | ||
353 | } | ||
354 | if (cpu_is_pxa27x()) { | ||
355 | /* Use GPIO 113 or 95 as AC97 Reset on Bulverde */ | ||
356 | set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); | ||
357 | } | ||
358 | clk_enable(ac97_clk); | 309 | clk_enable(ac97_clk); |
359 | return 0; | 310 | return 0; |
360 | } | 311 | } |
@@ -386,16 +337,9 @@ int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) | |||
386 | reset_gpio = 113; | 337 | reset_gpio = 113; |
387 | } | 338 | } |
388 | 339 | ||
389 | if (cpu_is_pxa25x() || cpu_is_pxa27x()) { | ||
390 | pxa_gpio_mode(GPIO31_SYNC_AC97_MD); | ||
391 | pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD); | ||
392 | pxa_gpio_mode(GPIO28_BITCLK_AC97_MD); | ||
393 | pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); | ||
394 | } | ||
395 | |||
396 | if (cpu_is_pxa27x()) { | 340 | if (cpu_is_pxa27x()) { |
397 | /* Use GPIO 113 as AC97 Reset on Bulverde */ | 341 | /* Use GPIO 113 as AC97 Reset on Bulverde */ |
398 | set_resetgpio_mode(RESETGPIO_NORMAL_ALTFUNC); | 342 | pxa27x_assert_ac97reset(reset_gpio, 0); |
399 | ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); | 343 | ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK"); |
400 | if (IS_ERR(ac97conf_clk)) { | 344 | if (IS_ERR(ac97conf_clk)) { |
401 | ret = PTR_ERR(ac97conf_clk); | 345 | ret = PTR_ERR(ac97conf_clk); |