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generated by cgit v1.2.2 (git 2.25.0) at 2025-11-22 09:44:28 -0500
pan>reg) { case PCI_COMMAND: _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); if (value & PCI_COMMAND_MASTER) lo |= (0x03 << 4); else lo &= ~(0x03 << 4); _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); break; case PCI_STATUS: if (value & PCI_STATUS_PARITY) { _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); if (lo & SB_PARE_ERR_FLAG) { lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG; _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); } } break; case PCI_CACHE_LINE_SIZE: value &= 0x0000ff00; _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo); hi &= 0xffffff00; hi |= (value >> 8); _wrmsr(SB_MSR_REG(SB_CTRL), hi, lo); break; case PCI_BAR4_REG: if (value == PCI_BAR_RANGE_MASK) { _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo);