litmus-rt.git - The LITMUS^RT kernel.

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Diffstat (limited to 'net/tipc/port.c')

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/* * at91sam926x_time.c - Periodic Interval Timer (PIT) for at91sam926x * * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France * Converted to ClockSource/ClockEvents by David Brownell. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #define pr_fmt(fmt) "AT91: PIT: " fmt #include <linux/clk.h> #include <linux/clockchips.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/kernel.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/slab.h> #define AT91_PIT_MR 0x00 /* Mode Register */ #define AT91_PIT_PITIEN BIT(25) /* Timer Interrupt Enable */ #define AT91_PIT_PITEN BIT(24) /* Timer Enabled */ #define AT91_PIT_PIV GENMASK(19, 0) /* Periodic Interval Value */ #define AT91_PIT_SR 0x04 /* Status Register */ #define AT91_PIT_PITS BIT(0) /* Timer Status */ #define AT91_PIT_PIVR 0x08 /* Periodic Interval Value Register */ #define AT91_PIT_PIIR 0x0c /* Periodic Interval Image Register */ #define AT91_PIT_PICNT GENMASK(31, 20) /* Interval Counter */ #define AT91_PIT_CPIV GENMASK(19, 0) /* Inverval Value */ #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV) #define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20) struct pit_data { struct clock_event_device clkevt; struct clocksource clksrc; void __iomem *base; u32 cycle; u32 cnt; unsigned int irq; struct clk *mck; }; static inline struct pit_data *clksrc_to_pit_data(struct clocksource *clksrc) { return container_of(clksrc, struct pit_data, clksrc); } static inline struct pit_data *clkevt_to_pit_data(struct clock_event_device *clkevt) { return container_of(clkevt, struct pit_data, clkevt); } static inline unsigned int pit_read(void __iomem *base, unsigned int reg_offset) { return __raw_readl(base + reg_offset); } static inline void pit_write(void __iomem *base, unsigned int reg_offset, unsigned long value) { __raw_writel(value, base + reg_offset); } /* * Clocksource: just a monotonic counter of MCK/16 cycles. * We don't care whether or not PIT irqs are enabled. */ static cycle_t read_pit_clk(struct clocksource *cs) { struct pit_data *data = clksrc_to_pit_data(cs); unsigned long flags; u32 elapsed; u32 t; raw_local_irq_save(flags); elapsed = data->cnt; t = pit_read(data->base, AT91_PIT_PIIR); raw_local_irq_restore(flags); elapsed += PIT_PICNT(t) * data->cycle; elapsed += PIT_CPIV(t); return elapsed; } /* * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16) */ static void pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) { struct pit_data *data = clkevt_to_pit_data(dev); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: /* update clocksource counter */ data->cnt += data->cycle * PIT_PICNT(pit_read(data->base, AT91_PIT_PIVR)); pit_write(data->base, AT91_PIT_MR, (data->cycle - 1) | AT91_PIT_PITEN | AT91_PIT_PITIEN); break; case CLOCK_EVT_MODE_ONESHOT: BUG(); /* FALLTHROUGH */ case CLOCK_EVT_MODE_SHUTDOWN: case CLOCK_EVT_MODE_UNUSED: /* disable irq, leaving the clocksource active */ pit_write(data->base, AT91_PIT_MR, (data->cycle - 1) | AT91_PIT_PITEN); break; case CLOCK_EVT_MODE_RESUME: break; } } static void at91sam926x_pit_suspend(struct clock_event_device *cedev) { struct pit_data *data = clkevt_to_pit_data(cedev); /* Disable timer */ pit_write(data->base, AT91_PIT_MR, 0); } static void at91sam926x_pit_reset(struct pit_data *data) { /* Disable timer and irqs */ pit_write(data->base, AT91_PIT_MR, 0); /* Clear any pending interrupts, wait for PIT to stop counting */ while (PIT_CPIV(pit_read(data->base, AT91_PIT_PIVR)) != 0) cpu_relax(); /* Start PIT but don't enable IRQ */ pit_write(data->base, AT91_PIT_MR, (data->cycle - 1) | AT91_PIT_PITEN); } static void at91sam926x_pit_resume(struct clock_event_device *cedev) { struct pit_data *data = clkevt_to_pit_data(cedev); at91sam926x_pit_reset(data); } /* * IRQ handler for the timer. */ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id) { struct pit_data *data = dev_id; /* * irqs should be disabled here, but as the irq is shared they are only * guaranteed to be off if the timer irq is registered first. */ WARN_ON_ONCE(!irqs_disabled()); /* The PIT interrupt may be disabled, and is shared */ if ((data->clkevt.mode == CLOCK_EVT_MODE_PERIODIC) && (pit_read(data->base, AT91_PIT_SR) & AT91_PIT_PITS)) { unsigned nr_ticks; /* Get number of ticks performed before irq, and ack it */


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