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-rw-r--r--include/linux/Kbuild4
-rw-r--r--include/linux/amba/serial.h1
-rw-r--r--include/linux/cd1400.h292
-rw-r--r--include/linux/cdk.h486
-rw-r--r--include/linux/comstats.h119
-rw-r--r--include/linux/generic_serial.h35
-rw-r--r--include/linux/i2c/twl.h3
-rw-r--r--include/linux/istallion.h123
-rw-r--r--include/linux/kbd_kern.h13
-rw-r--r--include/linux/mfd/tps6586x.h1
-rw-r--r--include/linux/mfd/twl6040.h1
-rw-r--r--include/linux/omapfb.h7
-rw-r--r--include/linux/platform_data/asoc-ti-mcbsp.h62
-rw-r--r--include/linux/platform_data/dsp-omap.h34
-rw-r--r--include/linux/platform_data/gpio-omap.h217
-rw-r--r--include/linux/platform_data/keypad-omap.h52
-rw-r--r--include/linux/platform_data/lcd-mipid.h29
-rw-r--r--include/linux/platform_data/max310x.h67
-rw-r--r--include/linux/platform_data/mtd-nand-omap2.h43
-rw-r--r--include/linux/platform_data/mtd-onenand-omap2.h53
-rw-r--r--include/linux/platform_data/omap1_bl.h11
-rw-r--r--include/linux/platform_data/pinctrl-coh901.h26
-rw-r--r--include/linux/platform_data/remoteproc-omap.h57
-rw-r--r--include/linux/platform_data/sccnxp.h93
-rw-r--r--include/linux/platform_data/spi-omap2-mcspi.h23
-rw-r--r--include/linux/platform_data/voltage-omap.h39
-rw-r--r--include/linux/power/smartreflex.h2
-rw-r--r--include/linux/sc26198.h533
-rw-r--r--include/linux/serial.h81
-rw-r--r--include/linux/serial167.h157
-rw-r--r--include/linux/serial_8250.h33
-rw-r--r--include/linux/serial_core.h4
-rw-r--r--include/linux/serial_reg.h4
-rw-r--r--include/linux/stallion.h147
-rw-r--r--include/linux/tty.h92
-rw-r--r--include/linux/tty_driver.h47
-rw-r--r--include/linux/tty_flags.h78
-rw-r--r--include/net/irda/ircomm_tty.h17
38 files changed, 1026 insertions, 2060 deletions
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index fa217607c582..c57e064666e4 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -84,7 +84,6 @@ header-y += capability.h
84header-y += capi.h 84header-y += capi.h
85header-y += cciss_defs.h 85header-y += cciss_defs.h
86header-y += cciss_ioctl.h 86header-y += cciss_ioctl.h
87header-y += cdk.h
88header-y += cdrom.h 87header-y += cdrom.h
89header-y += cgroupstats.h 88header-y += cgroupstats.h
90header-y += chio.h 89header-y += chio.h
@@ -93,7 +92,6 @@ header-y += cn_proc.h
93header-y += coda.h 92header-y += coda.h
94header-y += coda_psdev.h 93header-y += coda_psdev.h
95header-y += coff.h 94header-y += coff.h
96header-y += comstats.h
97header-y += connector.h 95header-y += connector.h
98header-y += const.h 96header-y += const.h
99header-y += cramfs_fs.h 97header-y += cramfs_fs.h
@@ -140,7 +138,6 @@ header-y += fuse.h
140header-y += futex.h 138header-y += futex.h
141header-y += gameport.h 139header-y += gameport.h
142header-y += gen_stats.h 140header-y += gen_stats.h
143header-y += generic_serial.h
144header-y += genetlink.h 141header-y += genetlink.h
145header-y += gfs2_ondisk.h 142header-y += gfs2_ondisk.h
146header-y += gigaset_dev.h 143header-y += gigaset_dev.h
@@ -372,6 +369,7 @@ header-y += tipc.h
372header-y += tipc_config.h 369header-y += tipc_config.h
373header-y += toshiba.h 370header-y += toshiba.h
374header-y += tty.h 371header-y += tty.h
372header-y += tty_flags.h
375header-y += types.h 373header-y += types.h
376header-y += udf_fs_i.h 374header-y += udf_fs_i.h
377header-y += udp.h 375header-y += udp.h
diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h
index d117b29d1062..f612c783170f 100644
--- a/include/linux/amba/serial.h
+++ b/include/linux/amba/serial.h
@@ -205,7 +205,6 @@ struct amba_pl011_data {
205 void *dma_tx_param; 205 void *dma_tx_param;
206 void (*init) (void); 206 void (*init) (void);
207 void (*exit) (void); 207 void (*exit) (void);
208 void (*reset) (void);
209}; 208};
210#endif 209#endif
211 210
diff --git a/include/linux/cd1400.h b/include/linux/cd1400.h
deleted file mode 100644
index 1dc3ab0523fd..000000000000
--- a/include/linux/cd1400.h
+++ /dev/null
@@ -1,292 +0,0 @@
1/*****************************************************************************/
2
3/*
4 * cd1400.h -- cd1400 UART hardware info.
5 *
6 * Copyright (C) 1996-1998 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24/*****************************************************************************/
25#ifndef _CD1400_H
26#define _CD1400_H
27/*****************************************************************************/
28
29/*
30 * Define the number of async ports per cd1400 uart chip.
31 */
32#define CD1400_PORTS 4
33
34/*
35 * Define the cd1400 uarts internal FIFO sizes.
36 */
37#define CD1400_TXFIFOSIZE 12
38#define CD1400_RXFIFOSIZE 12
39
40/*
41 * Local RX FIFO thresh hold level. Also define the RTS thresh hold
42 * based on the RX thresh hold.
43 */
44#define FIFO_RXTHRESHOLD 6
45#define FIFO_RTSTHRESHOLD 7
46
47/*****************************************************************************/
48
49/*
50 * Define the cd1400 register addresses. These are all the valid
51 * registers with the cd1400. Some are global, some virtual, some
52 * per port.
53 */
54#define GFRCR 0x40
55#define CAR 0x68
56#define GCR 0x4b
57#define SVRR 0x67
58#define RICR 0x44
59#define TICR 0x45
60#define MICR 0x46
61#define RIR 0x6b
62#define TIR 0x6a
63#define MIR 0x69
64#define PPR 0x7e
65
66#define RIVR 0x43
67#define TIVR 0x42
68#define MIVR 0x41
69#define TDR 0x63
70#define RDSR 0x62
71#define MISR 0x4c
72#define EOSRR 0x60
73
74#define LIVR 0x18
75#define CCR 0x05
76#define SRER 0x06
77#define COR1 0x08
78#define COR2 0x09
79#define COR3 0x0a
80#define COR4 0x1e
81#define COR5 0x1f
82#define CCSR 0x0b
83#define RDCR 0x0e
84#define SCHR1 0x1a
85#define SCHR2 0x1b
86#define SCHR3 0x1c
87#define SCHR4 0x1d
88#define SCRL 0x22
89#define SCRH 0x23
90#define LNC 0x24
91#define MCOR1 0x15
92#define MCOR2 0x16
93#define RTPR 0x21
94#define MSVR1 0x6c
95#define MSVR2 0x6d
96#define PSVR 0x6f
97#define RBPR 0x78
98#define RCOR 0x7c
99#define TBPR 0x72
100#define TCOR 0x76
101
102/*****************************************************************************/
103
104/*
105 * Define the set of baud rate clock divisors.
106 */
107#define CD1400_CLK0 8
108#define CD1400_CLK1 32
109#define CD1400_CLK2 128
110#define CD1400_CLK3 512
111#define CD1400_CLK4 2048
112
113#define CD1400_NUMCLKS 5
114
115/*****************************************************************************/
116
117/*
118 * Define the clock pre-scalar value to be a 5 ms clock. This should be
119 * OK for now. It would probably be better to make it 10 ms, but we
120 * can't fit that divisor into 8 bits!
121 */
122#define PPR_SCALAR 244
123
124/*****************************************************************************/
125
126/*
127 * Define values used to set character size options.
128 */
129#define COR1_CHL5 0x00
130#define COR1_CHL6 0x01
131#define COR1_CHL7 0x02
132#define COR1_CHL8 0x03
133
134/*
135 * Define values used to set the number of stop bits.
136 */
137#define COR1_STOP1 0x00
138#define COR1_STOP15 0x04
139#define COR1_STOP2 0x08
140
141/*
142 * Define values used to set the parity scheme in use.
143 */
144#define COR1_PARNONE 0x00
145#define COR1_PARFORCE 0x20
146#define COR1_PARENB 0x40
147#define COR1_PARIGNORE 0x10
148
149#define COR1_PARODD 0x80
150#define COR1_PAREVEN 0x00
151
152#define COR2_IXM 0x80
153#define COR2_TXIBE 0x40
154#define COR2_ETC 0x20
155#define COR2_LLM 0x10
156#define COR2_RLM 0x08
157#define COR2_RTSAO 0x04
158#define COR2_CTSAE 0x02
159
160#define COR3_SCDRNG 0x80
161#define COR3_SCD34 0x40
162#define COR3_FCT 0x20
163#define COR3_SCD12 0x10
164
165/*
166 * Define values used by COR4.
167 */
168#define COR4_BRKINT 0x08
169#define COR4_IGNBRK 0x18
170
171/*****************************************************************************/
172
173/*
174 * Define the modem control register values.
175 * Note that the actual hardware is a little different to the conventional
176 * pin names on the cd1400.
177 */
178#define MSVR1_DTR 0x01
179#define MSVR1_DSR 0x10
180#define MSVR1_RI 0x20
181#define MSVR1_CTS 0x40
182#define MSVR1_DCD 0x80
183
184#define MSVR2_RTS 0x02
185#define MSVR2_DSR 0x10
186#define MSVR2_RI 0x20
187#define MSVR2_CTS 0x40
188#define MSVR2_DCD 0x80
189
190#define MCOR1_DCD 0x80
191#define MCOR1_CTS 0x40
192#define MCOR1_RI 0x20
193#define MCOR1_DSR 0x10
194
195#define MCOR2_DCD 0x80
196#define MCOR2_CTS 0x40
197#define MCOR2_RI 0x20
198#define MCOR2_DSR 0x10
199
200/*****************************************************************************/
201
202/*
203 * Define the bits used with the service (interrupt) enable register.
204 */
205#define SRER_NNDT 0x01
206#define SRER_TXEMPTY 0x02
207#define SRER_TXDATA 0x04
208#define SRER_RXDATA 0x10
209#define SRER_MODEM 0x80
210
211/*****************************************************************************/
212
213/*
214 * Define operational commands for the command register.
215 */
216#define CCR_RESET 0x80
217#define CCR_CORCHANGE 0x4e
218#define CCR_SENDCH 0x20
219#define CCR_CHANCTRL 0x10
220
221#define CCR_TXENABLE (CCR_CHANCTRL | 0x08)
222#define CCR_TXDISABLE (CCR_CHANCTRL | 0x04)
223#define CCR_RXENABLE (CCR_CHANCTRL | 0x02)
224#define CCR_RXDISABLE (CCR_CHANCTRL | 0x01)
225
226#define CCR_SENDSCHR1 (CCR_SENDCH | 0x01)
227#define CCR_SENDSCHR2 (CCR_SENDCH | 0x02)
228#define CCR_SENDSCHR3 (CCR_SENDCH | 0x03)
229#define CCR_SENDSCHR4 (CCR_SENDCH | 0x04)
230
231#define CCR_RESETCHAN (CCR_RESET | 0x00)
232#define CCR_RESETFULL (CCR_RESET | 0x01)
233#define CCR_TXFLUSHFIFO (CCR_RESET | 0x02)
234
235#define CCR_MAXWAIT 10000
236
237/*****************************************************************************/
238
239/*
240 * Define the valid acknowledgement types (for hw ack cycle).
241 */
242#define ACK_TYPMASK 0x07
243#define ACK_TYPTX 0x02
244#define ACK_TYPMDM 0x01
245#define ACK_TYPRXGOOD 0x03
246#define ACK_TYPRXBAD 0x07
247
248#define SVRR_RX 0x01
249#define SVRR_TX 0x02
250#define SVRR_MDM 0x04
251
252#define ST_OVERRUN 0x01
253#define ST_FRAMING 0x02
254#define ST_PARITY 0x04
255#define ST_BREAK 0x08
256#define ST_SCHAR1 0x10
257#define ST_SCHAR2 0x20
258#define ST_SCHAR3 0x30
259#define ST_SCHAR4 0x40
260#define ST_RANGE 0x70
261#define ST_SCHARMASK 0x70
262#define ST_TIMEOUT 0x80
263
264#define MISR_DCD 0x80
265#define MISR_CTS 0x40
266#define MISR_RI 0x20
267#define MISR_DSR 0x10
268
269/*****************************************************************************/
270
271/*
272 * Defines for the CCSR status register.
273 */
274#define CCSR_RXENABLED 0x80
275#define CCSR_RXFLOWON 0x40
276#define CCSR_RXFLOWOFF 0x20
277#define CCSR_TXENABLED 0x08
278#define CCSR_TXFLOWON 0x04
279#define CCSR_TXFLOWOFF 0x02
280
281/*****************************************************************************/
282
283/*
284 * Define the embedded commands.
285 */
286#define ETC_CMD 0x00
287#define ETC_STARTBREAK 0x81
288#define ETC_DELAY 0x82
289#define ETC_STOPBREAK 0x83
290
291/*****************************************************************************/
292#endif
diff --git a/include/linux/cdk.h b/include/linux/cdk.h
deleted file mode 100644
index 80093a8d4f64..000000000000
--- a/include/linux/cdk.h
+++ /dev/null
@@ -1,486 +0,0 @@
1/*****************************************************************************/
2
3/*
4 * cdk.h -- CDK interface definitions.
5 *
6 * Copyright (C) 1996-1998 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24/*****************************************************************************/
25#ifndef _CDK_H
26#define _CDK_H
27/*****************************************************************************/
28
29#pragma pack(2)
30
31/*
32 * The following set of definitions is used to communicate with the
33 * shared memory interface of the Stallion intelligent multiport serial
34 * boards. The definitions in this file are taken directly from the
35 * document titled "Generic Stackable Interface, Downloader and
36 * Communications Development Kit".
37 */
38
39/*
40 * Define the set of important shared memory addresses. These are
41 * required to initialize the board and get things started. All of these
42 * addresses are relative to the start of the shared memory.
43 */
44#define CDK_SIGADDR 0x200
45#define CDK_FEATADDR 0x280
46#define CDK_CDKADDR 0x300
47#define CDK_RDYADDR 0x262
48
49#define CDK_ALIVEMARKER 13
50
51/*
52 * On hardware power up the ROMs located on the EasyConnection 8/64 will
53 * fill out the following signature information into shared memory. This
54 * way the host system can quickly determine that the board is present
55 * and is operational.
56 */
57typedef struct cdkecpsig {
58 unsigned long magic;
59 unsigned short romver;
60 unsigned short cputype;
61 unsigned char panelid[8];
62} cdkecpsig_t;
63
64#define ECP_MAGIC 0x21504345
65
66/*
67 * On hardware power up the ROMs located on the ONboard, Stallion and
68 * Brumbys will fill out the following signature information into shared
69 * memory. This way the host system can quickly determine that the board
70 * is present and is operational.
71 */
72typedef struct cdkonbsig {
73 unsigned short magic0;
74 unsigned short magic1;
75 unsigned short magic2;
76 unsigned short magic3;
77 unsigned short romver;
78 unsigned short memoff;
79 unsigned short memseg;
80 unsigned short amask0;
81 unsigned short pic;
82 unsigned short status;
83 unsigned short btype;
84 unsigned short clkticks;
85 unsigned short clkspeed;
86 unsigned short amask1;
87 unsigned short amask2;
88} cdkonbsig_t;
89
90#define ONB_MAGIC0 0xf2a7
91#define ONB_MAGIC1 0xa149
92#define ONB_MAGIC2 0x6352
93#define ONB_MAGIC3 0xf121
94
95/*
96 * Define the feature area structure. The feature area is the set of
97 * startup parameters used by the slave image when it starts executing.
98 * They allow for the specification of buffer sizes, debug trace, etc.
99 */
100typedef struct cdkfeature {
101 unsigned long debug;
102 unsigned long banner;
103 unsigned long etype;
104 unsigned long nrdevs;
105 unsigned long brdspec;
106 unsigned long txrqsize;
107 unsigned long rxrqsize;
108 unsigned long flags;
109} cdkfeature_t;
110
111#define ETYP_DDK 0
112#define ETYP_CDK 1
113
114/*
115 * Define the CDK header structure. This is the info that the slave
116 * environment sets up after it has been downloaded and started. It
117 * essentially provides a memory map for the shared memory interface.
118 */
119typedef struct cdkhdr {
120 unsigned short command;
121 unsigned short status;
122 unsigned short port;
123 unsigned short mode;
124 unsigned long cmd_buf[14];
125 unsigned short alive_cnt;
126 unsigned short intrpt_mode;
127 unsigned char intrpt_id[8];
128 unsigned char ver_release;
129 unsigned char ver_modification;
130 unsigned char ver_fix;
131 unsigned char deadman_restart;
132 unsigned short deadman;
133 unsigned short nrdevs;
134 unsigned long memp;
135 unsigned long hostp;
136 unsigned long slavep;
137 unsigned char hostreq;
138 unsigned char slavereq;
139 unsigned char cmd_reserved[30];
140} cdkhdr_t;
141
142#define MODE_DDK 0
143#define MODE_CDK 1
144
145#define IMD_INTR 0x0
146#define IMD_PPINTR 0x1
147#define IMD_POLL 0xff
148
149/*
150 * Define the memory mapping structure. This structure is pointed to by
151 * the memp field in the stlcdkhdr struct. As many as these structures
152 * as required are laid out in shared memory to define how the rest of
153 * shared memory is divided up. There will be one for each port.
154 */
155typedef struct cdkmem {
156 unsigned short dtype;
157 unsigned long offset;
158} cdkmem_t;
159
160#define TYP_UNDEFINED 0x0
161#define TYP_ASYNCTRL 0x1
162#define TYP_ASYNC 0x20
163#define TYP_PARALLEL 0x40
164#define TYP_SYNCX21 0x60
165
166/*****************************************************************************/
167
168/*
169 * Following is a set of defines and structures used to actually deal
170 * with the serial ports on the board. Firstly is the set of commands
171 * that can be applied to ports.
172 */
173#define ASYCMD (((unsigned long) 'a') << 8)
174
175#define A_NULL (ASYCMD | 0)
176#define A_FLUSH (ASYCMD | 1)
177#define A_BREAK (ASYCMD | 2)
178#define A_GETPORT (ASYCMD | 3)
179#define A_SETPORT (ASYCMD | 4)
180#define A_SETPORTF (ASYCMD | 5)
181#define A_SETPORTFTX (ASYCMD | 6)
182#define A_SETPORTFRX (ASYCMD | 7)
183#define A_GETSIGNALS (ASYCMD | 8)
184#define A_SETSIGNALS (ASYCMD | 9)
185#define A_SETSIGNALSF (ASYCMD | 10)
186#define A_SETSIGNALSFTX (ASYCMD | 11)
187#define A_SETSIGNALSFRX (ASYCMD | 12)
188#define A_GETNOTIFY (ASYCMD | 13)
189#define A_SETNOTIFY (ASYCMD | 14)
190#define A_NOTIFY (ASYCMD | 15)
191#define A_PORTCTRL (ASYCMD | 16)
192#define A_GETSTATS (ASYCMD | 17)
193#define A_RQSTATE (ASYCMD | 18)
194#define A_FLOWSTATE (ASYCMD | 19)
195#define A_CLEARSTATS (ASYCMD | 20)
196
197/*
198 * Define those arguments used for simple commands.
199 */
200#define FLUSHRX 0x1
201#define FLUSHTX 0x2
202
203#define BREAKON -1
204#define BREAKOFF -2
205
206/*
207 * Define the port setting structure, and all those defines that go along
208 * with it. Basically this structure defines the characteristics of this
209 * port: baud rate, chars, parity, input/output char cooking etc.
210 */
211typedef struct asyport {
212 unsigned long baudout;
213 unsigned long baudin;
214 unsigned long iflag;
215 unsigned long oflag;
216 unsigned long lflag;
217 unsigned long pflag;
218 unsigned long flow;
219 unsigned long spare1;
220 unsigned short vtime;
221 unsigned short vmin;
222 unsigned short txlo;
223 unsigned short txhi;
224 unsigned short rxlo;
225 unsigned short rxhi;
226 unsigned short rxhog;
227 unsigned short spare2;
228 unsigned char csize;
229 unsigned char stopbs;
230 unsigned char parity;
231 unsigned char stopin;
232 unsigned char startin;
233 unsigned char stopout;
234 unsigned char startout;
235 unsigned char parmark;
236 unsigned char brkmark;
237 unsigned char cc[11];
238} asyport_t;
239
240#define PT_STOP1 0x0
241#define PT_STOP15 0x1
242#define PT_STOP2 0x2
243
244#define PT_NOPARITY 0x0
245#define PT_ODDPARITY 0x1
246#define PT_EVENPARITY 0x2
247#define PT_MARKPARITY 0x3
248#define PT_SPACEPARITY 0x4
249
250#define F_NONE 0x0
251#define F_IXON 0x1
252#define F_IXOFF 0x2
253#define F_IXANY 0x4
254#define F_IOXANY 0x8
255#define F_RTSFLOW 0x10
256#define F_CTSFLOW 0x20
257#define F_DTRFLOW 0x40
258#define F_DCDFLOW 0x80
259#define F_DSROFLOW 0x100
260#define F_DSRIFLOW 0x200
261
262#define FI_NORX 0x1
263#define FI_RAW 0x2
264#define FI_ISTRIP 0x4
265#define FI_UCLC 0x8
266#define FI_INLCR 0x10
267#define FI_ICRNL 0x20
268#define FI_IGNCR 0x40
269#define FI_IGNBREAK 0x80
270#define FI_DSCRDBREAK 0x100
271#define FI_1MARKBREAK 0x200
272#define FI_2MARKBREAK 0x400
273#define FI_XCHNGBREAK 0x800
274#define FI_IGNRXERRS 0x1000
275#define FI_DSCDRXERRS 0x2000
276#define FI_1MARKRXERRS 0x4000
277#define FI_2MARKRXERRS 0x8000
278#define FI_XCHNGRXERRS 0x10000
279#define FI_DSCRDNULL 0x20000
280
281#define FO_OLCUC 0x1
282#define FO_ONLCR 0x2
283#define FO_OOCRNL 0x4
284#define FO_ONOCR 0x8
285#define FO_ONLRET 0x10
286#define FO_ONL 0x20
287#define FO_OBS 0x40
288#define FO_OVT 0x80
289#define FO_OFF 0x100
290#define FO_OTAB1 0x200
291#define FO_OTAB2 0x400
292#define FO_OTAB3 0x800
293#define FO_OCR1 0x1000
294#define FO_OCR2 0x2000
295#define FO_OCR3 0x4000
296#define FO_OFILL 0x8000
297#define FO_ODELL 0x10000
298
299#define P_RTSLOCK 0x1
300#define P_CTSLOCK 0x2
301#define P_MAPRTS 0x4
302#define P_MAPCTS 0x8
303#define P_LOOPBACK 0x10
304#define P_DTRFOLLOW 0x20
305#define P_FAKEDCD 0x40
306
307#define P_RXIMIN 0x10000
308#define P_RXITIME 0x20000
309#define P_RXTHOLD 0x40000
310
311/*
312 * Define a structure to communicate serial port signal and data state
313 * information.
314 */
315typedef struct asysigs {
316 unsigned long data;
317 unsigned long signal;
318 unsigned long sigvalue;
319} asysigs_t;
320
321#define DT_TXBUSY 0x1
322#define DT_TXEMPTY 0x2
323#define DT_TXLOW 0x4
324#define DT_TXHIGH 0x8
325#define DT_TXFULL 0x10
326#define DT_TXHOG 0x20
327#define DT_TXFLOWED 0x40
328#define DT_TXBREAK 0x80
329
330#define DT_RXBUSY 0x100
331#define DT_RXEMPTY 0x200
332#define DT_RXLOW 0x400
333#define DT_RXHIGH 0x800
334#define DT_RXFULL 0x1000
335#define DT_RXHOG 0x2000
336#define DT_RXFLOWED 0x4000
337#define DT_RXBREAK 0x8000
338
339#define SG_DTR 0x1
340#define SG_DCD 0x2
341#define SG_RTS 0x4
342#define SG_CTS 0x8
343#define SG_DSR 0x10
344#define SG_RI 0x20
345
346/*
347 * Define the notification setting structure. This is used to tell the
348 * port what events we want to be informed about. Fields here use the
349 * same defines as for the asysigs structure above.
350 */
351typedef struct asynotify {
352 unsigned long ctrl;
353 unsigned long data;
354 unsigned long signal;
355 unsigned long sigvalue;
356} asynotify_t;
357
358/*
359 * Define the port control structure. It is used to do fine grain
360 * control operations on the port.
361 */
362typedef struct {
363 unsigned long rxctrl;
364 unsigned long txctrl;
365 char rximdch;
366 char tximdch;
367 char spare1;
368 char spare2;
369} asyctrl_t;
370
371#define CT_ENABLE 0x1
372#define CT_DISABLE 0x2
373#define CT_STOP 0x4
374#define CT_START 0x8
375#define CT_STARTFLOW 0x10
376#define CT_STOPFLOW 0x20
377#define CT_SENDCHR 0x40
378
379/*
380 * Define the stats structure kept for each port. This is a useful set
381 * of data collected for each port on the slave. The A_GETSTATS command
382 * is used to retrieve this data from the slave.
383 */
384typedef struct asystats {
385 unsigned long opens;
386 unsigned long txchars;
387 unsigned long rxchars;
388 unsigned long txringq;
389 unsigned long rxringq;
390 unsigned long txmsgs;
391 unsigned long rxmsgs;
392 unsigned long txflushes;
393 unsigned long rxflushes;
394 unsigned long overruns;
395 unsigned long framing;
396 unsigned long parity;
397 unsigned long ringover;
398 unsigned long lost;
399 unsigned long rxstart;
400 unsigned long rxstop;
401 unsigned long txstart;
402 unsigned long txstop;
403 unsigned long dcdcnt;
404 unsigned long dtrcnt;
405 unsigned long ctscnt;
406 unsigned long rtscnt;
407 unsigned long dsrcnt;
408 unsigned long ricnt;
409 unsigned long txbreaks;
410 unsigned long rxbreaks;
411 unsigned long signals;
412 unsigned long state;
413 unsigned long hwid;
414} asystats_t;
415
416/*****************************************************************************/
417
418/*
419 * All command and control communication with a device on the slave is
420 * via a control block in shared memory. Each device has its own control
421 * block, defined by the following structure. The control block allows
422 * the host to open, close and control the device on the slave.
423 */
424typedef struct cdkctrl {
425 unsigned char open;
426 unsigned char close;
427 unsigned long openarg;
428 unsigned long closearg;
429 unsigned long cmd;
430 unsigned long status;
431 unsigned long args[32];
432} cdkctrl_t;
433
434/*
435 * Each device on the slave passes data to and from the host via a ring
436 * queue in shared memory. Define a ring queue structure to hold the
437 * vital information about each ring queue. Two ring queues will be
438 * allocated for each port, one for receive data and one for transmit
439 * data.
440 */
441typedef struct cdkasyrq {
442 unsigned long offset;
443 unsigned short size;
444 unsigned short head;
445 unsigned short tail;
446} cdkasyrq_t;
447
448/*
449 * Each asynchronous port is defined in shared memory by the following
450 * structure. It contains a control block to command a device, and also
451 * the necessary data channel information as well.
452 */
453typedef struct cdkasy {
454 cdkctrl_t ctrl;
455 unsigned short notify;
456 asynotify_t changed;
457 unsigned short receive;
458 cdkasyrq_t rxq;
459 unsigned short transmit;
460 cdkasyrq_t txq;
461} cdkasy_t;
462
463#pragma pack()
464
465/*****************************************************************************/
466
467/*
468 * Define the set of ioctls used by the driver to do special things
469 * to the board. These include interrupting it, and initializing
470 * the driver after board startup and shutdown.
471 */
472#include <linux/ioctl.h>
473
474#define STL_BINTR _IO('s',20)
475#define STL_BSTART _IO('s',21)
476#define STL_BSTOP _IO('s',22)
477#define STL_BRESET _IO('s',23)
478
479/*
480 * Define a set of ioctl extensions, used to get at special stuff.
481 */
482#define STL_GETPFLAG _IO('s',80)
483#define STL_SETPFLAG _IO('s',81)
484
485/*****************************************************************************/
486#endif
diff --git a/include/linux/comstats.h b/include/linux/comstats.h
deleted file mode 100644
index 3f5ea8e8026d..000000000000
--- a/include/linux/comstats.h
+++ /dev/null
@@ -1,119 +0,0 @@
1/*****************************************************************************/
2
3/*
4 * comstats.h -- Serial Port Stats.
5 *
6 * Copyright (C) 1996-1998 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24/*****************************************************************************/
25#ifndef _COMSTATS_H
26#define _COMSTATS_H
27/*****************************************************************************/
28
29/*
30 * Serial port stats structure. The structure itself is UART
31 * independent, but some fields may be UART/driver specific (for
32 * example state).
33 */
34
35typedef struct {
36 unsigned long brd;
37 unsigned long panel;
38 unsigned long port;
39 unsigned long hwid;
40 unsigned long type;
41 unsigned long txtotal;
42 unsigned long rxtotal;
43 unsigned long txbuffered;
44 unsigned long rxbuffered;
45 unsigned long rxoverrun;
46 unsigned long rxparity;
47 unsigned long rxframing;
48 unsigned long rxlost;
49 unsigned long txbreaks;
50 unsigned long rxbreaks;
51 unsigned long txxon;
52 unsigned long txxoff;
53 unsigned long rxxon;
54 unsigned long rxxoff;
55 unsigned long txctson;
56 unsigned long txctsoff;
57 unsigned long rxrtson;
58 unsigned long rxrtsoff;
59 unsigned long modem;
60 unsigned long state;
61 unsigned long flags;
62 unsigned long ttystate;
63 unsigned long cflags;
64 unsigned long iflags;
65 unsigned long oflags;
66 unsigned long lflags;
67 unsigned long signals;
68} comstats_t;
69
70
71/*
72 * Board stats structure. Returns useful info about the board.
73 */
74
75#define COM_MAXPANELS 8
76
77typedef struct {
78 unsigned long panel;
79 unsigned long type;
80 unsigned long hwid;
81 unsigned long nrports;
82} companel_t;
83
84typedef struct {
85 unsigned long brd;
86 unsigned long type;
87 unsigned long hwid;
88 unsigned long state;
89 unsigned long ioaddr;
90 unsigned long ioaddr2;
91 unsigned long memaddr;
92 unsigned long irq;
93 unsigned long nrpanels;
94 unsigned long nrports;
95 companel_t panels[COM_MAXPANELS];
96} combrd_t;
97
98
99/*
100 * Define the ioctl operations for stats stuff.
101 */
102#include <linux/ioctl.h>
103
104#define COM_GETPORTSTATS _IO('c',30)
105#define COM_CLRPORTSTATS _IO('c',31)
106#define COM_GETBRDSTATS _IO('c',32)
107
108
109/*
110 * Define the set of ioctls that give user level access to the
111 * private port, panel and board structures. The argument required
112 * will be driver dependent!
113 */
114#define COM_READPORT _IO('c',40)
115#define COM_READBOARD _IO('c',41)
116#define COM_READPANEL _IO('c',42)
117
118/*****************************************************************************/
119#endif
diff --git a/include/linux/generic_serial.h b/include/linux/generic_serial.h
deleted file mode 100644
index 79b3eb37243a..000000000000
--- a/include/linux/generic_serial.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * generic_serial.h
3 *
4 * Copyright (C) 1998 R.E.Wolff@BitWizard.nl
5 *
6 * written for the SX serial driver.
7 *
8 * Version 0.1 -- December, 1998.
9 */
10
11#ifndef GENERIC_SERIAL_H
12#define GENERIC_SERIAL_H
13
14#warning Use of this header is deprecated.
15#warning Since nobody sets the constants defined here for you, you should not, in any case, use them. Including the header is thus pointless.
16
17/* Flags */
18/* Warning: serial.h defines some ASYNC_ flags, they say they are "only"
19 used in serial.c, but they are also used in all other serial drivers.
20 Make sure they don't clash with these here... */
21#define GS_TX_INTEN 0x00800000
22#define GS_RX_INTEN 0x00400000
23#define GS_ACTIVE 0x00200000
24
25#define GS_TYPE_NORMAL 1
26
27#define GS_DEBUG_FLUSH 0x00000001
28#define GS_DEBUG_BTR 0x00000002
29#define GS_DEBUG_TERMIOS 0x00000004
30#define GS_DEBUG_STUFF 0x00000008
31#define GS_DEBUG_CLOSE 0x00000010
32#define GS_DEBUG_FLOW 0x00000020
33#define GS_DEBUG_WRITE 0x00000040
34
35#endif
diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h
index 7ea898c55a60..a12a38107c1a 100644
--- a/include/linux/i2c/twl.h
+++ b/include/linux/i2c/twl.h
@@ -561,9 +561,6 @@ struct twl4030_bci_platform_data {
561 561
562/* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */ 562/* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
563struct twl4030_gpio_platform_data { 563struct twl4030_gpio_platform_data {
564 int gpio_base;
565 unsigned irq_base, irq_end;
566
567 /* package the two LED signals as output-only GPIOs? */ 564 /* package the two LED signals as output-only GPIOs? */
568 bool use_leds; 565 bool use_leds;
569 566
diff --git a/include/linux/istallion.h b/include/linux/istallion.h
deleted file mode 100644
index ad700a60c158..000000000000
--- a/include/linux/istallion.h
+++ /dev/null
@@ -1,123 +0,0 @@
1/*****************************************************************************/
2
3/*
4 * istallion.h -- stallion intelligent multiport serial driver.
5 *
6 * Copyright (C) 1996-1998 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24/*****************************************************************************/
25#ifndef _ISTALLION_H
26#define _ISTALLION_H
27/*****************************************************************************/
28
29/*
30 * Define important driver constants here.
31 */
32#define STL_MAXBRDS 4
33#define STL_MAXPANELS 4
34#define STL_MAXPORTS 64
35#define STL_MAXCHANS (STL_MAXPORTS + 1)
36#define STL_MAXDEVS (STL_MAXBRDS * STL_MAXPORTS)
37
38
39/*
40 * Define a set of structures to hold all the board/panel/port info
41 * for our ports. These will be dynamically allocated as required at
42 * driver initialization time.
43 */
44
45/*
46 * Port and board structures to hold status info about each object.
47 * The board structure contains pointers to structures for each port
48 * connected to it. Panels are not distinguished here, since
49 * communication with the slave board will always be on a per port
50 * basis.
51 */
52struct stliport {
53 unsigned long magic;
54 struct tty_port port;
55 unsigned int portnr;
56 unsigned int panelnr;
57 unsigned int brdnr;
58 unsigned long state;
59 unsigned int devnr;
60 int baud_base;
61 int custom_divisor;
62 int closing_wait;
63 int rc;
64 int argsize;
65 void *argp;
66 unsigned int rxmarkmsk;
67 wait_queue_head_t raw_wait;
68 struct asysigs asig;
69 unsigned long addr;
70 unsigned long rxoffset;
71 unsigned long txoffset;
72 unsigned long sigs;
73 unsigned long pflag;
74 unsigned int rxsize;
75 unsigned int txsize;
76 unsigned char reqbit;
77 unsigned char portidx;
78 unsigned char portbit;
79};
80
81/*
82 * Use a structure of function pointers to do board level operations.
83 * These include, enable/disable, paging shared memory, interrupting, etc.
84 */
85struct stlibrd {
86 unsigned long magic;
87 unsigned int brdnr;
88 unsigned int brdtype;
89 unsigned long state;
90 unsigned int nrpanels;
91 unsigned int nrports;
92 unsigned int nrdevs;
93 unsigned int iobase;
94 int iosize;
95 unsigned long memaddr;
96 void __iomem *membase;
97 unsigned long memsize;
98 int pagesize;
99 int hostoffset;
100 int slaveoffset;
101 int bitsize;
102 int enabval;
103 unsigned int panels[STL_MAXPANELS];
104 int panelids[STL_MAXPANELS];
105 void (*init)(struct stlibrd *brdp);
106 void (*enable)(struct stlibrd *brdp);
107 void (*reenable)(struct stlibrd *brdp);
108 void (*disable)(struct stlibrd *brdp);
109 void __iomem *(*getmemptr)(struct stlibrd *brdp, unsigned long offset, int line);
110 void (*intr)(struct stlibrd *brdp);
111 void (*reset)(struct stlibrd *brdp);
112 struct stliport *ports[STL_MAXPORTS];
113};
114
115
116/*
117 * Define MAGIC numbers used for above structures.
118 */
119#define STLI_PORTMAGIC 0xe671c7a1
120#define STLI_BOARDMAGIC 0x4bc6c825
121
122/*****************************************************************************/
123#endif
diff --git a/include/linux/kbd_kern.h b/include/linux/kbd_kern.h
index daf4a3a40ee0..b7c8cdc1d422 100644
--- a/include/linux/kbd_kern.h
+++ b/include/linux/kbd_kern.h
@@ -65,7 +65,6 @@ struct kbd_struct {
65 65
66extern int kbd_init(void); 66extern int kbd_init(void);
67 67
68extern unsigned char getledstate(void);
69extern void setledstate(struct kbd_struct *kbd, unsigned int led); 68extern void setledstate(struct kbd_struct *kbd, unsigned int led);
70 69
71extern int do_poke_blanked_console; 70extern int do_poke_blanked_console;
@@ -145,16 +144,4 @@ void compute_shiftstate(void);
145 144
146extern unsigned int keymap_count; 145extern unsigned int keymap_count;
147 146
148/* console.c */
149
150static inline void con_schedule_flip(struct tty_struct *t)
151{
152 unsigned long flags;
153 spin_lock_irqsave(&t->buf.lock, flags);
154 if (t->buf.tail != NULL)
155 t->buf.tail->commit = t->buf.tail->used;
156 spin_unlock_irqrestore(&t->buf.lock, flags);
157 schedule_work(&t->buf.work);
158}
159
160#endif 147#endif
diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h
index f350fd0ba1df..94514710a03f 100644
--- a/include/linux/mfd/tps6586x.h
+++ b/include/linux/mfd/tps6586x.h
@@ -14,6 +14,7 @@
14#define TPS6586X_SLEW_RATE_MASK 0x07 14#define TPS6586X_SLEW_RATE_MASK 0x07
15 15
16enum { 16enum {
17 TPS6586X_ID_SYS,
17 TPS6586X_ID_SM_0, 18 TPS6586X_ID_SM_0,
18 TPS6586X_ID_SM_1, 19 TPS6586X_ID_SM_1,
19 TPS6586X_ID_SM_2, 20 TPS6586X_ID_SM_2,
diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h
index eaad49f7c130..ba43d4806b83 100644
--- a/include/linux/mfd/twl6040.h
+++ b/include/linux/mfd/twl6040.h
@@ -194,7 +194,6 @@ struct twl6040_vibra_data {
194 194
195struct twl6040_platform_data { 195struct twl6040_platform_data {
196 int audpwron_gpio; /* audio power-on gpio */ 196 int audpwron_gpio; /* audio power-on gpio */
197 unsigned int irq_base;
198 197
199 struct twl6040_codec_data *codec; 198 struct twl6040_codec_data *codec;
200 struct twl6040_vibra_data *vibra; 199 struct twl6040_vibra_data *vibra;
diff --git a/include/linux/omapfb.h b/include/linux/omapfb.h
index 4ff57e81051d..85af8184691a 100644
--- a/include/linux/omapfb.h
+++ b/include/linux/omapfb.h
@@ -220,7 +220,12 @@ struct omapfb_display_info {
220 220
221#ifdef __KERNEL__ 221#ifdef __KERNEL__
222 222
223#include <plat/board.h> 223struct omap_lcd_config {
224 char panel_name[16];
225 char ctrl_name[16];
226 s16 nreset_gpio;
227 u8 data_lines;
228};
224 229
225struct omapfb_platform_data { 230struct omapfb_platform_data {
226 struct omap_lcd_config lcd; 231 struct omap_lcd_config lcd;
diff --git a/include/linux/platform_data/asoc-ti-mcbsp.h b/include/linux/platform_data/asoc-ti-mcbsp.h
new file mode 100644
index 000000000000..18814127809a
--- /dev/null
+++ b/include/linux/platform_data/asoc-ti-mcbsp.h
@@ -0,0 +1,62 @@
1/*
2 * arch/arm/plat-omap/include/mach/mcbsp.h
3 *
4 * Defines for Multi-Channel Buffered Serial Port
5 *
6 * Copyright (C) 2002 RidgeRun, Inc.
7 * Author: Steve Johnson
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24#ifndef __ASM_ARCH_OMAP_MCBSP_H
25#define __ASM_ARCH_OMAP_MCBSP_H
26
27#include <linux/spinlock.h>
28#include <linux/clk.h>
29
30#define MCBSP_CONFIG_TYPE2 0x2
31#define MCBSP_CONFIG_TYPE3 0x3
32#define MCBSP_CONFIG_TYPE4 0x4
33
34/* Platform specific configuration */
35struct omap_mcbsp_ops {
36 void (*request)(unsigned int);
37 void (*free)(unsigned int);
38};
39
40struct omap_mcbsp_platform_data {
41 struct omap_mcbsp_ops *ops;
42 u16 buffer_size;
43 u8 reg_size;
44 u8 reg_step;
45
46 /* McBSP platform and instance specific features */
47 bool has_wakeup; /* Wakeup capability */
48 bool has_ccr; /* Transceiver has configuration control registers */
49 int (*enable_st_clock)(unsigned int, bool);
50 int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src);
51 int (*mux_signal)(struct device *dev, const char *signal, const char *src);
52};
53
54/**
55 * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod
56 * @sidetone: name of the sidetone device
57 */
58struct omap_mcbsp_dev_attr {
59 const char *sidetone;
60};
61
62#endif
diff --git a/include/linux/platform_data/dsp-omap.h b/include/linux/platform_data/dsp-omap.h
new file mode 100644
index 000000000000..5927709b1908
--- /dev/null
+++ b/include/linux/platform_data/dsp-omap.h
@@ -0,0 +1,34 @@
1#ifndef __OMAP_DSP_H__
2#define __OMAP_DSP_H__
3
4#include <linux/types.h>
5
6struct omap_dsp_platform_data {
7 void (*dsp_set_min_opp) (u8 opp_id);
8 u8 (*dsp_get_opp) (void);
9 void (*cpu_set_freq) (unsigned long f);
10 unsigned long (*cpu_get_freq) (void);
11 unsigned long mpu_speed[6];
12
13 /* functions to write and read PRCM registers */
14 void (*dsp_prm_write)(u32, s16 , u16);
15 u32 (*dsp_prm_read)(s16 , u16);
16 u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16);
17 void (*dsp_cm_write)(u32, s16 , u16);
18 u32 (*dsp_cm_read)(s16 , u16);
19 u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
20
21 void (*set_bootaddr)(u32);
22 void (*set_bootmode)(u8);
23
24 phys_addr_t phys_mempool_base;
25 phys_addr_t phys_mempool_size;
26};
27
28#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
29extern void omap_dsp_reserve_sdram_memblock(void);
30#else
31static inline void omap_dsp_reserve_sdram_memblock(void) { }
32#endif
33
34#endif
diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h
new file mode 100644
index 000000000000..e8741c2678d5
--- /dev/null
+++ b/include/linux/platform_data/gpio-omap.h
@@ -0,0 +1,217 @@
1/*
2 * OMAP GPIO handling defines and functions
3 *
4 * Copyright (C) 2003-2005 Nokia Corporation
5 *
6 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#ifndef __ASM_ARCH_OMAP_GPIO_H
25#define __ASM_ARCH_OMAP_GPIO_H
26
27#include <linux/io.h>
28#include <linux/platform_device.h>
29#include <mach/irqs.h>
30
31#define OMAP1_MPUIO_BASE 0xfffb5000
32
33/*
34 * These are the omap15xx/16xx offsets. The omap7xx offset are
35 * OMAP_MPUIO_ / 2 offsets below.
36 */
37#define OMAP_MPUIO_INPUT_LATCH 0x00
38#define OMAP_MPUIO_OUTPUT 0x04
39#define OMAP_MPUIO_IO_CNTL 0x08
40#define OMAP_MPUIO_KBR_LATCH 0x10
41#define OMAP_MPUIO_KBC 0x14
42#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18
43#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c
44#define OMAP_MPUIO_KBD_INT 0x20
45#define OMAP_MPUIO_GPIO_INT 0x24
46#define OMAP_MPUIO_KBD_MASKIT 0x28
47#define OMAP_MPUIO_GPIO_MASKIT 0x2c
48#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30
49#define OMAP_MPUIO_LATCH 0x34
50
51#define OMAP34XX_NR_GPIOS 6
52
53/*
54 * OMAP1510 GPIO registers
55 */
56#define OMAP1510_GPIO_DATA_INPUT 0x00
57#define OMAP1510_GPIO_DATA_OUTPUT 0x04
58#define OMAP1510_GPIO_DIR_CONTROL 0x08
59#define OMAP1510_GPIO_INT_CONTROL 0x0c
60#define OMAP1510_GPIO_INT_MASK 0x10
61#define OMAP1510_GPIO_INT_STATUS 0x14
62#define OMAP1510_GPIO_PIN_CONTROL 0x18
63
64#define OMAP1510_IH_GPIO_BASE 64
65
66/*
67 * OMAP1610 specific GPIO registers
68 */
69#define OMAP1610_GPIO_REVISION 0x0000
70#define OMAP1610_GPIO_SYSCONFIG 0x0010
71#define OMAP1610_GPIO_SYSSTATUS 0x0014
72#define OMAP1610_GPIO_IRQSTATUS1 0x0018
73#define OMAP1610_GPIO_IRQENABLE1 0x001c
74#define OMAP1610_GPIO_WAKEUPENABLE 0x0028
75#define OMAP1610_GPIO_DATAIN 0x002c
76#define OMAP1610_GPIO_DATAOUT 0x0030
77#define OMAP1610_GPIO_DIRECTION 0x0034
78#define OMAP1610_GPIO_EDGE_CTRL1 0x0038
79#define OMAP1610_GPIO_EDGE_CTRL2 0x003c
80#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c
81#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8
82#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0
83#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc
84#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8
85#define OMAP1610_GPIO_SET_DATAOUT 0x00f0
86
87/*
88 * OMAP7XX specific GPIO registers
89 */
90#define OMAP7XX_GPIO_DATA_INPUT 0x00
91#define OMAP7XX_GPIO_DATA_OUTPUT 0x04
92#define OMAP7XX_GPIO_DIR_CONTROL 0x08
93#define OMAP7XX_GPIO_INT_CONTROL 0x0c
94#define OMAP7XX_GPIO_INT_MASK 0x10
95#define OMAP7XX_GPIO_INT_STATUS 0x14
96
97/*
98 * omap2+ specific GPIO registers
99 */
100#define OMAP24XX_GPIO_REVISION 0x0000
101#define OMAP24XX_GPIO_IRQSTATUS1 0x0018
102#define OMAP24XX_GPIO_IRQSTATUS2 0x0028
103#define OMAP24XX_GPIO_IRQENABLE2 0x002c
104#define OMAP24XX_GPIO_IRQENABLE1 0x001c
105#define OMAP24XX_GPIO_WAKE_EN 0x0020
106#define OMAP24XX_GPIO_CTRL 0x0030
107#define OMAP24XX_GPIO_OE 0x0034
108#define OMAP24XX_GPIO_DATAIN 0x0038
109#define OMAP24XX_GPIO_DATAOUT 0x003c
110#define OMAP24XX_GPIO_LEVELDETECT0 0x0040
111#define OMAP24XX_GPIO_LEVELDETECT1 0x0044
112#define OMAP24XX_GPIO_RISINGDETECT 0x0048
113#define OMAP24XX_GPIO_FALLINGDETECT 0x004c
114#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050
115#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054
116#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060
117#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064
118#define OMAP24XX_GPIO_CLEARWKUENA 0x0080
119#define OMAP24XX_GPIO_SETWKUENA 0x0084
120#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
121#define OMAP24XX_GPIO_SETDATAOUT 0x0094
122
123#define OMAP4_GPIO_REVISION 0x0000
124#define OMAP4_GPIO_EOI 0x0020
125#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
126#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
127#define OMAP4_GPIO_IRQSTATUS0 0x002c
128#define OMAP4_GPIO_IRQSTATUS1 0x0030
129#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
130#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
131#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
132#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
133#define OMAP4_GPIO_IRQWAKEN0 0x0044
134#define OMAP4_GPIO_IRQWAKEN1 0x0048
135#define OMAP4_GPIO_IRQENABLE1 0x011c
136#define OMAP4_GPIO_WAKE_EN 0x0120
137#define OMAP4_GPIO_IRQSTATUS2 0x0128
138#define OMAP4_GPIO_IRQENABLE2 0x012c
139#define OMAP4_GPIO_CTRL 0x0130
140#define OMAP4_GPIO_OE 0x0134
141#define OMAP4_GPIO_DATAIN 0x0138
142#define OMAP4_GPIO_DATAOUT 0x013c
143#define OMAP4_GPIO_LEVELDETECT0 0x0140
144#define OMAP4_GPIO_LEVELDETECT1 0x0144
145#define OMAP4_GPIO_RISINGDETECT 0x0148
146#define OMAP4_GPIO_FALLINGDETECT 0x014c
147#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
148#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
149#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160
150#define OMAP4_GPIO_SETIRQENABLE1 0x0164
151#define OMAP4_GPIO_CLEARWKUENA 0x0180
152#define OMAP4_GPIO_SETWKUENA 0x0184
153#define OMAP4_GPIO_CLEARDATAOUT 0x0190
154#define OMAP4_GPIO_SETDATAOUT 0x0194
155
156#define OMAP_MAX_GPIO_LINES 192
157
158#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr))
159#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES)
160
161struct omap_gpio_dev_attr {
162 int bank_width; /* GPIO bank width */
163 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
164};
165
166struct omap_gpio_reg_offs {
167 u16 revision;
168 u16 direction;
169 u16 datain;
170 u16 dataout;
171 u16 set_dataout;
172 u16 clr_dataout;
173 u16 irqstatus;
174 u16 irqstatus2;
175 u16 irqstatus_raw0;
176 u16 irqstatus_raw1;
177 u16 irqenable;
178 u16 irqenable2;
179 u16 set_irqenable;
180 u16 clr_irqenable;
181 u16 debounce;
182 u16 debounce_en;
183 u16 ctrl;
184 u16 wkup_en;
185 u16 leveldetect0;
186 u16 leveldetect1;
187 u16 risingdetect;
188 u16 fallingdetect;
189 u16 irqctrl;
190 u16 edgectrl1;
191 u16 edgectrl2;
192 u16 pinctrl;
193
194 bool irqenable_inv;
195};
196
197struct omap_gpio_platform_data {
198 int bank_type;
199 int bank_width; /* GPIO bank width */
200 int bank_stride; /* Only needed for omap1 MPUIO */
201 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
202 bool loses_context; /* whether the bank would ever lose context */
203 bool is_mpuio; /* whether the bank is of type MPUIO */
204 u32 non_wakeup_gpios;
205
206 struct omap_gpio_reg_offs *regs;
207
208 /* Return context loss count due to PM states changing */
209 int (*get_context_loss_count)(struct device *dev);
210};
211
212extern void omap2_gpio_prepare_for_idle(int off_mode);
213extern void omap2_gpio_resume_after_idle(void);
214extern void omap_set_gpio_debounce(int gpio, int enable);
215extern void omap_set_gpio_debounce_time(int gpio, int enable);
216
217#endif
diff --git a/include/linux/platform_data/keypad-omap.h b/include/linux/platform_data/keypad-omap.h
new file mode 100644
index 000000000000..a6b21eddb212
--- /dev/null
+++ b/include/linux/platform_data/keypad-omap.h
@@ -0,0 +1,52 @@
1/*
2 * arch/arm/plat-omap/include/mach/keypad.h
3 *
4 * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef ASMARM_ARCH_KEYPAD_H
11#define ASMARM_ARCH_KEYPAD_H
12
13#ifndef CONFIG_ARCH_OMAP1
14#warning Please update the board to use matrix-keypad driver
15#define omap_readw(reg) 0
16#define omap_writew(val, reg) do {} while (0)
17#endif
18#include <linux/input/matrix_keypad.h>
19
20struct omap_kp_platform_data {
21 int rows;
22 int cols;
23 const struct matrix_keymap_data *keymap_data;
24 bool rep;
25 unsigned long delay;
26 bool dbounce;
27 /* specific to OMAP242x*/
28 unsigned int *row_gpios;
29 unsigned int *col_gpios;
30};
31
32/* Group (0..3) -- when multiple keys are pressed, only the
33 * keys pressed in the same group are considered as pressed. This is
34 * in order to workaround certain crappy HW designs that produce ghost
35 * keypresses. Two free bits, not used by neither row/col nor keynum,
36 * must be available for use as group bits. The below GROUP_SHIFT
37 * macro definition is based on some prior knowledge of the
38 * matrix_keypad defined KEY() macro internals.
39 */
40#define GROUP_SHIFT 14
41#define GROUP_0 (0 << GROUP_SHIFT)
42#define GROUP_1 (1 << GROUP_SHIFT)
43#define GROUP_2 (2 << GROUP_SHIFT)
44#define GROUP_3 (3 << GROUP_SHIFT)
45#define GROUP_MASK GROUP_3
46#if KEY_MAX & GROUP_MASK
47#error Group bits in conflict with keynum bits
48#endif
49
50
51#endif
52
diff --git a/include/linux/platform_data/lcd-mipid.h b/include/linux/platform_data/lcd-mipid.h
new file mode 100644
index 000000000000..8e52c6572281
--- /dev/null
+++ b/include/linux/platform_data/lcd-mipid.h
@@ -0,0 +1,29 @@
1#ifndef __LCD_MIPID_H
2#define __LCD_MIPID_H
3
4enum mipid_test_num {
5 MIPID_TEST_RGB_LINES,
6};
7
8enum mipid_test_result {
9 MIPID_TEST_SUCCESS,
10 MIPID_TEST_INVALID,
11 MIPID_TEST_FAILED,
12};
13
14#ifdef __KERNEL__
15
16struct mipid_platform_data {
17 int nreset_gpio;
18 int data_lines;
19
20 void (*shutdown)(struct mipid_platform_data *pdata);
21 void (*set_bklight_level)(struct mipid_platform_data *pdata,
22 int level);
23 int (*get_bklight_level)(struct mipid_platform_data *pdata);
24 int (*get_bklight_max)(struct mipid_platform_data *pdata);
25};
26
27#endif
28
29#endif
diff --git a/include/linux/platform_data/max310x.h b/include/linux/platform_data/max310x.h
new file mode 100644
index 000000000000..91648bf5fc5c
--- /dev/null
+++ b/include/linux/platform_data/max310x.h
@@ -0,0 +1,67 @@
1/*
2 * Maxim (Dallas) MAX3107/8 serial driver
3 *
4 * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru>
5 *
6 * Based on max3100.c, by Christian Pellegrin <chripell@evolware.org>
7 * Based on max3110.c, by Feng Tang <feng.tang@intel.com>
8 * Based on max3107.c, by Aavamobile
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef _MAX310X_H_
17#define _MAX310X_H_
18
19/*
20 * Example board initialization data:
21 *
22 * static struct max310x_pdata max3107_pdata = {
23 * .driver_flags = MAX310X_EXT_CLK,
24 * .uart_flags[0] = MAX310X_ECHO_SUPRESS | MAX310X_AUTO_DIR_CTRL,
25 * .frequency = 3686400,
26 * .gpio_base = -1,
27 * };
28 *
29 * static struct spi_board_info spi_device_max3107[] = {
30 * {
31 * .modalias = "max3107",
32 * .irq = IRQ_EINT3,
33 * .bus_num = 1,
34 * .chip_select = 1,
35 * .platform_data = &max3107_pdata,
36 * },
37 * };
38 */
39
40#define MAX310X_MAX_UARTS 1
41
42/* MAX310X platform data structure */
43struct max310x_pdata {
44 /* Flags global to driver */
45 const u8 driver_flags:2;
46#define MAX310X_EXT_CLK (0x00000001) /* External clock enable */
47#define MAX310X_AUTOSLEEP (0x00000002) /* Enable AutoSleep mode */
48 /* Flags global to UART port */
49 const u8 uart_flags[MAX310X_MAX_UARTS];
50#define MAX310X_LOOPBACK (0x00000001) /* Loopback mode enable */
51#define MAX310X_ECHO_SUPRESS (0x00000002) /* Enable echo supress */
52#define MAX310X_AUTO_DIR_CTRL (0x00000004) /* Enable Auto direction
53 * control (RS-485)
54 */
55 /* Frequency (extrenal clock or crystal) */
56 const int frequency;
57 /* GPIO base number (can be negative) */
58 const int gpio_base;
59 /* Called during startup */
60 void (*init)(void);
61 /* Called before finish */
62 void (*exit)(void);
63 /* Suspend callback */
64 void (*suspend)(int do_suspend);
65};
66
67#endif
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
new file mode 100644
index 000000000000..1a68c1e5fe53
--- /dev/null
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -0,0 +1,43 @@
1/*
2 * arch/arm/plat-omap/include/mach/nand.h
3 *
4 * Copyright (C) 2006 Micron Technology Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <plat/gpmc.h>
12#include <linux/mtd/partitions.h>
13
14enum nand_io {
15 NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */
16 NAND_OMAP_POLLED, /* polled mode, without prefetch */
17 NAND_OMAP_PREFETCH_DMA, /* prefetch enabled sDMA mode */
18 NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */
19};
20
21struct omap_nand_platform_data {
22 int cs;
23 struct mtd_partition *parts;
24 struct gpmc_timings *gpmc_t;
25 int nr_parts;
26 bool dev_ready;
27 enum nand_io xfer_type;
28 int devsize;
29 enum omap_ecc ecc_opt;
30 struct gpmc_nand_regs reg;
31};
32
33/* minimum size for IO mapping */
34#define NAND_IO_SIZE 4
35
36#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
37extern int gpmc_nand_init(struct omap_nand_platform_data *d);
38#else
39static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
40{
41 return 0;
42}
43#endif
diff --git a/include/linux/platform_data/mtd-onenand-omap2.h b/include/linux/platform_data/mtd-onenand-omap2.h
new file mode 100644
index 000000000000..2858667d2e4f
--- /dev/null
+++ b/include/linux/platform_data/mtd-onenand-omap2.h
@@ -0,0 +1,53 @@
1/*
2 * arch/arm/plat-omap/include/mach/onenand.h
3 *
4 * Copyright (C) 2006 Nokia Corporation
5 * Author: Juha Yrjola
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14
15#define ONENAND_SYNC_READ (1 << 0)
16#define ONENAND_SYNC_READWRITE (1 << 1)
17
18struct onenand_freq_info {
19 u16 maf_id;
20 u16 dev_id;
21 u16 ver_id;
22};
23
24struct omap_onenand_platform_data {
25 int cs;
26 int gpio_irq;
27 struct mtd_partition *parts;
28 int nr_parts;
29 int (*onenand_setup)(void __iomem *, int *freq_ptr);
30 int (*get_freq)(const struct onenand_freq_info *freq_info,
31 bool *clk_dep);
32 int dma_channel;
33 u8 flags;
34 u8 regulator_can_sleep;
35 u8 skip_initial_unlocking;
36};
37
38#define ONENAND_MAX_PARTITIONS 8
39
40#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
41 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
42
43extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
44
45#else
46
47#define board_onenand_data NULL
48
49static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
50{
51}
52
53#endif
diff --git a/include/linux/platform_data/omap1_bl.h b/include/linux/platform_data/omap1_bl.h
new file mode 100644
index 000000000000..881a8e92d605
--- /dev/null
+++ b/include/linux/platform_data/omap1_bl.h
@@ -0,0 +1,11 @@
1#ifndef __OMAP1_BL_H__
2#define __OMAP1_BL_H__
3
4#include <linux/device.h>
5
6struct omap_backlight_config {
7 int default_intensity;
8 int (*set_power)(struct device *dev, int state);
9};
10
11#endif
diff --git a/include/linux/platform_data/pinctrl-coh901.h b/include/linux/platform_data/pinctrl-coh901.h
new file mode 100644
index 000000000000..30dea251b835
--- /dev/null
+++ b/include/linux/platform_data/pinctrl-coh901.h
@@ -0,0 +1,26 @@
1/*
2 * Copyright (C) 2007-2012 ST-Ericsson AB
3 * License terms: GNU General Public License (GPL) version 2
4 * GPIO block resgister definitions and inline macros for
5 * U300 GPIO COH 901 335 or COH 901 571/3
6 * Author: Linus Walleij <linus.walleij@stericsson.com>
7 */
8
9#ifndef __MACH_U300_GPIO_U300_H
10#define __MACH_U300_GPIO_U300_H
11
12/**
13 * struct u300_gpio_platform - U300 GPIO platform data
14 * @ports: number of GPIO block ports
15 * @gpio_base: first GPIO number for this block (use a free range)
16 * @gpio_irq_base: first GPIO IRQ number for this block (use a free range)
17 * @pinctrl_device: pin control device to spawn as child
18 */
19struct u300_gpio_platform {
20 u8 ports;
21 int gpio_base;
22 int gpio_irq_base;
23 struct platform_device *pinctrl_device;
24};
25
26#endif /* __MACH_U300_GPIO_U300_H */
diff --git a/include/linux/platform_data/remoteproc-omap.h b/include/linux/platform_data/remoteproc-omap.h
new file mode 100644
index 000000000000..b10eac89e2e9
--- /dev/null
+++ b/include/linux/platform_data/remoteproc-omap.h
@@ -0,0 +1,57 @@
1/*
2 * Remote Processor - omap-specific bits
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Copyright (C) 2011 Google, Inc.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef _PLAT_REMOTEPROC_H
18#define _PLAT_REMOTEPROC_H
19
20struct rproc_ops;
21struct platform_device;
22
23/*
24 * struct omap_rproc_pdata - omap remoteproc's platform data
25 * @name: the remoteproc's name
26 * @oh_name: omap hwmod device
27 * @oh_name_opt: optional, secondary omap hwmod device
28 * @firmware: name of firmware file to load
29 * @mbox_name: name of omap mailbox device to use with this rproc
30 * @ops: start/stop rproc handlers
31 * @device_enable: omap-specific handler for enabling a device
32 * @device_shutdown: omap-specific handler for shutting down a device
33 */
34struct omap_rproc_pdata {
35 const char *name;
36 const char *oh_name;
37 const char *oh_name_opt;
38 const char *firmware;
39 const char *mbox_name;
40 const struct rproc_ops *ops;
41 int (*device_enable) (struct platform_device *pdev);
42 int (*device_shutdown) (struct platform_device *pdev);
43};
44
45#if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE)
46
47void __init omap_rproc_reserve_cma(void);
48
49#else
50
51void __init omap_rproc_reserve_cma(void)
52{
53}
54
55#endif
56
57#endif /* _PLAT_REMOTEPROC_H */
diff --git a/include/linux/platform_data/sccnxp.h b/include/linux/platform_data/sccnxp.h
new file mode 100644
index 000000000000..7311ccd3217f
--- /dev/null
+++ b/include/linux/platform_data/sccnxp.h
@@ -0,0 +1,93 @@
1/*
2 * NXP (Philips) SCC+++(SCN+++) serial driver
3 *
4 * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru>
5 *
6 * Based on sc26xx.c, by Thomas Bogendörfer (tsbogend@alpha.franken.de)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#ifndef __SCCNXP_H
15#define __SCCNXP_H
16
17#define SCCNXP_MAX_UARTS 2
18
19/* Output lines */
20#define LINE_OP0 1
21#define LINE_OP1 2
22#define LINE_OP2 3
23#define LINE_OP3 4
24#define LINE_OP4 5
25#define LINE_OP5 6
26#define LINE_OP6 7
27#define LINE_OP7 8
28
29/* Input lines */
30#define LINE_IP0 9
31#define LINE_IP1 10
32#define LINE_IP2 11
33#define LINE_IP3 12
34#define LINE_IP4 13
35#define LINE_IP5 14
36#define LINE_IP6 15
37
38/* Signals */
39#define DTR_OP 0 /* DTR */
40#define RTS_OP 4 /* RTS */
41#define DSR_IP 8 /* DSR */
42#define CTS_IP 12 /* CTS */
43#define DCD_IP 16 /* DCD */
44#define RNG_IP 20 /* RNG */
45
46#define DIR_OP 24 /* Special signal for control RS-485.
47 * Goes high when transmit,
48 * then goes low.
49 */
50
51/* Routing control signal 'sig' to line 'line' */
52#define MCTRL_SIG(sig, line) ((line) << (sig))
53
54/*
55 * Example board initialization data:
56 *
57 * static struct resource sc2892_resources[] = {
58 * DEFINE_RES_MEM(UART_PHYS_START, 0x10),
59 * DEFINE_RES_IRQ(IRQ_EXT2),
60 * };
61 *
62 * static struct sccnxp_pdata sc2892_info = {
63 * .frequency = 3686400,
64 * .mctrl_cfg[0] = MCTRL_SIG(DIR_OP, LINE_OP0),
65 * .mctrl_cfg[1] = MCTRL_SIG(DIR_OP, LINE_OP1),
66 * };
67 *
68 * static struct platform_device sc2892 = {
69 * .name = "sc2892",
70 * .id = -1,
71 * .resource = sc2892_resources,
72 * .num_resources = ARRAY_SIZE(sc2892_resources),
73 * .dev = {
74 * .platform_data = &sc2892_info,
75 * },
76 * };
77 */
78
79/* SCCNXP platform data structure */
80struct sccnxp_pdata {
81 /* Frequency (extrenal clock or crystal) */
82 int frequency;
83 /* Shift for A0 line */
84 const u8 reg_shift;
85 /* Modem control lines configuration */
86 const u32 mctrl_cfg[SCCNXP_MAX_UARTS];
87 /* Called during startup */
88 void (*init)(void);
89 /* Called before finish */
90 void (*exit)(void);
91};
92
93#endif
diff --git a/include/linux/platform_data/spi-omap2-mcspi.h b/include/linux/platform_data/spi-omap2-mcspi.h
new file mode 100644
index 000000000000..a357eb26bd25
--- /dev/null
+++ b/include/linux/platform_data/spi-omap2-mcspi.h
@@ -0,0 +1,23 @@
1#ifndef _OMAP2_MCSPI_H
2#define _OMAP2_MCSPI_H
3
4#define OMAP2_MCSPI_REV 0
5#define OMAP3_MCSPI_REV 1
6#define OMAP4_MCSPI_REV 2
7
8#define OMAP4_MCSPI_REG_OFFSET 0x100
9
10struct omap2_mcspi_platform_config {
11 unsigned short num_cs;
12 unsigned int regs_offset;
13};
14
15struct omap2_mcspi_dev_attr {
16 unsigned short num_chipselect;
17};
18
19struct omap2_mcspi_device_config {
20 unsigned turbo_mode:1;
21};
22
23#endif
diff --git a/include/linux/platform_data/voltage-omap.h b/include/linux/platform_data/voltage-omap.h
new file mode 100644
index 000000000000..5be4d5def427
--- /dev/null
+++ b/include/linux/platform_data/voltage-omap.h
@@ -0,0 +1,39 @@
1/*
2 * OMAP Voltage Management Routines
3 *
4 * Copyright (C) 2011, Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ARCH_ARM_OMAP_VOLTAGE_H
12#define __ARCH_ARM_OMAP_VOLTAGE_H
13
14/**
15 * struct omap_volt_data - Omap voltage specific data.
16 * @voltage_nominal: The possible voltage value in uV
17 * @sr_efuse_offs: The offset of the efuse register(from system
18 * control module base address) from where to read
19 * the n-target value for the smartreflex module.
20 * @sr_errminlimit: Error min limit value for smartreflex. This value
21 * differs at differnet opp and thus is linked
22 * with voltage.
23 * @vp_errorgain: Error gain value for the voltage processor. This
24 * field also differs according to the voltage/opp.
25 */
26struct omap_volt_data {
27 u32 volt_nominal;
28 u32 sr_efuse_offs;
29 u8 sr_errminlimit;
30 u8 vp_errgain;
31};
32struct voltagedomain;
33
34struct voltagedomain *voltdm_lookup(const char *name);
35int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt);
36unsigned long voltdm_get_voltage(struct voltagedomain *voltdm);
37struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
38 unsigned long volt);
39#endif
diff --git a/include/linux/power/smartreflex.h b/include/linux/power/smartreflex.h
index 3101e62a1213..4a496ebc7d73 100644
--- a/include/linux/power/smartreflex.h
+++ b/include/linux/power/smartreflex.h
@@ -23,7 +23,7 @@
23#include <linux/types.h> 23#include <linux/types.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <plat/voltage.h> 26#include <linux/platform_data/voltage-omap.h>
27 27
28/* 28/*
29 * Different Smartreflex IPs version. The v1 is the 65nm version used in 29 * Different Smartreflex IPs version. The v1 is the 65nm version used in
diff --git a/include/linux/sc26198.h b/include/linux/sc26198.h
deleted file mode 100644
index 7ca35abad387..000000000000
--- a/include/linux/sc26198.h
+++ /dev/null
@@ -1,533 +0,0 @@
1/*****************************************************************************/
2
3/*
4 * sc26198.h -- SC26198 UART hardware info.
5 *
6 * Copyright (C) 1995-1998 Stallion Technologies
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23/*****************************************************************************/
24#ifndef _SC26198_H
25#define _SC26198_H
26/*****************************************************************************/
27
28/*
29 * Define the number of async ports per sc26198 uart device.
30 */
31#define SC26198_PORTS 8
32
33/*
34 * Baud rate timing clocks. All derived from a master 14.7456 MHz clock.
35 */
36#define SC26198_MASTERCLOCK 14745600L
37#define SC26198_DCLK (SC26198_MASTERCLOCK)
38#define SC26198_CCLK (SC26198_MASTERCLOCK / 2)
39#define SC26198_BCLK (SC26198_MASTERCLOCK / 4)
40
41/*
42 * Define internal FIFO sizes for the 26198 ports.
43 */
44#define SC26198_TXFIFOSIZE 16
45#define SC26198_RXFIFOSIZE 16
46
47/*****************************************************************************/
48
49/*
50 * Global register definitions. These registers are global to each 26198
51 * device, not specific ports on it.
52 */
53#define TSTR 0x0d
54#define GCCR 0x0f
55#define ICR 0x1b
56#define WDTRCR 0x1d
57#define IVR 0x1f
58#define BRGTRUA 0x84
59#define GPOSR 0x87
60#define GPOC 0x8b
61#define UCIR 0x8c
62#define CIR 0x8c
63#define BRGTRUB 0x8d
64#define GRXFIFO 0x8e
65#define GTXFIFO 0x8e
66#define GCCR2 0x8f
67#define BRGTRLA 0x94
68#define GPOR 0x97
69#define GPOD 0x9b
70#define BRGTCR 0x9c
71#define GICR 0x9c
72#define BRGTRLB 0x9d
73#define GIBCR 0x9d
74#define GITR 0x9f
75
76/*
77 * Per port channel registers. These are the register offsets within
78 * the port address space, so need to have the port address (0 to 7)
79 * inserted in bit positions 4:6.
80 */
81#define MR0 0x00
82#define MR1 0x01
83#define IOPCR 0x02
84#define BCRBRK 0x03
85#define BCRCOS 0x04
86#define BCRX 0x06
87#define BCRA 0x07
88#define XONCR 0x08
89#define XOFFCR 0x09
90#define ARCR 0x0a
91#define RXCSR 0x0c
92#define TXCSR 0x0e
93#define MR2 0x80
94#define SR 0x81
95#define SCCR 0x81
96#define ISR 0x82
97#define IMR 0x82
98#define TXFIFO 0x83
99#define RXFIFO 0x83
100#define IPR 0x84
101#define IOPIOR 0x85
102#define XISR 0x86
103
104/*
105 * For any given port calculate the address to use to access a specified
106 * register. This is only used for unusual access, mostly this is done
107 * through the assembler access routines.
108 */
109#define SC26198_PORTREG(port,reg) ((((port) & 0x07) << 4) | (reg))
110
111/*****************************************************************************/
112
113/*
114 * Global configuration control register bit definitions.
115 */
116#define GCCR_NOACK 0x00
117#define GCCR_IVRACK 0x02
118#define GCCR_IVRCHANACK 0x04
119#define GCCR_IVRTYPCHANACK 0x06
120#define GCCR_ASYNCCYCLE 0x00
121#define GCCR_SYNCCYCLE 0x40
122
123/*****************************************************************************/
124
125/*
126 * Mode register 0 bit definitions.
127 */
128#define MR0_ADDRNONE 0x00
129#define MR0_AUTOWAKE 0x01
130#define MR0_AUTODOZE 0x02
131#define MR0_AUTOWAKEDOZE 0x03
132#define MR0_SWFNONE 0x00
133#define MR0_SWFTX 0x04
134#define MR0_SWFRX 0x08
135#define MR0_SWFRXTX 0x0c
136#define MR0_TXMASK 0x30
137#define MR0_TXEMPTY 0x00
138#define MR0_TXHIGH 0x10
139#define MR0_TXHALF 0x20
140#define MR0_TXRDY 0x00
141#define MR0_ADDRNT 0x00
142#define MR0_ADDRT 0x40
143#define MR0_SWFNT 0x00
144#define MR0_SWFT 0x80
145
146/*
147 * Mode register 1 bit definitions.
148 */
149#define MR1_CS5 0x00
150#define MR1_CS6 0x01
151#define MR1_CS7 0x02
152#define MR1_CS8 0x03
153#define MR1_PAREVEN 0x00
154#define MR1_PARODD 0x04
155#define MR1_PARENB 0x00
156#define MR1_PARFORCE 0x08
157#define MR1_PARNONE 0x10
158#define MR1_PARSPECIAL 0x18
159#define MR1_ERRCHAR 0x00
160#define MR1_ERRBLOCK 0x20
161#define MR1_ISRUNMASKED 0x00
162#define MR1_ISRMASKED 0x40
163#define MR1_AUTORTS 0x80
164
165/*
166 * Mode register 2 bit definitions.
167 */
168#define MR2_STOP1 0x00
169#define MR2_STOP15 0x01
170#define MR2_STOP2 0x02
171#define MR2_STOP916 0x03
172#define MR2_RXFIFORDY 0x00
173#define MR2_RXFIFOHALF 0x04
174#define MR2_RXFIFOHIGH 0x08
175#define MR2_RXFIFOFULL 0x0c
176#define MR2_AUTOCTS 0x10
177#define MR2_TXRTS 0x20
178#define MR2_MODENORM 0x00
179#define MR2_MODEAUTOECHO 0x40
180#define MR2_MODELOOP 0x80
181#define MR2_MODEREMECHO 0xc0
182
183/*****************************************************************************/
184
185/*
186 * Baud Rate Generator (BRG) selector values.
187 */
188#define BRG_50 0x00
189#define BRG_75 0x01
190#define BRG_150 0x02
191#define BRG_200 0x03
192#define BRG_300 0x04
193#define BRG_450 0x05
194#define BRG_600 0x06
195#define BRG_900 0x07
196#define BRG_1200 0x08
197#define BRG_1800 0x09
198#define BRG_2400 0x0a
199#define BRG_3600 0x0b
200#define BRG_4800 0x0c
201#define BRG_7200 0x0d
202#define BRG_9600 0x0e
203#define BRG_14400 0x0f
204#define BRG_19200 0x10
205#define BRG_28200 0x11
206#define BRG_38400 0x12
207#define BRG_57600 0x13
208#define BRG_115200 0x14
209#define BRG_230400 0x15
210#define BRG_GIN0 0x16
211#define BRG_GIN1 0x17
212#define BRG_CT0 0x18
213#define BRG_CT1 0x19
214#define BRG_RX2TX316 0x1b
215#define BRG_RX2TX31 0x1c
216
217#define SC26198_MAXBAUD 921600
218
219/*****************************************************************************/
220
221/*
222 * Command register command definitions.
223 */
224#define CR_NULL 0x04
225#define CR_ADDRNORMAL 0x0c
226#define CR_RXRESET 0x14
227#define CR_TXRESET 0x1c
228#define CR_CLEARRXERR 0x24
229#define CR_BREAKRESET 0x2c
230#define CR_TXSTARTBREAK 0x34
231#define CR_TXSTOPBREAK 0x3c
232#define CR_RTSON 0x44
233#define CR_RTSOFF 0x4c
234#define CR_ADDRINIT 0x5c
235#define CR_RXERRBLOCK 0x6c
236#define CR_TXSENDXON 0x84
237#define CR_TXSENDXOFF 0x8c
238#define CR_GANGXONSET 0x94
239#define CR_GANGXOFFSET 0x9c
240#define CR_GANGXONINIT 0xa4
241#define CR_GANGXOFFINIT 0xac
242#define CR_HOSTXON 0xb4
243#define CR_HOSTXOFF 0xbc
244#define CR_CANCELXOFF 0xc4
245#define CR_ADDRRESET 0xdc
246#define CR_RESETALLPORTS 0xf4
247#define CR_RESETALL 0xfc
248
249#define CR_RXENABLE 0x01
250#define CR_TXENABLE 0x02
251
252/*****************************************************************************/
253
254/*
255 * Channel status register.
256 */
257#define SR_RXRDY 0x01
258#define SR_RXFULL 0x02
259#define SR_TXRDY 0x04
260#define SR_TXEMPTY 0x08
261#define SR_RXOVERRUN 0x10
262#define SR_RXPARITY 0x20
263#define SR_RXFRAMING 0x40
264#define SR_RXBREAK 0x80
265
266#define SR_RXERRS (SR_RXPARITY | SR_RXFRAMING | SR_RXOVERRUN)
267
268/*****************************************************************************/
269
270/*
271 * Interrupt status register and interrupt mask register bit definitions.
272 */
273#define IR_TXRDY 0x01
274#define IR_RXRDY 0x02
275#define IR_RXBREAK 0x04
276#define IR_XONXOFF 0x10
277#define IR_ADDRRECOG 0x20
278#define IR_RXWATCHDOG 0x40
279#define IR_IOPORT 0x80
280
281/*****************************************************************************/
282
283/*
284 * Interrupt vector register field definitions.
285 */
286#define IVR_CHANMASK 0x07
287#define IVR_TYPEMASK 0x18
288#define IVR_CONSTMASK 0xc0
289
290#define IVR_RXDATA 0x10
291#define IVR_RXBADDATA 0x18
292#define IVR_TXDATA 0x08
293#define IVR_OTHER 0x00
294
295/*****************************************************************************/
296
297/*
298 * BRG timer control register bit definitions.
299 */
300#define BRGCTCR_DISABCLK0 0x00
301#define BRGCTCR_ENABCLK0 0x08
302#define BRGCTCR_DISABCLK1 0x00
303#define BRGCTCR_ENABCLK1 0x80
304
305#define BRGCTCR_0SCLK16 0x00
306#define BRGCTCR_0SCLK32 0x01
307#define BRGCTCR_0SCLK64 0x02
308#define BRGCTCR_0SCLK128 0x03
309#define BRGCTCR_0X1 0x04
310#define BRGCTCR_0X12 0x05
311#define BRGCTCR_0IO1A 0x06
312#define BRGCTCR_0GIN0 0x07
313
314#define BRGCTCR_1SCLK16 0x00
315#define BRGCTCR_1SCLK32 0x10
316#define BRGCTCR_1SCLK64 0x20
317#define BRGCTCR_1SCLK128 0x30
318#define BRGCTCR_1X1 0x40
319#define BRGCTCR_1X12 0x50
320#define BRGCTCR_1IO1B 0x60
321#define BRGCTCR_1GIN1 0x70
322
323/*****************************************************************************/
324
325/*
326 * Watch dog timer enable register.
327 */
328#define WDTRCR_ENABALL 0xff
329
330/*****************************************************************************/
331
332/*
333 * XON/XOFF interrupt status register.
334 */
335#define XISR_TXCHARMASK 0x03
336#define XISR_TXCHARNORMAL 0x00
337#define XISR_TXWAIT 0x01
338#define XISR_TXXOFFPEND 0x02
339#define XISR_TXXONPEND 0x03
340
341#define XISR_TXFLOWMASK 0x0c
342#define XISR_TXNORMAL 0x00
343#define XISR_TXSTOPPEND 0x04
344#define XISR_TXSTARTED 0x08
345#define XISR_TXSTOPPED 0x0c
346
347#define XISR_RXFLOWMASK 0x30
348#define XISR_RXFLOWNONE 0x00
349#define XISR_RXXONSENT 0x10
350#define XISR_RXXOFFSENT 0x20
351
352#define XISR_RXXONGOT 0x40
353#define XISR_RXXOFFGOT 0x80
354
355/*****************************************************************************/
356
357/*
358 * Current interrupt register.
359 */
360#define CIR_TYPEMASK 0xc0
361#define CIR_TYPEOTHER 0x00
362#define CIR_TYPETX 0x40
363#define CIR_TYPERXGOOD 0x80
364#define CIR_TYPERXBAD 0xc0
365
366#define CIR_RXDATA 0x80
367#define CIR_RXBADDATA 0x40
368#define CIR_TXDATA 0x40
369
370#define CIR_CHANMASK 0x07
371#define CIR_CNTMASK 0x38
372
373#define CIR_SUBTYPEMASK 0x38
374#define CIR_SUBNONE 0x00
375#define CIR_SUBCOS 0x08
376#define CIR_SUBADDR 0x10
377#define CIR_SUBXONXOFF 0x18
378#define CIR_SUBBREAK 0x28
379
380/*****************************************************************************/
381
382/*
383 * Global interrupting channel register.
384 */
385#define GICR_CHANMASK 0x07
386
387/*****************************************************************************/
388
389/*
390 * Global interrupting byte count register.
391 */
392#define GICR_COUNTMASK 0x0f
393
394/*****************************************************************************/
395
396/*
397 * Global interrupting type register.
398 */
399#define GITR_RXMASK 0xc0
400#define GITR_RXNONE 0x00
401#define GITR_RXBADDATA 0x80
402#define GITR_RXGOODDATA 0xc0
403#define GITR_TXDATA 0x20
404
405#define GITR_SUBTYPEMASK 0x07
406#define GITR_SUBNONE 0x00
407#define GITR_SUBCOS 0x01
408#define GITR_SUBADDR 0x02
409#define GITR_SUBXONXOFF 0x03
410#define GITR_SUBBREAK 0x05
411
412/*****************************************************************************/
413
414/*
415 * Input port change register.
416 */
417#define IPR_CTS 0x01
418#define IPR_DTR 0x02
419#define IPR_RTS 0x04
420#define IPR_DCD 0x08
421#define IPR_CTSCHANGE 0x10
422#define IPR_DTRCHANGE 0x20
423#define IPR_RTSCHANGE 0x40
424#define IPR_DCDCHANGE 0x80
425
426#define IPR_CHANGEMASK 0xf0
427
428/*****************************************************************************/
429
430/*
431 * IO port interrupt and output register.
432 */
433#define IOPR_CTS 0x01
434#define IOPR_DTR 0x02
435#define IOPR_RTS 0x04
436#define IOPR_DCD 0x08
437#define IOPR_CTSCOS 0x10
438#define IOPR_DTRCOS 0x20
439#define IOPR_RTSCOS 0x40
440#define IOPR_DCDCOS 0x80
441
442/*****************************************************************************/
443
444/*
445 * IO port configuration register.
446 */
447#define IOPCR_SETCTS 0x00
448#define IOPCR_SETDTR 0x04
449#define IOPCR_SETRTS 0x10
450#define IOPCR_SETDCD 0x00
451
452#define IOPCR_SETSIGS (IOPCR_SETRTS | IOPCR_SETRTS | IOPCR_SETDTR | IOPCR_SETDCD)
453
454/*****************************************************************************/
455
456/*
457 * General purpose output select register.
458 */
459#define GPORS_TXC1XA 0x08
460#define GPORS_TXC16XA 0x09
461#define GPORS_RXC16XA 0x0a
462#define GPORS_TXC16XB 0x0b
463#define GPORS_GPOR3 0x0c
464#define GPORS_GPOR2 0x0d
465#define GPORS_GPOR1 0x0e
466#define GPORS_GPOR0 0x0f
467
468/*****************************************************************************/
469
470/*
471 * General purpose output register.
472 */
473#define GPOR_0 0x01
474#define GPOR_1 0x02
475#define GPOR_2 0x04
476#define GPOR_3 0x08
477
478/*****************************************************************************/
479
480/*
481 * General purpose output clock register.
482 */
483#define GPORC_0NONE 0x00
484#define GPORC_0GIN0 0x01
485#define GPORC_0GIN1 0x02
486#define GPORC_0IO3A 0x02
487
488#define GPORC_1NONE 0x00
489#define GPORC_1GIN0 0x04
490#define GPORC_1GIN1 0x08
491#define GPORC_1IO3C 0x0c
492
493#define GPORC_2NONE 0x00
494#define GPORC_2GIN0 0x10
495#define GPORC_2GIN1 0x20
496#define GPORC_2IO3E 0x20
497
498#define GPORC_3NONE 0x00
499#define GPORC_3GIN0 0x40
500#define GPORC_3GIN1 0x80
501#define GPORC_3IO3G 0xc0
502
503/*****************************************************************************/
504
505/*
506 * General purpose output data register.
507 */
508#define GPOD_0MASK 0x03
509#define GPOD_0SET1 0x00
510#define GPOD_0SET0 0x01
511#define GPOD_0SETR0 0x02
512#define GPOD_0SETIO3B 0x03
513
514#define GPOD_1MASK 0x0c
515#define GPOD_1SET1 0x00
516#define GPOD_1SET0 0x04
517#define GPOD_1SETR0 0x08
518#define GPOD_1SETIO3D 0x0c
519
520#define GPOD_2MASK 0x30
521#define GPOD_2SET1 0x00
522#define GPOD_2SET0 0x10
523#define GPOD_2SETR0 0x20
524#define GPOD_2SETIO3F 0x30
525
526#define GPOD_3MASK 0xc0
527#define GPOD_3SET1 0x00
528#define GPOD_3SET0 0x40
529#define GPOD_3SETR0 0x80
530#define GPOD_3SETIO3H 0xc0
531
532/*****************************************************************************/
533#endif
diff --git a/include/linux/serial.h b/include/linux/serial.h
index 90e9f981358a..861e51de476b 100644
--- a/include/linux/serial.h
+++ b/include/linux/serial.h
@@ -12,9 +12,12 @@
12 12
13#include <linux/types.h> 13#include <linux/types.h>
14 14
15#include <linux/tty_flags.h>
16
15#ifdef __KERNEL__ 17#ifdef __KERNEL__
16#include <asm/page.h> 18#include <asm/page.h>
17 19
20
18/* 21/*
19 * Counters of the input lines (CTS, DSR, RI, CD) interrupts 22 * Counters of the input lines (CTS, DSR, RI, CD) interrupts
20 */ 23 */
@@ -83,89 +86,11 @@ struct serial_struct {
83#define SERIAL_IO_HUB6 1 86#define SERIAL_IO_HUB6 1
84#define SERIAL_IO_MEM 2 87#define SERIAL_IO_MEM 2
85 88
86struct serial_uart_config {
87 char *name;
88 int dfl_xmit_fifo_size;
89 int flags;
90};
91
92#define UART_CLEAR_FIFO 0x01 89#define UART_CLEAR_FIFO 0x01
93#define UART_USE_FIFO 0x02 90#define UART_USE_FIFO 0x02
94#define UART_STARTECH 0x04 91#define UART_STARTECH 0x04
95#define UART_NATSEMI 0x08 92#define UART_NATSEMI 0x08
96 93
97/*
98 * Definitions for async_struct (and serial_struct) flags field
99 *
100 * Define ASYNCB_* for convenient use with {test,set,clear}_bit.
101 */
102#define ASYNCB_HUP_NOTIFY 0 /* Notify getty on hangups and closes
103 * on the callout port */
104#define ASYNCB_FOURPORT 1 /* Set OU1, OUT2 per AST Fourport settings */
105#define ASYNCB_SAK 2 /* Secure Attention Key (Orange book) */
106#define ASYNCB_SPLIT_TERMIOS 3 /* Separate termios for dialin/callout */
107#define ASYNCB_SPD_HI 4 /* Use 56000 instead of 38400 bps */
108#define ASYNCB_SPD_VHI 5 /* Use 115200 instead of 38400 bps */
109#define ASYNCB_SKIP_TEST 6 /* Skip UART test during autoconfiguration */
110#define ASYNCB_AUTO_IRQ 7 /* Do automatic IRQ during
111 * autoconfiguration */
112#define ASYNCB_SESSION_LOCKOUT 8 /* Lock out cua opens based on session */
113#define ASYNCB_PGRP_LOCKOUT 9 /* Lock out cua opens based on pgrp */
114#define ASYNCB_CALLOUT_NOHUP 10 /* Don't do hangups for cua device */
115#define ASYNCB_HARDPPS_CD 11 /* Call hardpps when CD goes high */
116#define ASYNCB_SPD_SHI 12 /* Use 230400 instead of 38400 bps */
117#define ASYNCB_LOW_LATENCY 13 /* Request low latency behaviour */
118#define ASYNCB_BUGGY_UART 14 /* This is a buggy UART, skip some safety
119 * checks. Note: can be dangerous! */
120#define ASYNCB_AUTOPROBE 15 /* Port was autoprobed by PCI or PNP code */
121#define ASYNCB_LAST_USER 15
122
123/* Internal flags used only by kernel */
124#define ASYNCB_INITIALIZED 31 /* Serial port was initialized */
125#define ASYNCB_SUSPENDED 30 /* Serial port is suspended */
126#define ASYNCB_NORMAL_ACTIVE 29 /* Normal device is active */
127#define ASYNCB_BOOT_AUTOCONF 28 /* Autoconfigure port on bootup */
128#define ASYNCB_CLOSING 27 /* Serial port is closing */
129#define ASYNCB_CTS_FLOW 26 /* Do CTS flow control */
130#define ASYNCB_CHECK_CD 25 /* i.e., CLOCAL */
131#define ASYNCB_SHARE_IRQ 24 /* for multifunction cards, no longer used */
132#define ASYNCB_CONS_FLOW 23 /* flow control for console */
133#define ASYNCB_FIRST_KERNEL 22
134
135#define ASYNC_HUP_NOTIFY (1U << ASYNCB_HUP_NOTIFY)
136#define ASYNC_SUSPENDED (1U << ASYNCB_SUSPENDED)
137#define ASYNC_FOURPORT (1U << ASYNCB_FOURPORT)
138#define ASYNC_SAK (1U << ASYNCB_SAK)
139#define ASYNC_SPLIT_TERMIOS (1U << ASYNCB_SPLIT_TERMIOS)
140#define ASYNC_SPD_HI (1U << ASYNCB_SPD_HI)
141#define ASYNC_SPD_VHI (1U << ASYNCB_SPD_VHI)
142#define ASYNC_SKIP_TEST (1U << ASYNCB_SKIP_TEST)
143#define ASYNC_AUTO_IRQ (1U << ASYNCB_AUTO_IRQ)
144#define ASYNC_SESSION_LOCKOUT (1U << ASYNCB_SESSION_LOCKOUT)
145#define ASYNC_PGRP_LOCKOUT (1U << ASYNCB_PGRP_LOCKOUT)
146#define ASYNC_CALLOUT_NOHUP (1U << ASYNCB_CALLOUT_NOHUP)
147#define ASYNC_HARDPPS_CD (1U << ASYNCB_HARDPPS_CD)
148#define ASYNC_SPD_SHI (1U << ASYNCB_SPD_SHI)
149#define ASYNC_LOW_LATENCY (1U << ASYNCB_LOW_LATENCY)
150#define ASYNC_BUGGY_UART (1U << ASYNCB_BUGGY_UART)
151#define ASYNC_AUTOPROBE (1U << ASYNCB_AUTOPROBE)
152
153#define ASYNC_FLAGS ((1U << (ASYNCB_LAST_USER + 1)) - 1)
154#define ASYNC_USR_MASK (ASYNC_SPD_MASK|ASYNC_CALLOUT_NOHUP| \
155 ASYNC_LOW_LATENCY)
156#define ASYNC_SPD_CUST (ASYNC_SPD_HI|ASYNC_SPD_VHI)
157#define ASYNC_SPD_WARP (ASYNC_SPD_HI|ASYNC_SPD_SHI)
158#define ASYNC_SPD_MASK (ASYNC_SPD_HI|ASYNC_SPD_VHI|ASYNC_SPD_SHI)
159
160#define ASYNC_INITIALIZED (1U << ASYNCB_INITIALIZED)
161#define ASYNC_NORMAL_ACTIVE (1U << ASYNCB_NORMAL_ACTIVE)
162#define ASYNC_BOOT_AUTOCONF (1U << ASYNCB_BOOT_AUTOCONF)
163#define ASYNC_CLOSING (1U << ASYNCB_CLOSING)
164#define ASYNC_CTS_FLOW (1U << ASYNCB_CTS_FLOW)
165#define ASYNC_CHECK_CD (1U << ASYNCB_CHECK_CD)
166#define ASYNC_SHARE_IRQ (1U << ASYNCB_SHARE_IRQ)
167#define ASYNC_CONS_FLOW (1U << ASYNCB_CONS_FLOW)
168#define ASYNC_INTERNAL_FLAGS (~((1U << ASYNCB_FIRST_KERNEL) - 1))
169 94
170/* 95/*
171 * Multiport serial configuration structure --- external structure 96 * Multiport serial configuration structure --- external structure
diff --git a/include/linux/serial167.h b/include/linux/serial167.h
deleted file mode 100644
index 59c81b708562..000000000000
--- a/include/linux/serial167.h
+++ /dev/null
@@ -1,157 +0,0 @@
1/*
2 * serial167.h
3 *
4 * Richard Hirst [richard@sleepie.demon.co.uk]
5 *
6 * Based on cyclades.h
7 */
8
9struct cyclades_monitor {
10 unsigned long int_count;
11 unsigned long char_count;
12 unsigned long char_max;
13 unsigned long char_last;
14};
15
16/*
17 * This is our internal structure for each serial port's state.
18 *
19 * Many fields are paralleled by the structure used by the serial_struct
20 * structure.
21 *
22 * For definitions of the flags field, see tty.h
23 */
24
25struct cyclades_port {
26 int magic;
27 int type;
28 int card;
29 int line;
30 int flags; /* defined in tty.h */
31 struct tty_struct *tty;
32 int read_status_mask;
33 int timeout;
34 int xmit_fifo_size;
35 int cor1,cor2,cor3,cor4,cor5,cor6,cor7;
36 int tbpr,tco,rbpr,rco;
37 int ignore_status_mask;
38 int close_delay;
39 int IER; /* Interrupt Enable Register */
40 unsigned long last_active;
41 int count; /* # of fd on device */
42 int x_char; /* to be pushed out ASAP */
43 int x_break;
44 int blocked_open; /* # of blocked opens */
45 unsigned char *xmit_buf;
46 int xmit_head;
47 int xmit_tail;
48 int xmit_cnt;
49 int default_threshold;
50 int default_timeout;
51 wait_queue_head_t open_wait;
52 wait_queue_head_t close_wait;
53 struct cyclades_monitor mon;
54};
55
56#define CYCLADES_MAGIC 0x4359
57
58#define CYGETMON 0x435901
59#define CYGETTHRESH 0x435902
60#define CYSETTHRESH 0x435903
61#define CYGETDEFTHRESH 0x435904
62#define CYSETDEFTHRESH 0x435905
63#define CYGETTIMEOUT 0x435906
64#define CYSETTIMEOUT 0x435907
65#define CYGETDEFTIMEOUT 0x435908
66#define CYSETDEFTIMEOUT 0x435909
67
68#define CyMaxChipsPerCard 1
69
70/**** cd2401 registers ****/
71
72#define CyGFRCR (0x81)
73#define CyCCR (0x13)
74#define CyCLR_CHAN (0x40)
75#define CyINIT_CHAN (0x20)
76#define CyCHIP_RESET (0x10)
77#define CyENB_XMTR (0x08)
78#define CyDIS_XMTR (0x04)
79#define CyENB_RCVR (0x02)
80#define CyDIS_RCVR (0x01)
81#define CyCAR (0xee)
82#define CyIER (0x11)
83#define CyMdmCh (0x80)
84#define CyRxExc (0x20)
85#define CyRxData (0x08)
86#define CyTxMpty (0x02)
87#define CyTxRdy (0x01)
88#define CyLICR (0x26)
89#define CyRISR (0x89)
90#define CyTIMEOUT (0x80)
91#define CySPECHAR (0x70)
92#define CyOVERRUN (0x08)
93#define CyPARITY (0x04)
94#define CyFRAME (0x02)
95#define CyBREAK (0x01)
96#define CyREOIR (0x84)
97#define CyTEOIR (0x85)
98#define CyMEOIR (0x86)
99#define CyNOTRANS (0x08)
100#define CyRFOC (0x30)
101#define CyRDR (0xf8)
102#define CyTDR (0xf8)
103#define CyMISR (0x8b)
104#define CyRISR (0x89)
105#define CyTISR (0x8a)
106#define CyMSVR1 (0xde)
107#define CyMSVR2 (0xdf)
108#define CyDSR (0x80)
109#define CyDCD (0x40)
110#define CyCTS (0x20)
111#define CyDTR (0x02)
112#define CyRTS (0x01)
113#define CyRTPRL (0x25)
114#define CyRTPRH (0x24)
115#define CyCOR1 (0x10)
116#define CyPARITY_NONE (0x00)
117#define CyPARITY_E (0x40)
118#define CyPARITY_O (0xC0)
119#define Cy_5_BITS (0x04)
120#define Cy_6_BITS (0x05)
121#define Cy_7_BITS (0x06)
122#define Cy_8_BITS (0x07)
123#define CyCOR2 (0x17)
124#define CyETC (0x20)
125#define CyCtsAE (0x02)
126#define CyCOR3 (0x16)
127#define Cy_1_STOP (0x02)
128#define Cy_2_STOP (0x04)
129#define CyCOR4 (0x15)
130#define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
131#define CyCOR5 (0x14)
132#define CyCOR6 (0x18)
133#define CyCOR7 (0x07)
134#define CyRBPR (0xcb)
135#define CyRCOR (0xc8)
136#define CyTBPR (0xc3)
137#define CyTCOR (0xc0)
138#define CySCHR1 (0x1f)
139#define CySCHR2 (0x1e)
140#define CyTPR (0xda)
141#define CyPILR1 (0xe3)
142#define CyPILR2 (0xe0)
143#define CyPILR3 (0xe1)
144#define CyCMR (0x1b)
145#define CyASYNC (0x02)
146#define CyLICR (0x26)
147#define CyLIVR (0x09)
148#define CySCRL (0x23)
149#define CySCRH (0x22)
150#define CyTFTC (0x80)
151
152
153/* max number of chars in the FIFO */
154
155#define CyMAX_CHAR_FIFO 12
156
157/***************************************************************************/
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index a416e92012ef..c174c90fb3fb 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -65,11 +65,38 @@ enum {
65 * platform device. Using these will make your driver 65 * platform device. Using these will make your driver
66 * dependent on the 8250 driver. 66 * dependent on the 8250 driver.
67 */ 67 */
68struct uart_port; 68
69struct uart_8250_port; 69struct uart_8250_port {
70 struct uart_port port;
71 struct timer_list timer; /* "no irq" timer */
72 struct list_head list; /* ports on this IRQ */
73 unsigned short capabilities; /* port capabilities */
74 unsigned short bugs; /* port bugs */
75 unsigned int tx_loadsz; /* transmit fifo load size */
76 unsigned char acr;
77 unsigned char ier;
78 unsigned char lcr;
79 unsigned char mcr;
80 unsigned char mcr_mask; /* mask of user bits */
81 unsigned char mcr_force; /* mask of forced bits */
82 unsigned char cur_iotype; /* Running I/O type */
83
84 /*
85 * Some bits in registers are cleared on a read, so they must
86 * be saved whenever the register is read but the bits will not
87 * be immediately processed.
88 */
89#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
90 unsigned char lsr_saved_flags;
91#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
92 unsigned char msr_saved_flags;
93
94 /* 8250 specific callbacks */
95 int (*dl_read)(struct uart_8250_port *);
96 void (*dl_write)(struct uart_8250_port *, int);
97};
70 98
71int serial8250_register_8250_port(struct uart_8250_port *); 99int serial8250_register_8250_port(struct uart_8250_port *);
72int serial8250_register_port(struct uart_port *);
73void serial8250_unregister_port(int line); 100void serial8250_unregister_port(int line);
74void serial8250_suspend_port(int line); 101void serial8250_suspend_port(int line);
75void serial8250_resume_port(int line); 102void serial8250_resume_port(int line);
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 0253c2022e53..7cf0b68bbe9e 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -193,8 +193,8 @@
193/* SH-SCI */ 193/* SH-SCI */
194#define PORT_SCIFB 93 194#define PORT_SCIFB 93
195 195
196/* MAX3107 */ 196/* MAX310X */
197#define PORT_MAX3107 94 197#define PORT_MAX310X 94
198 198
199/* High Speed UART for Medfield */ 199/* High Speed UART for Medfield */
200#define PORT_MFD 95 200#define PORT_MFD 95
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h
index 8ce70d76f836..5ed325e88a81 100644
--- a/include/linux/serial_reg.h
+++ b/include/linux/serial_reg.h
@@ -40,6 +40,10 @@
40 40
41#define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */ 41#define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */
42 42
43#define UART_IIR_RX_TIMEOUT 0x0c /* OMAP RX Timeout interrupt */
44#define UART_IIR_XOFF 0x10 /* OMAP XOFF/Special Character */
45#define UART_IIR_CTS_RTS_DSR 0x20 /* OMAP CTS/RTS/DSR Change */
46
43#define UART_FCR 2 /* Out: FIFO Control Register */ 47#define UART_FCR 2 /* Out: FIFO Control Register */
44#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ 48#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */
45#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ 49#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
diff --git a/include/linux/stallion.h b/include/linux/stallion.h
deleted file mode 100644
index 336af33c6ea4..000000000000
--- a/include/linux/stallion.h
+++ /dev/null
@@ -1,147 +0,0 @@
1/*****************************************************************************/
2
3/*
4 * stallion.h -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1998 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24/*****************************************************************************/
25#ifndef _STALLION_H
26#define _STALLION_H
27/*****************************************************************************/
28
29/*
30 * Define important driver constants here.
31 */
32#define STL_MAXBRDS 4
33#define STL_MAXPANELS 4
34#define STL_MAXBANKS 8
35#define STL_PORTSPERPANEL 16
36#define STL_MAXPORTS 64
37#define STL_MAXDEVS (STL_MAXBRDS * STL_MAXPORTS)
38
39
40/*
41 * Define a set of structures to hold all the board/panel/port info
42 * for our ports. These will be dynamically allocated as required.
43 */
44
45/*
46 * Define a ring queue structure for each port. This will hold the
47 * TX data waiting to be output. Characters are fed into this buffer
48 * from the line discipline (or even direct from user space!) and
49 * then fed into the UARTs during interrupts. Will use a classic ring
50 * queue here for this. The good thing about this type of ring queue
51 * is that the head and tail pointers can be updated without interrupt
52 * protection - since "write" code only needs to change the head, and
53 * interrupt code only needs to change the tail.
54 */
55struct stlrq {
56 char *buf;
57 char *head;
58 char *tail;
59};
60
61/*
62 * Port, panel and board structures to hold status info about each.
63 * The board structure contains pointers to structures for each panel
64 * connected to it, and in turn each panel structure contains pointers
65 * for each port structure for each port on that panel. Note that
66 * the port structure also contains the board and panel number that it
67 * is associated with, this makes it (fairly) easy to get back to the
68 * board/panel info for a port.
69 */
70struct stlport {
71 unsigned long magic;
72 struct tty_port port;
73 unsigned int portnr;
74 unsigned int panelnr;
75 unsigned int brdnr;
76 int ioaddr;
77 int uartaddr;
78 unsigned int pagenr;
79 unsigned long istate;
80 int baud_base;
81 int custom_divisor;
82 int close_delay;
83 int closing_wait;
84 int openwaitcnt;
85 int brklen;
86 unsigned int sigs;
87 unsigned int rxignoremsk;
88 unsigned int rxmarkmsk;
89 unsigned int imr;
90 unsigned int crenable;
91 unsigned long clk;
92 unsigned long hwid;
93 void *uartp;
94 comstats_t stats;
95 struct stlrq tx;
96};
97
98struct stlpanel {
99 unsigned long magic;
100 unsigned int panelnr;
101 unsigned int brdnr;
102 unsigned int pagenr;
103 unsigned int nrports;
104 int iobase;
105 void *uartp;
106 void (*isr)(struct stlpanel *panelp, unsigned int iobase);
107 unsigned int hwid;
108 unsigned int ackmask;
109 struct stlport *ports[STL_PORTSPERPANEL];
110};
111
112struct stlbrd {
113 unsigned long magic;
114 unsigned int brdnr;
115 unsigned int brdtype;
116 unsigned int state;
117 unsigned int nrpanels;
118 unsigned int nrports;
119 unsigned int nrbnks;
120 int irq;
121 int irqtype;
122 int (*isr)(struct stlbrd *brdp);
123 unsigned int ioaddr1;
124 unsigned int ioaddr2;
125 unsigned int iosize1;
126 unsigned int iosize2;
127 unsigned int iostatus;
128 unsigned int ioctrl;
129 unsigned int ioctrlval;
130 unsigned int hwid;
131 unsigned long clk;
132 unsigned int bnkpageaddr[STL_MAXBANKS];
133 unsigned int bnkstataddr[STL_MAXBANKS];
134 struct stlpanel *bnk2panel[STL_MAXBANKS];
135 struct stlpanel *panels[STL_MAXPANELS];
136};
137
138
139/*
140 * Define MAGIC numbers used for above structures.
141 */
142#define STL_PORTMAGIC 0x5a7182c9
143#define STL_PANELMAGIC 0x7ef621a1
144#define STL_BOARDMAGIC 0xa2267f52
145
146/*****************************************************************************/
147#endif
diff --git a/include/linux/tty.h b/include/linux/tty.h
index 9f47ab540f65..1509b86825d8 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -43,6 +43,7 @@
43#include <linux/tty_driver.h> 43#include <linux/tty_driver.h>
44#include <linux/tty_ldisc.h> 44#include <linux/tty_ldisc.h>
45#include <linux/mutex.h> 45#include <linux/mutex.h>
46#include <linux/tty_flags.h>
46 47
47 48
48 49
@@ -103,28 +104,28 @@ struct tty_bufhead {
103#define TTY_PARITY 3 104#define TTY_PARITY 3
104#define TTY_OVERRUN 4 105#define TTY_OVERRUN 4
105 106
106#define INTR_CHAR(tty) ((tty)->termios->c_cc[VINTR]) 107#define INTR_CHAR(tty) ((tty)->termios.c_cc[VINTR])
107#define QUIT_CHAR(tty) ((tty)->termios->c_cc[VQUIT]) 108#define QUIT_CHAR(tty) ((tty)->termios.c_cc[VQUIT])
108#define ERASE_CHAR(tty) ((tty)->termios->c_cc[VERASE]) 109#define ERASE_CHAR(tty) ((tty)->termios.c_cc[VERASE])
109#define KILL_CHAR(tty) ((tty)->termios->c_cc[VKILL]) 110#define KILL_CHAR(tty) ((tty)->termios.c_cc[VKILL])
110#define EOF_CHAR(tty) ((tty)->termios->c_cc[VEOF]) 111#define EOF_CHAR(tty) ((tty)->termios.c_cc[VEOF])
111#define TIME_CHAR(tty) ((tty)->termios->c_cc[VTIME]) 112#define TIME_CHAR(tty) ((tty)->termios.c_cc[VTIME])
112#define MIN_CHAR(tty) ((tty)->termios->c_cc[VMIN]) 113#define MIN_CHAR(tty) ((tty)->termios.c_cc[VMIN])
113#define SWTC_CHAR(tty) ((tty)->termios->c_cc[VSWTC]) 114#define SWTC_CHAR(tty) ((tty)->termios.c_cc[VSWTC])
114#define START_CHAR(tty) ((tty)->termios->c_cc[VSTART]) 115#define START_CHAR(tty) ((tty)->termios.c_cc[VSTART])
115#define STOP_CHAR(tty) ((tty)->termios->c_cc[VSTOP]) 116#define STOP_CHAR(tty) ((tty)->termios.c_cc[VSTOP])
116#define SUSP_CHAR(tty) ((tty)->termios->c_cc[VSUSP]) 117#define SUSP_CHAR(tty) ((tty)->termios.c_cc[VSUSP])
117#define EOL_CHAR(tty) ((tty)->termios->c_cc[VEOL]) 118#define EOL_CHAR(tty) ((tty)->termios.c_cc[VEOL])
118#define REPRINT_CHAR(tty) ((tty)->termios->c_cc[VREPRINT]) 119#define REPRINT_CHAR(tty) ((tty)->termios.c_cc[VREPRINT])
119#define DISCARD_CHAR(tty) ((tty)->termios->c_cc[VDISCARD]) 120#define DISCARD_CHAR(tty) ((tty)->termios.c_cc[VDISCARD])
120#define WERASE_CHAR(tty) ((tty)->termios->c_cc[VWERASE]) 121#define WERASE_CHAR(tty) ((tty)->termios.c_cc[VWERASE])
121#define LNEXT_CHAR(tty) ((tty)->termios->c_cc[VLNEXT]) 122#define LNEXT_CHAR(tty) ((tty)->termios.c_cc[VLNEXT])
122#define EOL2_CHAR(tty) ((tty)->termios->c_cc[VEOL2]) 123#define EOL2_CHAR(tty) ((tty)->termios.c_cc[VEOL2])
123 124
124#define _I_FLAG(tty, f) ((tty)->termios->c_iflag & (f)) 125#define _I_FLAG(tty, f) ((tty)->termios.c_iflag & (f))
125#define _O_FLAG(tty, f) ((tty)->termios->c_oflag & (f)) 126#define _O_FLAG(tty, f) ((tty)->termios.c_oflag & (f))
126#define _C_FLAG(tty, f) ((tty)->termios->c_cflag & (f)) 127#define _C_FLAG(tty, f) ((tty)->termios.c_cflag & (f))
127#define _L_FLAG(tty, f) ((tty)->termios->c_lflag & (f)) 128#define _L_FLAG(tty, f) ((tty)->termios.c_lflag & (f))
128 129
129#define I_IGNBRK(tty) _I_FLAG((tty), IGNBRK) 130#define I_IGNBRK(tty) _I_FLAG((tty), IGNBRK)
130#define I_BRKINT(tty) _I_FLAG((tty), BRKINT) 131#define I_BRKINT(tty) _I_FLAG((tty), BRKINT)
@@ -268,10 +269,11 @@ struct tty_struct {
268 struct mutex ldisc_mutex; 269 struct mutex ldisc_mutex;
269 struct tty_ldisc *ldisc; 270 struct tty_ldisc *ldisc;
270 271
272 struct mutex legacy_mutex;
271 struct mutex termios_mutex; 273 struct mutex termios_mutex;
272 spinlock_t ctrl_lock; 274 spinlock_t ctrl_lock;
273 /* Termios values are protected by the termios mutex */ 275 /* Termios values are protected by the termios mutex */
274 struct ktermios *termios, *termios_locked; 276 struct ktermios termios, termios_locked;
275 struct termiox *termiox; /* May be NULL for unsupported */ 277 struct termiox *termiox; /* May be NULL for unsupported */
276 char name[64]; 278 char name[64];
277 struct pid *pgrp; /* Protected by ctrl lock */ 279 struct pid *pgrp; /* Protected by ctrl lock */
@@ -410,6 +412,10 @@ extern int tty_register_driver(struct tty_driver *driver);
410extern int tty_unregister_driver(struct tty_driver *driver); 412extern int tty_unregister_driver(struct tty_driver *driver);
411extern struct device *tty_register_device(struct tty_driver *driver, 413extern struct device *tty_register_device(struct tty_driver *driver,
412 unsigned index, struct device *dev); 414 unsigned index, struct device *dev);
415extern struct device *tty_register_device_attr(struct tty_driver *driver,
416 unsigned index, struct device *device,
417 void *drvdata,
418 const struct attribute_group **attr_grp);
413extern void tty_unregister_device(struct tty_driver *driver, unsigned index); 419extern void tty_unregister_device(struct tty_driver *driver, unsigned index);
414extern int tty_read_raw_data(struct tty_struct *tty, unsigned char *bufp, 420extern int tty_read_raw_data(struct tty_struct *tty, unsigned char *bufp,
415 int buflen); 421 int buflen);
@@ -423,7 +429,6 @@ extern void tty_unthrottle(struct tty_struct *tty);
423extern int tty_do_resize(struct tty_struct *tty, struct winsize *ws); 429extern int tty_do_resize(struct tty_struct *tty, struct winsize *ws);
424extern void tty_driver_remove_tty(struct tty_driver *driver, 430extern void tty_driver_remove_tty(struct tty_driver *driver,
425 struct tty_struct *tty); 431 struct tty_struct *tty);
426extern void tty_shutdown(struct tty_struct *tty);
427extern void tty_free_termios(struct tty_struct *tty); 432extern void tty_free_termios(struct tty_struct *tty);
428extern int is_current_pgrp_orphaned(void); 433extern int is_current_pgrp_orphaned(void);
429extern struct pid *tty_get_pgrp(struct tty_struct *tty); 434extern struct pid *tty_get_pgrp(struct tty_struct *tty);
@@ -497,6 +502,15 @@ extern int tty_write_lock(struct tty_struct *tty, int ndelay);
497#define tty_is_writelocked(tty) (mutex_is_locked(&tty->atomic_write_lock)) 502#define tty_is_writelocked(tty) (mutex_is_locked(&tty->atomic_write_lock))
498 503
499extern void tty_port_init(struct tty_port *port); 504extern void tty_port_init(struct tty_port *port);
505extern void tty_port_link_device(struct tty_port *port,
506 struct tty_driver *driver, unsigned index);
507extern struct device *tty_port_register_device(struct tty_port *port,
508 struct tty_driver *driver, unsigned index,
509 struct device *device);
510extern struct device *tty_port_register_device_attr(struct tty_port *port,
511 struct tty_driver *driver, unsigned index,
512 struct device *device, void *drvdata,
513 const struct attribute_group **attr_grp);
500extern int tty_port_alloc_xmit_buf(struct tty_port *port); 514extern int tty_port_alloc_xmit_buf(struct tty_port *port);
501extern void tty_port_free_xmit_buf(struct tty_port *port); 515extern void tty_port_free_xmit_buf(struct tty_port *port);
502extern void tty_port_put(struct tty_port *port); 516extern void tty_port_put(struct tty_port *port);
@@ -508,6 +522,12 @@ static inline struct tty_port *tty_port_get(struct tty_port *port)
508 return port; 522 return port;
509} 523}
510 524
525/* If the cts flow control is enabled, return true. */
526static inline bool tty_port_cts_enabled(struct tty_port *port)
527{
528 return port->flags & ASYNC_CTS_FLOW;
529}
530
511extern struct tty_struct *tty_port_tty_get(struct tty_port *port); 531extern struct tty_struct *tty_port_tty_get(struct tty_port *port);
512extern void tty_port_tty_set(struct tty_port *port, struct tty_struct *tty); 532extern void tty_port_tty_set(struct tty_port *port, struct tty_struct *tty);
513extern int tty_port_carrier_raised(struct tty_port *port); 533extern int tty_port_carrier_raised(struct tty_port *port);
@@ -521,6 +541,8 @@ extern int tty_port_close_start(struct tty_port *port,
521extern void tty_port_close_end(struct tty_port *port, struct tty_struct *tty); 541extern void tty_port_close_end(struct tty_port *port, struct tty_struct *tty);
522extern void tty_port_close(struct tty_port *port, 542extern void tty_port_close(struct tty_port *port,
523 struct tty_struct *tty, struct file *filp); 543 struct tty_struct *tty, struct file *filp);
544extern int tty_port_install(struct tty_port *port, struct tty_driver *driver,
545 struct tty_struct *tty);
524extern int tty_port_open(struct tty_port *port, 546extern int tty_port_open(struct tty_port *port,
525 struct tty_struct *tty, struct file *filp); 547 struct tty_struct *tty, struct file *filp);
526static inline int tty_port_users(struct tty_port *port) 548static inline int tty_port_users(struct tty_port *port)
@@ -605,8 +627,12 @@ extern long vt_compat_ioctl(struct tty_struct *tty,
605 627
606/* tty_mutex.c */ 628/* tty_mutex.c */
607/* functions for preparation of BKL removal */ 629/* functions for preparation of BKL removal */
608extern void __lockfunc tty_lock(void) __acquires(tty_lock); 630extern void __lockfunc tty_lock(struct tty_struct *tty);
609extern void __lockfunc tty_unlock(void) __releases(tty_lock); 631extern void __lockfunc tty_unlock(struct tty_struct *tty);
632extern void __lockfunc tty_lock_pair(struct tty_struct *tty,
633 struct tty_struct *tty2);
634extern void __lockfunc tty_unlock_pair(struct tty_struct *tty,
635 struct tty_struct *tty2);
610 636
611/* 637/*
612 * this shall be called only from where BTM is held (like close) 638 * this shall be called only from where BTM is held (like close)
@@ -621,9 +647,9 @@ extern void __lockfunc tty_unlock(void) __releases(tty_lock);
621static inline void tty_wait_until_sent_from_close(struct tty_struct *tty, 647static inline void tty_wait_until_sent_from_close(struct tty_struct *tty,
622 long timeout) 648 long timeout)
623{ 649{
624 tty_unlock(); /* tty->ops->close holds the BTM, drop it while waiting */ 650 tty_unlock(tty); /* tty->ops->close holds the BTM, drop it while waiting */
625 tty_wait_until_sent(tty, timeout); 651 tty_wait_until_sent(tty, timeout);
626 tty_lock(); 652 tty_lock(tty);
627} 653}
628 654
629/* 655/*
@@ -638,16 +664,16 @@ static inline void tty_wait_until_sent_from_close(struct tty_struct *tty,
638 * 664 *
639 * Do not use in new code. 665 * Do not use in new code.
640 */ 666 */
641#define wait_event_interruptible_tty(wq, condition) \ 667#define wait_event_interruptible_tty(tty, wq, condition) \
642({ \ 668({ \
643 int __ret = 0; \ 669 int __ret = 0; \
644 if (!(condition)) { \ 670 if (!(condition)) { \
645 __wait_event_interruptible_tty(wq, condition, __ret); \ 671 __wait_event_interruptible_tty(tty, wq, condition, __ret); \
646 } \ 672 } \
647 __ret; \ 673 __ret; \
648}) 674})
649 675
650#define __wait_event_interruptible_tty(wq, condition, ret) \ 676#define __wait_event_interruptible_tty(tty, wq, condition, ret) \
651do { \ 677do { \
652 DEFINE_WAIT(__wait); \ 678 DEFINE_WAIT(__wait); \
653 \ 679 \
@@ -656,9 +682,9 @@ do { \
656 if (condition) \ 682 if (condition) \
657 break; \ 683 break; \
658 if (!signal_pending(current)) { \ 684 if (!signal_pending(current)) { \
659 tty_unlock(); \ 685 tty_unlock(tty); \
660 schedule(); \ 686 schedule(); \
661 tty_lock(); \ 687 tty_lock(tty); \
662 continue; \ 688 continue; \
663 } \ 689 } \
664 ret = -ERESTARTSYS; \ 690 ret = -ERESTARTSYS; \
diff --git a/include/linux/tty_driver.h b/include/linux/tty_driver.h
index 6e6dbb7447b6..dd976cfb6131 100644
--- a/include/linux/tty_driver.h
+++ b/include/linux/tty_driver.h
@@ -45,14 +45,9 @@
45 * 45 *
46 * void (*shutdown)(struct tty_struct * tty); 46 * void (*shutdown)(struct tty_struct * tty);
47 * 47 *
48 * This routine is called synchronously when a particular tty device 48 * This routine is called under the tty lock when a particular tty device
49 * is closed for the last time freeing up the resources. 49 * is closed for the last time. It executes before the tty resources
50 * Note that tty_shutdown() is not called if ops->shutdown is defined. 50 * are freed so may execute while another function holds a tty kref.
51 * This means one is responsible to take care of calling ops->remove (e.g.
52 * via tty_driver_remove_tty) and releasing tty->termios.
53 * Note that this hook may be called from *all* the contexts where one
54 * uses tty refcounting (e.g. tty_port_tty_get).
55 *
56 * 51 *
57 * void (*cleanup)(struct tty_struct * tty); 52 * void (*cleanup)(struct tty_struct * tty);
58 * 53 *
@@ -294,18 +289,18 @@ struct tty_operations {
294struct tty_driver { 289struct tty_driver {
295 int magic; /* magic number for this structure */ 290 int magic; /* magic number for this structure */
296 struct kref kref; /* Reference management */ 291 struct kref kref; /* Reference management */
297 struct cdev cdev; 292 struct cdev *cdevs;
298 struct module *owner; 293 struct module *owner;
299 const char *driver_name; 294 const char *driver_name;
300 const char *name; 295 const char *name;
301 int name_base; /* offset of printed name */ 296 int name_base; /* offset of printed name */
302 int major; /* major device number */ 297 int major; /* major device number */
303 int minor_start; /* start of minor device number */ 298 int minor_start; /* start of minor device number */
304 int num; /* number of devices allocated */ 299 unsigned int num; /* number of devices allocated */
305 short type; /* type of tty driver */ 300 short type; /* type of tty driver */
306 short subtype; /* subtype of tty driver */ 301 short subtype; /* subtype of tty driver */
307 struct ktermios init_termios; /* Initial termios */ 302 struct ktermios init_termios; /* Initial termios */
308 int flags; /* tty driver flags */ 303 unsigned long flags; /* tty driver flags */
309 struct proc_dir_entry *proc_entry; /* /proc fs entry */ 304 struct proc_dir_entry *proc_entry; /* /proc fs entry */
310 struct tty_driver *other; /* only used for the PTY driver */ 305 struct tty_driver *other; /* only used for the PTY driver */
311 306
@@ -313,6 +308,7 @@ struct tty_driver {
313 * Pointer to the tty data structures 308 * Pointer to the tty data structures
314 */ 309 */
315 struct tty_struct **ttys; 310 struct tty_struct **ttys;
311 struct tty_port **ports;
316 struct ktermios **termios; 312 struct ktermios **termios;
317 void *driver_state; 313 void *driver_state;
318 314
@@ -326,7 +322,8 @@ struct tty_driver {
326 322
327extern struct list_head tty_drivers; 323extern struct list_head tty_drivers;
328 324
329extern struct tty_driver *__alloc_tty_driver(int lines, struct module *owner); 325extern struct tty_driver *__tty_alloc_driver(unsigned int lines,
326 struct module *owner, unsigned long flags);
330extern void put_tty_driver(struct tty_driver *driver); 327extern void put_tty_driver(struct tty_driver *driver);
331extern void tty_set_operations(struct tty_driver *driver, 328extern void tty_set_operations(struct tty_driver *driver,
332 const struct tty_operations *op); 329 const struct tty_operations *op);
@@ -334,7 +331,21 @@ extern struct tty_driver *tty_find_polling_driver(char *name, int *line);
334 331
335extern void tty_driver_kref_put(struct tty_driver *driver); 332extern void tty_driver_kref_put(struct tty_driver *driver);
336 333
337#define alloc_tty_driver(lines) __alloc_tty_driver(lines, THIS_MODULE) 334/* Use TTY_DRIVER_* flags below */
335#define tty_alloc_driver(lines, flags) \
336 __tty_alloc_driver(lines, THIS_MODULE, flags)
337
338/*
339 * DEPRECATED Do not use this in new code, use tty_alloc_driver instead.
340 * (And change the return value checks.)
341 */
342static inline struct tty_driver *alloc_tty_driver(unsigned int lines)
343{
344 struct tty_driver *ret = tty_alloc_driver(lines, 0);
345 if (IS_ERR(ret))
346 return NULL;
347 return ret;
348}
338 349
339static inline struct tty_driver *tty_driver_kref_get(struct tty_driver *d) 350static inline struct tty_driver *tty_driver_kref_get(struct tty_driver *d)
340{ 351{
@@ -380,6 +391,14 @@ static inline struct tty_driver *tty_driver_kref_get(struct tty_driver *d)
380 * the requested timeout to the caller instead of using a simple 391 * the requested timeout to the caller instead of using a simple
381 * on/off interface. 392 * on/off interface.
382 * 393 *
394 * TTY_DRIVER_DYNAMIC_ALLOC -- do not allocate structures which are
395 * needed per line for this driver as it would waste memory.
396 * The driver will take care.
397 *
398 * TTY_DRIVER_UNNUMBERED_NODE -- do not create numbered /dev nodes. In
399 * other words create /dev/ttyprintk and not /dev/ttyprintk0.
400 * Applicable only when a driver for a single tty device is
401 * being allocated.
383 */ 402 */
384#define TTY_DRIVER_INSTALLED 0x0001 403#define TTY_DRIVER_INSTALLED 0x0001
385#define TTY_DRIVER_RESET_TERMIOS 0x0002 404#define TTY_DRIVER_RESET_TERMIOS 0x0002
@@ -387,6 +406,8 @@ static inline struct tty_driver *tty_driver_kref_get(struct tty_driver *d)
387#define TTY_DRIVER_DYNAMIC_DEV 0x0008 406#define TTY_DRIVER_DYNAMIC_DEV 0x0008
388#define TTY_DRIVER_DEVPTS_MEM 0x0010 407#define TTY_DRIVER_DEVPTS_MEM 0x0010
389#define TTY_DRIVER_HARDWARE_BREAK 0x0020 408#define TTY_DRIVER_HARDWARE_BREAK 0x0020
409#define TTY_DRIVER_DYNAMIC_ALLOC 0x0040
410#define TTY_DRIVER_UNNUMBERED_NODE 0x0080
390 411
391/* tty driver types */ 412/* tty driver types */
392#define TTY_DRIVER_TYPE_SYSTEM 0x0001 413#define TTY_DRIVER_TYPE_SYSTEM 0x0001
diff --git a/include/linux/tty_flags.h b/include/linux/tty_flags.h
new file mode 100644
index 000000000000..eefcb483a2c0
--- /dev/null
+++ b/include/linux/tty_flags.h
@@ -0,0 +1,78 @@
1#ifndef _LINUX_TTY_FLAGS_H
2#define _LINUX_TTY_FLAGS_H
3
4/*
5 * Definitions for async_struct (and serial_struct) flags field also
6 * shared by the tty_port flags structures.
7 *
8 * Define ASYNCB_* for convenient use with {test,set,clear}_bit.
9 */
10#define ASYNCB_HUP_NOTIFY 0 /* Notify getty on hangups and closes
11 * on the callout port */
12#define ASYNCB_FOURPORT 1 /* Set OU1, OUT2 per AST Fourport settings */
13#define ASYNCB_SAK 2 /* Secure Attention Key (Orange book) */
14#define ASYNCB_SPLIT_TERMIOS 3 /* Separate termios for dialin/callout */
15#define ASYNCB_SPD_HI 4 /* Use 56000 instead of 38400 bps */
16#define ASYNCB_SPD_VHI 5 /* Use 115200 instead of 38400 bps */
17#define ASYNCB_SKIP_TEST 6 /* Skip UART test during autoconfiguration */
18#define ASYNCB_AUTO_IRQ 7 /* Do automatic IRQ during
19 * autoconfiguration */
20#define ASYNCB_SESSION_LOCKOUT 8 /* Lock out cua opens based on session */
21#define ASYNCB_PGRP_LOCKOUT 9 /* Lock out cua opens based on pgrp */
22#define ASYNCB_CALLOUT_NOHUP 10 /* Don't do hangups for cua device */
23#define ASYNCB_HARDPPS_CD 11 /* Call hardpps when CD goes high */
24#define ASYNCB_SPD_SHI 12 /* Use 230400 instead of 38400 bps */
25#define ASYNCB_LOW_LATENCY 13 /* Request low latency behaviour */
26#define ASYNCB_BUGGY_UART 14 /* This is a buggy UART, skip some safety
27 * checks. Note: can be dangerous! */
28#define ASYNCB_AUTOPROBE 15 /* Port was autoprobed by PCI or PNP code */
29#define ASYNCB_LAST_USER 15
30
31/* Internal flags used only by kernel */
32#define ASYNCB_INITIALIZED 31 /* Serial port was initialized */
33#define ASYNCB_SUSPENDED 30 /* Serial port is suspended */
34#define ASYNCB_NORMAL_ACTIVE 29 /* Normal device is active */
35#define ASYNCB_BOOT_AUTOCONF 28 /* Autoconfigure port on bootup */
36#define ASYNCB_CLOSING 27 /* Serial port is closing */
37#define ASYNCB_CTS_FLOW 26 /* Do CTS flow control */
38#define ASYNCB_CHECK_CD 25 /* i.e., CLOCAL */
39#define ASYNCB_SHARE_IRQ 24 /* for multifunction cards, no longer used */
40#define ASYNCB_CONS_FLOW 23 /* flow control for console */
41#define ASYNCB_FIRST_KERNEL 22
42
43#define ASYNC_HUP_NOTIFY (1U << ASYNCB_HUP_NOTIFY)
44#define ASYNC_SUSPENDED (1U << ASYNCB_SUSPENDED)
45#define ASYNC_FOURPORT (1U << ASYNCB_FOURPORT)
46#define ASYNC_SAK (1U << ASYNCB_SAK)
47#define ASYNC_SPLIT_TERMIOS (1U << ASYNCB_SPLIT_TERMIOS)
48#define ASYNC_SPD_HI (1U << ASYNCB_SPD_HI)
49#define ASYNC_SPD_VHI (1U << ASYNCB_SPD_VHI)
50#define ASYNC_SKIP_TEST (1U << ASYNCB_SKIP_TEST)
51#define ASYNC_AUTO_IRQ (1U << ASYNCB_AUTO_IRQ)
52#define ASYNC_SESSION_LOCKOUT (1U << ASYNCB_SESSION_LOCKOUT)
53#define ASYNC_PGRP_LOCKOUT (1U << ASYNCB_PGRP_LOCKOUT)
54#define ASYNC_CALLOUT_NOHUP (1U << ASYNCB_CALLOUT_NOHUP)
55#define ASYNC_HARDPPS_CD (1U << ASYNCB_HARDPPS_CD)
56#define ASYNC_SPD_SHI (1U << ASYNCB_SPD_SHI)
57#define ASYNC_LOW_LATENCY (1U << ASYNCB_LOW_LATENCY)
58#define ASYNC_BUGGY_UART (1U << ASYNCB_BUGGY_UART)
59#define ASYNC_AUTOPROBE (1U << ASYNCB_AUTOPROBE)
60
61#define ASYNC_FLAGS ((1U << (ASYNCB_LAST_USER + 1)) - 1)
62#define ASYNC_USR_MASK (ASYNC_SPD_MASK|ASYNC_CALLOUT_NOHUP| \
63 ASYNC_LOW_LATENCY)
64#define ASYNC_SPD_CUST (ASYNC_SPD_HI|ASYNC_SPD_VHI)
65#define ASYNC_SPD_WARP (ASYNC_SPD_HI|ASYNC_SPD_SHI)
66#define ASYNC_SPD_MASK (ASYNC_SPD_HI|ASYNC_SPD_VHI|ASYNC_SPD_SHI)
67
68#define ASYNC_INITIALIZED (1U << ASYNCB_INITIALIZED)
69#define ASYNC_NORMAL_ACTIVE (1U << ASYNCB_NORMAL_ACTIVE)
70#define ASYNC_BOOT_AUTOCONF (1U << ASYNCB_BOOT_AUTOCONF)
71#define ASYNC_CLOSING (1U << ASYNCB_CLOSING)
72#define ASYNC_CTS_FLOW (1U << ASYNCB_CTS_FLOW)
73#define ASYNC_CHECK_CD (1U << ASYNCB_CHECK_CD)
74#define ASYNC_SHARE_IRQ (1U << ASYNCB_SHARE_IRQ)
75#define ASYNC_CONS_FLOW (1U << ASYNCB_CONS_FLOW)
76#define ASYNC_INTERNAL_FLAGS (~((1U << ASYNCB_FIRST_KERNEL) - 1))
77
78#endif
diff --git a/include/net/irda/ircomm_tty.h b/include/net/irda/ircomm_tty.h
index 59ba38bc400f..80ffde3bb164 100644
--- a/include/net/irda/ircomm_tty.h
+++ b/include/net/irda/ircomm_tty.h
@@ -52,21 +52,16 @@
52/* Same for payload size. See qos.c for the smallest max data size */ 52/* Same for payload size. See qos.c for the smallest max data size */
53#define IRCOMM_TTY_DATA_UNINITIALISED (64 - IRCOMM_TTY_HDR_UNINITIALISED) 53#define IRCOMM_TTY_DATA_UNINITIALISED (64 - IRCOMM_TTY_HDR_UNINITIALISED)
54 54
55/* Those are really defined in include/linux/serial.h - Jean II */
56#define ASYNC_B_INITIALIZED 31 /* Serial port was initialized */
57#define ASYNC_B_NORMAL_ACTIVE 29 /* Normal device is active */
58#define ASYNC_B_CLOSING 27 /* Serial port is closing */
59
60/* 55/*
61 * IrCOMM TTY driver state 56 * IrCOMM TTY driver state
62 */ 57 */
63struct ircomm_tty_cb { 58struct ircomm_tty_cb {
64 irda_queue_t queue; /* Must be first */ 59 irda_queue_t queue; /* Must be first */
60 struct tty_port port;
65 magic_t magic; 61 magic_t magic;
66 62
67 int state; /* Connect state */ 63 int state; /* Connect state */
68 64
69 struct tty_struct *tty;
70 struct ircomm_cb *ircomm; /* IrCOMM layer instance */ 65 struct ircomm_cb *ircomm; /* IrCOMM layer instance */
71 66
72 struct sk_buff *tx_skb; /* Transmit buffer */ 67 struct sk_buff *tx_skb; /* Transmit buffer */
@@ -80,7 +75,6 @@ struct ircomm_tty_cb {
80 LOCAL_FLOW flow; /* IrTTP flow status */ 75 LOCAL_FLOW flow; /* IrTTP flow status */
81 76
82 int line; 77 int line;
83 unsigned long flags;
84 78
85 __u8 dlsap_sel; 79 __u8 dlsap_sel;
86 __u8 slsap_sel; 80 __u8 slsap_sel;
@@ -97,19 +91,10 @@ struct ircomm_tty_cb {
97 void *skey; 91 void *skey;
98 void *ckey; 92 void *ckey;
99 93
100 wait_queue_head_t open_wait;
101 wait_queue_head_t close_wait;
102 struct timer_list watchdog_timer; 94 struct timer_list watchdog_timer;
103 struct work_struct tqueue; 95 struct work_struct tqueue;
104 96
105 unsigned short close_delay;
106 unsigned short closing_wait; /* time to wait before closing */
107
108 int open_count;
109 int blocked_open; /* # of blocked opens */
110
111 /* Protect concurent access to : 97 /* Protect concurent access to :
112 * o self->open_count
113 * o self->ctrl_skb 98 * o self->ctrl_skb
114 * o self->tx_skb 99 * o self->tx_skb
115 * Maybe other things may gain to be protected as well... 100 * Maybe other things may gain to be protected as well...
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-27 12:51:06 -0500