48 files changed, 283 insertions, 118 deletions

diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h
index 7d0ab791b16c..9fc4bcfa1681 100644
--- a/include/asm-arm/arch-clps711x/uncompress.h
+++ b/include/asm-arm/arch-clps711x/uncompress.h
@@ -19,7 +19,7 @@
  */
 #include <linux/config.h>
 #include <asm/arch/io.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/hardware/clps7111.h>
 
 #undef CLPS7111_BASE
diff --git a/include/asm-arm/arch-epxa10db/uncompress.h b/include/asm-arm/arch-epxa10db/uncompress.h
index d33ad6a93749..fdfe0e6848f8 100644
--- a/include/asm-arm/arch-epxa10db/uncompress.h
+++ b/include/asm-arm/arch-epxa10db/uncompress.h
@@ -19,7 +19,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #include "asm/arch/platform.h"
-#include "asm/arch/hardware.h"
+#include "asm/hardware.h"
 #define UART00_TYPE (volatile unsigned int*)
 #include "asm/arch/uart00.h"
 
diff --git a/include/asm-arm/arch-h720x/uncompress.h b/include/asm-arm/arch-h720x/uncompress.h
index 2fffacf85a01..9535764bcc71 100644
--- a/include/asm-arm/arch-h720x/uncompress.h
+++ b/include/asm-arm/arch-h720x/uncompress.h
@@ -7,7 +7,7 @@
 #ifndef __ASM_ARCH_UNCOMPRESS_H
 #define __ASM_ARCH_UNCOMPRESS_H
 
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 
 #define LSR     0x14
 #define TEMPTY  0x40
diff --git a/include/asm-arm/arch-imx/irqs.h b/include/asm-arm/arch-imx/irqs.h
index 238197cfb9d9..f195542898e0 100644
--- a/include/asm-arm/arch-imx/irqs.h
+++ b/include/asm-arm/arch-imx/irqs.h
@@ -23,7 +23,7 @@
 #define __ARM_IRQS_H__
 
 /* Use the imx definitions */
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 
 /*
  *  IMX Interrupt numbers
diff --git a/include/asm-arm/arch-imx/timex.h b/include/asm-arm/arch-imx/timex.h
index d65ab3cd5d5d..8c91674706b1 100644
--- a/include/asm-arm/arch-imx/timex.h
+++ b/include/asm-arm/arch-imx/timex.h
@@ -21,7 +21,7 @@
 #ifndef __ASM_ARCH_TIMEX_H
 #define __ASM_ARCH_TIMEX_H
 
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #define CLOCK_TICK_RATE         (CLK32)
 
 #endif
diff --git a/include/asm-arm/arch-integrator/smp.h b/include/asm-arm/arch-integrator/smp.h
index 0ec7093f7c37..da6981efdc39 100644
--- a/include/asm-arm/arch-integrator/smp.h
+++ b/include/asm-arm/arch-integrator/smp.h
@@ -3,7 +3,7 @@
 
 #include <linux/config.h>
 
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/io.h>
 
 #define hard_smp_processor_id()                         \
diff --git a/include/asm-arm/arch-l7200/aux_reg.h b/include/asm-arm/arch-l7200/aux_reg.h
index 762cbc76c501..5b4396de16a0 100644
--- a/include/asm-arm/arch-l7200/aux_reg.h
+++ b/include/asm-arm/arch-l7200/aux_reg.h
@@ -9,7 +9,7 @@
 #ifndef _ASM_ARCH_AUXREG_H
 #define _ASM_ARCH_AUXREG_H
 
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 
 #define l7200aux_reg    *((volatile unsigned int *) (AUX_BASE))
 
diff --git a/include/asm-arm/arch-l7200/gp_timers.h b/include/asm-arm/arch-l7200/gp_timers.h
index 6f20962df248..9c4804d13578 100644
--- a/include/asm-arm/arch-l7200/gp_timers.h
+++ b/include/asm-arm/arch-l7200/gp_timers.h
@@ -10,7 +10,7 @@
 #ifndef _ASM_ARCH_GPTIMERS_H
 #define _ASM_ARCH_GPTIMERS_H
 
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 
 /*
  * Layout of L7200 general purpose timer registers
diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h
index 1b3885741ac1..f486b72070ea 100644
--- a/include/asm-arm/arch-omap/gpio.h
+++ b/include/asm-arm/arch-omap/gpio.h
@@ -26,7 +26,7 @@
 #ifndef __ASM_ARCH_OMAP_GPIO_H
 #define __ASM_ARCH_OMAP_GPIO_H
 
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/arch/irqs.h>
 #include <asm/io.h>
 
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h
index 9779686bdceb..4ffce1d77759 100644
--- a/include/asm-arm/arch-omap/irqs.h
+++ b/include/asm-arm/arch-omap/irqs.h
@@ -260,7 +260,7 @@ extern void omap_init_irq(void);
  * The definition of NR_IRQS is in board-specific header file, which is
  * included via hardware.h
  */
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 
 #ifndef NR_IRQS
 #define NR_IRQS                 IH_BOARD_BASE
diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h
index 305bdeb16ab8..e79d98ab2ab6 100644
--- a/include/asm-arm/arch-omap/mcbsp.h
+++ b/include/asm-arm/arch-omap/mcbsp.h
@@ -24,7 +24,7 @@
 #ifndef __ASM_ARCH_OMAP_MCBSP_H
 #define __ASM_ARCH_OMAP_MCBSP_H
 
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 
 #define OMAP730_MCBSP1_BASE     0xfffb1000
 #define OMAP730_MCBSP2_BASE     0xfffb1800
diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h
index b43cdd2a3874..9af415d2944a 100644
--- a/include/asm-arm/arch-omap/system.h
+++ b/include/asm-arm/arch-omap/system.h
@@ -7,7 +7,7 @@
 #include <linux/config.h>
 #include <asm/mach-types.h>
 #include <asm/hardware/clock.h>
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/arch/prcm.h>
 
 #ifndef CONFIG_MACH_VOICEBLUE
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
index 67879cdb6ef2..9ca76dc3a7af 100644
--- a/include/asm-arm/arch-realview/hardware.h
+++ b/include/asm-arm/arch-realview/hardware.h
@@ -27,5 +27,6 @@
 
 /* macro to get at IO space when running virtually */
 #define IO_ADDRESS(x)           (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
+#define __io_address(n)         __io(IO_ADDRESS(n))
 
 #endif
diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h
index 9f8fcbca0869..6f3d0ce0ca1e 100644
--- a/include/asm-arm/arch-realview/system.h
+++ b/include/asm-arm/arch-realview/system.h
@@ -36,7 +36,7 @@ static inline void arch_idle(void)
 
 static inline void arch_reset(char mode)
 {
-        unsigned int hdr_ctrl = (IO_ADDRESS(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET);
+        void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
         unsigned int val;
 
         /*
diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h
index ca3277d1d5ea..729c2ae4b513 100644
--- a/include/asm-arm/arch-rpc/system.h
+++ b/include/asm-arm/arch-rpc/system.h
@@ -7,7 +7,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #include <asm/hardware/iomd.h>
 #include <asm/io.h>
 
diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 0fc555b4c912..018a9f0e3986 100644
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -18,20 +18,10 @@
 #ifndef __ASSEMBLY__
 
 #ifdef CONFIG_SA1111
-static inline void
-__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
-{
-        unsigned int sz = SZ_1M >> PAGE_SHIFT;
-
-        if (node != 0)
-                sz = 0;
-
-        size[1] = size[0] - sz;
-        size[0] = sz;
-}
+void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
 
 #define arch_adjust_zones(node, size, holes) \
-        __arch_adjust_zones(node, size, holes)
+        sa1111_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD       (PHYS_OFFSET + SZ_1M - 1)
 
diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h
index 75b802719723..d586f65c8228 100644
--- a/include/asm-arm/atomic.h
+++ b/include/asm-arm/atomic.h
@@ -12,6 +12,7 @@
 #define __ASM_ARM_ATOMIC_H
 
 #include <linux/config.h>
+#include <linux/compiler.h>
 
 typedef struct { volatile int counter; } atomic_t;
 
@@ -82,11 +83,12 @@ static inline int atomic_sub_return(int i, atomic_t *v)
 
 static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
 {
-        u32 oldval, res;
+        unsigned long oldval, res;
 
         do {
                 __asm__ __volatile__("@ atomic_cmpxchg\n"
                 "ldrex  %1, [%2]\n"
+                "mov    %0, #0\n"
                 "teq    %1, %3\n"
                 "strexeq %0, %4, [%2]\n"
                     : "=&r" (res), "=&r" (oldval)
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
index e007dd990da5..7399d431edfe 100644
--- a/include/asm-arm/bitops.h
+++ b/include/asm-arm/bitops.h
@@ -19,6 +19,7 @@
 
 #ifdef __KERNEL__
 
+#include <linux/compiler.h>
 #include <asm/system.h>
 
 #define smp_mb__before_clear_bit()      mb()
diff --git a/include/asm-arm/hardware/dec21285.h b/include/asm-arm/hardware/dec21285.h
index 9049f0ddaecf..6685e3fb97b1 100644
--- a/include/asm-arm/hardware/dec21285.h
+++ b/include/asm-arm/hardware/dec21285.h
@@ -20,7 +20,7 @@
 
 #include <linux/config.h>
 #ifndef __ASSEMBLY__
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
 #define DC21285_IO(x)           ((volatile unsigned long *)(ARMCSR_BASE+(x)))
 #else
 #define DC21285_IO(x)           (x)
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
index 3d4b810d8c38..81c59facea3b 100644
--- a/include/asm-arm/mmu_context.h
+++ b/include/asm-arm/mmu_context.h
@@ -13,6 +13,7 @@
 #ifndef __ASM_ARM_MMU_CONTEXT_H
 #define __ASM_ARM_MMU_CONTEXT_H
 
+#include <linux/compiler.h>
 #include <asm/cacheflush.h>
 #include <asm/proc-fns.h>
 
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 8efa4ebdcacb..5621d61ebc07 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -93,8 +93,6 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
                                        struct pt_regs *),
                      int sig, const char *name);
 
-#include <asm/proc-fns.h>
-
 #define xchg(ptr,x) \
         ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
 
@@ -102,6 +100,8 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
 
 extern asmlinkage void __backtrace(void);
 extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
+
+struct mm_struct;
 extern void show_pte(struct mm_struct *mm, unsigned long addr);
 extern void __show_regs(struct pt_regs *);
 
diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h
index 8252a4cd860f..7c98557b717f 100644
--- a/include/asm-arm/thread_info.h
+++ b/include/asm-arm/thread_info.h
@@ -12,6 +12,7 @@
 
 #ifdef __KERNEL__
 
+#include <linux/compiler.h>
 #include <asm/fpstate.h>
 
 #define THREAD_SIZE_ORDER       1
diff --git a/include/asm-i386/signal.h b/include/asm-i386/signal.h
index cbb47d34aa31..76524b4052ac 100644
--- a/include/asm-i386/signal.h
+++ b/include/asm-i386/signal.h
@@ -159,14 +159,37 @@ typedef struct sigaltstack {
 
 #define __HAVE_ARCH_SIG_BITOPS
 
-static __inline__ void sigaddset(sigset_t *set, int _sig)
+#define sigaddset(set,sig)                 \
+        (__builtin_constant_p(sig) ?       \
+        __const_sigaddset((set),(sig)) :   \
+        __gen_sigaddset((set),(sig)))
+
+static __inline__ void __gen_sigaddset(sigset_t *set, int _sig)
 {
-        __asm__("btsl %1,%0" : "=m"(*set) : "Ir"(_sig - 1) : "cc");
+        __asm__("btsl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc");
 }
 
-static __inline__ void sigdelset(sigset_t *set, int _sig)
+static __inline__ void __const_sigaddset(sigset_t *set, int _sig)
 {
-        __asm__("btrl %1,%0" : "=m"(*set) : "Ir"(_sig - 1) : "cc");
+        unsigned long sig = _sig - 1;
+        set->sig[sig / _NSIG_BPW] |= 1 << (sig % _NSIG_BPW);
+}
+
+#define sigdelset(set,sig)                 \
+        (__builtin_constant_p(sig) ?       \
+        __const_sigdelset((set),(sig)) :   \
+        __gen_sigdelset((set),(sig)))
+
+
+static __inline__ void __gen_sigdelset(sigset_t *set, int _sig)
+{
+        __asm__("btrl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc");
+}
+
+static __inline__ void __const_sigdelset(sigset_t *set, int _sig)
+{
+        unsigned long sig = _sig - 1;
+        set->sig[sig / _NSIG_BPW] &= ~(1 << (sig % _NSIG_BPW));
 }
 
 static __inline__ int __const_sigismember(sigset_t *set, int _sig)
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 2c87b41e69ba..55c37c106ef0 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -231,11 +231,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 }
 
 /*
- * atomic_sub_if_positive - add integer to atomic variable
+ * atomic_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
  * @v: pointer of type atomic_t
  *
- * Atomically test @v and decrement if it is greater than 0.
- * The function returns the old value of @v minus 1.
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
+ * The function returns the old value of @v minus @i.
  */
 static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
 {
@@ -577,11 +578,12 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
 }
 
 /*
- * atomic64_sub_if_positive - add integer to atomic variable
+ * atomic64_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
  * @v: pointer of type atomic64_t
  *
- * Atomically test @v and decrement if it is greater than 0.
- * The function returns the old value of @v minus 1.
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
+ * The function returns the old value of @v minus @i.
  */
 static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
 {
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 3061870b7f6c..d42685747e7d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -459,10 +459,10 @@ __BUILDIO(q, u64)
 
 #define __BUILD_MEMORY_STRING(bwlq, type)                               \
                                                                         \
-static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \
-                                unsigned int count)                     \
+static inline void writes##bwlq(volatile void __iomem *mem,             \
+                                const void *addr, unsigned int count)   \
 {                                                                       \
-        volatile type *__addr = addr;                                   \
+        const volatile type *__addr = addr;                             \
                                                                         \
         while (count--) {                                               \
                 mem_write##bwlq(*__addr, mem);                          \
diff --git a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h
index 152879bae20f..a13702fafa85 100644
--- a/include/asm-mips/ip32/crime.h
+++ b/include/asm-mips/ip32/crime.h
@@ -154,7 +154,7 @@ struct sgi_crime {
 #define CRIME_MEM_ERROR_ECC_REPL_MASK   0xffffffff
 };
 
-extern struct sgi_crime *crime;
+extern struct sgi_crime __iomem *crime;
 
 #define CRIME_HI_MEM_BASE       0x40000000      /* this is where whole 1G of RAM is mapped */
 
diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
index 5bdc51d85b6c..990082c81f39 100644
--- a/include/asm-mips/ip32/mace.h
+++ b/include/asm-mips/ip32/mace.h
@@ -150,24 +150,34 @@ struct mace_audio {
 
 /* register definitions for parallel port DMA */
 struct mace_parport {
-/* 0 - do nothing, 1 - pulse terminal count to the device after buffer is drained */ 
-#define MACEPAR_CONTEXT_LASTFLAG BIT(63)
-/* Should not cross 4K page boundary */
-#define MACEPAR_CONTEXT_DATALEN_MASK 0xfff00000000
-/* Can be arbitrarily aligned on any byte boundary on output, 64 byte aligned on input */
-#define MACEPAR_CONTEXT_BASEADDR_MASK 0xffffffff
+        /* 0 - do nothing,
+         * 1 - pulse terminal count to the device after buffer is drained */
+#define MACEPAR_CONTEXT_LASTFLAG        BIT(63)
+        /* Should not cross 4K page boundary */
+#define MACEPAR_CONTEXT_DATA_BOUND      0x0000000000001000UL
+#define MACEPAR_CONTEXT_DATALEN_MASK    0x00000fff00000000UL
+#define MACEPAR_CONTEXT_DATALEN_SHIFT   32
+        /* Can be arbitrarily aligned on any byte boundary on output,
+         * 64 byte aligned on input */
+#define MACEPAR_CONTEXT_BASEADDR_MASK   0x00000000ffffffffUL
         volatile u64 context_a;
         volatile u64 context_b;
-#define MACEPAR_CTLSTAT_DIRECTION BIT(0) /* 0 - mem->device, 1 - device->mem */
-#define MACEPAR_CTLSTAT_ENABLE BIT(1) /* 0 - channel frozen, 1 - channel enabled */
-#define MACEPAR_CTLSTAT_RESET BIT(2) /* 0 - channel active, 1 - complete channel reset */
-#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
-#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
-        volatile u64 cntlstat; /* Control/Status register */
-#define MACEPAR_DIAG_CTXINUSE BIT(1)
-#define MACEPAR_DIAG_DMACTIVE BIT(2) /* 1 - Dma engine is enabled and processing something */
-#define MACEPAR_DIAG_CTRMASK 0x3ffc /* Counter of bytes left */
-        volatile u64 diagnostic; /* RO: diagnostic register */
+        /* 0 - mem->device, 1 - device->mem */
+#define MACEPAR_CTLSTAT_DIRECTION       BIT(0)
+        /* 0 - channel frozen, 1 - channel enabled */
+#define MACEPAR_CTLSTAT_ENABLE          BIT(1)
+        /* 0 - channel active, 1 - complete channel reset */
+#define MACEPAR_CTLSTAT_RESET           BIT(2)
+#define MACEPAR_CTLSTAT_CTXB_VALID      BIT(3)
+#define MACEPAR_CTLSTAT_CTXA_VALID      BIT(4)
+        volatile u64 cntlstat;          /* Control/Status register */
+#define MACEPAR_DIAG_CTXINUSE           BIT(0)
+        /* 1 - Dma engine is enabled and processing something */
+#define MACEPAR_DIAG_DMACTIVE           BIT(1)
+        /* Counter of bytes left */
+#define MACEPAR_DIAG_CTRMASK            0x0000000000003ffcUL
+#define MACEPAR_DIAG_CTRSHIFT           2
+        volatile u64 diagnostic;        /* RO: diagnostic register */
 };
 
 /* ISA Control and DMA registers */
@@ -353,6 +363,6 @@ struct sgi_mace {
         char _pad6[0x80000 - sizeof(struct mace_isa)];
 };
 
-extern struct sgi_mace *mace;
+extern struct sgi_mace __iomem *mace;
 
 #endif /* __ASM_MACE_H__ */
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index 5d894376fc1a..647fdb54cc1d 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -220,5 +220,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BOARD_PC1_INT DB1200_PC1_INT
 #define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
 
+/* Nand chip select */
+#define NAND_CS 1
+
 #endif /* __ASM_DB1200_H */
 
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index efafe65258b6..7b28b23f91ce 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -200,6 +200,12 @@ typedef volatile struct
                         ((NAND_T_PUL & 0xF)     << NAND_T_PUL_SHIFT) | \
                         ((NAND_T_SU  & 0xF)     << NAND_T_SU_SHIFT)  | \
                         ((NAND_T_WH  & 0xF)     << NAND_T_WH_SHIFT)
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG  0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
 
 #endif /* __ASM_DB1X00_H */
 
diff --git a/include/asm-mips/mach-ip32/mc146818rtc.h b/include/asm-mips/mach-ip32/mc146818rtc.h
index f5d780ff843f..c28ba8d84076 100644
--- a/include/asm-mips/mach-ip32/mc146818rtc.h
+++ b/include/asm-mips/mach-ip32/mc146818rtc.h
@@ -11,7 +11,6 @@
 #ifndef __ASM_MACH_IP32_MC146818RTC_H
 #define __ASM_MACH_IP32_MC146818RTC_H
 
-#include <asm/io.h>
 #include <asm/ip32/mace.h>
 
 #define RTC_PORT(x)     (0x70 + (x))
@@ -26,8 +25,10 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
         mace->isa.rtc[addr << 8] = data;
 }
 
-/* FIXME: Do it right. For now just assume that noone lives in 20th century
- * and no O2 user in 22th century ;-) */
+/*
+ * FIXME: Do it right. For now just assume that noone lives in 20th century
+ * and no O2 user in 22th century ;-)
+ */
 #define mc146818_decode_year(year) ((year) + 2000)
 
 #define RTC_ALWAYS_BCD  0
diff --git a/include/asm-mips/mach-jmr3927/asm/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h
index 134a4b6c334a..cff6192d4bdb 100644
--- a/include/asm-mips/mach-jmr3927/asm/ds1742.h
+++ b/include/asm-mips/mach-jmr3927/ds1742.h
@@ -5,12 +5,12 @@
  *
  * Copyright (C) 2003 by Ralf Baechle
  */
-#ifndef __ASM_MACH_JMR3927_ASM_DS1742_H
-#define __ASM_MACH_JMR3927_ASM_DS1742_H
+#ifndef __ASM_MACH_JMR3927_DS1742_H
+#define __ASM_MACH_JMR3927_DS1742_H
 
 #include <asm/jmr3927/jmr3927.h>
 
 #define rtc_read(reg)           (jmr3927_nvram_in(addr))
 #define rtc_write(data, reg)    (jmr3927_nvram_out((data),(reg)))
 
-#endif /* __ASM_MACH_JMR3927_ASM_DS1742_H */
+#endif /* __ASM_MACH_JMR3927_DS1742_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index 9a3088b19bf3..409d443322c1 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -248,5 +248,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BOARD_PC1_INT PB1200_PC1_INT
 #define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
 
+/* Nand chip select */
+#define NAND_CS 1
+
 #endif /* __ASM_PB1200_H */
 
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index 431d6088ea96..9578ead11e8a 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
                         ((NAND_T_SU  & 0xF)     << NAND_T_SU_SHIFT)  | \
                         ((NAND_T_WH  & 0xF)     << NAND_T_WH_SHIFT)
 
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG  0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
+
 #endif /* __ASM_PB1550_H */
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index c3dcfcb928b6..365c2a3c64f5 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -20,9 +20,14 @@
 #ifndef _MIPS_SEADINT_H
 #define _MIPS_SEADINT_H
 
-#define SEADINT_UART0     2
-#define SEADINT_UART1     3
+/*
+ * Interrupts 0..7 are used for SEAD CPU interrupts
+ */
+#define MIPSCPU_INT_BASE        0
+
+#define MIPSCPU_INT_UART0       2
+#define MIPSCPU_INT_UART1       3
 
-extern void seadint_init(void);
+#define MIPSCPU_INT_CPUCTR      7
 
 #endif /* !(_MIPS_SEADINT_H) */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 8ca539e80d87..6fe903e09c62 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -155,27 +155,6 @@ typedef struct sigaltstack {
 #ifdef __KERNEL__
 #include <asm/sigcontext.h>
 
-/*
- * The following break codes are or were in use for specific purposes in
- * other MIPS operating systems.  Linux/MIPS doesn't use all of them.  The
- * unused ones are here as placeholders; we might encounter them in
- * non-Linux/MIPS object files or make use of them in the future.
- */
-#define BRK_USERBP      0       /* User bp (used by debuggers) */
-#define BRK_KERNELBP    1       /* Break in the kernel */
-#define BRK_ABORT       2       /* Sometimes used by abort(3) to SIGIOT */
-#define BRK_BD_TAKEN    3       /* For bd slot emulation - not implemented */
-#define BRK_BD_NOTTAKEN 4       /* For bd slot emulation - not implemented */
-#define BRK_SSTEPBP     5       /* User bp (used by debuggers) */
-#define BRK_OVERFLOW    6       /* Overflow check */
-#define BRK_DIVZERO     7       /* Divide by zero check */
-#define BRK_RANGE       8       /* Range error check */
-#define BRK_STACKOVERFLOW 9     /* For Ada stackchecking */
-#define BRK_NORLD       10      /* No rld found - not used by Linux/MIPS */
-#define _BRK_THREADBP   11      /* For threads, user bp (used by debuggers) */
-#define BRK_MULOVF      1023    /* Multiply overflow */
-#define BRK_BUG         512     /* Used by BUG() */
-
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 
 #endif /* __KERNEL__ */
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
index f876bdf22056..b0a30e2c9813 100644
--- a/include/asm-parisc/irq.h
+++ b/include/asm-parisc/irq.h
@@ -8,6 +8,7 @@
 #define _ASM_PARISC_IRQ_H
 
 #include <linux/config.h>
+#include <linux/cpumask.h>
 #include <asm/types.h>
 
 #define NO_IRQ          (-1)
@@ -49,10 +50,10 @@ extern int txn_alloc_irq(unsigned int nbits);
 extern int txn_claim_irq(int);
 extern unsigned int txn_alloc_data(unsigned int);
 extern unsigned long txn_alloc_addr(unsigned int);
+extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
 
 extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
-
-extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
+extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
 
 /* soft power switch support (power.c) */
 extern struct tasklet_struct power_tasklet;
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index 9413f67a540b..dbdbd2e9fdf9 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -29,6 +29,7 @@ extern cpumask_t cpu_online_map;
 #define cpu_logical_map(cpu)    (cpu)
 
 extern void smp_send_reschedule(int cpu);
+extern void smp_send_all_nop(void);
 
 #endif /* !ASSEMBLY */
 
@@ -53,7 +54,11 @@ extern unsigned long cpu_present_mask;
 
 #define raw_smp_processor_id()  (current_thread_info()->cpu)
 
-#endif /* CONFIG_SMP */
+#else /* CONFIG_SMP */
+
+static inline void smp_send_all_nop(void) { return; }
+
+#endif
 
 #define NO_PROC_ID              0xFF            /* No processor magic marker */
 #define ANY_PROC_ID             0xFF            /* Any processor magic marker */
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h
index 7c3f406a746a..16c2ac075fc5 100644
--- a/include/asm-parisc/spinlock.h
+++ b/include/asm-parisc/spinlock.h
@@ -11,18 +11,25 @@ static inline int __raw_spin_is_locked(raw_spinlock_t *x)
         return *a == 0;
 }
 
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
+#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0)
 #define __raw_spin_unlock_wait(x) \
                 do { cpu_relax(); } while (__raw_spin_is_locked(x))
 
-static inline void __raw_spin_lock(raw_spinlock_t *x)
+static inline void __raw_spin_lock_flags(raw_spinlock_t *x,
+                                         unsigned long flags)
 {
         volatile unsigned int *a;
 
         mb();
         a = __ldcw_align(x);
         while (__ldcw(a) == 0)
-                while (*a == 0);
+                while (*a == 0)
+                        if (flags & PSW_SM_I) {
+                                local_irq_enable();
+                                cpu_relax();
+                                local_irq_disable();
+                        } else
+                                cpu_relax();
         mb();
 }
 
@@ -60,26 +67,20 @@ static inline int __raw_spin_trylock(raw_spinlock_t *x)
 
 static  __inline__ void __raw_read_lock(raw_rwlock_t *rw)
 {
-        unsigned long flags;
-        local_irq_save(flags);
         __raw_spin_lock(&rw->lock);
 
         rw->counter++;
 
         __raw_spin_unlock(&rw->lock);
-        local_irq_restore(flags);
 }
 
 static  __inline__ void __raw_read_unlock(raw_rwlock_t *rw)
 {
-        unsigned long flags;
-        local_irq_save(flags);
         __raw_spin_lock(&rw->lock);
 
         rw->counter--;
 
         __raw_spin_unlock(&rw->lock);
-        local_irq_restore(flags);
 }
 
 /* write_lock is less trivial.  We optimistically grab the lock and check
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index e97aa8d1eff5..c9ec39c6fc6c 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -12,21 +12,15 @@
  * N class systems, only one PxTLB inter processor broadcast can be
  * active at any one time on the Merced bus.  This tlb purge
  * synchronisation is fairly lightweight and harmless so we activate
- * it on all SMP systems not just the N class. */
-#ifdef CONFIG_SMP
+ * it on all SMP systems not just the N class.  We also need to have
+ * preemption disabled on uniprocessor machines, and spin_lock does that
+ * nicely.
+ */
 extern spinlock_t pa_tlb_lock;
 
 #define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
 #define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
 
-#else
-
-#define purge_tlb_start(x) do { } while(0)
-#define purge_tlb_end(x) do { } while (0)
-
-#endif
-
-
 extern void flush_tlb_all(void);
 
 /*
@@ -88,7 +82,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
         if (npages >= 512)  /* 2MB of space: arbitrary, should be tuned */
                 flush_tlb_all();
         else {
-                preempt_disable();
                 mtsp(vma->vm_mm->context,1);
                 purge_tlb_start();
                 if (split_tlb) {
@@ -102,7 +95,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
                                 pdtlb(start);
                                 start += PAGE_SIZE;
                         }
-                preempt_enable();
                 }
                 purge_tlb_end();
         }
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
index c16f106b5373..1e6e7846824f 100644
--- a/include/asm-powerpc/page_64.h
+++ b/include/asm-powerpc/page_64.h
@@ -86,7 +86,11 @@ static inline void copy_page(void *to, void *from)
 extern u64 ppc64_pft_size;
 
 /* Large pages size */
+#ifdef CONFIG_HUGETLB_PAGE
 extern unsigned int HPAGE_SHIFT;
+#else
+#define HPAGE_SHIFT PAGE_SHIFT
+#endif
 #define HPAGE_SIZE              ((1UL) << HPAGE_SHIFT)
 #define HPAGE_MASK              (~(HPAGE_SIZE - 1))
 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 43d2ebbc7748..b638b87cebe3 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1091,5 +1091,7 @@ typedef struct im_idma {
 #define CPM_IMMR_OFFSET 0x101a8
 #endif
 
+#define FCC_PSMR_RMII   ((uint)0x00020000)      /* Use RMII interface */
+
 #endif /* __CPM2__ */
 #endif /* __KERNEL__ */
diff --git a/include/linux/cciss_ioctl.h b/include/linux/cciss_ioctl.h
index 424d5e622b43..6e27f42e3a57 100644
--- a/include/linux/cciss_ioctl.h
+++ b/include/linux/cciss_ioctl.h
@@ -10,8 +10,8 @@
 typedef struct _cciss_pci_info_struct
 {
         unsigned char   bus;
-        unsigned short  domain;
         unsigned char   dev_fn;
+        unsigned short  domain;
         __u32           board_id;
 } cciss_pci_info_struct; 
 
diff --git a/include/linux/ds17287rtc.h b/include/linux/ds17287rtc.h
new file mode 100644
index 000000000000..c281ba42e28f
--- /dev/null
+++ b/include/linux/ds17287rtc.h
@@ -0,0 +1,67 @@
+/*
+ * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * (C) 2003 Guido Guenther <agx@sigxcpu.org>
+ */
+#ifndef __LINUX_DS17287RTC_H
+#define __LINUX_DS17287RTC_H
+
+#include <linux/rtc.h>                  /* get the user-level API */
+#include <linux/spinlock.h>             /* spinlock_t */
+#include <linux/mc146818rtc.h>
+
+/* Register A */
+#define DS_REGA_DV2     0x40            /* countdown chain */
+#define DS_REGA_DV1     0x20            /* oscillator enable */
+#define DS_REGA_DV0     0x10            /* bank select */
+
+/* bank 1 registers */
+#define DS_B1_MODEL     0x40            /* model number byte */
+#define DS_B1_SN1       0x41            /* serial number byte 1 */
+#define DS_B1_SN2       0x42            /* serial number byte 2 */
+#define DS_B1_SN3       0x43            /* serial number byte 3 */
+#define DS_B1_SN4       0x44            /* serial number byte 4 */
+#define DS_B1_SN5       0x45            /* serial number byte 5 */
+#define DS_B1_SN6       0x46            /* serial number byte 6 */
+#define DS_B1_CRC       0x47            /* CRC byte */
+#define DS_B1_CENTURY   0x48            /* Century byte */
+#define DS_B1_DALARM    0x49            /* date alarm */
+#define DS_B1_XCTRL4A   0x4a            /* extendec control register 4a */
+#define DS_B1_XCTRL4B   0x4b            /* extendec control register 4b */
+#define DS_B1_RTCADDR2  0x4e            /* rtc address 2 */
+#define DS_B1_RTCADDR3  0x4f            /* rtc address 3 */
+#define DS_B1_RAMLSB    0x50            /* extended ram LSB */
+#define DS_B1_RAMMSB    0x51            /* extended ram MSB */
+#define DS_B1_RAMDPORT  0x53            /* extended ram data port */
+
+/* register details */
+/* extended control register 4a */
+#define DS_XCTRL4A_VRT2 0x80            /* valid ram and time */
+#define DS_XCTRL4A_INCR 0x40            /* increment progress status */
+#define DS_XCTRL4A_BME  0x20            /* burst mode enable */
+#define DS_XCTRL4A_PAB  0x08            /* power active bar ctrl */
+#define DS_XCTRL4A_RF   0x04            /* ram clear flag */
+#define DS_XCTRL4A_WF   0x02            /* wake up alarm flag */
+#define DS_XCTRL4A_KF   0x01            /* kickstart flag */
+
+/* interrupt causes */
+#define DS_XCTRL4A_IFS  (DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF)
+
+/* extended control register 4b */
+#define DS_XCTRL4B_ABE  0x80            /* auxiliary battery enable */
+#define DS_XCTRL4B_E32K 0x40            /* enable 32.768 kHz Output */
+#define DS_XCTRL4B_CS   0x20            /* crystal select */
+#define DS_XCTRL4B_RCE  0x10            /* ram clear enable */
+#define DS_XCTRL4B_PRS  0x08            /* PAB resec select */
+#define DS_XCTRL4B_RIE  0x04            /* ram clear interrupt enable */
+#define DS_XCTRL4B_WFE  0x02            /* wake up alarm interrupt enable */
+#define DS_XCTRL4B_KFE  0x01            /* kickstart interrupt enable */
+
+/* interrupt enable bits */
+#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
+
+#endif /* __LINUX_DS17287RTC_H */
diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h
new file mode 100644
index 000000000000..a83cdd1cafc9
--- /dev/null
+++ b/include/linux/ds1742rtc.h
@@ -0,0 +1,53 @@
+/*
+ * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
+ *
+ * Copyright (C) 1999-2001 Toshiba Corporation
+ * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * Permission is hereby granted to copy, modify and redistribute this code
+ * in terms of the GNU Library General Public License, Version 2 or later,
+ * at your option.
+ */
+#ifndef __LINUX_DS1742RTC_H
+#define __LINUX_DS1742RTC_H
+
+#include <asm/ds1742.h>
+
+#define RTC_BRAM_SIZE           0x800
+#define RTC_OFFSET              0x7f8
+
+/*
+ * Register summary
+ */
+#define RTC_CONTROL             (RTC_OFFSET + 0)
+#define RTC_CENTURY             (RTC_OFFSET + 0)
+#define RTC_SECONDS             (RTC_OFFSET + 1)
+#define RTC_MINUTES             (RTC_OFFSET + 2)
+#define RTC_HOURS               (RTC_OFFSET + 3)
+#define RTC_DAY                 (RTC_OFFSET + 4)
+#define RTC_DATE                (RTC_OFFSET + 5)
+#define RTC_MONTH               (RTC_OFFSET + 6)
+#define RTC_YEAR                (RTC_OFFSET + 7)
+
+#define RTC_CENTURY_MASK        0x3f
+#define RTC_SECONDS_MASK        0x7f
+#define RTC_DAY_MASK            0x07
+
+/*
+ * Bits in the Control/Century register
+ */
+#define RTC_WRITE               0x80
+#define RTC_READ                0x40
+
+/*
+ * Bits in the Seconds register
+ */
+#define RTC_STOP                0x80
+
+/*
+ * Bits in the Day register
+ */
+#define RTC_BATT_FLAG           0x80
+#define RTC_FREQ_TEST           0x40
+
+#endif /* __LINUX_DS1742RTC_H */
diff --git a/include/linux/ide.h b/include/linux/ide.h
index ac8b25fa6506..e99019057ba6 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1089,9 +1089,11 @@ enum {
 
 /*
  * Subdrivers support.
+ *
+ * The gendriver.owner field should be set to the module owner of this driver.
+ * The gendriver.name field should be set to the name of this driver
  */
 typedef struct ide_driver_s {
-        struct module                   *owner;
         const char                      *version;
         u8                              media;
         unsigned supports_dsc_overlap   : 1;
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 1013a42d10b1..0986d19be0b7 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -940,7 +940,9 @@ unsigned long max_sane_readahead(unsigned long nr);
 
 /* Do stack extension */
 extern int expand_stack(struct vm_area_struct *vma, unsigned long address);
+#ifdef CONFIG_IA64
 extern int expand_upwards(struct vm_area_struct *vma, unsigned long address);
+#endif
 
 /* Look up the first VMA which satisfies  addr < vm_end,  NULL if none. */
 extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d4c1c8fd2925..7b387faedb4d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1401,6 +1401,7 @@
 #define PCI_SUBDEVICE_ID_KEYSPAN_SX2    0x5334
 
 #define PCI_VENDOR_ID_MARVELL           0x11ab
+#define PCI_DEVICE_ID_MARVELL_GT64111   0x4146
 #define PCI_DEVICE_ID_MARVELL_GT64260   0x6430
 #define PCI_DEVICE_ID_MARVELL_MV64360   0x6460
 #define PCI_DEVICE_ID_MARVELL_MV64460   0x6480
diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h
index b93fd8c1d884..cde2f4f4f501 100644
--- a/include/net/ieee80211.h
+++ b/include/net/ieee80211.h
@@ -1042,7 +1042,7 @@ static inline u8 *ieee80211_get_payload(struct ieee80211_hdr *hdr)
         case IEEE80211_4ADDR_LEN:
                 return ((struct ieee80211_hdr_4addr *)hdr)->payload;
         }
-
+        return NULL;
 }
 
 static inline int ieee80211_is_ofdm_rate(u8 rate)