diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-i386/cpufeature.h | 4 | ||||
-rw-r--r-- | include/asm-x86_64/cpufeature.h | 14 |
2 files changed, 12 insertions, 6 deletions
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index e147cabd3bfe..ff1187e80c32 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h | |||
@@ -87,8 +87,8 @@ | |||
87 | #define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */ | 87 | #define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */ |
88 | 88 | ||
89 | /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */ | 89 | /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */ |
90 | #define X86_FEATURE_LAHF_LM (5*32+ 0) /* LAHF/SAHF in long mode */ | 90 | #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ |
91 | #define X86_FEATURE_CMP_LEGACY (5*32+ 1) /* If yes HyperThreading not valid */ | 91 | #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ |
92 | 92 | ||
93 | #define cpu_has(c, bit) test_bit(bit, (c)->x86_capability) | 93 | #define cpu_has(c, bit) test_bit(bit, (c)->x86_capability) |
94 | #define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability) | 94 | #define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability) |
diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h index e68ad97a6319..aea308c65709 100644 --- a/include/asm-x86_64/cpufeature.h +++ b/include/asm-x86_64/cpufeature.h | |||
@@ -7,7 +7,7 @@ | |||
7 | #ifndef __ASM_X8664_CPUFEATURE_H | 7 | #ifndef __ASM_X8664_CPUFEATURE_H |
8 | #define __ASM_X8664_CPUFEATURE_H | 8 | #define __ASM_X8664_CPUFEATURE_H |
9 | 9 | ||
10 | #define NCAPINTS 6 | 10 | #define NCAPINTS 7 /* N 32-bit words worth of info */ |
11 | 11 | ||
12 | /* Intel-defined CPU features, CPUID level 0x00000001, word 0 */ | 12 | /* Intel-defined CPU features, CPUID level 0x00000001, word 0 */ |
13 | #define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */ | 13 | #define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */ |
@@ -74,9 +74,15 @@ | |||
74 | #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ | 74 | #define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ |
75 | #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ | 75 | #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ |
76 | 76 | ||
77 | /* More extended AMD flags: CPUID level 0x80000001, ecx, word 5 */ | 77 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ |
78 | #define X86_FEATURE_LAHF_LM (5*32+ 0) /* LAHF/SAHF in long mode */ | 78 | #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ |
79 | #define X86_FEATURE_CMP_LEGACY (5*32+ 1) /* If yes HyperThreading not valid */ | 79 | #define X86_FEATURE_XSTORE_EN (5*32+ 3) /* on-CPU RNG enabled */ |
80 | #define X86_FEATURE_XCRYPT (5*32+ 6) /* on-CPU crypto (xcrypt insn) */ | ||
81 | #define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */ | ||
82 | |||
83 | /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */ | ||
84 | #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ | ||
85 | #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ | ||
80 | 86 | ||
81 | #define cpu_has(c, bit) test_bit(bit, (c)->x86_capability) | 87 | #define cpu_has(c, bit) test_bit(bit, (c)->x86_capability) |
82 | #define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability) | 88 | #define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability) |