25 files changed, 114 insertions, 201 deletions

diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index c054d7a9aaa7..efa1b8f7251d 100644
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -90,13 +90,27 @@ enum {
 extern __u8 isa_irq_to_vector_map[16];
 #define isa_irq_to_vector(x)    isa_irq_to_vector_map[(x)]
 
+struct irq_cfg {
+        ia64_vector vector;
+        cpumask_t domain;
+};
+extern spinlock_t vector_lock;
+extern struct irq_cfg irq_cfg[NR_IRQS];
+#define irq_to_domain(x)        irq_cfg[(x)].domain
+DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);
+
 extern struct hw_interrupt_type irq_type_ia64_lsapic;   /* CPU-internal interrupt controller */
 
+extern int bind_irq_vector(int irq, int vector, cpumask_t domain);
 extern int assign_irq_vector (int irq); /* allocate a free vector */
 extern void free_irq_vector (int vector);
 extern int reserve_irq_vector (int vector);
+extern void __setup_vector_irq(int cpu);
+extern int reassign_irq_vector(int irq, int cpu);
 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
 extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
+extern int check_irq_used (int irq);
+extern void destroy_and_reserve_irq (unsigned int irq);
 
 static inline void ia64_resend_irq(unsigned int vector)
 {
@@ -113,7 +127,7 @@ extern irq_desc_t irq_desc[NR_IRQS];
 static inline unsigned int
 __ia64_local_vector_to_irq (ia64_vector vec)
 {
-        return (unsigned int) vec;
+        return __get_cpu_var(vector_irq)[vec];
 }
 #endif
 
@@ -131,7 +145,7 @@ __ia64_local_vector_to_irq (ia64_vector vec)
 static inline ia64_vector
 irq_to_vector (int irq)
 {
-        return (ia64_vector) irq;
+        return irq_cfg[irq].vector;
 }
 
 /*
diff --git a/include/asm-ia64/iosapic.h b/include/asm-ia64/iosapic.h
index 421cb6b62a7c..b8f712859140 100644
--- a/include/asm-ia64/iosapic.h
+++ b/include/asm-ia64/iosapic.h
@@ -47,19 +47,21 @@
 #define IOSAPIC_MASK_SHIFT              16
 #define IOSAPIC_MASK                    (1<<IOSAPIC_MASK_SHIFT)
 
+#define IOSAPIC_VECTOR_MASK             0xffffff00
+
 #ifndef __ASSEMBLY__
 
 #ifdef CONFIG_IOSAPIC
 
 #define NR_IOSAPICS                     256
 
-static inline unsigned int iosapic_read(char __iomem *iosapic, unsigned int reg)
+static inline unsigned int __iosapic_read(char __iomem *iosapic, unsigned int reg)
 {
         writel(reg, iosapic + IOSAPIC_REG_SELECT);
         return readl(iosapic + IOSAPIC_WINDOW);
 }
 
-static inline void iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
+static inline void __iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
 {
         writel(reg, iosapic + IOSAPIC_REG_SELECT);
         writel(val, iosapic + IOSAPIC_WINDOW);
diff --git a/include/asm-ia64/irq.h b/include/asm-ia64/irq.h
index 67221615e317..35b360b82e43 100644
--- a/include/asm-ia64/irq.h
+++ b/include/asm-ia64/irq.h
@@ -14,8 +14,13 @@
 #include <linux/types.h>
 #include <linux/cpumask.h>
 
-#define NR_IRQS         256
-#define NR_IRQ_VECTORS  NR_IRQS
+#define NR_VECTORS      256
+
+#if (NR_VECTORS + 32 * NR_CPUS) < 1024
+#define NR_IRQS (NR_VECTORS + 32 * NR_CPUS)
+#else
+#define NR_IRQS 1024
+#endif
 
 static __inline__ int
 irq_canonicalize (int irq)
diff --git a/include/asm-ia64/rwsem.h b/include/asm-ia64/rwsem.h
index 2d1640cc240a..8aba06a7b038 100644
--- a/include/asm-ia64/rwsem.h
+++ b/include/asm-ia64/rwsem.h
@@ -21,6 +21,10 @@
 #ifndef _ASM_IA64_RWSEM_H
 #define _ASM_IA64_RWSEM_H
 
+#ifndef _LINUX_RWSEM_H
+#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
+#endif
+
 #include <linux/list.h>
 #include <linux/spinlock.h>
 
diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h
index 441c9e001776..315f8de950a2 100644
--- a/include/asm-ia64/unistd.h
+++ b/include/asm-ia64/unistd.h
@@ -292,7 +292,7 @@
 #define __NR_sync_file_range            1300
 #define __NR_tee                        1301
 #define __NR_vmsplice                   1302
-/* 1303 reserved for move_pages */
+#define __NR_fallocate                  1303
 #define __NR_getcpu                     1304
 #define __NR_epoll_pwait                1305
 #define __NR_utimensat                  1306
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 1b60624dab7e..7d8003769a44 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -138,7 +138,7 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
 {
         unsigned long result;
 
-        smp_mb();
+        smp_llsc_mb();
 
         if (cpu_has_llsc && R10000_LLSC_WAR) {
                 unsigned long temp;
@@ -181,7 +181,7 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return result;
 }
@@ -190,7 +190,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 {
         unsigned long result;
 
-        smp_mb();
+        smp_llsc_mb();
 
         if (cpu_has_llsc && R10000_LLSC_WAR) {
                 unsigned long temp;
@@ -233,7 +233,7 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return result;
 }
@@ -250,7 +250,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
 {
         unsigned long result;
 
-        smp_mb();
+        smp_llsc_mb();
 
         if (cpu_has_llsc && R10000_LLSC_WAR) {
                 unsigned long temp;
@@ -302,7 +302,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return result;
 }
@@ -519,7 +519,7 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
 {
         unsigned long result;
 
-        smp_mb();
+        smp_llsc_mb();
 
         if (cpu_has_llsc && R10000_LLSC_WAR) {
                 unsigned long temp;
@@ -562,7 +562,7 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return result;
 }
@@ -571,7 +571,7 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
 {
         unsigned long result;
 
-        smp_mb();
+        smp_llsc_mb();
 
         if (cpu_has_llsc && R10000_LLSC_WAR) {
                 unsigned long temp;
@@ -614,7 +614,7 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return result;
 }
@@ -631,7 +631,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
 {
         unsigned long result;
 
-        smp_mb();
+        smp_llsc_mb();
 
         if (cpu_has_llsc && R10000_LLSC_WAR) {
                 unsigned long temp;
@@ -683,7 +683,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return result;
 }
@@ -791,10 +791,11 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
  * atomic*_return operations are serializing but not the non-*_return
  * versions.
  */
-#define smp_mb__before_atomic_dec()     smp_mb()
-#define smp_mb__after_atomic_dec()      smp_mb()
-#define smp_mb__before_atomic_inc()     smp_mb()
-#define smp_mb__after_atomic_inc()      smp_mb()
+#define smp_mb__before_atomic_dec()     smp_llsc_mb()
+#define smp_mb__after_atomic_dec()      smp_llsc_mb()
+#define smp_mb__before_atomic_inc()     smp_llsc_mb()
+#define smp_mb__after_atomic_inc()      smp_llsc_mb()
 
 #include <asm-generic/atomic.h>
+
 #endif /* _ASM_ATOMIC_H */
diff --git a/include/asm-mips/barrier.h b/include/asm-mips/barrier.h
index ed82631b0017..9d8cfbb5e796 100644
--- a/include/asm-mips/barrier.h
+++ b/include/asm-mips/barrier.h
@@ -121,6 +121,11 @@
 #else
 #define __WEAK_ORDERING_MB      "               \n"
 #endif
+#if defined(CONFIG_WEAK_REORDERING_BEYOND_LLSC) && defined(CONFIG_SMP)
+#define __WEAK_LLSC_MB          "       sync    \n"
+#else
+#define __WEAK_LLSC_MB          "               \n"
+#endif
 
 #define smp_mb()        __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory")
 #define smp_rmb()       __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory")
@@ -129,4 +134,8 @@
 #define set_mb(var, value) \
         do { var = value; smp_mb(); } while (0)
 
+#define smp_llsc_mb()   __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")
+#define smp_llsc_rmb()  __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")
+#define smp_llsc_wmb()  __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory")
+
 #endif /* __ASM_BARRIER_H */
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index d9e81af53f78..148bc79557f1 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -38,8 +38,8 @@
 /*
  * clear_bit() doesn't provide any barrier for the compiler.
  */
-#define smp_mb__before_clear_bit()      smp_mb()
-#define smp_mb__after_clear_bit()       smp_mb()
+#define smp_mb__before_clear_bit()      smp_llsc_mb()
+#define smp_mb__after_clear_bit()       smp_llsc_mb()
 
 /*
  * set_bit - Atomically set a bit in memory
@@ -289,7 +289,7 @@ static inline int test_and_set_bit(unsigned long nr,
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return res != 0;
 }
@@ -377,7 +377,7 @@ static inline int test_and_clear_bit(unsigned long nr,
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return res != 0;
 }
@@ -445,7 +445,7 @@ static inline int test_and_change_bit(unsigned long nr,
                 raw_local_irq_restore(flags);
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return res != 0;
 }
diff --git a/include/asm-mips/ds1216.h b/include/asm-mips/ds1216.h
deleted file mode 100644
index 1ff8b73f7a6a..000000000000
--- a/include/asm-mips/ds1216.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef _DS1216_H
-#define _DS1216_H
-
-extern volatile unsigned char *ds1216_base;
-unsigned long ds1216_get_cmos_time(void);
-int ds1216_set_rtc_mmss(unsigned long nowtime);
-
-#define DS1216_SEC_BYTE         1
-#define DS1216_MIN_BYTE         2
-#define DS1216_HOUR_BYTE        3
-#define DS1216_HOUR_MASK        (0x1f)
-#define DS1216_AMPM_MASK        (1<<5)
-#define DS1216_1224_MASK        (1<<7)
-#define DS1216_DAY_BYTE         4
-#define DS1216_DAY_MASK         (0x7)
-#define DS1216_DATE_BYTE        5
-#define DS1216_DATE_MASK        (0x3f)
-#define DS1216_MONTH_BYTE       6
-#define DS1216_MONTH_MASK       (0x1f)
-#define DS1216_YEAR_BYTE        7
-
-#define DS1216_SEC(buf)         (buf[DS1216_SEC_BYTE])
-#define DS1216_MIN(buf)         (buf[DS1216_MIN_BYTE])
-#define DS1216_HOUR(buf)        (buf[DS1216_HOUR_BYTE] & DS1216_HOUR_MASK)
-#define DS1216_AMPM(buf)        (buf[DS1216_HOUR_BYTE] & DS1216_AMPM_MASK)
-#define DS1216_1224(buf)        (buf[DS1216_HOUR_BYTE] & DS1216_1224_MASK)
-#define DS1216_DATE(buf)        (buf[DS1216_DATE_BYTE] & DS1216_DATE_MASK)
-#define DS1216_MONTH(buf)       (buf[DS1216_MONTH_BYTE] & DS1216_MONTH_MASK)
-#define DS1216_YEAR(buf)        (buf[DS1216_YEAR_BYTE])
-
-#endif
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index 47e5679c2353..b623882bce19 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -29,7 +29,7 @@
                 "       .set    mips3                           \n"     \
                 "2:     sc      $1, %2                          \n"     \
                 "       beqzl   $1, 1b                          \n"     \
-                __WEAK_ORDERING_MB                                      \
+                __WEAK_LLSC_MB                                          \
                 "3:                                             \n"     \
                 "       .set    pop                             \n"     \
                 "       .set    mips0                           \n"     \
@@ -55,7 +55,7 @@
                 "       .set    mips3                           \n"     \
                 "2:     sc      $1, %2                          \n"     \
                 "       beqz    $1, 1b                          \n"     \
-                __WEAK_ORDERING_MB                                      \
+                __WEAK_LLSC_MB                                          \
                 "3:                                             \n"     \
                 "       .set    pop                             \n"     \
                 "       .set    mips0                           \n"     \
@@ -152,7 +152,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
                 "       .set    mips3                                   \n"
                 "2:     sc      $1, %1                                  \n"
                 "       beqzl   $1, 1b                                  \n"
-                __WEAK_ORDERING_MB
+                __WEAK_LLSC_MB
                 "3:                                                     \n"
                 "       .set    pop                                     \n"
                 "       .section .fixup,\"ax\"                          \n"
@@ -179,7 +179,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
                 "       .set    mips3                                   \n"
                 "2:     sc      $1, %1                                  \n"
                 "       beqz    $1, 1b                                  \n"
-                __WEAK_ORDERING_MB
+                __WEAK_LLSC_MB
                 "3:                                                     \n"
                 "       .set    pop                                     \n"
                 "       .section .fixup,\"ax\"                          \n"
diff --git a/include/asm-mips/gfx.h b/include/asm-mips/gfx.h
deleted file mode 100644
index 37235e41a6fd..000000000000
--- a/include/asm-mips/gfx.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * This is the user-visible SGI GFX interface.
- *
- * This must be used verbatim into the GNU libc.  It does not include
- * any kernel-only bits on it.
- *
- * miguel@nuclecu.unam.mx
- */
-#ifndef _ASM_GFX_H
-#define _ASM_GFX_H
-
-/* The iocls, yes, they do not make sense, but such is life */
-#define GFX_BASE             100
-#define GFX_GETNUM_BOARDS    (GFX_BASE + 1)
-#define GFX_GETBOARD_INFO    (GFX_BASE + 2)
-#define GFX_ATTACH_BOARD     (GFX_BASE + 3)
-#define GFX_DETACH_BOARD     (GFX_BASE + 4)
-#define GFX_IS_MANAGED       (GFX_BASE + 5)
-
-#define GFX_MAPALL           (GFX_BASE + 10)
-#define GFX_LABEL            (GFX_BASE + 11)
-
-#define GFX_INFO_NAME_SIZE  16
-#define GFX_INFO_LABEL_SIZE 16
-
-struct gfx_info {
-        char name  [GFX_INFO_NAME_SIZE];  /* board name */
-        char label [GFX_INFO_LABEL_SIZE]; /* label name */
-        unsigned short int xpmax, ypmax;  /* screen resolution */
-        unsigned int lenght;              /* size of a complete gfx_info for this board */
-};
-
-struct gfx_getboardinfo_args {
-        unsigned int board;     /* board number.  starting from zero */
-        void *buf;              /* pointer to gfx_info */
-        unsigned int len;       /* buffer size of buf */
-};
-
-struct gfx_attach_board_args {
-        unsigned int board;     /* board number, starting from zero */
-        void        *vaddr;     /* address where the board registers should be mapped */
-};
-
-#ifdef __KERNEL__
-/* umap.c */
-extern void remove_mapping (struct vm_area_struct *vma, struct task_struct *, unsigned long, unsigned long);
-extern void *vmalloc_uncached (unsigned long size);
-extern int vmap_page_range (struct vm_area_struct *vma, unsigned long from, unsigned long size, unsigned long vaddr);
-#endif
-
-#endif /* _ASM_GFX_H */
diff --git a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
index c6dfa59d1986..d38f069d9e95 100644
--- a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2006, 07 Ralf Baechle (ralf@linux-mips.org)
  */
 #ifndef __ASM_COBALT_CPU_FEATURE_OVERRIDES_H
 #define __ASM_COBALT_CPU_FEATURE_OVERRIDES_H
@@ -46,6 +46,8 @@
 #define cpu_has_ic_fills_f_dc   0
 #define cpu_icache_snoops_remote_store  0
 #define cpu_has_dsp             0
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
 
 #define cpu_has_mips32r1        0
 #define cpu_has_mips32r2        0
diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/include/asm-mips/mach-excite/cpu-feature-overrides.h
index 0d31854222f9..07f4322c235d 100644
--- a/include/asm-mips/mach-excite/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-excite/cpu-feature-overrides.h
@@ -4,6 +4,7 @@
  * for more details.
  *
  * Copyright (C) 2004 Thomas Koeller <thomas.koeller@baslerweb.com>
+ * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
  */
 #ifndef __ASM_MACH_EXCITE_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_EXCITE_CPU_FEATURE_OVERRIDES_H
@@ -27,6 +28,8 @@
 #define cpu_has_ic_fills_f_dc   0
 #define cpu_has_dsp             0
 #define cpu_icache_snoops_remote_store  0
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
 
 #define cpu_has_nofpuex         0
 #define cpu_has_64bits          1
diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
index f7c5dc8a5336..9c8735158da1 100644
--- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003 Ralf Baechle
+ * Copyright (C) 2003, 07 Ralf Baechle
  */
 #ifndef __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H
@@ -30,6 +30,8 @@
 #define cpu_has_ic_fills_f_dc   0
 
 #define cpu_has_dsp             0
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
 
 #define cpu_has_nofpuex         0
 #define cpu_has_64bits          1
diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
index a071974b67bb..fe076380c189 100644
--- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003 Ralf Baechle
+ * Copyright (C) 2003, 07 Ralf Baechle
  */
 #ifndef __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H
@@ -27,6 +27,8 @@
 #define cpu_has_ic_fills_f_dc   0
 #define cpu_has_dsp             0
 #define cpu_icache_snoops_remote_store  1
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
 
 #define cpu_has_nofpuex         0
 #define cpu_has_64bits          1
diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
index 2a3de092bf13..6782fccebe8d 100644
--- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
@@ -4,7 +4,7 @@
  * for more details.
  *
  * Copyright (C) 2005 Ilya A. Volynets-Evenbakh
- * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2005, 07 Ralf Baechle (ralf@linux-mips.org)
  */
 #ifndef __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
@@ -38,6 +38,8 @@
 #define cpu_has_ic_fills_f_dc   0
 #define cpu_has_dsp             0
 #define cpu_has_4k_cache        1
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
 
 
 #define cpu_has_mips32r1        0
diff --git a/include/asm-mips/mach-qemu/cpu-feature-overrides.h b/include/asm-mips/mach-qemu/cpu-feature-overrides.h
index 529445dacedb..d2daaed235d5 100644
--- a/include/asm-mips/mach-qemu/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-qemu/cpu-feature-overrides.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003 Ralf Baechle
+ * Copyright (C) 2003, 07 Ralf Baechle
  */
 #ifndef __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H
@@ -24,6 +24,7 @@
 #define cpu_has_ic_fills_f_dc   0
 
 #define cpu_has_dsp             0
+#define cpu_has_mipsmt          0
 
 #define cpu_has_nofpuex         0
 #define cpu_has_64bits          0
diff --git a/include/asm-mips/mach-rm/cpu-feature-overrides.h b/include/asm-mips/mach-rm/cpu-feature-overrides.h
index 7e07283140a3..ccf543363537 100644
--- a/include/asm-mips/mach-rm/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-rm/cpu-feature-overrides.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org)
  *
  * SNI RM200 C apparently was only shipped with R4600 V2.0 and R5000 processors.
  */
@@ -32,6 +32,8 @@
 #define cpu_has_dsp             0
 #define cpu_has_nofpuex         0
 #define cpu_has_64bits          1
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
 
 #define cpu_has_mips32r1        0
 #define cpu_has_mips32r2        0
diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
index a25968f277a2..63d5bf649af1 100644
--- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org)
  */
 #ifndef __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
@@ -26,6 +26,8 @@
 #define cpu_has_dc_aliases      0
 #define cpu_has_ic_fills_f_dc   0
 #define cpu_has_dsp             0
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
 #define cpu_icache_snoops_remote_store  0
 
 #define cpu_has_nofpuex         0
diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
index 42cebb7ce7a6..470e5e9e10d6 100644
--- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2003, 2004 Ralf Baechle
+ * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org)
  */
 #ifndef __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H
 #define __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H
@@ -26,6 +26,8 @@
 #define cpu_has_dc_aliases      0
 #define cpu_has_ic_fills_f_dc   0
 #define cpu_has_dsp             0
+#define cpu_has_mipsmt          0
+#define cpu_has_userlocal       0
 #define cpu_icache_snoops_remote_store  0
 
 #define cpu_has_nofpuex         0
diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h
index 35e431cd796b..bb897016c491 100644
--- a/include/asm-mips/spinlock.h
+++ b/include/asm-mips/spinlock.h
@@ -67,7 +67,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
                 : "memory");
         }
 
-        smp_mb();
+        smp_llsc_mb();
 }
 
 static inline void __raw_spin_unlock(raw_spinlock_t *lock)
@@ -118,7 +118,7 @@ static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock)
                 : "memory");
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return res == 0;
 }
@@ -183,7 +183,7 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
                 : "memory");
         }
 
-        smp_mb();
+        smp_llsc_mb();
 }
 
 /* Note the use of sub, not subu which will make the kernel die with an
@@ -193,7 +193,7 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
 {
         unsigned int tmp;
 
-        smp_mb();
+        smp_llsc_mb();
 
         if (R10000_LLSC_WAR) {
                 __asm__ __volatile__(
@@ -262,7 +262,7 @@ static inline void __raw_write_lock(raw_rwlock_t *rw)
                 : "memory");
         }
 
-        smp_mb();
+        smp_llsc_mb();
 }
 
 static inline void __raw_write_unlock(raw_rwlock_t *rw)
@@ -293,7 +293,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *rw)
                 "       .set    reorder                                 \n"
                 "       beqzl   %1, 1b                                  \n"
                 "        nop                                            \n"
-                __WEAK_ORDERING_MB
+                __WEAK_LLSC_MB
                 "       li      %2, 1                                   \n"
                 "2:                                                     \n"
                 : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
@@ -310,7 +310,7 @@ static inline int __raw_read_trylock(raw_rwlock_t *rw)
                 "       beqz    %1, 1b                                  \n"
                 "        nop                                            \n"
                 "       .set    reorder                                 \n"
-                __WEAK_ORDERING_MB
+                __WEAK_LLSC_MB
                 "       li      %2, 1                                   \n"
                 "2:                                                     \n"
                 : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
@@ -336,7 +336,7 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw)
                 "       sc      %1, %0                                  \n"
                 "       beqzl   %1, 1b                                  \n"
                 "        nop                                            \n"
-                __WEAK_ORDERING_MB
+                __WEAK_LLSC_MB
                 "       li      %2, 1                                   \n"
                 "       .set    reorder                                 \n"
                 "2:                                                     \n"
@@ -354,7 +354,7 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw)
                 "       beqz    %1, 3f                                  \n"
                 "        li     %2, 1                                   \n"
                 "2:                                                     \n"
-                __WEAK_ORDERING_MB
+                __WEAK_LLSC_MB
                 "       .subsection 2                                   \n"
                 "3:     b       1b                                      \n"
                 "        li     %2, 0                                   \n"
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 76339165bc20..8d0b1cd4a45e 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -117,7 +117,7 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
                 raw_local_irq_restore(flags);   /* implies memory barrier  */
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return retval;
 }
@@ -165,7 +165,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
                 raw_local_irq_restore(flags);   /* implies memory barrier  */
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return retval;
 }
@@ -246,7 +246,7 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
                 raw_local_irq_restore(flags);   /* implies memory barrier  */
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return retval;
 }
@@ -352,7 +352,7 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
                 raw_local_irq_restore(flags);   /* implies memory barrier  */
         }
 
-        smp_mb();
+        smp_llsc_mb();
 
         return retval;
 }
@@ -470,6 +470,6 @@ extern int stop_a_enabled;
  */
 #define __ARCH_WANT_UNLOCKED_CTXSW
 
-#define arch_align_stack(x) (x)
+extern unsigned long arch_align_stack(unsigned long sp);
 
 #endif /* _ASM_SYSTEM_H */
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index bf297b03a4e4..16ea3374dddf 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -67,6 +67,12 @@ struct clocksource {
         unsigned long flags;
         cycle_t (*vread)(void);
         void (*resume)(void);
+#ifdef CONFIG_IA64
+        void *fsys_mmio;        /* used by fsyscall asm code */
+#define CLKSRC_FSYS_MMIO_SET(mmio, addr)      ((mmio) = (addr))
+#else
+#define CLKSRC_FSYS_MMIO_SET(mmio, addr)      do { } while (0)
+#endif
 
         /* timekeeping specific data, ignore */
         cycle_t cycle_interval;
diff --git a/include/linux/slab.h b/include/linux/slab.h
index 7d0ecc1659f0..d859354b9e51 100644
--- a/include/linux/slab.h
+++ b/include/linux/slab.h
@@ -40,7 +40,7 @@
  */
 #define ZERO_SIZE_PTR ((void *)16)
 
-#define ZERO_OR_NULL_PTR(x) ((unsigned long)(x) < \
+#define ZERO_OR_NULL_PTR(x) ((unsigned long)(x) <= \
                                 (unsigned long)ZERO_SIZE_PTR)
 
 /*
diff --git a/include/linux/timex.h b/include/linux/timex.h
index da929dbbea2a..37ac3ff90faf 100644
--- a/include/linux/timex.h
+++ b/include/linux/timex.h
@@ -224,66 +224,6 @@ static inline int ntp_synced(void)
         __x < 0 ? -(-__x >> __s) : __x >> __s;  \
 })
 
-
-#ifdef CONFIG_TIME_INTERPOLATION
-
-#define TIME_SOURCE_CPU 0
-#define TIME_SOURCE_MMIO64 1
-#define TIME_SOURCE_MMIO32 2
-#define TIME_SOURCE_FUNCTION 3
-
-/* For proper operations time_interpolator clocks must run slightly slower
- * than the standard clock since the interpolator may only correct by having
- * time jump forward during a tick. A slower clock is usually a side effect
- * of the integer divide of the nanoseconds in a second by the frequency.
- * The accuracy of the division can be increased by specifying a shift.
- * However, this may cause the clock not to be slow enough.
- * The interpolator will self-tune the clock by slowing down if no
- * resets occur or speeding up if the time jumps per analysis cycle
- * become too high.
- *
- * Setting jitter compensates for a fluctuating timesource by comparing
- * to the last value read from the timesource to insure that an earlier value
- * is not returned by a later call. The price to pay
- * for the compensation is that the timer routines are not as scalable anymore.
- */
-
-struct time_interpolator {
-        u16 source;                     /* time source flags */
-        u8 shift;                       /* increases accuracy of multiply by shifting. */
-                                /* Note that bits may be lost if shift is set too high */
-        u8 jitter;                      /* if set compensate for fluctuations */
-        u32 nsec_per_cyc;               /* set by register_time_interpolator() */
-        void *addr;                     /* address of counter or function */
-        cycles_t mask;                  /* mask the valid bits of the counter */
-        unsigned long offset;           /* nsec offset at last update of interpolator */
-        u64 last_counter;               /* counter value in units of the counter at last update */
-        cycles_t last_cycle;            /* Last timer value if TIME_SOURCE_JITTER is set */
-        u64 frequency;                  /* frequency in counts/second */
-        long drift;                     /* drift in parts-per-million (or -1) */
-        unsigned long skips;            /* skips forward */
-        unsigned long ns_skipped;       /* nanoseconds skipped */
-        struct time_interpolator *next;
-};
-
-extern void register_time_interpolator(struct time_interpolator *);
-extern void unregister_time_interpolator(struct time_interpolator *);
-extern void time_interpolator_reset(void);
-extern unsigned long time_interpolator_get_offset(void);
-extern void time_interpolator_update(long delta_nsec);
-
-#else /* !CONFIG_TIME_INTERPOLATION */
-
-static inline void time_interpolator_reset(void)
-{
-}
-
-static inline void time_interpolator_update(long delta_nsec)
-{
-}
-
-#endif /* !CONFIG_TIME_INTERPOLATION */
-
 #define TICK_LENGTH_SHIFT       32
 
 #ifdef CONFIG_NO_HZ