diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-parisc/grfioctl.h | 2 | ||||
-rw-r--r-- | include/asm-parisc/pci.h | 15 |
2 files changed, 14 insertions, 3 deletions
diff --git a/include/asm-parisc/grfioctl.h b/include/asm-parisc/grfioctl.h index 6a910311b56b..671e06042b40 100644 --- a/include/asm-parisc/grfioctl.h +++ b/include/asm-parisc/grfioctl.h | |||
@@ -58,7 +58,7 @@ | |||
58 | #define CRT_ID_ELK_1024DB 0x27849CA5 /* Elk 1024x768 double buffer */ | 58 | #define CRT_ID_ELK_1024DB 0x27849CA5 /* Elk 1024x768 double buffer */ |
59 | #define CRT_ID_ELK_GS S9000_ID_A1924A /* Elk 1280x1024 GreyScale */ | 59 | #define CRT_ID_ELK_GS S9000_ID_A1924A /* Elk 1280x1024 GreyScale */ |
60 | #define CRT_ID_CRX24 S9000_ID_A1439A /* Piranha */ | 60 | #define CRT_ID_CRX24 S9000_ID_A1439A /* Piranha */ |
61 | #define CRT_ID_VISUALIZE_EG 0x2D08C0A7 /* Graffiti (built-in B132+/B160L) */ | 61 | #define CRT_ID_VISUALIZE_EG 0x2D08C0A7 /* Graffiti, A4450A (built-in B132+/B160L) */ |
62 | #define CRT_ID_THUNDER 0x2F23E5FC /* Thunder 1 VISUALIZE 48*/ | 62 | #define CRT_ID_THUNDER 0x2F23E5FC /* Thunder 1 VISUALIZE 48*/ |
63 | #define CRT_ID_THUNDER2 0x2F8D570E /* Thunder 2 VISUALIZE 48 XP*/ | 63 | #define CRT_ID_THUNDER2 0x2F8D570E /* Thunder 2 VISUALIZE 48 XP*/ |
64 | #define CRT_ID_HCRX S9000_ID_HCRX /* Hyperdrive HCRX */ | 64 | #define CRT_ID_HCRX S9000_ID_HCRX /* Hyperdrive HCRX */ |
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index f277254159b7..4c5e15ea3a02 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h | |||
@@ -18,6 +18,18 @@ | |||
18 | */ | 18 | */ |
19 | #define PCI_MAX_BUSSES 256 | 19 | #define PCI_MAX_BUSSES 256 |
20 | 20 | ||
21 | |||
22 | /* To be used as: mdelay(pci_post_reset_delay); | ||
23 | * | ||
24 | * post_reset is the time the kernel should stall to prevent anyone from | ||
25 | * accessing the PCI bus once #RESET is de-asserted. | ||
26 | * PCI spec somewhere says 1 second but with multi-PCI bus systems, | ||
27 | * this makes the boot time much longer than necessary. | ||
28 | * 20ms seems to work for all the HP PCI implementations to date. | ||
29 | */ | ||
30 | #define pci_post_reset_delay 50 | ||
31 | |||
32 | |||
21 | /* | 33 | /* |
22 | ** pci_hba_data (aka H2P_OBJECT in HP/UX) | 34 | ** pci_hba_data (aka H2P_OBJECT in HP/UX) |
23 | ** | 35 | ** |
@@ -83,7 +95,7 @@ static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a) | |||
83 | 95 | ||
84 | /* | 96 | /* |
85 | ** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses. | 97 | ** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses. |
86 | ** See pcibios.c for more conversions used by Generic PCI code. | 98 | ** See pci.c for more conversions used by Generic PCI code. |
87 | ** | 99 | ** |
88 | ** Platform characteristics/firmware guarantee that | 100 | ** Platform characteristics/firmware guarantee that |
89 | ** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO | 101 | ** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO |
@@ -191,7 +203,6 @@ struct pci_bios_ops { | |||
191 | */ | 203 | */ |
192 | extern struct pci_port_ops *pci_port; | 204 | extern struct pci_port_ops *pci_port; |
193 | extern struct pci_bios_ops *pci_bios; | 205 | extern struct pci_bios_ops *pci_bios; |
194 | extern int pci_post_reset_delay; /* delay after de-asserting #RESET */ | ||
195 | extern int pci_hba_count; | 206 | extern int pci_hba_count; |
196 | extern struct pci_hba_data *parisc_pci_hba[]; | 207 | extern struct pci_hba_data *parisc_pci_hba[]; |
197 | 208 | ||