aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/Kbuild3
-rw-r--r--include/asm-arm/a.out-core.h49
-rw-r--r--include/asm-arm/a.out.h34
-rw-r--r--include/asm-arm/arch-ns9xxx/debug-macro.S2
-rw-r--r--include/asm-arm/arch-ns9xxx/entry-macro.S2
-rw-r--r--include/asm-arm/arch-ns9xxx/processor.h2
-rw-r--r--include/asm-arm/arch-ns9xxx/system.h4
-rw-r--r--include/asm-arm/arch-omap/board.h2
-rw-r--r--include/asm-arm/assembler.h116
-rw-r--r--include/asm-arm/atomic.h212
-rw-r--r--include/asm-arm/auxvec.h4
-rw-r--r--include/asm-arm/bitops.h340
-rw-r--r--include/asm-arm/bug.h24
-rw-r--r--include/asm-arm/bugs.h21
-rw-r--r--include/asm-arm/byteorder.h58
-rw-r--r--include/asm-arm/cache.h10
-rw-r--r--include/asm-arm/cacheflush.h537
-rw-r--r--include/asm-arm/checksum.h139
-rw-r--r--include/asm-arm/cnt32_to_63.h78
-rw-r--r--include/asm-arm/cpu-multi32.h69
-rw-r--r--include/asm-arm/cpu-single.h44
-rw-r--r--include/asm-arm/cpu.h25
-rw-r--r--include/asm-arm/cputime.h6
-rw-r--r--include/asm-arm/current.h15
-rw-r--r--include/asm-arm/delay.h44
-rw-r--r--include/asm-arm/device.h15
-rw-r--r--include/asm-arm/div64.h227
-rw-r--r--include/asm-arm/dma-mapping.h458
-rw-r--r--include/asm-arm/dma.h143
-rw-r--r--include/asm-arm/domain.h78
-rw-r--r--include/asm-arm/ecard.h219
-rw-r--r--include/asm-arm/elf.h116
-rw-r--r--include/asm-arm/emergency-restart.h6
-rw-r--r--include/asm-arm/errno.h6
-rw-r--r--include/asm-arm/fb.h19
-rw-r--r--include/asm-arm/fcntl.h11
-rw-r--r--include/asm-arm/fiq.h37
-rw-r--r--include/asm-arm/flat.h19
-rw-r--r--include/asm-arm/floppy.h148
-rw-r--r--include/asm-arm/fpstate.h93
-rw-r--r--include/asm-arm/ftrace.h14
-rw-r--r--include/asm-arm/futex.h6
-rw-r--r--include/asm-arm/glue.h149
-rw-r--r--include/asm-arm/gpio.h7
-rw-r--r--include/asm-arm/hardirq.h32
-rw-r--r--include/asm-arm/hardware.h18
-rw-r--r--include/asm-arm/hardware/arm_timer.h21
-rw-r--r--include/asm-arm/hardware/arm_twd.h21
-rw-r--r--include/asm-arm/hardware/cache-l2x0.h56
-rw-r--r--include/asm-arm/hardware/clps7111.h184
-rw-r--r--include/asm-arm/hardware/cs89712.h49
-rw-r--r--include/asm-arm/hardware/debug-8250.S29
-rw-r--r--include/asm-arm/hardware/debug-pl01x.S29
-rw-r--r--include/asm-arm/hardware/dec21285.h147
-rw-r--r--include/asm-arm/hardware/entry-macro-iomd.S139
-rw-r--r--include/asm-arm/hardware/ep7211.h40
-rw-r--r--include/asm-arm/hardware/ep7212.h83
-rw-r--r--include/asm-arm/hardware/gic.h42
-rw-r--r--include/asm-arm/hardware/icst307.h38
-rw-r--r--include/asm-arm/hardware/icst525.h36
-rw-r--r--include/asm-arm/hardware/ioc.h72
-rw-r--r--include/asm-arm/hardware/iomd.h226
-rw-r--r--include/asm-arm/hardware/iop3xx-adma.h888
-rw-r--r--include/asm-arm/hardware/iop3xx-gpio.h73
-rw-r--r--include/asm-arm/hardware/iop3xx.h312
-rw-r--r--include/asm-arm/hardware/iop_adma.h116
-rw-r--r--include/asm-arm/hardware/it8152.h99
-rw-r--r--include/asm-arm/hardware/linkup-l1110.h48
-rw-r--r--include/asm-arm/hardware/locomo.h217
-rw-r--r--include/asm-arm/hardware/memc.h26
-rw-r--r--include/asm-arm/hardware/pci_v3.h186
-rw-r--r--include/asm-arm/hardware/sa1111.h581
-rw-r--r--include/asm-arm/hardware/scoop.h69
-rw-r--r--include/asm-arm/hardware/sharpsl_pm.h106
-rw-r--r--include/asm-arm/hardware/ssp.h28
-rw-r--r--include/asm-arm/hardware/uengine.h62
-rw-r--r--include/asm-arm/hardware/vic.h45
-rw-r--r--include/asm-arm/hw_irq.h9
-rw-r--r--include/asm-arm/hwcap.h29
-rw-r--r--include/asm-arm/ide.h23
-rw-r--r--include/asm-arm/io.h287
-rw-r--r--include/asm-arm/ioctl.h1
-rw-r--r--include/asm-arm/ioctls.h84
-rw-r--r--include/asm-arm/ipcbuf.h29
-rw-r--r--include/asm-arm/irq.h28
-rw-r--r--include/asm-arm/irq_regs.h1
-rw-r--r--include/asm-arm/irqflags.h132
-rw-r--r--include/asm-arm/kdebug.h1
-rw-r--r--include/asm-arm/kexec.h31
-rw-r--r--include/asm-arm/kgdb.h104
-rw-r--r--include/asm-arm/kmap_types.h24
-rw-r--r--include/asm-arm/kprobes.h79
-rw-r--r--include/asm-arm/leds.h50
-rw-r--r--include/asm-arm/limits.h11
-rw-r--r--include/asm-arm/linkage.h11
-rw-r--r--include/asm-arm/local.h1
-rw-r--r--include/asm-arm/locks.h274
-rw-r--r--include/asm-arm/mach/arch.h60
-rw-r--r--include/asm-arm/mach/dma.h57
-rw-r--r--include/asm-arm/mach/flash.h39
-rw-r--r--include/asm-arm/mach/irda.h20
-rw-r--r--include/asm-arm/mach/irq.h54
-rw-r--r--include/asm-arm/mach/map.h36
-rw-r--r--include/asm-arm/mach/mmc.h15
-rw-r--r--include/asm-arm/mach/pci.h72
-rw-r--r--include/asm-arm/mach/serial_at91.h33
-rw-r--r--include/asm-arm/mach/serial_sa1100.h31
-rw-r--r--include/asm-arm/mach/sharpsl_param.h37
-rw-r--r--include/asm-arm/mach/time.h57
-rw-r--r--include/asm-arm/mach/udc_pxa2xx.h29
-rw-r--r--include/asm-arm/mc146818rtc.h28
-rw-r--r--include/asm-arm/memory.h334
-rw-r--r--include/asm-arm/mman.h17
-rw-r--r--include/asm-arm/mmu.h33
-rw-r--r--include/asm-arm/mmu_context.h117
-rw-r--r--include/asm-arm/mmzone.h30
-rw-r--r--include/asm-arm/module.h18
-rw-r--r--include/asm-arm/msgbuf.h31
-rw-r--r--include/asm-arm/mtd-xip.h26
-rw-r--r--include/asm-arm/mutex.h127
-rw-r--r--include/asm-arm/nwflash.h9
-rw-r--r--include/asm-arm/page-nommu.h49
-rw-r--r--include/asm-arm/page.h199
-rw-r--r--include/asm-arm/param.h31
-rw-r--r--include/asm-arm/parport.h18
-rw-r--r--include/asm-arm/pci.h91
-rw-r--r--include/asm-arm/percpu.h6
-rw-r--r--include/asm-arm/pgalloc.h136
-rw-r--r--include/asm-arm/pgtable-hwdef.h90
-rw-r--r--include/asm-arm/pgtable-nommu.h118
-rw-r--r--include/asm-arm/pgtable.h401
-rw-r--r--include/asm-arm/poll.h1
-rw-r--r--include/asm-arm/posix_types.h77
-rw-r--r--include/asm-arm/proc-fns.h241
-rw-r--r--include/asm-arm/processor.h131
-rw-r--r--include/asm-arm/procinfo.h49
-rw-r--r--include/asm-arm/ptrace.h162
-rw-r--r--include/asm-arm/resource.h6
-rw-r--r--include/asm-arm/scatterlist.h27
-rw-r--r--include/asm-arm/sections.h1
-rw-r--r--include/asm-arm/segment.h11
-rw-r--r--include/asm-arm/sembuf.h25
-rw-r--r--include/asm-arm/serial.h19
-rw-r--r--include/asm-arm/setup.h226
-rw-r--r--include/asm-arm/shmbuf.h42
-rw-r--r--include/asm-arm/shmparam.h16
-rw-r--r--include/asm-arm/sigcontext.h34
-rw-r--r--include/asm-arm/siginfo.h6
-rw-r--r--include/asm-arm/signal.h164
-rw-r--r--include/asm-arm/sizes.h56
-rw-r--r--include/asm-arm/smp.h147
-rw-r--r--include/asm-arm/socket.h57
-rw-r--r--include/asm-arm/sockios.h13
-rw-r--r--include/asm-arm/sparsemem.h10
-rw-r--r--include/asm-arm/spinlock.h224
-rw-r--r--include/asm-arm/spinlock_types.h20
-rw-r--r--include/asm-arm/stat.h87
-rw-r--r--include/asm-arm/statfs.h42
-rw-r--r--include/asm-arm/string.h50
-rw-r--r--include/asm-arm/suspend.h4
-rw-r--r--include/asm-arm/system.h388
-rw-r--r--include/asm-arm/termbits.h197
-rw-r--r--include/asm-arm/termios.h92
-rw-r--r--include/asm-arm/therm.h28
-rw-r--r--include/asm-arm/thread_info.h153
-rw-r--r--include/asm-arm/thread_notify.h48
-rw-r--r--include/asm-arm/timex.h24
-rw-r--r--include/asm-arm/tlb.h94
-rw-r--r--include/asm-arm/tlbflush.h500
-rw-r--r--include/asm-arm/topology.h6
-rw-r--r--include/asm-arm/traps.h29
-rw-r--r--include/asm-arm/types.h31
-rw-r--r--include/asm-arm/uaccess.h444
-rw-r--r--include/asm-arm/ucontext.h103
-rw-r--r--include/asm-arm/unaligned.h19
-rw-r--r--include/asm-arm/unistd.h450
-rw-r--r--include/asm-arm/user.h84
-rw-r--r--include/asm-arm/vfp.h84
-rw-r--r--include/asm-arm/vfpmacros.h47
-rw-r--r--include/asm-arm/vga.h12
-rw-r--r--include/asm-arm/xor.h141
-rw-r--r--include/asm-m68k/contregs.h51
-rw-r--r--include/asm-m68k/fbio.h331
-rw-r--r--include/asm-m68k/idprom.h21
-rw-r--r--include/asm-s390/Kbuild15
-rw-r--r--include/asm-s390/airq.h19
-rw-r--r--include/asm-s390/appldata.h90
-rw-r--r--include/asm-s390/atomic.h285
-rw-r--r--include/asm-s390/auxvec.h4
-rw-r--r--include/asm-s390/bitops.h884
-rw-r--r--include/asm-s390/bug.h70
-rw-r--r--include/asm-s390/bugs.h22
-rw-r--r--include/asm-s390/byteorder.h125
-rw-r--r--include/asm-s390/cache.h19
-rw-r--r--include/asm-s390/cacheflush.h31
-rw-r--r--include/asm-s390/ccwdev.h192
-rw-r--r--include/asm-s390/ccwgroup.h69
-rw-r--r--include/asm-s390/checksum.h166
-rw-r--r--include/asm-s390/chpid.h56
-rw-r--r--include/asm-s390/chsc.h127
-rw-r--r--include/asm-s390/cio.h514
-rw-r--r--include/asm-s390/cmb.h58
-rw-r--r--include/asm-s390/compat.h233
-rw-r--r--include/asm-s390/cpcmd.h34
-rw-r--r--include/asm-s390/cpu.h33
-rw-r--r--include/asm-s390/cputime.h177
-rw-r--r--include/asm-s390/current.h23
-rw-r--r--include/asm-s390/dasd.h270
-rw-r--r--include/asm-s390/debug.h261
-rw-r--r--include/asm-s390/delay.h22
-rw-r--r--include/asm-s390/device.h7
-rw-r--r--include/asm-s390/diag.h39
-rw-r--r--include/asm-s390/div64.h1
-rw-r--r--include/asm-s390/dma.h16
-rw-r--r--include/asm-s390/ebcdic.h49
-rw-r--r--include/asm-s390/elf.h196
-rw-r--r--include/asm-s390/emergency-restart.h6
-rw-r--r--include/asm-s390/errno.h13
-rw-r--r--include/asm-s390/etr.h258
-rw-r--r--include/asm-s390/extmem.h33
-rw-r--r--include/asm-s390/fb.h12
-rw-r--r--include/asm-s390/fcntl.h1
-rw-r--r--include/asm-s390/fcx.h311
-rw-r--r--include/asm-s390/futex.h52
-rw-r--r--include/asm-s390/hardirq.h51
-rw-r--r--include/asm-s390/hugetlb.h184
-rw-r--r--include/asm-s390/idals.h256
-rw-r--r--include/asm-s390/io.h54
-rw-r--r--include/asm-s390/ioctl.h1
-rw-r--r--include/asm-s390/ioctls.h92
-rw-r--r--include/asm-s390/ipcbuf.h31
-rw-r--r--include/asm-s390/ipl.h168
-rw-r--r--include/asm-s390/irq.h23
-rw-r--r--include/asm-s390/irq_regs.h1
-rw-r--r--include/asm-s390/irqflags.h106
-rw-r--r--include/asm-s390/isc.h25
-rw-r--r--include/asm-s390/itcw.h30
-rw-r--r--include/asm-s390/kdebug.h27
-rw-r--r--include/asm-s390/kexec.h43
-rw-r--r--include/asm-s390/kmap_types.h23
-rw-r--r--include/asm-s390/kprobes.h103
-rw-r--r--include/asm-s390/kvm.h45
-rw-r--r--include/asm-s390/kvm_host.h235
-rw-r--r--include/asm-s390/kvm_para.h150
-rw-r--r--include/asm-s390/kvm_virtio.h63
-rw-r--r--include/asm-s390/linkage.h6
-rw-r--r--include/asm-s390/local.h1
-rw-r--r--include/asm-s390/lowcore.h433
-rw-r--r--include/asm-s390/mathemu.h29
-rw-r--r--include/asm-s390/mman.h25
-rw-r--r--include/asm-s390/mmu.h13
-rw-r--r--include/asm-s390/mmu_context.h77
-rw-r--r--include/asm-s390/module.h46
-rw-r--r--include/asm-s390/monwriter.h33
-rw-r--r--include/asm-s390/msgbuf.h37
-rw-r--r--include/asm-s390/mutex.h9
-rw-r--r--include/asm-s390/page.h155
-rw-r--r--include/asm-s390/param.h30
-rw-r--r--include/asm-s390/pci.h10
-rw-r--r--include/asm-s390/percpu.h37
-rw-r--r--include/asm-s390/pgalloc.h174
-rw-r--r--include/asm-s390/pgtable.h1093
-rw-r--r--include/asm-s390/poll.h1
-rw-r--r--include/asm-s390/posix_types.h111
-rw-r--r--include/asm-s390/processor.h360
-rw-r--r--include/asm-s390/ptrace.h499
-rw-r--r--include/asm-s390/qdio.h382
-rw-r--r--include/asm-s390/qeth.h78
-rw-r--r--include/asm-s390/reset.h21
-rw-r--r--include/asm-s390/resource.h15
-rw-r--r--include/asm-s390/rwsem.h387
-rw-r--r--include/asm-s390/s390_ext.h32
-rw-r--r--include/asm-s390/s390_rdev.h15
-rw-r--r--include/asm-s390/scatterlist.h19
-rw-r--r--include/asm-s390/schid.h32
-rw-r--r--include/asm-s390/sclp.h58
-rw-r--r--include/asm-s390/sections.h8
-rw-r--r--include/asm-s390/segment.h4
-rw-r--r--include/asm-s390/sembuf.h29
-rw-r--r--include/asm-s390/setup.h140
-rw-r--r--include/asm-s390/sfp-machine.h142
-rw-r--r--include/asm-s390/sfp-util.h77
-rw-r--r--include/asm-s390/shmbuf.h48
-rw-r--r--include/asm-s390/shmparam.h13
-rw-r--r--include/asm-s390/sigcontext.h71
-rw-r--r--include/asm-s390/siginfo.h18
-rw-r--r--include/asm-s390/signal.h172
-rw-r--r--include/asm-s390/sigp.h126
-rw-r--r--include/asm-s390/smp.h116
-rw-r--r--include/asm-s390/socket.h65
-rw-r--r--include/asm-s390/sockios.h21
-rw-r--r--include/asm-s390/sparsemem.h18
-rw-r--r--include/asm-s390/spinlock.h178
-rw-r--r--include/asm-s390/spinlock_types.h20
-rw-r--r--include/asm-s390/stat.h105
-rw-r--r--include/asm-s390/statfs.h71
-rw-r--r--include/asm-s390/string.h143
-rw-r--r--include/asm-s390/suspend.h5
-rw-r--r--include/asm-s390/sysinfo.h121
-rw-r--r--include/asm-s390/system.h462
-rw-r--r--include/asm-s390/tape390.h103
-rw-r--r--include/asm-s390/termbits.h206
-rw-r--r--include/asm-s390/termios.h67
-rw-r--r--include/asm-s390/thread_info.h118
-rw-r--r--include/asm-s390/timer.h65
-rw-r--r--include/asm-s390/timex.h88
-rw-r--r--include/asm-s390/tlb.h156
-rw-r--r--include/asm-s390/tlbflush.h140
-rw-r--r--include/asm-s390/todclk.h23
-rw-r--r--include/asm-s390/topology.h33
-rw-r--r--include/asm-s390/types.h63
-rw-r--r--include/asm-s390/uaccess.h363
-rw-r--r--include/asm-s390/ucontext.h20
-rw-r--r--include/asm-s390/unaligned.h13
-rw-r--r--include/asm-s390/unistd.h411
-rw-r--r--include/asm-s390/user.h76
-rw-r--r--include/asm-s390/vtoc.h203
-rw-r--r--include/asm-s390/xor.h1
-rw-r--r--include/asm-s390/zcrypt.h276
-rw-r--r--include/linux/ihex.h2
-rw-r--r--include/linux/mISDNif.h32
-rw-r--r--include/linux/parser.h2
-rw-r--r--include/linux/tracehook.h5
-rw-r--r--include/linux/vt_kern.h1
-rw-r--r--include/scsi/scsi_device.h3
325 files changed, 440 insertions, 31637 deletions
diff --git a/include/asm-arm/Kbuild b/include/asm-arm/Kbuild
deleted file mode 100644
index 73237bd130a2..000000000000
--- a/include/asm-arm/Kbuild
+++ /dev/null
@@ -1,3 +0,0 @@
1include include/asm-generic/Kbuild.asm
2
3unifdef-y += hwcap.h
diff --git a/include/asm-arm/a.out-core.h b/include/asm-arm/a.out-core.h
deleted file mode 100644
index 93d04acaa31f..000000000000
--- a/include/asm-arm/a.out-core.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_A_OUT_CORE_H
13#define _ASM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18#include <linux/elfcore.h>
19
20/*
21 * fill in the user structure for an a.out core dump
22 */
23static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
24{
25 struct task_struct *tsk = current;
26
27 dump->magic = CMAGIC;
28 dump->start_code = tsk->mm->start_code;
29 dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1);
30
31 dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT;
32 dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT;
33 dump->u_ssize = 0;
34
35 dump->u_debugreg[0] = tsk->thread.debug.bp[0].address;
36 dump->u_debugreg[1] = tsk->thread.debug.bp[1].address;
37 dump->u_debugreg[2] = tsk->thread.debug.bp[0].insn.arm;
38 dump->u_debugreg[3] = tsk->thread.debug.bp[1].insn.arm;
39 dump->u_debugreg[4] = tsk->thread.debug.nsaved;
40
41 if (dump->start_stack < 0x04000000)
42 dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT;
43
44 dump->regs = *regs;
45 dump->u_fpvalid = dump_fpu (regs, &dump->u_fp);
46}
47
48#endif /* __KERNEL__ */
49#endif /* _ASM_A_OUT_CORE_H */
diff --git a/include/asm-arm/a.out.h b/include/asm-arm/a.out.h
deleted file mode 100644
index 79489fdcc8b8..000000000000
--- a/include/asm-arm/a.out.h
+++ /dev/null
@@ -1,34 +0,0 @@
1#ifndef __ARM_A_OUT_H__
2#define __ARM_A_OUT_H__
3
4#include <linux/personality.h>
5#include <asm/types.h>
6
7struct exec
8{
9 __u32 a_info; /* Use macros N_MAGIC, etc for access */
10 __u32 a_text; /* length of text, in bytes */
11 __u32 a_data; /* length of data, in bytes */
12 __u32 a_bss; /* length of uninitialized data area for file, in bytes */
13 __u32 a_syms; /* length of symbol table data in file, in bytes */
14 __u32 a_entry; /* start address */
15 __u32 a_trsize; /* length of relocation info for text, in bytes */
16 __u32 a_drsize; /* length of relocation info for data, in bytes */
17};
18
19/*
20 * This is always the same
21 */
22#define N_TXTADDR(a) (0x00008000)
23
24#define N_TRSIZE(a) ((a).a_trsize)
25#define N_DRSIZE(a) ((a).a_drsize)
26#define N_SYMSIZE(a) ((a).a_syms)
27
28#define M_ARM 103
29
30#ifndef LIBRARY_START_TEXT
31#define LIBRARY_START_TEXT (0x00c00000)
32#endif
33
34#endif /* __A_OUT_GNU_H__ */
diff --git a/include/asm-arm/arch-ns9xxx/debug-macro.S b/include/asm-arm/arch-ns9xxx/debug-macro.S
index b21b93eb2dbc..94680950ee67 100644
--- a/include/asm-arm/arch-ns9xxx/debug-macro.S
+++ b/include/asm-arm/arch-ns9xxx/debug-macro.S
@@ -9,7 +9,7 @@
9 */ 9 */
10#include <asm/hardware.h> 10#include <asm/hardware.h>
11 11
12#include <asm/arch-ns9xxx/regs-board-a9m9750dev.h> 12#include <asm/arch/regs-board-a9m9750dev.h>
13 13
14 .macro addruart,rx 14 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0 15 mrc p15, 0, \rx, c1, c0
diff --git a/include/asm-arm/arch-ns9xxx/entry-macro.S b/include/asm-arm/arch-ns9xxx/entry-macro.S
index 89a21c530468..2f6c89ddf958 100644
--- a/include/asm-arm/arch-ns9xxx/entry-macro.S
+++ b/include/asm-arm/arch-ns9xxx/entry-macro.S
@@ -9,7 +9,7 @@
9 * the Free Software Foundation. 9 * the Free Software Foundation.
10 */ 10 */
11#include <asm/hardware.h> 11#include <asm/hardware.h>
12#include <asm/arch-ns9xxx/regs-sys-common.h> 12#include <asm/arch/regs-sys-common.h>
13 13
14 .macro get_irqnr_preamble, base, tmp 14 .macro get_irqnr_preamble, base, tmp
15 ldr \base, =SYS_ISRADDR 15 ldr \base, =SYS_ISRADDR
diff --git a/include/asm-arm/arch-ns9xxx/processor.h b/include/asm-arm/arch-ns9xxx/processor.h
index f7b53b65de81..3137e5ba01a9 100644
--- a/include/asm-arm/arch-ns9xxx/processor.h
+++ b/include/asm-arm/arch-ns9xxx/processor.h
@@ -11,7 +11,7 @@
11#ifndef __ASM_ARCH_PROCESSOR_H 11#ifndef __ASM_ARCH_PROCESSOR_H
12#define __ASM_ARCH_PROCESSOR_H 12#define __ASM_ARCH_PROCESSOR_H
13 13
14#include <asm/arch-ns9xxx/module.h> 14#include <asm/arch/module.h>
15 15
16#define processor_is_ns9210() (0 \ 16#define processor_is_ns9210() (0 \
17 || module_is_cc7ucamry() \ 17 || module_is_cc7ucamry() \
diff --git a/include/asm-arm/arch-ns9xxx/system.h b/include/asm-arm/arch-ns9xxx/system.h
index 1348073afe48..c2941684d667 100644
--- a/include/asm-arm/arch-ns9xxx/system.h
+++ b/include/asm-arm/arch-ns9xxx/system.h
@@ -12,8 +12,8 @@
12#define __ASM_ARCH_SYSTEM_H 12#define __ASM_ARCH_SYSTEM_H
13 13
14#include <asm/proc-fns.h> 14#include <asm/proc-fns.h>
15#include <asm/arch-ns9xxx/processor.h> 15#include <asm/arch/processor.h>
16#include <asm/arch-ns9xxx/processor-ns9360.h> 16#include <asm/arch/processor-ns9360.h>
17 17
18static inline void arch_idle(void) 18static inline void arch_idle(void)
19{ 19{
diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h
index db44c5d1f1a0..99564c70f128 100644
--- a/include/asm-arm/arch-omap/board.h
+++ b/include/asm-arm/arch-omap/board.h
@@ -154,7 +154,7 @@ struct omap_version_config {
154}; 154};
155 155
156 156
157#include <asm-arm/arch-omap/board-nokia.h> 157#include <asm/arch/board-nokia.h>
158 158
159struct omap_board_config_entry { 159struct omap_board_config_entry {
160 u16 tag; 160 u16 tag;
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
deleted file mode 100644
index 911393b2c6f0..000000000000
--- a/include/asm-arm/assembler.h
+++ /dev/null
@@ -1,116 +0,0 @@
1/*
2 * linux/include/asm-arm/assembler.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This file contains arm architecture specific defines
11 * for the different processors.
12 *
13 * Do not include any C declarations in this file - it is included by
14 * assembler source.
15 */
16#ifndef __ASSEMBLY__
17#error "Only include this from assembly code"
18#endif
19
20#include <asm/ptrace.h>
21
22/*
23 * Endian independent macros for shifting bytes within registers.
24 */
25#ifndef __ARMEB__
26#define pull lsr
27#define push lsl
28#define get_byte_0 lsl #0
29#define get_byte_1 lsr #8
30#define get_byte_2 lsr #16
31#define get_byte_3 lsr #24
32#define put_byte_0 lsl #0
33#define put_byte_1 lsl #8
34#define put_byte_2 lsl #16
35#define put_byte_3 lsl #24
36#else
37#define pull lsl
38#define push lsr
39#define get_byte_0 lsr #24
40#define get_byte_1 lsr #16
41#define get_byte_2 lsr #8
42#define get_byte_3 lsl #0
43#define put_byte_0 lsl #24
44#define put_byte_1 lsl #16
45#define put_byte_2 lsl #8
46#define put_byte_3 lsl #0
47#endif
48
49/*
50 * Data preload for architectures that support it
51 */
52#if __LINUX_ARM_ARCH__ >= 5
53#define PLD(code...) code
54#else
55#define PLD(code...)
56#endif
57
58/*
59 * This can be used to enable code to cacheline align the destination
60 * pointer when bulk writing to memory. Experiments on StrongARM and
61 * XScale didn't show this a worthwhile thing to do when the cache is not
62 * set to write-allocate (this would need further testing on XScale when WA
63 * is used).
64 *
65 * On Feroceon there is much to gain however, regardless of cache mode.
66 */
67#ifdef CONFIG_CPU_FEROCEON
68#define CALGN(code...) code
69#else
70#define CALGN(code...)
71#endif
72
73/*
74 * Enable and disable interrupts
75 */
76#if __LINUX_ARM_ARCH__ >= 6
77 .macro disable_irq
78 cpsid i
79 .endm
80
81 .macro enable_irq
82 cpsie i
83 .endm
84#else
85 .macro disable_irq
86 msr cpsr_c, #PSR_I_BIT | SVC_MODE
87 .endm
88
89 .macro enable_irq
90 msr cpsr_c, #SVC_MODE
91 .endm
92#endif
93
94/*
95 * Save the current IRQ state and disable IRQs. Note that this macro
96 * assumes FIQs are enabled, and that the processor is in SVC mode.
97 */
98 .macro save_and_disable_irqs, oldcpsr
99 mrs \oldcpsr, cpsr
100 disable_irq
101 .endm
102
103/*
104 * Restore interrupt state previously stored in a register. We don't
105 * guarantee that this will preserve the flags.
106 */
107 .macro restore_irqs, oldcpsr
108 msr cpsr_c, \oldcpsr
109 .endm
110
111#define USER(x...) \
1129999: x; \
113 .section __ex_table,"a"; \
114 .align 3; \
115 .long 9999b,9001f; \
116 .previous
diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h
deleted file mode 100644
index 3b59f94b5a3d..000000000000
--- a/include/asm-arm/atomic.h
+++ /dev/null
@@ -1,212 +0,0 @@
1/*
2 * linux/include/asm-arm/atomic.h
3 *
4 * Copyright (C) 1996 Russell King.
5 * Copyright (C) 2002 Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ASM_ARM_ATOMIC_H
12#define __ASM_ARM_ATOMIC_H
13
14#include <linux/compiler.h>
15#include <asm/system.h>
16
17typedef struct { volatile int counter; } atomic_t;
18
19#define ATOMIC_INIT(i) { (i) }
20
21#ifdef __KERNEL__
22
23#define atomic_read(v) ((v)->counter)
24
25#if __LINUX_ARM_ARCH__ >= 6
26
27/*
28 * ARMv6 UP and SMP safe atomic ops. We use load exclusive and
29 * store exclusive to ensure that these are atomic. We may loop
30 * to ensure that the update happens. Writing to 'v->counter'
31 * without using the following operations WILL break the atomic
32 * nature of these ops.
33 */
34static inline void atomic_set(atomic_t *v, int i)
35{
36 unsigned long tmp;
37
38 __asm__ __volatile__("@ atomic_set\n"
39"1: ldrex %0, [%1]\n"
40" strex %0, %2, [%1]\n"
41" teq %0, #0\n"
42" bne 1b"
43 : "=&r" (tmp)
44 : "r" (&v->counter), "r" (i)
45 : "cc");
46}
47
48static inline int atomic_add_return(int i, atomic_t *v)
49{
50 unsigned long tmp;
51 int result;
52
53 __asm__ __volatile__("@ atomic_add_return\n"
54"1: ldrex %0, [%2]\n"
55" add %0, %0, %3\n"
56" strex %1, %0, [%2]\n"
57" teq %1, #0\n"
58" bne 1b"
59 : "=&r" (result), "=&r" (tmp)
60 : "r" (&v->counter), "Ir" (i)
61 : "cc");
62
63 return result;
64}
65
66static inline int atomic_sub_return(int i, atomic_t *v)
67{
68 unsigned long tmp;
69 int result;
70
71 __asm__ __volatile__("@ atomic_sub_return\n"
72"1: ldrex %0, [%2]\n"
73" sub %0, %0, %3\n"
74" strex %1, %0, [%2]\n"
75" teq %1, #0\n"
76" bne 1b"
77 : "=&r" (result), "=&r" (tmp)
78 : "r" (&v->counter), "Ir" (i)
79 : "cc");
80
81 return result;
82}
83
84static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
85{
86 unsigned long oldval, res;
87
88 do {
89 __asm__ __volatile__("@ atomic_cmpxchg\n"
90 "ldrex %1, [%2]\n"
91 "mov %0, #0\n"
92 "teq %1, %3\n"
93 "strexeq %0, %4, [%2]\n"
94 : "=&r" (res), "=&r" (oldval)
95 : "r" (&ptr->counter), "Ir" (old), "r" (new)
96 : "cc");
97 } while (res);
98
99 return oldval;
100}
101
102static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
103{
104 unsigned long tmp, tmp2;
105
106 __asm__ __volatile__("@ atomic_clear_mask\n"
107"1: ldrex %0, [%2]\n"
108" bic %0, %0, %3\n"
109" strex %1, %0, [%2]\n"
110" teq %1, #0\n"
111" bne 1b"
112 : "=&r" (tmp), "=&r" (tmp2)
113 : "r" (addr), "Ir" (mask)
114 : "cc");
115}
116
117#else /* ARM_ARCH_6 */
118
119#include <asm/system.h>
120
121#ifdef CONFIG_SMP
122#error SMP not supported on pre-ARMv6 CPUs
123#endif
124
125#define atomic_set(v,i) (((v)->counter) = (i))
126
127static inline int atomic_add_return(int i, atomic_t *v)
128{
129 unsigned long flags;
130 int val;
131
132 raw_local_irq_save(flags);
133 val = v->counter;
134 v->counter = val += i;
135 raw_local_irq_restore(flags);
136
137 return val;
138}
139
140static inline int atomic_sub_return(int i, atomic_t *v)
141{
142 unsigned long flags;
143 int val;
144
145 raw_local_irq_save(flags);
146 val = v->counter;
147 v->counter = val -= i;
148 raw_local_irq_restore(flags);
149
150 return val;
151}
152
153static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
154{
155 int ret;
156 unsigned long flags;
157
158 raw_local_irq_save(flags);
159 ret = v->counter;
160 if (likely(ret == old))
161 v->counter = new;
162 raw_local_irq_restore(flags);
163
164 return ret;
165}
166
167static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
168{
169 unsigned long flags;
170
171 raw_local_irq_save(flags);
172 *addr &= ~mask;
173 raw_local_irq_restore(flags);
174}
175
176#endif /* __LINUX_ARM_ARCH__ */
177
178#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
179
180static inline int atomic_add_unless(atomic_t *v, int a, int u)
181{
182 int c, old;
183
184 c = atomic_read(v);
185 while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c)
186 c = old;
187 return c != u;
188}
189#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
190
191#define atomic_add(i, v) (void) atomic_add_return(i, v)
192#define atomic_inc(v) (void) atomic_add_return(1, v)
193#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
194#define atomic_dec(v) (void) atomic_sub_return(1, v)
195
196#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
197#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
198#define atomic_inc_return(v) (atomic_add_return(1, v))
199#define atomic_dec_return(v) (atomic_sub_return(1, v))
200#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
201
202#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
203
204/* Atomic operations are already serializing on ARM */
205#define smp_mb__before_atomic_dec() barrier()
206#define smp_mb__after_atomic_dec() barrier()
207#define smp_mb__before_atomic_inc() barrier()
208#define smp_mb__after_atomic_inc() barrier()
209
210#include <asm-generic/atomic.h>
211#endif
212#endif
diff --git a/include/asm-arm/auxvec.h b/include/asm-arm/auxvec.h
deleted file mode 100644
index c0536f6b29a7..000000000000
--- a/include/asm-arm/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASMARM_AUXVEC_H
2#define __ASMARM_AUXVEC_H
3
4#endif
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
deleted file mode 100644
index 9a1db20e032a..000000000000
--- a/include/asm-arm/bitops.h
+++ /dev/null
@@ -1,340 +0,0 @@
1/*
2 * Copyright 1995, Russell King.
3 * Various bits and pieces copyrights include:
4 * Linus Torvalds (test_bit).
5 * Big endian support: Copyright 2001, Nicolas Pitre
6 * reworked by rmk.
7 *
8 * bit 0 is the LSB of an "unsigned long" quantity.
9 *
10 * Please note that the code in this file should never be included
11 * from user space. Many of these are not implemented in assembler
12 * since they would be too costly. Also, they require privileged
13 * instructions (which are not available from user mode) to ensure
14 * that they are atomic.
15 */
16
17#ifndef __ASM_ARM_BITOPS_H
18#define __ASM_ARM_BITOPS_H
19
20#ifdef __KERNEL__
21
22#ifndef _LINUX_BITOPS_H
23#error only <linux/bitops.h> can be included directly
24#endif
25
26#include <linux/compiler.h>
27#include <asm/system.h>
28
29#define smp_mb__before_clear_bit() mb()
30#define smp_mb__after_clear_bit() mb()
31
32/*
33 * These functions are the basis of our bit ops.
34 *
35 * First, the atomic bitops. These use native endian.
36 */
37static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
38{
39 unsigned long flags;
40 unsigned long mask = 1UL << (bit & 31);
41
42 p += bit >> 5;
43
44 raw_local_irq_save(flags);
45 *p |= mask;
46 raw_local_irq_restore(flags);
47}
48
49static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
50{
51 unsigned long flags;
52 unsigned long mask = 1UL << (bit & 31);
53
54 p += bit >> 5;
55
56 raw_local_irq_save(flags);
57 *p &= ~mask;
58 raw_local_irq_restore(flags);
59}
60
61static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
62{
63 unsigned long flags;
64 unsigned long mask = 1UL << (bit & 31);
65
66 p += bit >> 5;
67
68 raw_local_irq_save(flags);
69 *p ^= mask;
70 raw_local_irq_restore(flags);
71}
72
73static inline int
74____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
75{
76 unsigned long flags;
77 unsigned int res;
78 unsigned long mask = 1UL << (bit & 31);
79
80 p += bit >> 5;
81
82 raw_local_irq_save(flags);
83 res = *p;
84 *p = res | mask;
85 raw_local_irq_restore(flags);
86
87 return res & mask;
88}
89
90static inline int
91____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
92{
93 unsigned long flags;
94 unsigned int res;
95 unsigned long mask = 1UL << (bit & 31);
96
97 p += bit >> 5;
98
99 raw_local_irq_save(flags);
100 res = *p;
101 *p = res & ~mask;
102 raw_local_irq_restore(flags);
103
104 return res & mask;
105}
106
107static inline int
108____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
109{
110 unsigned long flags;
111 unsigned int res;
112 unsigned long mask = 1UL << (bit & 31);
113
114 p += bit >> 5;
115
116 raw_local_irq_save(flags);
117 res = *p;
118 *p = res ^ mask;
119 raw_local_irq_restore(flags);
120
121 return res & mask;
122}
123
124#include <asm-generic/bitops/non-atomic.h>
125
126/*
127 * A note about Endian-ness.
128 * -------------------------
129 *
130 * When the ARM is put into big endian mode via CR15, the processor
131 * merely swaps the order of bytes within words, thus:
132 *
133 * ------------ physical data bus bits -----------
134 * D31 ... D24 D23 ... D16 D15 ... D8 D7 ... D0
135 * little byte 3 byte 2 byte 1 byte 0
136 * big byte 0 byte 1 byte 2 byte 3
137 *
138 * This means that reading a 32-bit word at address 0 returns the same
139 * value irrespective of the endian mode bit.
140 *
141 * Peripheral devices should be connected with the data bus reversed in
142 * "Big Endian" mode. ARM Application Note 61 is applicable, and is
143 * available from http://www.arm.com/.
144 *
145 * The following assumes that the data bus connectivity for big endian
146 * mode has been followed.
147 *
148 * Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0.
149 */
150
151/*
152 * Little endian assembly bitops. nr = 0 -> byte 0 bit 0.
153 */
154extern void _set_bit_le(int nr, volatile unsigned long * p);
155extern void _clear_bit_le(int nr, volatile unsigned long * p);
156extern void _change_bit_le(int nr, volatile unsigned long * p);
157extern int _test_and_set_bit_le(int nr, volatile unsigned long * p);
158extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p);
159extern int _test_and_change_bit_le(int nr, volatile unsigned long * p);
160extern int _find_first_zero_bit_le(const void * p, unsigned size);
161extern int _find_next_zero_bit_le(const void * p, int size, int offset);
162extern int _find_first_bit_le(const unsigned long *p, unsigned size);
163extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
164
165/*
166 * Big endian assembly bitops. nr = 0 -> byte 3 bit 0.
167 */
168extern void _set_bit_be(int nr, volatile unsigned long * p);
169extern void _clear_bit_be(int nr, volatile unsigned long * p);
170extern void _change_bit_be(int nr, volatile unsigned long * p);
171extern int _test_and_set_bit_be(int nr, volatile unsigned long * p);
172extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p);
173extern int _test_and_change_bit_be(int nr, volatile unsigned long * p);
174extern int _find_first_zero_bit_be(const void * p, unsigned size);
175extern int _find_next_zero_bit_be(const void * p, int size, int offset);
176extern int _find_first_bit_be(const unsigned long *p, unsigned size);
177extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
178
179#ifndef CONFIG_SMP
180/*
181 * The __* form of bitops are non-atomic and may be reordered.
182 */
183#define ATOMIC_BITOP_LE(name,nr,p) \
184 (__builtin_constant_p(nr) ? \
185 ____atomic_##name(nr, p) : \
186 _##name##_le(nr,p))
187
188#define ATOMIC_BITOP_BE(name,nr,p) \
189 (__builtin_constant_p(nr) ? \
190 ____atomic_##name(nr, p) : \
191 _##name##_be(nr,p))
192#else
193#define ATOMIC_BITOP_LE(name,nr,p) _##name##_le(nr,p)
194#define ATOMIC_BITOP_BE(name,nr,p) _##name##_be(nr,p)
195#endif
196
197#define NONATOMIC_BITOP(name,nr,p) \
198 (____nonatomic_##name(nr, p))
199
200#ifndef __ARMEB__
201/*
202 * These are the little endian, atomic definitions.
203 */
204#define set_bit(nr,p) ATOMIC_BITOP_LE(set_bit,nr,p)
205#define clear_bit(nr,p) ATOMIC_BITOP_LE(clear_bit,nr,p)
206#define change_bit(nr,p) ATOMIC_BITOP_LE(change_bit,nr,p)
207#define test_and_set_bit(nr,p) ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
208#define test_and_clear_bit(nr,p) ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
209#define test_and_change_bit(nr,p) ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
210#define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz)
211#define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off)
212#define find_first_bit(p,sz) _find_first_bit_le(p,sz)
213#define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off)
214
215#define WORD_BITOFF_TO_LE(x) ((x))
216
217#else
218
219/*
220 * These are the big endian, atomic definitions.
221 */
222#define set_bit(nr,p) ATOMIC_BITOP_BE(set_bit,nr,p)
223#define clear_bit(nr,p) ATOMIC_BITOP_BE(clear_bit,nr,p)
224#define change_bit(nr,p) ATOMIC_BITOP_BE(change_bit,nr,p)
225#define test_and_set_bit(nr,p) ATOMIC_BITOP_BE(test_and_set_bit,nr,p)
226#define test_and_clear_bit(nr,p) ATOMIC_BITOP_BE(test_and_clear_bit,nr,p)
227#define test_and_change_bit(nr,p) ATOMIC_BITOP_BE(test_and_change_bit,nr,p)
228#define find_first_zero_bit(p,sz) _find_first_zero_bit_be(p,sz)
229#define find_next_zero_bit(p,sz,off) _find_next_zero_bit_be(p,sz,off)
230#define find_first_bit(p,sz) _find_first_bit_be(p,sz)
231#define find_next_bit(p,sz,off) _find_next_bit_be(p,sz,off)
232
233#define WORD_BITOFF_TO_LE(x) ((x) ^ 0x18)
234
235#endif
236
237#if __LINUX_ARM_ARCH__ < 5
238
239#include <asm-generic/bitops/ffz.h>
240#include <asm-generic/bitops/__ffs.h>
241#include <asm-generic/bitops/fls.h>
242#include <asm-generic/bitops/ffs.h>
243
244#else
245
246static inline int constant_fls(int x)
247{
248 int r = 32;
249
250 if (!x)
251 return 0;
252 if (!(x & 0xffff0000u)) {
253 x <<= 16;
254 r -= 16;
255 }
256 if (!(x & 0xff000000u)) {
257 x <<= 8;
258 r -= 8;
259 }
260 if (!(x & 0xf0000000u)) {
261 x <<= 4;
262 r -= 4;
263 }
264 if (!(x & 0xc0000000u)) {
265 x <<= 2;
266 r -= 2;
267 }
268 if (!(x & 0x80000000u)) {
269 x <<= 1;
270 r -= 1;
271 }
272 return r;
273}
274
275/*
276 * On ARMv5 and above those functions can be implemented around
277 * the clz instruction for much better code efficiency.
278 */
279
280#define __fls(x) \
281 ( __builtin_constant_p(x) ? constant_fls(x) : \
282 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
283
284/* Implement fls() in C so that 64-bit args are suitably truncated */
285static inline int fls(int x)
286{
287 return __fls(x);
288}
289
290#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
291#define __ffs(x) (ffs(x) - 1)
292#define ffz(x) __ffs( ~(x) )
293
294#endif
295
296#include <asm-generic/bitops/fls64.h>
297
298#include <asm-generic/bitops/sched.h>
299#include <asm-generic/bitops/hweight.h>
300#include <asm-generic/bitops/lock.h>
301
302/*
303 * Ext2 is defined to use little-endian byte ordering.
304 * These do not need to be atomic.
305 */
306#define ext2_set_bit(nr,p) \
307 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
308#define ext2_set_bit_atomic(lock,nr,p) \
309 test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
310#define ext2_clear_bit(nr,p) \
311 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
312#define ext2_clear_bit_atomic(lock,nr,p) \
313 test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
314#define ext2_test_bit(nr,p) \
315 test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
316#define ext2_find_first_zero_bit(p,sz) \
317 _find_first_zero_bit_le(p,sz)
318#define ext2_find_next_zero_bit(p,sz,off) \
319 _find_next_zero_bit_le(p,sz,off)
320#define ext2_find_next_bit(p, sz, off) \
321 _find_next_bit_le(p, sz, off)
322
323/*
324 * Minix is defined to use little-endian byte ordering.
325 * These do not need to be atomic.
326 */
327#define minix_set_bit(nr,p) \
328 __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
329#define minix_test_bit(nr,p) \
330 test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
331#define minix_test_and_set_bit(nr,p) \
332 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
333#define minix_test_and_clear_bit(nr,p) \
334 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
335#define minix_find_first_zero_bit(p,sz) \
336 _find_first_zero_bit_le(p,sz)
337
338#endif /* __KERNEL__ */
339
340#endif /* _ARM_BITOPS_H */
diff --git a/include/asm-arm/bug.h b/include/asm-arm/bug.h
deleted file mode 100644
index 7b62351f097d..000000000000
--- a/include/asm-arm/bug.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef _ASMARM_BUG_H
2#define _ASMARM_BUG_H
3
4
5#ifdef CONFIG_BUG
6#ifdef CONFIG_DEBUG_BUGVERBOSE
7extern void __bug(const char *file, int line) __attribute__((noreturn));
8
9/* give file/line information */
10#define BUG() __bug(__FILE__, __LINE__)
11
12#else
13
14/* this just causes an oops */
15#define BUG() (*(int *)0 = 0)
16
17#endif
18
19#define HAVE_ARCH_BUG
20#endif
21
22#include <asm-generic/bug.h>
23
24#endif
diff --git a/include/asm-arm/bugs.h b/include/asm-arm/bugs.h
deleted file mode 100644
index ca54eb0f12d7..000000000000
--- a/include/asm-arm/bugs.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * linux/include/asm-arm/bugs.h
3 *
4 * Copyright (C) 1995-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_BUGS_H
11#define __ASM_BUGS_H
12
13#ifdef CONFIG_MMU
14extern void check_writebuffer_bugs(void);
15
16#define check_bugs() check_writebuffer_bugs()
17#else
18#define check_bugs() do { } while (0)
19#endif
20
21#endif
diff --git a/include/asm-arm/byteorder.h b/include/asm-arm/byteorder.h
deleted file mode 100644
index e6f7fcdc73b0..000000000000
--- a/include/asm-arm/byteorder.h
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * linux/include/asm-arm/byteorder.h
3 *
4 * ARM Endian-ness. In little endian mode, the data bus is connected such
5 * that byte accesses appear as:
6 * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
7 * and word accesses (data or instruction) appear as:
8 * d0...d31
9 *
10 * When in big endian mode, byte accesses appear as:
11 * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
12 * and word accesses (data or instruction) appear as:
13 * d0...d31
14 */
15#ifndef __ASM_ARM_BYTEORDER_H
16#define __ASM_ARM_BYTEORDER_H
17
18#include <linux/compiler.h>
19#include <asm/types.h>
20
21static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
22{
23 __u32 t;
24
25#ifndef __thumb__
26 if (!__builtin_constant_p(x)) {
27 /*
28 * The compiler needs a bit of a hint here to always do the
29 * right thing and not screw it up to different degrees
30 * depending on the gcc version.
31 */
32 asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
33 } else
34#endif
35 t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
36
37 x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
38 t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
39 x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */
40
41 return x;
42}
43
44#define __arch__swab32(x) ___arch__swab32(x)
45
46#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
47# define __BYTEORDER_HAS_U64__
48# define __SWAB_64_THRU_32__
49#endif
50
51#ifdef __ARMEB__
52#include <linux/byteorder/big_endian.h>
53#else
54#include <linux/byteorder/little_endian.h>
55#endif
56
57#endif
58
diff --git a/include/asm-arm/cache.h b/include/asm-arm/cache.h
deleted file mode 100644
index 31332c8ac04e..000000000000
--- a/include/asm-arm/cache.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * linux/include/asm-arm/cache.h
3 */
4#ifndef __ASMARM_CACHE_H
5#define __ASMARM_CACHE_H
6
7#define L1_CACHE_SHIFT 5
8#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
9
10#endif
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
deleted file mode 100644
index e68a1cbcc852..000000000000
--- a/include/asm-arm/cacheflush.h
+++ /dev/null
@@ -1,537 +0,0 @@
1/*
2 * linux/include/asm-arm/cacheflush.h
3 *
4 * Copyright (C) 1999-2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _ASMARM_CACHEFLUSH_H
11#define _ASMARM_CACHEFLUSH_H
12
13#include <linux/sched.h>
14#include <linux/mm.h>
15
16#include <asm/glue.h>
17#include <asm/shmparam.h>
18
19#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
20
21/*
22 * Cache Model
23 * ===========
24 */
25#undef _CACHE
26#undef MULTI_CACHE
27
28#if defined(CONFIG_CPU_CACHE_V3)
29# ifdef _CACHE
30# define MULTI_CACHE 1
31# else
32# define _CACHE v3
33# endif
34#endif
35
36#if defined(CONFIG_CPU_CACHE_V4)
37# ifdef _CACHE
38# define MULTI_CACHE 1
39# else
40# define _CACHE v4
41# endif
42#endif
43
44#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
45 defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020)
46# define MULTI_CACHE 1
47#endif
48
49#if defined(CONFIG_CPU_ARM926T)
50# ifdef _CACHE
51# define MULTI_CACHE 1
52# else
53# define _CACHE arm926
54# endif
55#endif
56
57#if defined(CONFIG_CPU_ARM940T)
58# ifdef _CACHE
59# define MULTI_CACHE 1
60# else
61# define _CACHE arm940
62# endif
63#endif
64
65#if defined(CONFIG_CPU_ARM946E)
66# ifdef _CACHE
67# define MULTI_CACHE 1
68# else
69# define _CACHE arm946
70# endif
71#endif
72
73#if defined(CONFIG_CPU_CACHE_V4WB)
74# ifdef _CACHE
75# define MULTI_CACHE 1
76# else
77# define _CACHE v4wb
78# endif
79#endif
80
81#if defined(CONFIG_CPU_XSCALE)
82# ifdef _CACHE
83# define MULTI_CACHE 1
84# else
85# define _CACHE xscale
86# endif
87#endif
88
89#if defined(CONFIG_CPU_XSC3)
90# ifdef _CACHE
91# define MULTI_CACHE 1
92# else
93# define _CACHE xsc3
94# endif
95#endif
96
97#if defined(CONFIG_CPU_FEROCEON)
98# define MULTI_CACHE 1
99#endif
100
101#if defined(CONFIG_CPU_V6)
102//# ifdef _CACHE
103# define MULTI_CACHE 1
104//# else
105//# define _CACHE v6
106//# endif
107#endif
108
109#if defined(CONFIG_CPU_V7)
110//# ifdef _CACHE
111# define MULTI_CACHE 1
112//# else
113//# define _CACHE v7
114//# endif
115#endif
116
117#if !defined(_CACHE) && !defined(MULTI_CACHE)
118#error Unknown cache maintainence model
119#endif
120
121/*
122 * This flag is used to indicate that the page pointed to by a pte
123 * is dirty and requires cleaning before returning it to the user.
124 */
125#define PG_dcache_dirty PG_arch_1
126
127/*
128 * MM Cache Management
129 * ===================
130 *
131 * The arch/arm/mm/cache-*.S and arch/arm/mm/proc-*.S files
132 * implement these methods.
133 *
134 * Start addresses are inclusive and end addresses are exclusive;
135 * start addresses should be rounded down, end addresses up.
136 *
137 * See Documentation/cachetlb.txt for more information.
138 * Please note that the implementation of these, and the required
139 * effects are cache-type (VIVT/VIPT/PIPT) specific.
140 *
141 * flush_cache_kern_all()
142 *
143 * Unconditionally clean and invalidate the entire cache.
144 *
145 * flush_cache_user_mm(mm)
146 *
147 * Clean and invalidate all user space cache entries
148 * before a change of page tables.
149 *
150 * flush_cache_user_range(start, end, flags)
151 *
152 * Clean and invalidate a range of cache entries in the
153 * specified address space before a change of page tables.
154 * - start - user start address (inclusive, page aligned)
155 * - end - user end address (exclusive, page aligned)
156 * - flags - vma->vm_flags field
157 *
158 * coherent_kern_range(start, end)
159 *
160 * Ensure coherency between the Icache and the Dcache in the
161 * region described by start, end. If you have non-snooping
162 * Harvard caches, you need to implement this function.
163 * - start - virtual start address
164 * - end - virtual end address
165 *
166 * DMA Cache Coherency
167 * ===================
168 *
169 * dma_inv_range(start, end)
170 *
171 * Invalidate (discard) the specified virtual address range.
172 * May not write back any entries. If 'start' or 'end'
173 * are not cache line aligned, those lines must be written
174 * back.
175 * - start - virtual start address
176 * - end - virtual end address
177 *
178 * dma_clean_range(start, end)
179 *
180 * Clean (write back) the specified virtual address range.
181 * - start - virtual start address
182 * - end - virtual end address
183 *
184 * dma_flush_range(start, end)
185 *
186 * Clean and invalidate the specified virtual address range.
187 * - start - virtual start address
188 * - end - virtual end address
189 */
190
191struct cpu_cache_fns {
192 void (*flush_kern_all)(void);
193 void (*flush_user_all)(void);
194 void (*flush_user_range)(unsigned long, unsigned long, unsigned int);
195
196 void (*coherent_kern_range)(unsigned long, unsigned long);
197 void (*coherent_user_range)(unsigned long, unsigned long);
198 void (*flush_kern_dcache_page)(void *);
199
200 void (*dma_inv_range)(const void *, const void *);
201 void (*dma_clean_range)(const void *, const void *);
202 void (*dma_flush_range)(const void *, const void *);
203};
204
205struct outer_cache_fns {
206 void (*inv_range)(unsigned long, unsigned long);
207 void (*clean_range)(unsigned long, unsigned long);
208 void (*flush_range)(unsigned long, unsigned long);
209};
210
211/*
212 * Select the calling method
213 */
214#ifdef MULTI_CACHE
215
216extern struct cpu_cache_fns cpu_cache;
217
218#define __cpuc_flush_kern_all cpu_cache.flush_kern_all
219#define __cpuc_flush_user_all cpu_cache.flush_user_all
220#define __cpuc_flush_user_range cpu_cache.flush_user_range
221#define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range
222#define __cpuc_coherent_user_range cpu_cache.coherent_user_range
223#define __cpuc_flush_dcache_page cpu_cache.flush_kern_dcache_page
224
225/*
226 * These are private to the dma-mapping API. Do not use directly.
227 * Their sole purpose is to ensure that data held in the cache
228 * is visible to DMA, or data written by DMA to system memory is
229 * visible to the CPU.
230 */
231#define dmac_inv_range cpu_cache.dma_inv_range
232#define dmac_clean_range cpu_cache.dma_clean_range
233#define dmac_flush_range cpu_cache.dma_flush_range
234
235#else
236
237#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all)
238#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all)
239#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range)
240#define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range)
241#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
242#define __cpuc_flush_dcache_page __glue(_CACHE,_flush_kern_dcache_page)
243
244extern void __cpuc_flush_kern_all(void);
245extern void __cpuc_flush_user_all(void);
246extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int);
247extern void __cpuc_coherent_kern_range(unsigned long, unsigned long);
248extern void __cpuc_coherent_user_range(unsigned long, unsigned long);
249extern void __cpuc_flush_dcache_page(void *);
250
251/*
252 * These are private to the dma-mapping API. Do not use directly.
253 * Their sole purpose is to ensure that data held in the cache
254 * is visible to DMA, or data written by DMA to system memory is
255 * visible to the CPU.
256 */
257#define dmac_inv_range __glue(_CACHE,_dma_inv_range)
258#define dmac_clean_range __glue(_CACHE,_dma_clean_range)
259#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
260
261extern void dmac_inv_range(const void *, const void *);
262extern void dmac_clean_range(const void *, const void *);
263extern void dmac_flush_range(const void *, const void *);
264
265#endif
266
267#ifdef CONFIG_OUTER_CACHE
268
269extern struct outer_cache_fns outer_cache;
270
271static inline void outer_inv_range(unsigned long start, unsigned long end)
272{
273 if (outer_cache.inv_range)
274 outer_cache.inv_range(start, end);
275}
276static inline void outer_clean_range(unsigned long start, unsigned long end)
277{
278 if (outer_cache.clean_range)
279 outer_cache.clean_range(start, end);
280}
281static inline void outer_flush_range(unsigned long start, unsigned long end)
282{
283 if (outer_cache.flush_range)
284 outer_cache.flush_range(start, end);
285}
286
287#else
288
289static inline void outer_inv_range(unsigned long start, unsigned long end)
290{ }
291static inline void outer_clean_range(unsigned long start, unsigned long end)
292{ }
293static inline void outer_flush_range(unsigned long start, unsigned long end)
294{ }
295
296#endif
297
298/*
299 * flush_cache_vmap() is used when creating mappings (eg, via vmap,
300 * vmalloc, ioremap etc) in kernel space for pages. Since the
301 * direct-mappings of these pages may contain cached data, we need
302 * to do a full cache flush to ensure that writebacks don't corrupt
303 * data placed into these pages via the new mappings.
304 */
305#define flush_cache_vmap(start, end) flush_cache_all()
306#define flush_cache_vunmap(start, end) flush_cache_all()
307
308/*
309 * Copy user data from/to a page which is mapped into a different
310 * processes address space. Really, we want to allow our "user
311 * space" model to handle this.
312 */
313#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
314 do { \
315 memcpy(dst, src, len); \
316 flush_ptrace_access(vma, page, vaddr, dst, len, 1);\
317 } while (0)
318
319#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
320 do { \
321 memcpy(dst, src, len); \
322 } while (0)
323
324/*
325 * Convert calls to our calling convention.
326 */
327#define flush_cache_all() __cpuc_flush_kern_all()
328#ifndef CONFIG_CPU_CACHE_VIPT
329static inline void flush_cache_mm(struct mm_struct *mm)
330{
331 if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask))
332 __cpuc_flush_user_all();
333}
334
335static inline void
336flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
337{
338 if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask))
339 __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
340 vma->vm_flags);
341}
342
343static inline void
344flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
345{
346 if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
347 unsigned long addr = user_addr & PAGE_MASK;
348 __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
349 }
350}
351
352static inline void
353flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
354 unsigned long uaddr, void *kaddr,
355 unsigned long len, int write)
356{
357 if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
358 unsigned long addr = (unsigned long)kaddr;
359 __cpuc_coherent_kern_range(addr, addr + len);
360 }
361}
362#else
363extern void flush_cache_mm(struct mm_struct *mm);
364extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
365extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn);
366extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
367 unsigned long uaddr, void *kaddr,
368 unsigned long len, int write);
369#endif
370
371#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
372
373/*
374 * flush_cache_user_range is used when we want to ensure that the
375 * Harvard caches are synchronised for the user space address range.
376 * This is used for the ARM private sys_cacheflush system call.
377 */
378#define flush_cache_user_range(vma,start,end) \
379 __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end))
380
381/*
382 * Perform necessary cache operations to ensure that data previously
383 * stored within this range of addresses can be executed by the CPU.
384 */
385#define flush_icache_range(s,e) __cpuc_coherent_kern_range(s,e)
386
387/*
388 * Perform necessary cache operations to ensure that the TLB will
389 * see data written in the specified area.
390 */
391#define clean_dcache_area(start,size) cpu_dcache_clean_area(start, size)
392
393/*
394 * flush_dcache_page is used when the kernel has written to the page
395 * cache page at virtual address page->virtual.
396 *
397 * If this page isn't mapped (ie, page_mapping == NULL), or it might
398 * have userspace mappings, then we _must_ always clean + invalidate
399 * the dcache entries associated with the kernel mapping.
400 *
401 * Otherwise we can defer the operation, and clean the cache when we are
402 * about to change to user space. This is the same method as used on SPARC64.
403 * See update_mmu_cache for the user space part.
404 */
405extern void flush_dcache_page(struct page *);
406
407extern void __flush_dcache_page(struct address_space *mapping, struct page *page);
408
409static inline void __flush_icache_all(void)
410{
411 asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n"
412 :
413 : "r" (0));
414}
415
416#define ARCH_HAS_FLUSH_ANON_PAGE
417static inline void flush_anon_page(struct vm_area_struct *vma,
418 struct page *page, unsigned long vmaddr)
419{
420 extern void __flush_anon_page(struct vm_area_struct *vma,
421 struct page *, unsigned long);
422 if (PageAnon(page))
423 __flush_anon_page(vma, page, vmaddr);
424}
425
426#define flush_dcache_mmap_lock(mapping) \
427 spin_lock_irq(&(mapping)->tree_lock)
428#define flush_dcache_mmap_unlock(mapping) \
429 spin_unlock_irq(&(mapping)->tree_lock)
430
431#define flush_icache_user_range(vma,page,addr,len) \
432 flush_dcache_page(page)
433
434/*
435 * We don't appear to need to do anything here. In fact, if we did, we'd
436 * duplicate cache flushing elsewhere performed by flush_dcache_page().
437 */
438#define flush_icache_page(vma,page) do { } while (0)
439
440static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
441 unsigned offset, size_t size)
442{
443 const void *start = (void __force *)virt + offset;
444 dmac_inv_range(start, start + size);
445}
446
447#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
448#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
449
450#define __cacheid_vivt_prev7(val) ((val & (15 << 25)) != (14 << 25))
451#define __cacheid_vipt_prev7(val) ((val & (15 << 25)) == (14 << 25))
452#define __cacheid_vipt_nonaliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25))
453#define __cacheid_vipt_aliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23))
454
455#define __cacheid_vivt(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vivt_prev7(val))
456#define __cacheid_vipt(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_prev7(val))
457#define __cacheid_vipt_nonaliasing(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_nonaliasing_prev7(val))
458#define __cacheid_vipt_aliasing(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vipt_aliasing_prev7(val))
459#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0)
460
461#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
462/*
463 * VIVT caches only
464 */
465#define cache_is_vivt() 1
466#define cache_is_vipt() 0
467#define cache_is_vipt_nonaliasing() 0
468#define cache_is_vipt_aliasing() 0
469#define icache_is_vivt_asid_tagged() 0
470
471#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT)
472/*
473 * VIPT caches only
474 */
475#define cache_is_vivt() 0
476#define cache_is_vipt() 1
477#define cache_is_vipt_nonaliasing() \
478 ({ \
479 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
480 __cacheid_vipt_nonaliasing(__val); \
481 })
482
483#define cache_is_vipt_aliasing() \
484 ({ \
485 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
486 __cacheid_vipt_aliasing(__val); \
487 })
488
489#define icache_is_vivt_asid_tagged() \
490 ({ \
491 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
492 __cacheid_vivt_asid_tagged_instr(__val); \
493 })
494
495#else
496/*
497 * VIVT or VIPT caches. Note that this is unreliable since ARM926
498 * and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test.
499 * There's no way to tell from the CacheType register what type (!)
500 * the cache is.
501 */
502#define cache_is_vivt() \
503 ({ \
504 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
505 (!__cacheid_present(__val)) || __cacheid_vivt(__val); \
506 })
507
508#define cache_is_vipt() \
509 ({ \
510 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
511 __cacheid_present(__val) && __cacheid_vipt(__val); \
512 })
513
514#define cache_is_vipt_nonaliasing() \
515 ({ \
516 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
517 __cacheid_present(__val) && \
518 __cacheid_vipt_nonaliasing(__val); \
519 })
520
521#define cache_is_vipt_aliasing() \
522 ({ \
523 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
524 __cacheid_present(__val) && \
525 __cacheid_vipt_aliasing(__val); \
526 })
527
528#define icache_is_vivt_asid_tagged() \
529 ({ \
530 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
531 __cacheid_present(__val) && \
532 __cacheid_vivt_asid_tagged_instr(__val); \
533 })
534
535#endif
536
537#endif
diff --git a/include/asm-arm/checksum.h b/include/asm-arm/checksum.h
deleted file mode 100644
index eaa0efd8d0d4..000000000000
--- a/include/asm-arm/checksum.h
+++ /dev/null
@@ -1,139 +0,0 @@
1/*
2 * linux/include/asm-arm/checksum.h
3 *
4 * IP checksum routines
5 *
6 * Copyright (C) Original authors of ../asm-i386/checksum.h
7 * Copyright (C) 1996-1999 Russell King
8 */
9#ifndef __ASM_ARM_CHECKSUM_H
10#define __ASM_ARM_CHECKSUM_H
11
12#include <linux/in6.h>
13
14/*
15 * computes the checksum of a memory block at buff, length len,
16 * and adds in "sum" (32-bit)
17 *
18 * returns a 32-bit number suitable for feeding into itself
19 * or csum_tcpudp_magic
20 *
21 * this function must be called with even lengths, except
22 * for the last fragment, which may be odd
23 *
24 * it's best to have buff aligned on a 32-bit boundary
25 */
26__wsum csum_partial(const void *buff, int len, __wsum sum);
27
28/*
29 * the same as csum_partial, but copies from src while it
30 * checksums, and handles user-space pointer exceptions correctly, when needed.
31 *
32 * here even more important to align src and dst on a 32-bit (or even
33 * better 64-bit) boundary
34 */
35
36__wsum
37csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum);
38
39__wsum
40csum_partial_copy_from_user(const void __user *src, void *dst, int len, __wsum sum, int *err_ptr);
41
42/*
43 * Fold a partial checksum without adding pseudo headers
44 */
45static inline __sum16 csum_fold(__wsum sum)
46{
47 __asm__(
48 "add %0, %1, %1, ror #16 @ csum_fold"
49 : "=r" (sum)
50 : "r" (sum)
51 : "cc");
52 return (__force __sum16)(~(__force u32)sum >> 16);
53}
54
55/*
56 * This is a version of ip_compute_csum() optimized for IP headers,
57 * which always checksum on 4 octet boundaries.
58 */
59static inline __sum16
60ip_fast_csum(const void *iph, unsigned int ihl)
61{
62 unsigned int tmp1;
63 __wsum sum;
64
65 __asm__ __volatile__(
66 "ldr %0, [%1], #4 @ ip_fast_csum \n\
67 ldr %3, [%1], #4 \n\
68 sub %2, %2, #5 \n\
69 adds %0, %0, %3 \n\
70 ldr %3, [%1], #4 \n\
71 adcs %0, %0, %3 \n\
72 ldr %3, [%1], #4 \n\
731: adcs %0, %0, %3 \n\
74 ldr %3, [%1], #4 \n\
75 tst %2, #15 @ do this carefully \n\
76 subne %2, %2, #1 @ without destroying \n\
77 bne 1b @ the carry flag \n\
78 adcs %0, %0, %3 \n\
79 adc %0, %0, #0"
80 : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (tmp1)
81 : "1" (iph), "2" (ihl)
82 : "cc", "memory");
83 return csum_fold(sum);
84}
85
86static inline __wsum
87csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
88 unsigned short proto, __wsum sum)
89{
90 __asm__(
91 "adds %0, %1, %2 @ csum_tcpudp_nofold \n\
92 adcs %0, %0, %3 \n"
93#ifdef __ARMEB__
94 "adcs %0, %0, %4 \n"
95#else
96 "adcs %0, %0, %4, lsl #8 \n"
97#endif
98 "adcs %0, %0, %5 \n\
99 adc %0, %0, #0"
100 : "=&r"(sum)
101 : "r" (sum), "r" (daddr), "r" (saddr), "r" (len), "Ir" (htons(proto))
102 : "cc");
103 return sum;
104}
105/*
106 * computes the checksum of the TCP/UDP pseudo-header
107 * returns a 16-bit checksum, already complemented
108 */
109static inline __sum16
110csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len,
111 unsigned short proto, __wsum sum)
112{
113 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
114}
115
116
117/*
118 * this routine is used for miscellaneous IP-like checksums, mainly
119 * in icmp.c
120 */
121static inline __sum16
122ip_compute_csum(const void *buff, int len)
123{
124 return csum_fold(csum_partial(buff, len, 0));
125}
126
127#define _HAVE_ARCH_IPV6_CSUM
128extern __wsum
129__csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, __be32 len,
130 __be32 proto, __wsum sum);
131
132static inline __sum16
133csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, __u32 len,
134 unsigned short proto, __wsum sum)
135{
136 return csum_fold(__csum_ipv6_magic(saddr, daddr, htonl(len),
137 htonl(proto), sum));
138}
139#endif
diff --git a/include/asm-arm/cnt32_to_63.h b/include/asm-arm/cnt32_to_63.h
deleted file mode 100644
index 480c873fa746..000000000000
--- a/include/asm-arm/cnt32_to_63.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * include/asm/cnt32_to_63.h -- extend a 32-bit counter to 63 bits
3 *
4 * Author: Nicolas Pitre
5 * Created: December 3, 2006
6 * Copyright: MontaVista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation.
11 */
12
13#ifndef __INCLUDE_CNT32_TO_63_H__
14#define __INCLUDE_CNT32_TO_63_H__
15
16#include <linux/compiler.h>
17#include <asm/types.h>
18#include <asm/byteorder.h>
19
20/*
21 * Prototype: u64 cnt32_to_63(u32 cnt)
22 * Many hardware clock counters are only 32 bits wide and therefore have
23 * a relatively short period making wrap-arounds rather frequent. This
24 * is a problem when implementing sched_clock() for example, where a 64-bit
25 * non-wrapping monotonic value is expected to be returned.
26 *
27 * To overcome that limitation, let's extend a 32-bit counter to 63 bits
28 * in a completely lock free fashion. Bits 0 to 31 of the clock are provided
29 * by the hardware while bits 32 to 62 are stored in memory. The top bit in
30 * memory is used to synchronize with the hardware clock half-period. When
31 * the top bit of both counters (hardware and in memory) differ then the
32 * memory is updated with a new value, incrementing it when the hardware
33 * counter wraps around.
34 *
35 * Because a word store in memory is atomic then the incremented value will
36 * always be in synch with the top bit indicating to any potential concurrent
37 * reader if the value in memory is up to date or not with regards to the
38 * needed increment. And any race in updating the value in memory is harmless
39 * as the same value would simply be stored more than once.
40 *
41 * The only restriction for the algorithm to work properly is that this
42 * code must be executed at least once per each half period of the 32-bit
43 * counter to properly update the state bit in memory. This is usually not a
44 * problem in practice, but if it is then a kernel timer could be scheduled
45 * to manage for this code to be executed often enough.
46 *
47 * Note that the top bit (bit 63) in the returned value should be considered
48 * as garbage. It is not cleared here because callers are likely to use a
49 * multiplier on the returned value which can get rid of the top bit
50 * implicitly by making the multiplier even, therefore saving on a runtime
51 * clear-bit instruction. Otherwise caller must remember to clear the top
52 * bit explicitly.
53 */
54
55/* this is used only to give gcc a clue about good code generation */
56typedef union {
57 struct {
58#if defined(__LITTLE_ENDIAN)
59 u32 lo, hi;
60#elif defined(__BIG_ENDIAN)
61 u32 hi, lo;
62#endif
63 };
64 u64 val;
65} cnt32_to_63_t;
66
67#define cnt32_to_63(cnt_lo) \
68({ \
69 static volatile u32 __m_cnt_hi = 0; \
70 cnt32_to_63_t __x; \
71 __x.hi = __m_cnt_hi; \
72 __x.lo = (cnt_lo); \
73 if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \
74 __m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \
75 __x.val; \
76})
77
78#endif
diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h
deleted file mode 100644
index 3479de9266e5..000000000000
--- a/include/asm-arm/cpu-multi32.h
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * linux/include/asm-arm/cpu-multi32.h
3 *
4 * Copyright (C) 2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <asm/page.h>
11
12struct mm_struct;
13
14/*
15 * Don't change this structure - ASM code
16 * relies on it.
17 */
18extern struct processor {
19 /* MISC
20 * get data abort address/flags
21 */
22 void (*_data_abort)(unsigned long pc);
23 /*
24 * Retrieve prefetch fault address
25 */
26 unsigned long (*_prefetch_abort)(unsigned long lr);
27 /*
28 * Set up any processor specifics
29 */
30 void (*_proc_init)(void);
31 /*
32 * Disable any processor specifics
33 */
34 void (*_proc_fin)(void);
35 /*
36 * Special stuff for a reset
37 */
38 void (*reset)(unsigned long addr) __attribute__((noreturn));
39 /*
40 * Idle the processor
41 */
42 int (*_do_idle)(void);
43 /*
44 * Processor architecture specific
45 */
46 /*
47 * clean a virtual address range from the
48 * D-cache without flushing the cache.
49 */
50 void (*dcache_clean_area)(void *addr, int size);
51
52 /*
53 * Set the page table
54 */
55 void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm);
56 /*
57 * Set a possibly extended PTE. Non-extended PTEs should
58 * ignore 'ext'.
59 */
60 void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext);
61} processor;
62
63#define cpu_proc_init() processor._proc_init()
64#define cpu_proc_fin() processor._proc_fin()
65#define cpu_reset(addr) processor.reset(addr)
66#define cpu_do_idle() processor._do_idle()
67#define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz)
68#define cpu_set_pte_ext(ptep,pte,ext) processor.set_pte_ext(ptep,pte,ext)
69#define cpu_do_switch_mm(pgd,mm) processor.switch_mm(pgd,mm)
diff --git a/include/asm-arm/cpu-single.h b/include/asm-arm/cpu-single.h
deleted file mode 100644
index 0b120ee36091..000000000000
--- a/include/asm-arm/cpu-single.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * linux/include/asm-arm/cpu-single.h
3 *
4 * Copyright (C) 2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10/*
11 * Single CPU
12 */
13#ifdef __STDC__
14#define __catify_fn(name,x) name##x
15#else
16#define __catify_fn(name,x) name/**/x
17#endif
18#define __cpu_fn(name,x) __catify_fn(name,x)
19
20/*
21 * If we are supporting multiple CPUs, then we must use a table of
22 * function pointers for this lot. Otherwise, we can optimise the
23 * table away.
24 */
25#define cpu_proc_init __cpu_fn(CPU_NAME,_proc_init)
26#define cpu_proc_fin __cpu_fn(CPU_NAME,_proc_fin)
27#define cpu_reset __cpu_fn(CPU_NAME,_reset)
28#define cpu_do_idle __cpu_fn(CPU_NAME,_do_idle)
29#define cpu_dcache_clean_area __cpu_fn(CPU_NAME,_dcache_clean_area)
30#define cpu_do_switch_mm __cpu_fn(CPU_NAME,_switch_mm)
31#define cpu_set_pte_ext __cpu_fn(CPU_NAME,_set_pte_ext)
32
33#include <asm/page.h>
34
35struct mm_struct;
36
37/* declare all the functions as extern */
38extern void cpu_proc_init(void);
39extern void cpu_proc_fin(void);
40extern int cpu_do_idle(void);
41extern void cpu_dcache_clean_area(void *, int);
42extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
43extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
44extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
diff --git a/include/asm-arm/cpu.h b/include/asm-arm/cpu.h
deleted file mode 100644
index 715426b9b08e..000000000000
--- a/include/asm-arm/cpu.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * linux/include/asm-arm/cpu.h
3 *
4 * Copyright (C) 2004-2005 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_CPU_H
11#define __ASM_ARM_CPU_H
12
13#include <linux/percpu.h>
14
15struct cpuinfo_arm {
16 struct cpu cpu;
17#ifdef CONFIG_SMP
18 struct task_struct *idle;
19 unsigned int loops_per_jiffy;
20#endif
21};
22
23DECLARE_PER_CPU(struct cpuinfo_arm, cpu_data);
24
25#endif
diff --git a/include/asm-arm/cputime.h b/include/asm-arm/cputime.h
deleted file mode 100644
index 3a8002a5fec7..000000000000
--- a/include/asm-arm/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ARM_CPUTIME_H
2#define __ARM_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __ARM_CPUTIME_H */
diff --git a/include/asm-arm/current.h b/include/asm-arm/current.h
deleted file mode 100644
index 75d21e2a3ff7..000000000000
--- a/include/asm-arm/current.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _ASMARM_CURRENT_H
2#define _ASMARM_CURRENT_H
3
4#include <linux/thread_info.h>
5
6static inline struct task_struct *get_current(void) __attribute_const__;
7
8static inline struct task_struct *get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current (get_current())
14
15#endif /* _ASMARM_CURRENT_H */
diff --git a/include/asm-arm/delay.h b/include/asm-arm/delay.h
deleted file mode 100644
index b2deda181549..000000000000
--- a/include/asm-arm/delay.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * Copyright (C) 1995-2004 Russell King
3 *
4 * Delay routines, using a pre-computed "loops_per_second" value.
5 */
6#ifndef __ASM_ARM_DELAY_H
7#define __ASM_ARM_DELAY_H
8
9#include <asm/param.h> /* HZ */
10
11extern void __delay(int loops);
12
13/*
14 * This function intentionally does not exist; if you see references to
15 * it, it means that you're calling udelay() with an out of range value.
16 *
17 * With currently imposed limits, this means that we support a max delay
18 * of 2000us. Further limits: HZ<=1000 and bogomips<=3355
19 */
20extern void __bad_udelay(void);
21
22/*
23 * division by multiplication: you don't have to worry about
24 * loss of precision.
25 *
26 * Use only for very small delays ( < 1 msec). Should probably use a
27 * lookup table, really, as the multiplications take much too long with
28 * short delays. This is a "reasonable" implementation, though (and the
29 * first constant multiplications gets optimized away if the delay is
30 * a constant)
31 */
32extern void __udelay(unsigned long usecs);
33extern void __const_udelay(unsigned long);
34
35#define MAX_UDELAY_MS 2
36
37#define udelay(n) \
38 (__builtin_constant_p(n) ? \
39 ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() : \
40 __const_udelay((n) * ((2199023U*HZ)>>11))) : \
41 __udelay(n))
42
43#endif /* defined(_ARM_DELAY_H) */
44
diff --git a/include/asm-arm/device.h b/include/asm-arm/device.h
deleted file mode 100644
index c61642b40603..000000000000
--- a/include/asm-arm/device.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#ifndef ASMARM_DEVICE_H
7#define ASMARM_DEVICE_H
8
9struct dev_archdata {
10#ifdef CONFIG_DMABOUNCE
11 struct dmabounce_device_info *dmabounce;
12#endif
13};
14
15#endif
diff --git a/include/asm-arm/div64.h b/include/asm-arm/div64.h
deleted file mode 100644
index 5001390be958..000000000000
--- a/include/asm-arm/div64.h
+++ /dev/null
@@ -1,227 +0,0 @@
1#ifndef __ASM_ARM_DIV64
2#define __ASM_ARM_DIV64
3
4#include <asm/system.h>
5#include <linux/types.h>
6
7/*
8 * The semantics of do_div() are:
9 *
10 * uint32_t do_div(uint64_t *n, uint32_t base)
11 * {
12 * uint32_t remainder = *n % base;
13 * *n = *n / base;
14 * return remainder;
15 * }
16 *
17 * In other words, a 64-bit dividend with a 32-bit divisor producing
18 * a 64-bit result and a 32-bit remainder. To accomplish this optimally
19 * we call a special __do_div64 helper with completely non standard
20 * calling convention for arguments and results (beware).
21 */
22
23#ifdef __ARMEB__
24#define __xh "r0"
25#define __xl "r1"
26#else
27#define __xl "r0"
28#define __xh "r1"
29#endif
30
31#define __do_div_asm(n, base) \
32({ \
33 register unsigned int __base asm("r4") = base; \
34 register unsigned long long __n asm("r0") = n; \
35 register unsigned long long __res asm("r2"); \
36 register unsigned int __rem asm(__xh); \
37 asm( __asmeq("%0", __xh) \
38 __asmeq("%1", "r2") \
39 __asmeq("%2", "r0") \
40 __asmeq("%3", "r4") \
41 "bl __do_div64" \
42 : "=r" (__rem), "=r" (__res) \
43 : "r" (__n), "r" (__base) \
44 : "ip", "lr", "cc"); \
45 n = __res; \
46 __rem; \
47})
48
49#if __GNUC__ < 4
50
51/*
52 * gcc versions earlier than 4.0 are simply too problematic for the
53 * optimized implementation below. First there is gcc PR 15089 that
54 * tend to trig on more complex constructs, spurious .global __udivsi3
55 * are inserted even if none of those symbols are referenced in the
56 * generated code, and those gcc versions are not able to do constant
57 * propagation on long long values anyway.
58 */
59#define do_div(n, base) __do_div_asm(n, base)
60
61#elif __GNUC__ >= 4
62
63#include <asm/bug.h>
64
65/*
66 * If the divisor happens to be constant, we determine the appropriate
67 * inverse at compile time to turn the division into a few inline
68 * multiplications instead which is much faster. And yet only if compiling
69 * for ARMv4 or higher (we need umull/umlal) and if the gcc version is
70 * sufficiently recent to perform proper long long constant propagation.
71 * (It is unfortunate that gcc doesn't perform all this internally.)
72 */
73#define do_div(n, base) \
74({ \
75 unsigned int __r, __b = (base); \
76 if (!__builtin_constant_p(__b) || __b == 0 || \
77 (__LINUX_ARM_ARCH__ < 4 && (__b & (__b - 1)) != 0)) { \
78 /* non-constant divisor (or zero): slow path */ \
79 __r = __do_div_asm(n, __b); \
80 } else if ((__b & (__b - 1)) == 0) { \
81 /* Trivial: __b is constant and a power of 2 */ \
82 /* gcc does the right thing with this code. */ \
83 __r = n; \
84 __r &= (__b - 1); \
85 n /= __b; \
86 } else { \
87 /* Multiply by inverse of __b: n/b = n*(p/b)/p */ \
88 /* We rely on the fact that most of this code gets */ \
89 /* optimized away at compile time due to constant */ \
90 /* propagation and only a couple inline assembly */ \
91 /* instructions should remain. Better avoid any */ \
92 /* code construct that might prevent that. */ \
93 unsigned long long __res, __x, __t, __m, __n = n; \
94 unsigned int __c, __p, __z = 0; \
95 /* preserve low part of n for reminder computation */ \
96 __r = __n; \
97 /* determine number of bits to represent __b */ \
98 __p = 1 << __div64_fls(__b); \
99 /* compute __m = ((__p << 64) + __b - 1) / __b */ \
100 __m = (~0ULL / __b) * __p; \
101 __m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \
102 /* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \
103 __x = ~0ULL / __b * __b - 1; \
104 __res = (__m & 0xffffffff) * (__x & 0xffffffff); \
105 __res >>= 32; \
106 __res += (__m & 0xffffffff) * (__x >> 32); \
107 __t = __res; \
108 __res += (__x & 0xffffffff) * (__m >> 32); \
109 __t = (__res < __t) ? (1ULL << 32) : 0; \
110 __res = (__res >> 32) + __t; \
111 __res += (__m >> 32) * (__x >> 32); \
112 __res /= __p; \
113 /* Now sanitize and optimize what we've got. */ \
114 if (~0ULL % (__b / (__b & -__b)) == 0) { \
115 /* those cases can be simplified with: */ \
116 __n /= (__b & -__b); \
117 __m = ~0ULL / (__b / (__b & -__b)); \
118 __p = 1; \
119 __c = 1; \
120 } else if (__res != __x / __b) { \
121 /* We can't get away without a correction */ \
122 /* to compensate for bit truncation errors. */ \
123 /* To avoid it we'd need an additional bit */ \
124 /* to represent __m which would overflow it. */ \
125 /* Instead we do m=p/b and n/b=(n*m+m)/p. */ \
126 __c = 1; \
127 /* Compute __m = (__p << 64) / __b */ \
128 __m = (~0ULL / __b) * __p; \
129 __m += ((~0ULL % __b + 1) * __p) / __b; \
130 } else { \
131 /* Reduce __m/__p, and try to clear bit 31 */ \
132 /* of __m when possible otherwise that'll */ \
133 /* need extra overflow handling later. */ \
134 unsigned int __bits = -(__m & -__m); \
135 __bits |= __m >> 32; \
136 __bits = (~__bits) << 1; \
137 /* If __bits == 0 then setting bit 31 is */ \
138 /* unavoidable. Simply apply the maximum */ \
139 /* possible reduction in that case. */ \
140 /* Otherwise the MSB of __bits indicates the */ \
141 /* best reduction we should apply. */ \
142 if (!__bits) { \
143 __p /= (__m & -__m); \
144 __m /= (__m & -__m); \
145 } else { \
146 __p >>= __div64_fls(__bits); \
147 __m >>= __div64_fls(__bits); \
148 } \
149 /* No correction needed. */ \
150 __c = 0; \
151 } \
152 /* Now we have a combination of 2 conditions: */ \
153 /* 1) whether or not we need a correction (__c), and */ \
154 /* 2) whether or not there might be an overflow in */ \
155 /* the cross product (__m & ((1<<63) | (1<<31))) */ \
156 /* Select the best insn combination to perform the */ \
157 /* actual __m * __n / (__p << 64) operation. */ \
158 if (!__c) { \
159 asm ( "umull %Q0, %R0, %1, %Q2\n\t" \
160 "mov %Q0, #0" \
161 : "=&r" (__res) \
162 : "r" (__m), "r" (__n) \
163 : "cc" ); \
164 } else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \
165 __res = __m; \
166 asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \
167 "mov %Q0, #0" \
168 : "+r" (__res) \
169 : "r" (__m), "r" (__n) \
170 : "cc" ); \
171 } else { \
172 asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \
173 "cmn %Q0, %Q1\n\t" \
174 "adcs %R0, %R0, %R1\n\t" \
175 "adc %Q0, %3, #0" \
176 : "=&r" (__res) \
177 : "r" (__m), "r" (__n), "r" (__z) \
178 : "cc" ); \
179 } \
180 if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \
181 asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \
182 "umlal %R0, %Q0, %Q1, %R2\n\t" \
183 "mov %R0, #0\n\t" \
184 "umlal %Q0, %R0, %R1, %R2" \
185 : "+r" (__res) \
186 : "r" (__m), "r" (__n) \
187 : "cc" ); \
188 } else { \
189 asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \
190 "umlal %R0, %1, %Q2, %R3\n\t" \
191 "mov %R0, #0\n\t" \
192 "adds %Q0, %1, %Q0\n\t" \
193 "adc %R0, %R0, #0\n\t" \
194 "umlal %Q0, %R0, %R2, %R3" \
195 : "+r" (__res), "+r" (__z) \
196 : "r" (__m), "r" (__n) \
197 : "cc" ); \
198 } \
199 __res /= __p; \
200 /* The reminder can be computed with 32-bit regs */ \
201 /* only, and gcc is good at that. */ \
202 { \
203 unsigned int __res0 = __res; \
204 unsigned int __b0 = __b; \
205 __r -= __res0 * __b0; \
206 } \
207 /* BUG_ON(__r >= __b || __res * __b + __r != n); */ \
208 n = __res; \
209 } \
210 __r; \
211})
212
213/* our own fls implementation to make sure constant propagation is fine */
214#define __div64_fls(bits) \
215({ \
216 unsigned int __left = (bits), __nr = 0; \
217 if (__left & 0xffff0000) __nr += 16, __left >>= 16; \
218 if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \
219 if (__left & 0x000000f0) __nr += 4, __left >>= 4; \
220 if (__left & 0x0000000c) __nr += 2, __left >>= 2; \
221 if (__left & 0x00000002) __nr += 1; \
222 __nr; \
223})
224
225#endif
226
227#endif
diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h
deleted file mode 100644
index 45329fca1b64..000000000000
--- a/include/asm-arm/dma-mapping.h
+++ /dev/null
@@ -1,458 +0,0 @@
1#ifndef ASMARM_DMA_MAPPING_H
2#define ASMARM_DMA_MAPPING_H
3
4#ifdef __KERNEL__
5
6#include <linux/mm.h> /* need struct page */
7
8#include <linux/scatterlist.h>
9
10#include <asm-generic/dma-coherent.h>
11
12/*
13 * DMA-consistent mapping functions. These allocate/free a region of
14 * uncached, unwrite-buffered mapped memory space for use with DMA
15 * devices. This is the "generic" version. The PCI specific version
16 * is in pci.h
17 *
18 * Note: Drivers should NOT use this function directly, as it will break
19 * platforms with CONFIG_DMABOUNCE.
20 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
21 */
22extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
23
24/*
25 * Return whether the given device DMA address mask can be supported
26 * properly. For example, if your device can only drive the low 24-bits
27 * during bus mastering, then you would pass 0x00ffffff as the mask
28 * to this function.
29 *
30 * FIXME: This should really be a platform specific issue - we should
31 * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
32 */
33static inline int dma_supported(struct device *dev, u64 mask)
34{
35 return dev->dma_mask && *dev->dma_mask != 0;
36}
37
38static inline int dma_set_mask(struct device *dev, u64 dma_mask)
39{
40 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
41 return -EIO;
42
43 *dev->dma_mask = dma_mask;
44
45 return 0;
46}
47
48static inline int dma_get_cache_alignment(void)
49{
50 return 32;
51}
52
53static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
54{
55 return !!arch_is_coherent();
56}
57
58/*
59 * DMA errors are defined by all-bits-set in the DMA address.
60 */
61static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
62{
63 return dma_addr == ~0;
64}
65
66/*
67 * Dummy noncoherent implementation. We don't provide a dma_cache_sync
68 * function so drivers using this API are highlighted with build warnings.
69 */
70static inline void *
71dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
72{
73 return NULL;
74}
75
76static inline void
77dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
78 dma_addr_t handle)
79{
80}
81
82/**
83 * dma_alloc_coherent - allocate consistent memory for DMA
84 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
85 * @size: required memory size
86 * @handle: bus-specific DMA address
87 *
88 * Allocate some uncached, unbuffered memory for a device for
89 * performing DMA. This function allocates pages, and will
90 * return the CPU-viewed address, and sets @handle to be the
91 * device-viewed address.
92 */
93extern void *
94dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
95
96/**
97 * dma_free_coherent - free memory allocated by dma_alloc_coherent
98 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
99 * @size: size of memory originally requested in dma_alloc_coherent
100 * @cpu_addr: CPU-view address returned from dma_alloc_coherent
101 * @handle: device-view address returned from dma_alloc_coherent
102 *
103 * Free (and unmap) a DMA buffer previously allocated by
104 * dma_alloc_coherent().
105 *
106 * References to memory and mappings associated with cpu_addr/handle
107 * during and after this call executing are illegal.
108 */
109extern void
110dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
111 dma_addr_t handle);
112
113/**
114 * dma_mmap_coherent - map a coherent DMA allocation into user space
115 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
116 * @vma: vm_area_struct describing requested user mapping
117 * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
118 * @handle: device-view address returned from dma_alloc_coherent
119 * @size: size of memory originally requested in dma_alloc_coherent
120 *
121 * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
122 * into user space. The coherent DMA buffer must not be freed by the
123 * driver until the user space mapping has been released.
124 */
125int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
126 void *cpu_addr, dma_addr_t handle, size_t size);
127
128
129/**
130 * dma_alloc_writecombine - allocate writecombining memory for DMA
131 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
132 * @size: required memory size
133 * @handle: bus-specific DMA address
134 *
135 * Allocate some uncached, buffered memory for a device for
136 * performing DMA. This function allocates pages, and will
137 * return the CPU-viewed address, and sets @handle to be the
138 * device-viewed address.
139 */
140extern void *
141dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
142
143#define dma_free_writecombine(dev,size,cpu_addr,handle) \
144 dma_free_coherent(dev,size,cpu_addr,handle)
145
146int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
147 void *cpu_addr, dma_addr_t handle, size_t size);
148
149
150/**
151 * dma_map_single - map a single buffer for streaming DMA
152 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
153 * @cpu_addr: CPU direct mapped address of buffer
154 * @size: size of buffer to map
155 * @dir: DMA transfer direction
156 *
157 * Ensure that any data held in the cache is appropriately discarded
158 * or written back.
159 *
160 * The device owns this memory once this call has completed. The CPU
161 * can regain ownership by calling dma_unmap_single() or
162 * dma_sync_single_for_cpu().
163 */
164#ifndef CONFIG_DMABOUNCE
165static inline dma_addr_t
166dma_map_single(struct device *dev, void *cpu_addr, size_t size,
167 enum dma_data_direction dir)
168{
169 if (!arch_is_coherent())
170 dma_cache_maint(cpu_addr, size, dir);
171
172 return virt_to_dma(dev, (unsigned long)cpu_addr);
173}
174#else
175extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
176#endif
177
178/**
179 * dma_map_page - map a portion of a page for streaming DMA
180 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
181 * @page: page that buffer resides in
182 * @offset: offset into page for start of buffer
183 * @size: size of buffer to map
184 * @dir: DMA transfer direction
185 *
186 * Ensure that any data held in the cache is appropriately discarded
187 * or written back.
188 *
189 * The device owns this memory once this call has completed. The CPU
190 * can regain ownership by calling dma_unmap_page() or
191 * dma_sync_single_for_cpu().
192 */
193static inline dma_addr_t
194dma_map_page(struct device *dev, struct page *page,
195 unsigned long offset, size_t size,
196 enum dma_data_direction dir)
197{
198 return dma_map_single(dev, page_address(page) + offset, size, (int)dir);
199}
200
201/**
202 * dma_unmap_single - unmap a single buffer previously mapped
203 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
204 * @handle: DMA address of buffer
205 * @size: size of buffer to map
206 * @dir: DMA transfer direction
207 *
208 * Unmap a single streaming mode DMA translation. The handle and size
209 * must match what was provided in the previous dma_map_single() call.
210 * All other usages are undefined.
211 *
212 * After this call, reads by the CPU to the buffer are guaranteed to see
213 * whatever the device wrote there.
214 */
215#ifndef CONFIG_DMABOUNCE
216static inline void
217dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
218 enum dma_data_direction dir)
219{
220 /* nothing to do */
221}
222#else
223extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
224#endif
225
226/**
227 * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
228 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
229 * @handle: DMA address of buffer
230 * @size: size of buffer to map
231 * @dir: DMA transfer direction
232 *
233 * Unmap a single streaming mode DMA translation. The handle and size
234 * must match what was provided in the previous dma_map_single() call.
235 * All other usages are undefined.
236 *
237 * After this call, reads by the CPU to the buffer are guaranteed to see
238 * whatever the device wrote there.
239 */
240static inline void
241dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
242 enum dma_data_direction dir)
243{
244 dma_unmap_single(dev, handle, size, (int)dir);
245}
246
247/**
248 * dma_map_sg - map a set of SG buffers for streaming mode DMA
249 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
250 * @sg: list of buffers
251 * @nents: number of buffers to map
252 * @dir: DMA transfer direction
253 *
254 * Map a set of buffers described by scatterlist in streaming
255 * mode for DMA. This is the scatter-gather version of the
256 * above dma_map_single interface. Here the scatter gather list
257 * elements are each tagged with the appropriate dma address
258 * and length. They are obtained via sg_dma_{address,length}(SG).
259 *
260 * NOTE: An implementation may be able to use a smaller number of
261 * DMA address/length pairs than there are SG table elements.
262 * (for example via virtual mapping capabilities)
263 * The routine returns the number of addr/length pairs actually
264 * used, at most nents.
265 *
266 * Device ownership issues as mentioned above for dma_map_single are
267 * the same here.
268 */
269#ifndef CONFIG_DMABOUNCE
270static inline int
271dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
272 enum dma_data_direction dir)
273{
274 int i;
275
276 for (i = 0; i < nents; i++, sg++) {
277 char *virt;
278
279 sg->dma_address = page_to_dma(dev, sg_page(sg)) + sg->offset;
280 virt = sg_virt(sg);
281
282 if (!arch_is_coherent())
283 dma_cache_maint(virt, sg->length, dir);
284 }
285
286 return nents;
287}
288#else
289extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
290#endif
291
292/**
293 * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
294 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
295 * @sg: list of buffers
296 * @nents: number of buffers to map
297 * @dir: DMA transfer direction
298 *
299 * Unmap a set of streaming mode DMA translations.
300 * Again, CPU read rules concerning calls here are the same as for
301 * dma_unmap_single() above.
302 */
303#ifndef CONFIG_DMABOUNCE
304static inline void
305dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
306 enum dma_data_direction dir)
307{
308
309 /* nothing to do */
310}
311#else
312extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
313#endif
314
315
316/**
317 * dma_sync_single_for_cpu
318 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
319 * @handle: DMA address of buffer
320 * @size: size of buffer to map
321 * @dir: DMA transfer direction
322 *
323 * Make physical memory consistent for a single streaming mode DMA
324 * translation after a transfer.
325 *
326 * If you perform a dma_map_single() but wish to interrogate the
327 * buffer using the cpu, yet do not wish to teardown the PCI dma
328 * mapping, you must call this function before doing so. At the
329 * next point you give the PCI dma address back to the card, you
330 * must first the perform a dma_sync_for_device, and then the
331 * device again owns the buffer.
332 */
333#ifndef CONFIG_DMABOUNCE
334static inline void
335dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
336 enum dma_data_direction dir)
337{
338 if (!arch_is_coherent())
339 dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir);
340}
341
342static inline void
343dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
344 enum dma_data_direction dir)
345{
346 if (!arch_is_coherent())
347 dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir);
348}
349#else
350extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction);
351extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction);
352#endif
353
354
355/**
356 * dma_sync_sg_for_cpu
357 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
358 * @sg: list of buffers
359 * @nents: number of buffers to map
360 * @dir: DMA transfer direction
361 *
362 * Make physical memory consistent for a set of streaming
363 * mode DMA translations after a transfer.
364 *
365 * The same as dma_sync_single_for_* but for a scatter-gather list,
366 * same rules and usage.
367 */
368#ifndef CONFIG_DMABOUNCE
369static inline void
370dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
371 enum dma_data_direction dir)
372{
373 int i;
374
375 for (i = 0; i < nents; i++, sg++) {
376 char *virt = sg_virt(sg);
377 if (!arch_is_coherent())
378 dma_cache_maint(virt, sg->length, dir);
379 }
380}
381
382static inline void
383dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
384 enum dma_data_direction dir)
385{
386 int i;
387
388 for (i = 0; i < nents; i++, sg++) {
389 char *virt = sg_virt(sg);
390 if (!arch_is_coherent())
391 dma_cache_maint(virt, sg->length, dir);
392 }
393}
394#else
395extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
396extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
397#endif
398
399#ifdef CONFIG_DMABOUNCE
400/*
401 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
402 * and utilize bounce buffers as needed to work around limited DMA windows.
403 *
404 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
405 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
406 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
407 *
408 * The following are helper functions used by the dmabounce subystem
409 *
410 */
411
412/**
413 * dmabounce_register_dev
414 *
415 * @dev: valid struct device pointer
416 * @small_buf_size: size of buffers to use with small buffer pool
417 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
418 *
419 * This function should be called by low-level platform code to register
420 * a device as requireing DMA buffer bouncing. The function will allocate
421 * appropriate DMA pools for the device.
422 *
423 */
424extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
425
426/**
427 * dmabounce_unregister_dev
428 *
429 * @dev: valid struct device pointer
430 *
431 * This function should be called by low-level platform code when device
432 * that was previously registered with dmabounce_register_dev is removed
433 * from the system.
434 *
435 */
436extern void dmabounce_unregister_dev(struct device *);
437
438/**
439 * dma_needs_bounce
440 *
441 * @dev: valid struct device pointer
442 * @dma_handle: dma_handle of unbounced buffer
443 * @size: size of region being mapped
444 *
445 * Platforms that utilize the dmabounce mechanism must implement
446 * this function.
447 *
448 * The dmabounce routines call this function whenever a dma-mapping
449 * is requested to determine whether a given buffer needs to be bounced
450 * or not. The function must return 0 if the buffer is OK for
451 * DMA access and 1 if the buffer needs to be bounced.
452 *
453 */
454extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
455#endif /* CONFIG_DMABOUNCE */
456
457#endif /* __KERNEL__ */
458#endif
diff --git a/include/asm-arm/dma.h b/include/asm-arm/dma.h
deleted file mode 100644
index 9f2c5305c260..000000000000
--- a/include/asm-arm/dma.h
+++ /dev/null
@@ -1,143 +0,0 @@
1#ifndef __ASM_ARM_DMA_H
2#define __ASM_ARM_DMA_H
3
4typedef unsigned int dmach_t;
5
6#include <linux/spinlock.h>
7#include <asm/system.h>
8#include <asm/scatterlist.h>
9#include <asm/arch/dma.h>
10
11/*
12 * This is the maximum virtual address which can be DMA'd from.
13 */
14#ifndef MAX_DMA_ADDRESS
15#define MAX_DMA_ADDRESS 0xffffffff
16#endif
17
18/*
19 * DMA modes
20 */
21typedef unsigned int dmamode_t;
22
23#define DMA_MODE_MASK 3
24
25#define DMA_MODE_READ 0
26#define DMA_MODE_WRITE 1
27#define DMA_MODE_CASCADE 2
28#define DMA_AUTOINIT 4
29
30extern spinlock_t dma_spin_lock;
31
32static inline unsigned long claim_dma_lock(void)
33{
34 unsigned long flags;
35 spin_lock_irqsave(&dma_spin_lock, flags);
36 return flags;
37}
38
39static inline void release_dma_lock(unsigned long flags)
40{
41 spin_unlock_irqrestore(&dma_spin_lock, flags);
42}
43
44/* Clear the 'DMA Pointer Flip Flop'.
45 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
46 */
47#define clear_dma_ff(channel)
48
49/* Set only the page register bits of the transfer address.
50 *
51 * NOTE: This is an architecture specific function, and should
52 * be hidden from the drivers
53 */
54extern void set_dma_page(dmach_t channel, char pagenr);
55
56/* Request a DMA channel
57 *
58 * Some architectures may need to do allocate an interrupt
59 */
60extern int request_dma(dmach_t channel, const char * device_id);
61
62/* Free a DMA channel
63 *
64 * Some architectures may need to do free an interrupt
65 */
66extern void free_dma(dmach_t channel);
67
68/* Enable DMA for this channel
69 *
70 * On some architectures, this may have other side effects like
71 * enabling an interrupt and setting the DMA registers.
72 */
73extern void enable_dma(dmach_t channel);
74
75/* Disable DMA for this channel
76 *
77 * On some architectures, this may have other side effects like
78 * disabling an interrupt or whatever.
79 */
80extern void disable_dma(dmach_t channel);
81
82/* Test whether the specified channel has an active DMA transfer
83 */
84extern int dma_channel_active(dmach_t channel);
85
86/* Set the DMA scatter gather list for this channel
87 *
88 * This should not be called if a DMA channel is enabled,
89 * especially since some DMA architectures don't update the
90 * DMA address immediately, but defer it to the enable_dma().
91 */
92extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
93
94/* Set the DMA address for this channel
95 *
96 * This should not be called if a DMA channel is enabled,
97 * especially since some DMA architectures don't update the
98 * DMA address immediately, but defer it to the enable_dma().
99 */
100extern void __set_dma_addr(dmach_t channel, void *addr);
101#define set_dma_addr(channel, addr) \
102 __set_dma_addr(channel, bus_to_virt(addr))
103
104/* Set the DMA byte count for this channel
105 *
106 * This should not be called if a DMA channel is enabled,
107 * especially since some DMA architectures don't update the
108 * DMA count immediately, but defer it to the enable_dma().
109 */
110extern void set_dma_count(dmach_t channel, unsigned long count);
111
112/* Set the transfer direction for this channel
113 *
114 * This should not be called if a DMA channel is enabled,
115 * especially since some DMA architectures don't update the
116 * DMA transfer direction immediately, but defer it to the
117 * enable_dma().
118 */
119extern void set_dma_mode(dmach_t channel, dmamode_t mode);
120
121/* Set the transfer speed for this channel
122 */
123extern void set_dma_speed(dmach_t channel, int cycle_ns);
124
125/* Get DMA residue count. After a DMA transfer, this
126 * should return zero. Reading this while a DMA transfer is
127 * still in progress will return unpredictable results.
128 * If called before the channel has been used, it may return 1.
129 * Otherwise, it returns the number of _bytes_ left to transfer.
130 */
131extern int get_dma_residue(dmach_t channel);
132
133#ifndef NO_DMA
134#define NO_DMA 255
135#endif
136
137#ifdef CONFIG_PCI
138extern int isa_dma_bridge_buggy;
139#else
140#define isa_dma_bridge_buggy (0)
141#endif
142
143#endif /* _ARM_DMA_H */
diff --git a/include/asm-arm/domain.h b/include/asm-arm/domain.h
deleted file mode 100644
index 3c12a7625304..000000000000
--- a/include/asm-arm/domain.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * linux/include/asm-arm/domain.h
3 *
4 * Copyright (C) 1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_PROC_DOMAIN_H
11#define __ASM_PROC_DOMAIN_H
12
13/*
14 * Domain numbers
15 *
16 * DOMAIN_IO - domain 2 includes all IO only
17 * DOMAIN_USER - domain 1 includes all user memory only
18 * DOMAIN_KERNEL - domain 0 includes all kernel memory only
19 *
20 * The domain numbering depends on whether we support 36 physical
21 * address for I/O or not. Addresses above the 32 bit boundary can
22 * only be mapped using supersections and supersections can only
23 * be set for domain 0. We could just default to DOMAIN_IO as zero,
24 * but there may be systems with supersection support and no 36-bit
25 * addressing. In such cases, we want to map system memory with
26 * supersections to reduce TLB misses and footprint.
27 *
28 * 36-bit addressing and supersections are only available on
29 * CPUs based on ARMv6+ or the Intel XSC3 core.
30 */
31#ifndef CONFIG_IO_36
32#define DOMAIN_KERNEL 0
33#define DOMAIN_TABLE 0
34#define DOMAIN_USER 1
35#define DOMAIN_IO 2
36#else
37#define DOMAIN_KERNEL 2
38#define DOMAIN_TABLE 2
39#define DOMAIN_USER 1
40#define DOMAIN_IO 0
41#endif
42
43/*
44 * Domain types
45 */
46#define DOMAIN_NOACCESS 0
47#define DOMAIN_CLIENT 1
48#define DOMAIN_MANAGER 3
49
50#define domain_val(dom,type) ((type) << (2*(dom)))
51
52#ifndef __ASSEMBLY__
53
54#ifdef CONFIG_MMU
55#define set_domain(x) \
56 do { \
57 __asm__ __volatile__( \
58 "mcr p15, 0, %0, c3, c0 @ set domain" \
59 : : "r" (x)); \
60 isb(); \
61 } while (0)
62
63#define modify_domain(dom,type) \
64 do { \
65 struct thread_info *thread = current_thread_info(); \
66 unsigned int domain = thread->cpu_domain; \
67 domain &= ~domain_val(dom, DOMAIN_MANAGER); \
68 thread->cpu_domain = domain | domain_val(dom, type); \
69 set_domain(thread->cpu_domain); \
70 } while (0)
71
72#else
73#define set_domain(x) do { } while (0)
74#define modify_domain(dom,type) do { } while (0)
75#endif
76
77#endif
78#endif /* !__ASSEMBLY__ */
diff --git a/include/asm-arm/ecard.h b/include/asm-arm/ecard.h
deleted file mode 100644
index 5e22881a630d..000000000000
--- a/include/asm-arm/ecard.h
+++ /dev/null
@@ -1,219 +0,0 @@
1/*
2 * linux/include/asm-arm/ecard.h
3 *
4 * definitions for expansion cards
5 *
6 * This is a new system as from Linux 1.2.3
7 *
8 * Changelog:
9 * 11-12-1996 RMK Further minor improvements
10 * 12-09-1997 RMK Added interrupt enable/disable for card level
11 *
12 * Reference: Acorns Risc OS 3 Programmers Reference Manuals.
13 */
14
15#ifndef __ASM_ECARD_H
16#define __ASM_ECARD_H
17
18/*
19 * Currently understood cards (but not necessarily
20 * supported):
21 * Manufacturer Product ID
22 */
23#define MANU_ACORN 0x0000
24#define PROD_ACORN_SCSI 0x0002
25#define PROD_ACORN_ETHER1 0x0003
26#define PROD_ACORN_MFM 0x000b
27
28#define MANU_ANT2 0x0011
29#define PROD_ANT_ETHER3 0x00a4
30
31#define MANU_ATOMWIDE 0x0017
32#define PROD_ATOMWIDE_3PSERIAL 0x0090
33
34#define MANU_IRLAM_INSTRUMENTS 0x001f
35#define MANU_IRLAM_INSTRUMENTS_ETHERN 0x5678
36
37#define MANU_OAK 0x0021
38#define PROD_OAK_SCSI 0x0058
39
40#define MANU_MORLEY 0x002b
41#define PROD_MORLEY_SCSI_UNCACHED 0x0067
42
43#define MANU_CUMANA 0x003a
44#define PROD_CUMANA_SCSI_2 0x003a
45#define PROD_CUMANA_SCSI_1 0x00a0
46
47#define MANU_ICS 0x003c
48#define PROD_ICS_IDE 0x00ae
49
50#define MANU_ICS2 0x003d
51#define PROD_ICS2_IDE 0x00ae
52
53#define MANU_SERPORT 0x003f
54#define PROD_SERPORT_DSPORT 0x00b9
55
56#define MANU_ARXE 0x0041
57#define PROD_ARXE_SCSI 0x00be
58
59#define MANU_I3 0x0046
60#define PROD_I3_ETHERLAN500 0x00d4
61#define PROD_I3_ETHERLAN600 0x00ec
62#define PROD_I3_ETHERLAN600A 0x011e
63
64#define MANU_ANT 0x0053
65#define PROD_ANT_ETHERM 0x00d8
66#define PROD_ANT_ETHERB 0x00e4
67
68#define MANU_ALSYSTEMS 0x005b
69#define PROD_ALSYS_SCSIATAPI 0x0107
70
71#define MANU_MCS 0x0063
72#define PROD_MCS_CONNECT32 0x0125
73
74#define MANU_EESOX 0x0064
75#define PROD_EESOX_SCSI2 0x008c
76
77#define MANU_YELLOWSTONE 0x0096
78#define PROD_YELLOWSTONE_RAPIDE32 0x0120
79
80#ifdef ECARD_C
81#define CONST
82#else
83#define CONST const
84#endif
85
86#define MAX_ECARDS 9
87
88struct ecard_id { /* Card ID structure */
89 unsigned short manufacturer;
90 unsigned short product;
91 void *data;
92};
93
94struct in_ecid { /* Packed card ID information */
95 unsigned short product; /* Product code */
96 unsigned short manufacturer; /* Manufacturer code */
97 unsigned char id:4; /* Simple ID */
98 unsigned char cd:1; /* Chunk dir present */
99 unsigned char is:1; /* Interrupt status pointers */
100 unsigned char w:2; /* Width */
101 unsigned char country; /* Country */
102 unsigned char irqmask; /* IRQ mask */
103 unsigned char fiqmask; /* FIQ mask */
104 unsigned long irqoff; /* IRQ offset */
105 unsigned long fiqoff; /* FIQ offset */
106};
107
108typedef struct expansion_card ecard_t;
109typedef unsigned long *loader_t;
110
111typedef struct expansion_card_ops { /* Card handler routines */
112 void (*irqenable)(ecard_t *ec, int irqnr);
113 void (*irqdisable)(ecard_t *ec, int irqnr);
114 int (*irqpending)(ecard_t *ec);
115 void (*fiqenable)(ecard_t *ec, int fiqnr);
116 void (*fiqdisable)(ecard_t *ec, int fiqnr);
117 int (*fiqpending)(ecard_t *ec);
118} expansioncard_ops_t;
119
120#define ECARD_NUM_RESOURCES (6)
121
122#define ECARD_RES_IOCSLOW (0)
123#define ECARD_RES_IOCMEDIUM (1)
124#define ECARD_RES_IOCFAST (2)
125#define ECARD_RES_IOCSYNC (3)
126#define ECARD_RES_MEMC (4)
127#define ECARD_RES_EASI (5)
128
129#define ecard_resource_start(ec,nr) ((ec)->resource[nr].start)
130#define ecard_resource_end(ec,nr) ((ec)->resource[nr].end)
131#define ecard_resource_len(ec,nr) ((ec)->resource[nr].end - \
132 (ec)->resource[nr].start + 1)
133#define ecard_resource_flags(ec,nr) ((ec)->resource[nr].flags)
134
135/*
136 * This contains all the info needed on an expansion card
137 */
138struct expansion_card {
139 struct expansion_card *next;
140
141 struct device dev;
142 struct resource resource[ECARD_NUM_RESOURCES];
143
144 /* Public data */
145 void __iomem *irqaddr; /* address of IRQ register */
146 void __iomem *fiqaddr; /* address of FIQ register */
147 unsigned char irqmask; /* IRQ mask */
148 unsigned char fiqmask; /* FIQ mask */
149 unsigned char claimed; /* Card claimed? */
150 unsigned char easi; /* EASI card */
151
152 void *irq_data; /* Data for use for IRQ by card */
153 void *fiq_data; /* Data for use for FIQ by card */
154 const expansioncard_ops_t *ops; /* Enable/Disable Ops for card */
155
156 CONST unsigned int slot_no; /* Slot number */
157 CONST unsigned int dma; /* DMA number (for request_dma) */
158 CONST unsigned int irq; /* IRQ number (for request_irq) */
159 CONST unsigned int fiq; /* FIQ number (for request_irq) */
160 CONST struct in_ecid cid; /* Card Identification */
161
162 /* Private internal data */
163 const char *card_desc; /* Card description */
164 CONST unsigned int podaddr; /* Base Linux address for card */
165 CONST loader_t loader; /* loader program */
166 u64 dma_mask;
167};
168
169void ecard_setirq(struct expansion_card *ec, const struct expansion_card_ops *ops, void *irq_data);
170
171struct in_chunk_dir {
172 unsigned int start_offset;
173 union {
174 unsigned char string[256];
175 unsigned char data[1];
176 } d;
177};
178
179/*
180 * Read a chunk from an expansion card
181 * cd : where to put read data
182 * ec : expansion card info struct
183 * id : id number to find
184 * num: (n+1)'th id to find.
185 */
186extern int ecard_readchunk (struct in_chunk_dir *cd, struct expansion_card *ec, int id, int num);
187
188/*
189 * Request and release ecard resources
190 */
191extern int ecard_request_resources(struct expansion_card *ec);
192extern void ecard_release_resources(struct expansion_card *ec);
193
194void __iomem *ecardm_iomap(struct expansion_card *ec, unsigned int res,
195 unsigned long offset, unsigned long maxsize);
196#define ecardm_iounmap(__ec, __addr) devm_iounmap(&(__ec)->dev, __addr)
197
198extern struct bus_type ecard_bus_type;
199
200#define ECARD_DEV(_d) container_of((_d), struct expansion_card, dev)
201
202struct ecard_driver {
203 int (*probe)(struct expansion_card *, const struct ecard_id *id);
204 void (*remove)(struct expansion_card *);
205 void (*shutdown)(struct expansion_card *);
206 const struct ecard_id *id_table;
207 unsigned int id;
208 struct device_driver drv;
209};
210
211#define ECARD_DRV(_d) container_of((_d), struct ecard_driver, drv)
212
213#define ecard_set_drvdata(ec,data) dev_set_drvdata(&(ec)->dev, (data))
214#define ecard_get_drvdata(ec) dev_get_drvdata(&(ec)->dev)
215
216int ecard_register_driver(struct ecard_driver *);
217void ecard_remove_driver(struct ecard_driver *);
218
219#endif
diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h
deleted file mode 100644
index 4ca751627489..000000000000
--- a/include/asm-arm/elf.h
+++ /dev/null
@@ -1,116 +0,0 @@
1#ifndef __ASMARM_ELF_H
2#define __ASMARM_ELF_H
3
4#include <asm/hwcap.h>
5
6#ifndef __ASSEMBLY__
7/*
8 * ELF register definitions..
9 */
10#include <asm/ptrace.h>
11#include <asm/user.h>
12
13typedef unsigned long elf_greg_t;
14typedef unsigned long elf_freg_t[3];
15
16#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
17typedef elf_greg_t elf_gregset_t[ELF_NGREG];
18
19typedef struct user_fp elf_fpregset_t;
20#endif
21
22#define EM_ARM 40
23#define EF_ARM_APCS26 0x08
24#define EF_ARM_SOFT_FLOAT 0x200
25#define EF_ARM_EABI_MASK 0xFF000000
26
27#define R_ARM_NONE 0
28#define R_ARM_PC24 1
29#define R_ARM_ABS32 2
30#define R_ARM_CALL 28
31#define R_ARM_JUMP24 29
32
33/*
34 * These are used to set parameters in the core dumps.
35 */
36#define ELF_CLASS ELFCLASS32
37#ifdef __ARMEB__
38#define ELF_DATA ELFDATA2MSB
39#else
40#define ELF_DATA ELFDATA2LSB
41#endif
42#define ELF_ARCH EM_ARM
43
44#ifndef __ASSEMBLY__
45/*
46 * This yields a string that ld.so will use to load implementation
47 * specific libraries for optimization. This is more specific in
48 * intent than poking at uname or /proc/cpuinfo.
49 *
50 * For now we just provide a fairly general string that describes the
51 * processor family. This could be made more specific later if someone
52 * implemented optimisations that require it. 26-bit CPUs give you
53 * "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't
54 * supported). 32-bit CPUs give you "v3[lb]" for anything based on an
55 * ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1
56 * core.
57 */
58#define ELF_PLATFORM_SIZE 8
59#define ELF_PLATFORM (elf_platform)
60
61extern char elf_platform[];
62#endif
63
64/*
65 * This is used to ensure we don't load something for the wrong architecture.
66 */
67#define elf_check_arch(x) ((x)->e_machine == EM_ARM && ELF_PROC_OK(x))
68
69/*
70 * 32-bit code is always OK. Some cpus can do 26-bit, some can't.
71 */
72#define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x))
73
74#define ELF_THUMB_OK(x) \
75 ((elf_hwcap & HWCAP_THUMB && ((x)->e_entry & 1) == 1) || \
76 ((x)->e_entry & 3) == 0)
77
78#define ELF_26BIT_OK(x) \
79 ((elf_hwcap & HWCAP_26BIT && (x)->e_flags & EF_ARM_APCS26) || \
80 ((x)->e_flags & EF_ARM_APCS26) == 0)
81
82#define USE_ELF_CORE_DUMP
83#define ELF_EXEC_PAGESIZE 4096
84
85/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
86 use of this is to invoke "./ld.so someprog" to test out a new version of
87 the loader. We need to make sure that it is out of the way of the program
88 that it will "exec", and that there is sufficient room for the brk. */
89
90#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
91
92/* When the program starts, a1 contains a pointer to a function to be
93 registered with atexit, as per the SVR4 ABI. A value of 0 means we
94 have no such handler. */
95#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0
96
97/*
98 * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0
99 * and CP1, we only enable access to the iWMMXt coprocessor if the
100 * binary is EABI or softfloat (and thus, guaranteed not to use
101 * FPA instructions.)
102 */
103#define SET_PERSONALITY(ex, ibcs2) \
104 do { \
105 if ((ex).e_flags & EF_ARM_APCS26) { \
106 set_personality(PER_LINUX); \
107 } else { \
108 set_personality(PER_LINUX_32BIT); \
109 if (elf_hwcap & HWCAP_IWMMXT && (ex).e_flags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) \
110 set_thread_flag(TIF_USING_IWMMXT); \
111 else \
112 clear_thread_flag(TIF_USING_IWMMXT); \
113 } \
114 } while (0)
115
116#endif
diff --git a/include/asm-arm/emergency-restart.h b/include/asm-arm/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/include/asm-arm/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-arm/errno.h b/include/asm-arm/errno.h
deleted file mode 100644
index 6e60f0612bb6..000000000000
--- a/include/asm-arm/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ARM_ERRNO_H
2#define _ARM_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif
diff --git a/include/asm-arm/fb.h b/include/asm-arm/fb.h
deleted file mode 100644
index d92e99cd8c8a..000000000000
--- a/include/asm-arm/fb.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
12}
13
14static inline int fb_is_primary_device(struct fb_info *info)
15{
16 return 0;
17}
18
19#endif /* _ASM_FB_H_ */
diff --git a/include/asm-arm/fcntl.h b/include/asm-arm/fcntl.h
deleted file mode 100644
index a80b6607b2ef..000000000000
--- a/include/asm-arm/fcntl.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef _ARM_FCNTL_H
2#define _ARM_FCNTL_H
3
4#define O_DIRECTORY 040000 /* must be a directory */
5#define O_NOFOLLOW 0100000 /* don't follow links */
6#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */
7#define O_LARGEFILE 0400000
8
9#include <asm-generic/fcntl.h>
10
11#endif
diff --git a/include/asm-arm/fiq.h b/include/asm-arm/fiq.h
deleted file mode 100644
index a3bad09e825c..000000000000
--- a/include/asm-arm/fiq.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * linux/include/asm-arm/fiq.h
3 *
4 * Support for FIQ on ARM architectures.
5 * Written by Philip Blundell <philb@gnu.org>, 1998
6 * Re-written by Russell King
7 */
8
9#ifndef __ASM_FIQ_H
10#define __ASM_FIQ_H
11
12#include <asm/ptrace.h>
13
14struct fiq_handler {
15 struct fiq_handler *next;
16 /* Name
17 */
18 const char *name;
19 /* Called to ask driver to relinquish/
20 * reacquire FIQ
21 * return zero to accept, or -<errno>
22 */
23 int (*fiq_op)(void *, int relinquish);
24 /* data for the relinquish/reacquire functions
25 */
26 void *dev_id;
27};
28
29extern int claim_fiq(struct fiq_handler *f);
30extern void release_fiq(struct fiq_handler *f);
31extern void set_fiq_handler(void *start, unsigned int length);
32extern void set_fiq_regs(struct pt_regs *regs);
33extern void get_fiq_regs(struct pt_regs *regs);
34extern void enable_fiq(int fiq);
35extern void disable_fiq(int fiq);
36
37#endif
diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h
deleted file mode 100644
index 9918aa46d9e5..000000000000
--- a/include/asm-arm/flat.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * include/asm-arm/flat.h -- uClinux flat-format executables
3 */
4
5#ifndef __ARM_FLAT_H__
6#define __ARM_FLAT_H__
7
8/* An odd number of words will be pushed after this alignment, so
9 deliberately misalign the value. */
10#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4)
11#define flat_argvp_envp_on_stack() 1
12#define flat_old_ram_flag(flags) (flags)
13#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
14#define flat_get_addr_from_rp(rp, relval, flags, persistent) get_unaligned(rp)
15#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp)
16#define flat_get_relocate_addr(rel) (rel)
17#define flat_set_persistent(relval, p) 0
18
19#endif /* __ARM_FLAT_H__ */
diff --git a/include/asm-arm/floppy.h b/include/asm-arm/floppy.h
deleted file mode 100644
index 41a5e9d6bb69..000000000000
--- a/include/asm-arm/floppy.h
+++ /dev/null
@@ -1,148 +0,0 @@
1/*
2 * linux/include/asm-arm/floppy.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Note that we don't touch FLOPPY_DMA nor FLOPPY_IRQ here
11 */
12#ifndef __ASM_ARM_FLOPPY_H
13#define __ASM_ARM_FLOPPY_H
14#if 0
15#include <asm/arch/floppy.h>
16#endif
17
18#define fd_outb(val,port) \
19 do { \
20 if ((port) == FD_DOR) \
21 fd_setdor((val)); \
22 else \
23 outb((val),(port)); \
24 } while(0)
25
26#define fd_inb(port) inb((port))
27#define fd_request_irq() request_irq(IRQ_FLOPPYDISK,floppy_interrupt,\
28 IRQF_DISABLED,"floppy",NULL)
29#define fd_free_irq() free_irq(IRQ_FLOPPYDISK,NULL)
30#define fd_disable_irq() disable_irq(IRQ_FLOPPYDISK)
31#define fd_enable_irq() enable_irq(IRQ_FLOPPYDISK)
32
33static inline int fd_dma_setup(void *data, unsigned int length,
34 unsigned int mode, unsigned long addr)
35{
36 set_dma_mode(DMA_FLOPPY, mode);
37 __set_dma_addr(DMA_FLOPPY, data);
38 set_dma_count(DMA_FLOPPY, length);
39 virtual_dma_port = addr;
40 enable_dma(DMA_FLOPPY);
41 return 0;
42}
43#define fd_dma_setup fd_dma_setup
44
45#define fd_request_dma() request_dma(DMA_FLOPPY,"floppy")
46#define fd_free_dma() free_dma(DMA_FLOPPY)
47#define fd_disable_dma() disable_dma(DMA_FLOPPY)
48
49/* need to clean up dma.h */
50#define DMA_FLOPPYDISK DMA_FLOPPY
51
52/* Floppy_selects is the list of DOR's to select drive fd
53 *
54 * On initialisation, the floppy list is scanned, and the drives allocated
55 * in the order that they are found. This is done by seeking the drive
56 * to a non-zero track, and then restoring it to track 0. If an error occurs,
57 * then there is no floppy drive present. [to be put back in again]
58 */
59static unsigned char floppy_selects[2][4] =
60{
61 { 0x10, 0x21, 0x23, 0x33 },
62 { 0x10, 0x21, 0x23, 0x33 }
63};
64
65#define fd_setdor(dor) \
66do { \
67 int new_dor = (dor); \
68 if (new_dor & 0xf0) \
69 new_dor = (new_dor & 0x0c) | floppy_selects[fdc][new_dor & 3]; \
70 else \
71 new_dor &= 0x0c; \
72 outb(new_dor, FD_DOR); \
73} while (0)
74
75/*
76 * Someday, we'll automatically detect which drives are present...
77 */
78static inline void fd_scandrives (void)
79{
80#if 0
81 int floppy, drive_count;
82
83 fd_disable_irq();
84 raw_cmd = &default_raw_cmd;
85 raw_cmd->flags = FD_RAW_SPIN | FD_RAW_NEED_SEEK;
86 raw_cmd->track = 0;
87 raw_cmd->rate = ?;
88 drive_count = 0;
89 for (floppy = 0; floppy < 4; floppy ++) {
90 current_drive = drive_count;
91 /*
92 * Turn on floppy motor
93 */
94 if (start_motor(redo_fd_request))
95 continue;
96 /*
97 * Set up FDC
98 */
99 fdc_specify();
100 /*
101 * Tell FDC to recalibrate
102 */
103 output_byte(FD_RECALIBRATE);
104 LAST_OUT(UNIT(floppy));
105 /* wait for command to complete */
106 if (!successful) {
107 int i;
108 for (i = drive_count; i < 3; i--)
109 floppy_selects[fdc][i] = floppy_selects[fdc][i + 1];
110 floppy_selects[fdc][3] = 0;
111 floppy -= 1;
112 } else
113 drive_count++;
114 }
115#else
116 floppy_selects[0][0] = 0x10;
117 floppy_selects[0][1] = 0x21;
118 floppy_selects[0][2] = 0x23;
119 floppy_selects[0][3] = 0x33;
120#endif
121}
122
123#define FDC1 (0x3f0)
124
125#define FLOPPY0_TYPE 4
126#define FLOPPY1_TYPE 4
127
128#define N_FDC 1
129#define N_DRIVE 4
130
131#define CROSS_64KB(a,s) (0)
132
133/*
134 * This allows people to reverse the order of
135 * fd0 and fd1, in case their hardware is
136 * strangely connected (as some RiscPCs
137 * and A5000s seem to be).
138 */
139static void driveswap(int *ints, int dummy, int dummy2)
140{
141 floppy_selects[0][0] ^= floppy_selects[0][1];
142 floppy_selects[0][1] ^= floppy_selects[0][0];
143 floppy_selects[0][0] ^= floppy_selects[0][1];
144}
145
146#define EXTRA_FLOPPY_PARAMS ,{ "driveswap", &driveswap, NULL, 0, 0 }
147
148#endif
diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h
deleted file mode 100644
index 392eb5332323..000000000000
--- a/include/asm-arm/fpstate.h
+++ /dev/null
@@ -1,93 +0,0 @@
1/*
2 * linux/include/asm-arm/fpstate.h
3 *
4 * Copyright (C) 1995 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARM_FPSTATE_H
12#define __ASM_ARM_FPSTATE_H
13
14
15#ifndef __ASSEMBLY__
16
17/*
18 * VFP storage area has:
19 * - FPEXC, FPSCR, FPINST and FPINST2.
20 * - 16 or 32 double precision data registers
21 * - an implementation-dependant word of state for FLDMX/FSTMX (pre-ARMv6)
22 *
23 * FPEXC will always be non-zero once the VFP has been used in this process.
24 */
25
26struct vfp_hard_struct {
27#ifdef CONFIG_VFPv3
28 __u64 fpregs[32];
29#else
30 __u64 fpregs[16];
31#endif
32#if __LINUX_ARM_ARCH__ < 6
33 __u32 fpmx_state;
34#endif
35 __u32 fpexc;
36 __u32 fpscr;
37 /*
38 * VFP implementation specific state
39 */
40 __u32 fpinst;
41 __u32 fpinst2;
42
43#ifdef CONFIG_SMP
44 __u32 cpu;
45#endif
46};
47
48union vfp_state {
49 struct vfp_hard_struct hard;
50};
51
52extern void vfp_flush_thread(union vfp_state *);
53extern void vfp_release_thread(union vfp_state *);
54
55#define FP_HARD_SIZE 35
56
57struct fp_hard_struct {
58 unsigned int save[FP_HARD_SIZE]; /* as yet undefined */
59};
60
61#define FP_SOFT_SIZE 35
62
63struct fp_soft_struct {
64 unsigned int save[FP_SOFT_SIZE]; /* undefined information */
65};
66
67#define IWMMXT_SIZE 0x98
68
69struct iwmmxt_struct {
70 unsigned int save[IWMMXT_SIZE / sizeof(unsigned int)];
71};
72
73union fp_state {
74 struct fp_hard_struct hard;
75 struct fp_soft_struct soft;
76#ifdef CONFIG_IWMMXT
77 struct iwmmxt_struct iwmmxt;
78#endif
79};
80
81#define FP_SIZE (sizeof(union fp_state) / sizeof(int))
82
83struct crunch_state {
84 unsigned int mvdx[16][2];
85 unsigned int mvax[4][3];
86 unsigned int dspsc[2];
87};
88
89#define CRUNCH_SIZE sizeof(struct crunch_state)
90
91#endif
92
93#endif
diff --git a/include/asm-arm/ftrace.h b/include/asm-arm/ftrace.h
deleted file mode 100644
index 584ef9a8e5a5..000000000000
--- a/include/asm-arm/ftrace.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef _ASM_ARM_FTRACE
2#define _ASM_ARM_FTRACE
3
4#ifdef CONFIG_FTRACE
5#define MCOUNT_ADDR ((long)(mcount))
6#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */
7
8#ifndef __ASSEMBLY__
9extern void mcount(void);
10#endif
11
12#endif
13
14#endif /* _ASM_ARM_FTRACE */
diff --git a/include/asm-arm/futex.h b/include/asm-arm/futex.h
deleted file mode 100644
index 6a332a9f099c..000000000000
--- a/include/asm-arm/futex.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif
diff --git a/include/asm-arm/glue.h b/include/asm-arm/glue.h
deleted file mode 100644
index a97a182ba287..000000000000
--- a/include/asm-arm/glue.h
+++ /dev/null
@@ -1,149 +0,0 @@
1/*
2 * linux/include/asm-arm/glue.h
3 *
4 * Copyright (C) 1997-1999 Russell King
5 * Copyright (C) 2000-2002 Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This file provides the glue to stick the processor-specific bits
12 * into the kernel in an efficient manner. The idea is to use branches
13 * when we're only targetting one class of TLB, or indirect calls
14 * when we're targetting multiple classes of TLBs.
15 */
16#ifdef __KERNEL__
17
18
19#ifdef __STDC__
20#define ____glue(name,fn) name##fn
21#else
22#define ____glue(name,fn) name/**/fn
23#endif
24#define __glue(name,fn) ____glue(name,fn)
25
26
27
28/*
29 * Data Abort Model
30 * ================
31 *
32 * We have the following to choose from:
33 * arm6 - ARM6 style
34 * arm7 - ARM7 style
35 * v4_early - ARMv4 without Thumb early abort handler
36 * v4t_late - ARMv4 with Thumb late abort handler
37 * v4t_early - ARMv4 with Thumb early abort handler
38 * v5tej_early - ARMv5 with Thumb and Java early abort handler
39 * xscale - ARMv5 with Thumb with Xscale extensions
40 * v6_early - ARMv6 generic early abort handler
41 * v7_early - ARMv7 generic early abort handler
42 */
43#undef CPU_DABORT_HANDLER
44#undef MULTI_DABORT
45
46#if defined(CONFIG_CPU_ARM610)
47# ifdef CPU_DABORT_HANDLER
48# define MULTI_DABORT 1
49# else
50# define CPU_DABORT_HANDLER cpu_arm6_data_abort
51# endif
52#endif
53
54#if defined(CONFIG_CPU_ARM710)
55# ifdef CPU_DABORT_HANDLER
56# define MULTI_DABORT 1
57# else
58# define CPU_DABORT_HANDLER cpu_arm7_data_abort
59# endif
60#endif
61
62#ifdef CONFIG_CPU_ABRT_LV4T
63# ifdef CPU_DABORT_HANDLER
64# define MULTI_DABORT 1
65# else
66# define CPU_DABORT_HANDLER v4t_late_abort
67# endif
68#endif
69
70#ifdef CONFIG_CPU_ABRT_EV4
71# ifdef CPU_DABORT_HANDLER
72# define MULTI_DABORT 1
73# else
74# define CPU_DABORT_HANDLER v4_early_abort
75# endif
76#endif
77
78#ifdef CONFIG_CPU_ABRT_EV4T
79# ifdef CPU_DABORT_HANDLER
80# define MULTI_DABORT 1
81# else
82# define CPU_DABORT_HANDLER v4t_early_abort
83# endif
84#endif
85
86#ifdef CONFIG_CPU_ABRT_EV5TJ
87# ifdef CPU_DABORT_HANDLER
88# define MULTI_DABORT 1
89# else
90# define CPU_DABORT_HANDLER v5tj_early_abort
91# endif
92#endif
93
94#ifdef CONFIG_CPU_ABRT_EV5T
95# ifdef CPU_DABORT_HANDLER
96# define MULTI_DABORT 1
97# else
98# define CPU_DABORT_HANDLER v5t_early_abort
99# endif
100#endif
101
102#ifdef CONFIG_CPU_ABRT_EV6
103# ifdef CPU_DABORT_HANDLER
104# define MULTI_DABORT 1
105# else
106# define CPU_DABORT_HANDLER v6_early_abort
107# endif
108#endif
109
110#ifdef CONFIG_CPU_ABRT_EV7
111# ifdef CPU_DABORT_HANDLER
112# define MULTI_DABORT 1
113# else
114# define CPU_DABORT_HANDLER v7_early_abort
115# endif
116#endif
117
118#ifndef CPU_DABORT_HANDLER
119#error Unknown data abort handler type
120#endif
121
122/*
123 * Prefetch abort handler. If the CPU has an IFAR use that, otherwise
124 * use the address of the aborted instruction
125 */
126#undef CPU_PABORT_HANDLER
127#undef MULTI_PABORT
128
129#ifdef CONFIG_CPU_PABRT_IFAR
130# ifdef CPU_PABORT_HANDLER
131# define MULTI_PABORT 1
132# else
133# define CPU_PABORT_HANDLER(reg, insn) mrc p15, 0, reg, cr6, cr0, 2
134# endif
135#endif
136
137#ifdef CONFIG_CPU_PABRT_NOIFAR
138# ifdef CPU_PABORT_HANDLER
139# define MULTI_PABORT 1
140# else
141# define CPU_PABORT_HANDLER(reg, insn) mov reg, insn
142# endif
143#endif
144
145#ifndef CPU_PABORT_HANDLER
146#error Unknown prefetch abort handler type
147#endif
148
149#endif
diff --git a/include/asm-arm/gpio.h b/include/asm-arm/gpio.h
deleted file mode 100644
index fff4f800ee42..000000000000
--- a/include/asm-arm/gpio.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ARCH_ARM_GPIO_H
2#define _ARCH_ARM_GPIO_H
3
4/* not all ARM platforms necessarily support this API ... */
5#include <asm/arch/gpio.h>
6
7#endif /* _ARCH_ARM_GPIO_H */
diff --git a/include/asm-arm/hardirq.h b/include/asm-arm/hardirq.h
deleted file mode 100644
index 182310b99195..000000000000
--- a/include/asm-arm/hardirq.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef __ASM_HARDIRQ_H
2#define __ASM_HARDIRQ_H
3
4#include <linux/cache.h>
5#include <linux/threads.h>
6#include <asm/irq.h>
7
8typedef struct {
9 unsigned int __softirq_pending;
10 unsigned int local_timer_irqs;
11} ____cacheline_aligned irq_cpustat_t;
12
13#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
14
15#if NR_IRQS > 256
16#define HARDIRQ_BITS 9
17#else
18#define HARDIRQ_BITS 8
19#endif
20
21/*
22 * The hardirq mask has to be large enough to have space
23 * for potentially all IRQ sources in the system nesting
24 * on a single CPU:
25 */
26#if (1 << HARDIRQ_BITS) < NR_IRQS
27# error HARDIRQ_BITS is too low!
28#endif
29
30#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1
31
32#endif /* __ASM_HARDIRQ_H */
diff --git a/include/asm-arm/hardware.h b/include/asm-arm/hardware.h
deleted file mode 100644
index 1fd1a5b6504b..000000000000
--- a/include/asm-arm/hardware.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware.h
3 *
4 * Copyright (C) 1996 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Common hardware definitions
11 */
12
13#ifndef __ASM_HARDWARE_H
14#define __ASM_HARDWARE_H
15
16#include <asm/arch/hardware.h>
17
18#endif
diff --git a/include/asm-arm/hardware/arm_timer.h b/include/asm-arm/hardware/arm_timer.h
deleted file mode 100644
index 04be3bdf46b8..000000000000
--- a/include/asm-arm/hardware/arm_timer.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H
2#define __ASM_ARM_HARDWARE_ARM_TIMER_H
3
4#define TIMER_LOAD 0x00
5#define TIMER_VALUE 0x04
6#define TIMER_CTRL 0x08
7#define TIMER_CTRL_ONESHOT (1 << 0)
8#define TIMER_CTRL_32BIT (1 << 1)
9#define TIMER_CTRL_DIV1 (0 << 2)
10#define TIMER_CTRL_DIV16 (1 << 2)
11#define TIMER_CTRL_DIV256 (2 << 2)
12#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */
13#define TIMER_CTRL_PERIODIC (1 << 6)
14#define TIMER_CTRL_ENABLE (1 << 7)
15
16#define TIMER_INTCLR 0x0c
17#define TIMER_RIS 0x10
18#define TIMER_MIS 0x14
19#define TIMER_BGLOAD 0x18
20
21#endif
diff --git a/include/asm-arm/hardware/arm_twd.h b/include/asm-arm/hardware/arm_twd.h
deleted file mode 100644
index e521b70713c8..000000000000
--- a/include/asm-arm/hardware/arm_twd.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef __ASM_HARDWARE_TWD_H
2#define __ASM_HARDWARE_TWD_H
3
4#define TWD_TIMER_LOAD 0x00
5#define TWD_TIMER_COUNTER 0x04
6#define TWD_TIMER_CONTROL 0x08
7#define TWD_TIMER_INTSTAT 0x0C
8
9#define TWD_WDOG_LOAD 0x20
10#define TWD_WDOG_COUNTER 0x24
11#define TWD_WDOG_CONTROL 0x28
12#define TWD_WDOG_INTSTAT 0x2C
13#define TWD_WDOG_RESETSTAT 0x30
14#define TWD_WDOG_DISABLE 0x34
15
16#define TWD_TIMER_CONTROL_ENABLE (1 << 0)
17#define TWD_TIMER_CONTROL_ONESHOT (0 << 1)
18#define TWD_TIMER_CONTROL_PERIODIC (1 << 1)
19#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2)
20
21#endif
diff --git a/include/asm-arm/hardware/cache-l2x0.h b/include/asm-arm/hardware/cache-l2x0.h
deleted file mode 100644
index 54029a740396..000000000000
--- a/include/asm-arm/hardware/cache-l2x0.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * include/asm-arm/hardware/cache-l2x0.h
3 *
4 * Copyright (C) 2007 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef __ASM_ARM_HARDWARE_L2X0_H
21#define __ASM_ARM_HARDWARE_L2X0_H
22
23#define L2X0_CACHE_ID 0x000
24#define L2X0_CACHE_TYPE 0x004
25#define L2X0_CTRL 0x100
26#define L2X0_AUX_CTRL 0x104
27#define L2X0_EVENT_CNT_CTRL 0x200
28#define L2X0_EVENT_CNT1_CFG 0x204
29#define L2X0_EVENT_CNT0_CFG 0x208
30#define L2X0_EVENT_CNT1_VAL 0x20C
31#define L2X0_EVENT_CNT0_VAL 0x210
32#define L2X0_INTR_MASK 0x214
33#define L2X0_MASKED_INTR_STAT 0x218
34#define L2X0_RAW_INTR_STAT 0x21C
35#define L2X0_INTR_CLEAR 0x220
36#define L2X0_CACHE_SYNC 0x730
37#define L2X0_INV_LINE_PA 0x770
38#define L2X0_INV_WAY 0x77C
39#define L2X0_CLEAN_LINE_PA 0x7B0
40#define L2X0_CLEAN_LINE_IDX 0x7B8
41#define L2X0_CLEAN_WAY 0x7BC
42#define L2X0_CLEAN_INV_LINE_PA 0x7F0
43#define L2X0_CLEAN_INV_LINE_IDX 0x7F8
44#define L2X0_CLEAN_INV_WAY 0x7FC
45#define L2X0_LOCKDOWN_WAY_D 0x900
46#define L2X0_LOCKDOWN_WAY_I 0x904
47#define L2X0_TEST_OPERATION 0xF00
48#define L2X0_LINE_DATA 0xF10
49#define L2X0_LINE_TAG 0xF30
50#define L2X0_DEBUG_CTRL 0xF40
51
52#ifndef __ASSEMBLY__
53extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);
54#endif
55
56#endif
diff --git a/include/asm-arm/hardware/clps7111.h b/include/asm-arm/hardware/clps7111.h
deleted file mode 100644
index 8d3228dc1778..000000000000
--- a/include/asm-arm/hardware/clps7111.h
+++ /dev/null
@@ -1,184 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/clps7111.h
3 *
4 * This file contains the hardware definitions of the CLPS7111 internal
5 * registers.
6 *
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23#ifndef __ASM_HARDWARE_CLPS7111_H
24#define __ASM_HARDWARE_CLPS7111_H
25
26#define CLPS7111_PHYS_BASE (0x80000000)
27
28#ifndef __ASSEMBLY__
29#define clps_readb(off) __raw_readb(CLPS7111_BASE + (off))
30#define clps_readw(off) __raw_readw(CLPS7111_BASE + (off))
31#define clps_readl(off) __raw_readl(CLPS7111_BASE + (off))
32#define clps_writeb(val,off) __raw_writeb(val, CLPS7111_BASE + (off))
33#define clps_writew(val,off) __raw_writew(val, CLPS7111_BASE + (off))
34#define clps_writel(val,off) __raw_writel(val, CLPS7111_BASE + (off))
35#endif
36
37#define PADR (0x0000)
38#define PBDR (0x0001)
39#define PDDR (0x0003)
40#define PADDR (0x0040)
41#define PBDDR (0x0041)
42#define PDDDR (0x0043)
43#define PEDR (0x0080)
44#define PEDDR (0x00c0)
45#define SYSCON1 (0x0100)
46#define SYSFLG1 (0x0140)
47#define MEMCFG1 (0x0180)
48#define MEMCFG2 (0x01c0)
49#define DRFPR (0x0200)
50#define INTSR1 (0x0240)
51#define INTMR1 (0x0280)
52#define LCDCON (0x02c0)
53#define TC1D (0x0300)
54#define TC2D (0x0340)
55#define RTCDR (0x0380)
56#define RTCMR (0x03c0)
57#define PMPCON (0x0400)
58#define CODR (0x0440)
59#define UARTDR1 (0x0480)
60#define UBRLCR1 (0x04c0)
61#define SYNCIO (0x0500)
62#define PALLSW (0x0540)
63#define PALMSW (0x0580)
64#define STFCLR (0x05c0)
65#define BLEOI (0x0600)
66#define MCEOI (0x0640)
67#define TEOI (0x0680)
68#define TC1EOI (0x06c0)
69#define TC2EOI (0x0700)
70#define RTCEOI (0x0740)
71#define UMSEOI (0x0780)
72#define COEOI (0x07c0)
73#define HALT (0x0800)
74#define STDBY (0x0840)
75
76#define FBADDR (0x1000)
77#define SYSCON2 (0x1100)
78#define SYSFLG2 (0x1140)
79#define INTSR2 (0x1240)
80#define INTMR2 (0x1280)
81#define UARTDR2 (0x1480)
82#define UBRLCR2 (0x14c0)
83#define SS2DR (0x1500)
84#define SRXEOF (0x1600)
85#define SS2POP (0x16c0)
86#define KBDEOI (0x1700)
87
88/* common bits: SYSCON1 / SYSCON2 */
89#define SYSCON_UARTEN (1 << 8)
90
91#define SYSCON1_KBDSCAN(x) ((x) & 15)
92#define SYSCON1_KBDSCANMASK (15)
93#define SYSCON1_TC1M (1 << 4)
94#define SYSCON1_TC1S (1 << 5)
95#define SYSCON1_TC2M (1 << 6)
96#define SYSCON1_TC2S (1 << 7)
97#define SYSCON1_UART1EN SYSCON_UARTEN
98#define SYSCON1_BZTOG (1 << 9)
99#define SYSCON1_BZMOD (1 << 10)
100#define SYSCON1_DBGEN (1 << 11)
101#define SYSCON1_LCDEN (1 << 12)
102#define SYSCON1_CDENTX (1 << 13)
103#define SYSCON1_CDENRX (1 << 14)
104#define SYSCON1_SIREN (1 << 15)
105#define SYSCON1_ADCKSEL(x) (((x) & 3) << 16)
106#define SYSCON1_ADCKSEL_MASK (3 << 16)
107#define SYSCON1_EXCKEN (1 << 18)
108#define SYSCON1_WAKEDIS (1 << 19)
109#define SYSCON1_IRTXM (1 << 20)
110
111/* common bits: SYSFLG1 / SYSFLG2 */
112#define SYSFLG_UBUSY (1 << 11)
113#define SYSFLG_URXFE (1 << 22)
114#define SYSFLG_UTXFF (1 << 23)
115
116#define SYSFLG1_MCDR (1 << 0)
117#define SYSFLG1_DCDET (1 << 1)
118#define SYSFLG1_WUDR (1 << 2)
119#define SYSFLG1_WUON (1 << 3)
120#define SYSFLG1_CTS (1 << 8)
121#define SYSFLG1_DSR (1 << 9)
122#define SYSFLG1_DCD (1 << 10)
123#define SYSFLG1_UBUSY SYSFLG_UBUSY
124#define SYSFLG1_NBFLG (1 << 12)
125#define SYSFLG1_RSTFLG (1 << 13)
126#define SYSFLG1_PFFLG (1 << 14)
127#define SYSFLG1_CLDFLG (1 << 15)
128#define SYSFLG1_URXFE SYSFLG_URXFE
129#define SYSFLG1_UTXFF SYSFLG_UTXFF
130#define SYSFLG1_CRXFE (1 << 24)
131#define SYSFLG1_CTXFF (1 << 25)
132#define SYSFLG1_SSIBUSY (1 << 26)
133#define SYSFLG1_ID (1 << 29)
134
135#define SYSFLG2_SSRXOF (1 << 0)
136#define SYSFLG2_RESVAL (1 << 1)
137#define SYSFLG2_RESFRM (1 << 2)
138#define SYSFLG2_SS2RXFE (1 << 3)
139#define SYSFLG2_SS2TXFF (1 << 4)
140#define SYSFLG2_SS2TXUF (1 << 5)
141#define SYSFLG2_CKMODE (1 << 6)
142#define SYSFLG2_UBUSY SYSFLG_UBUSY
143#define SYSFLG2_URXFE SYSFLG_URXFE
144#define SYSFLG2_UTXFF SYSFLG_UTXFF
145
146#define LCDCON_GSEN (1 << 30)
147#define LCDCON_GSMD (1 << 31)
148
149#define SYSCON2_SERSEL (1 << 0)
150#define SYSCON2_KBD6 (1 << 1)
151#define SYSCON2_DRAMZ (1 << 2)
152#define SYSCON2_KBWEN (1 << 3)
153#define SYSCON2_SS2TXEN (1 << 4)
154#define SYSCON2_PCCARD1 (1 << 5)
155#define SYSCON2_PCCARD2 (1 << 6)
156#define SYSCON2_SS2RXEN (1 << 7)
157#define SYSCON2_UART2EN SYSCON_UARTEN
158#define SYSCON2_SS2MAEN (1 << 9)
159#define SYSCON2_OSTB (1 << 12)
160#define SYSCON2_CLKENSL (1 << 13)
161#define SYSCON2_BUZFREQ (1 << 14)
162
163/* common bits: UARTDR1 / UARTDR2 */
164#define UARTDR_FRMERR (1 << 8)
165#define UARTDR_PARERR (1 << 9)
166#define UARTDR_OVERR (1 << 10)
167
168/* common bits: UBRLCR1 / UBRLCR2 */
169#define UBRLCR_BAUD_MASK ((1 << 12) - 1)
170#define UBRLCR_BREAK (1 << 12)
171#define UBRLCR_PRTEN (1 << 13)
172#define UBRLCR_EVENPRT (1 << 14)
173#define UBRLCR_XSTOP (1 << 15)
174#define UBRLCR_FIFOEN (1 << 16)
175#define UBRLCR_WRDLEN5 (0 << 17)
176#define UBRLCR_WRDLEN6 (1 << 17)
177#define UBRLCR_WRDLEN7 (2 << 17)
178#define UBRLCR_WRDLEN8 (3 << 17)
179#define UBRLCR_WRDLEN_MASK (3 << 17)
180
181#define SYNCIO_SMCKEN (1 << 13)
182#define SYNCIO_TXFRMEN (1 << 14)
183
184#endif /* __ASM_HARDWARE_CLPS7111_H */
diff --git a/include/asm-arm/hardware/cs89712.h b/include/asm-arm/hardware/cs89712.h
deleted file mode 100644
index ad99a3e1b802..000000000000
--- a/include/asm-arm/hardware/cs89712.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/cs89712.h
3 *
4 * This file contains the hardware definitions of the CS89712
5 * additional internal registers.
6 *
7 * Copyright (C) 2001 Thomas Gleixner autronix automation <gleixner@autronix.de>
8 *
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24#ifndef __ASM_HARDWARE_CS89712_H
25#define __ASM_HARDWARE_CS89712_H
26
27/*
28* CS89712 additional registers
29*/
30
31#define PCDR 0x0002 /* Port C Data register ---------------------------- */
32#define PCDDR 0x0042 /* Port C Data Direction register ------------------ */
33#define SDCONF 0x2300 /* SDRAM Configuration register ---------------------*/
34#define SDRFPR 0x2340 /* SDRAM Refresh period register --------------------*/
35
36#define SDCONF_ACTIVE (1 << 10)
37#define SDCONF_CLKCTL (1 << 9)
38#define SDCONF_WIDTH_4 (0 << 7)
39#define SDCONF_WIDTH_8 (1 << 7)
40#define SDCONF_WIDTH_16 (2 << 7)
41#define SDCONF_WIDTH_32 (3 << 7)
42#define SDCONF_SIZE_16 (0 << 5)
43#define SDCONF_SIZE_64 (1 << 5)
44#define SDCONF_SIZE_128 (2 << 5)
45#define SDCONF_SIZE_256 (3 << 5)
46#define SDCONF_CASLAT_2 (2)
47#define SDCONF_CASLAT_3 (3)
48
49#endif /* __ASM_HARDWARE_CS89712_H */
diff --git a/include/asm-arm/hardware/debug-8250.S b/include/asm-arm/hardware/debug-8250.S
deleted file mode 100644
index 07c97fb233fc..000000000000
--- a/include/asm-arm/hardware/debug-8250.S
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/debug-8250.S
3 *
4 * Copyright (C) 1994-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/serial_reg.h>
11
12 .macro senduart,rd,rx
13 strb \rd, [\rx, #UART_TX << UART_SHIFT]
14 .endm
15
16 .macro busyuart,rd,rx
171002: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
18 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
19 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
20 bne 1002b
21 .endm
22
23 .macro waituart,rd,rx
24#ifdef FLOW_CONTROL
251001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
26 tst \rd, #UART_MSR_CTS
27 beq 1001b
28#endif
29 .endm
diff --git a/include/asm-arm/hardware/debug-pl01x.S b/include/asm-arm/hardware/debug-pl01x.S
deleted file mode 100644
index 23c541a9e89a..000000000000
--- a/include/asm-arm/hardware/debug-pl01x.S
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/include/asm-arm/hardware/debug-pl01x.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13#include <linux/amba/serial.h>
14
15 .macro senduart,rd,rx
16 strb \rd, [\rx, #UART01x_DR]
17 .endm
18
19 .macro waituart,rd,rx
201001: ldr \rd, [\rx, #UART01x_FR]
21 tst \rd, #UART01x_FR_TXFF
22 bne 1001b
23 .endm
24
25 .macro busyuart,rd,rx
261001: ldr \rd, [\rx, #UART01x_FR]
27 tst \rd, #UART01x_FR_BUSY
28 bne 1001b
29 .endm
diff --git a/include/asm-arm/hardware/dec21285.h b/include/asm-arm/hardware/dec21285.h
deleted file mode 100644
index 546f7077be9c..000000000000
--- a/include/asm-arm/hardware/dec21285.h
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/dec21285.h
3 *
4 * Copyright (C) 1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * DC21285 registers
11 */
12#define DC21285_PCI_IACK 0x79000000
13#define DC21285_ARMCSR_BASE 0x42000000
14#define DC21285_PCI_TYPE_0_CONFIG 0x7b000000
15#define DC21285_PCI_TYPE_1_CONFIG 0x7a000000
16#define DC21285_OUTBOUND_WRITE_FLUSH 0x78000000
17#define DC21285_FLASH 0x41000000
18#define DC21285_PCI_IO 0x7c000000
19#define DC21285_PCI_MEM 0x80000000
20
21#ifndef __ASSEMBLY__
22#include <asm/hardware.h>
23#define DC21285_IO(x) ((volatile unsigned long *)(ARMCSR_BASE+(x)))
24#else
25#define DC21285_IO(x) (x)
26#endif
27
28#define CSR_PCICMD DC21285_IO(0x0004)
29#define CSR_CLASSREV DC21285_IO(0x0008)
30#define CSR_PCICACHELINESIZE DC21285_IO(0x000c)
31#define CSR_PCICSRBASE DC21285_IO(0x0010)
32#define CSR_PCICSRIOBASE DC21285_IO(0x0014)
33#define CSR_PCISDRAMBASE DC21285_IO(0x0018)
34#define CSR_PCIROMBASE DC21285_IO(0x0030)
35#define CSR_MBOX0 DC21285_IO(0x0050)
36#define CSR_MBOX1 DC21285_IO(0x0054)
37#define CSR_MBOX2 DC21285_IO(0x0058)
38#define CSR_MBOX3 DC21285_IO(0x005c)
39#define CSR_DOORBELL DC21285_IO(0x0060)
40#define CSR_DOORBELL_SETUP DC21285_IO(0x0064)
41#define CSR_ROMWRITEREG DC21285_IO(0x0068)
42#define CSR_CSRBASEMASK DC21285_IO(0x00f8)
43#define CSR_CSRBASEOFFSET DC21285_IO(0x00fc)
44#define CSR_SDRAMBASEMASK DC21285_IO(0x0100)
45#define CSR_SDRAMBASEOFFSET DC21285_IO(0x0104)
46#define CSR_ROMBASEMASK DC21285_IO(0x0108)
47#define CSR_SDRAMTIMING DC21285_IO(0x010c)
48#define CSR_SDRAMADDRSIZE0 DC21285_IO(0x0110)
49#define CSR_SDRAMADDRSIZE1 DC21285_IO(0x0114)
50#define CSR_SDRAMADDRSIZE2 DC21285_IO(0x0118)
51#define CSR_SDRAMADDRSIZE3 DC21285_IO(0x011c)
52#define CSR_I2O_INFREEHEAD DC21285_IO(0x0120)
53#define CSR_I2O_INPOSTTAIL DC21285_IO(0x0124)
54#define CSR_I2O_OUTPOSTHEAD DC21285_IO(0x0128)
55#define CSR_I2O_OUTFREETAIL DC21285_IO(0x012c)
56#define CSR_I2O_INFREECOUNT DC21285_IO(0x0130)
57#define CSR_I2O_OUTPOSTCOUNT DC21285_IO(0x0134)
58#define CSR_I2O_INPOSTCOUNT DC21285_IO(0x0138)
59#define CSR_SA110_CNTL DC21285_IO(0x013c)
60#define SA110_CNTL_INITCMPLETE (1 << 0)
61#define SA110_CNTL_ASSERTSERR (1 << 1)
62#define SA110_CNTL_RXSERR (1 << 3)
63#define SA110_CNTL_SA110DRAMPARITY (1 << 4)
64#define SA110_CNTL_PCISDRAMPARITY (1 << 5)
65#define SA110_CNTL_DMASDRAMPARITY (1 << 6)
66#define SA110_CNTL_DISCARDTIMER (1 << 8)
67#define SA110_CNTL_PCINRESET (1 << 9)
68#define SA110_CNTL_I2O_256 (0 << 10)
69#define SA110_CNTL_I20_512 (1 << 10)
70#define SA110_CNTL_I2O_1024 (2 << 10)
71#define SA110_CNTL_I2O_2048 (3 << 10)
72#define SA110_CNTL_I2O_4096 (4 << 10)
73#define SA110_CNTL_I2O_8192 (5 << 10)
74#define SA110_CNTL_I2O_16384 (6 << 10)
75#define SA110_CNTL_I2O_32768 (7 << 10)
76#define SA110_CNTL_WATCHDOG (1 << 13)
77#define SA110_CNTL_ROMWIDTH_UNDEF (0 << 14)
78#define SA110_CNTL_ROMWIDTH_16 (1 << 14)
79#define SA110_CNTL_ROMWIDTH_32 (2 << 14)
80#define SA110_CNTL_ROMWIDTH_8 (3 << 14)
81#define SA110_CNTL_ROMACCESSTIME(x) ((x)<<16)
82#define SA110_CNTL_ROMBURSTTIME(x) ((x)<<20)
83#define SA110_CNTL_ROMTRISTATETIME(x) ((x)<<24)
84#define SA110_CNTL_XCSDIR(x) ((x)<<28)
85#define SA110_CNTL_PCICFN (1 << 31)
86
87/*
88 * footbridge_cfn_mode() is used when we want
89 * to check whether we are the central function
90 */
91#define __footbridge_cfn_mode() (*CSR_SA110_CNTL & SA110_CNTL_PCICFN)
92#if defined(CONFIG_FOOTBRIDGE_HOST) && defined(CONFIG_FOOTBRIDGE_ADDIN)
93#define footbridge_cfn_mode() __footbridge_cfn_mode()
94#elif defined(CONFIG_FOOTBRIDGE_HOST)
95#define footbridge_cfn_mode() (1)
96#else
97#define footbridge_cfn_mode() (0)
98#endif
99
100#define CSR_PCIADDR_EXTN DC21285_IO(0x0140)
101#define CSR_PREFETCHMEMRANGE DC21285_IO(0x0144)
102#define CSR_XBUS_CYCLE DC21285_IO(0x0148)
103#define CSR_XBUS_IOSTROBE DC21285_IO(0x014c)
104#define CSR_DOORBELL_PCI DC21285_IO(0x0150)
105#define CSR_DOORBELL_SA110 DC21285_IO(0x0154)
106#define CSR_UARTDR DC21285_IO(0x0160)
107#define CSR_RXSTAT DC21285_IO(0x0164)
108#define CSR_H_UBRLCR DC21285_IO(0x0168)
109#define CSR_M_UBRLCR DC21285_IO(0x016c)
110#define CSR_L_UBRLCR DC21285_IO(0x0170)
111#define CSR_UARTCON DC21285_IO(0x0174)
112#define CSR_UARTFLG DC21285_IO(0x0178)
113#define CSR_IRQ_STATUS DC21285_IO(0x0180)
114#define CSR_IRQ_RAWSTATUS DC21285_IO(0x0184)
115#define CSR_IRQ_ENABLE DC21285_IO(0x0188)
116#define CSR_IRQ_DISABLE DC21285_IO(0x018c)
117#define CSR_IRQ_SOFT DC21285_IO(0x0190)
118#define CSR_FIQ_STATUS DC21285_IO(0x0280)
119#define CSR_FIQ_RAWSTATUS DC21285_IO(0x0284)
120#define CSR_FIQ_ENABLE DC21285_IO(0x0288)
121#define CSR_FIQ_DISABLE DC21285_IO(0x028c)
122#define CSR_FIQ_SOFT DC21285_IO(0x0290)
123#define CSR_TIMER1_LOAD DC21285_IO(0x0300)
124#define CSR_TIMER1_VALUE DC21285_IO(0x0304)
125#define CSR_TIMER1_CNTL DC21285_IO(0x0308)
126#define CSR_TIMER1_CLR DC21285_IO(0x030c)
127#define CSR_TIMER2_LOAD DC21285_IO(0x0320)
128#define CSR_TIMER2_VALUE DC21285_IO(0x0324)
129#define CSR_TIMER2_CNTL DC21285_IO(0x0328)
130#define CSR_TIMER2_CLR DC21285_IO(0x032c)
131#define CSR_TIMER3_LOAD DC21285_IO(0x0340)
132#define CSR_TIMER3_VALUE DC21285_IO(0x0344)
133#define CSR_TIMER3_CNTL DC21285_IO(0x0348)
134#define CSR_TIMER3_CLR DC21285_IO(0x034c)
135#define CSR_TIMER4_LOAD DC21285_IO(0x0360)
136#define CSR_TIMER4_VALUE DC21285_IO(0x0364)
137#define CSR_TIMER4_CNTL DC21285_IO(0x0368)
138#define CSR_TIMER4_CLR DC21285_IO(0x036c)
139
140#define TIMER_CNTL_ENABLE (1 << 7)
141#define TIMER_CNTL_AUTORELOAD (1 << 6)
142#define TIMER_CNTL_DIV1 (0)
143#define TIMER_CNTL_DIV16 (1 << 2)
144#define TIMER_CNTL_DIV256 (2 << 2)
145#define TIMER_CNTL_CNTEXT (3 << 2)
146
147
diff --git a/include/asm-arm/hardware/entry-macro-iomd.S b/include/asm-arm/hardware/entry-macro-iomd.S
deleted file mode 100644
index 9bb580a5b15e..000000000000
--- a/include/asm-arm/hardware/entry-macro-iomd.S
+++ /dev/null
@@ -1,139 +0,0 @@
1/*
2 * include/asm-arm/hardware/entry-macro-iomd.S
3 *
4 * Low-level IRQ helper macros for IOC/IOMD based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11/* IOC / IOMD based hardware */
12#include <asm/hardware/iomd.h>
13
14 .macro disable_fiq
15 mov r12, #ioc_base_high
16 .if ioc_base_low
17 orr r12, r12, #ioc_base_low
18 .endif
19 strb r12, [r12, #0x38] @ Disable FIQ register
20 .endm
21
22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
23 ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
24 ldr \tmp, =irq_prio_h
25 teq \irqstat, #0
26#ifdef IOMD_BASE
27 ldreqb \irqstat, [\base, #IOMD_DMAREQ] @ get dma
28 addeq \tmp, \tmp, #256 @ irq_prio_h table size
29 teqeq \irqstat, #0
30 bne 2406f
31#endif
32 ldreqb \irqstat, [\base, #IOMD_IRQREQA] @ get low priority
33 addeq \tmp, \tmp, #256 @ irq_prio_d table size
34 teqeq \irqstat, #0
35#ifdef IOMD_IRQREQC
36 ldreqb \irqstat, [\base, #IOMD_IRQREQC]
37 addeq \tmp, \tmp, #256 @ irq_prio_l table size
38 teqeq \irqstat, #0
39#endif
40#ifdef IOMD_IRQREQD
41 ldreqb \irqstat, [\base, #IOMD_IRQREQD]
42 addeq \tmp, \tmp, #256 @ irq_prio_lc table size
43 teqeq \irqstat, #0
44#endif
452406: ldrneb \irqnr, [\tmp, \irqstat] @ get IRQ number
46 .endm
47
48/*
49 * Interrupt table (incorporates priority). Please note that we
50 * rely on the order of these tables (see above code).
51 */
52 .align 5
53irq_prio_h: .byte 0, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10
54 .byte 12, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10
55 .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
56 .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
57 .byte 14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10
58 .byte 14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10
59 .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
60 .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
61 .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
62 .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
63 .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
64 .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
65 .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
66 .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10
67 .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
68 .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10
69#ifdef IOMD_BASE
70irq_prio_d: .byte 0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
71 .byte 20,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
72 .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
73 .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
74 .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
75 .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
76 .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
77 .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
78 .byte 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
79 .byte 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
80 .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
81 .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
82 .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
83 .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
84 .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
85 .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16
86#endif
87irq_prio_l: .byte 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3
88 .byte 4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3
89 .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
90 .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
91 .byte 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3
92 .byte 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3
93 .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
94 .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5
95 .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
96 .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
97 .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
98 .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
99 .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
100 .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
101 .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
102 .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7
103#ifdef IOMD_IRQREQC
104irq_prio_lc: .byte 24,24,25,24,26,26,26,26,27,27,27,27,27,27,27,27
105 .byte 28,24,25,24,26,26,26,26,27,27,27,27,27,27,27,27
106 .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29
107 .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29
108 .byte 30,30,30,30,30,30,30,30,27,27,27,27,27,27,27,27
109 .byte 30,30,30,30,30,30,30,30,27,27,27,27,27,27,27,27
110 .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29
111 .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29
112 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
113 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
114 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
115 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
116 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
117 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
118 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
119 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
120#endif
121#ifdef IOMD_IRQREQD
122irq_prio_ld: .byte 40,40,41,40,42,42,42,42,43,43,43,43,43,43,43,43
123 .byte 44,40,41,40,42,42,42,42,43,43,43,43,43,43,43,43
124 .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45
125 .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45
126 .byte 46,46,46,46,46,46,46,46,43,43,43,43,43,43,43,43
127 .byte 46,46,46,46,46,46,46,46,43,43,43,43,43,43,43,43
128 .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45
129 .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45
130 .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
131 .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
132 .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
133 .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
134 .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
135 .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
136 .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
137 .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47
138#endif
139
diff --git a/include/asm-arm/hardware/ep7211.h b/include/asm-arm/hardware/ep7211.h
deleted file mode 100644
index 017aa68f612d..000000000000
--- a/include/asm-arm/hardware/ep7211.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/ep7211.h
3 *
4 * This file contains the hardware definitions of the EP7211 internal
5 * registers.
6 *
7 * Copyright (C) 2001 Blue Mug, Inc. All Rights Reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23#ifndef __ASM_HARDWARE_EP7211_H
24#define __ASM_HARDWARE_EP7211_H
25
26#include <asm/hardware/clps7111.h>
27
28/*
29 * define EP7211_BASE to be the base address of the region
30 * you want to access.
31 */
32
33#define EP7211_PHYS_BASE (0x80000000)
34
35/*
36 * XXX miket@bluemug.com: need to introduce EP7211 registers (those not
37 * present in 7212) here.
38 */
39
40#endif /* __ASM_HARDWARE_EP7211_H */
diff --git a/include/asm-arm/hardware/ep7212.h b/include/asm-arm/hardware/ep7212.h
deleted file mode 100644
index 0e952e747073..000000000000
--- a/include/asm-arm/hardware/ep7212.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/ep7212.h
3 *
4 * This file contains the hardware definitions of the EP7212 internal
5 * registers.
6 *
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23#ifndef __ASM_HARDWARE_EP7212_H
24#define __ASM_HARDWARE_EP7212_H
25
26/*
27 * define EP7212_BASE to be the base address of the region
28 * you want to access.
29 */
30
31#define EP7212_PHYS_BASE (0x80000000)
32
33#ifndef __ASSEMBLY__
34#define ep_readl(off) __raw_readl(EP7212_BASE + (off))
35#define ep_writel(val,off) __raw_writel(val, EP7212_BASE + (off))
36#endif
37
38/*
39 * These registers are specific to the EP7212 only
40 */
41#define DAIR 0x2000
42#define DAIR0 0x2040
43#define DAIDR1 0x2080
44#define DAIDR2 0x20c0
45#define DAISR 0x2100
46#define SYSCON3 0x2200
47#define INTSR3 0x2240
48#define INTMR3 0x2280
49#define LEDFLSH 0x22c0
50
51#define DAIR_DAIEN (1 << 16)
52#define DAIR_ECS (1 << 17)
53#define DAIR_LCTM (1 << 19)
54#define DAIR_LCRM (1 << 20)
55#define DAIR_RCTM (1 << 21)
56#define DAIR_RCRM (1 << 22)
57#define DAIR_LBM (1 << 23)
58
59#define DAIDR2_FIFOEN (1 << 15)
60#define DAIDR2_FIFOLEFT (0x0d << 16)
61#define DAIDR2_FIFORIGHT (0x11 << 16)
62
63#define DAISR_RCTS (1 << 0)
64#define DAISR_RCRS (1 << 1)
65#define DAISR_LCTS (1 << 2)
66#define DAISR_LCRS (1 << 3)
67#define DAISR_RCTU (1 << 4)
68#define DAISR_RCRO (1 << 5)
69#define DAISR_LCTU (1 << 6)
70#define DAISR_LCRO (1 << 7)
71#define DAISR_RCNF (1 << 8)
72#define DAISR_RCNE (1 << 9)
73#define DAISR_LCNF (1 << 10)
74#define DAISR_LCNE (1 << 11)
75#define DAISR_FIFO (1 << 12)
76
77#define SYSCON3_ADCCON (1 << 0)
78#define SYSCON3_DAISEL (1 << 3)
79#define SYSCON3_ADCCKNSEN (1 << 4)
80#define SYSCON3_FASTWAKE (1 << 8)
81#define SYSCON3_DAIEN (1 << 9)
82
83#endif /* __ASM_HARDWARE_EP7212_H */
diff --git a/include/asm-arm/hardware/gic.h b/include/asm-arm/hardware/gic.h
deleted file mode 100644
index 966e428ad32c..000000000000
--- a/include/asm-arm/hardware/gic.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/gic.h
3 *
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_HARDWARE_GIC_H
11#define __ASM_ARM_HARDWARE_GIC_H
12
13#include <linux/compiler.h>
14
15#define GIC_CPU_CTRL 0x00
16#define GIC_CPU_PRIMASK 0x04
17#define GIC_CPU_BINPOINT 0x08
18#define GIC_CPU_INTACK 0x0c
19#define GIC_CPU_EOI 0x10
20#define GIC_CPU_RUNNINGPRI 0x14
21#define GIC_CPU_HIGHPRI 0x18
22
23#define GIC_DIST_CTRL 0x000
24#define GIC_DIST_CTR 0x004
25#define GIC_DIST_ENABLE_SET 0x100
26#define GIC_DIST_ENABLE_CLEAR 0x180
27#define GIC_DIST_PENDING_SET 0x200
28#define GIC_DIST_PENDING_CLEAR 0x280
29#define GIC_DIST_ACTIVE_BIT 0x300
30#define GIC_DIST_PRI 0x400
31#define GIC_DIST_TARGET 0x800
32#define GIC_DIST_CONFIG 0xc00
33#define GIC_DIST_SOFTINT 0xf00
34
35#ifndef __ASSEMBLY__
36void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
37void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
38void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
39void gic_raise_softirq(cpumask_t cpumask, unsigned int irq);
40#endif
41
42#endif
diff --git a/include/asm-arm/hardware/icst307.h b/include/asm-arm/hardware/icst307.h
deleted file mode 100644
index ff8618a441c0..000000000000
--- a/include/asm-arm/hardware/icst307.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/icst307.h
3 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Support functions for calculating clocks/divisors for the ICS307
11 * clock generators. See http://www.icst.com/ for more information
12 * on these devices.
13 *
14 * This file is similar to the icst525.h file
15 */
16#ifndef ASMARM_HARDWARE_ICST307_H
17#define ASMARM_HARDWARE_ICST307_H
18
19struct icst307_params {
20 unsigned long ref;
21 unsigned long vco_max; /* inclusive */
22 unsigned short vd_min; /* inclusive */
23 unsigned short vd_max; /* inclusive */
24 unsigned char rd_min; /* inclusive */
25 unsigned char rd_max; /* inclusive */
26};
27
28struct icst307_vco {
29 unsigned short v;
30 unsigned char r;
31 unsigned char s;
32};
33
34unsigned long icst307_khz(const struct icst307_params *p, struct icst307_vco vco);
35struct icst307_vco icst307_khz_to_vco(const struct icst307_params *p, unsigned long freq);
36struct icst307_vco icst307_ps_to_vco(const struct icst307_params *p, unsigned long period);
37
38#endif
diff --git a/include/asm-arm/hardware/icst525.h b/include/asm-arm/hardware/icst525.h
deleted file mode 100644
index edd5a5704406..000000000000
--- a/include/asm-arm/hardware/icst525.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/icst525.h
3 *
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Support functions for calculating clocks/divisors for the ICST525
11 * clock generators. See http://www.icst.com/ for more information
12 * on these devices.
13 */
14#ifndef ASMARM_HARDWARE_ICST525_H
15#define ASMARM_HARDWARE_ICST525_H
16
17struct icst525_params {
18 unsigned long ref;
19 unsigned long vco_max; /* inclusive */
20 unsigned short vd_min; /* inclusive */
21 unsigned short vd_max; /* inclusive */
22 unsigned char rd_min; /* inclusive */
23 unsigned char rd_max; /* inclusive */
24};
25
26struct icst525_vco {
27 unsigned short v;
28 unsigned char r;
29 unsigned char s;
30};
31
32unsigned long icst525_khz(const struct icst525_params *p, struct icst525_vco vco);
33struct icst525_vco icst525_khz_to_vco(const struct icst525_params *p, unsigned long freq);
34struct icst525_vco icst525_ps_to_vco(const struct icst525_params *p, unsigned long period);
35
36#endif
diff --git a/include/asm-arm/hardware/ioc.h b/include/asm-arm/hardware/ioc.h
deleted file mode 100644
index b3b46ef65943..000000000000
--- a/include/asm-arm/hardware/ioc.h
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/ioc.h
3 *
4 * Copyright (C) Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Use these macros to read/write the IOC. All it does is perform the actual
11 * read/write.
12 */
13#ifndef __ASMARM_HARDWARE_IOC_H
14#define __ASMARM_HARDWARE_IOC_H
15
16#ifndef __ASSEMBLY__
17
18/*
19 * We use __raw_base variants here so that we give the compiler the
20 * chance to keep IOC_BASE in a register.
21 */
22#define ioc_readb(off) __raw_readb(IOC_BASE + (off))
23#define ioc_writeb(val,off) __raw_writeb(val, IOC_BASE + (off))
24
25#endif
26
27#define IOC_CONTROL (0x00)
28#define IOC_KARTTX (0x04)
29#define IOC_KARTRX (0x04)
30
31#define IOC_IRQSTATA (0x10)
32#define IOC_IRQREQA (0x14)
33#define IOC_IRQCLRA (0x14)
34#define IOC_IRQMASKA (0x18)
35
36#define IOC_IRQSTATB (0x20)
37#define IOC_IRQREQB (0x24)
38#define IOC_IRQMASKB (0x28)
39
40#define IOC_FIQSTAT (0x30)
41#define IOC_FIQREQ (0x34)
42#define IOC_FIQMASK (0x38)
43
44#define IOC_T0CNTL (0x40)
45#define IOC_T0LTCHL (0x40)
46#define IOC_T0CNTH (0x44)
47#define IOC_T0LTCHH (0x44)
48#define IOC_T0GO (0x48)
49#define IOC_T0LATCH (0x4c)
50
51#define IOC_T1CNTL (0x50)
52#define IOC_T1LTCHL (0x50)
53#define IOC_T1CNTH (0x54)
54#define IOC_T1LTCHH (0x54)
55#define IOC_T1GO (0x58)
56#define IOC_T1LATCH (0x5c)
57
58#define IOC_T2CNTL (0x60)
59#define IOC_T2LTCHL (0x60)
60#define IOC_T2CNTH (0x64)
61#define IOC_T2LTCHH (0x64)
62#define IOC_T2GO (0x68)
63#define IOC_T2LATCH (0x6c)
64
65#define IOC_T3CNTL (0x70)
66#define IOC_T3LTCHL (0x70)
67#define IOC_T3CNTH (0x74)
68#define IOC_T3LTCHH (0x74)
69#define IOC_T3GO (0x78)
70#define IOC_T3LATCH (0x7c)
71
72#endif
diff --git a/include/asm-arm/hardware/iomd.h b/include/asm-arm/hardware/iomd.h
deleted file mode 100644
index 396e55ad06c6..000000000000
--- a/include/asm-arm/hardware/iomd.h
+++ /dev/null
@@ -1,226 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/iomd.h
3 *
4 * Copyright (C) 1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This file contains information out the IOMD ASIC used in the
11 * Acorn RiscPC and subsequently integrated into the CLPS7500 chips.
12 */
13#ifndef __ASMARM_HARDWARE_IOMD_H
14#define __ASMARM_HARDWARE_IOMD_H
15
16
17#ifndef __ASSEMBLY__
18
19/*
20 * We use __raw_base variants here so that we give the compiler the
21 * chance to keep IOC_BASE in a register.
22 */
23#define iomd_readb(off) __raw_readb(IOMD_BASE + (off))
24#define iomd_readl(off) __raw_readl(IOMD_BASE + (off))
25#define iomd_writeb(val,off) __raw_writeb(val, IOMD_BASE + (off))
26#define iomd_writel(val,off) __raw_writel(val, IOMD_BASE + (off))
27
28#endif
29
30#define IOMD_CONTROL (0x000)
31#define IOMD_KARTTX (0x004)
32#define IOMD_KARTRX (0x004)
33#define IOMD_KCTRL (0x008)
34
35#ifdef CONFIG_ARCH_CLPS7500
36#define IOMD_IOLINES (0x00C)
37#endif
38
39#define IOMD_IRQSTATA (0x010)
40#define IOMD_IRQREQA (0x014)
41#define IOMD_IRQCLRA (0x014)
42#define IOMD_IRQMASKA (0x018)
43
44#ifdef CONFIG_ARCH_CLPS7500
45#define IOMD_SUSMODE (0x01C)
46#endif
47
48#define IOMD_IRQSTATB (0x020)
49#define IOMD_IRQREQB (0x024)
50#define IOMD_IRQMASKB (0x028)
51
52#define IOMD_FIQSTAT (0x030)
53#define IOMD_FIQREQ (0x034)
54#define IOMD_FIQMASK (0x038)
55
56#ifdef CONFIG_ARCH_CLPS7500
57#define IOMD_CLKCTL (0x03C)
58#endif
59
60#define IOMD_T0CNTL (0x040)
61#define IOMD_T0LTCHL (0x040)
62#define IOMD_T0CNTH (0x044)
63#define IOMD_T0LTCHH (0x044)
64#define IOMD_T0GO (0x048)
65#define IOMD_T0LATCH (0x04c)
66
67#define IOMD_T1CNTL (0x050)
68#define IOMD_T1LTCHL (0x050)
69#define IOMD_T1CNTH (0x054)
70#define IOMD_T1LTCHH (0x054)
71#define IOMD_T1GO (0x058)
72#define IOMD_T1LATCH (0x05c)
73
74#ifdef CONFIG_ARCH_CLPS7500
75#define IOMD_IRQSTATC (0x060)
76#define IOMD_IRQREQC (0x064)
77#define IOMD_IRQMASKC (0x068)
78
79#define IOMD_VIDMUX (0x06c)
80
81#define IOMD_IRQSTATD (0x070)
82#define IOMD_IRQREQD (0x074)
83#define IOMD_IRQMASKD (0x078)
84#endif
85
86#define IOMD_ROMCR0 (0x080)
87#define IOMD_ROMCR1 (0x084)
88#ifdef CONFIG_ARCH_RPC
89#define IOMD_DRAMCR (0x088)
90#endif
91#define IOMD_REFCR (0x08C)
92
93#define IOMD_FSIZE (0x090)
94#define IOMD_ID0 (0x094)
95#define IOMD_ID1 (0x098)
96#define IOMD_VERSION (0x09C)
97
98#ifdef CONFIG_ARCH_RPC
99#define IOMD_MOUSEX (0x0A0)
100#define IOMD_MOUSEY (0x0A4)
101#endif
102
103#ifdef CONFIG_ARCH_CLPS7500
104#define IOMD_MSEDAT (0x0A8)
105#define IOMD_MSECTL (0x0Ac)
106#endif
107
108#ifdef CONFIG_ARCH_RPC
109#define IOMD_DMATCR (0x0C0)
110#endif
111#define IOMD_IOTCR (0x0C4)
112#define IOMD_ECTCR (0x0C8)
113#ifdef CONFIG_ARCH_RPC
114#define IOMD_DMAEXT (0x0CC)
115#endif
116#ifdef CONFIG_ARCH_CLPS7500
117#define IOMD_ASTCR (0x0CC)
118#define IOMD_DRAMCR (0x0D0)
119#define IOMD_SELFREF (0x0D4)
120#define IOMD_ATODICR (0x0E0)
121#define IOMD_ATODSR (0x0E4)
122#define IOMD_ATODCC (0x0E8)
123#define IOMD_ATODCNT1 (0x0EC)
124#define IOMD_ATODCNT2 (0x0F0)
125#define IOMD_ATODCNT3 (0x0F4)
126#define IOMD_ATODCNT4 (0x0F8)
127#endif
128
129#ifdef CONFIG_ARCH_RPC
130#define DMA_EXT_IO0 1
131#define DMA_EXT_IO1 2
132#define DMA_EXT_IO2 4
133#define DMA_EXT_IO3 8
134
135#define IOMD_IO0CURA (0x100)
136#define IOMD_IO0ENDA (0x104)
137#define IOMD_IO0CURB (0x108)
138#define IOMD_IO0ENDB (0x10C)
139#define IOMD_IO0CR (0x110)
140#define IOMD_IO0ST (0x114)
141
142#define IOMD_IO1CURA (0x120)
143#define IOMD_IO1ENDA (0x124)
144#define IOMD_IO1CURB (0x128)
145#define IOMD_IO1ENDB (0x12C)
146#define IOMD_IO1CR (0x130)
147#define IOMD_IO1ST (0x134)
148
149#define IOMD_IO2CURA (0x140)
150#define IOMD_IO2ENDA (0x144)
151#define IOMD_IO2CURB (0x148)
152#define IOMD_IO2ENDB (0x14C)
153#define IOMD_IO2CR (0x150)
154#define IOMD_IO2ST (0x154)
155
156#define IOMD_IO3CURA (0x160)
157#define IOMD_IO3ENDA (0x164)
158#define IOMD_IO3CURB (0x168)
159#define IOMD_IO3ENDB (0x16C)
160#define IOMD_IO3CR (0x170)
161#define IOMD_IO3ST (0x174)
162#endif
163
164#define IOMD_SD0CURA (0x180)
165#define IOMD_SD0ENDA (0x184)
166#define IOMD_SD0CURB (0x188)
167#define IOMD_SD0ENDB (0x18C)
168#define IOMD_SD0CR (0x190)
169#define IOMD_SD0ST (0x194)
170
171#ifdef CONFIG_ARCH_RPC
172#define IOMD_SD1CURA (0x1A0)
173#define IOMD_SD1ENDA (0x1A4)
174#define IOMD_SD1CURB (0x1A8)
175#define IOMD_SD1ENDB (0x1AC)
176#define IOMD_SD1CR (0x1B0)
177#define IOMD_SD1ST (0x1B4)
178#endif
179
180#define IOMD_CURSCUR (0x1C0)
181#define IOMD_CURSINIT (0x1C4)
182
183#define IOMD_VIDCUR (0x1D0)
184#define IOMD_VIDEND (0x1D4)
185#define IOMD_VIDSTART (0x1D8)
186#define IOMD_VIDINIT (0x1DC)
187#define IOMD_VIDCR (0x1E0)
188
189#define IOMD_DMASTAT (0x1F0)
190#define IOMD_DMAREQ (0x1F4)
191#define IOMD_DMAMASK (0x1F8)
192
193#define DMA_END_S (1 << 31)
194#define DMA_END_L (1 << 30)
195
196#define DMA_CR_C 0x80
197#define DMA_CR_D 0x40
198#define DMA_CR_E 0x20
199
200#define DMA_ST_OFL 4
201#define DMA_ST_INT 2
202#define DMA_ST_AB 1
203
204/*
205 * DMA (MEMC) compatibility
206 */
207#define HALF_SAM vram_half_sam
208#define VDMA_ALIGNMENT (HALF_SAM * 2)
209#define VDMA_XFERSIZE (HALF_SAM)
210#define VDMA_INIT IOMD_VIDINIT
211#define VDMA_START IOMD_VIDSTART
212#define VDMA_END IOMD_VIDEND
213
214#ifndef __ASSEMBLY__
215extern unsigned int vram_half_sam;
216#define video_set_dma(start,end,offset) \
217do { \
218 outl (SCREEN_START + start, VDMA_START); \
219 outl (SCREEN_START + end - VDMA_XFERSIZE, VDMA_END); \
220 if (offset >= end - VDMA_XFERSIZE) \
221 offset |= 0x40000000; \
222 outl (SCREEN_START + offset, VDMA_INIT); \
223} while (0)
224#endif
225
226#endif
diff --git a/include/asm-arm/hardware/iop3xx-adma.h b/include/asm-arm/hardware/iop3xx-adma.h
deleted file mode 100644
index af64676650a2..000000000000
--- a/include/asm-arm/hardware/iop3xx-adma.h
+++ /dev/null
@@ -1,888 +0,0 @@
1/*
2 * Copyright © 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16 *
17 */
18#ifndef _ADMA_H
19#define _ADMA_H
20#include <linux/types.h>
21#include <linux/io.h>
22#include <asm/hardware.h>
23#include <asm/hardware/iop_adma.h>
24
25/* Memory copy units */
26#define DMA_CCR(chan) (chan->mmr_base + 0x0)
27#define DMA_CSR(chan) (chan->mmr_base + 0x4)
28#define DMA_DAR(chan) (chan->mmr_base + 0xc)
29#define DMA_NDAR(chan) (chan->mmr_base + 0x10)
30#define DMA_PADR(chan) (chan->mmr_base + 0x14)
31#define DMA_PUADR(chan) (chan->mmr_base + 0x18)
32#define DMA_LADR(chan) (chan->mmr_base + 0x1c)
33#define DMA_BCR(chan) (chan->mmr_base + 0x20)
34#define DMA_DCR(chan) (chan->mmr_base + 0x24)
35
36/* Application accelerator unit */
37#define AAU_ACR(chan) (chan->mmr_base + 0x0)
38#define AAU_ASR(chan) (chan->mmr_base + 0x4)
39#define AAU_ADAR(chan) (chan->mmr_base + 0x8)
40#define AAU_ANDAR(chan) (chan->mmr_base + 0xc)
41#define AAU_SAR(src, chan) (chan->mmr_base + (0x10 + ((src) << 2)))
42#define AAU_DAR(chan) (chan->mmr_base + 0x20)
43#define AAU_ABCR(chan) (chan->mmr_base + 0x24)
44#define AAU_ADCR(chan) (chan->mmr_base + 0x28)
45#define AAU_SAR_EDCR(src_edc) (chan->mmr_base + (0x02c + ((src_edc-4) << 2)))
46#define AAU_EDCR0_IDX 8
47#define AAU_EDCR1_IDX 17
48#define AAU_EDCR2_IDX 26
49
50#define DMA0_ID 0
51#define DMA1_ID 1
52#define AAU_ID 2
53
54struct iop3xx_aau_desc_ctrl {
55 unsigned int int_en:1;
56 unsigned int blk1_cmd_ctrl:3;
57 unsigned int blk2_cmd_ctrl:3;
58 unsigned int blk3_cmd_ctrl:3;
59 unsigned int blk4_cmd_ctrl:3;
60 unsigned int blk5_cmd_ctrl:3;
61 unsigned int blk6_cmd_ctrl:3;
62 unsigned int blk7_cmd_ctrl:3;
63 unsigned int blk8_cmd_ctrl:3;
64 unsigned int blk_ctrl:2;
65 unsigned int dual_xor_en:1;
66 unsigned int tx_complete:1;
67 unsigned int zero_result_err:1;
68 unsigned int zero_result_en:1;
69 unsigned int dest_write_en:1;
70};
71
72struct iop3xx_aau_e_desc_ctrl {
73 unsigned int reserved:1;
74 unsigned int blk1_cmd_ctrl:3;
75 unsigned int blk2_cmd_ctrl:3;
76 unsigned int blk3_cmd_ctrl:3;
77 unsigned int blk4_cmd_ctrl:3;
78 unsigned int blk5_cmd_ctrl:3;
79 unsigned int blk6_cmd_ctrl:3;
80 unsigned int blk7_cmd_ctrl:3;
81 unsigned int blk8_cmd_ctrl:3;
82 unsigned int reserved2:7;
83};
84
85struct iop3xx_dma_desc_ctrl {
86 unsigned int pci_transaction:4;
87 unsigned int int_en:1;
88 unsigned int dac_cycle_en:1;
89 unsigned int mem_to_mem_en:1;
90 unsigned int crc_data_tx_en:1;
91 unsigned int crc_gen_en:1;
92 unsigned int crc_seed_dis:1;
93 unsigned int reserved:21;
94 unsigned int crc_tx_complete:1;
95};
96
97struct iop3xx_desc_dma {
98 u32 next_desc;
99 union {
100 u32 pci_src_addr;
101 u32 pci_dest_addr;
102 u32 src_addr;
103 };
104 union {
105 u32 upper_pci_src_addr;
106 u32 upper_pci_dest_addr;
107 };
108 union {
109 u32 local_pci_src_addr;
110 u32 local_pci_dest_addr;
111 u32 dest_addr;
112 };
113 u32 byte_count;
114 union {
115 u32 desc_ctrl;
116 struct iop3xx_dma_desc_ctrl desc_ctrl_field;
117 };
118 u32 crc_addr;
119};
120
121struct iop3xx_desc_aau {
122 u32 next_desc;
123 u32 src[4];
124 u32 dest_addr;
125 u32 byte_count;
126 union {
127 u32 desc_ctrl;
128 struct iop3xx_aau_desc_ctrl desc_ctrl_field;
129 };
130 union {
131 u32 src_addr;
132 u32 e_desc_ctrl;
133 struct iop3xx_aau_e_desc_ctrl e_desc_ctrl_field;
134 } src_edc[31];
135};
136
137struct iop3xx_aau_gfmr {
138 unsigned int gfmr1:8;
139 unsigned int gfmr2:8;
140 unsigned int gfmr3:8;
141 unsigned int gfmr4:8;
142};
143
144struct iop3xx_desc_pq_xor {
145 u32 next_desc;
146 u32 src[3];
147 union {
148 u32 data_mult1;
149 struct iop3xx_aau_gfmr data_mult1_field;
150 };
151 u32 dest_addr;
152 u32 byte_count;
153 union {
154 u32 desc_ctrl;
155 struct iop3xx_aau_desc_ctrl desc_ctrl_field;
156 };
157 union {
158 u32 src_addr;
159 u32 e_desc_ctrl;
160 struct iop3xx_aau_e_desc_ctrl e_desc_ctrl_field;
161 u32 data_multiplier;
162 struct iop3xx_aau_gfmr data_mult_field;
163 u32 reserved;
164 } src_edc_gfmr[19];
165};
166
167struct iop3xx_desc_dual_xor {
168 u32 next_desc;
169 u32 src0_addr;
170 u32 src1_addr;
171 u32 h_src_addr;
172 u32 d_src_addr;
173 u32 h_dest_addr;
174 u32 byte_count;
175 union {
176 u32 desc_ctrl;
177 struct iop3xx_aau_desc_ctrl desc_ctrl_field;
178 };
179 u32 d_dest_addr;
180};
181
182union iop3xx_desc {
183 struct iop3xx_desc_aau *aau;
184 struct iop3xx_desc_dma *dma;
185 struct iop3xx_desc_pq_xor *pq_xor;
186 struct iop3xx_desc_dual_xor *dual_xor;
187 void *ptr;
188};
189
190static inline int iop_adma_get_max_xor(void)
191{
192 return 32;
193}
194
195static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan)
196{
197 int id = chan->device->id;
198
199 switch (id) {
200 case DMA0_ID:
201 case DMA1_ID:
202 return __raw_readl(DMA_DAR(chan));
203 case AAU_ID:
204 return __raw_readl(AAU_ADAR(chan));
205 default:
206 BUG();
207 }
208 return 0;
209}
210
211static inline void iop_chan_set_next_descriptor(struct iop_adma_chan *chan,
212 u32 next_desc_addr)
213{
214 int id = chan->device->id;
215
216 switch (id) {
217 case DMA0_ID:
218 case DMA1_ID:
219 __raw_writel(next_desc_addr, DMA_NDAR(chan));
220 break;
221 case AAU_ID:
222 __raw_writel(next_desc_addr, AAU_ANDAR(chan));
223 break;
224 }
225
226}
227
228#define IOP_ADMA_STATUS_BUSY (1 << 10)
229#define IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT (1024)
230#define IOP_ADMA_XOR_MAX_BYTE_COUNT (16 * 1024 * 1024)
231#define IOP_ADMA_MAX_BYTE_COUNT (16 * 1024 * 1024)
232
233static inline int iop_chan_is_busy(struct iop_adma_chan *chan)
234{
235 u32 status = __raw_readl(DMA_CSR(chan));
236 return (status & IOP_ADMA_STATUS_BUSY) ? 1 : 0;
237}
238
239static inline int iop_desc_is_aligned(struct iop_adma_desc_slot *desc,
240 int num_slots)
241{
242 /* num_slots will only ever be 1, 2, 4, or 8 */
243 return (desc->idx & (num_slots - 1)) ? 0 : 1;
244}
245
246/* to do: support large (i.e. > hw max) buffer sizes */
247static inline int iop_chan_memcpy_slot_count(size_t len, int *slots_per_op)
248{
249 *slots_per_op = 1;
250 return 1;
251}
252
253/* to do: support large (i.e. > hw max) buffer sizes */
254static inline int iop_chan_memset_slot_count(size_t len, int *slots_per_op)
255{
256 *slots_per_op = 1;
257 return 1;
258}
259
260static inline int iop3xx_aau_xor_slot_count(size_t len, int src_cnt,
261 int *slots_per_op)
262{
263 static const char slot_count_table[] = {
264 1, 1, 1, 1, /* 01 - 04 */
265 2, 2, 2, 2, /* 05 - 08 */
266 4, 4, 4, 4, /* 09 - 12 */
267 4, 4, 4, 4, /* 13 - 16 */
268 8, 8, 8, 8, /* 17 - 20 */
269 8, 8, 8, 8, /* 21 - 24 */
270 8, 8, 8, 8, /* 25 - 28 */
271 8, 8, 8, 8, /* 29 - 32 */
272 };
273 *slots_per_op = slot_count_table[src_cnt - 1];
274 return *slots_per_op;
275}
276
277static inline int
278iop_chan_interrupt_slot_count(int *slots_per_op, struct iop_adma_chan *chan)
279{
280 switch (chan->device->id) {
281 case DMA0_ID:
282 case DMA1_ID:
283 return iop_chan_memcpy_slot_count(0, slots_per_op);
284 case AAU_ID:
285 return iop3xx_aau_xor_slot_count(0, 2, slots_per_op);
286 default:
287 BUG();
288 }
289 return 0;
290}
291
292static inline int iop_chan_xor_slot_count(size_t len, int src_cnt,
293 int *slots_per_op)
294{
295 int slot_cnt = iop3xx_aau_xor_slot_count(len, src_cnt, slots_per_op);
296
297 if (len <= IOP_ADMA_XOR_MAX_BYTE_COUNT)
298 return slot_cnt;
299
300 len -= IOP_ADMA_XOR_MAX_BYTE_COUNT;
301 while (len > IOP_ADMA_XOR_MAX_BYTE_COUNT) {
302 len -= IOP_ADMA_XOR_MAX_BYTE_COUNT;
303 slot_cnt += *slots_per_op;
304 }
305
306 if (len)
307 slot_cnt += *slots_per_op;
308
309 return slot_cnt;
310}
311
312/* zero sum on iop3xx is limited to 1k at a time so it requires multiple
313 * descriptors
314 */
315static inline int iop_chan_zero_sum_slot_count(size_t len, int src_cnt,
316 int *slots_per_op)
317{
318 int slot_cnt = iop3xx_aau_xor_slot_count(len, src_cnt, slots_per_op);
319
320 if (len <= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT)
321 return slot_cnt;
322
323 len -= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT;
324 while (len > IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT) {
325 len -= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT;
326 slot_cnt += *slots_per_op;
327 }
328
329 if (len)
330 slot_cnt += *slots_per_op;
331
332 return slot_cnt;
333}
334
335static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc,
336 struct iop_adma_chan *chan)
337{
338 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
339
340 switch (chan->device->id) {
341 case DMA0_ID:
342 case DMA1_ID:
343 return hw_desc.dma->dest_addr;
344 case AAU_ID:
345 return hw_desc.aau->dest_addr;
346 default:
347 BUG();
348 }
349 return 0;
350}
351
352static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc,
353 struct iop_adma_chan *chan)
354{
355 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
356
357 switch (chan->device->id) {
358 case DMA0_ID:
359 case DMA1_ID:
360 return hw_desc.dma->byte_count;
361 case AAU_ID:
362 return hw_desc.aau->byte_count;
363 default:
364 BUG();
365 }
366 return 0;
367}
368
369/* translate the src_idx to a descriptor word index */
370static inline int __desc_idx(int src_idx)
371{
372 static const int desc_idx_table[] = { 0, 0, 0, 0,
373 0, 1, 2, 3,
374 5, 6, 7, 8,
375 9, 10, 11, 12,
376 14, 15, 16, 17,
377 18, 19, 20, 21,
378 23, 24, 25, 26,
379 27, 28, 29, 30,
380 };
381
382 return desc_idx_table[src_idx];
383}
384
385static inline u32 iop_desc_get_src_addr(struct iop_adma_desc_slot *desc,
386 struct iop_adma_chan *chan,
387 int src_idx)
388{
389 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
390
391 switch (chan->device->id) {
392 case DMA0_ID:
393 case DMA1_ID:
394 return hw_desc.dma->src_addr;
395 case AAU_ID:
396 break;
397 default:
398 BUG();
399 }
400
401 if (src_idx < 4)
402 return hw_desc.aau->src[src_idx];
403 else
404 return hw_desc.aau->src_edc[__desc_idx(src_idx)].src_addr;
405}
406
407static inline void iop3xx_aau_desc_set_src_addr(struct iop3xx_desc_aau *hw_desc,
408 int src_idx, dma_addr_t addr)
409{
410 if (src_idx < 4)
411 hw_desc->src[src_idx] = addr;
412 else
413 hw_desc->src_edc[__desc_idx(src_idx)].src_addr = addr;
414}
415
416static inline void
417iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, unsigned long flags)
418{
419 struct iop3xx_desc_dma *hw_desc = desc->hw_desc;
420 union {
421 u32 value;
422 struct iop3xx_dma_desc_ctrl field;
423 } u_desc_ctrl;
424
425 u_desc_ctrl.value = 0;
426 u_desc_ctrl.field.mem_to_mem_en = 1;
427 u_desc_ctrl.field.pci_transaction = 0xe; /* memory read block */
428 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
429 hw_desc->desc_ctrl = u_desc_ctrl.value;
430 hw_desc->upper_pci_src_addr = 0;
431 hw_desc->crc_addr = 0;
432}
433
434static inline void
435iop_desc_init_memset(struct iop_adma_desc_slot *desc, unsigned long flags)
436{
437 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
438 union {
439 u32 value;
440 struct iop3xx_aau_desc_ctrl field;
441 } u_desc_ctrl;
442
443 u_desc_ctrl.value = 0;
444 u_desc_ctrl.field.blk1_cmd_ctrl = 0x2; /* memory block fill */
445 u_desc_ctrl.field.dest_write_en = 1;
446 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
447 hw_desc->desc_ctrl = u_desc_ctrl.value;
448}
449
450static inline u32
451iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt,
452 unsigned long flags)
453{
454 int i, shift;
455 u32 edcr;
456 union {
457 u32 value;
458 struct iop3xx_aau_desc_ctrl field;
459 } u_desc_ctrl;
460
461 u_desc_ctrl.value = 0;
462 switch (src_cnt) {
463 case 25 ... 32:
464 u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */
465 edcr = 0;
466 shift = 1;
467 for (i = 24; i < src_cnt; i++) {
468 edcr |= (1 << shift);
469 shift += 3;
470 }
471 hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = edcr;
472 src_cnt = 24;
473 /* fall through */
474 case 17 ... 24:
475 if (!u_desc_ctrl.field.blk_ctrl) {
476 hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
477 u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */
478 }
479 edcr = 0;
480 shift = 1;
481 for (i = 16; i < src_cnt; i++) {
482 edcr |= (1 << shift);
483 shift += 3;
484 }
485 hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = edcr;
486 src_cnt = 16;
487 /* fall through */
488 case 9 ... 16:
489 if (!u_desc_ctrl.field.blk_ctrl)
490 u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */
491 edcr = 0;
492 shift = 1;
493 for (i = 8; i < src_cnt; i++) {
494 edcr |= (1 << shift);
495 shift += 3;
496 }
497 hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = edcr;
498 src_cnt = 8;
499 /* fall through */
500 case 2 ... 8:
501 shift = 1;
502 for (i = 0; i < src_cnt; i++) {
503 u_desc_ctrl.value |= (1 << shift);
504 shift += 3;
505 }
506
507 if (!u_desc_ctrl.field.blk_ctrl && src_cnt > 4)
508 u_desc_ctrl.field.blk_ctrl = 0x1; /* use mini-desc */
509 }
510
511 u_desc_ctrl.field.dest_write_en = 1;
512 u_desc_ctrl.field.blk1_cmd_ctrl = 0x7; /* direct fill */
513 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
514 hw_desc->desc_ctrl = u_desc_ctrl.value;
515
516 return u_desc_ctrl.value;
517}
518
519static inline void
520iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt,
521 unsigned long flags)
522{
523 iop3xx_desc_init_xor(desc->hw_desc, src_cnt, flags);
524}
525
526/* return the number of operations */
527static inline int
528iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt,
529 unsigned long flags)
530{
531 int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op;
532 struct iop3xx_desc_aau *hw_desc, *prev_hw_desc, *iter;
533 union {
534 u32 value;
535 struct iop3xx_aau_desc_ctrl field;
536 } u_desc_ctrl;
537 int i, j;
538
539 hw_desc = desc->hw_desc;
540
541 for (i = 0, j = 0; (slot_cnt -= slots_per_op) >= 0;
542 i += slots_per_op, j++) {
543 iter = iop_hw_desc_slot_idx(hw_desc, i);
544 u_desc_ctrl.value = iop3xx_desc_init_xor(iter, src_cnt, flags);
545 u_desc_ctrl.field.dest_write_en = 0;
546 u_desc_ctrl.field.zero_result_en = 1;
547 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
548 iter->desc_ctrl = u_desc_ctrl.value;
549
550 /* for the subsequent descriptors preserve the store queue
551 * and chain them together
552 */
553 if (i) {
554 prev_hw_desc =
555 iop_hw_desc_slot_idx(hw_desc, i - slots_per_op);
556 prev_hw_desc->next_desc =
557 (u32) (desc->async_tx.phys + (i << 5));
558 }
559 }
560
561 return j;
562}
563
564static inline void
565iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt,
566 unsigned long flags)
567{
568 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
569 union {
570 u32 value;
571 struct iop3xx_aau_desc_ctrl field;
572 } u_desc_ctrl;
573
574 u_desc_ctrl.value = 0;
575 switch (src_cnt) {
576 case 25 ... 32:
577 u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */
578 hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
579 /* fall through */
580 case 17 ... 24:
581 if (!u_desc_ctrl.field.blk_ctrl) {
582 hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
583 u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */
584 }
585 hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = 0;
586 /* fall through */
587 case 9 ... 16:
588 if (!u_desc_ctrl.field.blk_ctrl)
589 u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */
590 hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = 0;
591 /* fall through */
592 case 1 ... 8:
593 if (!u_desc_ctrl.field.blk_ctrl && src_cnt > 4)
594 u_desc_ctrl.field.blk_ctrl = 0x1; /* use mini-desc */
595 }
596
597 u_desc_ctrl.field.dest_write_en = 0;
598 u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT;
599 hw_desc->desc_ctrl = u_desc_ctrl.value;
600}
601
602static inline void iop_desc_set_byte_count(struct iop_adma_desc_slot *desc,
603 struct iop_adma_chan *chan,
604 u32 byte_count)
605{
606 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
607
608 switch (chan->device->id) {
609 case DMA0_ID:
610 case DMA1_ID:
611 hw_desc.dma->byte_count = byte_count;
612 break;
613 case AAU_ID:
614 hw_desc.aau->byte_count = byte_count;
615 break;
616 default:
617 BUG();
618 }
619}
620
621static inline void
622iop_desc_init_interrupt(struct iop_adma_desc_slot *desc,
623 struct iop_adma_chan *chan)
624{
625 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
626
627 switch (chan->device->id) {
628 case DMA0_ID:
629 case DMA1_ID:
630 iop_desc_init_memcpy(desc, 1);
631 hw_desc.dma->byte_count = 0;
632 hw_desc.dma->dest_addr = 0;
633 hw_desc.dma->src_addr = 0;
634 break;
635 case AAU_ID:
636 iop_desc_init_null_xor(desc, 2, 1);
637 hw_desc.aau->byte_count = 0;
638 hw_desc.aau->dest_addr = 0;
639 hw_desc.aau->src[0] = 0;
640 hw_desc.aau->src[1] = 0;
641 break;
642 default:
643 BUG();
644 }
645}
646
647static inline void
648iop_desc_set_zero_sum_byte_count(struct iop_adma_desc_slot *desc, u32 len)
649{
650 int slots_per_op = desc->slots_per_op;
651 struct iop3xx_desc_aau *hw_desc = desc->hw_desc, *iter;
652 int i = 0;
653
654 if (len <= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT) {
655 hw_desc->byte_count = len;
656 } else {
657 do {
658 iter = iop_hw_desc_slot_idx(hw_desc, i);
659 iter->byte_count = IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT;
660 len -= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT;
661 i += slots_per_op;
662 } while (len > IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT);
663
664 if (len) {
665 iter = iop_hw_desc_slot_idx(hw_desc, i);
666 iter->byte_count = len;
667 }
668 }
669}
670
671static inline void iop_desc_set_dest_addr(struct iop_adma_desc_slot *desc,
672 struct iop_adma_chan *chan,
673 dma_addr_t addr)
674{
675 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
676
677 switch (chan->device->id) {
678 case DMA0_ID:
679 case DMA1_ID:
680 hw_desc.dma->dest_addr = addr;
681 break;
682 case AAU_ID:
683 hw_desc.aau->dest_addr = addr;
684 break;
685 default:
686 BUG();
687 }
688}
689
690static inline void iop_desc_set_memcpy_src_addr(struct iop_adma_desc_slot *desc,
691 dma_addr_t addr)
692{
693 struct iop3xx_desc_dma *hw_desc = desc->hw_desc;
694 hw_desc->src_addr = addr;
695}
696
697static inline void
698iop_desc_set_zero_sum_src_addr(struct iop_adma_desc_slot *desc, int src_idx,
699 dma_addr_t addr)
700{
701
702 struct iop3xx_desc_aau *hw_desc = desc->hw_desc, *iter;
703 int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op;
704 int i;
705
706 for (i = 0; (slot_cnt -= slots_per_op) >= 0;
707 i += slots_per_op, addr += IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT) {
708 iter = iop_hw_desc_slot_idx(hw_desc, i);
709 iop3xx_aau_desc_set_src_addr(iter, src_idx, addr);
710 }
711}
712
713static inline void iop_desc_set_xor_src_addr(struct iop_adma_desc_slot *desc,
714 int src_idx, dma_addr_t addr)
715{
716
717 struct iop3xx_desc_aau *hw_desc = desc->hw_desc, *iter;
718 int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op;
719 int i;
720
721 for (i = 0; (slot_cnt -= slots_per_op) >= 0;
722 i += slots_per_op, addr += IOP_ADMA_XOR_MAX_BYTE_COUNT) {
723 iter = iop_hw_desc_slot_idx(hw_desc, i);
724 iop3xx_aau_desc_set_src_addr(iter, src_idx, addr);
725 }
726}
727
728static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc,
729 u32 next_desc_addr)
730{
731 /* hw_desc->next_desc is the same location for all channels */
732 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
733 BUG_ON(hw_desc.dma->next_desc);
734 hw_desc.dma->next_desc = next_desc_addr;
735}
736
737static inline u32 iop_desc_get_next_desc(struct iop_adma_desc_slot *desc)
738{
739 /* hw_desc->next_desc is the same location for all channels */
740 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
741 return hw_desc.dma->next_desc;
742}
743
744static inline void iop_desc_clear_next_desc(struct iop_adma_desc_slot *desc)
745{
746 /* hw_desc->next_desc is the same location for all channels */
747 union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, };
748 hw_desc.dma->next_desc = 0;
749}
750
751static inline void iop_desc_set_block_fill_val(struct iop_adma_desc_slot *desc,
752 u32 val)
753{
754 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
755 hw_desc->src[0] = val;
756}
757
758static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc)
759{
760 struct iop3xx_desc_aau *hw_desc = desc->hw_desc;
761 struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field;
762
763 BUG_ON(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en));
764 return desc_ctrl.zero_result_err;
765}
766
767static inline void iop_chan_append(struct iop_adma_chan *chan)
768{
769 u32 dma_chan_ctrl;
770
771 dma_chan_ctrl = __raw_readl(DMA_CCR(chan));
772 dma_chan_ctrl |= 0x2;
773 __raw_writel(dma_chan_ctrl, DMA_CCR(chan));
774}
775
776static inline u32 iop_chan_get_status(struct iop_adma_chan *chan)
777{
778 return __raw_readl(DMA_CSR(chan));
779}
780
781static inline void iop_chan_disable(struct iop_adma_chan *chan)
782{
783 u32 dma_chan_ctrl = __raw_readl(DMA_CCR(chan));
784 dma_chan_ctrl &= ~1;
785 __raw_writel(dma_chan_ctrl, DMA_CCR(chan));
786}
787
788static inline void iop_chan_enable(struct iop_adma_chan *chan)
789{
790 u32 dma_chan_ctrl = __raw_readl(DMA_CCR(chan));
791
792 dma_chan_ctrl |= 1;
793 __raw_writel(dma_chan_ctrl, DMA_CCR(chan));
794}
795
796static inline void iop_adma_device_clear_eot_status(struct iop_adma_chan *chan)
797{
798 u32 status = __raw_readl(DMA_CSR(chan));
799 status &= (1 << 9);
800 __raw_writel(status, DMA_CSR(chan));
801}
802
803static inline void iop_adma_device_clear_eoc_status(struct iop_adma_chan *chan)
804{
805 u32 status = __raw_readl(DMA_CSR(chan));
806 status &= (1 << 8);
807 __raw_writel(status, DMA_CSR(chan));
808}
809
810static inline void iop_adma_device_clear_err_status(struct iop_adma_chan *chan)
811{
812 u32 status = __raw_readl(DMA_CSR(chan));
813
814 switch (chan->device->id) {
815 case DMA0_ID:
816 case DMA1_ID:
817 status &= (1 << 5) | (1 << 3) | (1 << 2) | (1 << 1);
818 break;
819 case AAU_ID:
820 status &= (1 << 5);
821 break;
822 default:
823 BUG();
824 }
825
826 __raw_writel(status, DMA_CSR(chan));
827}
828
829static inline int
830iop_is_err_int_parity(unsigned long status, struct iop_adma_chan *chan)
831{
832 return 0;
833}
834
835static inline int
836iop_is_err_mcu_abort(unsigned long status, struct iop_adma_chan *chan)
837{
838 return 0;
839}
840
841static inline int
842iop_is_err_int_tabort(unsigned long status, struct iop_adma_chan *chan)
843{
844 return 0;
845}
846
847static inline int
848iop_is_err_int_mabort(unsigned long status, struct iop_adma_chan *chan)
849{
850 return test_bit(5, &status);
851}
852
853static inline int
854iop_is_err_pci_tabort(unsigned long status, struct iop_adma_chan *chan)
855{
856 switch (chan->device->id) {
857 case DMA0_ID:
858 case DMA1_ID:
859 return test_bit(2, &status);
860 default:
861 return 0;
862 }
863}
864
865static inline int
866iop_is_err_pci_mabort(unsigned long status, struct iop_adma_chan *chan)
867{
868 switch (chan->device->id) {
869 case DMA0_ID:
870 case DMA1_ID:
871 return test_bit(3, &status);
872 default:
873 return 0;
874 }
875}
876
877static inline int
878iop_is_err_split_tx(unsigned long status, struct iop_adma_chan *chan)
879{
880 switch (chan->device->id) {
881 case DMA0_ID:
882 case DMA1_ID:
883 return test_bit(1, &status);
884 default:
885 return 0;
886 }
887}
888#endif /* _ADMA_H */
diff --git a/include/asm-arm/hardware/iop3xx-gpio.h b/include/asm-arm/hardware/iop3xx-gpio.h
deleted file mode 100644
index 0c9331f9ac24..000000000000
--- a/include/asm-arm/hardware/iop3xx-gpio.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/iop3xx-gpio.h
3 *
4 * IOP3xx GPIO wrappers
5 *
6 * Copyright (c) 2008 Arnaud Patard <arnaud.patard@rtp-net.org>
7 * Based on IXP4XX gpio.h file
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#ifndef __ASM_ARM_HARDWARE_IOP3XX_GPIO_H
26#define __ASM_ARM_HARDWARE_IOP3XX_GPIO_H
27
28#include <asm/hardware.h>
29#include <asm-generic/gpio.h>
30
31#define IOP3XX_N_GPIOS 8
32
33static inline int gpio_get_value(unsigned gpio)
34{
35 if (gpio > IOP3XX_N_GPIOS)
36 return __gpio_get_value(gpio);
37
38 return gpio_line_get(gpio);
39}
40
41static inline void gpio_set_value(unsigned gpio, int value)
42{
43 if (gpio > IOP3XX_N_GPIOS) {
44 __gpio_set_value(gpio, value);
45 return;
46 }
47 gpio_line_set(gpio, value);
48}
49
50static inline int gpio_cansleep(unsigned gpio)
51{
52 if (gpio < IOP3XX_N_GPIOS)
53 return 0;
54 else
55 return __gpio_cansleep(gpio);
56}
57
58/*
59 * The GPIOs are not generating any interrupt
60 * Note : manuals are not clear about this
61 */
62static inline int gpio_to_irq(int gpio)
63{
64 return -EINVAL;
65}
66
67static inline int irq_to_gpio(int gpio)
68{
69 return -EINVAL;
70}
71
72#endif
73
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h
deleted file mode 100644
index 18f6937f5010..000000000000
--- a/include/asm-arm/hardware/iop3xx.h
+++ /dev/null
@@ -1,312 +0,0 @@
1/*
2 * include/asm-arm/hardware/iop3xx.h
3 *
4 * Intel IOP32X and IOP33X register definitions
5 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 * Copyright (C) 2004 Intel Corp.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef __IOP3XX_H
16#define __IOP3XX_H
17
18/*
19 * IOP3XX GPIO handling
20 */
21#define GPIO_IN 0
22#define GPIO_OUT 1
23#define GPIO_LOW 0
24#define GPIO_HIGH 1
25#define IOP3XX_GPIO_LINE(x) (x)
26
27#ifndef __ASSEMBLY__
28extern void gpio_line_config(int line, int direction);
29extern int gpio_line_get(int line);
30extern void gpio_line_set(int line, int value);
31extern int init_atu;
32extern int iop3xx_get_init_atu(void);
33#endif
34
35
36/*
37 * IOP3XX processor registers
38 */
39#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000
40#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfeffe000
41#define IOP3XX_PERIPHERAL_SIZE 0x00002000
42#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
43 IOP3XX_PERIPHERAL_SIZE - 1)
44#define IOP3XX_PERIPHERAL_UPPER_VA (IOP3XX_PERIPHERAL_VIRT_BASE +\
45 IOP3XX_PERIPHERAL_SIZE - 1)
46#define IOP3XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) (addr) -\
47 (IOP3XX_PERIPHERAL_PHYS_BASE\
48 - IOP3XX_PERIPHERAL_VIRT_BASE))
49#define IOP3XX_REG_ADDR(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + (reg))
50
51/* Address Translation Unit */
52#define IOP3XX_ATUVID (volatile u16 *)IOP3XX_REG_ADDR(0x0100)
53#define IOP3XX_ATUDID (volatile u16 *)IOP3XX_REG_ADDR(0x0102)
54#define IOP3XX_ATUCMD (volatile u16 *)IOP3XX_REG_ADDR(0x0104)
55#define IOP3XX_ATUSR (volatile u16 *)IOP3XX_REG_ADDR(0x0106)
56#define IOP3XX_ATURID (volatile u8 *)IOP3XX_REG_ADDR(0x0108)
57#define IOP3XX_ATUCCR (volatile u32 *)IOP3XX_REG_ADDR(0x0109)
58#define IOP3XX_ATUCLSR (volatile u8 *)IOP3XX_REG_ADDR(0x010c)
59#define IOP3XX_ATULT (volatile u8 *)IOP3XX_REG_ADDR(0x010d)
60#define IOP3XX_ATUHTR (volatile u8 *)IOP3XX_REG_ADDR(0x010e)
61#define IOP3XX_ATUBIST (volatile u8 *)IOP3XX_REG_ADDR(0x010f)
62#define IOP3XX_IABAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0110)
63#define IOP3XX_IAUBAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0114)
64#define IOP3XX_IABAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0118)
65#define IOP3XX_IAUBAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x011c)
66#define IOP3XX_IABAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0120)
67#define IOP3XX_IAUBAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0124)
68#define IOP3XX_ASVIR (volatile u16 *)IOP3XX_REG_ADDR(0x012c)
69#define IOP3XX_ASIR (volatile u16 *)IOP3XX_REG_ADDR(0x012e)
70#define IOP3XX_ERBAR (volatile u32 *)IOP3XX_REG_ADDR(0x0130)
71#define IOP3XX_ATUILR (volatile u8 *)IOP3XX_REG_ADDR(0x013c)
72#define IOP3XX_ATUIPR (volatile u8 *)IOP3XX_REG_ADDR(0x013d)
73#define IOP3XX_ATUMGNT (volatile u8 *)IOP3XX_REG_ADDR(0x013e)
74#define IOP3XX_ATUMLAT (volatile u8 *)IOP3XX_REG_ADDR(0x013f)
75#define IOP3XX_IALR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0140)
76#define IOP3XX_IATVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0144)
77#define IOP3XX_ERLR (volatile u32 *)IOP3XX_REG_ADDR(0x0148)
78#define IOP3XX_ERTVR (volatile u32 *)IOP3XX_REG_ADDR(0x014c)
79#define IOP3XX_IALR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0150)
80#define IOP3XX_IALR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0154)
81#define IOP3XX_IATVR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0158)
82#define IOP3XX_OIOWTVR (volatile u32 *)IOP3XX_REG_ADDR(0x015c)
83#define IOP3XX_OMWTVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0160)
84#define IOP3XX_OUMWTVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0164)
85#define IOP3XX_OMWTVR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0168)
86#define IOP3XX_OUMWTVR1 (volatile u32 *)IOP3XX_REG_ADDR(0x016c)
87#define IOP3XX_OUDWTVR (volatile u32 *)IOP3XX_REG_ADDR(0x0178)
88#define IOP3XX_ATUCR (volatile u32 *)IOP3XX_REG_ADDR(0x0180)
89#define IOP3XX_PCSR (volatile u32 *)IOP3XX_REG_ADDR(0x0184)
90#define IOP3XX_ATUISR (volatile u32 *)IOP3XX_REG_ADDR(0x0188)
91#define IOP3XX_ATUIMR (volatile u32 *)IOP3XX_REG_ADDR(0x018c)
92#define IOP3XX_IABAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0190)
93#define IOP3XX_IAUBAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0194)
94#define IOP3XX_IALR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0198)
95#define IOP3XX_IATVR3 (volatile u32 *)IOP3XX_REG_ADDR(0x019c)
96#define IOP3XX_OCCAR (volatile u32 *)IOP3XX_REG_ADDR(0x01a4)
97#define IOP3XX_OCCDR (volatile u32 *)IOP3XX_REG_ADDR(0x01ac)
98#define IOP3XX_PDSCR (volatile u32 *)IOP3XX_REG_ADDR(0x01bc)
99#define IOP3XX_PMCAPID (volatile u8 *)IOP3XX_REG_ADDR(0x01c0)
100#define IOP3XX_PMNEXT (volatile u8 *)IOP3XX_REG_ADDR(0x01c1)
101#define IOP3XX_APMCR (volatile u16 *)IOP3XX_REG_ADDR(0x01c2)
102#define IOP3XX_APMCSR (volatile u16 *)IOP3XX_REG_ADDR(0x01c4)
103#define IOP3XX_PCIXCAPID (volatile u8 *)IOP3XX_REG_ADDR(0x01e0)
104#define IOP3XX_PCIXNEXT (volatile u8 *)IOP3XX_REG_ADDR(0x01e1)
105#define IOP3XX_PCIXCMD (volatile u16 *)IOP3XX_REG_ADDR(0x01e2)
106#define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4)
107#define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec)
108#define IOP3XX_PCSR_OUT_Q_BUSY (1 << 15)
109#define IOP3XX_PCSR_IN_Q_BUSY (1 << 14)
110#define IOP3XX_ATUCR_OUT_EN (1 << 1)
111
112#define IOP3XX_INIT_ATU_DEFAULT 0
113#define IOP3XX_INIT_ATU_DISABLE -1
114#define IOP3XX_INIT_ATU_ENABLE 1
115
116/* Messaging Unit */
117#define IOP3XX_IMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0310)
118#define IOP3XX_IMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0314)
119#define IOP3XX_OMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0318)
120#define IOP3XX_OMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x031c)
121#define IOP3XX_IDR (volatile u32 *)IOP3XX_REG_ADDR(0x0320)
122#define IOP3XX_IISR (volatile u32 *)IOP3XX_REG_ADDR(0x0324)
123#define IOP3XX_IIMR (volatile u32 *)IOP3XX_REG_ADDR(0x0328)
124#define IOP3XX_ODR (volatile u32 *)IOP3XX_REG_ADDR(0x032c)
125#define IOP3XX_OISR (volatile u32 *)IOP3XX_REG_ADDR(0x0330)
126#define IOP3XX_OIMR (volatile u32 *)IOP3XX_REG_ADDR(0x0334)
127#define IOP3XX_MUCR (volatile u32 *)IOP3XX_REG_ADDR(0x0350)
128#define IOP3XX_QBAR (volatile u32 *)IOP3XX_REG_ADDR(0x0354)
129#define IOP3XX_IFHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0360)
130#define IOP3XX_IFTPR (volatile u32 *)IOP3XX_REG_ADDR(0x0364)
131#define IOP3XX_IPHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0368)
132#define IOP3XX_IPTPR (volatile u32 *)IOP3XX_REG_ADDR(0x036c)
133#define IOP3XX_OFHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0370)
134#define IOP3XX_OFTPR (volatile u32 *)IOP3XX_REG_ADDR(0x0374)
135#define IOP3XX_OPHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0378)
136#define IOP3XX_OPTPR (volatile u32 *)IOP3XX_REG_ADDR(0x037c)
137#define IOP3XX_IAR (volatile u32 *)IOP3XX_REG_ADDR(0x0380)
138
139/* DMA Controller */
140#define IOP3XX_DMA_PHYS_BASE(chan) (IOP3XX_PERIPHERAL_PHYS_BASE + \
141 (0x400 + (chan << 6)))
142#define IOP3XX_DMA_UPPER_PA(chan) (IOP3XX_DMA_PHYS_BASE(chan) + 0x27)
143
144/* Peripheral bus interface */
145#define IOP3XX_PBCR (volatile u32 *)IOP3XX_REG_ADDR(0x0680)
146#define IOP3XX_PBISR (volatile u32 *)IOP3XX_REG_ADDR(0x0684)
147#define IOP3XX_PBBAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0688)
148#define IOP3XX_PBLR0 (volatile u32 *)IOP3XX_REG_ADDR(0x068c)
149#define IOP3XX_PBBAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0690)
150#define IOP3XX_PBLR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0694)
151#define IOP3XX_PBBAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0698)
152#define IOP3XX_PBLR2 (volatile u32 *)IOP3XX_REG_ADDR(0x069c)
153#define IOP3XX_PBBAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x06a0)
154#define IOP3XX_PBLR3 (volatile u32 *)IOP3XX_REG_ADDR(0x06a4)
155#define IOP3XX_PBBAR4 (volatile u32 *)IOP3XX_REG_ADDR(0x06a8)
156#define IOP3XX_PBLR4 (volatile u32 *)IOP3XX_REG_ADDR(0x06ac)
157#define IOP3XX_PBBAR5 (volatile u32 *)IOP3XX_REG_ADDR(0x06b0)
158#define IOP3XX_PBLR5 (volatile u32 *)IOP3XX_REG_ADDR(0x06b4)
159#define IOP3XX_PMBR0 (volatile u32 *)IOP3XX_REG_ADDR(0x06c0)
160#define IOP3XX_PMBR1 (volatile u32 *)IOP3XX_REG_ADDR(0x06e0)
161#define IOP3XX_PMBR2 (volatile u32 *)IOP3XX_REG_ADDR(0x06e4)
162
163/* Peripheral performance monitoring unit */
164#define IOP3XX_GTMR (volatile u32 *)IOP3XX_REG_ADDR(0x0700)
165#define IOP3XX_ESR (volatile u32 *)IOP3XX_REG_ADDR(0x0704)
166#define IOP3XX_EMISR (volatile u32 *)IOP3XX_REG_ADDR(0x0708)
167#define IOP3XX_GTSR (volatile u32 *)IOP3XX_REG_ADDR(0x0710)
168/* PERCR0 DOESN'T EXIST - index from 1! */
169#define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710)
170
171/* General Purpose I/O */
172#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0000)
173#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0004)
174#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x0008)
175
176/* Timers */
177#define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000)
178#define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004)
179#define IOP3XX_TU_TCR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0008)
180#define IOP3XX_TU_TCR1 (volatile u32 *)IOP3XX_TIMER_REG(0x000c)
181#define IOP3XX_TU_TRR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0010)
182#define IOP3XX_TU_TRR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0014)
183#define IOP3XX_TU_TISR (volatile u32 *)IOP3XX_TIMER_REG(0x0018)
184#define IOP3XX_TU_WDTCR (volatile u32 *)IOP3XX_TIMER_REG(0x001c)
185#define IOP_TMR_EN 0x02
186#define IOP_TMR_RELOAD 0x04
187#define IOP_TMR_PRIVILEGED 0x08
188#define IOP_TMR_RATIO_1_1 0x00
189
190/* Watchdog timer definitions */
191#define IOP_WDTCR_EN_ARM 0x1e1e1e1e
192#define IOP_WDTCR_EN 0xe1e1e1e1
193/* iop3xx does not support stopping the watchdog, so we just re-arm */
194#define IOP_WDTCR_DIS_ARM (IOP_WDTCR_EN_ARM)
195#define IOP_WDTCR_DIS (IOP_WDTCR_EN)
196
197/* Application accelerator unit */
198#define IOP3XX_AAU_PHYS_BASE (IOP3XX_PERIPHERAL_PHYS_BASE + 0x800)
199#define IOP3XX_AAU_UPPER_PA (IOP3XX_AAU_PHYS_BASE + 0xa7)
200
201/* I2C bus interface unit */
202#define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680)
203#define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684)
204#define IOP3XX_ISAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1688)
205#define IOP3XX_IDBR0 (volatile u32 *)IOP3XX_REG_ADDR(0x168c)
206#define IOP3XX_IBMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1694)
207#define IOP3XX_ICR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a0)
208#define IOP3XX_ISR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a4)
209#define IOP3XX_ISAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a8)
210#define IOP3XX_IDBR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16ac)
211#define IOP3XX_IBMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16b4)
212
213
214/*
215 * IOP3XX I/O and Mem space regions for PCI autoconfiguration
216 */
217#define IOP3XX_PCI_LOWER_MEM_PA 0x80000000
218
219#define IOP3XX_PCI_IO_WINDOW_SIZE 0x00010000
220#define IOP3XX_PCI_LOWER_IO_PA 0x90000000
221#define IOP3XX_PCI_LOWER_IO_VA 0xfe000000
222#define IOP3XX_PCI_LOWER_IO_BA 0x90000000
223#define IOP3XX_PCI_UPPER_IO_PA (IOP3XX_PCI_LOWER_IO_PA +\
224 IOP3XX_PCI_IO_WINDOW_SIZE - 1)
225#define IOP3XX_PCI_UPPER_IO_VA (IOP3XX_PCI_LOWER_IO_VA +\
226 IOP3XX_PCI_IO_WINDOW_SIZE - 1)
227#define IOP3XX_PCI_IO_PHYS_TO_VIRT(addr) (((u32) (addr) -\
228 IOP3XX_PCI_LOWER_IO_PA) +\
229 IOP3XX_PCI_LOWER_IO_VA)
230
231
232#ifndef __ASSEMBLY__
233void iop3xx_map_io(void);
234void iop_init_cp6_handler(void);
235void iop_init_time(unsigned long tickrate);
236unsigned long iop_gettimeoffset(void);
237
238static inline void write_tmr0(u32 val)
239{
240 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val));
241}
242
243static inline void write_tmr1(u32 val)
244{
245 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val));
246}
247
248static inline u32 read_tcr0(void)
249{
250 u32 val;
251 asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val));
252 return val;
253}
254
255static inline u32 read_tcr1(void)
256{
257 u32 val;
258 asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val));
259 return val;
260}
261
262static inline void write_trr0(u32 val)
263{
264 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val));
265}
266
267static inline void write_trr1(u32 val)
268{
269 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val));
270}
271
272static inline void write_tisr(u32 val)
273{
274 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (val));
275}
276
277static inline u32 read_wdtcr(void)
278{
279 u32 val;
280 asm volatile("mrc p6, 0, %0, c7, c1, 0":"=r" (val));
281 return val;
282}
283static inline void write_wdtcr(u32 val)
284{
285 asm volatile("mcr p6, 0, %0, c7, c1, 0"::"r" (val));
286}
287
288extern unsigned long get_iop_tick_rate(void);
289
290/* only iop13xx has these registers, we define these to present a
291 * common register interface for the iop_wdt driver.
292 */
293#define IOP_RCSR_WDT (0)
294static inline u32 read_rcsr(void)
295{
296 return 0;
297}
298static inline void write_wdtsr(u32 val)
299{
300 do { } while (0);
301}
302
303extern struct platform_device iop3xx_dma_0_channel;
304extern struct platform_device iop3xx_dma_1_channel;
305extern struct platform_device iop3xx_aau_channel;
306extern struct platform_device iop3xx_i2c0_device;
307extern struct platform_device iop3xx_i2c1_device;
308
309#endif
310
311
312#endif
diff --git a/include/asm-arm/hardware/iop_adma.h b/include/asm-arm/hardware/iop_adma.h
deleted file mode 100644
index cb7e3611bcba..000000000000
--- a/include/asm-arm/hardware/iop_adma.h
+++ /dev/null
@@ -1,116 +0,0 @@
1/*
2 * Copyright © 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16 *
17 */
18#ifndef IOP_ADMA_H
19#define IOP_ADMA_H
20#include <linux/types.h>
21#include <linux/dmaengine.h>
22#include <linux/interrupt.h>
23
24#define IOP_ADMA_SLOT_SIZE 32
25#define IOP_ADMA_THRESHOLD 4
26
27/**
28 * struct iop_adma_device - internal representation of an ADMA device
29 * @pdev: Platform device
30 * @id: HW ADMA Device selector
31 * @dma_desc_pool: base of DMA descriptor region (DMA address)
32 * @dma_desc_pool_virt: base of DMA descriptor region (CPU address)
33 * @common: embedded struct dma_device
34 */
35struct iop_adma_device {
36 struct platform_device *pdev;
37 int id;
38 dma_addr_t dma_desc_pool;
39 void *dma_desc_pool_virt;
40 struct dma_device common;
41};
42
43/**
44 * struct iop_adma_chan - internal representation of an ADMA device
45 * @pending: allows batching of hardware operations
46 * @completed_cookie: identifier for the most recently completed operation
47 * @lock: serializes enqueue/dequeue operations to the slot pool
48 * @mmr_base: memory mapped register base
49 * @chain: device chain view of the descriptors
50 * @device: parent device
51 * @common: common dmaengine channel object members
52 * @last_used: place holder for allocation to continue from where it left off
53 * @all_slots: complete domain of slots usable by the channel
54 * @slots_allocated: records the actual size of the descriptor slot pool
55 * @irq_tasklet: bottom half where iop_adma_slot_cleanup runs
56 */
57struct iop_adma_chan {
58 int pending;
59 dma_cookie_t completed_cookie;
60 spinlock_t lock; /* protects the descriptor slot pool */
61 void __iomem *mmr_base;
62 struct list_head chain;
63 struct iop_adma_device *device;
64 struct dma_chan common;
65 struct iop_adma_desc_slot *last_used;
66 struct list_head all_slots;
67 int slots_allocated;
68 struct tasklet_struct irq_tasklet;
69};
70
71/**
72 * struct iop_adma_desc_slot - IOP-ADMA software descriptor
73 * @slot_node: node on the iop_adma_chan.all_slots list
74 * @chain_node: node on the op_adma_chan.chain list
75 * @hw_desc: virtual address of the hardware descriptor chain
76 * @phys: hardware address of the hardware descriptor chain
77 * @group_head: first operation in a transaction
78 * @slot_cnt: total slots used in an transaction (group of operations)
79 * @slots_per_op: number of slots per operation
80 * @idx: pool index
81 * @unmap_src_cnt: number of xor sources
82 * @unmap_len: transaction bytecount
83 * @async_tx: support for the async_tx api
84 * @group_list: list of slots that make up a multi-descriptor transaction
85 * for example transfer lengths larger than the supported hw max
86 * @xor_check_result: result of zero sum
87 * @crc32_result: result crc calculation
88 */
89struct iop_adma_desc_slot {
90 struct list_head slot_node;
91 struct list_head chain_node;
92 void *hw_desc;
93 struct iop_adma_desc_slot *group_head;
94 u16 slot_cnt;
95 u16 slots_per_op;
96 u16 idx;
97 u16 unmap_src_cnt;
98 size_t unmap_len;
99 struct dma_async_tx_descriptor async_tx;
100 union {
101 u32 *xor_check_result;
102 u32 *crc32_result;
103 };
104};
105
106struct iop_adma_platform_data {
107 int hw_id;
108 dma_cap_mask_t cap_mask;
109 size_t pool_size;
110};
111
112#define to_iop_sw_desc(addr_hw_desc) \
113 container_of(addr_hw_desc, struct iop_adma_desc_slot, hw_desc)
114#define iop_hw_desc_slot_idx(hw_desc, idx) \
115 ( (void *) (((unsigned long) hw_desc) + ((idx) << 5)) )
116#endif
diff --git a/include/asm-arm/hardware/it8152.h b/include/asm-arm/hardware/it8152.h
deleted file mode 100644
index 74b5fff7f575..000000000000
--- a/include/asm-arm/hardware/it8152.h
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * linux/include/arm/hardware/it8152.h
3 *
4 * Copyright Compulab Ltd., 2006,2007
5 * Mike Rapoport <mike@compulab.co.il>
6 *
7 * ITE 8152 companion chip register definitions
8 */
9
10#ifndef __ASM_HARDWARE_IT8152_H
11#define __ASM_HARDWARE_IT8152_H
12extern unsigned long it8152_base_address;
13
14#define IT8152_IO_BASE (it8152_base_address + 0x03e00000)
15#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000)
16
17#define __REG_IT8152(x) (it8152_base_address + (x))
18
19#define IT8152_PCI_CFG_ADDR __REG_IT8152(0x3f00800)
20#define IT8152_PCI_CFG_DATA __REG_IT8152(0x3f00804)
21
22#define IT8152_INTC_LDCNIRR __REG_IT8152(0x3f00300)
23#define IT8152_INTC_LDPNIRR __REG_IT8152(0x3f00304)
24#define IT8152_INTC_LDCNIMR __REG_IT8152(0x3f00308)
25#define IT8152_INTC_LDPNIMR __REG_IT8152(0x3f0030C)
26#define IT8152_INTC_LDNITR __REG_IT8152(0x3f00310)
27#define IT8152_INTC_LDNIAR __REG_IT8152(0x3f00314)
28#define IT8152_INTC_LPCNIRR __REG_IT8152(0x3f00320)
29#define IT8152_INTC_LPPNIRR __REG_IT8152(0x3f00324)
30#define IT8152_INTC_LPCNIMR __REG_IT8152(0x3f00328)
31#define IT8152_INTC_LPPNIMR __REG_IT8152(0x3f0032C)
32#define IT8152_INTC_LPNITR __REG_IT8152(0x3f00330)
33#define IT8152_INTC_LPNIAR __REG_IT8152(0x3f00334)
34#define IT8152_INTC_PDCNIRR __REG_IT8152(0x3f00340)
35#define IT8152_INTC_PDPNIRR __REG_IT8152(0x3f00344)
36#define IT8152_INTC_PDCNIMR __REG_IT8152(0x3f00348)
37#define IT8152_INTC_PDPNIMR __REG_IT8152(0x3f0034C)
38#define IT8152_INTC_PDNITR __REG_IT8152(0x3f00350)
39#define IT8152_INTC_PDNIAR __REG_IT8152(0x3f00354)
40#define IT8152_INTC_INTC_TYPER __REG_IT8152(0x3f003FC)
41
42#define IT8152_GPIO_GPDR __REG_IT8152(0x3f00500)
43
44/*
45 Interrupt controller per register summary:
46 ---------------------------------------
47 LCDNIRR:
48 IT8152_LD_IRQ(8) PCICLK stop
49 IT8152_LD_IRQ(7) MCLK ready
50 IT8152_LD_IRQ(6) s/w
51 IT8152_LD_IRQ(5) UART
52 IT8152_LD_IRQ(4) GPIO
53 IT8152_LD_IRQ(3) TIMER 4
54 IT8152_LD_IRQ(2) TIMER 3
55 IT8152_LD_IRQ(1) TIMER 2
56 IT8152_LD_IRQ(0) TIMER 1
57
58 LPCNIRR:
59 IT8152_LP_IRQ(x) serial IRQ x
60
61 PCIDNIRR:
62 IT8152_PD_IRQ(14) PCISERR
63 IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR)
64 IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR)
65 IT8152_PD_IRQ(11) PCI INTD
66 IT8152_PD_IRQ(10) PCI INTC
67 IT8152_PD_IRQ(9) PCI INTB
68 IT8152_PD_IRQ(8) PCI INTA
69 IT8152_PD_IRQ(7) serial INTD
70 IT8152_PD_IRQ(6) serial INTC
71 IT8152_PD_IRQ(5) serial INTB
72 IT8152_PD_IRQ(4) serial INTA
73 IT8152_PD_IRQ(3) serial IRQ IOCHK (IOCHKR)
74 IT8152_PD_IRQ(2) chaining DMA (CDMAR)
75 IT8152_PD_IRQ(1) USB (USBR)
76 IT8152_PD_IRQ(0) Audio controller (ACR)
77 */
78/* frequently used interrupts */
79#define IT8152_PCISERR IT8152_PD_IRQ(14)
80#define IT8152_H2PTADR IT8152_PD_IRQ(13)
81#define IT8152_H2PMAR IT8152_PD_IRQ(12)
82#define IT8152_PCI_INTD IT8152_PD_IRQ(11)
83#define IT8152_PCI_INTC IT8152_PD_IRQ(10)
84#define IT8152_PCI_INTB IT8152_PD_IRQ(9)
85#define IT8152_PCI_INTA IT8152_PD_IRQ(8)
86#define IT8152_CDMA_INT IT8152_PD_IRQ(2)
87#define IT8152_USB_INT IT8152_PD_IRQ(1)
88#define IT8152_AUDIO_INT IT8152_PD_IRQ(0)
89
90struct pci_dev;
91struct pci_sys_data;
92
93extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc);
94extern void it8152_init_irq(void);
95extern int it8152_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
96extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
97extern struct pci_bus *it8152_pci_scan_bus(int nr, struct pci_sys_data *sys);
98
99#endif /* __ASM_HARDWARE_IT8152_H */
diff --git a/include/asm-arm/hardware/linkup-l1110.h b/include/asm-arm/hardware/linkup-l1110.h
deleted file mode 100644
index 7ec91168a576..000000000000
--- a/include/asm-arm/hardware/linkup-l1110.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2*
3* Definitions for H3600 Handheld Computer
4*
5* Copyright 2001 Compaq Computer Corporation.
6*
7* Use consistent with the GNU GPL is permitted,
8* provided that this copyright notice is
9* preserved in its entirety in all copies and derived works.
10*
11* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
12* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
13* FITNESS FOR ANY PARTICULAR PURPOSE.
14*
15* Author: Jamey Hicks.
16*
17*/
18
19/* LinkUp Systems PCCard/CompactFlash Interface for SA-1100 */
20
21/* PC Card Status Register */
22#define LINKUP_PRS_S1 (1 << 0) /* voltage control bits S1-S4 */
23#define LINKUP_PRS_S2 (1 << 1)
24#define LINKUP_PRS_S3 (1 << 2)
25#define LINKUP_PRS_S4 (1 << 3)
26#define LINKUP_PRS_BVD1 (1 << 4)
27#define LINKUP_PRS_BVD2 (1 << 5)
28#define LINKUP_PRS_VS1 (1 << 6)
29#define LINKUP_PRS_VS2 (1 << 7)
30#define LINKUP_PRS_RDY (1 << 8)
31#define LINKUP_PRS_CD1 (1 << 9)
32#define LINKUP_PRS_CD2 (1 << 10)
33
34/* PC Card Command Register */
35#define LINKUP_PRC_S1 (1 << 0)
36#define LINKUP_PRC_S2 (1 << 1)
37#define LINKUP_PRC_S3 (1 << 2)
38#define LINKUP_PRC_S4 (1 << 3)
39#define LINKUP_PRC_RESET (1 << 4)
40#define LINKUP_PRC_APOE (1 << 5) /* Auto Power Off Enable: clears S1-S4 when either nCD goes high */
41#define LINKUP_PRC_CFE (1 << 6) /* CompactFlash mode Enable: addresses A[10:0] only, A[25:11] high */
42#define LINKUP_PRC_SOE (1 << 7) /* signal output driver enable */
43#define LINKUP_PRC_SSP (1 << 8) /* sock select polarity: 0 for socket 0, 1 for socket 1 */
44#define LINKUP_PRC_MBZ (1 << 15) /* must be zero */
45
46struct linkup_l1110 {
47 volatile short prc;
48};
diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h
deleted file mode 100644
index fb0645de6f31..000000000000
--- a/include/asm-arm/hardware/locomo.h
+++ /dev/null
@@ -1,217 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/locomo.h
3 *
4 * This file contains the definitions for the LoCoMo G/A Chip
5 *
6 * (C) Copyright 2004 John Lenz
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * Based on sa1111.h
12 */
13#ifndef _ASM_ARCH_LOCOMO
14#define _ASM_ARCH_LOCOMO
15
16#define locomo_writel(val,addr) ({ *(volatile u16 *)(addr) = (val); })
17#define locomo_readl(addr) (*(volatile u16 *)(addr))
18
19/* LOCOMO version */
20#define LOCOMO_VER 0x00
21
22/* Pin status */
23#define LOCOMO_ST 0x04
24
25/* Pin status */
26#define LOCOMO_C32K 0x08
27
28/* Interrupt controller */
29#define LOCOMO_ICR 0x0C
30
31/* MCS decoder for boot selecting */
32#define LOCOMO_MCSX0 0x10
33#define LOCOMO_MCSX1 0x14
34#define LOCOMO_MCSX2 0x18
35#define LOCOMO_MCSX3 0x1c
36
37/* Touch panel controller */
38#define LOCOMO_ASD 0x20 /* AD start delay */
39#define LOCOMO_HSD 0x28 /* HSYS delay */
40#define LOCOMO_HSC 0x2c /* HSYS period */
41#define LOCOMO_TADC 0x30 /* tablet ADC clock */
42
43
44/* Long time timer */
45#define LOCOMO_LTC 0xd8 /* LTC interrupt setting */
46#define LOCOMO_LTINT 0xdc /* LTC interrupt */
47
48/* DAC control signal for LCD (COMADJ ) */
49#define LOCOMO_DAC 0xe0
50/* DAC control */
51#define LOCOMO_DAC_SCLOEB 0x08 /* SCL pin output data */
52#define LOCOMO_DAC_TEST 0x04 /* Test bit */
53#define LOCOMO_DAC_SDA 0x02 /* SDA pin level (read-only) */
54#define LOCOMO_DAC_SDAOEB 0x01 /* SDA pin output data */
55
56/* SPI interface */
57#define LOCOMO_SPI 0x60
58#define LOCOMO_SPIMD 0x00 /* SPI mode setting */
59#define LOCOMO_SPICT 0x04 /* SPI mode control */
60#define LOCOMO_SPIST 0x08 /* SPI status */
61#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */
62#define LOCOMO_SPI_REND (1 << 2) /* Receive end bit */
63#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */
64#define LOCOMO_SPI_RFR (1) /* read buffer bit */
65
66#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */
67#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */
68#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */
69#define LOCOMO_SPIIR 0x1c /* SPI interrupt request */
70#define LOCOMO_SPITD 0x20 /* SPI transfer data write */
71#define LOCOMO_SPIRD 0x24 /* SPI receive data read */
72#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */
73#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */
74
75/* GPIO */
76#define LOCOMO_GPD 0x90 /* GPIO direction */
77#define LOCOMO_GPE 0x94 /* GPIO input enable */
78#define LOCOMO_GPL 0x98 /* GPIO level */
79#define LOCOMO_GPO 0x9c /* GPIO out data setting */
80#define LOCOMO_GRIE 0xa0 /* GPIO rise detection */
81#define LOCOMO_GFIE 0xa4 /* GPIO fall detection */
82#define LOCOMO_GIS 0xa8 /* GPIO edge detection status */
83#define LOCOMO_GWE 0xac /* GPIO status write enable */
84#define LOCOMO_GIE 0xb0 /* GPIO interrupt enable */
85#define LOCOMO_GIR 0xb4 /* GPIO interrupt request */
86#define LOCOMO_GPIO(Nb) (0x01 << (Nb))
87#define LOCOMO_GPIO_RTS LOCOMO_GPIO(0)
88#define LOCOMO_GPIO_CTS LOCOMO_GPIO(1)
89#define LOCOMO_GPIO_DSR LOCOMO_GPIO(2)
90#define LOCOMO_GPIO_DTR LOCOMO_GPIO(3)
91#define LOCOMO_GPIO_LCD_VSHA_ON LOCOMO_GPIO(4)
92#define LOCOMO_GPIO_LCD_VSHD_ON LOCOMO_GPIO(5)
93#define LOCOMO_GPIO_LCD_VEE_ON LOCOMO_GPIO(6)
94#define LOCOMO_GPIO_LCD_MOD LOCOMO_GPIO(7)
95#define LOCOMO_GPIO_DAC_ON LOCOMO_GPIO(8)
96#define LOCOMO_GPIO_FL_VR LOCOMO_GPIO(9)
97#define LOCOMO_GPIO_DAC_SDATA LOCOMO_GPIO(10)
98#define LOCOMO_GPIO_DAC_SCK LOCOMO_GPIO(11)
99#define LOCOMO_GPIO_DAC_SLOAD LOCOMO_GPIO(12)
100#define LOCOMO_GPIO_CARD_DETECT LOCOMO_GPIO(13)
101#define LOCOMO_GPIO_WRITE_PROT LOCOMO_GPIO(14)
102#define LOCOMO_GPIO_CARD_POWER LOCOMO_GPIO(15)
103
104/* Start the definitions of the devices. Each device has an initial
105 * base address and a series of offsets from that base address. */
106
107/* Keyboard controller */
108#define LOCOMO_KEYBOARD 0x40
109#define LOCOMO_KIB 0x00 /* KIB level */
110#define LOCOMO_KSC 0x04 /* KSTRB control */
111#define LOCOMO_KCMD 0x08 /* KSTRB command */
112#define LOCOMO_KIC 0x0c /* Key interrupt */
113
114/* Front light adjustment controller */
115#define LOCOMO_FRONTLIGHT 0xc8
116#define LOCOMO_ALS 0x00 /* Adjust light cycle */
117#define LOCOMO_ALD 0x04 /* Adjust light duty */
118
119#define LOCOMO_ALC_EN 0x8000
120
121/* Backlight controller: TFT signal */
122#define LOCOMO_BACKLIGHT 0x38
123#define LOCOMO_TC 0x00 /* TFT control signal */
124#define LOCOMO_CPSD 0x04 /* CPS delay */
125
126/* Audio controller */
127#define LOCOMO_AUDIO 0x54
128#define LOCOMO_ACC 0x00 /* Audio clock */
129#define LOCOMO_PAIF 0xD0 /* PCM audio interface */
130/* Audio clock */
131#define LOCOMO_ACC_XON 0x80
132#define LOCOMO_ACC_XEN 0x40
133#define LOCOMO_ACC_XSEL0 0x00
134#define LOCOMO_ACC_XSEL1 0x20
135#define LOCOMO_ACC_MCLKEN 0x10
136#define LOCOMO_ACC_64FSEN 0x08
137#define LOCOMO_ACC_CLKSEL000 0x00 /* mclk 2 */
138#define LOCOMO_ACC_CLKSEL001 0x01 /* mclk 3 */
139#define LOCOMO_ACC_CLKSEL010 0x02 /* mclk 4 */
140#define LOCOMO_ACC_CLKSEL011 0x03 /* mclk 6 */
141#define LOCOMO_ACC_CLKSEL100 0x04 /* mclk 8 */
142#define LOCOMO_ACC_CLKSEL101 0x05 /* mclk 12 */
143/* PCM audio interface */
144#define LOCOMO_PAIF_SCINV 0x20
145#define LOCOMO_PAIF_SCEN 0x10
146#define LOCOMO_PAIF_LRCRST 0x08
147#define LOCOMO_PAIF_LRCEVE 0x04
148#define LOCOMO_PAIF_LRCINV 0x02
149#define LOCOMO_PAIF_LRCEN 0x01
150
151/* LED controller */
152#define LOCOMO_LED 0xe8
153#define LOCOMO_LPT0 0x00
154#define LOCOMO_LPT1 0x04
155/* LED control */
156#define LOCOMO_LPT_TOFH 0x80
157#define LOCOMO_LPT_TOFL 0x08
158#define LOCOMO_LPT_TOH(TOH) ((TOH & 0x7) << 4)
159#define LOCOMO_LPT_TOL(TOL) ((TOL & 0x7))
160
161extern struct bus_type locomo_bus_type;
162
163#define LOCOMO_DEVID_KEYBOARD 0
164#define LOCOMO_DEVID_FRONTLIGHT 1
165#define LOCOMO_DEVID_BACKLIGHT 2
166#define LOCOMO_DEVID_AUDIO 3
167#define LOCOMO_DEVID_LED 4
168#define LOCOMO_DEVID_UART 5
169#define LOCOMO_DEVID_SPI 6
170
171struct locomo_dev {
172 struct device dev;
173 unsigned int devid;
174 unsigned int irq[1];
175
176 void *mapbase;
177 unsigned long length;
178
179 u64 dma_mask;
180};
181
182#define LOCOMO_DEV(_d) container_of((_d), struct locomo_dev, dev)
183
184#define locomo_get_drvdata(d) dev_get_drvdata(&(d)->dev)
185#define locomo_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, p)
186
187struct locomo_driver {
188 struct device_driver drv;
189 unsigned int devid;
190 int (*probe)(struct locomo_dev *);
191 int (*remove)(struct locomo_dev *);
192 int (*suspend)(struct locomo_dev *, pm_message_t);
193 int (*resume)(struct locomo_dev *);
194};
195
196#define LOCOMO_DRV(_d) container_of((_d), struct locomo_driver, drv)
197
198#define LOCOMO_DRIVER_NAME(_ldev) ((_ldev)->dev.driver->name)
199
200void locomo_lcd_power(struct locomo_dev *, int, unsigned int);
201
202int locomo_driver_register(struct locomo_driver *);
203void locomo_driver_unregister(struct locomo_driver *);
204
205/* GPIO control functions */
206void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir);
207int locomo_gpio_read_level(struct device *dev, unsigned int bits);
208int locomo_gpio_read_output(struct device *dev, unsigned int bits);
209void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set);
210
211/* M62332 control function */
212void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel);
213
214/* Frontlight control */
215void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf);
216
217#endif
diff --git a/include/asm-arm/hardware/memc.h b/include/asm-arm/hardware/memc.h
deleted file mode 100644
index 8aef5aa0e01b..000000000000
--- a/include/asm-arm/hardware/memc.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/memc.h
3 *
4 * Copyright (C) Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define VDMA_ALIGNMENT PAGE_SIZE
11#define VDMA_XFERSIZE 16
12#define VDMA_INIT 0
13#define VDMA_START 1
14#define VDMA_END 2
15
16#ifndef __ASSEMBLY__
17extern void memc_write(unsigned int reg, unsigned long val);
18
19#define video_set_dma(start,end,offset) \
20do { \
21 memc_write (VDMA_START, (start >> 2)); \
22 memc_write (VDMA_END, (end - VDMA_XFERSIZE) >> 2); \
23 memc_write (VDMA_INIT, (offset >> 2)); \
24} while (0)
25
26#endif
diff --git a/include/asm-arm/hardware/pci_v3.h b/include/asm-arm/hardware/pci_v3.h
deleted file mode 100644
index 4d497bdb9a97..000000000000
--- a/include/asm-arm/hardware/pci_v3.h
+++ /dev/null
@@ -1,186 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/pci_v3.h
3 *
4 * Internal header file PCI V3 chip
5 *
6 * Copyright (C) ARM Limited
7 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23#ifndef ASM_ARM_HARDWARE_PCI_V3_H
24#define ASM_ARM_HARDWARE_PCI_V3_H
25
26/* -------------------------------------------------------------------------------
27 * V3 Local Bus to PCI Bridge definitions
28 * -------------------------------------------------------------------------------
29 * Registers (these are taken from page 129 of the EPC User's Manual Rev 1.04
30 * All V3 register names are prefaced by V3_ to avoid clashing with any other
31 * PCI definitions. Their names match the user's manual.
32 *
33 * I'm assuming that I20 is disabled.
34 *
35 */
36#define V3_PCI_VENDOR 0x00000000
37#define V3_PCI_DEVICE 0x00000002
38#define V3_PCI_CMD 0x00000004
39#define V3_PCI_STAT 0x00000006
40#define V3_PCI_CC_REV 0x00000008
41#define V3_PCI_HDR_CFG 0x0000000C
42#define V3_PCI_IO_BASE 0x00000010
43#define V3_PCI_BASE0 0x00000014
44#define V3_PCI_BASE1 0x00000018
45#define V3_PCI_SUB_VENDOR 0x0000002C
46#define V3_PCI_SUB_ID 0x0000002E
47#define V3_PCI_ROM 0x00000030
48#define V3_PCI_BPARAM 0x0000003C
49#define V3_PCI_MAP0 0x00000040
50#define V3_PCI_MAP1 0x00000044
51#define V3_PCI_INT_STAT 0x00000048
52#define V3_PCI_INT_CFG 0x0000004C
53#define V3_LB_BASE0 0x00000054
54#define V3_LB_BASE1 0x00000058
55#define V3_LB_MAP0 0x0000005E
56#define V3_LB_MAP1 0x00000062
57#define V3_LB_BASE2 0x00000064
58#define V3_LB_MAP2 0x00000066
59#define V3_LB_SIZE 0x00000068
60#define V3_LB_IO_BASE 0x0000006E
61#define V3_FIFO_CFG 0x00000070
62#define V3_FIFO_PRIORITY 0x00000072
63#define V3_FIFO_STAT 0x00000074
64#define V3_LB_ISTAT 0x00000076
65#define V3_LB_IMASK 0x00000077
66#define V3_SYSTEM 0x00000078
67#define V3_LB_CFG 0x0000007A
68#define V3_PCI_CFG 0x0000007C
69#define V3_DMA_PCI_ADR0 0x00000080
70#define V3_DMA_PCI_ADR1 0x00000090
71#define V3_DMA_LOCAL_ADR0 0x00000084
72#define V3_DMA_LOCAL_ADR1 0x00000094
73#define V3_DMA_LENGTH0 0x00000088
74#define V3_DMA_LENGTH1 0x00000098
75#define V3_DMA_CSR0 0x0000008B
76#define V3_DMA_CSR1 0x0000009B
77#define V3_DMA_CTLB_ADR0 0x0000008C
78#define V3_DMA_CTLB_ADR1 0x0000009C
79#define V3_DMA_DELAY 0x000000E0
80#define V3_MAIL_DATA 0x000000C0
81#define V3_PCI_MAIL_IEWR 0x000000D0
82#define V3_PCI_MAIL_IERD 0x000000D2
83#define V3_LB_MAIL_IEWR 0x000000D4
84#define V3_LB_MAIL_IERD 0x000000D6
85#define V3_MAIL_WR_STAT 0x000000D8
86#define V3_MAIL_RD_STAT 0x000000DA
87#define V3_QBA_MAP 0x000000DC
88
89/* PCI COMMAND REGISTER bits
90 */
91#define V3_COMMAND_M_FBB_EN (1 << 9)
92#define V3_COMMAND_M_SERR_EN (1 << 8)
93#define V3_COMMAND_M_PAR_EN (1 << 6)
94#define V3_COMMAND_M_MASTER_EN (1 << 2)
95#define V3_COMMAND_M_MEM_EN (1 << 1)
96#define V3_COMMAND_M_IO_EN (1 << 0)
97
98/* SYSTEM REGISTER bits
99 */
100#define V3_SYSTEM_M_RST_OUT (1 << 15)
101#define V3_SYSTEM_M_LOCK (1 << 14)
102
103/* PCI_CFG bits
104 */
105#define V3_PCI_CFG_M_I2O_EN (1 << 15)
106#define V3_PCI_CFG_M_IO_REG_DIS (1 << 14)
107#define V3_PCI_CFG_M_IO_DIS (1 << 13)
108#define V3_PCI_CFG_M_EN3V (1 << 12)
109#define V3_PCI_CFG_M_RETRY_EN (1 << 10)
110#define V3_PCI_CFG_M_AD_LOW1 (1 << 9)
111#define V3_PCI_CFG_M_AD_LOW0 (1 << 8)
112
113/* PCI_BASE register bits (PCI -> Local Bus)
114 */
115#define V3_PCI_BASE_M_ADR_BASE 0xFFF00000
116#define V3_PCI_BASE_M_ADR_BASEL 0x000FFF00
117#define V3_PCI_BASE_M_PREFETCH (1 << 3)
118#define V3_PCI_BASE_M_TYPE (3 << 1)
119#define V3_PCI_BASE_M_IO (1 << 0)
120
121/* PCI MAP register bits (PCI -> Local bus)
122 */
123#define V3_PCI_MAP_M_MAP_ADR 0xFFF00000
124#define V3_PCI_MAP_M_RD_POST_INH (1 << 15)
125#define V3_PCI_MAP_M_ROM_SIZE (3 << 10)
126#define V3_PCI_MAP_M_SWAP (3 << 8)
127#define V3_PCI_MAP_M_ADR_SIZE 0x000000F0
128#define V3_PCI_MAP_M_REG_EN (1 << 1)
129#define V3_PCI_MAP_M_ENABLE (1 << 0)
130
131/*
132 * LB_BASE0,1 register bits (Local bus -> PCI)
133 */
134#define V3_LB_BASE_ADR_BASE 0xfff00000
135#define V3_LB_BASE_SWAP (3 << 8)
136#define V3_LB_BASE_ADR_SIZE (15 << 4)
137#define V3_LB_BASE_PREFETCH (1 << 3)
138#define V3_LB_BASE_ENABLE (1 << 0)
139
140#define V3_LB_BASE_ADR_SIZE_1MB (0 << 4)
141#define V3_LB_BASE_ADR_SIZE_2MB (1 << 4)
142#define V3_LB_BASE_ADR_SIZE_4MB (2 << 4)
143#define V3_LB_BASE_ADR_SIZE_8MB (3 << 4)
144#define V3_LB_BASE_ADR_SIZE_16MB (4 << 4)
145#define V3_LB_BASE_ADR_SIZE_32MB (5 << 4)
146#define V3_LB_BASE_ADR_SIZE_64MB (6 << 4)
147#define V3_LB_BASE_ADR_SIZE_128MB (7 << 4)
148#define V3_LB_BASE_ADR_SIZE_256MB (8 << 4)
149#define V3_LB_BASE_ADR_SIZE_512MB (9 << 4)
150#define V3_LB_BASE_ADR_SIZE_1GB (10 << 4)
151#define V3_LB_BASE_ADR_SIZE_2GB (11 << 4)
152
153#define v3_addr_to_lb_base(a) ((a) & V3_LB_BASE_ADR_BASE)
154
155/*
156 * LB_MAP0,1 register bits (Local bus -> PCI)
157 */
158#define V3_LB_MAP_MAP_ADR 0xfff0
159#define V3_LB_MAP_TYPE (7 << 1)
160#define V3_LB_MAP_AD_LOW_EN (1 << 0)
161
162#define V3_LB_MAP_TYPE_IACK (0 << 1)
163#define V3_LB_MAP_TYPE_IO (1 << 1)
164#define V3_LB_MAP_TYPE_MEM (3 << 1)
165#define V3_LB_MAP_TYPE_CONFIG (5 << 1)
166#define V3_LB_MAP_TYPE_MEM_MULTIPLE (6 << 1)
167
168#define v3_addr_to_lb_map(a) (((a) >> 16) & V3_LB_MAP_MAP_ADR)
169
170/*
171 * LB_BASE2 register bits (Local bus -> PCI IO)
172 */
173#define V3_LB_BASE2_ADR_BASE 0xff00
174#define V3_LB_BASE2_SWAP (3 << 6)
175#define V3_LB_BASE2_ENABLE (1 << 0)
176
177#define v3_addr_to_lb_base2(a) (((a) >> 16) & V3_LB_BASE2_ADR_BASE)
178
179/*
180 * LB_MAP2 register bits (Local bus -> PCI IO)
181 */
182#define V3_LB_MAP2_MAP_ADR 0xff00
183
184#define v3_addr_to_lb_map2(a) (((a) >> 16) & V3_LB_MAP2_MAP_ADR)
185
186#endif
diff --git a/include/asm-arm/hardware/sa1111.h b/include/asm-arm/hardware/sa1111.h
deleted file mode 100644
index 61b1d05c7df7..000000000000
--- a/include/asm-arm/hardware/sa1111.h
+++ /dev/null
@@ -1,581 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/sa1111.h
3 *
4 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
5 *
6 * This file contains definitions for the SA-1111 Companion Chip.
7 * (Structure and naming borrowed from SA-1101.h, by Peter Danielsson.)
8 *
9 * Macro that calculates real address for registers in the SA-1111
10 */
11
12#ifndef _ASM_ARCH_SA1111
13#define _ASM_ARCH_SA1111
14
15#include <asm/arch/bitfield.h>
16
17/*
18 * The SA1111 is always located at virtual 0xf4000000, and is always
19 * "native" endian.
20 */
21
22#define SA1111_VBASE 0xf4000000
23
24/* Don't use these! */
25#define SA1111_p2v( x ) ((x) - SA1111_BASE + SA1111_VBASE)
26#define SA1111_v2p( x ) ((x) - SA1111_VBASE + SA1111_BASE)
27
28#ifndef __ASSEMBLY__
29#define _SA1111(x) ((x) + sa1111->resource.start)
30#endif
31
32#define sa1111_writel(val,addr) __raw_writel(val, addr)
33#define sa1111_readl(addr) __raw_readl(addr)
34
35/*
36 * 26 bits of the SA-1110 address bus are available to the SA-1111.
37 * Use these when feeding target addresses to the DMA engines.
38 */
39
40#define SA1111_ADDR_WIDTH (26)
41#define SA1111_ADDR_MASK ((1<<SA1111_ADDR_WIDTH)-1)
42#define SA1111_DMA_ADDR(x) ((x)&SA1111_ADDR_MASK)
43
44/*
45 * Don't ask the (SAC) DMA engines to move less than this amount.
46 */
47
48#define SA1111_SAC_DMA_MIN_XFER (0x800)
49
50/*
51 * System Bus Interface (SBI)
52 *
53 * Registers
54 * SKCR Control Register
55 * SMCR Shared Memory Controller Register
56 * SKID ID Register
57 */
58#define SA1111_SKCR 0x0000
59#define SA1111_SMCR 0x0004
60#define SA1111_SKID 0x0008
61
62#define SKCR_PLL_BYPASS (1<<0)
63#define SKCR_RCLKEN (1<<1)
64#define SKCR_SLEEP (1<<2)
65#define SKCR_DOZE (1<<3)
66#define SKCR_VCO_OFF (1<<4)
67#define SKCR_SCANTSTEN (1<<5)
68#define SKCR_CLKTSTEN (1<<6)
69#define SKCR_RDYEN (1<<7)
70#define SKCR_SELAC (1<<8)
71#define SKCR_OPPC (1<<9)
72#define SKCR_PLLTSTEN (1<<10)
73#define SKCR_USBIOTSTEN (1<<11)
74/*
75 * Don't believe the specs! Take them, throw them outside. Leave them
76 * there for a week. Spit on them. Walk on them. Stamp on them.
77 * Pour gasoline over them and finally burn them. Now think about coding.
78 * - The October 1999 errata (278260-007) says its bit 13, 1 to enable.
79 * - The Feb 2001 errata (278260-010) says that the previous errata
80 * (278260-009) is wrong, and its bit actually 12, fixed in spec
81 * 278242-003.
82 * - The SA1111 manual (278242) says bit 12, but 0 to enable.
83 * - Reality is bit 13, 1 to enable.
84 * -- rmk
85 */
86#define SKCR_OE_EN (1<<13)
87
88#define SMCR_DTIM (1<<0)
89#define SMCR_MBGE (1<<1)
90#define SMCR_DRAC_0 (1<<2)
91#define SMCR_DRAC_1 (1<<3)
92#define SMCR_DRAC_2 (1<<4)
93#define SMCR_DRAC Fld(3, 2)
94#define SMCR_CLAT (1<<5)
95
96#define SKID_SIREV_MASK (0x000000f0)
97#define SKID_MTREV_MASK (0x0000000f)
98#define SKID_ID_MASK (0xffffff00)
99#define SKID_SA1111_ID (0x690cc200)
100
101/*
102 * System Controller
103 *
104 * Registers
105 * SKPCR Power Control Register
106 * SKCDR Clock Divider Register
107 * SKAUD Audio Clock Divider Register
108 * SKPMC PS/2 Mouse Clock Divider Register
109 * SKPTC PS/2 Track Pad Clock Divider Register
110 * SKPEN0 PWM0 Enable Register
111 * SKPWM0 PWM0 Clock Register
112 * SKPEN1 PWM1 Enable Register
113 * SKPWM1 PWM1 Clock Register
114 */
115#define SA1111_SKPCR 0x0200
116#define SA1111_SKCDR 0x0204
117#define SA1111_SKAUD 0x0208
118#define SA1111_SKPMC 0x020c
119#define SA1111_SKPTC 0x0210
120#define SA1111_SKPEN0 0x0214
121#define SA1111_SKPWM0 0x0218
122#define SA1111_SKPEN1 0x021c
123#define SA1111_SKPWM1 0x0220
124
125#define SKPCR_UCLKEN (1<<0)
126#define SKPCR_ACCLKEN (1<<1)
127#define SKPCR_I2SCLKEN (1<<2)
128#define SKPCR_L3CLKEN (1<<3)
129#define SKPCR_SCLKEN (1<<4)
130#define SKPCR_PMCLKEN (1<<5)
131#define SKPCR_PTCLKEN (1<<6)
132#define SKPCR_DCLKEN (1<<7)
133#define SKPCR_PWMCLKEN (1<<8)
134
135/*
136 * USB Host controller
137 */
138#define SA1111_USB 0x0400
139
140/*
141 * Offsets from SA1111_USB_BASE
142 */
143#define SA1111_USB_STATUS 0x0118
144#define SA1111_USB_RESET 0x011c
145#define SA1111_USB_IRQTEST 0x0120
146
147#define USB_RESET_FORCEIFRESET (1 << 0)
148#define USB_RESET_FORCEHCRESET (1 << 1)
149#define USB_RESET_CLKGENRESET (1 << 2)
150#define USB_RESET_SIMSCALEDOWN (1 << 3)
151#define USB_RESET_USBINTTEST (1 << 4)
152#define USB_RESET_SLEEPSTBYEN (1 << 5)
153#define USB_RESET_PWRSENSELOW (1 << 6)
154#define USB_RESET_PWRCTRLLOW (1 << 7)
155
156#define USB_STATUS_IRQHCIRMTWKUP (1 << 7)
157#define USB_STATUS_IRQHCIBUFFACC (1 << 8)
158#define USB_STATUS_NIRQHCIM (1 << 9)
159#define USB_STATUS_NHCIMFCLR (1 << 10)
160#define USB_STATUS_USBPWRSENSE (1 << 11)
161
162/*
163 * Serial Audio Controller
164 *
165 * Registers
166 * SACR0 Serial Audio Common Control Register
167 * SACR1 Serial Audio Alternate Mode (I2C/MSB) Control Register
168 * SACR2 Serial Audio AC-link Control Register
169 * SASR0 Serial Audio I2S/MSB Interface & FIFO Status Register
170 * SASR1 Serial Audio AC-link Interface & FIFO Status Register
171 * SASCR Serial Audio Status Clear Register
172 * L3_CAR L3 Control Bus Address Register
173 * L3_CDR L3 Control Bus Data Register
174 * ACCAR AC-link Command Address Register
175 * ACCDR AC-link Command Data Register
176 * ACSAR AC-link Status Address Register
177 * ACSDR AC-link Status Data Register
178 * SADTCS Serial Audio DMA Transmit Control/Status Register
179 * SADTSA Serial Audio DMA Transmit Buffer Start Address A
180 * SADTCA Serial Audio DMA Transmit Buffer Count Register A
181 * SADTSB Serial Audio DMA Transmit Buffer Start Address B
182 * SADTCB Serial Audio DMA Transmit Buffer Count Register B
183 * SADRCS Serial Audio DMA Receive Control/Status Register
184 * SADRSA Serial Audio DMA Receive Buffer Start Address A
185 * SADRCA Serial Audio DMA Receive Buffer Count Register A
186 * SADRSB Serial Audio DMA Receive Buffer Start Address B
187 * SADRCB Serial Audio DMA Receive Buffer Count Register B
188 * SAITR Serial Audio Interrupt Test Register
189 * SADR Serial Audio Data Register (16 x 32-bit)
190 */
191
192#define SA1111_SERAUDIO 0x0600
193
194/*
195 * These are offsets from the above base.
196 */
197#define SA1111_SACR0 0x00
198#define SA1111_SACR1 0x04
199#define SA1111_SACR2 0x08
200#define SA1111_SASR0 0x0c
201#define SA1111_SASR1 0x10
202#define SA1111_SASCR 0x18
203#define SA1111_L3_CAR 0x1c
204#define SA1111_L3_CDR 0x20
205#define SA1111_ACCAR 0x24
206#define SA1111_ACCDR 0x28
207#define SA1111_ACSAR 0x2c
208#define SA1111_ACSDR 0x30
209#define SA1111_SADTCS 0x34
210#define SA1111_SADTSA 0x38
211#define SA1111_SADTCA 0x3c
212#define SA1111_SADTSB 0x40
213#define SA1111_SADTCB 0x44
214#define SA1111_SADRCS 0x48
215#define SA1111_SADRSA 0x4c
216#define SA1111_SADRCA 0x50
217#define SA1111_SADRSB 0x54
218#define SA1111_SADRCB 0x58
219#define SA1111_SAITR 0x5c
220#define SA1111_SADR 0x80
221
222#ifndef CONFIG_ARCH_PXA
223
224#define SACR0_ENB (1<<0)
225#define SACR0_BCKD (1<<2)
226#define SACR0_RST (1<<3)
227
228#define SACR1_AMSL (1<<0)
229#define SACR1_L3EN (1<<1)
230#define SACR1_L3MB (1<<2)
231#define SACR1_DREC (1<<3)
232#define SACR1_DRPL (1<<4)
233#define SACR1_ENLBF (1<<5)
234
235#define SACR2_TS3V (1<<0)
236#define SACR2_TS4V (1<<1)
237#define SACR2_WKUP (1<<2)
238#define SACR2_DREC (1<<3)
239#define SACR2_DRPL (1<<4)
240#define SACR2_ENLBF (1<<5)
241#define SACR2_RESET (1<<6)
242
243#define SASR0_TNF (1<<0)
244#define SASR0_RNE (1<<1)
245#define SASR0_BSY (1<<2)
246#define SASR0_TFS (1<<3)
247#define SASR0_RFS (1<<4)
248#define SASR0_TUR (1<<5)
249#define SASR0_ROR (1<<6)
250#define SASR0_L3WD (1<<16)
251#define SASR0_L3RD (1<<17)
252
253#define SASR1_TNF (1<<0)
254#define SASR1_RNE (1<<1)
255#define SASR1_BSY (1<<2)
256#define SASR1_TFS (1<<3)
257#define SASR1_RFS (1<<4)
258#define SASR1_TUR (1<<5)
259#define SASR1_ROR (1<<6)
260#define SASR1_CADT (1<<16)
261#define SASR1_SADR (1<<17)
262#define SASR1_RSTO (1<<18)
263#define SASR1_CLPM (1<<19)
264#define SASR1_CRDY (1<<20)
265#define SASR1_RS3V (1<<21)
266#define SASR1_RS4V (1<<22)
267
268#define SASCR_TUR (1<<5)
269#define SASCR_ROR (1<<6)
270#define SASCR_DTS (1<<16)
271#define SASCR_RDD (1<<17)
272#define SASCR_STO (1<<18)
273
274#define SADTCS_TDEN (1<<0)
275#define SADTCS_TDIE (1<<1)
276#define SADTCS_TDBDA (1<<3)
277#define SADTCS_TDSTA (1<<4)
278#define SADTCS_TDBDB (1<<5)
279#define SADTCS_TDSTB (1<<6)
280#define SADTCS_TBIU (1<<7)
281
282#define SADRCS_RDEN (1<<0)
283#define SADRCS_RDIE (1<<1)
284#define SADRCS_RDBDA (1<<3)
285#define SADRCS_RDSTA (1<<4)
286#define SADRCS_RDBDB (1<<5)
287#define SADRCS_RDSTB (1<<6)
288#define SADRCS_RBIU (1<<7)
289
290#define SAD_CS_DEN (1<<0)
291#define SAD_CS_DIE (1<<1) /* Not functional on metal 1 */
292#define SAD_CS_DBDA (1<<3) /* Not functional on metal 1 */
293#define SAD_CS_DSTA (1<<4)
294#define SAD_CS_DBDB (1<<5) /* Not functional on metal 1 */
295#define SAD_CS_DSTB (1<<6)
296#define SAD_CS_BIU (1<<7) /* Not functional on metal 1 */
297
298#define SAITR_TFS (1<<0)
299#define SAITR_RFS (1<<1)
300#define SAITR_TUR (1<<2)
301#define SAITR_ROR (1<<3)
302#define SAITR_CADT (1<<4)
303#define SAITR_SADR (1<<5)
304#define SAITR_RSTO (1<<6)
305#define SAITR_TDBDA (1<<8)
306#define SAITR_TDBDB (1<<9)
307#define SAITR_RDBDA (1<<10)
308#define SAITR_RDBDB (1<<11)
309
310#endif /* !CONFIG_ARCH_PXA */
311
312/*
313 * General-Purpose I/O Interface
314 *
315 * Registers
316 * PA_DDR GPIO Block A Data Direction
317 * PA_DRR/PA_DWR GPIO Block A Data Value Register (read/write)
318 * PA_SDR GPIO Block A Sleep Direction
319 * PA_SSR GPIO Block A Sleep State
320 * PB_DDR GPIO Block B Data Direction
321 * PB_DRR/PB_DWR GPIO Block B Data Value Register (read/write)
322 * PB_SDR GPIO Block B Sleep Direction
323 * PB_SSR GPIO Block B Sleep State
324 * PC_DDR GPIO Block C Data Direction
325 * PC_DRR/PC_DWR GPIO Block C Data Value Register (read/write)
326 * PC_SDR GPIO Block C Sleep Direction
327 * PC_SSR GPIO Block C Sleep State
328 */
329
330#define _PA_DDR _SA1111( 0x1000 )
331#define _PA_DRR _SA1111( 0x1004 )
332#define _PA_DWR _SA1111( 0x1004 )
333#define _PA_SDR _SA1111( 0x1008 )
334#define _PA_SSR _SA1111( 0x100c )
335#define _PB_DDR _SA1111( 0x1010 )
336#define _PB_DRR _SA1111( 0x1014 )
337#define _PB_DWR _SA1111( 0x1014 )
338#define _PB_SDR _SA1111( 0x1018 )
339#define _PB_SSR _SA1111( 0x101c )
340#define _PC_DDR _SA1111( 0x1020 )
341#define _PC_DRR _SA1111( 0x1024 )
342#define _PC_DWR _SA1111( 0x1024 )
343#define _PC_SDR _SA1111( 0x1028 )
344#define _PC_SSR _SA1111( 0x102c )
345
346#define SA1111_GPIO 0x1000
347
348#define SA1111_GPIO_PADDR (0x000)
349#define SA1111_GPIO_PADRR (0x004)
350#define SA1111_GPIO_PADWR (0x004)
351#define SA1111_GPIO_PASDR (0x008)
352#define SA1111_GPIO_PASSR (0x00c)
353#define SA1111_GPIO_PBDDR (0x010)
354#define SA1111_GPIO_PBDRR (0x014)
355#define SA1111_GPIO_PBDWR (0x014)
356#define SA1111_GPIO_PBSDR (0x018)
357#define SA1111_GPIO_PBSSR (0x01c)
358#define SA1111_GPIO_PCDDR (0x020)
359#define SA1111_GPIO_PCDRR (0x024)
360#define SA1111_GPIO_PCDWR (0x024)
361#define SA1111_GPIO_PCSDR (0x028)
362#define SA1111_GPIO_PCSSR (0x02c)
363
364#define GPIO_A0 (1 << 0)
365#define GPIO_A1 (1 << 1)
366#define GPIO_A2 (1 << 2)
367#define GPIO_A3 (1 << 3)
368
369#define GPIO_B0 (1 << 8)
370#define GPIO_B1 (1 << 9)
371#define GPIO_B2 (1 << 10)
372#define GPIO_B3 (1 << 11)
373#define GPIO_B4 (1 << 12)
374#define GPIO_B5 (1 << 13)
375#define GPIO_B6 (1 << 14)
376#define GPIO_B7 (1 << 15)
377
378#define GPIO_C0 (1 << 16)
379#define GPIO_C1 (1 << 17)
380#define GPIO_C2 (1 << 18)
381#define GPIO_C3 (1 << 19)
382#define GPIO_C4 (1 << 20)
383#define GPIO_C5 (1 << 21)
384#define GPIO_C6 (1 << 22)
385#define GPIO_C7 (1 << 23)
386
387/*
388 * Interrupt Controller
389 *
390 * Registers
391 * INTTEST0 Test register 0
392 * INTTEST1 Test register 1
393 * INTEN0 Interrupt Enable register 0
394 * INTEN1 Interrupt Enable register 1
395 * INTPOL0 Interrupt Polarity selection 0
396 * INTPOL1 Interrupt Polarity selection 1
397 * INTTSTSEL Interrupt source selection
398 * INTSTATCLR0 Interrupt Status/Clear 0
399 * INTSTATCLR1 Interrupt Status/Clear 1
400 * INTSET0 Interrupt source set 0
401 * INTSET1 Interrupt source set 1
402 * WAKE_EN0 Wake-up source enable 0
403 * WAKE_EN1 Wake-up source enable 1
404 * WAKE_POL0 Wake-up polarity selection 0
405 * WAKE_POL1 Wake-up polarity selection 1
406 */
407#define SA1111_INTC 0x1600
408
409/*
410 * These are offsets from the above base.
411 */
412#define SA1111_INTTEST0 0x0000
413#define SA1111_INTTEST1 0x0004
414#define SA1111_INTEN0 0x0008
415#define SA1111_INTEN1 0x000c
416#define SA1111_INTPOL0 0x0010
417#define SA1111_INTPOL1 0x0014
418#define SA1111_INTTSTSEL 0x0018
419#define SA1111_INTSTATCLR0 0x001c
420#define SA1111_INTSTATCLR1 0x0020
421#define SA1111_INTSET0 0x0024
422#define SA1111_INTSET1 0x0028
423#define SA1111_WAKEEN0 0x002c
424#define SA1111_WAKEEN1 0x0030
425#define SA1111_WAKEPOL0 0x0034
426#define SA1111_WAKEPOL1 0x0038
427
428/*
429 * PS/2 Trackpad and Mouse Interfaces
430 *
431 * Registers
432 * PS2CR Control Register
433 * PS2STAT Status Register
434 * PS2DATA Transmit/Receive Data register
435 * PS2CLKDIV Clock Division Register
436 * PS2PRECNT Clock Precount Register
437 * PS2TEST1 Test register 1
438 * PS2TEST2 Test register 2
439 * PS2TEST3 Test register 3
440 * PS2TEST4 Test register 4
441 */
442
443#define SA1111_KBD 0x0a00
444#define SA1111_MSE 0x0c00
445
446/*
447 * These are offsets from the above bases.
448 */
449#define SA1111_PS2CR 0x0000
450#define SA1111_PS2STAT 0x0004
451#define SA1111_PS2DATA 0x0008
452#define SA1111_PS2CLKDIV 0x000c
453#define SA1111_PS2PRECNT 0x0010
454
455#define PS2CR_ENA 0x08
456#define PS2CR_FKD 0x02
457#define PS2CR_FKC 0x01
458
459#define PS2STAT_STP 0x0100
460#define PS2STAT_TXE 0x0080
461#define PS2STAT_TXB 0x0040
462#define PS2STAT_RXF 0x0020
463#define PS2STAT_RXB 0x0010
464#define PS2STAT_ENA 0x0008
465#define PS2STAT_RXP 0x0004
466#define PS2STAT_KBD 0x0002
467#define PS2STAT_KBC 0x0001
468
469/*
470 * PCMCIA Interface
471 *
472 * Registers
473 * PCSR Status Register
474 * PCCR Control Register
475 * PCSSR Sleep State Register
476 */
477
478#define SA1111_PCMCIA 0x1600
479
480/*
481 * These are offsets from the above base.
482 */
483#define SA1111_PCCR 0x0000
484#define SA1111_PCSSR 0x0004
485#define SA1111_PCSR 0x0008
486
487#define PCSR_S0_READY (1<<0)
488#define PCSR_S1_READY (1<<1)
489#define PCSR_S0_DETECT (1<<2)
490#define PCSR_S1_DETECT (1<<3)
491#define PCSR_S0_VS1 (1<<4)
492#define PCSR_S0_VS2 (1<<5)
493#define PCSR_S1_VS1 (1<<6)
494#define PCSR_S1_VS2 (1<<7)
495#define PCSR_S0_WP (1<<8)
496#define PCSR_S1_WP (1<<9)
497#define PCSR_S0_BVD1 (1<<10)
498#define PCSR_S0_BVD2 (1<<11)
499#define PCSR_S1_BVD1 (1<<12)
500#define PCSR_S1_BVD2 (1<<13)
501
502#define PCCR_S0_RST (1<<0)
503#define PCCR_S1_RST (1<<1)
504#define PCCR_S0_FLT (1<<2)
505#define PCCR_S1_FLT (1<<3)
506#define PCCR_S0_PWAITEN (1<<4)
507#define PCCR_S1_PWAITEN (1<<5)
508#define PCCR_S0_PSE (1<<6)
509#define PCCR_S1_PSE (1<<7)
510
511#define PCSSR_S0_SLEEP (1<<0)
512#define PCSSR_S1_SLEEP (1<<1)
513
514
515
516
517extern struct bus_type sa1111_bus_type;
518
519#define SA1111_DEVID_SBI 0
520#define SA1111_DEVID_SK 1
521#define SA1111_DEVID_USB 2
522#define SA1111_DEVID_SAC 3
523#define SA1111_DEVID_SSP 4
524#define SA1111_DEVID_PS2 5
525#define SA1111_DEVID_GPIO 6
526#define SA1111_DEVID_INT 7
527#define SA1111_DEVID_PCMCIA 8
528
529struct sa1111_dev {
530 struct device dev;
531 unsigned int devid;
532 struct resource res;
533 void __iomem *mapbase;
534 unsigned int skpcr_mask;
535 unsigned int irq[6];
536 u64 dma_mask;
537};
538
539#define SA1111_DEV(_d) container_of((_d), struct sa1111_dev, dev)
540
541#define sa1111_get_drvdata(d) dev_get_drvdata(&(d)->dev)
542#define sa1111_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, p)
543
544struct sa1111_driver {
545 struct device_driver drv;
546 unsigned int devid;
547 int (*probe)(struct sa1111_dev *);
548 int (*remove)(struct sa1111_dev *);
549 int (*suspend)(struct sa1111_dev *, pm_message_t);
550 int (*resume)(struct sa1111_dev *);
551};
552
553#define SA1111_DRV(_d) container_of((_d), struct sa1111_driver, drv)
554
555#define SA1111_DRIVER_NAME(_sadev) ((_sadev)->dev.driver->name)
556
557/*
558 * These frob the SKPCR register.
559 */
560void sa1111_enable_device(struct sa1111_dev *);
561void sa1111_disable_device(struct sa1111_dev *);
562
563unsigned int sa1111_pll_clock(struct sa1111_dev *);
564
565#define SA1111_AUDIO_ACLINK 0
566#define SA1111_AUDIO_I2S 1
567
568void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode);
569int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate);
570int sa1111_get_audio_rate(struct sa1111_dev *sadev);
571
572int sa1111_check_dma_bug(dma_addr_t addr);
573
574int sa1111_driver_register(struct sa1111_driver *);
575void sa1111_driver_unregister(struct sa1111_driver *);
576
577void sa1111_set_io_dir(struct sa1111_dev *sadev, unsigned int bits, unsigned int dir, unsigned int sleep_dir);
578void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
579void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
580
581#endif /* _ASM_ARCH_SA1111 */
diff --git a/include/asm-arm/hardware/scoop.h b/include/asm-arm/hardware/scoop.h
deleted file mode 100644
index dfb8330599f9..000000000000
--- a/include/asm-arm/hardware/scoop.h
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * Definitions for the SCOOP interface found on various Sharp PDAs
3 *
4 * Copyright (c) 2004 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#define SCOOP_MCR 0x00
13#define SCOOP_CDR 0x04
14#define SCOOP_CSR 0x08
15#define SCOOP_CPR 0x0C
16#define SCOOP_CCR 0x10
17#define SCOOP_IRR 0x14
18#define SCOOP_IRM 0x14
19#define SCOOP_IMR 0x18
20#define SCOOP_ISR 0x1C
21#define SCOOP_GPCR 0x20
22#define SCOOP_GPWR 0x24
23#define SCOOP_GPRR 0x28
24
25#define SCOOP_GPCR_PA22 ( 1 << 12 )
26#define SCOOP_GPCR_PA21 ( 1 << 11 )
27#define SCOOP_GPCR_PA20 ( 1 << 10 )
28#define SCOOP_GPCR_PA19 ( 1 << 9 )
29#define SCOOP_GPCR_PA18 ( 1 << 8 )
30#define SCOOP_GPCR_PA17 ( 1 << 7 )
31#define SCOOP_GPCR_PA16 ( 1 << 6 )
32#define SCOOP_GPCR_PA15 ( 1 << 5 )
33#define SCOOP_GPCR_PA14 ( 1 << 4 )
34#define SCOOP_GPCR_PA13 ( 1 << 3 )
35#define SCOOP_GPCR_PA12 ( 1 << 2 )
36#define SCOOP_GPCR_PA11 ( 1 << 1 )
37
38struct scoop_config {
39 unsigned short io_out;
40 unsigned short io_dir;
41 unsigned short suspend_clr;
42 unsigned short suspend_set;
43 int gpio_base;
44};
45
46/* Structure for linking scoop devices to PCMCIA sockets */
47struct scoop_pcmcia_dev {
48 struct device *dev; /* Pointer to this socket's scoop device */
49 int irq; /* irq for socket */
50 int cd_irq;
51 const char *cd_irq_str;
52 unsigned char keep_vs;
53 unsigned char keep_rd;
54};
55
56struct scoop_pcmcia_config {
57 struct scoop_pcmcia_dev *devs;
58 int num_devs;
59 void (*pcmcia_init)(void);
60 void (*power_ctrl)(struct device *scoop, unsigned short cpr, int nr);
61};
62
63extern struct scoop_pcmcia_config *platform_scoop_config;
64
65void reset_scoop(struct device *dev);
66unsigned short __deprecated set_scoop_gpio(struct device *dev, unsigned short bit);
67unsigned short __deprecated reset_scoop_gpio(struct device *dev, unsigned short bit);
68unsigned short read_scoop_reg(struct device *dev, unsigned short reg);
69void write_scoop_reg(struct device *dev, unsigned short reg, unsigned short data);
diff --git a/include/asm-arm/hardware/sharpsl_pm.h b/include/asm-arm/hardware/sharpsl_pm.h
deleted file mode 100644
index 2d00db22b981..000000000000
--- a/include/asm-arm/hardware/sharpsl_pm.h
+++ /dev/null
@@ -1,106 +0,0 @@
1/*
2 * SharpSL Battery/PM Driver
3 *
4 * Copyright (c) 2004-2005 Richard Purdie
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/interrupt.h>
13
14struct sharpsl_charger_machinfo {
15 void (*init)(void);
16 void (*exit)(void);
17 int gpio_acin;
18 int gpio_batfull;
19 int batfull_irq;
20 int gpio_batlock;
21 int gpio_fatal;
22 void (*discharge)(int);
23 void (*discharge1)(int);
24 void (*charge)(int);
25 void (*measure_temp)(int);
26 void (*presuspend)(void);
27 void (*postsuspend)(void);
28 void (*earlyresume)(void);
29 unsigned long (*read_devdata)(int);
30#define SHARPSL_BATT_VOLT 1
31#define SHARPSL_BATT_TEMP 2
32#define SHARPSL_ACIN_VOLT 3
33#define SHARPSL_STATUS_ACIN 4
34#define SHARPSL_STATUS_LOCK 5
35#define SHARPSL_STATUS_CHRGFULL 6
36#define SHARPSL_STATUS_FATAL 7
37 unsigned long (*charger_wakeup)(void);
38 int (*should_wakeup)(unsigned int resume_on_alarm);
39 void (*backlight_limit)(int);
40 int (*backlight_get_status) (void);
41 int charge_on_volt;
42 int charge_on_temp;
43 int charge_acin_high;
44 int charge_acin_low;
45 int fatal_acin_volt;
46 int fatal_noacin_volt;
47 int bat_levels;
48 struct battery_thresh *bat_levels_noac;
49 struct battery_thresh *bat_levels_acin;
50 struct battery_thresh *bat_levels_noac_bl;
51 struct battery_thresh *bat_levels_acin_bl;
52 int status_high_acin;
53 int status_low_acin;
54 int status_high_noac;
55 int status_low_noac;
56};
57
58struct battery_thresh {
59 int voltage;
60 int percentage;
61};
62
63struct battery_stat {
64 int ac_status; /* APM AC Present/Not Present */
65 int mainbat_status; /* APM Main Battery Status */
66 int mainbat_percent; /* Main Battery Percentage Charge */
67 int mainbat_voltage; /* Main Battery Voltage */
68};
69
70struct sharpsl_pm_status {
71 struct device *dev;
72 struct timer_list ac_timer;
73 struct timer_list chrg_full_timer;
74
75 int charge_mode;
76#define CHRG_ERROR (-1)
77#define CHRG_OFF (0)
78#define CHRG_ON (1)
79#define CHRG_DONE (2)
80
81 unsigned int flags;
82#define SHARPSL_SUSPENDED (1 << 0) /* Device is Suspended */
83#define SHARPSL_ALARM_ACTIVE (1 << 1) /* Alarm is for charging event (not user) */
84#define SHARPSL_BL_LIMIT (1 << 2) /* Backlight Intensity Limited */
85#define SHARPSL_APM_QUEUED (1 << 3) /* APM Event Queued */
86#define SHARPSL_DO_OFFLINE_CHRG (1 << 4) /* Trigger the offline charger */
87
88 int full_count;
89 unsigned long charge_start_time;
90 struct sharpsl_charger_machinfo *machinfo;
91 struct battery_stat battstat;
92};
93
94extern struct sharpsl_pm_status sharpsl_pm;
95
96
97#define SHARPSL_LED_ERROR 2
98#define SHARPSL_LED_ON 1
99#define SHARPSL_LED_OFF 0
100
101void sharpsl_battery_kick(void);
102void sharpsl_pm_led(int val);
103irqreturn_t sharpsl_ac_isr(int irq, void *dev_id);
104irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id);
105irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id);
106
diff --git a/include/asm-arm/hardware/ssp.h b/include/asm-arm/hardware/ssp.h
deleted file mode 100644
index 3b42e181997c..000000000000
--- a/include/asm-arm/hardware/ssp.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * ssp.h
3 *
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef SSP_H
11#define SSP_H
12
13struct ssp_state {
14 unsigned int cr0;
15 unsigned int cr1;
16};
17
18int ssp_write_word(u16 data);
19int ssp_read_word(u16 *data);
20int ssp_flush(void);
21void ssp_enable(void);
22void ssp_disable(void);
23void ssp_save_state(struct ssp_state *ssp);
24void ssp_restore_state(struct ssp_state *ssp);
25int ssp_init(void);
26void ssp_exit(void);
27
28#endif
diff --git a/include/asm-arm/hardware/uengine.h b/include/asm-arm/hardware/uengine.h
deleted file mode 100644
index b442d65c6593..000000000000
--- a/include/asm-arm/hardware/uengine.h
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * Generic library functions for the microengines found on the Intel
3 * IXP2000 series of network processors.
4 *
5 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Dedicated to Marija Kulikova.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as
10 * published by the Free Software Foundation; either version 2.1 of the
11 * License, or (at your option) any later version.
12 */
13
14#ifndef __IXP2000_UENGINE_H
15#define __IXP2000_UENGINE_H
16
17extern u32 ixp2000_uengine_mask;
18
19struct ixp2000_uengine_code
20{
21 u32 cpu_model_bitmask;
22 u8 cpu_min_revision;
23 u8 cpu_max_revision;
24
25 u32 uengine_parameters;
26
27 struct ixp2000_reg_value {
28 int reg;
29 u32 value;
30 } *initial_reg_values;
31
32 int num_insns;
33 u8 *insns;
34};
35
36u32 ixp2000_uengine_csr_read(int uengine, int offset);
37void ixp2000_uengine_csr_write(int uengine, int offset, u32 value);
38void ixp2000_uengine_reset(u32 uengine_mask);
39void ixp2000_uengine_set_mode(int uengine, u32 mode);
40void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns);
41void ixp2000_uengine_init_context(int uengine, int context, int pc);
42void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask);
43void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask);
44int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c);
45
46#define IXP2000_UENGINE_8_CONTEXTS 0x00000000
47#define IXP2000_UENGINE_4_CONTEXTS 0x80000000
48#define IXP2000_UENGINE_PRN_UPDATE_EVERY 0x40000000
49#define IXP2000_UENGINE_PRN_UPDATE_ON_ACCESS 0x00000000
50#define IXP2000_UENGINE_NN_FROM_SELF 0x00100000
51#define IXP2000_UENGINE_NN_FROM_PREVIOUS 0x00000000
52#define IXP2000_UENGINE_ASSERT_EMPTY_AT_3 0x000c0000
53#define IXP2000_UENGINE_ASSERT_EMPTY_AT_2 0x00080000
54#define IXP2000_UENGINE_ASSERT_EMPTY_AT_1 0x00040000
55#define IXP2000_UENGINE_ASSERT_EMPTY_AT_0 0x00000000
56#define IXP2000_UENGINE_LM_ADDR1_GLOBAL 0x00020000
57#define IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT 0x00000000
58#define IXP2000_UENGINE_LM_ADDR0_GLOBAL 0x00010000
59#define IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT 0x00000000
60
61
62#endif
diff --git a/include/asm-arm/hardware/vic.h b/include/asm-arm/hardware/vic.h
deleted file mode 100644
index ed9ca3736a0b..000000000000
--- a/include/asm-arm/hardware/vic.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * linux/include/asm-arm/hardware/vic.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_HARDWARE_VIC_H
21#define __ASM_ARM_HARDWARE_VIC_H
22
23#define VIC_IRQ_STATUS 0x00
24#define VIC_FIQ_STATUS 0x04
25#define VIC_RAW_STATUS 0x08
26#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */
27#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */
28#define VIC_INT_ENABLE_CLEAR 0x14
29#define VIC_INT_SOFT 0x18
30#define VIC_INT_SOFT_CLEAR 0x1c
31#define VIC_PROTECT 0x20
32#define VIC_VECT_ADDR 0x30
33#define VIC_DEF_VECT_ADDR 0x34
34
35#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */
36#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */
37#define VIC_ITCR 0x300 /* VIC test control register */
38
39#define VIC_VECT_CNTL_ENABLE (1 << 5)
40
41#ifndef __ASSEMBLY__
42void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
43#endif
44
45#endif
diff --git a/include/asm-arm/hw_irq.h b/include/asm-arm/hw_irq.h
deleted file mode 100644
index f1a08a500604..000000000000
--- a/include/asm-arm/hw_irq.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Nothing to see here yet
3 */
4#ifndef _ARCH_ARM_HW_IRQ_H
5#define _ARCH_ARM_HW_IRQ_H
6
7#include <asm/mach/irq.h>
8
9#endif
diff --git a/include/asm-arm/hwcap.h b/include/asm-arm/hwcap.h
deleted file mode 100644
index 81f4c899a555..000000000000
--- a/include/asm-arm/hwcap.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __ASMARM_HWCAP_H
2#define __ASMARM_HWCAP_H
3
4/*
5 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
6 */
7#define HWCAP_SWP 1
8#define HWCAP_HALF 2
9#define HWCAP_THUMB 4
10#define HWCAP_26BIT 8 /* Play it safe */
11#define HWCAP_FAST_MULT 16
12#define HWCAP_FPA 32
13#define HWCAP_VFP 64
14#define HWCAP_EDSP 128
15#define HWCAP_JAVA 256
16#define HWCAP_IWMMXT 512
17#define HWCAP_CRUNCH 1024
18#define HWCAP_THUMBEE 2048
19
20#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
21/*
22 * This yields a mask that user programs can use to figure out what
23 * instruction set this cpu supports.
24 */
25#define ELF_HWCAP (elf_hwcap)
26extern unsigned int elf_hwcap;
27#endif
28
29#endif
diff --git a/include/asm-arm/ide.h b/include/asm-arm/ide.h
deleted file mode 100644
index a48019f99d08..000000000000
--- a/include/asm-arm/ide.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * linux/include/asm-arm/ide.h
3 *
4 * Copyright (C) 1994-1996 Linus Torvalds & authors
5 */
6
7/*
8 * This file contains the ARM architecture specific IDE code.
9 */
10
11#ifndef __ASMARM_IDE_H
12#define __ASMARM_IDE_H
13
14#ifdef __KERNEL__
15
16#define __ide_mm_insw(port,addr,len) readsw(port,addr,len)
17#define __ide_mm_insl(port,addr,len) readsl(port,addr,len)
18#define __ide_mm_outsw(port,addr,len) writesw(port,addr,len)
19#define __ide_mm_outsl(port,addr,len) writesl(port,addr,len)
20
21#endif /* __KERNEL__ */
22
23#endif /* __ASMARM_IDE_H */
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
deleted file mode 100644
index eebe56e74d6d..000000000000
--- a/include/asm-arm/io.h
+++ /dev/null
@@ -1,287 +0,0 @@
1/*
2 * linux/include/asm-arm/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 * 05-Oct-2004 BJD Moved memory string functions to use void __iomem
20 */
21#ifndef __ASM_ARM_IO_H
22#define __ASM_ARM_IO_H
23
24#ifdef __KERNEL__
25
26#include <linux/types.h>
27#include <asm/byteorder.h>
28#include <asm/memory.h>
29
30/*
31 * ISA I/O bus memory addresses are 1:1 with the physical address.
32 */
33#define isa_virt_to_bus virt_to_phys
34#define isa_page_to_bus page_to_phys
35#define isa_bus_to_virt phys_to_virt
36
37/*
38 * Generic IO read/write. These perform native-endian accesses. Note
39 * that some architectures will want to re-define __raw_{read,write}w.
40 */
41extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
42extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
43extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
44
45extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
46extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
47extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
48
49#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))
50#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
51#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v))
52
53#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a))
54#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
55#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
56
57/*
58 * Architecture ioremap implementation.
59 */
60#define MT_DEVICE 0
61#define MT_DEVICE_NONSHARED 1
62#define MT_DEVICE_CACHED 2
63#define MT_DEVICE_IXP2000 3
64/*
65 * types 4 onwards can be found in asm/mach/map.h and are undefined
66 * for ioremap
67 */
68
69/*
70 * __arm_ioremap takes CPU physical address.
71 * __arm_ioremap_pfn takes a Page Frame Number and an offset into that page
72 */
73extern void __iomem * __arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int);
74extern void __iomem * __arm_ioremap(unsigned long, size_t, unsigned int);
75extern void __iounmap(volatile void __iomem *addr);
76
77/*
78 * Bad read/write accesses...
79 */
80extern void __readwrite_bug(const char *fn);
81
82/*
83 * Now, pick up the machine-defined IO definitions
84 */
85#include <asm/arch/io.h>
86
87/*
88 * IO port access primitives
89 * -------------------------
90 *
91 * The ARM doesn't have special IO access instructions; all IO is memory
92 * mapped. Note that these are defined to perform little endian accesses
93 * only. Their primary purpose is to access PCI and ISA peripherals.
94 *
95 * Note that for a big endian machine, this implies that the following
96 * big endian mode connectivity is in place, as described by numerous
97 * ARM documents:
98 *
99 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
100 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
101 *
102 * The machine specific io.h include defines __io to translate an "IO"
103 * address to a memory address.
104 *
105 * Note that we prevent GCC re-ordering or caching values in expressions
106 * by introducing sequence points into the in*() definitions. Note that
107 * __raw_* do not guarantee this behaviour.
108 *
109 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
110 */
111#ifdef __io
112#define outb(v,p) __raw_writeb(v,__io(p))
113#define outw(v,p) __raw_writew((__force __u16) \
114 cpu_to_le16(v),__io(p))
115#define outl(v,p) __raw_writel((__force __u32) \
116 cpu_to_le32(v),__io(p))
117
118#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; })
119#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \
120 __raw_readw(__io(p))); __v; })
121#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \
122 __raw_readl(__io(p))); __v; })
123
124#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
125#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
126#define outsl(p,d,l) __raw_writesl(__io(p),d,l)
127
128#define insb(p,d,l) __raw_readsb(__io(p),d,l)
129#define insw(p,d,l) __raw_readsw(__io(p),d,l)
130#define insl(p,d,l) __raw_readsl(__io(p),d,l)
131#endif
132
133#define outb_p(val,port) outb((val),(port))
134#define outw_p(val,port) outw((val),(port))
135#define outl_p(val,port) outl((val),(port))
136#define inb_p(port) inb((port))
137#define inw_p(port) inw((port))
138#define inl_p(port) inl((port))
139
140#define outsb_p(port,from,len) outsb(port,from,len)
141#define outsw_p(port,from,len) outsw(port,from,len)
142#define outsl_p(port,from,len) outsl(port,from,len)
143#define insb_p(port,to,len) insb(port,to,len)
144#define insw_p(port,to,len) insw(port,to,len)
145#define insl_p(port,to,len) insl(port,to,len)
146
147/*
148 * String version of IO memory access ops:
149 */
150extern void _memcpy_fromio(void *, const volatile void __iomem *, size_t);
151extern void _memcpy_toio(volatile void __iomem *, const void *, size_t);
152extern void _memset_io(volatile void __iomem *, int, size_t);
153
154#define mmiowb()
155
156/*
157 * Memory access primitives
158 * ------------------------
159 *
160 * These perform PCI memory accesses via an ioremap region. They don't
161 * take an address as such, but a cookie.
162 *
163 * Again, this are defined to perform little endian accesses. See the
164 * IO port primitives for more information.
165 */
166#ifdef __mem_pci
167#define readb(c) ({ __u8 __v = __raw_readb(__mem_pci(c)); __v; })
168#define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \
169 __raw_readw(__mem_pci(c))); __v; })
170#define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \
171 __raw_readl(__mem_pci(c))); __v; })
172#define readb_relaxed(addr) readb(addr)
173#define readw_relaxed(addr) readw(addr)
174#define readl_relaxed(addr) readl(addr)
175
176#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l)
177#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l)
178#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l)
179
180#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
181#define writew(v,c) __raw_writew((__force __u16) \
182 cpu_to_le16(v),__mem_pci(c))
183#define writel(v,c) __raw_writel((__force __u32) \
184 cpu_to_le32(v),__mem_pci(c))
185
186#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
187#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
188#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
189
190#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
191#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
192#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
193
194#elif !defined(readb)
195
196#define readb(c) (__readwrite_bug("readb"),0)
197#define readw(c) (__readwrite_bug("readw"),0)
198#define readl(c) (__readwrite_bug("readl"),0)
199#define writeb(v,c) __readwrite_bug("writeb")
200#define writew(v,c) __readwrite_bug("writew")
201#define writel(v,c) __readwrite_bug("writel")
202
203#define check_signature(io,sig,len) (0)
204
205#endif /* __mem_pci */
206
207/*
208 * ioremap and friends.
209 *
210 * ioremap takes a PCI memory address, as specified in
211 * Documentation/IO-mapping.txt.
212 *
213 */
214#ifndef __arch_ioremap
215#define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE)
216#define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE)
217#define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED)
218#define iounmap(cookie) __iounmap(cookie)
219#else
220#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
221#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE)
222#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED)
223#define iounmap(cookie) __arch_iounmap(cookie)
224#endif
225
226/*
227 * io{read,write}{8,16,32} macros
228 */
229#ifndef ioread8
230#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
231#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __v; })
232#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __v; })
233
234#define iowrite8(v,p) __raw_writeb(v, p)
235#define iowrite16(v,p) __raw_writew((__force __u16)cpu_to_le16(v), p)
236#define iowrite32(v,p) __raw_writel((__force __u32)cpu_to_le32(v), p)
237
238#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
239#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
240#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
241
242#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
243#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
244#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
245
246extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
247extern void ioport_unmap(void __iomem *addr);
248#endif
249
250struct pci_dev;
251
252extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
253extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
254
255/*
256 * can the hardware map this into one segment or not, given no other
257 * constraints.
258 */
259#define BIOVEC_MERGEABLE(vec1, vec2) \
260 ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))
261
262#ifdef CONFIG_MMU
263#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
264extern int valid_phys_addr_range(unsigned long addr, size_t size);
265extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
266#endif
267
268/*
269 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
270 * access
271 */
272#define xlate_dev_mem_ptr(p) __va(p)
273
274/*
275 * Convert a virtual cached pointer to an uncached pointer
276 */
277#define xlate_dev_kmem_ptr(p) p
278
279/*
280 * Register ISA memory and port locations for glibc iopl/inb/outb
281 * emulation.
282 */
283extern void register_isa_ports(unsigned int mmio, unsigned int io,
284 unsigned int io_shift);
285
286#endif /* __KERNEL__ */
287#endif /* __ASM_ARM_IO_H */
diff --git a/include/asm-arm/ioctl.h b/include/asm-arm/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/include/asm-arm/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/include/asm-arm/ioctls.h b/include/asm-arm/ioctls.h
deleted file mode 100644
index a91d8a1523cf..000000000000
--- a/include/asm-arm/ioctls.h
+++ /dev/null
@@ -1,84 +0,0 @@
1#ifndef __ASM_ARM_IOCTLS_H
2#define __ASM_ARM_IOCTLS_H
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCSBRK 0x5427 /* BSD compatibility */
47#define TIOCCBRK 0x5428 /* BSD compatibility */
48#define TIOCGSID 0x5429 /* Return the session ID of FD */
49#define TCGETS2 _IOR('T',0x2A, struct termios2)
50#define TCSETS2 _IOW('T',0x2B, struct termios2)
51#define TCSETSW2 _IOW('T',0x2C, struct termios2)
52#define TCSETSF2 _IOW('T',0x2D, struct termios2)
53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
55
56#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
57#define FIOCLEX 0x5451
58#define FIOASYNC 0x5452
59#define TIOCSERCONFIG 0x5453
60#define TIOCSERGWILD 0x5454
61#define TIOCSERSWILD 0x5455
62#define TIOCGLCKTRMIOS 0x5456
63#define TIOCSLCKTRMIOS 0x5457
64#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
65#define TIOCSERGETLSR 0x5459 /* Get line status register */
66#define TIOCSERGETMULTI 0x545A /* Get multiport config */
67#define TIOCSERSETMULTI 0x545B /* Set multiport config */
68
69#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
70#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
71#define FIOQSIZE 0x545E
72
73/* Used for packet mode */
74#define TIOCPKT_DATA 0
75#define TIOCPKT_FLUSHREAD 1
76#define TIOCPKT_FLUSHWRITE 2
77#define TIOCPKT_STOP 4
78#define TIOCPKT_START 8
79#define TIOCPKT_NOSTOP 16
80#define TIOCPKT_DOSTOP 32
81
82#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
83
84#endif
diff --git a/include/asm-arm/ipcbuf.h b/include/asm-arm/ipcbuf.h
deleted file mode 100644
index 97683975f7df..000000000000
--- a/include/asm-arm/ipcbuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __ASMARM_IPCBUF_H
2#define __ASMARM_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __ASMARM_IPCBUF_H */
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
deleted file mode 100644
index 9cb01907e43b..000000000000
--- a/include/asm-arm/irq.h
+++ /dev/null
@@ -1,28 +0,0 @@
1#ifndef __ASM_ARM_IRQ_H
2#define __ASM_ARM_IRQ_H
3
4#include <asm/arch/irqs.h>
5
6#ifndef irq_canonicalize
7#define irq_canonicalize(i) (i)
8#endif
9
10#ifndef NR_IRQS
11#define NR_IRQS 128
12#endif
13
14/*
15 * Use this value to indicate lack of interrupt
16 * capability
17 */
18#ifndef NO_IRQ
19#define NO_IRQ ((unsigned int)(-1))
20#endif
21
22#ifndef __ASSEMBLY__
23struct irqaction;
24extern void migrate_irqs(void);
25#endif
26
27#endif
28
diff --git a/include/asm-arm/irq_regs.h b/include/asm-arm/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/include/asm-arm/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/include/asm-arm/irqflags.h b/include/asm-arm/irqflags.h
deleted file mode 100644
index 6d09974e6646..000000000000
--- a/include/asm-arm/irqflags.h
+++ /dev/null
@@ -1,132 +0,0 @@
1#ifndef __ASM_ARM_IRQFLAGS_H
2#define __ASM_ARM_IRQFLAGS_H
3
4#ifdef __KERNEL__
5
6#include <asm/ptrace.h>
7
8/*
9 * CPU interrupt mask handling.
10 */
11#if __LINUX_ARM_ARCH__ >= 6
12
13#define raw_local_irq_save(x) \
14 ({ \
15 __asm__ __volatile__( \
16 "mrs %0, cpsr @ local_irq_save\n" \
17 "cpsid i" \
18 : "=r" (x) : : "memory", "cc"); \
19 })
20
21#define raw_local_irq_enable() __asm__("cpsie i @ __sti" : : : "memory", "cc")
22#define raw_local_irq_disable() __asm__("cpsid i @ __cli" : : : "memory", "cc")
23#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
24#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
25
26#else
27
28/*
29 * Save the current interrupt enable state & disable IRQs
30 */
31#define raw_local_irq_save(x) \
32 ({ \
33 unsigned long temp; \
34 (void) (&temp == &x); \
35 __asm__ __volatile__( \
36 "mrs %0, cpsr @ local_irq_save\n" \
37" orr %1, %0, #128\n" \
38" msr cpsr_c, %1" \
39 : "=r" (x), "=r" (temp) \
40 : \
41 : "memory", "cc"); \
42 })
43
44/*
45 * Enable IRQs
46 */
47#define raw_local_irq_enable() \
48 ({ \
49 unsigned long temp; \
50 __asm__ __volatile__( \
51 "mrs %0, cpsr @ local_irq_enable\n" \
52" bic %0, %0, #128\n" \
53" msr cpsr_c, %0" \
54 : "=r" (temp) \
55 : \
56 : "memory", "cc"); \
57 })
58
59/*
60 * Disable IRQs
61 */
62#define raw_local_irq_disable() \
63 ({ \
64 unsigned long temp; \
65 __asm__ __volatile__( \
66 "mrs %0, cpsr @ local_irq_disable\n" \
67" orr %0, %0, #128\n" \
68" msr cpsr_c, %0" \
69 : "=r" (temp) \
70 : \
71 : "memory", "cc"); \
72 })
73
74/*
75 * Enable FIQs
76 */
77#define local_fiq_enable() \
78 ({ \
79 unsigned long temp; \
80 __asm__ __volatile__( \
81 "mrs %0, cpsr @ stf\n" \
82" bic %0, %0, #64\n" \
83" msr cpsr_c, %0" \
84 : "=r" (temp) \
85 : \
86 : "memory", "cc"); \
87 })
88
89/*
90 * Disable FIQs
91 */
92#define local_fiq_disable() \
93 ({ \
94 unsigned long temp; \
95 __asm__ __volatile__( \
96 "mrs %0, cpsr @ clf\n" \
97" orr %0, %0, #64\n" \
98" msr cpsr_c, %0" \
99 : "=r" (temp) \
100 : \
101 : "memory", "cc"); \
102 })
103
104#endif
105
106/*
107 * Save the current interrupt enable state.
108 */
109#define raw_local_save_flags(x) \
110 ({ \
111 __asm__ __volatile__( \
112 "mrs %0, cpsr @ local_save_flags" \
113 : "=r" (x) : : "memory", "cc"); \
114 })
115
116/*
117 * restore saved IRQ & FIQ state
118 */
119#define raw_local_irq_restore(x) \
120 __asm__ __volatile__( \
121 "msr cpsr_c, %0 @ local_irq_restore\n" \
122 : \
123 : "r" (x) \
124 : "memory", "cc")
125
126#define raw_irqs_disabled_flags(flags) \
127({ \
128 (int)((flags) & PSR_I_BIT); \
129})
130
131#endif
132#endif
diff --git a/include/asm-arm/kdebug.h b/include/asm-arm/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/include/asm-arm/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/include/asm-arm/kexec.h b/include/asm-arm/kexec.h
deleted file mode 100644
index c8986bb99ed5..000000000000
--- a/include/asm-arm/kexec.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _ARM_KEXEC_H
2#define _ARM_KEXEC_H
3
4#ifdef CONFIG_KEXEC
5
6/* Maximum physical address we can use pages from */
7#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
8/* Maximum address we can reach in physical address mode */
9#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
10/* Maximum address we can use for the control code buffer */
11#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
12
13#define KEXEC_CONTROL_CODE_SIZE 4096
14
15#define KEXEC_ARCH KEXEC_ARCH_ARM
16
17#define KEXEC_ARM_ATAGS_OFFSET 0x1000
18#define KEXEC_ARM_ZIMAGE_OFFSET 0x8000
19
20#ifndef __ASSEMBLY__
21
22struct kimage;
23/* Provide a dummy definition to avoid build failures. */
24static inline void crash_setup_regs(struct pt_regs *newregs,
25 struct pt_regs *oldregs) { }
26
27#endif /* __ASSEMBLY__ */
28
29#endif /* CONFIG_KEXEC */
30
31#endif /* _ARM_KEXEC_H */
diff --git a/include/asm-arm/kgdb.h b/include/asm-arm/kgdb.h
deleted file mode 100644
index 67af4b841984..000000000000
--- a/include/asm-arm/kgdb.h
+++ /dev/null
@@ -1,104 +0,0 @@
1/*
2 * ARM KGDB support
3 *
4 * Author: Deepak Saxena <dsaxena@mvista.com>
5 *
6 * Copyright (C) 2002 MontaVista Software Inc.
7 *
8 */
9
10#ifndef __ARM_KGDB_H__
11#define __ARM_KGDB_H__
12
13#include <linux/ptrace.h>
14
15/*
16 * GDB assumes that we're a user process being debugged, so
17 * it will send us an SWI command to write into memory as the
18 * debug trap. When an SWI occurs, the next instruction addr is
19 * placed into R14_svc before jumping to the vector trap.
20 * This doesn't work for kernel debugging as we are already in SVC
21 * we would loose the kernel's LR, which is a bad thing. This
22 * is bad thing.
23 *
24 * By doing this as an undefined instruction trap, we force a mode
25 * switch from SVC to UND mode, allowing us to save full kernel state.
26 *
27 * We also define a KGDB_COMPILED_BREAK which can be used to compile
28 * in breakpoints. This is important for things like sysrq-G and for
29 * the initial breakpoint from trap_init().
30 *
31 * Note to ARM HW designers: Add real trap support like SH && PPC to
32 * make our lives much much simpler. :)
33 */
34#define BREAK_INSTR_SIZE 4
35#define GDB_BREAKINST 0xef9f0001
36#define KGDB_BREAKINST 0xe7ffdefe
37#define KGDB_COMPILED_BREAK 0xe7ffdeff
38#define CACHE_FLUSH_IS_SAFE 1
39
40#ifndef __ASSEMBLY__
41
42static inline void arch_kgdb_breakpoint(void)
43{
44 asm(".word 0xe7ffdeff");
45}
46
47extern void kgdb_handle_bus_error(void);
48extern int kgdb_fault_expected;
49
50#endif /* !__ASSEMBLY__ */
51
52/*
53 * From Kevin Hilman:
54 *
55 * gdb is expecting the following registers layout.
56 *
57 * r0-r15: 1 long word each
58 * f0-f7: unused, 3 long words each !!
59 * fps: unused, 1 long word
60 * cpsr: 1 long word
61 *
62 * Even though f0-f7 and fps are not used, they need to be
63 * present in the registers sent for correct processing in
64 * the host-side gdb.
65 *
66 * In particular, it is crucial that CPSR is in the right place,
67 * otherwise gdb will not be able to correctly interpret stepping over
68 * conditional branches.
69 */
70#define _GP_REGS 16
71#define _FP_REGS 8
72#define _EXTRA_REGS 2
73#define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS)
74
75#define KGDB_MAX_NO_CPUS 1
76#define BUFMAX 400
77#define NUMREGBYTES (GDB_MAX_REGS << 2)
78#define NUMCRITREGBYTES (32 << 2)
79
80#define _R0 0
81#define _R1 1
82#define _R2 2
83#define _R3 3
84#define _R4 4
85#define _R5 5
86#define _R6 6
87#define _R7 7
88#define _R8 8
89#define _R9 9
90#define _R10 10
91#define _FP 11
92#define _IP 12
93#define _SPT 13
94#define _LR 14
95#define _PC 15
96#define _CPSR (GDB_MAX_REGS - 1)
97
98/*
99 * So that we can denote the end of a frame for tracing,
100 * in the simple case:
101 */
102#define CFI_END_FRAME(func) __CFI_END_FRAME(_PC, _SPT, func)
103
104#endif /* __ASM_KGDB_H__ */
diff --git a/include/asm-arm/kmap_types.h b/include/asm-arm/kmap_types.h
deleted file mode 100644
index 45def13ee17a..000000000000
--- a/include/asm-arm/kmap_types.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef __ARM_KMAP_TYPES_H
2#define __ARM_KMAP_TYPES_H
3
4/*
5 * This is the "bare minimum". AIO seems to require this.
6 */
7enum km_type {
8 KM_BOUNCE_READ,
9 KM_SKB_SUNRPC_DATA,
10 KM_SKB_DATA_SOFTIRQ,
11 KM_USER0,
12 KM_USER1,
13 KM_BIO_SRC_IRQ,
14 KM_BIO_DST_IRQ,
15 KM_PTE0,
16 KM_PTE1,
17 KM_IRQ0,
18 KM_IRQ1,
19 KM_SOFTIRQ0,
20 KM_SOFTIRQ1,
21 KM_TYPE_NR
22};
23
24#endif
diff --git a/include/asm-arm/kprobes.h b/include/asm-arm/kprobes.h
deleted file mode 100644
index b1a37876942d..000000000000
--- a/include/asm-arm/kprobes.h
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * include/asm-arm/kprobes.h
3 *
4 * Copyright (C) 2006, 2007 Motorola Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 */
15
16#ifndef _ARM_KPROBES_H
17#define _ARM_KPROBES_H
18
19#include <linux/types.h>
20#include <linux/ptrace.h>
21#include <linux/percpu.h>
22
23#define __ARCH_WANT_KPROBES_INSN_SLOT
24#define MAX_INSN_SIZE 2
25#define MAX_STACK_SIZE 64 /* 32 would probably be OK */
26
27/*
28 * This undefined instruction must be unique and
29 * reserved solely for kprobes' use.
30 */
31#define KPROBE_BREAKPOINT_INSTRUCTION 0xe7f001f8
32
33#define regs_return_value(regs) ((regs)->ARM_r0)
34#define flush_insn_slot(p) do { } while (0)
35#define kretprobe_blacklist_size 0
36
37typedef u32 kprobe_opcode_t;
38
39struct kprobe;
40typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *);
41
42/* Architecture specific copy of original instruction. */
43struct arch_specific_insn {
44 kprobe_opcode_t *insn;
45 kprobe_insn_handler_t *insn_handler;
46};
47
48struct prev_kprobe {
49 struct kprobe *kp;
50 unsigned int status;
51};
52
53/* per-cpu kprobe control block */
54struct kprobe_ctlblk {
55 unsigned int kprobe_status;
56 struct prev_kprobe prev_kprobe;
57 struct pt_regs jprobe_saved_regs;
58 char jprobes_stack[MAX_STACK_SIZE];
59};
60
61void arch_remove_kprobe(struct kprobe *);
62void kretprobe_trampoline(void);
63
64int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr);
65int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr);
66int kprobe_exceptions_notify(struct notifier_block *self,
67 unsigned long val, void *data);
68
69enum kprobe_insn {
70 INSN_REJECTED,
71 INSN_GOOD,
72 INSN_GOOD_NO_SLOT
73};
74
75enum kprobe_insn arm_kprobe_decode_insn(kprobe_opcode_t,
76 struct arch_specific_insn *);
77void __init arm_kprobe_decode_init(void);
78
79#endif /* _ARM_KPROBES_H */
diff --git a/include/asm-arm/leds.h b/include/asm-arm/leds.h
deleted file mode 100644
index 12290ea55801..000000000000
--- a/include/asm-arm/leds.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 * linux/include/asm-arm/leds.h
3 *
4 * Copyright (C) 1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Event-driven interface for LEDs on machines
11 * Added led_start and led_stop- Alex Holden, 28th Dec 1998.
12 */
13#ifndef ASM_ARM_LEDS_H
14#define ASM_ARM_LEDS_H
15
16
17typedef enum {
18 led_idle_start,
19 led_idle_end,
20 led_timer,
21 led_start,
22 led_stop,
23 led_claim, /* override idle & timer leds */
24 led_release, /* restore idle & timer leds */
25 led_start_timer_mode,
26 led_stop_timer_mode,
27 led_green_on,
28 led_green_off,
29 led_amber_on,
30 led_amber_off,
31 led_red_on,
32 led_red_off,
33 led_blue_on,
34 led_blue_off,
35 /*
36 * I want this between led_timer and led_start, but
37 * someone has decided to export this to user space
38 */
39 led_halted
40} led_event_t;
41
42/* Use this routine to handle LEDs */
43
44#ifdef CONFIG_LEDS
45extern void (*leds_event)(led_event_t);
46#else
47#define leds_event(e)
48#endif
49
50#endif
diff --git a/include/asm-arm/limits.h b/include/asm-arm/limits.h
deleted file mode 100644
index 08d8c6600804..000000000000
--- a/include/asm-arm/limits.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __ASM_PIPE_H
2#define __ASM_PIPE_H
3
4#ifndef PAGE_SIZE
5#include <asm/page.h>
6#endif
7
8#define PIPE_BUF PAGE_SIZE
9
10#endif
11
diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h
deleted file mode 100644
index 5a25632b1bc0..000000000000
--- a/include/asm-arm/linkage.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4#define __ALIGN .align 0
5#define __ALIGN_STR ".align 0"
6
7#define ENDPROC(name) \
8 .type name, %function; \
9 END(name)
10
11#endif
diff --git a/include/asm-arm/local.h b/include/asm-arm/local.h
deleted file mode 100644
index c11c530f74d0..000000000000
--- a/include/asm-arm/local.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local.h>
diff --git a/include/asm-arm/locks.h b/include/asm-arm/locks.h
deleted file mode 100644
index 852220eecdbc..000000000000
--- a/include/asm-arm/locks.h
+++ /dev/null
@@ -1,274 +0,0 @@
1/*
2 * linux/include/asm-arm/locks.h
3 *
4 * Copyright (C) 2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Interrupt safe locking assembler.
11 */
12#ifndef __ASM_PROC_LOCKS_H
13#define __ASM_PROC_LOCKS_H
14
15#if __LINUX_ARM_ARCH__ >= 6
16
17#define __down_op(ptr,fail) \
18 ({ \
19 __asm__ __volatile__( \
20 "@ down_op\n" \
21"1: ldrex lr, [%0]\n" \
22" sub lr, lr, %1\n" \
23" strex ip, lr, [%0]\n" \
24" teq ip, #0\n" \
25" bne 1b\n" \
26" teq lr, #0\n" \
27" movmi ip, %0\n" \
28" blmi " #fail \
29 : \
30 : "r" (ptr), "I" (1) \
31 : "ip", "lr", "cc"); \
32 smp_mb(); \
33 })
34
35#define __down_op_ret(ptr,fail) \
36 ({ \
37 unsigned int ret; \
38 __asm__ __volatile__( \
39 "@ down_op_ret\n" \
40"1: ldrex lr, [%1]\n" \
41" sub lr, lr, %2\n" \
42" strex ip, lr, [%1]\n" \
43" teq ip, #0\n" \
44" bne 1b\n" \
45" teq lr, #0\n" \
46" movmi ip, %1\n" \
47" movpl ip, #0\n" \
48" blmi " #fail "\n" \
49" mov %0, ip" \
50 : "=&r" (ret) \
51 : "r" (ptr), "I" (1) \
52 : "ip", "lr", "cc"); \
53 smp_mb(); \
54 ret; \
55 })
56
57#define __up_op(ptr,wake) \
58 ({ \
59 smp_mb(); \
60 __asm__ __volatile__( \
61 "@ up_op\n" \
62"1: ldrex lr, [%0]\n" \
63" add lr, lr, %1\n" \
64" strex ip, lr, [%0]\n" \
65" teq ip, #0\n" \
66" bne 1b\n" \
67" cmp lr, #0\n" \
68" movle ip, %0\n" \
69" blle " #wake \
70 : \
71 : "r" (ptr), "I" (1) \
72 : "ip", "lr", "cc"); \
73 })
74
75/*
76 * The value 0x01000000 supports up to 128 processors and
77 * lots of processes. BIAS must be chosen such that sub'ing
78 * BIAS once per CPU will result in the long remaining
79 * negative.
80 */
81#define RW_LOCK_BIAS 0x01000000
82#define RW_LOCK_BIAS_STR "0x01000000"
83
84#define __down_op_write(ptr,fail) \
85 ({ \
86 __asm__ __volatile__( \
87 "@ down_op_write\n" \
88"1: ldrex lr, [%0]\n" \
89" sub lr, lr, %1\n" \
90" strex ip, lr, [%0]\n" \
91" teq ip, #0\n" \
92" bne 1b\n" \
93" teq lr, #0\n" \
94" movne ip, %0\n" \
95" blne " #fail \
96 : \
97 : "r" (ptr), "I" (RW_LOCK_BIAS) \
98 : "ip", "lr", "cc"); \
99 smp_mb(); \
100 })
101
102#define __up_op_write(ptr,wake) \
103 ({ \
104 smp_mb(); \
105 __asm__ __volatile__( \
106 "@ up_op_write\n" \
107"1: ldrex lr, [%0]\n" \
108" adds lr, lr, %1\n" \
109" strex ip, lr, [%0]\n" \
110" teq ip, #0\n" \
111" bne 1b\n" \
112" movcs ip, %0\n" \
113" blcs " #wake \
114 : \
115 : "r" (ptr), "I" (RW_LOCK_BIAS) \
116 : "ip", "lr", "cc"); \
117 })
118
119#define __down_op_read(ptr,fail) \
120 __down_op(ptr, fail)
121
122#define __up_op_read(ptr,wake) \
123 ({ \
124 smp_mb(); \
125 __asm__ __volatile__( \
126 "@ up_op_read\n" \
127"1: ldrex lr, [%0]\n" \
128" add lr, lr, %1\n" \
129" strex ip, lr, [%0]\n" \
130" teq ip, #0\n" \
131" bne 1b\n" \
132" teq lr, #0\n" \
133" moveq ip, %0\n" \
134" bleq " #wake \
135 : \
136 : "r" (ptr), "I" (1) \
137 : "ip", "lr", "cc"); \
138 })
139
140#else
141
142#define __down_op(ptr,fail) \
143 ({ \
144 __asm__ __volatile__( \
145 "@ down_op\n" \
146" mrs ip, cpsr\n" \
147" orr lr, ip, #128\n" \
148" msr cpsr_c, lr\n" \
149" ldr lr, [%0]\n" \
150" subs lr, lr, %1\n" \
151" str lr, [%0]\n" \
152" msr cpsr_c, ip\n" \
153" movmi ip, %0\n" \
154" blmi " #fail \
155 : \
156 : "r" (ptr), "I" (1) \
157 : "ip", "lr", "cc"); \
158 smp_mb(); \
159 })
160
161#define __down_op_ret(ptr,fail) \
162 ({ \
163 unsigned int ret; \
164 __asm__ __volatile__( \
165 "@ down_op_ret\n" \
166" mrs ip, cpsr\n" \
167" orr lr, ip, #128\n" \
168" msr cpsr_c, lr\n" \
169" ldr lr, [%1]\n" \
170" subs lr, lr, %2\n" \
171" str lr, [%1]\n" \
172" msr cpsr_c, ip\n" \
173" movmi ip, %1\n" \
174" movpl ip, #0\n" \
175" blmi " #fail "\n" \
176" mov %0, ip" \
177 : "=&r" (ret) \
178 : "r" (ptr), "I" (1) \
179 : "ip", "lr", "cc"); \
180 smp_mb(); \
181 ret; \
182 })
183
184#define __up_op(ptr,wake) \
185 ({ \
186 smp_mb(); \
187 __asm__ __volatile__( \
188 "@ up_op\n" \
189" mrs ip, cpsr\n" \
190" orr lr, ip, #128\n" \
191" msr cpsr_c, lr\n" \
192" ldr lr, [%0]\n" \
193" adds lr, lr, %1\n" \
194" str lr, [%0]\n" \
195" msr cpsr_c, ip\n" \
196" movle ip, %0\n" \
197" blle " #wake \
198 : \
199 : "r" (ptr), "I" (1) \
200 : "ip", "lr", "cc"); \
201 })
202
203/*
204 * The value 0x01000000 supports up to 128 processors and
205 * lots of processes. BIAS must be chosen such that sub'ing
206 * BIAS once per CPU will result in the long remaining
207 * negative.
208 */
209#define RW_LOCK_BIAS 0x01000000
210#define RW_LOCK_BIAS_STR "0x01000000"
211
212#define __down_op_write(ptr,fail) \
213 ({ \
214 __asm__ __volatile__( \
215 "@ down_op_write\n" \
216" mrs ip, cpsr\n" \
217" orr lr, ip, #128\n" \
218" msr cpsr_c, lr\n" \
219" ldr lr, [%0]\n" \
220" subs lr, lr, %1\n" \
221" str lr, [%0]\n" \
222" msr cpsr_c, ip\n" \
223" movne ip, %0\n" \
224" blne " #fail \
225 : \
226 : "r" (ptr), "I" (RW_LOCK_BIAS) \
227 : "ip", "lr", "cc"); \
228 smp_mb(); \
229 })
230
231#define __up_op_write(ptr,wake) \
232 ({ \
233 __asm__ __volatile__( \
234 "@ up_op_write\n" \
235" mrs ip, cpsr\n" \
236" orr lr, ip, #128\n" \
237" msr cpsr_c, lr\n" \
238" ldr lr, [%0]\n" \
239" adds lr, lr, %1\n" \
240" str lr, [%0]\n" \
241" msr cpsr_c, ip\n" \
242" movcs ip, %0\n" \
243" blcs " #wake \
244 : \
245 : "r" (ptr), "I" (RW_LOCK_BIAS) \
246 : "ip", "lr", "cc"); \
247 smp_mb(); \
248 })
249
250#define __down_op_read(ptr,fail) \
251 __down_op(ptr, fail)
252
253#define __up_op_read(ptr,wake) \
254 ({ \
255 smp_mb(); \
256 __asm__ __volatile__( \
257 "@ up_op_read\n" \
258" mrs ip, cpsr\n" \
259" orr lr, ip, #128\n" \
260" msr cpsr_c, lr\n" \
261" ldr lr, [%0]\n" \
262" adds lr, lr, %1\n" \
263" str lr, [%0]\n" \
264" msr cpsr_c, ip\n" \
265" moveq ip, %0\n" \
266" bleq " #wake \
267 : \
268 : "r" (ptr), "I" (1) \
269 : "ip", "lr", "cc"); \
270 })
271
272#endif
273
274#endif
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
deleted file mode 100644
index bcc8aed7c9a9..000000000000
--- a/include/asm-arm/mach/arch.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/arch.h
3 *
4 * Copyright (C) 2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASSEMBLY__
12
13struct tag;
14struct meminfo;
15struct sys_timer;
16
17struct machine_desc {
18 /*
19 * Note! The first four elements are used
20 * by assembler code in head.S, head-common.S
21 */
22 unsigned int nr; /* architecture number */
23 unsigned int phys_io; /* start of physical io */
24 unsigned int io_pg_offst; /* byte offset for io
25 * page tabe entry */
26
27 const char *name; /* architecture name */
28 unsigned long boot_params; /* tagged list */
29
30 unsigned int video_start; /* start of video RAM */
31 unsigned int video_end; /* end of video RAM */
32
33 unsigned int reserve_lp0 :1; /* never has lp0 */
34 unsigned int reserve_lp1 :1; /* never has lp1 */
35 unsigned int reserve_lp2 :1; /* never has lp2 */
36 unsigned int soft_reboot :1; /* soft reboot */
37 void (*fixup)(struct machine_desc *,
38 struct tag *, char **,
39 struct meminfo *);
40 void (*map_io)(void);/* IO mapping function */
41 void (*init_irq)(void);
42 struct sys_timer *timer; /* system tick timer */
43 void (*init_machine)(void);
44};
45
46/*
47 * Set of macros to define architecture features. This is built into
48 * a table by the linker.
49 */
50#define MACHINE_START(_type,_name) \
51static const struct machine_desc __mach_desc_##_type \
52 __used \
53 __attribute__((__section__(".arch.info.init"))) = { \
54 .nr = MACH_TYPE_##_type, \
55 .name = _name,
56
57#define MACHINE_END \
58};
59
60#endif
diff --git a/include/asm-arm/mach/dma.h b/include/asm-arm/mach/dma.h
deleted file mode 100644
index e7c4a20aad53..000000000000
--- a/include/asm-arm/mach/dma.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/dma.h
3 *
4 * Copyright (C) 1998-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This header file describes the interface between the generic DMA handler
11 * (dma.c) and the architecture-specific DMA backends (dma-*.c)
12 */
13
14struct dma_struct;
15typedef struct dma_struct dma_t;
16
17struct dma_ops {
18 int (*request)(dmach_t, dma_t *); /* optional */
19 void (*free)(dmach_t, dma_t *); /* optional */
20 void (*enable)(dmach_t, dma_t *); /* mandatory */
21 void (*disable)(dmach_t, dma_t *); /* mandatory */
22 int (*residue)(dmach_t, dma_t *); /* optional */
23 int (*setspeed)(dmach_t, dma_t *, int); /* optional */
24 char *type;
25};
26
27struct dma_struct {
28 void *addr; /* single DMA address */
29 unsigned long count; /* single DMA size */
30 struct scatterlist buf; /* single DMA */
31 int sgcount; /* number of DMA SG */
32 struct scatterlist *sg; /* DMA Scatter-Gather List */
33
34 unsigned int active:1; /* Transfer active */
35 unsigned int invalid:1; /* Address/Count changed */
36
37 dmamode_t dma_mode; /* DMA mode */
38 int speed; /* DMA speed */
39
40 unsigned int lock; /* Device is allocated */
41 const char *device_id; /* Device name */
42
43 unsigned int dma_base; /* Controller base address */
44 int dma_irq; /* Controller IRQ */
45 struct scatterlist cur_sg; /* Current controller buffer */
46 unsigned int state;
47
48 struct dma_ops *d_ops;
49};
50
51/* Prototype: void arch_dma_init(dma)
52 * Purpose : Initialise architecture specific DMA
53 * Params : dma - pointer to array of DMA structures
54 */
55extern void arch_dma_init(dma_t *dma);
56
57extern void isa_init_dma(dma_t *dma);
diff --git a/include/asm-arm/mach/flash.h b/include/asm-arm/mach/flash.h
deleted file mode 100644
index 05b029ef6371..000000000000
--- a/include/asm-arm/mach/flash.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/flash.h
3 *
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef ASMARM_MACH_FLASH_H
11#define ASMARM_MACH_FLASH_H
12
13struct mtd_partition;
14struct mtd_info;
15
16/*
17 * map_name: the map probe function name
18 * name: flash device name (eg, as used with mtdparts=)
19 * width: width of mapped device
20 * init: method called at driver/device initialisation
21 * exit: method called at driver/device removal
22 * set_vpp: method called to enable or disable VPP
23 * mmcontrol: method called to enable or disable Sync. Burst Read in OneNAND
24 * parts: optional array of mtd_partitions for static partitioning
25 * nr_parts: number of mtd_partitions for static partitoning
26 */
27struct flash_platform_data {
28 const char *map_name;
29 const char *name;
30 unsigned int width;
31 int (*init)(void);
32 void (*exit)(void);
33 void (*set_vpp)(int on);
34 void (*mmcontrol)(struct mtd_info *mtd, int sync_read);
35 struct mtd_partition *parts;
36 unsigned int nr_parts;
37};
38
39#endif
diff --git a/include/asm-arm/mach/irda.h b/include/asm-arm/mach/irda.h
deleted file mode 100644
index 58984d9c0b0b..000000000000
--- a/include/asm-arm/mach/irda.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/irda.h
3 *
4 * Copyright (C) 2004 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_MACH_IRDA_H
11#define __ASM_ARM_MACH_IRDA_H
12
13struct irda_platform_data {
14 int (*startup)(struct device *);
15 void (*shutdown)(struct device *);
16 int (*set_power)(struct device *, unsigned int state);
17 void (*set_speed)(struct device *, unsigned int speed);
18};
19
20#endif
diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h
deleted file mode 100644
index eb0bfba6570d..000000000000
--- a/include/asm-arm/mach/irq.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/irq.h
3 *
4 * Copyright (C) 1995-2000 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_MACH_IRQ_H
11#define __ASM_ARM_MACH_IRQ_H
12
13#include <linux/irq.h>
14
15struct seq_file;
16
17/*
18 * This is internal. Do not use it.
19 */
20extern void (*init_arch_irq)(void);
21extern void init_FIQ(void);
22extern int show_fiq_list(struct seq_file *, void *);
23
24/*
25 * Obsolete inline function for calling irq descriptor handlers.
26 */
27static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc)
28{
29 desc->handle_irq(irq, desc);
30}
31
32void set_irq_flags(unsigned int irq, unsigned int flags);
33
34#define IRQF_VALID (1 << 0)
35#define IRQF_PROBE (1 << 1)
36#define IRQF_NOAUTOEN (1 << 2)
37
38/*
39 * This is for easy migration, but should be changed in the source
40 */
41#define do_bad_IRQ(irq,desc) \
42do { \
43 spin_lock(&desc->lock); \
44 handle_bad_irq(irq, desc); \
45 spin_unlock(&desc->lock); \
46} while(0)
47
48extern unsigned long irq_err_count;
49static inline void ack_bad_irq(int irq)
50{
51 irq_err_count++;
52}
53
54#endif
diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h
deleted file mode 100644
index 7ef3c8390180..000000000000
--- a/include/asm-arm/mach/map.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * linux/include/asm-arm/map.h
3 *
4 * Copyright (C) 1999-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Page table mapping constructs and function prototypes
11 */
12#include <asm/io.h>
13
14struct map_desc {
15 unsigned long virtual;
16 unsigned long pfn;
17 unsigned long length;
18 unsigned int type;
19};
20
21/* types 0-3 are defined in asm/io.h */
22#define MT_CACHECLEAN 4
23#define MT_MINICLEAN 5
24#define MT_LOW_VECTORS 6
25#define MT_HIGH_VECTORS 7
26#define MT_MEMORY 8
27#define MT_ROM 9
28
29#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED
30#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000
31
32#ifdef CONFIG_MMU
33extern void iotable_init(struct map_desc *, int);
34#else
35#define iotable_init(map,num) do { } while (0)
36#endif
diff --git a/include/asm-arm/mach/mmc.h b/include/asm-arm/mach/mmc.h
deleted file mode 100644
index eb91145c00c4..000000000000
--- a/include/asm-arm/mach/mmc.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/mmc.h
3 */
4#ifndef ASMARM_MACH_MMC_H
5#define ASMARM_MACH_MMC_H
6
7#include <linux/mmc/host.h>
8
9struct mmc_platform_data {
10 unsigned int ocr_mask; /* available voltages */
11 u32 (*translate_vdd)(struct device *, unsigned int);
12 unsigned int (*status)(struct device *);
13};
14
15#endif
diff --git a/include/asm-arm/mach/pci.h b/include/asm-arm/mach/pci.h
deleted file mode 100644
index 9d4f6b5ea419..000000000000
--- a/include/asm-arm/mach/pci.h
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/pci.h
3 *
4 * Copyright (C) 2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11struct pci_sys_data;
12struct pci_bus;
13
14struct hw_pci {
15 struct list_head buses;
16 int nr_controllers;
17 int (*setup)(int nr, struct pci_sys_data *);
18 struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
19 void (*preinit)(void);
20 void (*postinit)(void);
21 u8 (*swizzle)(struct pci_dev *dev, u8 *pin);
22 int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin);
23};
24
25/*
26 * Per-controller structure
27 */
28struct pci_sys_data {
29 struct list_head node;
30 int busnr; /* primary bus number */
31 u64 mem_offset; /* bus->cpu memory mapping offset */
32 unsigned long io_offset; /* bus->cpu IO mapping offset */
33 struct pci_bus *bus; /* PCI bus */
34 struct resource *resource[3]; /* Primary PCI bus resources */
35 /* Bridge swizzling */
36 u8 (*swizzle)(struct pci_dev *, u8 *);
37 /* IRQ mapping */
38 int (*map_irq)(struct pci_dev *, u8, u8);
39 struct hw_pci *hw;
40};
41
42/*
43 * This is the standard PCI-PCI bridge swizzling algorithm.
44 */
45u8 pci_std_swizzle(struct pci_dev *dev, u8 *pinp);
46
47/*
48 * Call this with your hw_pci struct to initialise the PCI system.
49 */
50void pci_common_init(struct hw_pci *);
51
52/*
53 * PCI controllers
54 */
55extern int iop3xx_pci_setup(int nr, struct pci_sys_data *);
56extern struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *);
57extern void iop3xx_pci_preinit(void);
58extern void iop3xx_pci_preinit_cond(void);
59
60extern int dc21285_setup(int nr, struct pci_sys_data *);
61extern struct pci_bus *dc21285_scan_bus(int nr, struct pci_sys_data *);
62extern void dc21285_preinit(void);
63extern void dc21285_postinit(void);
64
65extern int via82c505_setup(int nr, struct pci_sys_data *);
66extern struct pci_bus *via82c505_scan_bus(int nr, struct pci_sys_data *);
67extern void via82c505_init(void *sysdata);
68
69extern int pci_v3_setup(int nr, struct pci_sys_data *);
70extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *);
71extern void pci_v3_preinit(void);
72extern void pci_v3_postinit(void);
diff --git a/include/asm-arm/mach/serial_at91.h b/include/asm-arm/mach/serial_at91.h
deleted file mode 100644
index 55b317a89061..000000000000
--- a/include/asm-arm/mach/serial_at91.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/serial_at91.h
3 *
4 * Based on serial_sa1100.h by Nicolas Pitre
5 *
6 * Copyright (C) 2002 ATMEL Rousset
7 *
8 * Low level machine dependent UART functions.
9 */
10
11struct uart_port;
12
13/*
14 * This is a temporary structure for registering these
15 * functions; it is intended to be discarded after boot.
16 */
17struct atmel_port_fns {
18 void (*set_mctrl)(struct uart_port *, u_int);
19 u_int (*get_mctrl)(struct uart_port *);
20 void (*enable_ms)(struct uart_port *);
21 void (*pm)(struct uart_port *, u_int, u_int);
22 int (*set_wake)(struct uart_port *, u_int);
23 int (*open)(struct uart_port *);
24 void (*close)(struct uart_port *);
25};
26
27#if defined(CONFIG_SERIAL_ATMEL)
28void atmel_register_uart_fns(struct atmel_port_fns *fns);
29#else
30#define atmel_register_uart_fns(fns) do { } while (0)
31#endif
32
33
diff --git a/include/asm-arm/mach/serial_sa1100.h b/include/asm-arm/mach/serial_sa1100.h
deleted file mode 100644
index 20c22bb218d9..000000000000
--- a/include/asm-arm/mach/serial_sa1100.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/serial_sa1100.h
3 *
4 * Author: Nicolas Pitre
5 *
6 * Moved to include/asm-arm/mach and changed lots, Russell King
7 *
8 * Low level machine dependent UART functions.
9 */
10
11struct uart_port;
12struct uart_info;
13
14/*
15 * This is a temporary structure for registering these
16 * functions; it is intended to be discarded after boot.
17 */
18struct sa1100_port_fns {
19 void (*set_mctrl)(struct uart_port *, u_int);
20 u_int (*get_mctrl)(struct uart_port *);
21 void (*pm)(struct uart_port *, u_int, u_int);
22 int (*set_wake)(struct uart_port *, u_int);
23};
24
25#ifdef CONFIG_SERIAL_SA1100
26void sa1100_register_uart_fns(struct sa1100_port_fns *fns);
27void sa1100_register_uart(int idx, int port);
28#else
29#define sa1100_register_uart_fns(fns) do { } while (0)
30#define sa1100_register_uart(idx,port) do { } while (0)
31#endif
diff --git a/include/asm-arm/mach/sharpsl_param.h b/include/asm-arm/mach/sharpsl_param.h
deleted file mode 100644
index 7a24ecf04220..000000000000
--- a/include/asm-arm/mach/sharpsl_param.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * Hardware parameter area specific to Sharp SL series devices
3 *
4 * Copyright (c) 2005 Richard Purdie
5 *
6 * Based on Sharp's 2.4 kernel patches
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14struct sharpsl_param_info {
15 unsigned int comadj_keyword;
16 unsigned int comadj;
17
18 unsigned int uuid_keyword;
19 unsigned char uuid[16];
20
21 unsigned int touch_keyword;
22 unsigned int touch_xp;
23 unsigned int touch_yp;
24 unsigned int touch_xd;
25 unsigned int touch_yd;
26
27 unsigned int adadj_keyword;
28 unsigned int adadj;
29
30 unsigned int phad_keyword;
31 unsigned int phadadj;
32} __attribute__((packed));
33
34
35extern struct sharpsl_param_info sharpsl_param;
36extern void sharpsl_save_param(void);
37
diff --git a/include/asm-arm/mach/time.h b/include/asm-arm/mach/time.h
deleted file mode 100644
index 2fd36ea0130d..000000000000
--- a/include/asm-arm/mach/time.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/time.h
3 *
4 * Copyright (C) 2004 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_MACH_TIME_H
11#define __ASM_ARM_MACH_TIME_H
12
13#include <linux/sysdev.h>
14
15/*
16 * This is our kernel timer structure.
17 *
18 * - init
19 * Initialise the kernels jiffy timer source, claim interrupt
20 * using setup_irq. This is called early on during initialisation
21 * while interrupts are still disabled on the local CPU.
22 * - suspend
23 * Suspend the kernel jiffy timer source, if necessary. This
24 * is called with interrupts disabled, after all normal devices
25 * have been suspended. If no action is required, set this to
26 * NULL.
27 * - resume
28 * Resume the kernel jiffy timer source, if necessary. This
29 * is called with interrupts disabled before any normal devices
30 * are resumed. If no action is required, set this to NULL.
31 * - offset
32 * Return the timer offset in microseconds since the last timer
33 * interrupt. Note: this must take account of any unprocessed
34 * timer interrupt which may be pending.
35 */
36struct sys_timer {
37 struct sys_device dev;
38 void (*init)(void);
39 void (*suspend)(void);
40 void (*resume)(void);
41#ifndef CONFIG_GENERIC_TIME
42 unsigned long (*offset)(void);
43#endif
44};
45
46extern struct sys_timer *system_timer;
47extern void timer_tick(void);
48
49/*
50 * Kernel time keeping support.
51 */
52struct timespec;
53extern int (*set_rtc)(void);
54extern void save_time_delta(struct timespec *delta, struct timespec *rtc);
55extern void restore_time_delta(struct timespec *delta, struct timespec *rtc);
56
57#endif
diff --git a/include/asm-arm/mach/udc_pxa2xx.h b/include/asm-arm/mach/udc_pxa2xx.h
deleted file mode 100644
index 9e5ed7c0f27f..000000000000
--- a/include/asm-arm/mach/udc_pxa2xx.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * linux/include/asm-arm/mach/udc_pxa2xx.h
3 *
4 * This supports machine-specific differences in how the PXA2xx
5 * USB Device Controller (UDC) is wired.
6 *
7 * It is set in linux/arch/arm/mach-pxa/<machine>.c or in
8 * linux/arch/mach-ixp4xx/<machine>.c and used in
9 * the probe routine of linux/drivers/usb/gadget/pxa2xx_udc.c
10 */
11
12struct pxa2xx_udc_mach_info {
13 int (*udc_is_connected)(void); /* do we see host? */
14 void (*udc_command)(int cmd);
15#define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */
16#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */
17
18 /* Boards following the design guidelines in the developer's manual,
19 * with on-chip GPIOs not Lubbock's weird hardware, can have a sane
20 * VBUS IRQ and omit the methods above. Store the GPIO number
21 * here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits.
22 * Note that sometimes the signals go through inverters...
23 */
24 bool gpio_vbus_inverted;
25 u16 gpio_vbus; /* high == vbus present */
26 bool gpio_pullup_inverted;
27 u16 gpio_pullup; /* high == pullup activated */
28};
29
diff --git a/include/asm-arm/mc146818rtc.h b/include/asm-arm/mc146818rtc.h
deleted file mode 100644
index 7b81e0c42543..000000000000
--- a/include/asm-arm/mc146818rtc.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H
6
7#include <asm/arch/irqs.h>
8#include <asm/io.h>
9
10#ifndef RTC_PORT
11#define RTC_PORT(x) (0x70 + (x))
12#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
13#endif
14
15/*
16 * The yet supported machines all access the RTC index register via
17 * an ISA port access but the way to access the date register differs ...
18 */
19#define CMOS_READ(addr) ({ \
20outb_p((addr),RTC_PORT(0)); \
21inb_p(RTC_PORT(1)); \
22})
23#define CMOS_WRITE(val, addr) ({ \
24outb_p((addr),RTC_PORT(0)); \
25outb_p((val),RTC_PORT(1)); \
26})
27
28#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h
deleted file mode 100644
index 9ba4d7136e6b..000000000000
--- a/include/asm-arm/memory.h
+++ /dev/null
@@ -1,334 +0,0 @@
1/*
2 * linux/include/asm-arm/memory.h
3 *
4 * Copyright (C) 2000-2002 Russell King
5 * modification for nommu, Hyok S. Choi, 2004
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Note: this file should not be included by non-asm/.h files
12 */
13#ifndef __ASM_ARM_MEMORY_H
14#define __ASM_ARM_MEMORY_H
15
16/*
17 * Allow for constants defined here to be used from assembly code
18 * by prepending the UL suffix only with actual C code compilation.
19 */
20#ifndef __ASSEMBLY__
21#define UL(x) (x##UL)
22#else
23#define UL(x) (x)
24#endif
25
26#include <linux/compiler.h>
27#include <asm/arch/memory.h>
28#include <asm/sizes.h>
29
30#ifdef CONFIG_MMU
31
32#ifndef TASK_SIZE
33/*
34 * TASK_SIZE - the maximum size of a user space task.
35 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area
36 */
37#define TASK_SIZE UL(0xbf000000)
38#define TASK_UNMAPPED_BASE UL(0x40000000)
39#endif
40
41/*
42 * The maximum size of a 26-bit user space task.
43 */
44#define TASK_SIZE_26 UL(0x04000000)
45
46/*
47 * Page offset: 3GB
48 */
49#ifndef PAGE_OFFSET
50#define PAGE_OFFSET UL(0xc0000000)
51#endif
52
53/*
54 * The module space lives between the addresses given by TASK_SIZE
55 * and PAGE_OFFSET - it must be within 32MB of the kernel text.
56 */
57#define MODULE_END (PAGE_OFFSET)
58#define MODULE_START (MODULE_END - 16*1048576)
59
60#if TASK_SIZE > MODULE_START
61#error Top of user space clashes with start of module space
62#endif
63
64/*
65 * The XIP kernel gets mapped at the bottom of the module vm area.
66 * Since we use sections to map it, this macro replaces the physical address
67 * with its virtual address while keeping offset from the base section.
68 */
69#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff))
70
71/*
72 * Allow 16MB-aligned ioremap pages
73 */
74#define IOREMAP_MAX_ORDER 24
75
76#else /* CONFIG_MMU */
77
78/*
79 * The limitation of user task size can grow up to the end of free ram region.
80 * It is difficult to define and perhaps will never meet the original meaning
81 * of this define that was meant to.
82 * Fortunately, there is no reference for this in noMMU mode, for now.
83 */
84#ifndef TASK_SIZE
85#define TASK_SIZE (CONFIG_DRAM_SIZE)
86#endif
87
88#ifndef TASK_UNMAPPED_BASE
89#define TASK_UNMAPPED_BASE UL(0x00000000)
90#endif
91
92#ifndef PHYS_OFFSET
93#define PHYS_OFFSET (CONFIG_DRAM_BASE)
94#endif
95
96#ifndef END_MEM
97#define END_MEM (CONFIG_DRAM_BASE + CONFIG_DRAM_SIZE)
98#endif
99
100#ifndef PAGE_OFFSET
101#define PAGE_OFFSET (PHYS_OFFSET)
102#endif
103
104/*
105 * The module can be at any place in ram in nommu mode.
106 */
107#define MODULE_END (END_MEM)
108#define MODULE_START (PHYS_OFFSET)
109
110#endif /* !CONFIG_MMU */
111
112/*
113 * Size of DMA-consistent memory region. Must be multiple of 2M,
114 * between 2MB and 14MB inclusive.
115 */
116#ifndef CONSISTENT_DMA_SIZE
117#define CONSISTENT_DMA_SIZE SZ_2M
118#endif
119
120/*
121 * Physical vs virtual RAM address space conversion. These are
122 * private definitions which should NOT be used outside memory.h
123 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
124 */
125#ifndef __virt_to_phys
126#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
127#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
128#endif
129
130/*
131 * Convert a physical address to a Page Frame Number and back
132 */
133#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT)
134#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT)
135
136#ifndef __ASSEMBLY__
137
138/*
139 * The DMA mask corresponding to the maximum bus address allocatable
140 * using GFP_DMA. The default here places no restriction on DMA
141 * allocations. This must be the smallest DMA mask in the system,
142 * so a successful GFP_DMA allocation will always satisfy this.
143 */
144#ifndef ISA_DMA_THRESHOLD
145#define ISA_DMA_THRESHOLD (0xffffffffULL)
146#endif
147
148#ifndef arch_adjust_zones
149#define arch_adjust_zones(node,size,holes) do { } while (0)
150#endif
151
152/*
153 * PFNs are used to describe any physical page; this means
154 * PFN 0 == physical address 0.
155 *
156 * This is the PFN of the first RAM page in the kernel
157 * direct-mapped view. We assume this is the first page
158 * of RAM in the mem_map as well.
159 */
160#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
161
162/*
163 * These are *only* valid on the kernel direct mapped RAM memory.
164 * Note: Drivers should NOT use these. They are the wrong
165 * translation for translating DMA addresses. Use the driver
166 * DMA support - see dma-mapping.h.
167 */
168static inline unsigned long virt_to_phys(void *x)
169{
170 return __virt_to_phys((unsigned long)(x));
171}
172
173static inline void *phys_to_virt(unsigned long x)
174{
175 return (void *)(__phys_to_virt((unsigned long)(x)));
176}
177
178/*
179 * Drivers should NOT use these either.
180 */
181#define __pa(x) __virt_to_phys((unsigned long)(x))
182#define __va(x) ((void *)__phys_to_virt((unsigned long)(x)))
183#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
184
185/*
186 * Virtual <-> DMA view memory address translations
187 * Again, these are *only* valid on the kernel direct mapped RAM
188 * memory. Use of these is *deprecated* (and that doesn't mean
189 * use the __ prefixed forms instead.) See dma-mapping.h.
190 */
191static inline __deprecated unsigned long virt_to_bus(void *x)
192{
193 return __virt_to_bus((unsigned long)x);
194}
195
196static inline __deprecated void *bus_to_virt(unsigned long x)
197{
198 return (void *)__bus_to_virt(x);
199}
200
201/*
202 * Conversion between a struct page and a physical address.
203 *
204 * Note: when converting an unknown physical address to a
205 * struct page, the resulting pointer must be validated
206 * using VALID_PAGE(). It must return an invalid struct page
207 * for any physical address not corresponding to a system
208 * RAM address.
209 *
210 * page_to_pfn(page) convert a struct page * to a PFN number
211 * pfn_to_page(pfn) convert a _valid_ PFN number to struct page *
212 * pfn_valid(pfn) indicates whether a PFN number is valid
213 *
214 * virt_to_page(k) convert a _valid_ virtual address to struct page *
215 * virt_addr_valid(k) indicates whether a virtual address is valid
216 */
217#ifndef CONFIG_DISCONTIGMEM
218
219#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
220
221#ifndef CONFIG_SPARSEMEM
222#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
223#endif
224
225#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
226#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
227
228#define PHYS_TO_NID(addr) (0)
229
230#else /* CONFIG_DISCONTIGMEM */
231
232/*
233 * This is more complex. We have a set of mem_map arrays spread
234 * around in memory.
235 */
236#include <linux/numa.h>
237
238#define arch_pfn_to_nid(pfn) PFN_TO_NID(pfn)
239#define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT)
240
241#define pfn_valid(pfn) \
242 ({ \
243 unsigned int nid = PFN_TO_NID(pfn); \
244 int valid = nid < MAX_NUMNODES; \
245 if (valid) { \
246 pg_data_t *node = NODE_DATA(nid); \
247 valid = (pfn - node->node_start_pfn) < \
248 node->node_spanned_pages; \
249 } \
250 valid; \
251 })
252
253#define virt_to_page(kaddr) \
254 (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr))
255
256#define virt_addr_valid(kaddr) (KVADDR_TO_NID(kaddr) < MAX_NUMNODES)
257
258/*
259 * Common discontigmem stuff.
260 * PHYS_TO_NID is used by the ARM kernel/setup.c
261 */
262#define PHYS_TO_NID(addr) PFN_TO_NID((addr) >> PAGE_SHIFT)
263
264/*
265 * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
266 * and returns the mem_map of that node.
267 */
268#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr))
269
270/*
271 * Given a page frame number, find the owning node of the memory
272 * and returns the mem_map of that node.
273 */
274#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn))
275
276#ifdef NODE_MEM_SIZE_BITS
277#define NODE_MEM_SIZE_MASK ((1 << NODE_MEM_SIZE_BITS) - 1)
278
279/*
280 * Given a kernel address, find the home node of the underlying memory.
281 */
282#define KVADDR_TO_NID(addr) \
283 (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MEM_SIZE_BITS)
284
285/*
286 * Given a page frame number, convert it to a node id.
287 */
288#define PFN_TO_NID(pfn) \
289 (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MEM_SIZE_BITS - PAGE_SHIFT))
290
291/*
292 * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
293 * and returns the index corresponding to the appropriate page in the
294 * node's mem_map.
295 */
296#define LOCAL_MAP_NR(addr) \
297 (((unsigned long)(addr) & NODE_MEM_SIZE_MASK) >> PAGE_SHIFT)
298
299#endif /* NODE_MEM_SIZE_BITS */
300
301#endif /* !CONFIG_DISCONTIGMEM */
302
303/*
304 * For BIO. "will die". Kill me when bio_to_phys() and bvec_to_phys() die.
305 */
306#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
307
308/*
309 * Optional device DMA address remapping. Do _not_ use directly!
310 * We should really eliminate virt_to_bus() here - it's deprecated.
311 */
312#ifndef __arch_page_to_dma
313#define page_to_dma(dev, page) ((dma_addr_t)__virt_to_bus((unsigned long)page_address(page)))
314#define dma_to_virt(dev, addr) ((void *)__bus_to_virt(addr))
315#define virt_to_dma(dev, addr) ((dma_addr_t)__virt_to_bus((unsigned long)(addr)))
316#else
317#define page_to_dma(dev, page) (__arch_page_to_dma(dev, page))
318#define dma_to_virt(dev, addr) (__arch_dma_to_virt(dev, addr))
319#define virt_to_dma(dev, addr) (__arch_virt_to_dma(dev, addr))
320#endif
321
322/*
323 * Optional coherency support. Currently used only by selected
324 * Intel XSC3-based systems.
325 */
326#ifndef arch_is_coherent
327#define arch_is_coherent() 0
328#endif
329
330#endif
331
332#include <asm-generic/memory_model.h>
333
334#endif
diff --git a/include/asm-arm/mman.h b/include/asm-arm/mman.h
deleted file mode 100644
index 54570d2e95b7..000000000000
--- a/include/asm-arm/mman.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __ARM_MMAN_H__
2#define __ARM_MMAN_H__
3
4#include <asm-generic/mman.h>
5
6#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
7#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
8#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
9#define MAP_LOCKED 0x2000 /* pages are locked */
10#define MAP_NORESERVE 0x4000 /* don't check for reservations */
11#define MAP_POPULATE 0x8000 /* populate (prefault) page tables */
12#define MAP_NONBLOCK 0x10000 /* do not block on IO */
13
14#define MCL_CURRENT 1 /* lock all current mappings */
15#define MCL_FUTURE 2 /* lock all future mappings */
16
17#endif /* __ARM_MMAN_H__ */
diff --git a/include/asm-arm/mmu.h b/include/asm-arm/mmu.h
deleted file mode 100644
index 53099d4ee421..000000000000
--- a/include/asm-arm/mmu.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#ifndef __ARM_MMU_H
2#define __ARM_MMU_H
3
4#ifdef CONFIG_MMU
5
6typedef struct {
7#ifdef CONFIG_CPU_HAS_ASID
8 unsigned int id;
9#endif
10 unsigned int kvm_seq;
11} mm_context_t;
12
13#ifdef CONFIG_CPU_HAS_ASID
14#define ASID(mm) ((mm)->context.id & 255)
15#else
16#define ASID(mm) (0)
17#endif
18
19#else
20
21/*
22 * From nommu.h:
23 * Copyright (C) 2002, David McCullough <davidm@snapgear.com>
24 * modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com>
25 */
26typedef struct {
27 struct vm_list_struct *vmlist;
28 unsigned long end_brk;
29} mm_context_t;
30
31#endif
32
33#endif
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
deleted file mode 100644
index 91b9dfdfed52..000000000000
--- a/include/asm-arm/mmu_context.h
+++ /dev/null
@@ -1,117 +0,0 @@
1/*
2 * linux/include/asm-arm/mmu_context.h
3 *
4 * Copyright (C) 1996 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 27-06-1996 RMK Created
12 */
13#ifndef __ASM_ARM_MMU_CONTEXT_H
14#define __ASM_ARM_MMU_CONTEXT_H
15
16#include <linux/compiler.h>
17#include <asm/cacheflush.h>
18#include <asm/proc-fns.h>
19#include <asm-generic/mm_hooks.h>
20
21void __check_kvm_seq(struct mm_struct *mm);
22
23#ifdef CONFIG_CPU_HAS_ASID
24
25/*
26 * On ARMv6, we have the following structure in the Context ID:
27 *
28 * 31 7 0
29 * +-------------------------+-----------+
30 * | process ID | ASID |
31 * +-------------------------+-----------+
32 * | context ID |
33 * +-------------------------------------+
34 *
35 * The ASID is used to tag entries in the CPU caches and TLBs.
36 * The context ID is used by debuggers and trace logic, and
37 * should be unique within all running processes.
38 */
39#define ASID_BITS 8
40#define ASID_MASK ((~0) << ASID_BITS)
41#define ASID_FIRST_VERSION (1 << ASID_BITS)
42
43extern unsigned int cpu_last_asid;
44
45void __init_new_context(struct task_struct *tsk, struct mm_struct *mm);
46void __new_context(struct mm_struct *mm);
47
48static inline void check_context(struct mm_struct *mm)
49{
50 if (unlikely((mm->context.id ^ cpu_last_asid) >> ASID_BITS))
51 __new_context(mm);
52
53 if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq))
54 __check_kvm_seq(mm);
55}
56
57#define init_new_context(tsk,mm) (__init_new_context(tsk,mm),0)
58
59#else
60
61static inline void check_context(struct mm_struct *mm)
62{
63 if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq))
64 __check_kvm_seq(mm);
65}
66
67#define init_new_context(tsk,mm) 0
68
69#endif
70
71#define destroy_context(mm) do { } while(0)
72
73/*
74 * This is called when "tsk" is about to enter lazy TLB mode.
75 *
76 * mm: describes the currently active mm context
77 * tsk: task which is entering lazy tlb
78 * cpu: cpu number which is entering lazy tlb
79 *
80 * tsk->mm will be NULL
81 */
82static inline void
83enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
84{
85}
86
87/*
88 * This is the actual mm switch as far as the scheduler
89 * is concerned. No registers are touched. We avoid
90 * calling the CPU specific function when the mm hasn't
91 * actually changed.
92 */
93static inline void
94switch_mm(struct mm_struct *prev, struct mm_struct *next,
95 struct task_struct *tsk)
96{
97#ifdef CONFIG_MMU
98 unsigned int cpu = smp_processor_id();
99
100#ifdef CONFIG_SMP
101 /* check for possible thread migration */
102 if (!cpus_empty(next->cpu_vm_mask) && !cpu_isset(cpu, next->cpu_vm_mask))
103 __flush_icache_all();
104#endif
105 if (!cpu_test_and_set(cpu, next->cpu_vm_mask) || prev != next) {
106 check_context(next);
107 cpu_switch_mm(next->pgd, next);
108 if (cache_is_vivt())
109 cpu_clear(cpu, prev->cpu_vm_mask);
110 }
111#endif
112}
113
114#define deactivate_mm(tsk,mm) do { } while (0)
115#define activate_mm(prev,next) switch_mm(prev, next, NULL)
116
117#endif
diff --git a/include/asm-arm/mmzone.h b/include/asm-arm/mmzone.h
deleted file mode 100644
index b87de151f0a4..000000000000
--- a/include/asm-arm/mmzone.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * linux/include/asm-arm/mmzone.h
3 *
4 * 1999-12-29 Nicolas Pitre Created
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_MMZONE_H
11#define __ASM_MMZONE_H
12
13/*
14 * Currently defined in arch/arm/mm/discontig.c
15 */
16extern pg_data_t discontig_node_data[];
17
18/*
19 * Return a pointer to the node data for node n.
20 */
21#define NODE_DATA(nid) (&discontig_node_data[nid])
22
23/*
24 * NODE_MEM_MAP gives the kaddr for the mem_map of the node.
25 */
26#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map)
27
28#include <asm/arch/memory.h>
29
30#endif
diff --git a/include/asm-arm/module.h b/include/asm-arm/module.h
deleted file mode 100644
index 24b168dc31a3..000000000000
--- a/include/asm-arm/module.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef _ASM_ARM_MODULE_H
2#define _ASM_ARM_MODULE_H
3
4struct mod_arch_specific
5{
6 int foo;
7};
8
9#define Elf_Shdr Elf32_Shdr
10#define Elf_Sym Elf32_Sym
11#define Elf_Ehdr Elf32_Ehdr
12
13/*
14 * Include the ARM architecture version.
15 */
16#define MODULE_ARCH_VERMAGIC "ARMv" __stringify(__LINUX_ARM_ARCH__) " "
17
18#endif /* _ASM_ARM_MODULE_H */
diff --git a/include/asm-arm/msgbuf.h b/include/asm-arm/msgbuf.h
deleted file mode 100644
index 33b35b946eaa..000000000000
--- a/include/asm-arm/msgbuf.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _ASMARM_MSGBUF_H
2#define _ASMARM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASMARM_MSGBUF_H */
diff --git a/include/asm-arm/mtd-xip.h b/include/asm-arm/mtd-xip.h
deleted file mode 100644
index 9eb127cc7db2..000000000000
--- a/include/asm-arm/mtd-xip.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * MTD primitives for XIP support. Architecture specific functions
3 *
4 * Do not include this file directly. It's included from linux/mtd/xip.h
5 *
6 * Author: Nicolas Pitre
7 * Created: Nov 2, 2004
8 * Copyright: (C) 2004 MontaVista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $
15 */
16
17#ifndef __ARM_MTD_XIP_H__
18#define __ARM_MTD_XIP_H__
19
20#include <asm/hardware.h>
21#include <asm/arch/mtd-xip.h>
22
23/* fill instruction prefetch */
24#define xip_iprefetch() do { asm volatile (".rep 8; nop; .endr"); } while (0)
25
26#endif /* __ARM_MTD_XIP_H__ */
diff --git a/include/asm-arm/mutex.h b/include/asm-arm/mutex.h
deleted file mode 100644
index 020bd98710a1..000000000000
--- a/include/asm-arm/mutex.h
+++ /dev/null
@@ -1,127 +0,0 @@
1/*
2 * include/asm-arm/mutex.h
3 *
4 * ARM optimized mutex locking primitives
5 *
6 * Please look into asm-generic/mutex-xchg.h for a formal definition.
7 */
8#ifndef _ASM_MUTEX_H
9#define _ASM_MUTEX_H
10
11#if __LINUX_ARM_ARCH__ < 6
12/* On pre-ARMv6 hardware the swp based implementation is the most efficient. */
13# include <asm-generic/mutex-xchg.h>
14#else
15
16/*
17 * Attempting to lock a mutex on ARMv6+ can be done with a bastardized
18 * atomic decrement (it is not a reliable atomic decrement but it satisfies
19 * the defined semantics for our purpose, while being smaller and faster
20 * than a real atomic decrement or atomic swap. The idea is to attempt
21 * decrementing the lock value only once. If once decremented it isn't zero,
22 * or if its store-back fails due to a dispute on the exclusive store, we
23 * simply bail out immediately through the slow path where the lock will be
24 * reattempted until it succeeds.
25 */
26static inline void
27__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
28{
29 int __ex_flag, __res;
30
31 __asm__ (
32
33 "ldrex %0, [%2] \n\t"
34 "sub %0, %0, #1 \n\t"
35 "strex %1, %0, [%2] "
36
37 : "=&r" (__res), "=&r" (__ex_flag)
38 : "r" (&(count)->counter)
39 : "cc","memory" );
40
41 __res |= __ex_flag;
42 if (unlikely(__res != 0))
43 fail_fn(count);
44}
45
46static inline int
47__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
48{
49 int __ex_flag, __res;
50
51 __asm__ (
52
53 "ldrex %0, [%2] \n\t"
54 "sub %0, %0, #1 \n\t"
55 "strex %1, %0, [%2] "
56
57 : "=&r" (__res), "=&r" (__ex_flag)
58 : "r" (&(count)->counter)
59 : "cc","memory" );
60
61 __res |= __ex_flag;
62 if (unlikely(__res != 0))
63 __res = fail_fn(count);
64 return __res;
65}
66
67/*
68 * Same trick is used for the unlock fast path. However the original value,
69 * rather than the result, is used to test for success in order to have
70 * better generated assembly.
71 */
72static inline void
73__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
74{
75 int __ex_flag, __res, __orig;
76
77 __asm__ (
78
79 "ldrex %0, [%3] \n\t"
80 "add %1, %0, #1 \n\t"
81 "strex %2, %1, [%3] "
82
83 : "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag)
84 : "r" (&(count)->counter)
85 : "cc","memory" );
86
87 __orig |= __ex_flag;
88 if (unlikely(__orig != 0))
89 fail_fn(count);
90}
91
92/*
93 * If the unlock was done on a contended lock, or if the unlock simply fails
94 * then the mutex remains locked.
95 */
96#define __mutex_slowpath_needs_to_unlock() 1
97
98/*
99 * For __mutex_fastpath_trylock we use another construct which could be
100 * described as a "single value cmpxchg".
101 *
102 * This provides the needed trylock semantics like cmpxchg would, but it is
103 * lighter and less generic than a true cmpxchg implementation.
104 */
105static inline int
106__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
107{
108 int __ex_flag, __res, __orig;
109
110 __asm__ (
111
112 "1: ldrex %0, [%3] \n\t"
113 "subs %1, %0, #1 \n\t"
114 "strexeq %2, %1, [%3] \n\t"
115 "movlt %0, #0 \n\t"
116 "cmpeq %2, #0 \n\t"
117 "bgt 1b "
118
119 : "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag)
120 : "r" (&count->counter)
121 : "cc", "memory" );
122
123 return __orig;
124}
125
126#endif
127#endif
diff --git a/include/asm-arm/nwflash.h b/include/asm-arm/nwflash.h
deleted file mode 100644
index 04e5a557a884..000000000000
--- a/include/asm-arm/nwflash.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _FLASH_H
2#define _FLASH_H
3
4#define FLASH_MINOR 160 /* MAJOR is 10 - miscdevice */
5#define CMD_WRITE_DISABLE 0
6#define CMD_WRITE_ENABLE 0x28
7#define CMD_WRITE_BASE64K_ENABLE 0x47
8
9#endif /* _FLASH_H */
diff --git a/include/asm-arm/page-nommu.h b/include/asm-arm/page-nommu.h
deleted file mode 100644
index ea1cde84f500..000000000000
--- a/include/asm-arm/page-nommu.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * linux/include/asm-arm/page-nommu.h
3 *
4 * Copyright (C) 2004 Hyok S. Choi
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef _ASMARM_PAGE_NOMMU_H
12#define _ASMARM_PAGE_NOMMU_H
13
14#if !defined(CONFIG_SMALL_TASKS) && PAGE_SHIFT < 13
15#define KTHREAD_SIZE (8192)
16#else
17#define KTHREAD_SIZE PAGE_SIZE
18#endif
19
20#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
21#define free_user_page(page, addr) free_page(addr)
22
23#define clear_page(page) memset((page), 0, PAGE_SIZE)
24#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE)
25
26#define clear_user_page(page, vaddr, pg) clear_page(page)
27#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
28
29/*
30 * These are used to make use of C type-checking..
31 */
32typedef unsigned long pte_t;
33typedef unsigned long pmd_t;
34typedef unsigned long pgd_t[2];
35typedef unsigned long pgprot_t;
36
37#define pte_val(x) (x)
38#define pmd_val(x) (x)
39#define pgd_val(x) ((x)[0])
40#define pgprot_val(x) (x)
41
42#define __pte(x) (x)
43#define __pmd(x) (x)
44#define __pgprot(x) (x)
45
46extern unsigned long memory_start;
47extern unsigned long memory_end;
48
49#endif
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
deleted file mode 100644
index 7c5fc5582e5d..000000000000
--- a/include/asm-arm/page.h
+++ /dev/null
@@ -1,199 +0,0 @@
1/*
2 * linux/include/asm-arm/page.h
3 *
4 * Copyright (C) 1995-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _ASMARM_PAGE_H
11#define _ASMARM_PAGE_H
12
13/* PAGE_SHIFT determines the page size */
14#define PAGE_SHIFT 12
15#define PAGE_SIZE (1UL << PAGE_SHIFT)
16#define PAGE_MASK (~(PAGE_SIZE-1))
17
18#ifndef __ASSEMBLY__
19
20#ifndef CONFIG_MMU
21
22#include "page-nommu.h"
23
24#else
25
26#include <asm/glue.h>
27
28/*
29 * User Space Model
30 * ================
31 *
32 * This section selects the correct set of functions for dealing with
33 * page-based copying and clearing for user space for the particular
34 * processor(s) we're building for.
35 *
36 * We have the following to choose from:
37 * v3 - ARMv3
38 * v4wt - ARMv4 with writethrough cache, without minicache
39 * v4wb - ARMv4 with writeback cache, without minicache
40 * v4_mc - ARMv4 with minicache
41 * xscale - Xscale
42 * xsc3 - XScalev3
43 */
44#undef _USER
45#undef MULTI_USER
46
47#ifdef CONFIG_CPU_COPY_V3
48# ifdef _USER
49# define MULTI_USER 1
50# else
51# define _USER v3
52# endif
53#endif
54
55#ifdef CONFIG_CPU_COPY_V4WT
56# ifdef _USER
57# define MULTI_USER 1
58# else
59# define _USER v4wt
60# endif
61#endif
62
63#ifdef CONFIG_CPU_COPY_V4WB
64# ifdef _USER
65# define MULTI_USER 1
66# else
67# define _USER v4wb
68# endif
69#endif
70
71#ifdef CONFIG_CPU_COPY_FEROCEON
72# ifdef _USER
73# define MULTI_USER 1
74# else
75# define _USER feroceon
76# endif
77#endif
78
79#ifdef CONFIG_CPU_SA1100
80# ifdef _USER
81# define MULTI_USER 1
82# else
83# define _USER v4_mc
84# endif
85#endif
86
87#ifdef CONFIG_CPU_XSCALE
88# ifdef _USER
89# define MULTI_USER 1
90# else
91# define _USER xscale_mc
92# endif
93#endif
94
95#ifdef CONFIG_CPU_XSC3
96# ifdef _USER
97# define MULTI_USER 1
98# else
99# define _USER xsc3_mc
100# endif
101#endif
102
103#ifdef CONFIG_CPU_COPY_V6
104# define MULTI_USER 1
105#endif
106
107#if !defined(_USER) && !defined(MULTI_USER)
108#error Unknown user operations model
109#endif
110
111struct cpu_user_fns {
112 void (*cpu_clear_user_page)(void *p, unsigned long user);
113 void (*cpu_copy_user_page)(void *to, const void *from,
114 unsigned long user);
115};
116
117#ifdef MULTI_USER
118extern struct cpu_user_fns cpu_user;
119
120#define __cpu_clear_user_page cpu_user.cpu_clear_user_page
121#define __cpu_copy_user_page cpu_user.cpu_copy_user_page
122
123#else
124
125#define __cpu_clear_user_page __glue(_USER,_clear_user_page)
126#define __cpu_copy_user_page __glue(_USER,_copy_user_page)
127
128extern void __cpu_clear_user_page(void *p, unsigned long user);
129extern void __cpu_copy_user_page(void *to, const void *from,
130 unsigned long user);
131#endif
132
133#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr)
134#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr)
135
136#define clear_page(page) memzero((void *)(page), PAGE_SIZE)
137extern void copy_page(void *to, const void *from);
138
139#undef STRICT_MM_TYPECHECKS
140
141#ifdef STRICT_MM_TYPECHECKS
142/*
143 * These are used to make use of C type-checking..
144 */
145typedef struct { unsigned long pte; } pte_t;
146typedef struct { unsigned long pmd; } pmd_t;
147typedef struct { unsigned long pgd[2]; } pgd_t;
148typedef struct { unsigned long pgprot; } pgprot_t;
149
150#define pte_val(x) ((x).pte)
151#define pmd_val(x) ((x).pmd)
152#define pgd_val(x) ((x).pgd[0])
153#define pgprot_val(x) ((x).pgprot)
154
155#define __pte(x) ((pte_t) { (x) } )
156#define __pmd(x) ((pmd_t) { (x) } )
157#define __pgprot(x) ((pgprot_t) { (x) } )
158
159#else
160/*
161 * .. while these make it easier on the compiler
162 */
163typedef unsigned long pte_t;
164typedef unsigned long pmd_t;
165typedef unsigned long pgd_t[2];
166typedef unsigned long pgprot_t;
167
168#define pte_val(x) (x)
169#define pmd_val(x) (x)
170#define pgd_val(x) ((x)[0])
171#define pgprot_val(x) (x)
172
173#define __pte(x) (x)
174#define __pmd(x) (x)
175#define __pgprot(x) (x)
176
177#endif /* STRICT_MM_TYPECHECKS */
178
179#endif /* CONFIG_MMU */
180
181typedef struct page *pgtable_t;
182
183#include <asm/memory.h>
184
185#endif /* !__ASSEMBLY__ */
186
187#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
188 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
189
190/*
191 * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
192 */
193#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
194#define ARCH_SLAB_MINALIGN 8
195#endif
196
197#include <asm-generic/page.h>
198
199#endif
diff --git a/include/asm-arm/param.h b/include/asm-arm/param.h
deleted file mode 100644
index 15806468ba72..000000000000
--- a/include/asm-arm/param.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * linux/include/asm-arm/param.h
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_PARAM_H
11#define __ASM_PARAM_H
12
13#ifdef __KERNEL__
14# define HZ CONFIG_HZ /* Internal kernel timer frequency */
15# define USER_HZ 100 /* User interfaces are in "ticks" */
16# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
17#else
18# define HZ 100
19#endif
20
21#define EXEC_PAGESIZE 4096
22
23#ifndef NOGROUP
24#define NOGROUP (-1)
25#endif
26
27/* max length of hostname */
28#define MAXHOSTNAMELEN 64
29
30#endif
31
diff --git a/include/asm-arm/parport.h b/include/asm-arm/parport.h
deleted file mode 100644
index f2f90c76ddd1..000000000000
--- a/include/asm-arm/parport.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * linux/include/asm-arm/parport.h: ARM-specific parport initialisation
3 *
4 * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk>
5 *
6 * This file should only be included by drivers/parport/parport_pc.c.
7 */
8
9#ifndef __ASMARM_PARPORT_H
10#define __ASMARM_PARPORT_H
11
12static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
13static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
14{
15 return parport_pc_find_isa_ports (autoirq, autodma);
16}
17
18#endif /* !(_ASMARM_PARPORT_H) */
diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h
deleted file mode 100644
index 2d84792f2e12..000000000000
--- a/include/asm-arm/pci.h
+++ /dev/null
@@ -1,91 +0,0 @@
1#ifndef ASMARM_PCI_H
2#define ASMARM_PCI_H
3
4#ifdef __KERNEL__
5#include <asm-generic/pci-dma-compat.h>
6
7#include <asm/hardware.h> /* for PCIBIOS_MIN_* */
8
9#define pcibios_scan_all_fns(a, b) 0
10
11#ifdef CONFIG_PCI_HOST_ITE8152
12/* ITE bridge requires setting latency timer to avoid early bus access
13 termination by PIC bus mater devices
14*/
15extern void pcibios_set_master(struct pci_dev *dev);
16#else
17static inline void pcibios_set_master(struct pci_dev *dev)
18{
19 /* No special bus mastering setup handling */
20}
21#endif
22
23static inline void pcibios_penalize_isa_irq(int irq, int active)
24{
25 /* We don't do dynamic PCI IRQ allocation */
26}
27
28/*
29 * The PCI address space does equal the physical memory address space.
30 * The networking and block device layers use this boolean for bounce
31 * buffer decisions.
32 */
33#define PCI_DMA_BUS_IS_PHYS (0)
34
35/*
36 * Whether pci_unmap_{single,page} is a nop depends upon the
37 * configuration.
38 */
39#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
40#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
41#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
42#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
43#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
44#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
45
46#ifdef CONFIG_PCI
47static inline void pci_dma_burst_advice(struct pci_dev *pdev,
48 enum pci_dma_burst_strategy *strat,
49 unsigned long *strategy_parameter)
50{
51 *strat = PCI_DMA_BURST_INFINITY;
52 *strategy_parameter = ~0UL;
53}
54#endif
55
56#define HAVE_PCI_MMAP
57extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
58 enum pci_mmap_state mmap_state, int write_combine);
59
60extern void
61pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
62 struct resource *res);
63
64extern void
65pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
66 struct pci_bus_region *region);
67
68static inline struct resource *
69pcibios_select_root(struct pci_dev *pdev, struct resource *res)
70{
71 struct resource *root = NULL;
72
73 if (res->flags & IORESOURCE_IO)
74 root = &ioport_resource;
75 if (res->flags & IORESOURCE_MEM)
76 root = &iomem_resource;
77
78 return root;
79}
80
81/*
82 * Dummy implementation; always return 0.
83 */
84static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
85{
86 return 0;
87}
88
89#endif /* __KERNEL__ */
90
91#endif
diff --git a/include/asm-arm/percpu.h b/include/asm-arm/percpu.h
deleted file mode 100644
index b4e32d8ec072..000000000000
--- a/include/asm-arm/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ARM_PERCPU
2#define __ARM_PERCPU
3
4#include <asm-generic/percpu.h>
5
6#endif
diff --git a/include/asm-arm/pgalloc.h b/include/asm-arm/pgalloc.h
deleted file mode 100644
index 163b0305dd76..000000000000
--- a/include/asm-arm/pgalloc.h
+++ /dev/null
@@ -1,136 +0,0 @@
1/*
2 * linux/include/asm-arm/pgalloc.h
3 *
4 * Copyright (C) 2000-2001 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _ASMARM_PGALLOC_H
11#define _ASMARM_PGALLOC_H
12
13#include <asm/domain.h>
14#include <asm/pgtable-hwdef.h>
15#include <asm/processor.h>
16#include <asm/cacheflush.h>
17#include <asm/tlbflush.h>
18
19#define check_pgt_cache() do { } while (0)
20
21#ifdef CONFIG_MMU
22
23#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
24#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
25
26/*
27 * Since we have only two-level page tables, these are trivial
28 */
29#define pmd_alloc_one(mm,addr) ({ BUG(); ((pmd_t *)2); })
30#define pmd_free(mm, pmd) do { } while (0)
31#define pgd_populate(mm,pmd,pte) BUG()
32
33extern pgd_t *get_pgd_slow(struct mm_struct *mm);
34extern void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd);
35
36#define pgd_alloc(mm) get_pgd_slow(mm)
37#define pgd_free(mm, pgd) free_pgd_slow(mm, pgd)
38
39/*
40 * Allocate one PTE table.
41 *
42 * This actually allocates two hardware PTE tables, but we wrap this up
43 * into one table thus:
44 *
45 * +------------+
46 * | h/w pt 0 |
47 * +------------+
48 * | h/w pt 1 |
49 * +------------+
50 * | Linux pt 0 |
51 * +------------+
52 * | Linux pt 1 |
53 * +------------+
54 */
55static inline pte_t *
56pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
57{
58 pte_t *pte;
59
60 pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
61 if (pte) {
62 clean_dcache_area(pte, sizeof(pte_t) * PTRS_PER_PTE);
63 pte += PTRS_PER_PTE;
64 }
65
66 return pte;
67}
68
69static inline pgtable_t
70pte_alloc_one(struct mm_struct *mm, unsigned long addr)
71{
72 struct page *pte;
73
74 pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
75 if (pte) {
76 void *page = page_address(pte);
77 clean_dcache_area(page, sizeof(pte_t) * PTRS_PER_PTE);
78 pgtable_page_ctor(pte);
79 }
80
81 return pte;
82}
83
84/*
85 * Free one PTE table.
86 */
87static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
88{
89 if (pte) {
90 pte -= PTRS_PER_PTE;
91 free_page((unsigned long)pte);
92 }
93}
94
95static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
96{
97 pgtable_page_dtor(pte);
98 __free_page(pte);
99}
100
101static inline void __pmd_populate(pmd_t *pmdp, unsigned long pmdval)
102{
103 pmdp[0] = __pmd(pmdval);
104 pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
105 flush_pmd_entry(pmdp);
106}
107
108/*
109 * Populate the pmdp entry with a pointer to the pte. This pmd is part
110 * of the mm address space.
111 *
112 * Ensure that we always set both PMD entries.
113 */
114static inline void
115pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
116{
117 unsigned long pte_ptr = (unsigned long)ptep;
118
119 /*
120 * The pmd must be loaded with the physical
121 * address of the PTE table
122 */
123 pte_ptr -= PTRS_PER_PTE * sizeof(void *);
124 __pmd_populate(pmdp, __pa(pte_ptr) | _PAGE_KERNEL_TABLE);
125}
126
127static inline void
128pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep)
129{
130 __pmd_populate(pmdp, page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE);
131}
132#define pmd_pgtable(pmd) pmd_page(pmd)
133
134#endif /* CONFIG_MMU */
135
136#endif
diff --git a/include/asm-arm/pgtable-hwdef.h b/include/asm-arm/pgtable-hwdef.h
deleted file mode 100644
index f3b5120c99fe..000000000000
--- a/include/asm-arm/pgtable-hwdef.h
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * linux/include/asm-arm/pgtable-hwdef.h
3 *
4 * Copyright (C) 1995-2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _ASMARM_PGTABLE_HWDEF_H
11#define _ASMARM_PGTABLE_HWDEF_H
12
13/*
14 * Hardware page table definitions.
15 *
16 * + Level 1 descriptor (PMD)
17 * - common
18 */
19#define PMD_TYPE_MASK (3 << 0)
20#define PMD_TYPE_FAULT (0 << 0)
21#define PMD_TYPE_TABLE (1 << 0)
22#define PMD_TYPE_SECT (2 << 0)
23#define PMD_BIT4 (1 << 4)
24#define PMD_DOMAIN(x) ((x) << 5)
25#define PMD_PROTECTION (1 << 9) /* v5 */
26/*
27 * - section
28 */
29#define PMD_SECT_BUFFERABLE (1 << 2)
30#define PMD_SECT_CACHEABLE (1 << 3)
31#define PMD_SECT_XN (1 << 4) /* v6 */
32#define PMD_SECT_AP_WRITE (1 << 10)
33#define PMD_SECT_AP_READ (1 << 11)
34#define PMD_SECT_TEX(x) ((x) << 12) /* v5 */
35#define PMD_SECT_APX (1 << 15) /* v6 */
36#define PMD_SECT_S (1 << 16) /* v6 */
37#define PMD_SECT_nG (1 << 17) /* v6 */
38#define PMD_SECT_SUPER (1 << 18) /* v6 */
39
40#define PMD_SECT_UNCACHED (0)
41#define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE)
42#define PMD_SECT_WT (PMD_SECT_CACHEABLE)
43#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
44#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
45#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
46#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2))
47
48/*
49 * - coarse table (not used)
50 */
51
52/*
53 * + Level 2 descriptor (PTE)
54 * - common
55 */
56#define PTE_TYPE_MASK (3 << 0)
57#define PTE_TYPE_FAULT (0 << 0)
58#define PTE_TYPE_LARGE (1 << 0)
59#define PTE_TYPE_SMALL (2 << 0)
60#define PTE_TYPE_EXT (3 << 0) /* v5 */
61#define PTE_BUFFERABLE (1 << 2)
62#define PTE_CACHEABLE (1 << 3)
63
64/*
65 * - extended small page/tiny page
66 */
67#define PTE_EXT_XN (1 << 0) /* v6 */
68#define PTE_EXT_AP_MASK (3 << 4)
69#define PTE_EXT_AP0 (1 << 4)
70#define PTE_EXT_AP1 (2 << 4)
71#define PTE_EXT_AP_UNO_SRO (0 << 4)
72#define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0)
73#define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1)
74#define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0)
75#define PTE_EXT_TEX(x) ((x) << 6) /* v5 */
76#define PTE_EXT_APX (1 << 9) /* v6 */
77#define PTE_EXT_COHERENT (1 << 9) /* XScale3 */
78#define PTE_EXT_SHARED (1 << 10) /* v6 */
79#define PTE_EXT_NG (1 << 11) /* v6 */
80
81/*
82 * - small page
83 */
84#define PTE_SMALL_AP_MASK (0xff << 4)
85#define PTE_SMALL_AP_UNO_SRO (0x00 << 4)
86#define PTE_SMALL_AP_UNO_SRW (0x55 << 4)
87#define PTE_SMALL_AP_URO_SRW (0xaa << 4)
88#define PTE_SMALL_AP_URW_SRW (0xff << 4)
89
90#endif
diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h
deleted file mode 100644
index 386fcc10a973..000000000000
--- a/include/asm-arm/pgtable-nommu.h
+++ /dev/null
@@ -1,118 +0,0 @@
1/*
2 * linux/include/asm-arm/pgtable-nommu.h
3 *
4 * Copyright (C) 1995-2002 Russell King
5 * Copyright (C) 2004 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASMARM_PGTABLE_NOMMU_H
12#define _ASMARM_PGTABLE_NOMMU_H
13
14#ifndef __ASSEMBLY__
15
16#include <linux/slab.h>
17#include <asm/processor.h>
18#include <asm/page.h>
19
20/*
21 * Trivial page table functions.
22 */
23#define pgd_present(pgd) (1)
24#define pgd_none(pgd) (0)
25#define pgd_bad(pgd) (0)
26#define pgd_clear(pgdp)
27#define kern_addr_valid(addr) (1)
28#define pmd_offset(a, b) ((void *)0)
29/* FIXME */
30/*
31 * PMD_SHIFT determines the size of the area a second-level page table can map
32 * PGDIR_SHIFT determines what a third-level page table entry can map
33 */
34#define PGDIR_SHIFT 21
35
36#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
37#define PGDIR_MASK (~(PGDIR_SIZE-1))
38/* FIXME */
39
40#define PAGE_NONE __pgprot(0)
41#define PAGE_SHARED __pgprot(0)
42#define PAGE_COPY __pgprot(0)
43#define PAGE_READONLY __pgprot(0)
44#define PAGE_KERNEL __pgprot(0)
45
46#define swapper_pg_dir ((pgd_t *) 0)
47
48#define __swp_type(x) (0)
49#define __swp_offset(x) (0)
50#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
51#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
52#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
53
54
55typedef pte_t *pte_addr_t;
56
57static inline int pte_file(pte_t pte) { return 0; }
58
59/*
60 * ZERO_PAGE is a global shared page that is always zero: used
61 * for zero-mapped memory areas etc..
62 */
63#define ZERO_PAGE(vaddr) (virt_to_page(0))
64
65/*
66 * Mark the prot value as uncacheable and unbufferable.
67 */
68#define pgprot_noncached(prot) __pgprot(0)
69#define pgprot_writecombine(prot) __pgprot(0)
70
71
72/*
73 * These would be in other places but having them here reduces the diffs.
74 */
75extern unsigned int kobjsize(const void *objp);
76
77/*
78 * No page table caches to initialise.
79 */
80#define pgtable_cache_init() do { } while (0)
81#define io_remap_page_range remap_page_range
82#define io_remap_pfn_range remap_pfn_range
83
84
85/*
86 * All 32bit addresses are effectively valid for vmalloc...
87 * Sort of meaningless for non-VM targets.
88 */
89#define VMALLOC_START 0
90#define VMALLOC_END 0xffffffff
91
92#define FIRST_USER_ADDRESS (0)
93
94#include <asm-generic/pgtable.h>
95
96#else
97
98/*
99 * dummy tlb and user structures.
100 */
101#define v3_tlb_fns (0)
102#define v4_tlb_fns (0)
103#define v4wb_tlb_fns (0)
104#define v4wbi_tlb_fns (0)
105#define v6wbi_tlb_fns (0)
106#define v7wbi_tlb_fns (0)
107
108#define v3_user_fns (0)
109#define v4_user_fns (0)
110#define v4_mc_user_fns (0)
111#define v4wb_user_fns (0)
112#define v4wt_user_fns (0)
113#define v6_user_fns (0)
114#define xscale_mc_user_fns (0)
115
116#endif /*__ASSEMBLY__*/
117
118#endif /* _ASMARM_PGTABLE_H */
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
deleted file mode 100644
index 5571c13c3f3b..000000000000
--- a/include/asm-arm/pgtable.h
+++ /dev/null
@@ -1,401 +0,0 @@
1/*
2 * linux/include/asm-arm/pgtable.h
3 *
4 * Copyright (C) 1995-2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _ASMARM_PGTABLE_H
11#define _ASMARM_PGTABLE_H
12
13#include <asm-generic/4level-fixup.h>
14#include <asm/proc-fns.h>
15
16#ifndef CONFIG_MMU
17
18#include "pgtable-nommu.h"
19
20#else
21
22#include <asm/memory.h>
23#include <asm/arch/vmalloc.h>
24#include <asm/pgtable-hwdef.h>
25
26/*
27 * Just any arbitrary offset to the start of the vmalloc VM area: the
28 * current 8MB value just means that there will be a 8MB "hole" after the
29 * physical memory until the kernel virtual memory starts. That means that
30 * any out-of-bounds memory accesses will hopefully be caught.
31 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
32 * area for the same reason. ;)
33 *
34 * Note that platforms may override VMALLOC_START, but they must provide
35 * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space,
36 * which may not overlap IO space.
37 */
38#ifndef VMALLOC_START
39#define VMALLOC_OFFSET (8*1024*1024)
40#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
41#endif
42
43/*
44 * Hardware-wise, we have a two level page table structure, where the first
45 * level has 4096 entries, and the second level has 256 entries. Each entry
46 * is one 32-bit word. Most of the bits in the second level entry are used
47 * by hardware, and there aren't any "accessed" and "dirty" bits.
48 *
49 * Linux on the other hand has a three level page table structure, which can
50 * be wrapped to fit a two level page table structure easily - using the PGD
51 * and PTE only. However, Linux also expects one "PTE" table per page, and
52 * at least a "dirty" bit.
53 *
54 * Therefore, we tweak the implementation slightly - we tell Linux that we
55 * have 2048 entries in the first level, each of which is 8 bytes (iow, two
56 * hardware pointers to the second level.) The second level contains two
57 * hardware PTE tables arranged contiguously, followed by Linux versions
58 * which contain the state information Linux needs. We, therefore, end up
59 * with 512 entries in the "PTE" level.
60 *
61 * This leads to the page tables having the following layout:
62 *
63 * pgd pte
64 * | |
65 * +--------+ +0
66 * | |-----> +------------+ +0
67 * +- - - - + +4 | h/w pt 0 |
68 * | |-----> +------------+ +1024
69 * +--------+ +8 | h/w pt 1 |
70 * | | +------------+ +2048
71 * +- - - - + | Linux pt 0 |
72 * | | +------------+ +3072
73 * +--------+ | Linux pt 1 |
74 * | | +------------+ +4096
75 *
76 * See L_PTE_xxx below for definitions of bits in the "Linux pt", and
77 * PTE_xxx for definitions of bits appearing in the "h/w pt".
78 *
79 * PMD_xxx definitions refer to bits in the first level page table.
80 *
81 * The "dirty" bit is emulated by only granting hardware write permission
82 * iff the page is marked "writable" and "dirty" in the Linux PTE. This
83 * means that a write to a clean page will cause a permission fault, and
84 * the Linux MM layer will mark the page dirty via handle_pte_fault().
85 * For the hardware to notice the permission change, the TLB entry must
86 * be flushed, and ptep_set_access_flags() does that for us.
87 *
88 * The "accessed" or "young" bit is emulated by a similar method; we only
89 * allow accesses to the page if the "young" bit is set. Accesses to the
90 * page will cause a fault, and handle_pte_fault() will set the young bit
91 * for us as long as the page is marked present in the corresponding Linux
92 * PTE entry. Again, ptep_set_access_flags() will ensure that the TLB is
93 * up to date.
94 *
95 * However, when the "young" bit is cleared, we deny access to the page
96 * by clearing the hardware PTE. Currently Linux does not flush the TLB
97 * for us in this case, which means the TLB will retain the transation
98 * until either the TLB entry is evicted under pressure, or a context
99 * switch which changes the user space mapping occurs.
100 */
101#define PTRS_PER_PTE 512
102#define PTRS_PER_PMD 1
103#define PTRS_PER_PGD 2048
104
105/*
106 * PMD_SHIFT determines the size of the area a second-level page table can map
107 * PGDIR_SHIFT determines what a third-level page table entry can map
108 */
109#define PMD_SHIFT 21
110#define PGDIR_SHIFT 21
111
112#define LIBRARY_TEXT_START 0x0c000000
113
114#ifndef __ASSEMBLY__
115extern void __pte_error(const char *file, int line, unsigned long val);
116extern void __pmd_error(const char *file, int line, unsigned long val);
117extern void __pgd_error(const char *file, int line, unsigned long val);
118
119#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
120#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
121#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
122#endif /* !__ASSEMBLY__ */
123
124#define PMD_SIZE (1UL << PMD_SHIFT)
125#define PMD_MASK (~(PMD_SIZE-1))
126#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
127#define PGDIR_MASK (~(PGDIR_SIZE-1))
128
129/*
130 * This is the lowest virtual address we can permit any user space
131 * mapping to be mapped at. This is particularly important for
132 * non-high vector CPUs.
133 */
134#define FIRST_USER_ADDRESS PAGE_SIZE
135
136#define FIRST_USER_PGD_NR 1
137#define USER_PTRS_PER_PGD ((TASK_SIZE/PGDIR_SIZE) - FIRST_USER_PGD_NR)
138
139/*
140 * section address mask and size definitions.
141 */
142#define SECTION_SHIFT 20
143#define SECTION_SIZE (1UL << SECTION_SHIFT)
144#define SECTION_MASK (~(SECTION_SIZE-1))
145
146/*
147 * ARMv6 supersection address mask and size definitions.
148 */
149#define SUPERSECTION_SHIFT 24
150#define SUPERSECTION_SIZE (1UL << SUPERSECTION_SHIFT)
151#define SUPERSECTION_MASK (~(SUPERSECTION_SIZE-1))
152
153/*
154 * "Linux" PTE definitions.
155 *
156 * We keep two sets of PTEs - the hardware and the linux version.
157 * This allows greater flexibility in the way we map the Linux bits
158 * onto the hardware tables, and allows us to have YOUNG and DIRTY
159 * bits.
160 *
161 * The PTE table pointer refers to the hardware entries; the "Linux"
162 * entries are stored 1024 bytes below.
163 */
164#define L_PTE_PRESENT (1 << 0)
165#define L_PTE_FILE (1 << 1) /* only when !PRESENT */
166#define L_PTE_YOUNG (1 << 1)
167#define L_PTE_BUFFERABLE (1 << 2) /* matches PTE */
168#define L_PTE_CACHEABLE (1 << 3) /* matches PTE */
169#define L_PTE_USER (1 << 4)
170#define L_PTE_WRITE (1 << 5)
171#define L_PTE_EXEC (1 << 6)
172#define L_PTE_DIRTY (1 << 7)
173#define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */
174
175#ifndef __ASSEMBLY__
176
177/*
178 * The pgprot_* and protection_map entries will be fixed up in runtime
179 * to include the cachable and bufferable bits based on memory policy,
180 * as well as any architecture dependent bits like global/ASID and SMP
181 * shared mapping bits.
182 */
183#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_CACHEABLE | L_PTE_BUFFERABLE
184#define _L_PTE_READ L_PTE_USER | L_PTE_EXEC
185
186extern pgprot_t pgprot_user;
187extern pgprot_t pgprot_kernel;
188
189#define PAGE_NONE pgprot_user
190#define PAGE_COPY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ)
191#define PAGE_SHARED __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ | \
192 L_PTE_WRITE)
193#define PAGE_READONLY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ)
194#define PAGE_KERNEL pgprot_kernel
195
196#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT)
197#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
198#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE)
199#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ)
200
201#endif /* __ASSEMBLY__ */
202
203/*
204 * The table below defines the page protection levels that we insert into our
205 * Linux page table version. These get translated into the best that the
206 * architecture can perform. Note that on most ARM hardware:
207 * 1) We cannot do execute protection
208 * 2) If we could do execute protection, then read is implied
209 * 3) write implies read permissions
210 */
211#define __P000 __PAGE_NONE
212#define __P001 __PAGE_READONLY
213#define __P010 __PAGE_COPY
214#define __P011 __PAGE_COPY
215#define __P100 __PAGE_READONLY
216#define __P101 __PAGE_READONLY
217#define __P110 __PAGE_COPY
218#define __P111 __PAGE_COPY
219
220#define __S000 __PAGE_NONE
221#define __S001 __PAGE_READONLY
222#define __S010 __PAGE_SHARED
223#define __S011 __PAGE_SHARED
224#define __S100 __PAGE_READONLY
225#define __S101 __PAGE_READONLY
226#define __S110 __PAGE_SHARED
227#define __S111 __PAGE_SHARED
228
229#ifndef __ASSEMBLY__
230/*
231 * ZERO_PAGE is a global shared page that is always zero: used
232 * for zero-mapped memory areas etc..
233 */
234extern struct page *empty_zero_page;
235#define ZERO_PAGE(vaddr) (empty_zero_page)
236
237#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
238#define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)))
239
240#define pte_none(pte) (!pte_val(pte))
241#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
242#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
243#define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
244#define pte_offset_map(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
245#define pte_offset_map_nested(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
246#define pte_unmap(pte) do { } while (0)
247#define pte_unmap_nested(pte) do { } while (0)
248
249#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
250
251#define set_pte_at(mm,addr,ptep,pteval) do { \
252 set_pte_ext(ptep, pteval, (addr) >= TASK_SIZE ? 0 : PTE_EXT_NG); \
253 } while (0)
254
255/*
256 * The following only work if pte_present() is true.
257 * Undefined behaviour if not..
258 */
259#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
260#define pte_write(pte) (pte_val(pte) & L_PTE_WRITE)
261#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
262#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
263#define pte_special(pte) (0)
264
265/*
266 * The following only works if pte_present() is not true.
267 */
268#define pte_file(pte) (pte_val(pte) & L_PTE_FILE)
269#define pte_to_pgoff(x) (pte_val(x) >> 2)
270#define pgoff_to_pte(x) __pte(((x) << 2) | L_PTE_FILE)
271
272#define PTE_FILE_MAX_BITS 30
273
274#define PTE_BIT_FUNC(fn,op) \
275static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
276
277PTE_BIT_FUNC(wrprotect, &= ~L_PTE_WRITE);
278PTE_BIT_FUNC(mkwrite, |= L_PTE_WRITE);
279PTE_BIT_FUNC(mkclean, &= ~L_PTE_DIRTY);
280PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY);
281PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG);
282PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG);
283
284static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
285
286/*
287 * Mark the prot value as uncacheable and unbufferable.
288 */
289#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~(L_PTE_CACHEABLE | L_PTE_BUFFERABLE))
290#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~L_PTE_CACHEABLE)
291
292#define pmd_none(pmd) (!pmd_val(pmd))
293#define pmd_present(pmd) (pmd_val(pmd))
294#define pmd_bad(pmd) (pmd_val(pmd) & 2)
295
296#define copy_pmd(pmdpd,pmdps) \
297 do { \
298 pmdpd[0] = pmdps[0]; \
299 pmdpd[1] = pmdps[1]; \
300 flush_pmd_entry(pmdpd); \
301 } while (0)
302
303#define pmd_clear(pmdp) \
304 do { \
305 pmdp[0] = __pmd(0); \
306 pmdp[1] = __pmd(0); \
307 clean_pmd_entry(pmdp); \
308 } while (0)
309
310static inline pte_t *pmd_page_vaddr(pmd_t pmd)
311{
312 unsigned long ptr;
313
314 ptr = pmd_val(pmd) & ~(PTRS_PER_PTE * sizeof(void *) - 1);
315 ptr += PTRS_PER_PTE * sizeof(void *);
316
317 return __va(ptr);
318}
319
320#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd)))
321
322/*
323 * Permanent address of a page. We never have highmem, so this is trivial.
324 */
325#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
326
327/*
328 * Conversion functions: convert a page and protection to a page entry,
329 * and a page entry and page directory to the page they refer to.
330 */
331#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
332
333/*
334 * The "pgd_xxx()" functions here are trivial for a folded two-level
335 * setup: the pgd is never bad, and a pmd always exists (as it's folded
336 * into the pgd entry)
337 */
338#define pgd_none(pgd) (0)
339#define pgd_bad(pgd) (0)
340#define pgd_present(pgd) (1)
341#define pgd_clear(pgdp) do { } while (0)
342#define set_pgd(pgd,pgdp) do { } while (0)
343
344/* to find an entry in a page-table-directory */
345#define pgd_index(addr) ((addr) >> PGDIR_SHIFT)
346
347#define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr))
348
349/* to find an entry in a kernel page-table-directory */
350#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
351
352/* Find an entry in the second-level page table.. */
353#define pmd_offset(dir, addr) ((pmd_t *)(dir))
354
355/* Find an entry in the third-level page table.. */
356#define __pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
357
358static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
359{
360 const unsigned long mask = L_PTE_EXEC | L_PTE_WRITE | L_PTE_USER;
361 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
362 return pte;
363}
364
365extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
366
367/* Encode and decode a swap entry.
368 *
369 * We support up to 32GB of swap on 4k machines
370 */
371#define __swp_type(x) (((x).val >> 2) & 0x7f)
372#define __swp_offset(x) ((x).val >> 9)
373#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 9) })
374#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
375#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
376
377/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
378/* FIXME: this is not correct */
379#define kern_addr_valid(addr) (1)
380
381#include <asm-generic/pgtable.h>
382
383/*
384 * We provide our own arch_get_unmapped_area to cope with VIPT caches.
385 */
386#define HAVE_ARCH_UNMAPPED_AREA
387
388/*
389 * remap a physical page `pfn' of size `size' with page protection `prot'
390 * into virtual address `from'
391 */
392#define io_remap_pfn_range(vma,from,pfn,size,prot) \
393 remap_pfn_range(vma, from, pfn, size, prot)
394
395#define pgtable_cache_init() do { } while (0)
396
397#endif /* !__ASSEMBLY__ */
398
399#endif /* CONFIG_MMU */
400
401#endif /* _ASMARM_PGTABLE_H */
diff --git a/include/asm-arm/poll.h b/include/asm-arm/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/include/asm-arm/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/include/asm-arm/posix_types.h b/include/asm-arm/posix_types.h
deleted file mode 100644
index c37379dadcb2..000000000000
--- a/include/asm-arm/posix_types.h
+++ /dev/null
@@ -1,77 +0,0 @@
1/*
2 * linux/include/asm-arm/posix_types.h
3 *
4 * Copyright (C) 1996-1998 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 27-06-1996 RMK Created
12 */
13#ifndef __ARCH_ARM_POSIX_TYPES_H
14#define __ARCH_ARM_POSIX_TYPES_H
15
16/*
17 * This file is generally used by user-level software, so you need to
18 * be a little careful about namespace pollution etc. Also, we cannot
19 * assume GCC is being used.
20 */
21
22typedef unsigned long __kernel_ino_t;
23typedef unsigned short __kernel_mode_t;
24typedef unsigned short __kernel_nlink_t;
25typedef long __kernel_off_t;
26typedef int __kernel_pid_t;
27typedef unsigned short __kernel_ipc_pid_t;
28typedef unsigned short __kernel_uid_t;
29typedef unsigned short __kernel_gid_t;
30typedef unsigned int __kernel_size_t;
31typedef int __kernel_ssize_t;
32typedef int __kernel_ptrdiff_t;
33typedef long __kernel_time_t;
34typedef long __kernel_suseconds_t;
35typedef long __kernel_clock_t;
36typedef int __kernel_timer_t;
37typedef int __kernel_clockid_t;
38typedef int __kernel_daddr_t;
39typedef char * __kernel_caddr_t;
40typedef unsigned short __kernel_uid16_t;
41typedef unsigned short __kernel_gid16_t;
42typedef unsigned int __kernel_uid32_t;
43typedef unsigned int __kernel_gid32_t;
44
45typedef unsigned short __kernel_old_uid_t;
46typedef unsigned short __kernel_old_gid_t;
47typedef unsigned short __kernel_old_dev_t;
48
49#ifdef __GNUC__
50typedef long long __kernel_loff_t;
51#endif
52
53typedef struct {
54 int val[2];
55} __kernel_fsid_t;
56
57#if defined(__KERNEL__)
58
59#undef __FD_SET
60#define __FD_SET(fd, fdsetp) \
61 (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] |= (1<<((fd) & 31)))
62
63#undef __FD_CLR
64#define __FD_CLR(fd, fdsetp) \
65 (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] &= ~(1<<((fd) & 31)))
66
67#undef __FD_ISSET
68#define __FD_ISSET(fd, fdsetp) \
69 ((((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] & (1<<((fd) & 31))) != 0)
70
71#undef __FD_ZERO
72#define __FD_ZERO(fdsetp) \
73 (memset (fdsetp, 0, sizeof (*(fd_set *)(fdsetp))))
74
75#endif
76
77#endif
diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h
deleted file mode 100644
index 75ec760f4c74..000000000000
--- a/include/asm-arm/proc-fns.h
+++ /dev/null
@@ -1,241 +0,0 @@
1/*
2 * linux/include/asm-arm/proc-fns.h
3 *
4 * Copyright (C) 1997-1999 Russell King
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ASM_PROCFNS_H
12#define __ASM_PROCFNS_H
13
14#ifdef __KERNEL__
15
16
17/*
18 * Work out if we need multiple CPU support
19 */
20#undef MULTI_CPU
21#undef CPU_NAME
22
23/*
24 * CPU_NAME - the prefix for CPU related functions
25 */
26
27#ifdef CONFIG_CPU_32
28# ifdef CONFIG_CPU_ARM610
29# ifdef CPU_NAME
30# undef MULTI_CPU
31# define MULTI_CPU
32# else
33# define CPU_NAME cpu_arm6
34# endif
35# endif
36# ifdef CONFIG_CPU_ARM7TDMI
37# ifdef CPU_NAME
38# undef MULTI_CPU
39# define MULTI_CPU
40# else
41# define CPU_NAME cpu_arm7tdmi
42# endif
43# endif
44# ifdef CONFIG_CPU_ARM710
45# ifdef CPU_NAME
46# undef MULTI_CPU
47# define MULTI_CPU
48# else
49# define CPU_NAME cpu_arm7
50# endif
51# endif
52# ifdef CONFIG_CPU_ARM720T
53# ifdef CPU_NAME
54# undef MULTI_CPU
55# define MULTI_CPU
56# else
57# define CPU_NAME cpu_arm720
58# endif
59# endif
60# ifdef CONFIG_CPU_ARM740T
61# ifdef CPU_NAME
62# undef MULTI_CPU
63# define MULTI_CPU
64# else
65# define CPU_NAME cpu_arm740
66# endif
67# endif
68# ifdef CONFIG_CPU_ARM9TDMI
69# ifdef CPU_NAME
70# undef MULTI_CPU
71# define MULTI_CPU
72# else
73# define CPU_NAME cpu_arm9tdmi
74# endif
75# endif
76# ifdef CONFIG_CPU_ARM920T
77# ifdef CPU_NAME
78# undef MULTI_CPU
79# define MULTI_CPU
80# else
81# define CPU_NAME cpu_arm920
82# endif
83# endif
84# ifdef CONFIG_CPU_ARM922T
85# ifdef CPU_NAME
86# undef MULTI_CPU
87# define MULTI_CPU
88# else
89# define CPU_NAME cpu_arm922
90# endif
91# endif
92# ifdef CONFIG_CPU_ARM925T
93# ifdef CPU_NAME
94# undef MULTI_CPU
95# define MULTI_CPU
96# else
97# define CPU_NAME cpu_arm925
98# endif
99# endif
100# ifdef CONFIG_CPU_ARM926T
101# ifdef CPU_NAME
102# undef MULTI_CPU
103# define MULTI_CPU
104# else
105# define CPU_NAME cpu_arm926
106# endif
107# endif
108# ifdef CONFIG_CPU_ARM940T
109# ifdef CPU_NAME
110# undef MULTI_CPU
111# define MULTI_CPU
112# else
113# define CPU_NAME cpu_arm940
114# endif
115# endif
116# ifdef CONFIG_CPU_ARM946E
117# ifdef CPU_NAME
118# undef MULTI_CPU
119# define MULTI_CPU
120# else
121# define CPU_NAME cpu_arm946
122# endif
123# endif
124# ifdef CONFIG_CPU_SA110
125# ifdef CPU_NAME
126# undef MULTI_CPU
127# define MULTI_CPU
128# else
129# define CPU_NAME cpu_sa110
130# endif
131# endif
132# ifdef CONFIG_CPU_SA1100
133# ifdef CPU_NAME
134# undef MULTI_CPU
135# define MULTI_CPU
136# else
137# define CPU_NAME cpu_sa1100
138# endif
139# endif
140# ifdef CONFIG_CPU_ARM1020
141# ifdef CPU_NAME
142# undef MULTI_CPU
143# define MULTI_CPU
144# else
145# define CPU_NAME cpu_arm1020
146# endif
147# endif
148# ifdef CONFIG_CPU_ARM1020E
149# ifdef CPU_NAME
150# undef MULTI_CPU
151# define MULTI_CPU
152# else
153# define CPU_NAME cpu_arm1020e
154# endif
155# endif
156# ifdef CONFIG_CPU_ARM1022
157# ifdef CPU_NAME
158# undef MULTI_CPU
159# define MULTI_CPU
160# else
161# define CPU_NAME cpu_arm1022
162# endif
163# endif
164# ifdef CONFIG_CPU_ARM1026
165# ifdef CPU_NAME
166# undef MULTI_CPU
167# define MULTI_CPU
168# else
169# define CPU_NAME cpu_arm1026
170# endif
171# endif
172# ifdef CONFIG_CPU_XSCALE
173# ifdef CPU_NAME
174# undef MULTI_CPU
175# define MULTI_CPU
176# else
177# define CPU_NAME cpu_xscale
178# endif
179# endif
180# ifdef CONFIG_CPU_XSC3
181# ifdef CPU_NAME
182# undef MULTI_CPU
183# define MULTI_CPU
184# else
185# define CPU_NAME cpu_xsc3
186# endif
187# endif
188# ifdef CONFIG_CPU_FEROCEON
189# ifdef CPU_NAME
190# undef MULTI_CPU
191# define MULTI_CPU
192# else
193# define CPU_NAME cpu_feroceon
194# endif
195# endif
196# ifdef CONFIG_CPU_V6
197# ifdef CPU_NAME
198# undef MULTI_CPU
199# define MULTI_CPU
200# else
201# define CPU_NAME cpu_v6
202# endif
203# endif
204# ifdef CONFIG_CPU_V7
205# ifdef CPU_NAME
206# undef MULTI_CPU
207# define MULTI_CPU
208# else
209# define CPU_NAME cpu_v7
210# endif
211# endif
212#endif
213
214#ifndef __ASSEMBLY__
215
216#ifndef MULTI_CPU
217#include <asm/cpu-single.h>
218#else
219#include <asm/cpu-multi32.h>
220#endif
221
222#include <asm/memory.h>
223
224#ifdef CONFIG_MMU
225
226#define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm)
227
228#define cpu_get_pgd() \
229 ({ \
230 unsigned long pg; \
231 __asm__("mrc p15, 0, %0, c2, c0, 0" \
232 : "=r" (pg) : : "cc"); \
233 pg &= ~0x3fff; \
234 (pgd_t *)phys_to_virt(pg); \
235 })
236
237#endif
238
239#endif /* __ASSEMBLY__ */
240#endif /* __KERNEL__ */
241#endif /* __ASM_PROCFNS_H */
diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h
deleted file mode 100644
index bd8029e8dc67..000000000000
--- a/include/asm-arm/processor.h
+++ /dev/null
@@ -1,131 +0,0 @@
1/*
2 * linux/include/asm-arm/processor.h
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARM_PROCESSOR_H
12#define __ASM_ARM_PROCESSOR_H
13
14/*
15 * Default implementation of macro that returns current
16 * instruction pointer ("program counter").
17 */
18#define current_text_addr() ({ __label__ _l; _l: &&_l;})
19
20#ifdef __KERNEL__
21
22#include <asm/ptrace.h>
23#include <asm/types.h>
24
25#ifdef __KERNEL__
26#define STACK_TOP ((current->personality == PER_LINUX_32BIT) ? \
27 TASK_SIZE : TASK_SIZE_26)
28#define STACK_TOP_MAX TASK_SIZE
29#endif
30
31union debug_insn {
32 u32 arm;
33 u16 thumb;
34};
35
36struct debug_entry {
37 u32 address;
38 union debug_insn insn;
39};
40
41struct debug_info {
42 int nsaved;
43 struct debug_entry bp[2];
44};
45
46struct thread_struct {
47 /* fault info */
48 unsigned long address;
49 unsigned long trap_no;
50 unsigned long error_code;
51 /* debugging */
52 struct debug_info debug;
53};
54
55#define INIT_THREAD { }
56
57#ifdef CONFIG_MMU
58#define nommu_start_thread(regs) do { } while (0)
59#else
60#define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data
61#endif
62
63#define start_thread(regs,pc,sp) \
64({ \
65 unsigned long *stack = (unsigned long *)sp; \
66 set_fs(USER_DS); \
67 memzero(regs->uregs, sizeof(regs->uregs)); \
68 if (current->personality & ADDR_LIMIT_32BIT) \
69 regs->ARM_cpsr = USR_MODE; \
70 else \
71 regs->ARM_cpsr = USR26_MODE; \
72 if (elf_hwcap & HWCAP_THUMB && pc & 1) \
73 regs->ARM_cpsr |= PSR_T_BIT; \
74 regs->ARM_pc = pc & ~1; /* pc */ \
75 regs->ARM_sp = sp; /* sp */ \
76 regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
77 regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
78 regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
79 nommu_start_thread(regs); \
80})
81
82/* Forward declaration, a strange C thing */
83struct task_struct;
84
85/* Free all resources held by a thread. */
86extern void release_thread(struct task_struct *);
87
88/* Prepare to copy thread state - unlazy all lazy status */
89#define prepare_to_copy(tsk) do { } while (0)
90
91unsigned long get_wchan(struct task_struct *p);
92
93#define cpu_relax() barrier()
94
95/*
96 * Create a new kernel thread
97 */
98extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
99
100#define task_pt_regs(p) \
101 ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
102
103#define KSTK_EIP(tsk) task_pt_regs(tsk)->ARM_pc
104#define KSTK_ESP(tsk) task_pt_regs(tsk)->ARM_sp
105
106/*
107 * Prefetching support - only ARMv5.
108 */
109#if __LINUX_ARM_ARCH__ >= 5
110
111#define ARCH_HAS_PREFETCH
112static inline void prefetch(const void *ptr)
113{
114 __asm__ __volatile__(
115 "pld\t%0"
116 :
117 : "o" (*(char *)ptr)
118 : "cc");
119}
120
121#define ARCH_HAS_PREFETCHW
122#define prefetchw(ptr) prefetch(ptr)
123
124#define ARCH_HAS_SPINLOCK_PREFETCH
125#define spin_lock_prefetch(x) do { } while (0)
126
127#endif
128
129#endif
130
131#endif /* __ASM_ARM_PROCESSOR_H */
diff --git a/include/asm-arm/procinfo.h b/include/asm-arm/procinfo.h
deleted file mode 100644
index 4d3c685075e0..000000000000
--- a/include/asm-arm/procinfo.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * linux/include/asm-arm/procinfo.h
3 *
4 * Copyright (C) 1996-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_PROCINFO_H
11#define __ASM_PROCINFO_H
12
13#ifdef __KERNEL__
14
15struct cpu_tlb_fns;
16struct cpu_user_fns;
17struct cpu_cache_fns;
18struct processor;
19
20/*
21 * Note! struct processor is always defined if we're
22 * using MULTI_CPU, otherwise this entry is unused,
23 * but still exists.
24 *
25 * NOTE! The following structure is defined by assembly
26 * language, NOT C code. For more information, check:
27 * arch/arm/mm/proc-*.S and arch/arm/kernel/head.S
28 */
29struct proc_info_list {
30 unsigned int cpu_val;
31 unsigned int cpu_mask;
32 unsigned long __cpu_mm_mmu_flags; /* used by head.S */
33 unsigned long __cpu_io_mmu_flags; /* used by head.S */
34 unsigned long __cpu_flush; /* used by head.S */
35 const char *arch_name;
36 const char *elf_name;
37 unsigned int elf_hwcap;
38 const char *cpu_name;
39 struct processor *proc;
40 struct cpu_tlb_fns *tlb;
41 struct cpu_user_fns *user;
42 struct cpu_cache_fns *cache;
43};
44
45#else /* __KERNEL__ */
46#include <asm/elf.h>
47#warning "Please include asm/elf.h instead"
48#endif /* __KERNEL__ */
49#endif
diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h
deleted file mode 100644
index 8382b7510f94..000000000000
--- a/include/asm-arm/ptrace.h
+++ /dev/null
@@ -1,162 +0,0 @@
1/*
2 * linux/include/asm-arm/ptrace.h
3 *
4 * Copyright (C) 1996-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_PTRACE_H
11#define __ASM_ARM_PTRACE_H
12
13#include <asm/hwcap.h>
14
15#define PTRACE_GETREGS 12
16#define PTRACE_SETREGS 13
17#define PTRACE_GETFPREGS 14
18#define PTRACE_SETFPREGS 15
19/* PTRACE_ATTACH is 16 */
20/* PTRACE_DETACH is 17 */
21#define PTRACE_GETWMMXREGS 18
22#define PTRACE_SETWMMXREGS 19
23/* 20 is unused */
24#define PTRACE_OLDSETOPTIONS 21
25#define PTRACE_GET_THREAD_AREA 22
26#define PTRACE_SET_SYSCALL 23
27/* PTRACE_SYSCALL is 24 */
28#define PTRACE_GETCRUNCHREGS 25
29#define PTRACE_SETCRUNCHREGS 26
30
31/*
32 * PSR bits
33 */
34#define USR26_MODE 0x00000000
35#define FIQ26_MODE 0x00000001
36#define IRQ26_MODE 0x00000002
37#define SVC26_MODE 0x00000003
38#define USR_MODE 0x00000010
39#define FIQ_MODE 0x00000011
40#define IRQ_MODE 0x00000012
41#define SVC_MODE 0x00000013
42#define ABT_MODE 0x00000017
43#define UND_MODE 0x0000001b
44#define SYSTEM_MODE 0x0000001f
45#define MODE32_BIT 0x00000010
46#define MODE_MASK 0x0000001f
47#define PSR_T_BIT 0x00000020
48#define PSR_F_BIT 0x00000040
49#define PSR_I_BIT 0x00000080
50#define PSR_A_BIT 0x00000100
51#define PSR_J_BIT 0x01000000
52#define PSR_Q_BIT 0x08000000
53#define PSR_V_BIT 0x10000000
54#define PSR_C_BIT 0x20000000
55#define PSR_Z_BIT 0x40000000
56#define PSR_N_BIT 0x80000000
57#define PCMASK 0
58
59/*
60 * Groups of PSR bits
61 */
62#define PSR_f 0xff000000 /* Flags */
63#define PSR_s 0x00ff0000 /* Status */
64#define PSR_x 0x0000ff00 /* Extension */
65#define PSR_c 0x000000ff /* Control */
66
67#ifndef __ASSEMBLY__
68
69/*
70 * This struct defines the way the registers are stored on the
71 * stack during a system call. Note that sizeof(struct pt_regs)
72 * has to be a multiple of 8.
73 */
74struct pt_regs {
75 long uregs[18];
76};
77
78#define ARM_cpsr uregs[16]
79#define ARM_pc uregs[15]
80#define ARM_lr uregs[14]
81#define ARM_sp uregs[13]
82#define ARM_ip uregs[12]
83#define ARM_fp uregs[11]
84#define ARM_r10 uregs[10]
85#define ARM_r9 uregs[9]
86#define ARM_r8 uregs[8]
87#define ARM_r7 uregs[7]
88#define ARM_r6 uregs[6]
89#define ARM_r5 uregs[5]
90#define ARM_r4 uregs[4]
91#define ARM_r3 uregs[3]
92#define ARM_r2 uregs[2]
93#define ARM_r1 uregs[1]
94#define ARM_r0 uregs[0]
95#define ARM_ORIG_r0 uregs[17]
96
97#ifdef __KERNEL__
98
99#define user_mode(regs) \
100 (((regs)->ARM_cpsr & 0xf) == 0)
101
102#ifdef CONFIG_ARM_THUMB
103#define thumb_mode(regs) \
104 (((regs)->ARM_cpsr & PSR_T_BIT))
105#else
106#define thumb_mode(regs) (0)
107#endif
108
109#define isa_mode(regs) \
110 ((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \
111 (((regs)->ARM_cpsr & PSR_T_BIT) >> 5))
112
113#define processor_mode(regs) \
114 ((regs)->ARM_cpsr & MODE_MASK)
115
116#define interrupts_enabled(regs) \
117 (!((regs)->ARM_cpsr & PSR_I_BIT))
118
119#define fast_interrupts_enabled(regs) \
120 (!((regs)->ARM_cpsr & PSR_F_BIT))
121
122/* Are the current registers suitable for user mode?
123 * (used to maintain security in signal handlers)
124 */
125static inline int valid_user_regs(struct pt_regs *regs)
126{
127 if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) {
128 regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
129 return 1;
130 }
131
132 /*
133 * Force CPSR to something logical...
134 */
135 regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT;
136 if (!(elf_hwcap & HWCAP_26BIT))
137 regs->ARM_cpsr |= USR_MODE;
138
139 return 0;
140}
141
142#define pc_pointer(v) \
143 ((v) & ~PCMASK)
144
145#define instruction_pointer(regs) \
146 (pc_pointer((regs)->ARM_pc))
147
148#ifdef CONFIG_SMP
149extern unsigned long profile_pc(struct pt_regs *regs);
150#else
151#define profile_pc(regs) instruction_pointer(regs)
152#endif
153
154#define predicate(x) ((x) & 0xf0000000)
155#define PREDICATE_ALWAYS 0xe0000000
156
157#endif /* __KERNEL__ */
158
159#endif /* __ASSEMBLY__ */
160
161#endif
162
diff --git a/include/asm-arm/resource.h b/include/asm-arm/resource.h
deleted file mode 100644
index 734b581b5b6a..000000000000
--- a/include/asm-arm/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ARM_RESOURCE_H
2#define _ARM_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif
diff --git a/include/asm-arm/scatterlist.h b/include/asm-arm/scatterlist.h
deleted file mode 100644
index ca0a37d03400..000000000000
--- a/include/asm-arm/scatterlist.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _ASMARM_SCATTERLIST_H
2#define _ASMARM_SCATTERLIST_H
3
4#include <asm/memory.h>
5#include <asm/types.h>
6
7struct scatterlist {
8#ifdef CONFIG_DEBUG_SG
9 unsigned long sg_magic;
10#endif
11 unsigned long page_link;
12 unsigned int offset; /* buffer offset */
13 dma_addr_t dma_address; /* dma address */
14 unsigned int length; /* length */
15};
16
17/*
18 * These macros should be used after a pci_map_sg call has been done
19 * to get bus addresses of each of the SG entries and their lengths.
20 * You should only work with the number of sg entries pci_map_sg
21 * returns, or alternatively stop on the first sg_dma_len(sg) which
22 * is 0.
23 */
24#define sg_dma_address(sg) ((sg)->dma_address)
25#define sg_dma_len(sg) ((sg)->length)
26
27#endif /* _ASMARM_SCATTERLIST_H */
diff --git a/include/asm-arm/sections.h b/include/asm-arm/sections.h
deleted file mode 100644
index 2b8c5160388f..000000000000
--- a/include/asm-arm/sections.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/sections.h>
diff --git a/include/asm-arm/segment.h b/include/asm-arm/segment.h
deleted file mode 100644
index 9e24c21f6304..000000000000
--- a/include/asm-arm/segment.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __ASM_ARM_SEGMENT_H
2#define __ASM_ARM_SEGMENT_H
3
4#define __KERNEL_CS 0x0
5#define __KERNEL_DS 0x0
6
7#define __USER_CS 0x1
8#define __USER_DS 0x1
9
10#endif /* __ASM_ARM_SEGMENT_H */
11
diff --git a/include/asm-arm/sembuf.h b/include/asm-arm/sembuf.h
deleted file mode 100644
index 1c0283954289..000000000000
--- a/include/asm-arm/sembuf.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _ASMARM_SEMBUF_H
2#define _ASMARM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASMARM_SEMBUF_H */
diff --git a/include/asm-arm/serial.h b/include/asm-arm/serial.h
deleted file mode 100644
index 015b262dc145..000000000000
--- a/include/asm-arm/serial.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * linux/include/asm-arm/serial.h
3 *
4 * Copyright (C) 1996 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 15-10-1996 RMK Created
12 */
13
14#ifndef __ASM_SERIAL_H
15#define __ASM_SERIAL_H
16
17#define BASE_BAUD (1843200 / 16)
18
19#endif
diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h
deleted file mode 100644
index 7bbf105463f1..000000000000
--- a/include/asm-arm/setup.h
+++ /dev/null
@@ -1,226 +0,0 @@
1/*
2 * linux/include/asm/setup.h
3 *
4 * Copyright (C) 1997-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Structure passed to kernel to tell it about the
11 * hardware it's running on. See Documentation/arm/Setup
12 * for more info.
13 */
14#ifndef __ASMARM_SETUP_H
15#define __ASMARM_SETUP_H
16
17#include <asm/types.h>
18
19#define COMMAND_LINE_SIZE 1024
20
21/* The list ends with an ATAG_NONE node. */
22#define ATAG_NONE 0x00000000
23
24struct tag_header {
25 __u32 size;
26 __u32 tag;
27};
28
29/* The list must start with an ATAG_CORE node */
30#define ATAG_CORE 0x54410001
31
32struct tag_core {
33 __u32 flags; /* bit 0 = read-only */
34 __u32 pagesize;
35 __u32 rootdev;
36};
37
38/* it is allowed to have multiple ATAG_MEM nodes */
39#define ATAG_MEM 0x54410002
40
41struct tag_mem32 {
42 __u32 size;
43 __u32 start; /* physical start address */
44};
45
46/* VGA text type displays */
47#define ATAG_VIDEOTEXT 0x54410003
48
49struct tag_videotext {
50 __u8 x;
51 __u8 y;
52 __u16 video_page;
53 __u8 video_mode;
54 __u8 video_cols;
55 __u16 video_ega_bx;
56 __u8 video_lines;
57 __u8 video_isvga;
58 __u16 video_points;
59};
60
61/* describes how the ramdisk will be used in kernel */
62#define ATAG_RAMDISK 0x54410004
63
64struct tag_ramdisk {
65 __u32 flags; /* bit 0 = load, bit 1 = prompt */
66 __u32 size; /* decompressed ramdisk size in _kilo_ bytes */
67 __u32 start; /* starting block of floppy-based RAM disk image */
68};
69
70/* describes where the compressed ramdisk image lives (virtual address) */
71/*
72 * this one accidentally used virtual addresses - as such,
73 * it's deprecated.
74 */
75#define ATAG_INITRD 0x54410005
76
77/* describes where the compressed ramdisk image lives (physical address) */
78#define ATAG_INITRD2 0x54420005
79
80struct tag_initrd {
81 __u32 start; /* physical start address */
82 __u32 size; /* size of compressed ramdisk image in bytes */
83};
84
85/* board serial number. "64 bits should be enough for everybody" */
86#define ATAG_SERIAL 0x54410006
87
88struct tag_serialnr {
89 __u32 low;
90 __u32 high;
91};
92
93/* board revision */
94#define ATAG_REVISION 0x54410007
95
96struct tag_revision {
97 __u32 rev;
98};
99
100/* initial values for vesafb-type framebuffers. see struct screen_info
101 * in include/linux/tty.h
102 */
103#define ATAG_VIDEOLFB 0x54410008
104
105struct tag_videolfb {
106 __u16 lfb_width;
107 __u16 lfb_height;
108 __u16 lfb_depth;
109 __u16 lfb_linelength;
110 __u32 lfb_base;
111 __u32 lfb_size;
112 __u8 red_size;
113 __u8 red_pos;
114 __u8 green_size;
115 __u8 green_pos;
116 __u8 blue_size;
117 __u8 blue_pos;
118 __u8 rsvd_size;
119 __u8 rsvd_pos;
120};
121
122/* command line: \0 terminated string */
123#define ATAG_CMDLINE 0x54410009
124
125struct tag_cmdline {
126 char cmdline[1]; /* this is the minimum size */
127};
128
129/* acorn RiscPC specific information */
130#define ATAG_ACORN 0x41000101
131
132struct tag_acorn {
133 __u32 memc_control_reg;
134 __u32 vram_pages;
135 __u8 sounddefault;
136 __u8 adfsdrives;
137};
138
139/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
140#define ATAG_MEMCLK 0x41000402
141
142struct tag_memclk {
143 __u32 fmemclk;
144};
145
146struct tag {
147 struct tag_header hdr;
148 union {
149 struct tag_core core;
150 struct tag_mem32 mem;
151 struct tag_videotext videotext;
152 struct tag_ramdisk ramdisk;
153 struct tag_initrd initrd;
154 struct tag_serialnr serialnr;
155 struct tag_revision revision;
156 struct tag_videolfb videolfb;
157 struct tag_cmdline cmdline;
158
159 /*
160 * Acorn specific
161 */
162 struct tag_acorn acorn;
163
164 /*
165 * DC21285 specific
166 */
167 struct tag_memclk memclk;
168 } u;
169};
170
171struct tagtable {
172 __u32 tag;
173 int (*parse)(const struct tag *);
174};
175
176#define tag_member_present(tag,member) \
177 ((unsigned long)(&((struct tag *)0L)->member + 1) \
178 <= (tag)->hdr.size * 4)
179
180#define tag_next(t) ((struct tag *)((__u32 *)(t) + (t)->hdr.size))
181#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
182
183#define for_each_tag(t,base) \
184 for (t = base; t->hdr.size; t = tag_next(t))
185
186#ifdef __KERNEL__
187
188#define __tag __used __attribute__((__section__(".taglist.init")))
189#define __tagtable(tag, fn) \
190static struct tagtable __tagtable_##fn __tag = { tag, fn }
191
192/*
193 * Memory map description
194 */
195#ifdef CONFIG_ARCH_LH7A40X
196# define NR_BANKS 16
197#else
198# define NR_BANKS 8
199#endif
200
201struct membank {
202 unsigned long start;
203 unsigned long size;
204 int node;
205};
206
207struct meminfo {
208 int nr_banks;
209 struct membank bank[NR_BANKS];
210};
211
212/*
213 * Early command line parameters.
214 */
215struct early_params {
216 const char *arg;
217 void (*fn)(char **p);
218};
219
220#define __early_param(name,fn) \
221static struct early_params __early_##fn __used \
222__attribute__((__section__(".early_param.init"))) = { name, fn }
223
224#endif /* __KERNEL__ */
225
226#endif
diff --git a/include/asm-arm/shmbuf.h b/include/asm-arm/shmbuf.h
deleted file mode 100644
index 2e5c67ba1c97..000000000000
--- a/include/asm-arm/shmbuf.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef _ASMARM_SHMBUF_H
2#define _ASMARM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASMARM_SHMBUF_H */
diff --git a/include/asm-arm/shmparam.h b/include/asm-arm/shmparam.h
deleted file mode 100644
index a5223b3a9bf9..000000000000
--- a/include/asm-arm/shmparam.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _ASMARM_SHMPARAM_H
2#define _ASMARM_SHMPARAM_H
3
4/*
5 * This should be the size of the virtually indexed cache/ways,
6 * or page size, whichever is greater since the cache aliases
7 * every size/ways bytes.
8 */
9#define SHMLBA (4 * PAGE_SIZE) /* attach addr a multiple of this */
10
11/*
12 * Enforce SHMLBA in shmat
13 */
14#define __ARCH_FORCE_SHMLBA
15
16#endif /* _ASMARM_SHMPARAM_H */
diff --git a/include/asm-arm/sigcontext.h b/include/asm-arm/sigcontext.h
deleted file mode 100644
index fc0b80b6a6fc..000000000000
--- a/include/asm-arm/sigcontext.h
+++ /dev/null
@@ -1,34 +0,0 @@
1#ifndef _ASMARM_SIGCONTEXT_H
2#define _ASMARM_SIGCONTEXT_H
3
4/*
5 * Signal context structure - contains all info to do with the state
6 * before the signal handler was invoked. Note: only add new entries
7 * to the end of the structure.
8 */
9struct sigcontext {
10 unsigned long trap_no;
11 unsigned long error_code;
12 unsigned long oldmask;
13 unsigned long arm_r0;
14 unsigned long arm_r1;
15 unsigned long arm_r2;
16 unsigned long arm_r3;
17 unsigned long arm_r4;
18 unsigned long arm_r5;
19 unsigned long arm_r6;
20 unsigned long arm_r7;
21 unsigned long arm_r8;
22 unsigned long arm_r9;
23 unsigned long arm_r10;
24 unsigned long arm_fp;
25 unsigned long arm_ip;
26 unsigned long arm_sp;
27 unsigned long arm_lr;
28 unsigned long arm_pc;
29 unsigned long arm_cpsr;
30 unsigned long fault_address;
31};
32
33
34#endif
diff --git a/include/asm-arm/siginfo.h b/include/asm-arm/siginfo.h
deleted file mode 100644
index 5e21852e6039..000000000000
--- a/include/asm-arm/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASMARM_SIGINFO_H
2#define _ASMARM_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif
diff --git a/include/asm-arm/signal.h b/include/asm-arm/signal.h
deleted file mode 100644
index d0fb487aba4f..000000000000
--- a/include/asm-arm/signal.h
+++ /dev/null
@@ -1,164 +0,0 @@
1#ifndef _ASMARM_SIGNAL_H
2#define _ASMARM_SIGNAL_H
3
4#include <linux/types.h>
5
6/* Avoid too many header ordering problems. */
7struct siginfo;
8
9#ifdef __KERNEL__
10/* Most things should be clean enough to redefine this at will, if care
11 is taken to make libc match. */
12
13#define _NSIG 64
14#define _NSIG_BPW 32
15#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
16
17typedef unsigned long old_sigset_t; /* at least 32 bits */
18
19typedef struct {
20 unsigned long sig[_NSIG_WORDS];
21} sigset_t;
22
23#else
24/* Here we must cater to libcs that poke about in kernel headers. */
25
26#define NSIG 32
27typedef unsigned long sigset_t;
28
29#endif /* __KERNEL__ */
30
31#define SIGHUP 1
32#define SIGINT 2
33#define SIGQUIT 3
34#define SIGILL 4
35#define SIGTRAP 5
36#define SIGABRT 6
37#define SIGIOT 6
38#define SIGBUS 7
39#define SIGFPE 8
40#define SIGKILL 9
41#define SIGUSR1 10
42#define SIGSEGV 11
43#define SIGUSR2 12
44#define SIGPIPE 13
45#define SIGALRM 14
46#define SIGTERM 15
47#define SIGSTKFLT 16
48#define SIGCHLD 17
49#define SIGCONT 18
50#define SIGSTOP 19
51#define SIGTSTP 20
52#define SIGTTIN 21
53#define SIGTTOU 22
54#define SIGURG 23
55#define SIGXCPU 24
56#define SIGXFSZ 25
57#define SIGVTALRM 26
58#define SIGPROF 27
59#define SIGWINCH 28
60#define SIGIO 29
61#define SIGPOLL SIGIO
62/*
63#define SIGLOST 29
64*/
65#define SIGPWR 30
66#define SIGSYS 31
67#define SIGUNUSED 31
68
69/* These should not be considered constants from userland. */
70#define SIGRTMIN 32
71#define SIGRTMAX _NSIG
72
73#define SIGSWI 32
74
75/*
76 * SA_FLAGS values:
77 *
78 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
79 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
80 * SA_SIGINFO deliver the signal with SIGINFO structs
81 * SA_THIRTYTWO delivers the signal in 32-bit mode, even if the task
82 * is running in 26-bit.
83 * SA_ONSTACK allows alternate signal stacks (see sigaltstack(2)).
84 * SA_RESTART flag to get restarting signals (which were the default long ago)
85 * SA_NODEFER prevents the current signal from being masked in the handler.
86 * SA_RESETHAND clears the handler when the signal is delivered.
87 *
88 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
89 * Unix names RESETHAND and NODEFER respectively.
90 */
91#define SA_NOCLDSTOP 0x00000001
92#define SA_NOCLDWAIT 0x00000002
93#define SA_SIGINFO 0x00000004
94#define SA_THIRTYTWO 0x02000000
95#define SA_RESTORER 0x04000000
96#define SA_ONSTACK 0x08000000
97#define SA_RESTART 0x10000000
98#define SA_NODEFER 0x40000000
99#define SA_RESETHAND 0x80000000
100
101#define SA_NOMASK SA_NODEFER
102#define SA_ONESHOT SA_RESETHAND
103
104
105/*
106 * sigaltstack controls
107 */
108#define SS_ONSTACK 1
109#define SS_DISABLE 2
110
111#define MINSIGSTKSZ 2048
112#define SIGSTKSZ 8192
113
114#include <asm-generic/signal.h>
115
116#ifdef __KERNEL__
117struct old_sigaction {
118 __sighandler_t sa_handler;
119 old_sigset_t sa_mask;
120 unsigned long sa_flags;
121 __sigrestore_t sa_restorer;
122};
123
124struct sigaction {
125 __sighandler_t sa_handler;
126 unsigned long sa_flags;
127 __sigrestore_t sa_restorer;
128 sigset_t sa_mask; /* mask last for extensibility */
129};
130
131struct k_sigaction {
132 struct sigaction sa;
133};
134
135#else
136/* Here we must cater to libcs that poke about in kernel headers. */
137
138struct sigaction {
139 union {
140 __sighandler_t _sa_handler;
141 void (*_sa_sigaction)(int, struct siginfo *, void *);
142 } _u;
143 sigset_t sa_mask;
144 unsigned long sa_flags;
145 void (*sa_restorer)(void);
146};
147
148#define sa_handler _u._sa_handler
149#define sa_sigaction _u._sa_sigaction
150
151#endif /* __KERNEL__ */
152
153typedef struct sigaltstack {
154 void __user *ss_sp;
155 int ss_flags;
156 size_t ss_size;
157} stack_t;
158
159#ifdef __KERNEL__
160#include <asm/sigcontext.h>
161#define ptrace_signal_deliver(regs, cookie) do { } while (0)
162#endif
163
164#endif
diff --git a/include/asm-arm/sizes.h b/include/asm-arm/sizes.h
deleted file mode 100644
index 503843db1565..000000000000
--- a/include/asm-arm/sizes.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 */
16/* DO NOT EDIT!! - this file automatically generated
17 * from .s file by awk -f s2h.awk
18 */
19/* Size definitions
20 * Copyright (C) ARM Limited 1998. All rights reserved.
21 */
22
23#ifndef __sizes_h
24#define __sizes_h 1
25
26/* handy sizes */
27#define SZ_16 0x00000010
28#define SZ_256 0x00000100
29#define SZ_512 0x00000200
30
31#define SZ_1K 0x00000400
32#define SZ_4K 0x00001000
33#define SZ_8K 0x00002000
34#define SZ_16K 0x00004000
35#define SZ_64K 0x00010000
36#define SZ_128K 0x00020000
37#define SZ_256K 0x00040000
38#define SZ_512K 0x00080000
39
40#define SZ_1M 0x00100000
41#define SZ_2M 0x00200000
42#define SZ_4M 0x00400000
43#define SZ_8M 0x00800000
44#define SZ_16M 0x01000000
45#define SZ_32M 0x02000000
46#define SZ_64M 0x04000000
47#define SZ_128M 0x08000000
48#define SZ_256M 0x10000000
49#define SZ_512M 0x20000000
50
51#define SZ_1G 0x40000000
52#define SZ_2G 0x80000000
53
54#endif
55
56/* END */
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
deleted file mode 100644
index 7fffa2404b8e..000000000000
--- a/include/asm-arm/smp.h
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * linux/include/asm-arm/smp.h
3 *
4 * Copyright (C) 2004-2005 ARM Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_SMP_H
11#define __ASM_ARM_SMP_H
12
13#include <linux/threads.h>
14#include <linux/cpumask.h>
15#include <linux/thread_info.h>
16
17#include <asm/arch/smp.h>
18
19#ifndef CONFIG_SMP
20# error "<asm-arm/smp.h> included in non-SMP build"
21#endif
22
23#define raw_smp_processor_id() (current_thread_info()->cpu)
24
25/*
26 * at the moment, there's not a big penalty for changing CPUs
27 * (the >big< penalty is running SMP in the first place)
28 */
29#define PROC_CHANGE_PENALTY 15
30
31struct seq_file;
32
33/*
34 * generate IPI list text
35 */
36extern void show_ipi_list(struct seq_file *p);
37
38/*
39 * Called from assembly code, this handles an IPI.
40 */
41asmlinkage void do_IPI(struct pt_regs *regs);
42
43/*
44 * Setup the SMP cpu_possible_map
45 */
46extern void smp_init_cpus(void);
47
48/*
49 * Move global data into per-processor storage.
50 */
51extern void smp_store_cpu_info(unsigned int cpuid);
52
53/*
54 * Raise an IPI cross call on CPUs in callmap.
55 */
56extern void smp_cross_call(cpumask_t callmap);
57
58/*
59 * Broadcast a timer interrupt to the other CPUs.
60 */
61extern void smp_send_timer(void);
62
63/*
64 * Broadcast a clock event to other CPUs.
65 */
66extern void smp_timer_broadcast(cpumask_t mask);
67
68/*
69 * Boot a secondary CPU, and assign it the specified idle task.
70 * This also gives us the initial stack to use for this CPU.
71 */
72extern int boot_secondary(unsigned int cpu, struct task_struct *);
73
74/*
75 * Called from platform specific assembly code, this is the
76 * secondary CPU entry point.
77 */
78asmlinkage void secondary_start_kernel(void);
79
80/*
81 * Perform platform specific initialisation of the specified CPU.
82 */
83extern void platform_secondary_init(unsigned int cpu);
84
85/*
86 * Initial data for bringing up a secondary CPU.
87 */
88struct secondary_data {
89 unsigned long pgdir;
90 void *stack;
91};
92extern struct secondary_data secondary_data;
93
94extern int __cpu_disable(void);
95extern int mach_cpu_disable(unsigned int cpu);
96
97extern void __cpu_die(unsigned int cpu);
98extern void cpu_die(void);
99
100extern void platform_cpu_die(unsigned int cpu);
101extern int platform_cpu_kill(unsigned int cpu);
102extern void platform_cpu_enable(unsigned int cpu);
103
104extern void arch_send_call_function_single_ipi(int cpu);
105extern void arch_send_call_function_ipi(cpumask_t mask);
106
107/*
108 * Local timer interrupt handling function (can be IPI'ed).
109 */
110extern void local_timer_interrupt(void);
111
112#ifdef CONFIG_LOCAL_TIMERS
113
114/*
115 * Stop a local timer interrupt.
116 */
117extern void local_timer_stop(unsigned int cpu);
118
119/*
120 * Platform provides this to acknowledge a local timer IRQ
121 */
122extern int local_timer_ack(void);
123
124#else
125
126static inline void local_timer_stop(unsigned int cpu)
127{
128}
129
130#endif
131
132/*
133 * Setup a local timer interrupt for a CPU.
134 */
135extern void local_timer_setup(unsigned int cpu);
136
137/*
138 * show local interrupt info
139 */
140extern void show_local_irqs(struct seq_file *);
141
142/*
143 * Called from assembly, this is the local timer IRQ handler
144 */
145asmlinkage void do_local_timer(struct pt_regs *);
146
147#endif /* ifndef __ASM_ARM_SMP_H */
diff --git a/include/asm-arm/socket.h b/include/asm-arm/socket.h
deleted file mode 100644
index 6817be9573a6..000000000000
--- a/include/asm-arm/socket.h
+++ /dev/null
@@ -1,57 +0,0 @@
1#ifndef _ASMARM_SOCKET_H
2#define _ASMARM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-arm/sockios.h b/include/asm-arm/sockios.h
deleted file mode 100644
index a2588a2512df..000000000000
--- a/include/asm-arm/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ARCH_ARM_SOCKIOS_H
2#define __ARCH_ARM_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif
diff --git a/include/asm-arm/sparsemem.h b/include/asm-arm/sparsemem.h
deleted file mode 100644
index 277158191a0d..000000000000
--- a/include/asm-arm/sparsemem.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef ASMARM_SPARSEMEM_H
2#define ASMARM_SPARSEMEM_H
3
4#include <asm/memory.h>
5
6#define MAX_PHYSADDR_BITS 32
7#define MAX_PHYSMEM_BITS 32
8#define SECTION_SIZE_BITS NODE_MEM_SIZE_BITS
9
10#endif
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
deleted file mode 100644
index 2b41ebbfa7ff..000000000000
--- a/include/asm-arm/spinlock.h
+++ /dev/null
@@ -1,224 +0,0 @@
1#ifndef __ASM_SPINLOCK_H
2#define __ASM_SPINLOCK_H
3
4#if __LINUX_ARM_ARCH__ < 6
5#error SMP not supported on pre-ARMv6 CPUs
6#endif
7
8/*
9 * ARMv6 Spin-locking.
10 *
11 * We exclusively read the old value. If it is zero, we may have
12 * won the lock, so we try exclusively storing it. A memory barrier
13 * is required after we get a lock, and before we release it, because
14 * V6 CPUs are assumed to have weakly ordered memory.
15 *
16 * Unlocked value: 0
17 * Locked value: 1
18 */
19
20#define __raw_spin_is_locked(x) ((x)->lock != 0)
21#define __raw_spin_unlock_wait(lock) \
22 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
23
24#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
25
26static inline void __raw_spin_lock(raw_spinlock_t *lock)
27{
28 unsigned long tmp;
29
30 __asm__ __volatile__(
31"1: ldrex %0, [%1]\n"
32" teq %0, #0\n"
33#ifdef CONFIG_CPU_32v6K
34" wfene\n"
35#endif
36" strexeq %0, %2, [%1]\n"
37" teqeq %0, #0\n"
38" bne 1b"
39 : "=&r" (tmp)
40 : "r" (&lock->lock), "r" (1)
41 : "cc");
42
43 smp_mb();
44}
45
46static inline int __raw_spin_trylock(raw_spinlock_t *lock)
47{
48 unsigned long tmp;
49
50 __asm__ __volatile__(
51" ldrex %0, [%1]\n"
52" teq %0, #0\n"
53" strexeq %0, %2, [%1]"
54 : "=&r" (tmp)
55 : "r" (&lock->lock), "r" (1)
56 : "cc");
57
58 if (tmp == 0) {
59 smp_mb();
60 return 1;
61 } else {
62 return 0;
63 }
64}
65
66static inline void __raw_spin_unlock(raw_spinlock_t *lock)
67{
68 smp_mb();
69
70 __asm__ __volatile__(
71" str %1, [%0]\n"
72#ifdef CONFIG_CPU_32v6K
73" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */
74" sev"
75#endif
76 :
77 : "r" (&lock->lock), "r" (0)
78 : "cc");
79}
80
81/*
82 * RWLOCKS
83 *
84 *
85 * Write locks are easy - we just set bit 31. When unlocking, we can
86 * just write zero since the lock is exclusively held.
87 */
88
89static inline void __raw_write_lock(raw_rwlock_t *rw)
90{
91 unsigned long tmp;
92
93 __asm__ __volatile__(
94"1: ldrex %0, [%1]\n"
95" teq %0, #0\n"
96#ifdef CONFIG_CPU_32v6K
97" wfene\n"
98#endif
99" strexeq %0, %2, [%1]\n"
100" teq %0, #0\n"
101" bne 1b"
102 : "=&r" (tmp)
103 : "r" (&rw->lock), "r" (0x80000000)
104 : "cc");
105
106 smp_mb();
107}
108
109static inline int __raw_write_trylock(raw_rwlock_t *rw)
110{
111 unsigned long tmp;
112
113 __asm__ __volatile__(
114"1: ldrex %0, [%1]\n"
115" teq %0, #0\n"
116" strexeq %0, %2, [%1]"
117 : "=&r" (tmp)
118 : "r" (&rw->lock), "r" (0x80000000)
119 : "cc");
120
121 if (tmp == 0) {
122 smp_mb();
123 return 1;
124 } else {
125 return 0;
126 }
127}
128
129static inline void __raw_write_unlock(raw_rwlock_t *rw)
130{
131 smp_mb();
132
133 __asm__ __volatile__(
134 "str %1, [%0]\n"
135#ifdef CONFIG_CPU_32v6K
136" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */
137" sev\n"
138#endif
139 :
140 : "r" (&rw->lock), "r" (0)
141 : "cc");
142}
143
144/* write_can_lock - would write_trylock() succeed? */
145#define __raw_write_can_lock(x) ((x)->lock == 0)
146
147/*
148 * Read locks are a bit more hairy:
149 * - Exclusively load the lock value.
150 * - Increment it.
151 * - Store new lock value if positive, and we still own this location.
152 * If the value is negative, we've already failed.
153 * - If we failed to store the value, we want a negative result.
154 * - If we failed, try again.
155 * Unlocking is similarly hairy. We may have multiple read locks
156 * currently active. However, we know we won't have any write
157 * locks.
158 */
159static inline void __raw_read_lock(raw_rwlock_t *rw)
160{
161 unsigned long tmp, tmp2;
162
163 __asm__ __volatile__(
164"1: ldrex %0, [%2]\n"
165" adds %0, %0, #1\n"
166" strexpl %1, %0, [%2]\n"
167#ifdef CONFIG_CPU_32v6K
168" wfemi\n"
169#endif
170" rsbpls %0, %1, #0\n"
171" bmi 1b"
172 : "=&r" (tmp), "=&r" (tmp2)
173 : "r" (&rw->lock)
174 : "cc");
175
176 smp_mb();
177}
178
179static inline void __raw_read_unlock(raw_rwlock_t *rw)
180{
181 unsigned long tmp, tmp2;
182
183 smp_mb();
184
185 __asm__ __volatile__(
186"1: ldrex %0, [%2]\n"
187" sub %0, %0, #1\n"
188" strex %1, %0, [%2]\n"
189" teq %1, #0\n"
190" bne 1b"
191#ifdef CONFIG_CPU_32v6K
192"\n cmp %0, #0\n"
193" mcreq p15, 0, %0, c7, c10, 4\n"
194" seveq"
195#endif
196 : "=&r" (tmp), "=&r" (tmp2)
197 : "r" (&rw->lock)
198 : "cc");
199}
200
201static inline int __raw_read_trylock(raw_rwlock_t *rw)
202{
203 unsigned long tmp, tmp2 = 1;
204
205 __asm__ __volatile__(
206"1: ldrex %0, [%2]\n"
207" adds %0, %0, #1\n"
208" strexpl %1, %0, [%2]\n"
209 : "=&r" (tmp), "+r" (tmp2)
210 : "r" (&rw->lock)
211 : "cc");
212
213 smp_mb();
214 return tmp2 == 0;
215}
216
217/* read_can_lock - would read_trylock() succeed? */
218#define __raw_read_can_lock(x) ((x)->lock < 0x80000000)
219
220#define _raw_spin_relax(lock) cpu_relax()
221#define _raw_read_relax(lock) cpu_relax()
222#define _raw_write_relax(lock) cpu_relax()
223
224#endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-arm/spinlock_types.h b/include/asm-arm/spinlock_types.h
deleted file mode 100644
index 43e83f6d2ee5..000000000000
--- a/include/asm-arm/spinlock_types.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 volatile unsigned int lock;
10} raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
13
14typedef struct {
15 volatile unsigned int lock;
16} raw_rwlock_t;
17
18#define __RAW_RW_LOCK_UNLOCKED { 0 }
19
20#endif
diff --git a/include/asm-arm/stat.h b/include/asm-arm/stat.h
deleted file mode 100644
index 42c0c13999d5..000000000000
--- a/include/asm-arm/stat.h
+++ /dev/null
@@ -1,87 +0,0 @@
1#ifndef _ASMARM_STAT_H
2#define _ASMARM_STAT_H
3
4struct __old_kernel_stat {
5 unsigned short st_dev;
6 unsigned short st_ino;
7 unsigned short st_mode;
8 unsigned short st_nlink;
9 unsigned short st_uid;
10 unsigned short st_gid;
11 unsigned short st_rdev;
12 unsigned long st_size;
13 unsigned long st_atime;
14 unsigned long st_mtime;
15 unsigned long st_ctime;
16};
17
18#define STAT_HAVE_NSEC
19
20struct stat {
21#if defined(__ARMEB__)
22 unsigned short st_dev;
23 unsigned short __pad1;
24#else
25 unsigned long st_dev;
26#endif
27 unsigned long st_ino;
28 unsigned short st_mode;
29 unsigned short st_nlink;
30 unsigned short st_uid;
31 unsigned short st_gid;
32#if defined(__ARMEB__)
33 unsigned short st_rdev;
34 unsigned short __pad2;
35#else
36 unsigned long st_rdev;
37#endif
38 unsigned long st_size;
39 unsigned long st_blksize;
40 unsigned long st_blocks;
41 unsigned long st_atime;
42 unsigned long st_atime_nsec;
43 unsigned long st_mtime;
44 unsigned long st_mtime_nsec;
45 unsigned long st_ctime;
46 unsigned long st_ctime_nsec;
47 unsigned long __unused4;
48 unsigned long __unused5;
49};
50
51/* This matches struct stat64 in glibc2.1, hence the absolutely
52 * insane amounts of padding around dev_t's.
53 * Note: The kernel zero's the padded region because glibc might read them
54 * in the hope that the kernel has stretched to using larger sizes.
55 */
56struct stat64 {
57 unsigned long long st_dev;
58 unsigned char __pad0[4];
59
60#define STAT64_HAS_BROKEN_ST_INO 1
61 unsigned long __st_ino;
62 unsigned int st_mode;
63 unsigned int st_nlink;
64
65 unsigned long st_uid;
66 unsigned long st_gid;
67
68 unsigned long long st_rdev;
69 unsigned char __pad3[4];
70
71 long long st_size;
72 unsigned long st_blksize;
73 unsigned long long st_blocks; /* Number 512-byte blocks allocated. */
74
75 unsigned long st_atime;
76 unsigned long st_atime_nsec;
77
78 unsigned long st_mtime;
79 unsigned long st_mtime_nsec;
80
81 unsigned long st_ctime;
82 unsigned long st_ctime_nsec;
83
84 unsigned long long st_ino;
85};
86
87#endif
diff --git a/include/asm-arm/statfs.h b/include/asm-arm/statfs.h
deleted file mode 100644
index a02e6a8c3d70..000000000000
--- a/include/asm-arm/statfs.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef _ASMARM_STATFS_H
2#define _ASMARM_STATFS_H
3
4#ifndef __KERNEL_STRICT_NAMES
5# include <linux/types.h>
6typedef __kernel_fsid_t fsid_t;
7#endif
8
9struct statfs {
10 __u32 f_type;
11 __u32 f_bsize;
12 __u32 f_blocks;
13 __u32 f_bfree;
14 __u32 f_bavail;
15 __u32 f_files;
16 __u32 f_ffree;
17 __kernel_fsid_t f_fsid;
18 __u32 f_namelen;
19 __u32 f_frsize;
20 __u32 f_spare[5];
21};
22
23/*
24 * With EABI there is 4 bytes of padding added to this structure.
25 * Let's pack it so the padding goes away to simplify dual ABI support.
26 * Note that user space does NOT have to pack this structure.
27 */
28struct statfs64 {
29 __u32 f_type;
30 __u32 f_bsize;
31 __u64 f_blocks;
32 __u64 f_bfree;
33 __u64 f_bavail;
34 __u64 f_files;
35 __u64 f_ffree;
36 __kernel_fsid_t f_fsid;
37 __u32 f_namelen;
38 __u32 f_frsize;
39 __u32 f_spare[5];
40} __attribute__ ((packed,aligned(4)));
41
42#endif
diff --git a/include/asm-arm/string.h b/include/asm-arm/string.h
deleted file mode 100644
index e50c4a39b699..000000000000
--- a/include/asm-arm/string.h
+++ /dev/null
@@ -1,50 +0,0 @@
1#ifndef __ASM_ARM_STRING_H
2#define __ASM_ARM_STRING_H
3
4/*
5 * We don't do inline string functions, since the
6 * optimised inline asm versions are not small.
7 */
8
9#define __HAVE_ARCH_STRRCHR
10extern char * strrchr(const char * s, int c);
11
12#define __HAVE_ARCH_STRCHR
13extern char * strchr(const char * s, int c);
14
15#define __HAVE_ARCH_MEMCPY
16extern void * memcpy(void *, const void *, __kernel_size_t);
17
18#define __HAVE_ARCH_MEMMOVE
19extern void * memmove(void *, const void *, __kernel_size_t);
20
21#define __HAVE_ARCH_MEMCHR
22extern void * memchr(const void *, int, __kernel_size_t);
23
24#define __HAVE_ARCH_MEMZERO
25#define __HAVE_ARCH_MEMSET
26extern void * memset(void *, int, __kernel_size_t);
27
28extern void __memzero(void *ptr, __kernel_size_t n);
29
30#define memset(p,v,n) \
31 ({ \
32 void *__p = (p); size_t __n = n; \
33 if ((__n) != 0) { \
34 if (__builtin_constant_p((v)) && (v) == 0) \
35 __memzero((__p),(__n)); \
36 else \
37 memset((__p),(v),(__n)); \
38 } \
39 (__p); \
40 })
41
42#define memzero(p,n) \
43 ({ \
44 void *__p = (p); size_t __n = n; \
45 if ((__n) != 0) \
46 __memzero((__p),(__n)); \
47 (__p); \
48 })
49
50#endif
diff --git a/include/asm-arm/suspend.h b/include/asm-arm/suspend.h
deleted file mode 100644
index cf0d0bdee74d..000000000000
--- a/include/asm-arm/suspend.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _ASMARM_SUSPEND_H
2#define _ASMARM_SUSPEND_H
3
4#endif
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
deleted file mode 100644
index 514af792a598..000000000000
--- a/include/asm-arm/system.h
+++ /dev/null
@@ -1,388 +0,0 @@
1#ifndef __ASM_ARM_SYSTEM_H
2#define __ASM_ARM_SYSTEM_H
3
4#ifdef __KERNEL__
5
6#include <asm/memory.h>
7
8#define CPU_ARCH_UNKNOWN 0
9#define CPU_ARCH_ARMv3 1
10#define CPU_ARCH_ARMv4 2
11#define CPU_ARCH_ARMv4T 3
12#define CPU_ARCH_ARMv5 4
13#define CPU_ARCH_ARMv5T 5
14#define CPU_ARCH_ARMv5TE 6
15#define CPU_ARCH_ARMv5TEJ 7
16#define CPU_ARCH_ARMv6 8
17#define CPU_ARCH_ARMv7 9
18
19/*
20 * CR1 bits (CP#15 CR1)
21 */
22#define CR_M (1 << 0) /* MMU enable */
23#define CR_A (1 << 1) /* Alignment abort enable */
24#define CR_C (1 << 2) /* Dcache enable */
25#define CR_W (1 << 3) /* Write buffer enable */
26#define CR_P (1 << 4) /* 32-bit exception handler */
27#define CR_D (1 << 5) /* 32-bit data address range */
28#define CR_L (1 << 6) /* Implementation defined */
29#define CR_B (1 << 7) /* Big endian */
30#define CR_S (1 << 8) /* System MMU protection */
31#define CR_R (1 << 9) /* ROM MMU protection */
32#define CR_F (1 << 10) /* Implementation defined */
33#define CR_Z (1 << 11) /* Implementation defined */
34#define CR_I (1 << 12) /* Icache enable */
35#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
36#define CR_RR (1 << 14) /* Round Robin cache replacement */
37#define CR_L4 (1 << 15) /* LDR pc can set T bit */
38#define CR_DT (1 << 16)
39#define CR_IT (1 << 18)
40#define CR_ST (1 << 19)
41#define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */
42#define CR_U (1 << 22) /* Unaligned access operation */
43#define CR_XP (1 << 23) /* Extended page tables */
44#define CR_VE (1 << 24) /* Vectored interrupts */
45
46#define CPUID_ID 0
47#define CPUID_CACHETYPE 1
48#define CPUID_TCM 2
49#define CPUID_TLBTYPE 3
50
51/*
52 * This is used to ensure the compiler did actually allocate the register we
53 * asked it for some inline assembly sequences. Apparently we can't trust
54 * the compiler from one version to another so a bit of paranoia won't hurt.
55 * This string is meant to be concatenated with the inline asm string and
56 * will cause compilation to stop on mismatch.
57 * (for details, see gcc PR 15089)
58 */
59#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
60
61#ifndef __ASSEMBLY__
62
63#include <linux/linkage.h>
64#include <linux/stringify.h>
65#include <linux/irqflags.h>
66
67#ifdef CONFIG_CPU_CP15
68#define read_cpuid(reg) \
69 ({ \
70 unsigned int __val; \
71 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
72 : "=r" (__val) \
73 : \
74 : "cc"); \
75 __val; \
76 })
77#else
78extern unsigned int processor_id;
79#define read_cpuid(reg) (processor_id)
80#endif
81
82/*
83 * The CPU ID never changes at run time, so we might as well tell the
84 * compiler that it's constant. Use this function to read the CPU ID
85 * rather than directly reading processor_id or read_cpuid() directly.
86 */
87static inline unsigned int read_cpuid_id(void) __attribute_const__;
88
89static inline unsigned int read_cpuid_id(void)
90{
91 return read_cpuid(CPUID_ID);
92}
93
94#define __exception __attribute__((section(".exception.text")))
95
96struct thread_info;
97struct task_struct;
98
99/* information about the system we're running on */
100extern unsigned int system_rev;
101extern unsigned int system_serial_low;
102extern unsigned int system_serial_high;
103extern unsigned int mem_fclk_21285;
104
105struct pt_regs;
106
107void die(const char *msg, struct pt_regs *regs, int err)
108 __attribute__((noreturn));
109
110struct siginfo;
111void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
112 unsigned long err, unsigned long trap);
113
114void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
115 struct pt_regs *),
116 int sig, const char *name);
117
118#define xchg(ptr,x) \
119 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
120
121extern asmlinkage void __backtrace(void);
122extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
123
124struct mm_struct;
125extern void show_pte(struct mm_struct *mm, unsigned long addr);
126extern void __show_regs(struct pt_regs *);
127
128extern int cpu_architecture(void);
129extern void cpu_init(void);
130
131void arm_machine_restart(char mode);
132extern void (*arm_pm_restart)(char str);
133
134/*
135 * Intel's XScale3 core supports some v6 features (supersections, L2)
136 * but advertises itself as v5 as it does not support the v6 ISA. For
137 * this reason, we need a way to explicitly test for this type of CPU.
138 */
139#ifndef CONFIG_CPU_XSC3
140#define cpu_is_xsc3() 0
141#else
142static inline int cpu_is_xsc3(void)
143{
144 extern unsigned int processor_id;
145
146 if ((processor_id & 0xffffe000) == 0x69056000)
147 return 1;
148
149 return 0;
150}
151#endif
152
153#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
154#define cpu_is_xscale() 0
155#else
156#define cpu_is_xscale() 1
157#endif
158
159#define UDBG_UNDEFINED (1 << 0)
160#define UDBG_SYSCALL (1 << 1)
161#define UDBG_BADABORT (1 << 2)
162#define UDBG_SEGV (1 << 3)
163#define UDBG_BUS (1 << 4)
164
165extern unsigned int user_debug;
166
167#if __LINUX_ARM_ARCH__ >= 4
168#define vectors_high() (cr_alignment & CR_V)
169#else
170#define vectors_high() (0)
171#endif
172
173#if __LINUX_ARM_ARCH__ >= 7
174#define isb() __asm__ __volatile__ ("isb" : : : "memory")
175#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
176#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
177#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
178#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
179 : : "r" (0) : "memory")
180#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
181 : : "r" (0) : "memory")
182#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
183 : : "r" (0) : "memory")
184#else
185#define isb() __asm__ __volatile__ ("" : : : "memory")
186#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
187 : : "r" (0) : "memory")
188#define dmb() __asm__ __volatile__ ("" : : : "memory")
189#endif
190
191#ifndef CONFIG_SMP
192#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
193#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
194#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
195#define smp_mb() barrier()
196#define smp_rmb() barrier()
197#define smp_wmb() barrier()
198#else
199#define mb() dmb()
200#define rmb() dmb()
201#define wmb() dmb()
202#define smp_mb() dmb()
203#define smp_rmb() dmb()
204#define smp_wmb() dmb()
205#endif
206#define read_barrier_depends() do { } while(0)
207#define smp_read_barrier_depends() do { } while(0)
208
209#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
210#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
211
212extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
213extern unsigned long cr_alignment; /* defined in entry-armv.S */
214
215static inline unsigned int get_cr(void)
216{
217 unsigned int val;
218 asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
219 return val;
220}
221
222static inline void set_cr(unsigned int val)
223{
224 asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
225 : : "r" (val) : "cc");
226 isb();
227}
228
229#ifndef CONFIG_SMP
230extern void adjust_cr(unsigned long mask, unsigned long set);
231#endif
232
233#define CPACC_FULL(n) (3 << (n * 2))
234#define CPACC_SVC(n) (1 << (n * 2))
235#define CPACC_DISABLE(n) (0 << (n * 2))
236
237static inline unsigned int get_copro_access(void)
238{
239 unsigned int val;
240 asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
241 : "=r" (val) : : "cc");
242 return val;
243}
244
245static inline void set_copro_access(unsigned int val)
246{
247 asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
248 : : "r" (val) : "cc");
249 isb();
250}
251
252/*
253 * switch_mm() may do a full cache flush over the context switch,
254 * so enable interrupts over the context switch to avoid high
255 * latency.
256 */
257#define __ARCH_WANT_INTERRUPTS_ON_CTXSW
258
259/*
260 * switch_to(prev, next) should switch from task `prev' to `next'
261 * `prev' will never be the same as `next'. schedule() itself
262 * contains the memory barrier to tell GCC not to cache `current'.
263 */
264extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *);
265
266#define switch_to(prev,next,last) \
267do { \
268 last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \
269} while (0)
270
271#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
272/*
273 * On the StrongARM, "swp" is terminally broken since it bypasses the
274 * cache totally. This means that the cache becomes inconsistent, and,
275 * since we use normal loads/stores as well, this is really bad.
276 * Typically, this causes oopsen in filp_close, but could have other,
277 * more disasterous effects. There are two work-arounds:
278 * 1. Disable interrupts and emulate the atomic swap
279 * 2. Clean the cache, perform atomic swap, flush the cache
280 *
281 * We choose (1) since its the "easiest" to achieve here and is not
282 * dependent on the processor type.
283 *
284 * NOTE that this solution won't work on an SMP system, so explcitly
285 * forbid it here.
286 */
287#define swp_is_buggy
288#endif
289
290static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
291{
292 extern void __bad_xchg(volatile void *, int);
293 unsigned long ret;
294#ifdef swp_is_buggy
295 unsigned long flags;
296#endif
297#if __LINUX_ARM_ARCH__ >= 6
298 unsigned int tmp;
299#endif
300
301 switch (size) {
302#if __LINUX_ARM_ARCH__ >= 6
303 case 1:
304 asm volatile("@ __xchg1\n"
305 "1: ldrexb %0, [%3]\n"
306 " strexb %1, %2, [%3]\n"
307 " teq %1, #0\n"
308 " bne 1b"
309 : "=&r" (ret), "=&r" (tmp)
310 : "r" (x), "r" (ptr)
311 : "memory", "cc");
312 break;
313 case 4:
314 asm volatile("@ __xchg4\n"
315 "1: ldrex %0, [%3]\n"
316 " strex %1, %2, [%3]\n"
317 " teq %1, #0\n"
318 " bne 1b"
319 : "=&r" (ret), "=&r" (tmp)
320 : "r" (x), "r" (ptr)
321 : "memory", "cc");
322 break;
323#elif defined(swp_is_buggy)
324#ifdef CONFIG_SMP
325#error SMP is not supported on this platform
326#endif
327 case 1:
328 raw_local_irq_save(flags);
329 ret = *(volatile unsigned char *)ptr;
330 *(volatile unsigned char *)ptr = x;
331 raw_local_irq_restore(flags);
332 break;
333
334 case 4:
335 raw_local_irq_save(flags);
336 ret = *(volatile unsigned long *)ptr;
337 *(volatile unsigned long *)ptr = x;
338 raw_local_irq_restore(flags);
339 break;
340#else
341 case 1:
342 asm volatile("@ __xchg1\n"
343 " swpb %0, %1, [%2]"
344 : "=&r" (ret)
345 : "r" (x), "r" (ptr)
346 : "memory", "cc");
347 break;
348 case 4:
349 asm volatile("@ __xchg4\n"
350 " swp %0, %1, [%2]"
351 : "=&r" (ret)
352 : "r" (x), "r" (ptr)
353 : "memory", "cc");
354 break;
355#endif
356 default:
357 __bad_xchg(ptr, size), ret = 0;
358 break;
359 }
360
361 return ret;
362}
363
364extern void disable_hlt(void);
365extern void enable_hlt(void);
366
367#include <asm-generic/cmpxchg-local.h>
368
369/*
370 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
371 * them available.
372 */
373#define cmpxchg_local(ptr, o, n) \
374 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
375 (unsigned long)(n), sizeof(*(ptr))))
376#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
377
378#ifndef CONFIG_SMP
379#include <asm-generic/cmpxchg.h>
380#endif
381
382#endif /* __ASSEMBLY__ */
383
384#define arch_align_stack(x) (x)
385
386#endif /* __KERNEL__ */
387
388#endif
diff --git a/include/asm-arm/termbits.h b/include/asm-arm/termbits.h
deleted file mode 100644
index f784d11f40b5..000000000000
--- a/include/asm-arm/termbits.h
+++ /dev/null
@@ -1,197 +0,0 @@
1#ifndef __ASM_ARM_TERMBITS_H
2#define __ASM_ARM_TERMBITS_H
3
4typedef unsigned char cc_t;
5typedef unsigned int speed_t;
6typedef unsigned int tcflag_t;
7
8#define NCCS 19
9struct termios {
10 tcflag_t c_iflag; /* input mode flags */
11 tcflag_t c_oflag; /* output mode flags */
12 tcflag_t c_cflag; /* control mode flags */
13 tcflag_t c_lflag; /* local mode flags */
14 cc_t c_line; /* line discipline */
15 cc_t c_cc[NCCS]; /* control characters */
16};
17
18struct termios2 {
19 tcflag_t c_iflag; /* input mode flags */
20 tcflag_t c_oflag; /* output mode flags */
21 tcflag_t c_cflag; /* control mode flags */
22 tcflag_t c_lflag; /* local mode flags */
23 cc_t c_line; /* line discipline */
24 cc_t c_cc[NCCS]; /* control characters */
25 speed_t c_ispeed; /* input speed */
26 speed_t c_ospeed; /* output speed */
27};
28
29struct ktermios {
30 tcflag_t c_iflag; /* input mode flags */
31 tcflag_t c_oflag; /* output mode flags */
32 tcflag_t c_cflag; /* control mode flags */
33 tcflag_t c_lflag; /* local mode flags */
34 cc_t c_line; /* line discipline */
35 cc_t c_cc[NCCS]; /* control characters */
36 speed_t c_ispeed; /* input speed */
37 speed_t c_ospeed; /* output speed */
38};
39
40
41/* c_cc characters */
42#define VINTR 0
43#define VQUIT 1
44#define VERASE 2
45#define VKILL 3
46#define VEOF 4
47#define VTIME 5
48#define VMIN 6
49#define VSWTC 7
50#define VSTART 8
51#define VSTOP 9
52#define VSUSP 10
53#define VEOL 11
54#define VREPRINT 12
55#define VDISCARD 13
56#define VWERASE 14
57#define VLNEXT 15
58#define VEOL2 16
59
60/* c_iflag bits */
61#define IGNBRK 0000001
62#define BRKINT 0000002
63#define IGNPAR 0000004
64#define PARMRK 0000010
65#define INPCK 0000020
66#define ISTRIP 0000040
67#define INLCR 0000100
68#define IGNCR 0000200
69#define ICRNL 0000400
70#define IUCLC 0001000
71#define IXON 0002000
72#define IXANY 0004000
73#define IXOFF 0010000
74#define IMAXBEL 0020000
75#define IUTF8 0040000
76
77/* c_oflag bits */
78#define OPOST 0000001
79#define OLCUC 0000002
80#define ONLCR 0000004
81#define OCRNL 0000010
82#define ONOCR 0000020
83#define ONLRET 0000040
84#define OFILL 0000100
85#define OFDEL 0000200
86#define NLDLY 0000400
87#define NL0 0000000
88#define NL1 0000400
89#define CRDLY 0003000
90#define CR0 0000000
91#define CR1 0001000
92#define CR2 0002000
93#define CR3 0003000
94#define TABDLY 0014000
95#define TAB0 0000000
96#define TAB1 0004000
97#define TAB2 0010000
98#define TAB3 0014000
99#define XTABS 0014000
100#define BSDLY 0020000
101#define BS0 0000000
102#define BS1 0020000
103#define VTDLY 0040000
104#define VT0 0000000
105#define VT1 0040000
106#define FFDLY 0100000
107#define FF0 0000000
108#define FF1 0100000
109
110/* c_cflag bit meaning */
111#define CBAUD 0010017
112#define B0 0000000 /* hang up */
113#define B50 0000001
114#define B75 0000002
115#define B110 0000003
116#define B134 0000004
117#define B150 0000005
118#define B200 0000006
119#define B300 0000007
120#define B600 0000010
121#define B1200 0000011
122#define B1800 0000012
123#define B2400 0000013
124#define B4800 0000014
125#define B9600 0000015
126#define B19200 0000016
127#define B38400 0000017
128#define EXTA B19200
129#define EXTB B38400
130#define CSIZE 0000060
131#define CS5 0000000
132#define CS6 0000020
133#define CS7 0000040
134#define CS8 0000060
135#define CSTOPB 0000100
136#define CREAD 0000200
137#define PARENB 0000400
138#define PARODD 0001000
139#define HUPCL 0002000
140#define CLOCAL 0004000
141#define CBAUDEX 0010000
142#define BOTHER 0010000
143#define B57600 0010001
144#define B115200 0010002
145#define B230400 0010003
146#define B460800 0010004
147#define B500000 0010005
148#define B576000 0010006
149#define B921600 0010007
150#define B1000000 0010010
151#define B1152000 0010011
152#define B1500000 0010012
153#define B2000000 0010013
154#define B2500000 0010014
155#define B3000000 0010015
156#define B3500000 0010016
157#define B4000000 0010017
158#define CIBAUD 002003600000 /* input baud rate */
159#define CMSPAR 010000000000 /* mark or space (stick) parity */
160#define CRTSCTS 020000000000 /* flow control */
161
162#define IBSHIFT 16
163
164/* c_lflag bits */
165#define ISIG 0000001
166#define ICANON 0000002
167#define XCASE 0000004
168#define ECHO 0000010
169#define ECHOE 0000020
170#define ECHOK 0000040
171#define ECHONL 0000100
172#define NOFLSH 0000200
173#define TOSTOP 0000400
174#define ECHOCTL 0001000
175#define ECHOPRT 0002000
176#define ECHOKE 0004000
177#define FLUSHO 0010000
178#define PENDIN 0040000
179#define IEXTEN 0100000
180
181/* tcflow() and TCXONC use these */
182#define TCOOFF 0
183#define TCOON 1
184#define TCIOFF 2
185#define TCION 3
186
187/* tcflush() and TCFLSH use these */
188#define TCIFLUSH 0
189#define TCOFLUSH 1
190#define TCIOFLUSH 2
191
192/* tcsetattr uses these */
193#define TCSANOW 0
194#define TCSADRAIN 1
195#define TCSAFLUSH 2
196
197#endif /* __ASM_ARM_TERMBITS_H */
diff --git a/include/asm-arm/termios.h b/include/asm-arm/termios.h
deleted file mode 100644
index 293e3f1bc3f2..000000000000
--- a/include/asm-arm/termios.h
+++ /dev/null
@@ -1,92 +0,0 @@
1#ifndef __ASM_ARM_TERMIOS_H
2#define __ASM_ARM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
51
52#ifdef __KERNEL__
53
54/*
55 * Translate a "termio" structure into a "termios". Ugh.
56 */
57#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
58 unsigned short __tmp; \
59 get_user(__tmp,&(termio)->x); \
60 *(unsigned short *) &(termios)->x = __tmp; \
61}
62
63#define user_termio_to_kernel_termios(termios, termio) \
64({ \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
67 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
68 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
69 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
70})
71
72/*
73 * Translate a "termios" structure into a "termio". Ugh.
74 */
75#define kernel_termios_to_user_termio(termio, termios) \
76({ \
77 put_user((termios)->c_iflag, &(termio)->c_iflag); \
78 put_user((termios)->c_oflag, &(termio)->c_oflag); \
79 put_user((termios)->c_cflag, &(termio)->c_cflag); \
80 put_user((termios)->c_lflag, &(termio)->c_lflag); \
81 put_user((termios)->c_line, &(termio)->c_line); \
82 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
83})
84
85#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
86#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
88#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
89
90#endif /* __KERNEL__ */
91
92#endif /* __ASM_ARM_TERMIOS_H */
diff --git a/include/asm-arm/therm.h b/include/asm-arm/therm.h
deleted file mode 100644
index e51c923ecdf3..000000000000
--- a/include/asm-arm/therm.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * linux/include/asm-arm/therm.h: Definitions for Dallas Semiconductor
3 * DS1620 thermometer driver (as used in the Rebel.com NetWinder)
4 */
5#ifndef __ASM_THERM_H
6#define __ASM_THERM_H
7
8/* ioctl numbers for /dev/therm */
9#define CMD_SET_THERMOSTATE 0x53
10#define CMD_GET_THERMOSTATE 0x54
11#define CMD_GET_STATUS 0x56
12#define CMD_GET_TEMPERATURE 0x57
13#define CMD_SET_THERMOSTATE2 0x58
14#define CMD_GET_THERMOSTATE2 0x59
15#define CMD_GET_TEMPERATURE2 0x5a
16#define CMD_GET_FAN 0x5b
17#define CMD_SET_FAN 0x5c
18
19#define FAN_OFF 0
20#define FAN_ON 1
21#define FAN_ALWAYS_ON 2
22
23struct therm {
24 int hi;
25 int lo;
26};
27
28#endif
diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h
deleted file mode 100644
index d4be2d646160..000000000000
--- a/include/asm-arm/thread_info.h
+++ /dev/null
@@ -1,153 +0,0 @@
1/*
2 * linux/include/asm-arm/thread_info.h
3 *
4 * Copyright (C) 2002 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_THREAD_INFO_H
11#define __ASM_ARM_THREAD_INFO_H
12
13#ifdef __KERNEL__
14
15#include <linux/compiler.h>
16#include <asm/fpstate.h>
17
18#define THREAD_SIZE_ORDER 1
19#define THREAD_SIZE 8192
20#define THREAD_START_SP (THREAD_SIZE - 8)
21
22#ifndef __ASSEMBLY__
23
24struct task_struct;
25struct exec_domain;
26
27#include <asm/types.h>
28#include <asm/domain.h>
29
30typedef unsigned long mm_segment_t;
31
32struct cpu_context_save {
33 __u32 r4;
34 __u32 r5;
35 __u32 r6;
36 __u32 r7;
37 __u32 r8;
38 __u32 r9;
39 __u32 sl;
40 __u32 fp;
41 __u32 sp;
42 __u32 pc;
43 __u32 extra[2]; /* Xscale 'acc' register, etc */
44};
45
46/*
47 * low level task data that entry.S needs immediate access to.
48 * __switch_to() assumes cpu_context follows immediately after cpu_domain.
49 */
50struct thread_info {
51 unsigned long flags; /* low level flags */
52 int preempt_count; /* 0 => preemptable, <0 => bug */
53 mm_segment_t addr_limit; /* address limit */
54 struct task_struct *task; /* main task structure */
55 struct exec_domain *exec_domain; /* execution domain */
56 __u32 cpu; /* cpu */
57 __u32 cpu_domain; /* cpu domain */
58 struct cpu_context_save cpu_context; /* cpu context */
59 __u32 syscall; /* syscall number */
60 __u8 used_cp[16]; /* thread used copro */
61 unsigned long tp_value;
62 struct crunch_state crunchstate;
63 union fp_state fpstate __attribute__((aligned(8)));
64 union vfp_state vfpstate;
65#ifdef CONFIG_ARM_THUMBEE
66 unsigned long thumbee_state; /* ThumbEE Handler Base register */
67#endif
68 struct restart_block restart_block;
69};
70
71#define INIT_THREAD_INFO(tsk) \
72{ \
73 .task = &tsk, \
74 .exec_domain = &default_exec_domain, \
75 .flags = 0, \
76 .preempt_count = 1, \
77 .addr_limit = KERNEL_DS, \
78 .cpu_domain = domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \
79 domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
80 domain_val(DOMAIN_IO, DOMAIN_CLIENT), \
81 .restart_block = { \
82 .fn = do_no_restart_syscall, \
83 }, \
84}
85
86#define init_thread_info (init_thread_union.thread_info)
87#define init_stack (init_thread_union.stack)
88
89/*
90 * how to get the thread information struct from C
91 */
92static inline struct thread_info *current_thread_info(void) __attribute_const__;
93
94static inline struct thread_info *current_thread_info(void)
95{
96 register unsigned long sp asm ("sp");
97 return (struct thread_info *)(sp & ~(THREAD_SIZE - 1));
98}
99
100#define thread_saved_pc(tsk) \
101 ((unsigned long)(pc_pointer(task_thread_info(tsk)->cpu_context.pc)))
102#define thread_saved_fp(tsk) \
103 ((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
104
105extern void crunch_task_disable(struct thread_info *);
106extern void crunch_task_copy(struct thread_info *, void *);
107extern void crunch_task_restore(struct thread_info *, void *);
108extern void crunch_task_release(struct thread_info *);
109
110extern void iwmmxt_task_disable(struct thread_info *);
111extern void iwmmxt_task_copy(struct thread_info *, void *);
112extern void iwmmxt_task_restore(struct thread_info *, void *);
113extern void iwmmxt_task_release(struct thread_info *);
114extern void iwmmxt_task_switch(struct thread_info *);
115
116#endif
117
118/*
119 * We use bit 30 of the preempt_count to indicate that kernel
120 * preemption is occurring. See include/asm-arm/hardirq.h.
121 */
122#define PREEMPT_ACTIVE 0x40000000
123
124/*
125 * thread information flags:
126 * TIF_SYSCALL_TRACE - syscall trace active
127 * TIF_SIGPENDING - signal pending
128 * TIF_NEED_RESCHED - rescheduling necessary
129 * TIF_USEDFPU - FPU was used by this task this quantum (SMP)
130 * TIF_POLLING_NRFLAG - true if poll_idle() is polling TIF_NEED_RESCHED
131 */
132#define TIF_SIGPENDING 0
133#define TIF_NEED_RESCHED 1
134#define TIF_SYSCALL_TRACE 8
135#define TIF_POLLING_NRFLAG 16
136#define TIF_USING_IWMMXT 17
137#define TIF_MEMDIE 18
138#define TIF_FREEZE 19
139
140#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
141#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
142#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
143#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
144#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
145#define _TIF_FREEZE (1 << TIF_FREEZE)
146
147/*
148 * Change these and you break ASM code in entry-common.S
149 */
150#define _TIF_WORK_MASK 0x000000ff
151
152#endif /* __KERNEL__ */
153#endif /* __ASM_ARM_THREAD_INFO_H */
diff --git a/include/asm-arm/thread_notify.h b/include/asm-arm/thread_notify.h
deleted file mode 100644
index 8866e5216840..000000000000
--- a/include/asm-arm/thread_notify.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2 * linux/include/asm-arm/thread_notify.h
3 *
4 * Copyright (C) 2006 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef ASMARM_THREAD_NOTIFY_H
11#define ASMARM_THREAD_NOTIFY_H
12
13#ifdef __KERNEL__
14
15#ifndef __ASSEMBLY__
16
17#include <linux/notifier.h>
18#include <asm/thread_info.h>
19
20static inline int thread_register_notifier(struct notifier_block *n)
21{
22 extern struct atomic_notifier_head thread_notify_head;
23 return atomic_notifier_chain_register(&thread_notify_head, n);
24}
25
26static inline void thread_unregister_notifier(struct notifier_block *n)
27{
28 extern struct atomic_notifier_head thread_notify_head;
29 atomic_notifier_chain_unregister(&thread_notify_head, n);
30}
31
32static inline void thread_notify(unsigned long rc, struct thread_info *thread)
33{
34 extern struct atomic_notifier_head thread_notify_head;
35 atomic_notifier_call_chain(&thread_notify_head, rc, thread);
36}
37
38#endif
39
40/*
41 * These are the reason codes for the thread notifier.
42 */
43#define THREAD_NOTIFY_FLUSH 0
44#define THREAD_NOTIFY_RELEASE 1
45#define THREAD_NOTIFY_SWITCH 2
46
47#endif
48#endif
diff --git a/include/asm-arm/timex.h b/include/asm-arm/timex.h
deleted file mode 100644
index 7b8d4cb24be0..000000000000
--- a/include/asm-arm/timex.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * linux/include/asm-arm/timex.h
3 *
4 * Copyright (C) 1997,1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Architecture Specific TIME specifications
11 */
12#ifndef _ASMARM_TIMEX_H
13#define _ASMARM_TIMEX_H
14
15#include <asm/arch/timex.h>
16
17typedef unsigned long cycles_t;
18
19static inline cycles_t get_cycles (void)
20{
21 return 0;
22}
23
24#endif
diff --git a/include/asm-arm/tlb.h b/include/asm-arm/tlb.h
deleted file mode 100644
index 36bd402a21cb..000000000000
--- a/include/asm-arm/tlb.h
+++ /dev/null
@@ -1,94 +0,0 @@
1/*
2 * linux/include/asm-arm/tlb.h
3 *
4 * Copyright (C) 2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Experimentation shows that on a StrongARM, it appears to be faster
11 * to use the "invalidate whole tlb" rather than "invalidate single
12 * tlb" for this.
13 *
14 * This appears true for both the process fork+exit case, as well as
15 * the munmap-large-area case.
16 */
17#ifndef __ASMARM_TLB_H
18#define __ASMARM_TLB_H
19
20#include <asm/cacheflush.h>
21#include <asm/tlbflush.h>
22
23#ifndef CONFIG_MMU
24
25#include <linux/pagemap.h>
26#include <asm-generic/tlb.h>
27
28#else /* !CONFIG_MMU */
29
30#include <asm/pgalloc.h>
31
32/*
33 * TLB handling. This allows us to remove pages from the page
34 * tables, and efficiently handle the TLB issues.
35 */
36struct mmu_gather {
37 struct mm_struct *mm;
38 unsigned int fullmm;
39};
40
41DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
42
43static inline struct mmu_gather *
44tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
45{
46 struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
47
48 tlb->mm = mm;
49 tlb->fullmm = full_mm_flush;
50
51 return tlb;
52}
53
54static inline void
55tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
56{
57 if (tlb->fullmm)
58 flush_tlb_mm(tlb->mm);
59
60 /* keep the page table cache within bounds */
61 check_pgt_cache();
62
63 put_cpu_var(mmu_gathers);
64}
65
66#define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0)
67
68/*
69 * In the case of tlb vma handling, we can optimise these away in the
70 * case where we're doing a full MM flush. When we're doing a munmap,
71 * the vmas are adjusted to only cover the region to be torn down.
72 */
73static inline void
74tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
75{
76 if (!tlb->fullmm)
77 flush_cache_range(vma, vma->vm_start, vma->vm_end);
78}
79
80static inline void
81tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
82{
83 if (!tlb->fullmm)
84 flush_tlb_range(vma, vma->vm_start, vma->vm_end);
85}
86
87#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page)
88#define pte_free_tlb(tlb, ptep) pte_free((tlb)->mm, ptep)
89#define pmd_free_tlb(tlb, pmdp) pmd_free((tlb)->mm, pmdp)
90
91#define tlb_migrate_finish(mm) do { } while (0)
92
93#endif /* CONFIG_MMU */
94#endif
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
deleted file mode 100644
index 909656c747ef..000000000000
--- a/include/asm-arm/tlbflush.h
+++ /dev/null
@@ -1,500 +0,0 @@
1/*
2 * linux/include/asm-arm/tlbflush.h
3 *
4 * Copyright (C) 1999-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _ASMARM_TLBFLUSH_H
11#define _ASMARM_TLBFLUSH_H
12
13
14#ifndef CONFIG_MMU
15
16#define tlb_flush(tlb) ((void) tlb)
17
18#else /* CONFIG_MMU */
19
20#include <asm/glue.h>
21
22#define TLB_V3_PAGE (1 << 0)
23#define TLB_V4_U_PAGE (1 << 1)
24#define TLB_V4_D_PAGE (1 << 2)
25#define TLB_V4_I_PAGE (1 << 3)
26#define TLB_V6_U_PAGE (1 << 4)
27#define TLB_V6_D_PAGE (1 << 5)
28#define TLB_V6_I_PAGE (1 << 6)
29
30#define TLB_V3_FULL (1 << 8)
31#define TLB_V4_U_FULL (1 << 9)
32#define TLB_V4_D_FULL (1 << 10)
33#define TLB_V4_I_FULL (1 << 11)
34#define TLB_V6_U_FULL (1 << 12)
35#define TLB_V6_D_FULL (1 << 13)
36#define TLB_V6_I_FULL (1 << 14)
37
38#define TLB_V6_U_ASID (1 << 16)
39#define TLB_V6_D_ASID (1 << 17)
40#define TLB_V6_I_ASID (1 << 18)
41
42#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */
43#define TLB_DCLEAN (1 << 30)
44#define TLB_WB (1 << 31)
45
46/*
47 * MMU TLB Model
48 * =============
49 *
50 * We have the following to choose from:
51 * v3 - ARMv3
52 * v4 - ARMv4 without write buffer
53 * v4wb - ARMv4 with write buffer without I TLB flush entry instruction
54 * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
55 * fr - Feroceon (v4wbi with non-outer-cacheable page table walks)
56 * v6wbi - ARMv6 with write buffer with I TLB flush entry instruction
57 */
58#undef _TLB
59#undef MULTI_TLB
60
61#define v3_tlb_flags (TLB_V3_FULL | TLB_V3_PAGE)
62
63#ifdef CONFIG_CPU_TLB_V3
64# define v3_possible_flags v3_tlb_flags
65# define v3_always_flags v3_tlb_flags
66# ifdef _TLB
67# define MULTI_TLB 1
68# else
69# define _TLB v3
70# endif
71#else
72# define v3_possible_flags 0
73# define v3_always_flags (-1UL)
74#endif
75
76#define v4_tlb_flags (TLB_V4_U_FULL | TLB_V4_U_PAGE)
77
78#ifdef CONFIG_CPU_TLB_V4WT
79# define v4_possible_flags v4_tlb_flags
80# define v4_always_flags v4_tlb_flags
81# ifdef _TLB
82# define MULTI_TLB 1
83# else
84# define _TLB v4
85# endif
86#else
87# define v4_possible_flags 0
88# define v4_always_flags (-1UL)
89#endif
90
91#define v4wbi_tlb_flags (TLB_WB | TLB_DCLEAN | \
92 TLB_V4_I_FULL | TLB_V4_D_FULL | \
93 TLB_V4_I_PAGE | TLB_V4_D_PAGE)
94
95#ifdef CONFIG_CPU_TLB_V4WBI
96# define v4wbi_possible_flags v4wbi_tlb_flags
97# define v4wbi_always_flags v4wbi_tlb_flags
98# ifdef _TLB
99# define MULTI_TLB 1
100# else
101# define _TLB v4wbi
102# endif
103#else
104# define v4wbi_possible_flags 0
105# define v4wbi_always_flags (-1UL)
106#endif
107
108#define fr_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_L2CLEAN_FR | \
109 TLB_V4_I_FULL | TLB_V4_D_FULL | \
110 TLB_V4_I_PAGE | TLB_V4_D_PAGE)
111
112#ifdef CONFIG_CPU_TLB_FEROCEON
113# define fr_possible_flags fr_tlb_flags
114# define fr_always_flags fr_tlb_flags
115# ifdef _TLB
116# define MULTI_TLB 1
117# else
118# define _TLB v4wbi
119# endif
120#else
121# define fr_possible_flags 0
122# define fr_always_flags (-1UL)
123#endif
124
125#define v4wb_tlb_flags (TLB_WB | TLB_DCLEAN | \
126 TLB_V4_I_FULL | TLB_V4_D_FULL | \
127 TLB_V4_D_PAGE)
128
129#ifdef CONFIG_CPU_TLB_V4WB
130# define v4wb_possible_flags v4wb_tlb_flags
131# define v4wb_always_flags v4wb_tlb_flags
132# ifdef _TLB
133# define MULTI_TLB 1
134# else
135# define _TLB v4wb
136# endif
137#else
138# define v4wb_possible_flags 0
139# define v4wb_always_flags (-1UL)
140#endif
141
142#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | \
143 TLB_V6_I_FULL | TLB_V6_D_FULL | \
144 TLB_V6_I_PAGE | TLB_V6_D_PAGE | \
145 TLB_V6_I_ASID | TLB_V6_D_ASID)
146
147#ifdef CONFIG_CPU_TLB_V6
148# define v6wbi_possible_flags v6wbi_tlb_flags
149# define v6wbi_always_flags v6wbi_tlb_flags
150# ifdef _TLB
151# define MULTI_TLB 1
152# else
153# define _TLB v6wbi
154# endif
155#else
156# define v6wbi_possible_flags 0
157# define v6wbi_always_flags (-1UL)
158#endif
159
160#ifdef CONFIG_CPU_TLB_V7
161# define v7wbi_possible_flags v6wbi_tlb_flags
162# define v7wbi_always_flags v6wbi_tlb_flags
163# ifdef _TLB
164# define MULTI_TLB 1
165# else
166# define _TLB v7wbi
167# endif
168#else
169# define v7wbi_possible_flags 0
170# define v7wbi_always_flags (-1UL)
171#endif
172
173#ifndef _TLB
174#error Unknown TLB model
175#endif
176
177#ifndef __ASSEMBLY__
178
179#include <linux/sched.h>
180
181struct cpu_tlb_fns {
182 void (*flush_user_range)(unsigned long, unsigned long, struct vm_area_struct *);
183 void (*flush_kern_range)(unsigned long, unsigned long);
184 unsigned long tlb_flags;
185};
186
187/*
188 * Select the calling method
189 */
190#ifdef MULTI_TLB
191
192#define __cpu_flush_user_tlb_range cpu_tlb.flush_user_range
193#define __cpu_flush_kern_tlb_range cpu_tlb.flush_kern_range
194
195#else
196
197#define __cpu_flush_user_tlb_range __glue(_TLB,_flush_user_tlb_range)
198#define __cpu_flush_kern_tlb_range __glue(_TLB,_flush_kern_tlb_range)
199
200extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *);
201extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long);
202
203#endif
204
205extern struct cpu_tlb_fns cpu_tlb;
206
207#define __cpu_tlb_flags cpu_tlb.tlb_flags
208
209/*
210 * TLB Management
211 * ==============
212 *
213 * The arch/arm/mm/tlb-*.S files implement these methods.
214 *
215 * The TLB specific code is expected to perform whatever tests it
216 * needs to determine if it should invalidate the TLB for each
217 * call. Start addresses are inclusive and end addresses are
218 * exclusive; it is safe to round these addresses down.
219 *
220 * flush_tlb_all()
221 *
222 * Invalidate the entire TLB.
223 *
224 * flush_tlb_mm(mm)
225 *
226 * Invalidate all TLB entries in a particular address
227 * space.
228 * - mm - mm_struct describing address space
229 *
230 * flush_tlb_range(mm,start,end)
231 *
232 * Invalidate a range of TLB entries in the specified
233 * address space.
234 * - mm - mm_struct describing address space
235 * - start - start address (may not be aligned)
236 * - end - end address (exclusive, may not be aligned)
237 *
238 * flush_tlb_page(vaddr,vma)
239 *
240 * Invalidate the specified page in the specified address range.
241 * - vaddr - virtual address (may not be aligned)
242 * - vma - vma_struct describing address range
243 *
244 * flush_kern_tlb_page(kaddr)
245 *
246 * Invalidate the TLB entry for the specified page. The address
247 * will be in the kernels virtual memory space. Current uses
248 * only require the D-TLB to be invalidated.
249 * - kaddr - Kernel virtual memory address
250 */
251
252/*
253 * We optimise the code below by:
254 * - building a set of TLB flags that might be set in __cpu_tlb_flags
255 * - building a set of TLB flags that will always be set in __cpu_tlb_flags
256 * - if we're going to need __cpu_tlb_flags, access it once and only once
257 *
258 * This allows us to build optimal assembly for the single-CPU type case,
259 * and as close to optimal given the compiler constrants for multi-CPU
260 * case. We could do better for the multi-CPU case if the compiler
261 * implemented the "%?" method, but this has been discontinued due to too
262 * many people getting it wrong.
263 */
264#define possible_tlb_flags (v3_possible_flags | \
265 v4_possible_flags | \
266 v4wbi_possible_flags | \
267 fr_possible_flags | \
268 v4wb_possible_flags | \
269 v6wbi_possible_flags)
270
271#define always_tlb_flags (v3_always_flags & \
272 v4_always_flags & \
273 v4wbi_always_flags & \
274 fr_always_flags & \
275 v4wb_always_flags & \
276 v6wbi_always_flags)
277
278#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
279
280static inline void local_flush_tlb_all(void)
281{
282 const int zero = 0;
283 const unsigned int __tlb_flag = __cpu_tlb_flags;
284
285 if (tlb_flag(TLB_WB))
286 dsb();
287
288 if (tlb_flag(TLB_V3_FULL))
289 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
290 if (tlb_flag(TLB_V4_U_FULL | TLB_V6_U_FULL))
291 asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc");
292 if (tlb_flag(TLB_V4_D_FULL | TLB_V6_D_FULL))
293 asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
294 if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL))
295 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
296
297 if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
298 TLB_V6_I_PAGE | TLB_V6_D_PAGE |
299 TLB_V6_I_ASID | TLB_V6_D_ASID)) {
300 /* flush the branch target cache */
301 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
302 dsb();
303 isb();
304 }
305}
306
307static inline void local_flush_tlb_mm(struct mm_struct *mm)
308{
309 const int zero = 0;
310 const int asid = ASID(mm);
311 const unsigned int __tlb_flag = __cpu_tlb_flags;
312
313 if (tlb_flag(TLB_WB))
314 dsb();
315
316 if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) {
317 if (tlb_flag(TLB_V3_FULL))
318 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc");
319 if (tlb_flag(TLB_V4_U_FULL))
320 asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc");
321 if (tlb_flag(TLB_V4_D_FULL))
322 asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
323 if (tlb_flag(TLB_V4_I_FULL))
324 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
325 }
326
327 if (tlb_flag(TLB_V6_U_ASID))
328 asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc");
329 if (tlb_flag(TLB_V6_D_ASID))
330 asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid) : "cc");
331 if (tlb_flag(TLB_V6_I_ASID))
332 asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc");
333
334 if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
335 TLB_V6_I_PAGE | TLB_V6_D_PAGE |
336 TLB_V6_I_ASID | TLB_V6_D_ASID)) {
337 /* flush the branch target cache */
338 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
339 dsb();
340 }
341}
342
343static inline void
344local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
345{
346 const int zero = 0;
347 const unsigned int __tlb_flag = __cpu_tlb_flags;
348
349 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);
350
351 if (tlb_flag(TLB_WB))
352 dsb();
353
354 if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
355 if (tlb_flag(TLB_V3_PAGE))
356 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (uaddr) : "cc");
357 if (tlb_flag(TLB_V4_U_PAGE))
358 asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
359 if (tlb_flag(TLB_V4_D_PAGE))
360 asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
361 if (tlb_flag(TLB_V4_I_PAGE))
362 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
363 if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
364 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
365 }
366
367 if (tlb_flag(TLB_V6_U_PAGE))
368 asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc");
369 if (tlb_flag(TLB_V6_D_PAGE))
370 asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc");
371 if (tlb_flag(TLB_V6_I_PAGE))
372 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc");
373
374 if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
375 TLB_V6_I_PAGE | TLB_V6_D_PAGE |
376 TLB_V6_I_ASID | TLB_V6_D_ASID)) {
377 /* flush the branch target cache */
378 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
379 dsb();
380 }
381}
382
383static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
384{
385 const int zero = 0;
386 const unsigned int __tlb_flag = __cpu_tlb_flags;
387
388 kaddr &= PAGE_MASK;
389
390 if (tlb_flag(TLB_WB))
391 dsb();
392
393 if (tlb_flag(TLB_V3_PAGE))
394 asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (kaddr) : "cc");
395 if (tlb_flag(TLB_V4_U_PAGE))
396 asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
397 if (tlb_flag(TLB_V4_D_PAGE))
398 asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
399 if (tlb_flag(TLB_V4_I_PAGE))
400 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
401 if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL))
402 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
403
404 if (tlb_flag(TLB_V6_U_PAGE))
405 asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc");
406 if (tlb_flag(TLB_V6_D_PAGE))
407 asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
408 if (tlb_flag(TLB_V6_I_PAGE))
409 asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
410
411 if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
412 TLB_V6_I_PAGE | TLB_V6_D_PAGE |
413 TLB_V6_I_ASID | TLB_V6_D_ASID)) {
414 /* flush the branch target cache */
415 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
416 dsb();
417 isb();
418 }
419}
420
421/*
422 * flush_pmd_entry
423 *
424 * Flush a PMD entry (word aligned, or double-word aligned) to
425 * RAM if the TLB for the CPU we are running on requires this.
426 * This is typically used when we are creating PMD entries.
427 *
428 * clean_pmd_entry
429 *
430 * Clean (but don't drain the write buffer) if the CPU requires
431 * these operations. This is typically used when we are removing
432 * PMD entries.
433 */
434static inline void flush_pmd_entry(pmd_t *pmd)
435{
436 const unsigned int __tlb_flag = __cpu_tlb_flags;
437
438 if (tlb_flag(TLB_DCLEAN))
439 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd"
440 : : "r" (pmd) : "cc");
441
442 if (tlb_flag(TLB_L2CLEAN_FR))
443 asm("mcr p15, 1, %0, c15, c9, 1 @ L2 flush_pmd"
444 : : "r" (pmd) : "cc");
445
446 if (tlb_flag(TLB_WB))
447 dsb();
448}
449
450static inline void clean_pmd_entry(pmd_t *pmd)
451{
452 const unsigned int __tlb_flag = __cpu_tlb_flags;
453
454 if (tlb_flag(TLB_DCLEAN))
455 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd"
456 : : "r" (pmd) : "cc");
457
458 if (tlb_flag(TLB_L2CLEAN_FR))
459 asm("mcr p15, 1, %0, c15, c9, 1 @ L2 flush_pmd"
460 : : "r" (pmd) : "cc");
461}
462
463#undef tlb_flag
464#undef always_tlb_flags
465#undef possible_tlb_flags
466
467/*
468 * Convert calls to our calling convention.
469 */
470#define local_flush_tlb_range(vma,start,end) __cpu_flush_user_tlb_range(start,end,vma)
471#define local_flush_tlb_kernel_range(s,e) __cpu_flush_kern_tlb_range(s,e)
472
473#ifndef CONFIG_SMP
474#define flush_tlb_all local_flush_tlb_all
475#define flush_tlb_mm local_flush_tlb_mm
476#define flush_tlb_page local_flush_tlb_page
477#define flush_tlb_kernel_page local_flush_tlb_kernel_page
478#define flush_tlb_range local_flush_tlb_range
479#define flush_tlb_kernel_range local_flush_tlb_kernel_range
480#else
481extern void flush_tlb_all(void);
482extern void flush_tlb_mm(struct mm_struct *mm);
483extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr);
484extern void flush_tlb_kernel_page(unsigned long kaddr);
485extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
486extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
487#endif
488
489/*
490 * if PG_dcache_dirty is set for the page, we need to ensure that any
491 * cache entries for the kernels virtual memory range are written
492 * back to the page.
493 */
494extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte);
495
496#endif
497
498#endif /* CONFIG_MMU */
499
500#endif
diff --git a/include/asm-arm/topology.h b/include/asm-arm/topology.h
deleted file mode 100644
index accbd7cad9b5..000000000000
--- a/include/asm-arm/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_ARM_TOPOLOGY_H
2#define _ASM_ARM_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_ARM_TOPOLOGY_H */
diff --git a/include/asm-arm/traps.h b/include/asm-arm/traps.h
deleted file mode 100644
index aa399aec568e..000000000000
--- a/include/asm-arm/traps.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef _ASMARM_TRAP_H
2#define _ASMARM_TRAP_H
3
4#include <linux/list.h>
5
6struct undef_hook {
7 struct list_head node;
8 u32 instr_mask;
9 u32 instr_val;
10 u32 cpsr_mask;
11 u32 cpsr_val;
12 int (*fn)(struct pt_regs *regs, unsigned int instr);
13};
14
15void register_undef_hook(struct undef_hook *hook);
16void unregister_undef_hook(struct undef_hook *hook);
17
18static inline int in_exception_text(unsigned long ptr)
19{
20 extern char __exception_text_start[];
21 extern char __exception_text_end[];
22
23 return ptr >= (unsigned long)&__exception_text_start &&
24 ptr < (unsigned long)&__exception_text_end;
25}
26
27extern void __init early_trap_init(void);
28
29#endif
diff --git a/include/asm-arm/types.h b/include/asm-arm/types.h
deleted file mode 100644
index 345df01534a4..000000000000
--- a/include/asm-arm/types.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef __ASM_ARM_TYPES_H
2#define __ASM_ARM_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#define BITS_PER_LONG 32
18
19#ifndef __ASSEMBLY__
20
21/* Dma addresses are 32-bits wide. */
22
23typedef u32 dma_addr_t;
24typedef u32 dma64_addr_t;
25
26#endif /* __ASSEMBLY__ */
27
28#endif /* __KERNEL__ */
29
30#endif
31
diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h
deleted file mode 100644
index 4c1a3fa9f259..000000000000
--- a/include/asm-arm/uaccess.h
+++ /dev/null
@@ -1,444 +0,0 @@
1/*
2 * linux/include/asm-arm/uaccess.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#ifndef _ASMARM_UACCESS_H
9#define _ASMARM_UACCESS_H
10
11/*
12 * User space memory access functions
13 */
14#include <linux/sched.h>
15#include <asm/errno.h>
16#include <asm/memory.h>
17#include <asm/domain.h>
18#include <asm/system.h>
19
20#define VERIFY_READ 0
21#define VERIFY_WRITE 1
22
23/*
24 * The exception table consists of pairs of addresses: the first is the
25 * address of an instruction that is allowed to fault, and the second is
26 * the address at which the program should continue. No registers are
27 * modified, so it is entirely up to the continuation code to figure out
28 * what to do.
29 *
30 * All the routines below use bits of fixup code that are out of line
31 * with the main instruction path. This means when everything is well,
32 * we don't even have to jump over them. Further, they do not intrude
33 * on our cache or tlb entries.
34 */
35
36struct exception_table_entry
37{
38 unsigned long insn, fixup;
39};
40
41extern int fixup_exception(struct pt_regs *regs);
42
43/*
44 * These two are intentionally not defined anywhere - if the kernel
45 * code generates any references to them, that's a bug.
46 */
47extern int __get_user_bad(void);
48extern int __put_user_bad(void);
49
50/*
51 * Note that this is actually 0x1,0000,0000
52 */
53#define KERNEL_DS 0x00000000
54#define get_ds() (KERNEL_DS)
55
56#ifdef CONFIG_MMU
57
58#define USER_DS TASK_SIZE
59#define get_fs() (current_thread_info()->addr_limit)
60
61static inline void set_fs(mm_segment_t fs)
62{
63 current_thread_info()->addr_limit = fs;
64 modify_domain(DOMAIN_KERNEL, fs ? DOMAIN_CLIENT : DOMAIN_MANAGER);
65}
66
67#define segment_eq(a,b) ((a) == (b))
68
69#define __addr_ok(addr) ({ \
70 unsigned long flag; \
71 __asm__("cmp %2, %0; movlo %0, #0" \
72 : "=&r" (flag) \
73 : "0" (current_thread_info()->addr_limit), "r" (addr) \
74 : "cc"); \
75 (flag == 0); })
76
77/* We use 33-bit arithmetic here... */
78#define __range_ok(addr,size) ({ \
79 unsigned long flag, roksum; \
80 __chk_user_ptr(addr); \
81 __asm__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \
82 : "=&r" (flag), "=&r" (roksum) \
83 : "r" (addr), "Ir" (size), "0" (current_thread_info()->addr_limit) \
84 : "cc"); \
85 flag; })
86
87/*
88 * Single-value transfer routines. They automatically use the right
89 * size if we just have the right pointer type. Note that the functions
90 * which read from user space (*get_*) need to take care not to leak
91 * kernel data even if the calling code is buggy and fails to check
92 * the return value. This means zeroing out the destination variable
93 * or buffer on error. Normally this is done out of line by the
94 * fixup code, but there are a few places where it intrudes on the
95 * main code path. When we only write to user space, there is no
96 * problem.
97 */
98extern int __get_user_1(void *);
99extern int __get_user_2(void *);
100extern int __get_user_4(void *);
101
102#define __get_user_x(__r2,__p,__e,__s,__i...) \
103 __asm__ __volatile__ ( \
104 __asmeq("%0", "r0") __asmeq("%1", "r2") \
105 "bl __get_user_" #__s \
106 : "=&r" (__e), "=r" (__r2) \
107 : "0" (__p) \
108 : __i, "cc")
109
110#define get_user(x,p) \
111 ({ \
112 register const typeof(*(p)) __user *__p asm("r0") = (p);\
113 register unsigned long __r2 asm("r2"); \
114 register int __e asm("r0"); \
115 switch (sizeof(*(__p))) { \
116 case 1: \
117 __get_user_x(__r2, __p, __e, 1, "lr"); \
118 break; \
119 case 2: \
120 __get_user_x(__r2, __p, __e, 2, "r3", "lr"); \
121 break; \
122 case 4: \
123 __get_user_x(__r2, __p, __e, 4, "lr"); \
124 break; \
125 default: __e = __get_user_bad(); break; \
126 } \
127 x = (typeof(*(p))) __r2; \
128 __e; \
129 })
130
131extern int __put_user_1(void *, unsigned int);
132extern int __put_user_2(void *, unsigned int);
133extern int __put_user_4(void *, unsigned int);
134extern int __put_user_8(void *, unsigned long long);
135
136#define __put_user_x(__r2,__p,__e,__s) \
137 __asm__ __volatile__ ( \
138 __asmeq("%0", "r0") __asmeq("%2", "r2") \
139 "bl __put_user_" #__s \
140 : "=&r" (__e) \
141 : "0" (__p), "r" (__r2) \
142 : "ip", "lr", "cc")
143
144#define put_user(x,p) \
145 ({ \
146 register const typeof(*(p)) __r2 asm("r2") = (x); \
147 register const typeof(*(p)) __user *__p asm("r0") = (p);\
148 register int __e asm("r0"); \
149 switch (sizeof(*(__p))) { \
150 case 1: \
151 __put_user_x(__r2, __p, __e, 1); \
152 break; \
153 case 2: \
154 __put_user_x(__r2, __p, __e, 2); \
155 break; \
156 case 4: \
157 __put_user_x(__r2, __p, __e, 4); \
158 break; \
159 case 8: \
160 __put_user_x(__r2, __p, __e, 8); \
161 break; \
162 default: __e = __put_user_bad(); break; \
163 } \
164 __e; \
165 })
166
167#else /* CONFIG_MMU */
168
169/*
170 * uClinux has only one addr space, so has simplified address limits.
171 */
172#define USER_DS KERNEL_DS
173
174#define segment_eq(a,b) (1)
175#define __addr_ok(addr) (1)
176#define __range_ok(addr,size) (0)
177#define get_fs() (KERNEL_DS)
178
179static inline void set_fs(mm_segment_t fs)
180{
181}
182
183#define get_user(x,p) __get_user(x,p)
184#define put_user(x,p) __put_user(x,p)
185
186#endif /* CONFIG_MMU */
187
188#define access_ok(type,addr,size) (__range_ok(addr,size) == 0)
189
190/*
191 * The "__xxx" versions of the user access functions do not verify the
192 * address space - it must have been done previously with a separate
193 * "access_ok()" call.
194 *
195 * The "xxx_error" versions set the third argument to EFAULT if an
196 * error occurs, and leave it unchanged on success. Note that these
197 * versions are void (ie, don't return a value as such).
198 */
199#define __get_user(x,ptr) \
200({ \
201 long __gu_err = 0; \
202 __get_user_err((x),(ptr),__gu_err); \
203 __gu_err; \
204})
205
206#define __get_user_error(x,ptr,err) \
207({ \
208 __get_user_err((x),(ptr),err); \
209 (void) 0; \
210})
211
212#define __get_user_err(x,ptr,err) \
213do { \
214 unsigned long __gu_addr = (unsigned long)(ptr); \
215 unsigned long __gu_val; \
216 __chk_user_ptr(ptr); \
217 switch (sizeof(*(ptr))) { \
218 case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \
219 case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \
220 case 4: __get_user_asm_word(__gu_val,__gu_addr,err); break; \
221 default: (__gu_val) = __get_user_bad(); \
222 } \
223 (x) = (__typeof__(*(ptr)))__gu_val; \
224} while (0)
225
226#define __get_user_asm_byte(x,addr,err) \
227 __asm__ __volatile__( \
228 "1: ldrbt %1,[%2],#0\n" \
229 "2:\n" \
230 " .section .fixup,\"ax\"\n" \
231 " .align 2\n" \
232 "3: mov %0, %3\n" \
233 " mov %1, #0\n" \
234 " b 2b\n" \
235 " .previous\n" \
236 " .section __ex_table,\"a\"\n" \
237 " .align 3\n" \
238 " .long 1b, 3b\n" \
239 " .previous" \
240 : "+r" (err), "=&r" (x) \
241 : "r" (addr), "i" (-EFAULT) \
242 : "cc")
243
244#ifndef __ARMEB__
245#define __get_user_asm_half(x,__gu_addr,err) \
246({ \
247 unsigned long __b1, __b2; \
248 __get_user_asm_byte(__b1, __gu_addr, err); \
249 __get_user_asm_byte(__b2, __gu_addr + 1, err); \
250 (x) = __b1 | (__b2 << 8); \
251})
252#else
253#define __get_user_asm_half(x,__gu_addr,err) \
254({ \
255 unsigned long __b1, __b2; \
256 __get_user_asm_byte(__b1, __gu_addr, err); \
257 __get_user_asm_byte(__b2, __gu_addr + 1, err); \
258 (x) = (__b1 << 8) | __b2; \
259})
260#endif
261
262#define __get_user_asm_word(x,addr,err) \
263 __asm__ __volatile__( \
264 "1: ldrt %1,[%2],#0\n" \
265 "2:\n" \
266 " .section .fixup,\"ax\"\n" \
267 " .align 2\n" \
268 "3: mov %0, %3\n" \
269 " mov %1, #0\n" \
270 " b 2b\n" \
271 " .previous\n" \
272 " .section __ex_table,\"a\"\n" \
273 " .align 3\n" \
274 " .long 1b, 3b\n" \
275 " .previous" \
276 : "+r" (err), "=&r" (x) \
277 : "r" (addr), "i" (-EFAULT) \
278 : "cc")
279
280#define __put_user(x,ptr) \
281({ \
282 long __pu_err = 0; \
283 __put_user_err((x),(ptr),__pu_err); \
284 __pu_err; \
285})
286
287#define __put_user_error(x,ptr,err) \
288({ \
289 __put_user_err((x),(ptr),err); \
290 (void) 0; \
291})
292
293#define __put_user_err(x,ptr,err) \
294do { \
295 unsigned long __pu_addr = (unsigned long)(ptr); \
296 __typeof__(*(ptr)) __pu_val = (x); \
297 __chk_user_ptr(ptr); \
298 switch (sizeof(*(ptr))) { \
299 case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \
300 case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \
301 case 4: __put_user_asm_word(__pu_val,__pu_addr,err); break; \
302 case 8: __put_user_asm_dword(__pu_val,__pu_addr,err); break; \
303 default: __put_user_bad(); \
304 } \
305} while (0)
306
307#define __put_user_asm_byte(x,__pu_addr,err) \
308 __asm__ __volatile__( \
309 "1: strbt %1,[%2],#0\n" \
310 "2:\n" \
311 " .section .fixup,\"ax\"\n" \
312 " .align 2\n" \
313 "3: mov %0, %3\n" \
314 " b 2b\n" \
315 " .previous\n" \
316 " .section __ex_table,\"a\"\n" \
317 " .align 3\n" \
318 " .long 1b, 3b\n" \
319 " .previous" \
320 : "+r" (err) \
321 : "r" (x), "r" (__pu_addr), "i" (-EFAULT) \
322 : "cc")
323
324#ifndef __ARMEB__
325#define __put_user_asm_half(x,__pu_addr,err) \
326({ \
327 unsigned long __temp = (unsigned long)(x); \
328 __put_user_asm_byte(__temp, __pu_addr, err); \
329 __put_user_asm_byte(__temp >> 8, __pu_addr + 1, err); \
330})
331#else
332#define __put_user_asm_half(x,__pu_addr,err) \
333({ \
334 unsigned long __temp = (unsigned long)(x); \
335 __put_user_asm_byte(__temp >> 8, __pu_addr, err); \
336 __put_user_asm_byte(__temp, __pu_addr + 1, err); \
337})
338#endif
339
340#define __put_user_asm_word(x,__pu_addr,err) \
341 __asm__ __volatile__( \
342 "1: strt %1,[%2],#0\n" \
343 "2:\n" \
344 " .section .fixup,\"ax\"\n" \
345 " .align 2\n" \
346 "3: mov %0, %3\n" \
347 " b 2b\n" \
348 " .previous\n" \
349 " .section __ex_table,\"a\"\n" \
350 " .align 3\n" \
351 " .long 1b, 3b\n" \
352 " .previous" \
353 : "+r" (err) \
354 : "r" (x), "r" (__pu_addr), "i" (-EFAULT) \
355 : "cc")
356
357#ifndef __ARMEB__
358#define __reg_oper0 "%R2"
359#define __reg_oper1 "%Q2"
360#else
361#define __reg_oper0 "%Q2"
362#define __reg_oper1 "%R2"
363#endif
364
365#define __put_user_asm_dword(x,__pu_addr,err) \
366 __asm__ __volatile__( \
367 "1: strt " __reg_oper1 ", [%1], #4\n" \
368 "2: strt " __reg_oper0 ", [%1], #0\n" \
369 "3:\n" \
370 " .section .fixup,\"ax\"\n" \
371 " .align 2\n" \
372 "4: mov %0, %3\n" \
373 " b 3b\n" \
374 " .previous\n" \
375 " .section __ex_table,\"a\"\n" \
376 " .align 3\n" \
377 " .long 1b, 4b\n" \
378 " .long 2b, 4b\n" \
379 " .previous" \
380 : "+r" (err), "+r" (__pu_addr) \
381 : "r" (x), "i" (-EFAULT) \
382 : "cc")
383
384
385#ifdef CONFIG_MMU
386extern unsigned long __must_check __copy_from_user(void *to, const void __user *from, unsigned long n);
387extern unsigned long __must_check __copy_to_user(void __user *to, const void *from, unsigned long n);
388extern unsigned long __must_check __clear_user(void __user *addr, unsigned long n);
389#else
390#define __copy_from_user(to,from,n) (memcpy(to, (void __force *)from, n), 0)
391#define __copy_to_user(to,from,n) (memcpy((void __force *)to, from, n), 0)
392#define __clear_user(addr,n) (memset((void __force *)addr, 0, n), 0)
393#endif
394
395extern unsigned long __must_check __strncpy_from_user(char *to, const char __user *from, unsigned long count);
396extern unsigned long __must_check __strnlen_user(const char __user *s, long n);
397
398static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n)
399{
400 if (access_ok(VERIFY_READ, from, n))
401 n = __copy_from_user(to, from, n);
402 else /* security hole - plug it */
403 memzero(to, n);
404 return n;
405}
406
407static inline unsigned long __must_check copy_to_user(void __user *to, const void *from, unsigned long n)
408{
409 if (access_ok(VERIFY_WRITE, to, n))
410 n = __copy_to_user(to, from, n);
411 return n;
412}
413
414#define __copy_to_user_inatomic __copy_to_user
415#define __copy_from_user_inatomic __copy_from_user
416
417static inline unsigned long __must_check clear_user(void __user *to, unsigned long n)
418{
419 if (access_ok(VERIFY_WRITE, to, n))
420 n = __clear_user(to, n);
421 return n;
422}
423
424static inline long __must_check strncpy_from_user(char *dst, const char __user *src, long count)
425{
426 long res = -EFAULT;
427 if (access_ok(VERIFY_READ, src, 1))
428 res = __strncpy_from_user(dst, src, count);
429 return res;
430}
431
432#define strlen_user(s) strnlen_user(s, ~0UL >> 1)
433
434static inline long __must_check strnlen_user(const char __user *s, long n)
435{
436 unsigned long res = 0;
437
438 if (__addr_ok(s))
439 res = __strnlen_user(s, n);
440
441 return res;
442}
443
444#endif /* _ASMARM_UACCESS_H */
diff --git a/include/asm-arm/ucontext.h b/include/asm-arm/ucontext.h
deleted file mode 100644
index bf65e9f4525d..000000000000
--- a/include/asm-arm/ucontext.h
+++ /dev/null
@@ -1,103 +0,0 @@
1#ifndef _ASMARM_UCONTEXT_H
2#define _ASMARM_UCONTEXT_H
3
4#include <asm/fpstate.h>
5
6/*
7 * struct sigcontext only has room for the basic registers, but struct
8 * ucontext now has room for all registers which need to be saved and
9 * restored. Coprocessor registers are stored in uc_regspace. Each
10 * coprocessor's saved state should start with a documented 32-bit magic
11 * number, followed by a 32-bit word giving the coproccesor's saved size.
12 * uc_regspace may be expanded if necessary, although this takes some
13 * coordination with glibc.
14 */
15
16struct ucontext {
17 unsigned long uc_flags;
18 struct ucontext *uc_link;
19 stack_t uc_stack;
20 struct sigcontext uc_mcontext;
21 sigset_t uc_sigmask;
22 /* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */
23 int __unused[32 - (sizeof (sigset_t) / sizeof (int))];
24 /* Last for extensibility. Eight byte aligned because some
25 coprocessors require eight byte alignment. */
26 unsigned long uc_regspace[128] __attribute__((__aligned__(8)));
27};
28
29#ifdef __KERNEL__
30
31/*
32 * Coprocessor save state. The magic values and specific
33 * coprocessor's layouts are part of the userspace ABI. Each one of
34 * these should be a multiple of eight bytes and aligned to eight
35 * bytes, to prevent unpredictable padding in the signal frame.
36 */
37
38#ifdef CONFIG_CRUNCH
39#define CRUNCH_MAGIC 0x5065cf03
40#define CRUNCH_STORAGE_SIZE (CRUNCH_SIZE + 8)
41
42struct crunch_sigframe {
43 unsigned long magic;
44 unsigned long size;
45 struct crunch_state storage;
46} __attribute__((__aligned__(8)));
47#endif
48
49#ifdef CONFIG_IWMMXT
50/* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */
51#define IWMMXT_MAGIC 0x12ef842a
52#define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8)
53
54struct iwmmxt_sigframe {
55 unsigned long magic;
56 unsigned long size;
57 struct iwmmxt_struct storage;
58} __attribute__((__aligned__(8)));
59#endif /* CONFIG_IWMMXT */
60
61#ifdef CONFIG_VFP
62#if __LINUX_ARM_ARCH__ < 6
63/* For ARM pre-v6, we use fstmiax and fldmiax. This adds one extra
64 * word after the registers, and a word of padding at the end for
65 * alignment. */
66#define VFP_MAGIC 0x56465001
67#define VFP_STORAGE_SIZE 152
68#else
69#define VFP_MAGIC 0x56465002
70#define VFP_STORAGE_SIZE 144
71#endif
72
73struct vfp_sigframe
74{
75 unsigned long magic;
76 unsigned long size;
77 union vfp_state storage;
78};
79#endif /* CONFIG_VFP */
80
81/*
82 * Auxiliary signal frame. This saves stuff like FP state.
83 * The layout of this structure is not part of the user ABI,
84 * because the config options aren't. uc_regspace is really
85 * one of these.
86 */
87struct aux_sigframe {
88#ifdef CONFIG_CRUNCH
89 struct crunch_sigframe crunch;
90#endif
91#ifdef CONFIG_IWMMXT
92 struct iwmmxt_sigframe iwmmxt;
93#endif
94#if 0 && defined CONFIG_VFP /* Not yet saved. */
95 struct vfp_sigframe vfp;
96#endif
97 /* Something that isn't a valid magic number for any coprocessor. */
98 unsigned long end_magic;
99} __attribute__((__aligned__(8)));
100
101#endif
102
103#endif /* !_ASMARM_UCONTEXT_H */
diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h
deleted file mode 100644
index 44593a894903..000000000000
--- a/include/asm-arm/unaligned.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_ARM_UNALIGNED_H
2#define _ASM_ARM_UNALIGNED_H
3
4#include <linux/unaligned/le_byteshift.h>
5#include <linux/unaligned/be_byteshift.h>
6#include <linux/unaligned/generic.h>
7
8/*
9 * Select endianness
10 */
11#ifndef __ARMEB__
12#define get_unaligned __get_unaligned_le
13#define put_unaligned __put_unaligned_le
14#else
15#define get_unaligned __get_unaligned_be
16#define put_unaligned __put_unaligned_be
17#endif
18
19#endif /* _ASM_ARM_UNALIGNED_H */
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
deleted file mode 100644
index 7c570082b1e0..000000000000
--- a/include/asm-arm/unistd.h
+++ /dev/null
@@ -1,450 +0,0 @@
1/*
2 * linux/include/asm-arm/unistd.h
3 *
4 * Copyright (C) 2001-2005 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Please forward _all_ changes to this file to rmk@arm.linux.org.uk,
11 * no matter what the change is. Thanks!
12 */
13#ifndef __ASM_ARM_UNISTD_H
14#define __ASM_ARM_UNISTD_H
15
16#define __NR_OABI_SYSCALL_BASE 0x900000
17
18#if defined(__thumb__) || defined(__ARM_EABI__)
19#define __NR_SYSCALL_BASE 0
20#else
21#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
22#endif
23
24/*
25 * This file contains the system call numbers.
26 */
27
28#define __NR_restart_syscall (__NR_SYSCALL_BASE+ 0)
29#define __NR_exit (__NR_SYSCALL_BASE+ 1)
30#define __NR_fork (__NR_SYSCALL_BASE+ 2)
31#define __NR_read (__NR_SYSCALL_BASE+ 3)
32#define __NR_write (__NR_SYSCALL_BASE+ 4)
33#define __NR_open (__NR_SYSCALL_BASE+ 5)
34#define __NR_close (__NR_SYSCALL_BASE+ 6)
35 /* 7 was sys_waitpid */
36#define __NR_creat (__NR_SYSCALL_BASE+ 8)
37#define __NR_link (__NR_SYSCALL_BASE+ 9)
38#define __NR_unlink (__NR_SYSCALL_BASE+ 10)
39#define __NR_execve (__NR_SYSCALL_BASE+ 11)
40#define __NR_chdir (__NR_SYSCALL_BASE+ 12)
41#define __NR_time (__NR_SYSCALL_BASE+ 13)
42#define __NR_mknod (__NR_SYSCALL_BASE+ 14)
43#define __NR_chmod (__NR_SYSCALL_BASE+ 15)
44#define __NR_lchown (__NR_SYSCALL_BASE+ 16)
45 /* 17 was sys_break */
46 /* 18 was sys_stat */
47#define __NR_lseek (__NR_SYSCALL_BASE+ 19)
48#define __NR_getpid (__NR_SYSCALL_BASE+ 20)
49#define __NR_mount (__NR_SYSCALL_BASE+ 21)
50#define __NR_umount (__NR_SYSCALL_BASE+ 22)
51#define __NR_setuid (__NR_SYSCALL_BASE+ 23)
52#define __NR_getuid (__NR_SYSCALL_BASE+ 24)
53#define __NR_stime (__NR_SYSCALL_BASE+ 25)
54#define __NR_ptrace (__NR_SYSCALL_BASE+ 26)
55#define __NR_alarm (__NR_SYSCALL_BASE+ 27)
56 /* 28 was sys_fstat */
57#define __NR_pause (__NR_SYSCALL_BASE+ 29)
58#define __NR_utime (__NR_SYSCALL_BASE+ 30)
59 /* 31 was sys_stty */
60 /* 32 was sys_gtty */
61#define __NR_access (__NR_SYSCALL_BASE+ 33)
62#define __NR_nice (__NR_SYSCALL_BASE+ 34)
63 /* 35 was sys_ftime */
64#define __NR_sync (__NR_SYSCALL_BASE+ 36)
65#define __NR_kill (__NR_SYSCALL_BASE+ 37)
66#define __NR_rename (__NR_SYSCALL_BASE+ 38)
67#define __NR_mkdir (__NR_SYSCALL_BASE+ 39)
68#define __NR_rmdir (__NR_SYSCALL_BASE+ 40)
69#define __NR_dup (__NR_SYSCALL_BASE+ 41)
70#define __NR_pipe (__NR_SYSCALL_BASE+ 42)
71#define __NR_times (__NR_SYSCALL_BASE+ 43)
72 /* 44 was sys_prof */
73#define __NR_brk (__NR_SYSCALL_BASE+ 45)
74#define __NR_setgid (__NR_SYSCALL_BASE+ 46)
75#define __NR_getgid (__NR_SYSCALL_BASE+ 47)
76 /* 48 was sys_signal */
77#define __NR_geteuid (__NR_SYSCALL_BASE+ 49)
78#define __NR_getegid (__NR_SYSCALL_BASE+ 50)
79#define __NR_acct (__NR_SYSCALL_BASE+ 51)
80#define __NR_umount2 (__NR_SYSCALL_BASE+ 52)
81 /* 53 was sys_lock */
82#define __NR_ioctl (__NR_SYSCALL_BASE+ 54)
83#define __NR_fcntl (__NR_SYSCALL_BASE+ 55)
84 /* 56 was sys_mpx */
85#define __NR_setpgid (__NR_SYSCALL_BASE+ 57)
86 /* 58 was sys_ulimit */
87 /* 59 was sys_olduname */
88#define __NR_umask (__NR_SYSCALL_BASE+ 60)
89#define __NR_chroot (__NR_SYSCALL_BASE+ 61)
90#define __NR_ustat (__NR_SYSCALL_BASE+ 62)
91#define __NR_dup2 (__NR_SYSCALL_BASE+ 63)
92#define __NR_getppid (__NR_SYSCALL_BASE+ 64)
93#define __NR_getpgrp (__NR_SYSCALL_BASE+ 65)
94#define __NR_setsid (__NR_SYSCALL_BASE+ 66)
95#define __NR_sigaction (__NR_SYSCALL_BASE+ 67)
96 /* 68 was sys_sgetmask */
97 /* 69 was sys_ssetmask */
98#define __NR_setreuid (__NR_SYSCALL_BASE+ 70)
99#define __NR_setregid (__NR_SYSCALL_BASE+ 71)
100#define __NR_sigsuspend (__NR_SYSCALL_BASE+ 72)
101#define __NR_sigpending (__NR_SYSCALL_BASE+ 73)
102#define __NR_sethostname (__NR_SYSCALL_BASE+ 74)
103#define __NR_setrlimit (__NR_SYSCALL_BASE+ 75)
104#define __NR_getrlimit (__NR_SYSCALL_BASE+ 76) /* Back compat 2GB limited rlimit */
105#define __NR_getrusage (__NR_SYSCALL_BASE+ 77)
106#define __NR_gettimeofday (__NR_SYSCALL_BASE+ 78)
107#define __NR_settimeofday (__NR_SYSCALL_BASE+ 79)
108#define __NR_getgroups (__NR_SYSCALL_BASE+ 80)
109#define __NR_setgroups (__NR_SYSCALL_BASE+ 81)
110#define __NR_select (__NR_SYSCALL_BASE+ 82)
111#define __NR_symlink (__NR_SYSCALL_BASE+ 83)
112 /* 84 was sys_lstat */
113#define __NR_readlink (__NR_SYSCALL_BASE+ 85)
114#define __NR_uselib (__NR_SYSCALL_BASE+ 86)
115#define __NR_swapon (__NR_SYSCALL_BASE+ 87)
116#define __NR_reboot (__NR_SYSCALL_BASE+ 88)
117#define __NR_readdir (__NR_SYSCALL_BASE+ 89)
118#define __NR_mmap (__NR_SYSCALL_BASE+ 90)
119#define __NR_munmap (__NR_SYSCALL_BASE+ 91)
120#define __NR_truncate (__NR_SYSCALL_BASE+ 92)
121#define __NR_ftruncate (__NR_SYSCALL_BASE+ 93)
122#define __NR_fchmod (__NR_SYSCALL_BASE+ 94)
123#define __NR_fchown (__NR_SYSCALL_BASE+ 95)
124#define __NR_getpriority (__NR_SYSCALL_BASE+ 96)
125#define __NR_setpriority (__NR_SYSCALL_BASE+ 97)
126 /* 98 was sys_profil */
127#define __NR_statfs (__NR_SYSCALL_BASE+ 99)
128#define __NR_fstatfs (__NR_SYSCALL_BASE+100)
129 /* 101 was sys_ioperm */
130#define __NR_socketcall (__NR_SYSCALL_BASE+102)
131#define __NR_syslog (__NR_SYSCALL_BASE+103)
132#define __NR_setitimer (__NR_SYSCALL_BASE+104)
133#define __NR_getitimer (__NR_SYSCALL_BASE+105)
134#define __NR_stat (__NR_SYSCALL_BASE+106)
135#define __NR_lstat (__NR_SYSCALL_BASE+107)
136#define __NR_fstat (__NR_SYSCALL_BASE+108)
137 /* 109 was sys_uname */
138 /* 110 was sys_iopl */
139#define __NR_vhangup (__NR_SYSCALL_BASE+111)
140 /* 112 was sys_idle */
141#define __NR_syscall (__NR_SYSCALL_BASE+113) /* syscall to call a syscall! */
142#define __NR_wait4 (__NR_SYSCALL_BASE+114)
143#define __NR_swapoff (__NR_SYSCALL_BASE+115)
144#define __NR_sysinfo (__NR_SYSCALL_BASE+116)
145#define __NR_ipc (__NR_SYSCALL_BASE+117)
146#define __NR_fsync (__NR_SYSCALL_BASE+118)
147#define __NR_sigreturn (__NR_SYSCALL_BASE+119)
148#define __NR_clone (__NR_SYSCALL_BASE+120)
149#define __NR_setdomainname (__NR_SYSCALL_BASE+121)
150#define __NR_uname (__NR_SYSCALL_BASE+122)
151 /* 123 was sys_modify_ldt */
152#define __NR_adjtimex (__NR_SYSCALL_BASE+124)
153#define __NR_mprotect (__NR_SYSCALL_BASE+125)
154#define __NR_sigprocmask (__NR_SYSCALL_BASE+126)
155 /* 127 was sys_create_module */
156#define __NR_init_module (__NR_SYSCALL_BASE+128)
157#define __NR_delete_module (__NR_SYSCALL_BASE+129)
158 /* 130 was sys_get_kernel_syms */
159#define __NR_quotactl (__NR_SYSCALL_BASE+131)
160#define __NR_getpgid (__NR_SYSCALL_BASE+132)
161#define __NR_fchdir (__NR_SYSCALL_BASE+133)
162#define __NR_bdflush (__NR_SYSCALL_BASE+134)
163#define __NR_sysfs (__NR_SYSCALL_BASE+135)
164#define __NR_personality (__NR_SYSCALL_BASE+136)
165 /* 137 was sys_afs_syscall */
166#define __NR_setfsuid (__NR_SYSCALL_BASE+138)
167#define __NR_setfsgid (__NR_SYSCALL_BASE+139)
168#define __NR__llseek (__NR_SYSCALL_BASE+140)
169#define __NR_getdents (__NR_SYSCALL_BASE+141)
170#define __NR__newselect (__NR_SYSCALL_BASE+142)
171#define __NR_flock (__NR_SYSCALL_BASE+143)
172#define __NR_msync (__NR_SYSCALL_BASE+144)
173#define __NR_readv (__NR_SYSCALL_BASE+145)
174#define __NR_writev (__NR_SYSCALL_BASE+146)
175#define __NR_getsid (__NR_SYSCALL_BASE+147)
176#define __NR_fdatasync (__NR_SYSCALL_BASE+148)
177#define __NR__sysctl (__NR_SYSCALL_BASE+149)
178#define __NR_mlock (__NR_SYSCALL_BASE+150)
179#define __NR_munlock (__NR_SYSCALL_BASE+151)
180#define __NR_mlockall (__NR_SYSCALL_BASE+152)
181#define __NR_munlockall (__NR_SYSCALL_BASE+153)
182#define __NR_sched_setparam (__NR_SYSCALL_BASE+154)
183#define __NR_sched_getparam (__NR_SYSCALL_BASE+155)
184#define __NR_sched_setscheduler (__NR_SYSCALL_BASE+156)
185#define __NR_sched_getscheduler (__NR_SYSCALL_BASE+157)
186#define __NR_sched_yield (__NR_SYSCALL_BASE+158)
187#define __NR_sched_get_priority_max (__NR_SYSCALL_BASE+159)
188#define __NR_sched_get_priority_min (__NR_SYSCALL_BASE+160)
189#define __NR_sched_rr_get_interval (__NR_SYSCALL_BASE+161)
190#define __NR_nanosleep (__NR_SYSCALL_BASE+162)
191#define __NR_mremap (__NR_SYSCALL_BASE+163)
192#define __NR_setresuid (__NR_SYSCALL_BASE+164)
193#define __NR_getresuid (__NR_SYSCALL_BASE+165)
194 /* 166 was sys_vm86 */
195 /* 167 was sys_query_module */
196#define __NR_poll (__NR_SYSCALL_BASE+168)
197#define __NR_nfsservctl (__NR_SYSCALL_BASE+169)
198#define __NR_setresgid (__NR_SYSCALL_BASE+170)
199#define __NR_getresgid (__NR_SYSCALL_BASE+171)
200#define __NR_prctl (__NR_SYSCALL_BASE+172)
201#define __NR_rt_sigreturn (__NR_SYSCALL_BASE+173)
202#define __NR_rt_sigaction (__NR_SYSCALL_BASE+174)
203#define __NR_rt_sigprocmask (__NR_SYSCALL_BASE+175)
204#define __NR_rt_sigpending (__NR_SYSCALL_BASE+176)
205#define __NR_rt_sigtimedwait (__NR_SYSCALL_BASE+177)
206#define __NR_rt_sigqueueinfo (__NR_SYSCALL_BASE+178)
207#define __NR_rt_sigsuspend (__NR_SYSCALL_BASE+179)
208#define __NR_pread64 (__NR_SYSCALL_BASE+180)
209#define __NR_pwrite64 (__NR_SYSCALL_BASE+181)
210#define __NR_chown (__NR_SYSCALL_BASE+182)
211#define __NR_getcwd (__NR_SYSCALL_BASE+183)
212#define __NR_capget (__NR_SYSCALL_BASE+184)
213#define __NR_capset (__NR_SYSCALL_BASE+185)
214#define __NR_sigaltstack (__NR_SYSCALL_BASE+186)
215#define __NR_sendfile (__NR_SYSCALL_BASE+187)
216 /* 188 reserved */
217 /* 189 reserved */
218#define __NR_vfork (__NR_SYSCALL_BASE+190)
219#define __NR_ugetrlimit (__NR_SYSCALL_BASE+191) /* SuS compliant getrlimit */
220#define __NR_mmap2 (__NR_SYSCALL_BASE+192)
221#define __NR_truncate64 (__NR_SYSCALL_BASE+193)
222#define __NR_ftruncate64 (__NR_SYSCALL_BASE+194)
223#define __NR_stat64 (__NR_SYSCALL_BASE+195)
224#define __NR_lstat64 (__NR_SYSCALL_BASE+196)
225#define __NR_fstat64 (__NR_SYSCALL_BASE+197)
226#define __NR_lchown32 (__NR_SYSCALL_BASE+198)
227#define __NR_getuid32 (__NR_SYSCALL_BASE+199)
228#define __NR_getgid32 (__NR_SYSCALL_BASE+200)
229#define __NR_geteuid32 (__NR_SYSCALL_BASE+201)
230#define __NR_getegid32 (__NR_SYSCALL_BASE+202)
231#define __NR_setreuid32 (__NR_SYSCALL_BASE+203)
232#define __NR_setregid32 (__NR_SYSCALL_BASE+204)
233#define __NR_getgroups32 (__NR_SYSCALL_BASE+205)
234#define __NR_setgroups32 (__NR_SYSCALL_BASE+206)
235#define __NR_fchown32 (__NR_SYSCALL_BASE+207)
236#define __NR_setresuid32 (__NR_SYSCALL_BASE+208)
237#define __NR_getresuid32 (__NR_SYSCALL_BASE+209)
238#define __NR_setresgid32 (__NR_SYSCALL_BASE+210)
239#define __NR_getresgid32 (__NR_SYSCALL_BASE+211)
240#define __NR_chown32 (__NR_SYSCALL_BASE+212)
241#define __NR_setuid32 (__NR_SYSCALL_BASE+213)
242#define __NR_setgid32 (__NR_SYSCALL_BASE+214)
243#define __NR_setfsuid32 (__NR_SYSCALL_BASE+215)
244#define __NR_setfsgid32 (__NR_SYSCALL_BASE+216)
245#define __NR_getdents64 (__NR_SYSCALL_BASE+217)
246#define __NR_pivot_root (__NR_SYSCALL_BASE+218)
247#define __NR_mincore (__NR_SYSCALL_BASE+219)
248#define __NR_madvise (__NR_SYSCALL_BASE+220)
249#define __NR_fcntl64 (__NR_SYSCALL_BASE+221)
250 /* 222 for tux */
251 /* 223 is unused */
252#define __NR_gettid (__NR_SYSCALL_BASE+224)
253#define __NR_readahead (__NR_SYSCALL_BASE+225)
254#define __NR_setxattr (__NR_SYSCALL_BASE+226)
255#define __NR_lsetxattr (__NR_SYSCALL_BASE+227)
256#define __NR_fsetxattr (__NR_SYSCALL_BASE+228)
257#define __NR_getxattr (__NR_SYSCALL_BASE+229)
258#define __NR_lgetxattr (__NR_SYSCALL_BASE+230)
259#define __NR_fgetxattr (__NR_SYSCALL_BASE+231)
260#define __NR_listxattr (__NR_SYSCALL_BASE+232)
261#define __NR_llistxattr (__NR_SYSCALL_BASE+233)
262#define __NR_flistxattr (__NR_SYSCALL_BASE+234)
263#define __NR_removexattr (__NR_SYSCALL_BASE+235)
264#define __NR_lremovexattr (__NR_SYSCALL_BASE+236)
265#define __NR_fremovexattr (__NR_SYSCALL_BASE+237)
266#define __NR_tkill (__NR_SYSCALL_BASE+238)
267#define __NR_sendfile64 (__NR_SYSCALL_BASE+239)
268#define __NR_futex (__NR_SYSCALL_BASE+240)
269#define __NR_sched_setaffinity (__NR_SYSCALL_BASE+241)
270#define __NR_sched_getaffinity (__NR_SYSCALL_BASE+242)
271#define __NR_io_setup (__NR_SYSCALL_BASE+243)
272#define __NR_io_destroy (__NR_SYSCALL_BASE+244)
273#define __NR_io_getevents (__NR_SYSCALL_BASE+245)
274#define __NR_io_submit (__NR_SYSCALL_BASE+246)
275#define __NR_io_cancel (__NR_SYSCALL_BASE+247)
276#define __NR_exit_group (__NR_SYSCALL_BASE+248)
277#define __NR_lookup_dcookie (__NR_SYSCALL_BASE+249)
278#define __NR_epoll_create (__NR_SYSCALL_BASE+250)
279#define __NR_epoll_ctl (__NR_SYSCALL_BASE+251)
280#define __NR_epoll_wait (__NR_SYSCALL_BASE+252)
281#define __NR_remap_file_pages (__NR_SYSCALL_BASE+253)
282 /* 254 for set_thread_area */
283 /* 255 for get_thread_area */
284#define __NR_set_tid_address (__NR_SYSCALL_BASE+256)
285#define __NR_timer_create (__NR_SYSCALL_BASE+257)
286#define __NR_timer_settime (__NR_SYSCALL_BASE+258)
287#define __NR_timer_gettime (__NR_SYSCALL_BASE+259)
288#define __NR_timer_getoverrun (__NR_SYSCALL_BASE+260)
289#define __NR_timer_delete (__NR_SYSCALL_BASE+261)
290#define __NR_clock_settime (__NR_SYSCALL_BASE+262)
291#define __NR_clock_gettime (__NR_SYSCALL_BASE+263)
292#define __NR_clock_getres (__NR_SYSCALL_BASE+264)
293#define __NR_clock_nanosleep (__NR_SYSCALL_BASE+265)
294#define __NR_statfs64 (__NR_SYSCALL_BASE+266)
295#define __NR_fstatfs64 (__NR_SYSCALL_BASE+267)
296#define __NR_tgkill (__NR_SYSCALL_BASE+268)
297#define __NR_utimes (__NR_SYSCALL_BASE+269)
298#define __NR_arm_fadvise64_64 (__NR_SYSCALL_BASE+270)
299#define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271)
300#define __NR_pciconfig_read (__NR_SYSCALL_BASE+272)
301#define __NR_pciconfig_write (__NR_SYSCALL_BASE+273)
302#define __NR_mq_open (__NR_SYSCALL_BASE+274)
303#define __NR_mq_unlink (__NR_SYSCALL_BASE+275)
304#define __NR_mq_timedsend (__NR_SYSCALL_BASE+276)
305#define __NR_mq_timedreceive (__NR_SYSCALL_BASE+277)
306#define __NR_mq_notify (__NR_SYSCALL_BASE+278)
307#define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279)
308#define __NR_waitid (__NR_SYSCALL_BASE+280)
309#define __NR_socket (__NR_SYSCALL_BASE+281)
310#define __NR_bind (__NR_SYSCALL_BASE+282)
311#define __NR_connect (__NR_SYSCALL_BASE+283)
312#define __NR_listen (__NR_SYSCALL_BASE+284)
313#define __NR_accept (__NR_SYSCALL_BASE+285)
314#define __NR_getsockname (__NR_SYSCALL_BASE+286)
315#define __NR_getpeername (__NR_SYSCALL_BASE+287)
316#define __NR_socketpair (__NR_SYSCALL_BASE+288)
317#define __NR_send (__NR_SYSCALL_BASE+289)
318#define __NR_sendto (__NR_SYSCALL_BASE+290)
319#define __NR_recv (__NR_SYSCALL_BASE+291)
320#define __NR_recvfrom (__NR_SYSCALL_BASE+292)
321#define __NR_shutdown (__NR_SYSCALL_BASE+293)
322#define __NR_setsockopt (__NR_SYSCALL_BASE+294)
323#define __NR_getsockopt (__NR_SYSCALL_BASE+295)
324#define __NR_sendmsg (__NR_SYSCALL_BASE+296)
325#define __NR_recvmsg (__NR_SYSCALL_BASE+297)
326#define __NR_semop (__NR_SYSCALL_BASE+298)
327#define __NR_semget (__NR_SYSCALL_BASE+299)
328#define __NR_semctl (__NR_SYSCALL_BASE+300)
329#define __NR_msgsnd (__NR_SYSCALL_BASE+301)
330#define __NR_msgrcv (__NR_SYSCALL_BASE+302)
331#define __NR_msgget (__NR_SYSCALL_BASE+303)
332#define __NR_msgctl (__NR_SYSCALL_BASE+304)
333#define __NR_shmat (__NR_SYSCALL_BASE+305)
334#define __NR_shmdt (__NR_SYSCALL_BASE+306)
335#define __NR_shmget (__NR_SYSCALL_BASE+307)
336#define __NR_shmctl (__NR_SYSCALL_BASE+308)
337#define __NR_add_key (__NR_SYSCALL_BASE+309)
338#define __NR_request_key (__NR_SYSCALL_BASE+310)
339#define __NR_keyctl (__NR_SYSCALL_BASE+311)
340#define __NR_semtimedop (__NR_SYSCALL_BASE+312)
341#define __NR_vserver (__NR_SYSCALL_BASE+313)
342#define __NR_ioprio_set (__NR_SYSCALL_BASE+314)
343#define __NR_ioprio_get (__NR_SYSCALL_BASE+315)
344#define __NR_inotify_init (__NR_SYSCALL_BASE+316)
345#define __NR_inotify_add_watch (__NR_SYSCALL_BASE+317)
346#define __NR_inotify_rm_watch (__NR_SYSCALL_BASE+318)
347#define __NR_mbind (__NR_SYSCALL_BASE+319)
348#define __NR_get_mempolicy (__NR_SYSCALL_BASE+320)
349#define __NR_set_mempolicy (__NR_SYSCALL_BASE+321)
350#define __NR_openat (__NR_SYSCALL_BASE+322)
351#define __NR_mkdirat (__NR_SYSCALL_BASE+323)
352#define __NR_mknodat (__NR_SYSCALL_BASE+324)
353#define __NR_fchownat (__NR_SYSCALL_BASE+325)
354#define __NR_futimesat (__NR_SYSCALL_BASE+326)
355#define __NR_fstatat64 (__NR_SYSCALL_BASE+327)
356#define __NR_unlinkat (__NR_SYSCALL_BASE+328)
357#define __NR_renameat (__NR_SYSCALL_BASE+329)
358#define __NR_linkat (__NR_SYSCALL_BASE+330)
359#define __NR_symlinkat (__NR_SYSCALL_BASE+331)
360#define __NR_readlinkat (__NR_SYSCALL_BASE+332)
361#define __NR_fchmodat (__NR_SYSCALL_BASE+333)
362#define __NR_faccessat (__NR_SYSCALL_BASE+334)
363 /* 335 for pselect6 */
364 /* 336 for ppoll */
365#define __NR_unshare (__NR_SYSCALL_BASE+337)
366#define __NR_set_robust_list (__NR_SYSCALL_BASE+338)
367#define __NR_get_robust_list (__NR_SYSCALL_BASE+339)
368#define __NR_splice (__NR_SYSCALL_BASE+340)
369#define __NR_arm_sync_file_range (__NR_SYSCALL_BASE+341)
370#define __NR_sync_file_range2 __NR_arm_sync_file_range
371#define __NR_tee (__NR_SYSCALL_BASE+342)
372#define __NR_vmsplice (__NR_SYSCALL_BASE+343)
373#define __NR_move_pages (__NR_SYSCALL_BASE+344)
374#define __NR_getcpu (__NR_SYSCALL_BASE+345)
375 /* 346 for epoll_pwait */
376#define __NR_kexec_load (__NR_SYSCALL_BASE+347)
377#define __NR_utimensat (__NR_SYSCALL_BASE+348)
378#define __NR_signalfd (__NR_SYSCALL_BASE+349)
379#define __NR_timerfd_create (__NR_SYSCALL_BASE+350)
380#define __NR_eventfd (__NR_SYSCALL_BASE+351)
381#define __NR_fallocate (__NR_SYSCALL_BASE+352)
382#define __NR_timerfd_settime (__NR_SYSCALL_BASE+353)
383#define __NR_timerfd_gettime (__NR_SYSCALL_BASE+354)
384
385/*
386 * The following SWIs are ARM private.
387 */
388#define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
389#define __ARM_NR_breakpoint (__ARM_NR_BASE+1)
390#define __ARM_NR_cacheflush (__ARM_NR_BASE+2)
391#define __ARM_NR_usr26 (__ARM_NR_BASE+3)
392#define __ARM_NR_usr32 (__ARM_NR_BASE+4)
393#define __ARM_NR_set_tls (__ARM_NR_BASE+5)
394
395/*
396 * The following syscalls are obsolete and no longer available for EABI.
397 */
398#if defined(__ARM_EABI__) && !defined(__KERNEL__)
399#undef __NR_time
400#undef __NR_umount
401#undef __NR_stime
402#undef __NR_alarm
403#undef __NR_utime
404#undef __NR_getrlimit
405#undef __NR_select
406#undef __NR_readdir
407#undef __NR_mmap
408#undef __NR_socketcall
409#undef __NR_syscall
410#undef __NR_ipc
411#endif
412
413#ifdef __KERNEL__
414
415#define __ARCH_WANT_IPC_PARSE_VERSION
416#define __ARCH_WANT_STAT64
417#define __ARCH_WANT_SYS_GETHOSTNAME
418#define __ARCH_WANT_SYS_PAUSE
419#define __ARCH_WANT_SYS_GETPGRP
420#define __ARCH_WANT_SYS_LLSEEK
421#define __ARCH_WANT_SYS_NICE
422#define __ARCH_WANT_SYS_SIGPENDING
423#define __ARCH_WANT_SYS_SIGPROCMASK
424#define __ARCH_WANT_SYS_RT_SIGACTION
425
426#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
427#define __ARCH_WANT_SYS_TIME
428#define __ARCH_WANT_SYS_OLDUMOUNT
429#define __ARCH_WANT_SYS_ALARM
430#define __ARCH_WANT_SYS_UTIME
431#define __ARCH_WANT_SYS_OLD_GETRLIMIT
432#define __ARCH_WANT_OLD_READDIR
433#define __ARCH_WANT_SYS_SOCKETCALL
434#endif
435
436/*
437 * "Conditional" syscalls
438 *
439 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
440 * but it doesn't work on all toolchains, so we just do it by hand
441 */
442#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
443
444/*
445 * Unimplemented (or alternatively implemented) syscalls
446 */
447#define __IGNORE_fadvise64_64 1
448
449#endif /* __KERNEL__ */
450#endif /* __ASM_ARM_UNISTD_H */
diff --git a/include/asm-arm/user.h b/include/asm-arm/user.h
deleted file mode 100644
index 825c1e7c582d..000000000000
--- a/include/asm-arm/user.h
+++ /dev/null
@@ -1,84 +0,0 @@
1#ifndef _ARM_USER_H
2#define _ARM_USER_H
3
4#include <asm/page.h>
5#include <asm/ptrace.h>
6/* Core file format: The core file is written in such a way that gdb
7 can understand it and provide useful information to the user (under
8 linux we use the 'trad-core' bfd). There are quite a number of
9 obstacles to being able to view the contents of the floating point
10 registers, and until these are solved you will not be able to view the
11 contents of them. Actually, you can read in the core file and look at
12 the contents of the user struct to find out what the floating point
13 registers contain.
14 The actual file contents are as follows:
15 UPAGE: 1 page consisting of a user struct that tells gdb what is present
16 in the file. Directly after this is a copy of the task_struct, which
17 is currently not used by gdb, but it may come in useful at some point.
18 All of the registers are stored as part of the upage. The upage should
19 always be only one page.
20 DATA: The data area is stored. We use current->end_text to
21 current->brk to pick up all of the user variables, plus any memory
22 that may have been malloced. No attempt is made to determine if a page
23 is demand-zero or if a page is totally unused, we just cover the entire
24 range. All of the addresses are rounded in such a way that an integral
25 number of pages is written.
26 STACK: We need the stack information in order to get a meaningful
27 backtrace. We need to write the data from (esp) to
28 current->start_stack, so we round each of these off in order to be able
29 to write an integer number of pages.
30 The minimum core file size is 3 pages, or 12288 bytes.
31*/
32
33struct user_fp {
34 struct fp_reg {
35 unsigned int sign1:1;
36 unsigned int unused:15;
37 unsigned int sign2:1;
38 unsigned int exponent:14;
39 unsigned int j:1;
40 unsigned int mantissa1:31;
41 unsigned int mantissa0:32;
42 } fpregs[8];
43 unsigned int fpsr:32;
44 unsigned int fpcr:32;
45 unsigned char ftype[8];
46 unsigned int init_flag;
47};
48
49/* When the kernel dumps core, it starts by dumping the user struct -
50 this will be used by gdb to figure out where the data and stack segments
51 are within the file, and what virtual addresses to use. */
52struct user{
53/* We start with the registers, to mimic the way that "memory" is returned
54 from the ptrace(3,...) function. */
55 struct pt_regs regs; /* Where the registers are actually stored */
56/* ptrace does not yet supply these. Someday.... */
57 int u_fpvalid; /* True if math co-processor being used. */
58 /* for this mess. Not yet used. */
59/* The rest of this junk is to help gdb figure out what goes where */
60 unsigned long int u_tsize; /* Text segment size (pages). */
61 unsigned long int u_dsize; /* Data segment size (pages). */
62 unsigned long int u_ssize; /* Stack segment size (pages). */
63 unsigned long start_code; /* Starting virtual address of text. */
64 unsigned long start_stack; /* Starting virtual address of stack area.
65 This is actually the bottom of the stack,
66 the top of the stack is always found in the
67 esp register. */
68 long int signal; /* Signal that caused the core dump. */
69 int reserved; /* No longer used */
70 unsigned long u_ar0; /* Used by gdb to help find the values for */
71 /* the registers. */
72 unsigned long magic; /* To uniquely identify a core file */
73 char u_comm[32]; /* User command that was responsible */
74 int u_debugreg[8];
75 struct user_fp u_fp; /* FP state */
76 struct user_fp_struct * u_fp0;/* Used by gdb to help find the values for */
77 /* the FP registers. */
78};
79#define NBPG PAGE_SIZE
80#define UPAGES 1
81#define HOST_TEXT_START_ADDR (u.start_code)
82#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
83
84#endif /* _ARM_USER_H */
diff --git a/include/asm-arm/vfp.h b/include/asm-arm/vfp.h
deleted file mode 100644
index 5f9a2cb3d452..000000000000
--- a/include/asm-arm/vfp.h
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * linux/include/asm-arm/vfp.h
3 *
4 * VFP register definitions.
5 * First, the standard VFP set.
6 */
7
8#define FPSID cr0
9#define FPSCR cr1
10#define MVFR1 cr6
11#define MVFR0 cr7
12#define FPEXC cr8
13#define FPINST cr9
14#define FPINST2 cr10
15
16/* FPSID bits */
17#define FPSID_IMPLEMENTER_BIT (24)
18#define FPSID_IMPLEMENTER_MASK (0xff << FPSID_IMPLEMENTER_BIT)
19#define FPSID_SOFTWARE (1<<23)
20#define FPSID_FORMAT_BIT (21)
21#define FPSID_FORMAT_MASK (0x3 << FPSID_FORMAT_BIT)
22#define FPSID_NODOUBLE (1<<20)
23#define FPSID_ARCH_BIT (16)
24#define FPSID_ARCH_MASK (0xF << FPSID_ARCH_BIT)
25#define FPSID_PART_BIT (8)
26#define FPSID_PART_MASK (0xFF << FPSID_PART_BIT)
27#define FPSID_VARIANT_BIT (4)
28#define FPSID_VARIANT_MASK (0xF << FPSID_VARIANT_BIT)
29#define FPSID_REV_BIT (0)
30#define FPSID_REV_MASK (0xF << FPSID_REV_BIT)
31
32/* FPEXC bits */
33#define FPEXC_EX (1 << 31)
34#define FPEXC_EN (1 << 30)
35#define FPEXC_DEX (1 << 29)
36#define FPEXC_FP2V (1 << 28)
37#define FPEXC_VV (1 << 27)
38#define FPEXC_TFV (1 << 26)
39#define FPEXC_LENGTH_BIT (8)
40#define FPEXC_LENGTH_MASK (7 << FPEXC_LENGTH_BIT)
41#define FPEXC_IDF (1 << 7)
42#define FPEXC_IXF (1 << 4)
43#define FPEXC_UFF (1 << 3)
44#define FPEXC_OFF (1 << 2)
45#define FPEXC_DZF (1 << 1)
46#define FPEXC_IOF (1 << 0)
47#define FPEXC_TRAP_MASK (FPEXC_IDF|FPEXC_IXF|FPEXC_UFF|FPEXC_OFF|FPEXC_DZF|FPEXC_IOF)
48
49/* FPSCR bits */
50#define FPSCR_DEFAULT_NAN (1<<25)
51#define FPSCR_FLUSHTOZERO (1<<24)
52#define FPSCR_ROUND_NEAREST (0<<22)
53#define FPSCR_ROUND_PLUSINF (1<<22)
54#define FPSCR_ROUND_MINUSINF (2<<22)
55#define FPSCR_ROUND_TOZERO (3<<22)
56#define FPSCR_RMODE_BIT (22)
57#define FPSCR_RMODE_MASK (3 << FPSCR_RMODE_BIT)
58#define FPSCR_STRIDE_BIT (20)
59#define FPSCR_STRIDE_MASK (3 << FPSCR_STRIDE_BIT)
60#define FPSCR_LENGTH_BIT (16)
61#define FPSCR_LENGTH_MASK (7 << FPSCR_LENGTH_BIT)
62#define FPSCR_IOE (1<<8)
63#define FPSCR_DZE (1<<9)
64#define FPSCR_OFE (1<<10)
65#define FPSCR_UFE (1<<11)
66#define FPSCR_IXE (1<<12)
67#define FPSCR_IDE (1<<15)
68#define FPSCR_IOC (1<<0)
69#define FPSCR_DZC (1<<1)
70#define FPSCR_OFC (1<<2)
71#define FPSCR_UFC (1<<3)
72#define FPSCR_IXC (1<<4)
73#define FPSCR_IDC (1<<7)
74
75/* MVFR0 bits */
76#define MVFR0_A_SIMD_BIT (0)
77#define MVFR0_A_SIMD_MASK (0xf << MVFR0_A_SIMD_BIT)
78
79/* Bit patterns for decoding the packaged operation descriptors */
80#define VFPOPDESC_LENGTH_BIT (9)
81#define VFPOPDESC_LENGTH_MASK (0x07 << VFPOPDESC_LENGTH_BIT)
82#define VFPOPDESC_UNUSED_BIT (24)
83#define VFPOPDESC_UNUSED_MASK (0xFF << VFPOPDESC_UNUSED_BIT)
84#define VFPOPDESC_OPDESC_MASK (~(VFPOPDESC_LENGTH_MASK | VFPOPDESC_UNUSED_MASK))
diff --git a/include/asm-arm/vfpmacros.h b/include/asm-arm/vfpmacros.h
deleted file mode 100644
index cccb3892e73c..000000000000
--- a/include/asm-arm/vfpmacros.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * linux/include/asm-arm/vfpmacros.h
3 *
4 * Assembler-only file containing VFP macros and register definitions.
5 */
6#include "vfp.h"
7
8@ Macros to allow building with old toolkits (with no VFP support)
9 .macro VFPFMRX, rd, sysreg, cond
10 MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg
11 .endm
12
13 .macro VFPFMXR, sysreg, rd, cond
14 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
15 .endm
16
17 @ read all the working registers back into the VFP
18 .macro VFPFLDMIA, base, tmp
19#if __LINUX_ARM_ARCH__ < 6
20 LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15}
21#else
22 LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
23#endif
24#ifdef CONFIG_VFPv3
25 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
26 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
27 cmp \tmp, #2 @ 32 x 64bit registers?
28 ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
29 addne \base, \base, #32*4 @ step over unused register space
30#endif
31 .endm
32
33 @ write all the working registers out of the VFP
34 .macro VFPFSTMIA, base, tmp
35#if __LINUX_ARM_ARCH__ < 6
36 STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15}
37#else
38 STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
39#endif
40#ifdef CONFIG_VFPv3
41 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
42 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
43 cmp \tmp, #2 @ 32 x 64bit registers?
44 stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
45 addne \base, \base, #32*4 @ step over unused register space
46#endif
47 .endm
diff --git a/include/asm-arm/vga.h b/include/asm-arm/vga.h
deleted file mode 100644
index 1e0b913c3d71..000000000000
--- a/include/asm-arm/vga.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASMARM_VGA_H
2#define ASMARM_VGA_H
3
4#include <asm/hardware.h>
5#include <asm/io.h>
6
7#define VGA_MAP_MEM(x,s) (PCIMEM_BASE + (x))
8
9#define vga_readb(x) (*((volatile unsigned char *)x))
10#define vga_writeb(x,y) (*((volatile unsigned char *)y) = (x))
11
12#endif
diff --git a/include/asm-arm/xor.h b/include/asm-arm/xor.h
deleted file mode 100644
index e7c4cf58bed1..000000000000
--- a/include/asm-arm/xor.h
+++ /dev/null
@@ -1,141 +0,0 @@
1/*
2 * linux/include/asm-arm/xor.h
3 *
4 * Copyright (C) 2001 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <asm-generic/xor.h>
11
12#define __XOR(a1, a2) a1 ^= a2
13
14#define GET_BLOCK_2(dst) \
15 __asm__("ldmia %0, {%1, %2}" \
16 : "=r" (dst), "=r" (a1), "=r" (a2) \
17 : "0" (dst))
18
19#define GET_BLOCK_4(dst) \
20 __asm__("ldmia %0, {%1, %2, %3, %4}" \
21 : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \
22 : "0" (dst))
23
24#define XOR_BLOCK_2(src) \
25 __asm__("ldmia %0!, {%1, %2}" \
26 : "=r" (src), "=r" (b1), "=r" (b2) \
27 : "0" (src)); \
28 __XOR(a1, b1); __XOR(a2, b2);
29
30#define XOR_BLOCK_4(src) \
31 __asm__("ldmia %0!, {%1, %2, %3, %4}" \
32 : "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \
33 : "0" (src)); \
34 __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
35
36#define PUT_BLOCK_2(dst) \
37 __asm__ __volatile__("stmia %0!, {%2, %3}" \
38 : "=r" (dst) \
39 : "0" (dst), "r" (a1), "r" (a2))
40
41#define PUT_BLOCK_4(dst) \
42 __asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}" \
43 : "=r" (dst) \
44 : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4))
45
46static void
47xor_arm4regs_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
48{
49 unsigned int lines = bytes / sizeof(unsigned long) / 4;
50 register unsigned int a1 __asm__("r4");
51 register unsigned int a2 __asm__("r5");
52 register unsigned int a3 __asm__("r6");
53 register unsigned int a4 __asm__("r7");
54 register unsigned int b1 __asm__("r8");
55 register unsigned int b2 __asm__("r9");
56 register unsigned int b3 __asm__("ip");
57 register unsigned int b4 __asm__("lr");
58
59 do {
60 GET_BLOCK_4(p1);
61 XOR_BLOCK_4(p2);
62 PUT_BLOCK_4(p1);
63 } while (--lines);
64}
65
66static void
67xor_arm4regs_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
68 unsigned long *p3)
69{
70 unsigned int lines = bytes / sizeof(unsigned long) / 4;
71 register unsigned int a1 __asm__("r4");
72 register unsigned int a2 __asm__("r5");
73 register unsigned int a3 __asm__("r6");
74 register unsigned int a4 __asm__("r7");
75 register unsigned int b1 __asm__("r8");
76 register unsigned int b2 __asm__("r9");
77 register unsigned int b3 __asm__("ip");
78 register unsigned int b4 __asm__("lr");
79
80 do {
81 GET_BLOCK_4(p1);
82 XOR_BLOCK_4(p2);
83 XOR_BLOCK_4(p3);
84 PUT_BLOCK_4(p1);
85 } while (--lines);
86}
87
88static void
89xor_arm4regs_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
90 unsigned long *p3, unsigned long *p4)
91{
92 unsigned int lines = bytes / sizeof(unsigned long) / 2;
93 register unsigned int a1 __asm__("r8");
94 register unsigned int a2 __asm__("r9");
95 register unsigned int b1 __asm__("ip");
96 register unsigned int b2 __asm__("lr");
97
98 do {
99 GET_BLOCK_2(p1);
100 XOR_BLOCK_2(p2);
101 XOR_BLOCK_2(p3);
102 XOR_BLOCK_2(p4);
103 PUT_BLOCK_2(p1);
104 } while (--lines);
105}
106
107static void
108xor_arm4regs_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
109 unsigned long *p3, unsigned long *p4, unsigned long *p5)
110{
111 unsigned int lines = bytes / sizeof(unsigned long) / 2;
112 register unsigned int a1 __asm__("r8");
113 register unsigned int a2 __asm__("r9");
114 register unsigned int b1 __asm__("ip");
115 register unsigned int b2 __asm__("lr");
116
117 do {
118 GET_BLOCK_2(p1);
119 XOR_BLOCK_2(p2);
120 XOR_BLOCK_2(p3);
121 XOR_BLOCK_2(p4);
122 XOR_BLOCK_2(p5);
123 PUT_BLOCK_2(p1);
124 } while (--lines);
125}
126
127static struct xor_block_template xor_block_arm4regs = {
128 .name = "arm4regs",
129 .do_2 = xor_arm4regs_2,
130 .do_3 = xor_arm4regs_3,
131 .do_4 = xor_arm4regs_4,
132 .do_5 = xor_arm4regs_5,
133};
134
135#undef XOR_TRY_TEMPLATES
136#define XOR_TRY_TEMPLATES \
137 do { \
138 xor_speed(&xor_block_arm4regs); \
139 xor_speed(&xor_block_8regs); \
140 xor_speed(&xor_block_32regs); \
141 } while (0)
diff --git a/include/asm-m68k/contregs.h b/include/asm-m68k/contregs.h
index 1e233e7d191e..d1ea750bddfe 100644
--- a/include/asm-m68k/contregs.h
+++ b/include/asm-m68k/contregs.h
@@ -1,4 +1,53 @@
1#ifndef _M68K_CONTREGS_H 1#ifndef _M68K_CONTREGS_H
2#define _M68K_CONTREGS_H 2#define _M68K_CONTREGS_H
3#include <asm-sparc/contregs.h> 3
4/* contregs.h: Addresses of registers in the ASI_CONTROL alternate address
5 * space. These are for the mmu's context register, etc.
6 *
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 */
9
10/* 3=sun3
11 4=sun4 (as in sun4 sysmaint student book)
12 c=sun4c (according to davem) */
13
14#define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */
15#define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */
16#define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */
17#define AC_CONTEXT 0x30000000 /* 34c current mmu-context */
18#define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/
19#define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */
20#define AC_BUS_ERROR 0x60000000 /* 34 Not cleared on read, byte. */
21#define AC_SYNC_ERR 0x60000000 /* c fault type */
22#define AC_SYNC_VA 0x60000004 /* c fault virtual address */
23#define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */
24#define AC_ASYNC_VA 0x6000000c /* c async fault virtual address */
25#define AC_LEDS 0x70000000 /* 34 Zero turns on LEDs, byte */
26#define AC_CACHETAGS 0x80000000 /* 34c direct access to the VAC tags */
27#define AC_CACHEDDATA 0x90000000 /* 3 c direct access to the VAC data */
28#define AC_UDVMA_MAP 0xD0000000 /* 4 Not used on Sun boards, byte */
29#define AC_VME_VECTOR 0xE0000000 /* 4 For non-Autovector VME, byte */
30#define AC_BOOT_SCC 0xF0000000 /* 34 bypass to access Zilog 8530. byte.*/
31
32/* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress */
33#define AC_M_PCR 0x0000 /* shv Processor Control Reg */
34#define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */
35#define AC_M_CXR 0x0200 /* shv Context Register */
36#define AC_M_SFSR 0x0300 /* shv Synchronous Fault Status Reg */
37#define AC_M_SFAR 0x0400 /* shv Synchronous Fault Address Reg */
38#define AC_M_AFSR 0x0500 /* hv Asynchronous Fault Status Reg */
39#define AC_M_AFAR 0x0600 /* hv Asynchronous Fault Address Reg */
40#define AC_M_RESET 0x0700 /* hv Reset Reg */
41#define AC_M_RPR 0x1000 /* hv Root Pointer Reg */
42#define AC_M_TSUTRCR 0x1000 /* s TLB Replacement Ctrl Reg */
43#define AC_M_IAPTP 0x1100 /* hv Instruction Access PTP */
44#define AC_M_DAPTP 0x1200 /* hv Data Access PTP */
45#define AC_M_ITR 0x1300 /* hv Index Tag Register */
46#define AC_M_TRCR 0x1400 /* hv TLB Replacement Control Reg */
47#define AC_M_SFSRX 0x1300 /* s Synch Fault Status Reg prim */
48#define AC_M_SFARX 0x1400 /* s Synch Fault Address Reg prim */
49#define AC_M_RPR1 0x1500 /* h Root Pointer Reg (entry 2) */
50#define AC_M_IAPTP1 0x1600 /* h Instruction Access PTP (entry 2) */
51#define AC_M_DAPTP1 0x1700 /* h Data Access PTP (entry 2) */
52
4#endif /* _M68K_CONTREGS_H */ 53#endif /* _M68K_CONTREGS_H */
diff --git a/include/asm-m68k/fbio.h b/include/asm-m68k/fbio.h
index c17edf8c7bc4..b9215a0907d3 100644
--- a/include/asm-m68k/fbio.h
+++ b/include/asm-m68k/fbio.h
@@ -1 +1,330 @@
1#include <asm-sparc/fbio.h> 1#ifndef __LINUX_FBIO_H
2#define __LINUX_FBIO_H
3
4#include <linux/compiler.h>
5#include <linux/types.h>
6
7/* Constants used for fbio SunOS compatibility */
8/* (C) 1996 Miguel de Icaza */
9
10/* Frame buffer types */
11#define FBTYPE_NOTYPE -1
12#define FBTYPE_SUN1BW 0 /* mono */
13#define FBTYPE_SUN1COLOR 1
14#define FBTYPE_SUN2BW 2
15#define FBTYPE_SUN2COLOR 3
16#define FBTYPE_SUN2GP 4
17#define FBTYPE_SUN5COLOR 5
18#define FBTYPE_SUN3COLOR 6
19#define FBTYPE_MEMCOLOR 7
20#define FBTYPE_SUN4COLOR 8
21
22#define FBTYPE_NOTSUN1 9
23#define FBTYPE_NOTSUN2 10
24#define FBTYPE_NOTSUN3 11
25
26#define FBTYPE_SUNFAST_COLOR 12 /* cg6 */
27#define FBTYPE_SUNROP_COLOR 13
28#define FBTYPE_SUNFB_VIDEO 14
29#define FBTYPE_SUNGIFB 15
30#define FBTYPE_SUNGPLAS 16
31#define FBTYPE_SUNGP3 17
32#define FBTYPE_SUNGT 18
33#define FBTYPE_SUNLEO 19 /* zx Leo card */
34#define FBTYPE_MDICOLOR 20 /* cg14 */
35#define FBTYPE_TCXCOLOR 21 /* SUNW,tcx card */
36
37#define FBTYPE_LASTPLUSONE 21 /* This is not last + 1 in fact... */
38
39/* Does not seem to be listed in the Sun file either */
40#define FBTYPE_CREATOR 22
41#define FBTYPE_PCI_IGA1682 23
42#define FBTYPE_P9100COLOR 24
43
44#define FBTYPE_PCI_GENERIC 1000
45#define FBTYPE_PCI_MACH64 1001
46
47/* fbio ioctls */
48/* Returned by FBIOGTYPE */
49struct fbtype {
50 int fb_type; /* fb type, see above */
51 int fb_height; /* pixels */
52 int fb_width; /* pixels */
53 int fb_depth;
54 int fb_cmsize; /* color map entries */
55 int fb_size; /* fb size in bytes */
56};
57#define FBIOGTYPE _IOR('F', 0, struct fbtype)
58
59struct fbcmap {
60 int index; /* first element (0 origin) */
61 int count;
62 unsigned char __user *red;
63 unsigned char __user *green;
64 unsigned char __user *blue;
65};
66
67#ifdef __KERNEL__
68#define FBIOPUTCMAP_SPARC _IOW('F', 3, struct fbcmap)
69#define FBIOGETCMAP_SPARC _IOW('F', 4, struct fbcmap)
70#else
71#define FBIOPUTCMAP _IOW('F', 3, struct fbcmap)
72#define FBIOGETCMAP _IOW('F', 4, struct fbcmap)
73#endif
74
75/* # of device specific values */
76#define FB_ATTR_NDEVSPECIFIC 8
77/* # of possible emulations */
78#define FB_ATTR_NEMUTYPES 4
79
80struct fbsattr {
81 int flags;
82 int emu_type; /* -1 if none */
83 int dev_specific[FB_ATTR_NDEVSPECIFIC];
84};
85
86struct fbgattr {
87 int real_type; /* real frame buffer type */
88 int owner; /* unknown */
89 struct fbtype fbtype; /* real frame buffer fbtype */
90 struct fbsattr sattr;
91 int emu_types[FB_ATTR_NEMUTYPES]; /* supported emulations */
92};
93#define FBIOSATTR _IOW('F', 5, struct fbgattr) /* Unsupported: */
94#define FBIOGATTR _IOR('F', 6, struct fbgattr) /* supported */
95
96#define FBIOSVIDEO _IOW('F', 7, int)
97#define FBIOGVIDEO _IOR('F', 8, int)
98
99struct fbcursor {
100 short set; /* what to set, choose from the list above */
101 short enable; /* cursor on/off */
102 struct fbcurpos pos; /* cursor position */
103 struct fbcurpos hot; /* cursor hot spot */
104 struct fbcmap cmap; /* color map info */
105 struct fbcurpos size; /* cursor bit map size */
106 char __user *image; /* cursor image bits */
107 char __user *mask; /* cursor mask bits */
108};
109
110/* set/get cursor attributes/shape */
111#define FBIOSCURSOR _IOW('F', 24, struct fbcursor)
112#define FBIOGCURSOR _IOWR('F', 25, struct fbcursor)
113
114/* set/get cursor position */
115#define FBIOSCURPOS _IOW('F', 26, struct fbcurpos)
116#define FBIOGCURPOS _IOW('F', 27, struct fbcurpos)
117
118/* get max cursor size */
119#define FBIOGCURMAX _IOR('F', 28, struct fbcurpos)
120
121/* wid manipulation */
122struct fb_wid_alloc {
123#define FB_WID_SHARED_8 0
124#define FB_WID_SHARED_24 1
125#define FB_WID_DBL_8 2
126#define FB_WID_DBL_24 3
127 __u32 wa_type;
128 __s32 wa_index; /* Set on return */
129 __u32 wa_count;
130};
131struct fb_wid_item {
132 __u32 wi_type;
133 __s32 wi_index;
134 __u32 wi_attrs;
135 __u32 wi_values[32];
136};
137struct fb_wid_list {
138 __u32 wl_flags;
139 __u32 wl_count;
140 struct fb_wid_item *wl_list;
141};
142
143#define FBIO_WID_ALLOC _IOWR('F', 30, struct fb_wid_alloc)
144#define FBIO_WID_FREE _IOW('F', 31, struct fb_wid_alloc)
145#define FBIO_WID_PUT _IOW('F', 32, struct fb_wid_list)
146#define FBIO_WID_GET _IOWR('F', 33, struct fb_wid_list)
147
148/* Creator ioctls */
149#define FFB_IOCTL ('F'<<8)
150#define FFB_SYS_INFO (FFB_IOCTL|80)
151#define FFB_CLUTREAD (FFB_IOCTL|81)
152#define FFB_CLUTPOST (FFB_IOCTL|82)
153#define FFB_SETDIAGMODE (FFB_IOCTL|83)
154#define FFB_GETMONITORID (FFB_IOCTL|84)
155#define FFB_GETVIDEOMODE (FFB_IOCTL|85)
156#define FFB_SETVIDEOMODE (FFB_IOCTL|86)
157#define FFB_SETSERVER (FFB_IOCTL|87)
158#define FFB_SETOVCTL (FFB_IOCTL|88)
159#define FFB_GETOVCTL (FFB_IOCTL|89)
160#define FFB_GETSAXNUM (FFB_IOCTL|90)
161#define FFB_FBDEBUG (FFB_IOCTL|91)
162
163/* Cg14 ioctls */
164#define MDI_IOCTL ('M'<<8)
165#define MDI_RESET (MDI_IOCTL|1)
166#define MDI_GET_CFGINFO (MDI_IOCTL|2)
167#define MDI_SET_PIXELMODE (MDI_IOCTL|3)
168# define MDI_32_PIX 32
169# define MDI_16_PIX 16
170# define MDI_8_PIX 8
171
172struct mdi_cfginfo {
173 int mdi_ncluts; /* Number of implemented CLUTs in this MDI */
174 int mdi_type; /* FBTYPE name */
175 int mdi_height; /* height */
176 int mdi_width; /* widht */
177 int mdi_size; /* available ram */
178 int mdi_mode; /* 8bpp, 16bpp or 32bpp */
179 int mdi_pixfreq; /* pixel clock (from PROM) */
180};
181
182/* SparcLinux specific ioctl for the MDI, should be replaced for
183 * the SET_XLUT/SET_CLUTn ioctls instead
184 */
185#define MDI_CLEAR_XLUT (MDI_IOCTL|9)
186
187/* leo & ffb ioctls */
188struct fb_clut_alloc {
189 __u32 clutid; /* Set on return */
190 __u32 flag;
191 __u32 index;
192};
193
194struct fb_clut {
195#define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */
196 __u32 flag;
197 __u32 clutid;
198 __u32 offset;
199 __u32 count;
200 char * red;
201 char * green;
202 char * blue;
203};
204
205struct fb_clut32 {
206 __u32 flag;
207 __u32 clutid;
208 __u32 offset;
209 __u32 count;
210 __u32 red;
211 __u32 green;
212 __u32 blue;
213};
214
215#define LEO_CLUTALLOC _IOWR('L', 53, struct fb_clut_alloc)
216#define LEO_CLUTFREE _IOW('L', 54, struct fb_clut_alloc)
217#define LEO_CLUTREAD _IOW('L', 55, struct fb_clut)
218#define LEO_CLUTPOST _IOW('L', 56, struct fb_clut)
219#define LEO_SETGAMMA _IOW('L', 68, int) /* Not yet implemented */
220#define LEO_GETGAMMA _IOR('L', 69, int) /* Not yet implemented */
221
222#ifdef __KERNEL__
223/* Addresses on the fd of a cgsix that are mappable */
224#define CG6_FBC 0x70000000
225#define CG6_TEC 0x70001000
226#define CG6_BTREGS 0x70002000
227#define CG6_FHC 0x70004000
228#define CG6_THC 0x70005000
229#define CG6_ROM 0x70006000
230#define CG6_RAM 0x70016000
231#define CG6_DHC 0x80000000
232
233#define CG3_MMAP_OFFSET 0x4000000
234
235/* Addresses on the fd of a tcx that are mappable */
236#define TCX_RAM8BIT 0x00000000
237#define TCX_RAM24BIT 0x01000000
238#define TCX_UNK3 0x10000000
239#define TCX_UNK4 0x20000000
240#define TCX_CONTROLPLANE 0x28000000
241#define TCX_UNK6 0x30000000
242#define TCX_UNK7 0x38000000
243#define TCX_TEC 0x70000000
244#define TCX_BTREGS 0x70002000
245#define TCX_THC 0x70004000
246#define TCX_DHC 0x70008000
247#define TCX_ALT 0x7000a000
248#define TCX_SYNC 0x7000e000
249#define TCX_UNK2 0x70010000
250
251/* CG14 definitions */
252
253/* Offsets into the OBIO space: */
254#define CG14_REGS 0 /* registers */
255#define CG14_CURSORREGS 0x1000 /* cursor registers */
256#define CG14_DACREGS 0x2000 /* DAC registers */
257#define CG14_XLUT 0x3000 /* X Look Up Table -- ??? */
258#define CG14_CLUT1 0x4000 /* Color Look Up Table */
259#define CG14_CLUT2 0x5000 /* Color Look Up Table */
260#define CG14_CLUT3 0x6000 /* Color Look Up Table */
261#define CG14_AUTO 0xf000
262
263#endif /* KERNEL */
264
265/* These are exported to userland for applications to use */
266/* Mappable offsets for the cg14: control registers */
267#define MDI_DIRECT_MAP 0x10000000
268#define MDI_CTLREG_MAP 0x20000000
269#define MDI_CURSOR_MAP 0x30000000
270#define MDI_SHDW_VRT_MAP 0x40000000
271
272/* Mappable offsets for the cg14: frame buffer resolutions */
273/* 32 bits */
274#define MDI_CHUNKY_XBGR_MAP 0x50000000
275#define MDI_CHUNKY_BGR_MAP 0x60000000
276
277/* 16 bits */
278#define MDI_PLANAR_X16_MAP 0x70000000
279#define MDI_PLANAR_C16_MAP 0x80000000
280
281/* 8 bit is done as CG3 MMAP offset */
282/* 32 bits, planar */
283#define MDI_PLANAR_X32_MAP 0x90000000
284#define MDI_PLANAR_B32_MAP 0xa0000000
285#define MDI_PLANAR_G32_MAP 0xb0000000
286#define MDI_PLANAR_R32_MAP 0xc0000000
287
288/* Mappable offsets on leo */
289#define LEO_SS0_MAP 0x00000000
290#define LEO_LC_SS0_USR_MAP 0x00800000
291#define LEO_LD_SS0_MAP 0x00801000
292#define LEO_LX_CURSOR_MAP 0x00802000
293#define LEO_SS1_MAP 0x00803000
294#define LEO_LC_SS1_USR_MAP 0x01003000
295#define LEO_LD_SS1_MAP 0x01004000
296#define LEO_UNK_MAP 0x01005000
297#define LEO_LX_KRN_MAP 0x01006000
298#define LEO_LC_SS0_KRN_MAP 0x01007000
299#define LEO_LC_SS1_KRN_MAP 0x01008000
300#define LEO_LD_GBL_MAP 0x01009000
301#define LEO_UNK2_MAP 0x0100a000
302
303#ifdef __KERNEL__
304struct fbcmap32 {
305 int index; /* first element (0 origin) */
306 int count;
307 u32 red;
308 u32 green;
309 u32 blue;
310};
311
312#define FBIOPUTCMAP32 _IOW('F', 3, struct fbcmap32)
313#define FBIOGETCMAP32 _IOW('F', 4, struct fbcmap32)
314
315struct fbcursor32 {
316 short set; /* what to set, choose from the list above */
317 short enable; /* cursor on/off */
318 struct fbcurpos pos; /* cursor position */
319 struct fbcurpos hot; /* cursor hot spot */
320 struct fbcmap32 cmap; /* color map info */
321 struct fbcurpos size; /* cursor bit map size */
322 u32 image; /* cursor image bits */
323 u32 mask; /* cursor mask bits */
324};
325
326#define FBIOSCURSOR32 _IOW('F', 24, struct fbcursor32)
327#define FBIOGCURSOR32 _IOW('F', 25, struct fbcursor32)
328#endif
329
330#endif /* __LINUX_FBIO_H */
diff --git a/include/asm-m68k/idprom.h b/include/asm-m68k/idprom.h
index 4349eaf3cfe4..160616a89e05 100644
--- a/include/asm-m68k/idprom.h
+++ b/include/asm-m68k/idprom.h
@@ -1,6 +1,25 @@
1#ifndef _M68K_IDPROM_H 1#ifndef _M68K_IDPROM_H
2#define _M68K_IDPROM_H 2#define _M68K_IDPROM_H
3#include <asm-sparc/idprom.h> 3/*
4 * idprom.h: Macros and defines for idprom routines
5 *
6 * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
7 */
8
9#include <linux/types.h>
10
11struct idprom {
12 u8 id_format; /* Format identifier (always 0x01) */
13 u8 id_machtype; /* Machine type */
14 u8 id_ethaddr[6]; /* Hardware ethernet address */
15 s32 id_date; /* Date of manufacture */
16 u32 id_sernum:24; /* Unique serial number */
17 u8 id_cksum; /* Checksum - xor of the data bytes */
18 u8 reserved[16];
19};
20
21extern struct idprom *idprom;
22extern void idprom_init(void);
4 23
5/* Sun3: in control space */ 24/* Sun3: in control space */
6#define SUN3_IDPROM_BASE 0x00000000 25#define SUN3_IDPROM_BASE 0x00000000
diff --git a/include/asm-s390/Kbuild b/include/asm-s390/Kbuild
deleted file mode 100644
index 63a23415fba6..000000000000
--- a/include/asm-s390/Kbuild
+++ /dev/null
@@ -1,15 +0,0 @@
1include include/asm-generic/Kbuild.asm
2
3header-y += dasd.h
4header-y += monwriter.h
5header-y += qeth.h
6header-y += tape390.h
7header-y += ucontext.h
8header-y += vtoc.h
9header-y += zcrypt.h
10header-y += chsc.h
11
12unifdef-y += cmb.h
13unifdef-y += debug.h
14unifdef-y += chpid.h
15unifdef-y += schid.h
diff --git a/include/asm-s390/airq.h b/include/asm-s390/airq.h
deleted file mode 100644
index 1ac80d6b0588..000000000000
--- a/include/asm-s390/airq.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * include/asm-s390/airq.h
3 *
4 * Copyright IBM Corp. 2002,2007
5 * Author(s): Ingo Adlung <adlung@de.ibm.com>
6 * Cornelia Huck <cornelia.huck@de.ibm.com>
7 * Arnd Bergmann <arndb@de.ibm.com>
8 * Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
9 */
10
11#ifndef _ASM_S390_AIRQ_H
12#define _ASM_S390_AIRQ_H
13
14typedef void (*adapter_int_handler_t)(void *, void *);
15
16void *s390_register_adapter_interrupt(adapter_int_handler_t, void *, u8);
17void s390_unregister_adapter_interrupt(void *, u8);
18
19#endif /* _ASM_S390_AIRQ_H */
diff --git a/include/asm-s390/appldata.h b/include/asm-s390/appldata.h
deleted file mode 100644
index 79283dac8281..000000000000
--- a/include/asm-s390/appldata.h
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * include/asm-s390/appldata.h
3 *
4 * Copyright (C) IBM Corp. 2006
5 *
6 * Author(s): Melissa Howland <melissah@us.ibm.com>
7 */
8
9#ifndef _ASM_S390_APPLDATA_H
10#define _ASM_S390_APPLDATA_H
11
12#include <asm/io.h>
13
14#ifndef CONFIG_64BIT
15
16#define APPLDATA_START_INTERVAL_REC 0x00 /* Function codes for */
17#define APPLDATA_STOP_REC 0x01 /* DIAG 0xDC */
18#define APPLDATA_GEN_EVENT_REC 0x02
19#define APPLDATA_START_CONFIG_REC 0x03
20
21/*
22 * Parameter list for DIAGNOSE X'DC'
23 */
24struct appldata_parameter_list {
25 u16 diag; /* The DIAGNOSE code X'00DC' */
26 u8 function; /* The function code for the DIAGNOSE */
27 u8 parlist_length; /* Length of the parameter list */
28 u32 product_id_addr; /* Address of the 16-byte product ID */
29 u16 reserved;
30 u16 buffer_length; /* Length of the application data buffer */
31 u32 buffer_addr; /* Address of the application data buffer */
32} __attribute__ ((packed));
33
34#else /* CONFIG_64BIT */
35
36#define APPLDATA_START_INTERVAL_REC 0x80
37#define APPLDATA_STOP_REC 0x81
38#define APPLDATA_GEN_EVENT_REC 0x82
39#define APPLDATA_START_CONFIG_REC 0x83
40
41/*
42 * Parameter list for DIAGNOSE X'DC'
43 */
44struct appldata_parameter_list {
45 u16 diag;
46 u8 function;
47 u8 parlist_length;
48 u32 unused01;
49 u16 reserved;
50 u16 buffer_length;
51 u32 unused02;
52 u64 product_id_addr;
53 u64 buffer_addr;
54} __attribute__ ((packed));
55
56#endif /* CONFIG_64BIT */
57
58struct appldata_product_id {
59 char prod_nr[7]; /* product number */
60 u16 prod_fn; /* product function */
61 u8 record_nr; /* record number */
62 u16 version_nr; /* version */
63 u16 release_nr; /* release */
64 u16 mod_lvl; /* modification level */
65} __attribute__ ((packed));
66
67static inline int appldata_asm(struct appldata_product_id *id,
68 unsigned short fn, void *buffer,
69 unsigned short length)
70{
71 struct appldata_parameter_list parm_list;
72 int ry;
73
74 if (!MACHINE_IS_VM)
75 return -ENOSYS;
76 parm_list.diag = 0xdc;
77 parm_list.function = fn;
78 parm_list.parlist_length = sizeof(parm_list);
79 parm_list.buffer_length = length;
80 parm_list.product_id_addr = (unsigned long) id;
81 parm_list.buffer_addr = virt_to_phys(buffer);
82 asm volatile(
83 " diag %1,%0,0xdc"
84 : "=d" (ry)
85 : "d" (&parm_list), "m" (parm_list), "m" (*id)
86 : "cc");
87 return ry;
88}
89
90#endif /* _ASM_S390_APPLDATA_H */
diff --git a/include/asm-s390/atomic.h b/include/asm-s390/atomic.h
deleted file mode 100644
index 2d184655bc5d..000000000000
--- a/include/asm-s390/atomic.h
+++ /dev/null
@@ -1,285 +0,0 @@
1#ifndef __ARCH_S390_ATOMIC__
2#define __ARCH_S390_ATOMIC__
3
4#include <linux/compiler.h>
5
6/*
7 * include/asm-s390/atomic.h
8 *
9 * S390 version
10 * Copyright (C) 1999-2005 IBM Deutschland Entwicklung GmbH, IBM Corporation
11 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
12 * Denis Joseph Barrow,
13 * Arnd Bergmann (arndb@de.ibm.com)
14 *
15 * Derived from "include/asm-i386/bitops.h"
16 * Copyright (C) 1992, Linus Torvalds
17 *
18 */
19
20/*
21 * Atomic operations that C can't guarantee us. Useful for
22 * resource counting etc..
23 * S390 uses 'Compare And Swap' for atomicity in SMP enviroment
24 */
25
26typedef struct {
27 int counter;
28} __attribute__ ((aligned (4))) atomic_t;
29#define ATOMIC_INIT(i) { (i) }
30
31#ifdef __KERNEL__
32
33#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
34
35#define __CS_LOOP(ptr, op_val, op_string) ({ \
36 typeof(ptr->counter) old_val, new_val; \
37 asm volatile( \
38 " l %0,%2\n" \
39 "0: lr %1,%0\n" \
40 op_string " %1,%3\n" \
41 " cs %0,%1,%2\n" \
42 " jl 0b" \
43 : "=&d" (old_val), "=&d" (new_val), \
44 "=Q" (((atomic_t *)(ptr))->counter) \
45 : "d" (op_val), "Q" (((atomic_t *)(ptr))->counter) \
46 : "cc", "memory"); \
47 new_val; \
48})
49
50#else /* __GNUC__ */
51
52#define __CS_LOOP(ptr, op_val, op_string) ({ \
53 typeof(ptr->counter) old_val, new_val; \
54 asm volatile( \
55 " l %0,0(%3)\n" \
56 "0: lr %1,%0\n" \
57 op_string " %1,%4\n" \
58 " cs %0,%1,0(%3)\n" \
59 " jl 0b" \
60 : "=&d" (old_val), "=&d" (new_val), \
61 "=m" (((atomic_t *)(ptr))->counter) \
62 : "a" (ptr), "d" (op_val), \
63 "m" (((atomic_t *)(ptr))->counter) \
64 : "cc", "memory"); \
65 new_val; \
66})
67
68#endif /* __GNUC__ */
69
70static inline int atomic_read(const atomic_t *v)
71{
72 barrier();
73 return v->counter;
74}
75
76static inline void atomic_set(atomic_t *v, int i)
77{
78 v->counter = i;
79 barrier();
80}
81
82static __inline__ int atomic_add_return(int i, atomic_t * v)
83{
84 return __CS_LOOP(v, i, "ar");
85}
86#define atomic_add(_i, _v) atomic_add_return(_i, _v)
87#define atomic_add_negative(_i, _v) (atomic_add_return(_i, _v) < 0)
88#define atomic_inc(_v) atomic_add_return(1, _v)
89#define atomic_inc_return(_v) atomic_add_return(1, _v)
90#define atomic_inc_and_test(_v) (atomic_add_return(1, _v) == 0)
91
92static __inline__ int atomic_sub_return(int i, atomic_t * v)
93{
94 return __CS_LOOP(v, i, "sr");
95}
96#define atomic_sub(_i, _v) atomic_sub_return(_i, _v)
97#define atomic_sub_and_test(_i, _v) (atomic_sub_return(_i, _v) == 0)
98#define atomic_dec(_v) atomic_sub_return(1, _v)
99#define atomic_dec_return(_v) atomic_sub_return(1, _v)
100#define atomic_dec_and_test(_v) (atomic_sub_return(1, _v) == 0)
101
102static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t * v)
103{
104 __CS_LOOP(v, ~mask, "nr");
105}
106
107static __inline__ void atomic_set_mask(unsigned long mask, atomic_t * v)
108{
109 __CS_LOOP(v, mask, "or");
110}
111
112#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
113
114static __inline__ int atomic_cmpxchg(atomic_t *v, int old, int new)
115{
116#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
117 asm volatile(
118 " cs %0,%2,%1"
119 : "+d" (old), "=Q" (v->counter)
120 : "d" (new), "Q" (v->counter)
121 : "cc", "memory");
122#else /* __GNUC__ */
123 asm volatile(
124 " cs %0,%3,0(%2)"
125 : "+d" (old), "=m" (v->counter)
126 : "a" (v), "d" (new), "m" (v->counter)
127 : "cc", "memory");
128#endif /* __GNUC__ */
129 return old;
130}
131
132static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
133{
134 int c, old;
135 c = atomic_read(v);
136 for (;;) {
137 if (unlikely(c == u))
138 break;
139 old = atomic_cmpxchg(v, c, c + a);
140 if (likely(old == c))
141 break;
142 c = old;
143 }
144 return c != u;
145}
146
147#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
148
149#undef __CS_LOOP
150
151#ifdef __s390x__
152typedef struct {
153 long long counter;
154} __attribute__ ((aligned (8))) atomic64_t;
155#define ATOMIC64_INIT(i) { (i) }
156
157#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
158
159#define __CSG_LOOP(ptr, op_val, op_string) ({ \
160 typeof(ptr->counter) old_val, new_val; \
161 asm volatile( \
162 " lg %0,%2\n" \
163 "0: lgr %1,%0\n" \
164 op_string " %1,%3\n" \
165 " csg %0,%1,%2\n" \
166 " jl 0b" \
167 : "=&d" (old_val), "=&d" (new_val), \
168 "=Q" (((atomic_t *)(ptr))->counter) \
169 : "d" (op_val), "Q" (((atomic_t *)(ptr))->counter) \
170 : "cc", "memory" ); \
171 new_val; \
172})
173
174#else /* __GNUC__ */
175
176#define __CSG_LOOP(ptr, op_val, op_string) ({ \
177 typeof(ptr->counter) old_val, new_val; \
178 asm volatile( \
179 " lg %0,0(%3)\n" \
180 "0: lgr %1,%0\n" \
181 op_string " %1,%4\n" \
182 " csg %0,%1,0(%3)\n" \
183 " jl 0b" \
184 : "=&d" (old_val), "=&d" (new_val), \
185 "=m" (((atomic_t *)(ptr))->counter) \
186 : "a" (ptr), "d" (op_val), \
187 "m" (((atomic_t *)(ptr))->counter) \
188 : "cc", "memory" ); \
189 new_val; \
190})
191
192#endif /* __GNUC__ */
193
194static inline long long atomic64_read(const atomic64_t *v)
195{
196 barrier();
197 return v->counter;
198}
199
200static inline void atomic64_set(atomic64_t *v, long long i)
201{
202 v->counter = i;
203 barrier();
204}
205
206static __inline__ long long atomic64_add_return(long long i, atomic64_t * v)
207{
208 return __CSG_LOOP(v, i, "agr");
209}
210#define atomic64_add(_i, _v) atomic64_add_return(_i, _v)
211#define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0)
212#define atomic64_inc(_v) atomic64_add_return(1, _v)
213#define atomic64_inc_return(_v) atomic64_add_return(1, _v)
214#define atomic64_inc_and_test(_v) (atomic64_add_return(1, _v) == 0)
215
216static __inline__ long long atomic64_sub_return(long long i, atomic64_t * v)
217{
218 return __CSG_LOOP(v, i, "sgr");
219}
220#define atomic64_sub(_i, _v) atomic64_sub_return(_i, _v)
221#define atomic64_sub_and_test(_i, _v) (atomic64_sub_return(_i, _v) == 0)
222#define atomic64_dec(_v) atomic64_sub_return(1, _v)
223#define atomic64_dec_return(_v) atomic64_sub_return(1, _v)
224#define atomic64_dec_and_test(_v) (atomic64_sub_return(1, _v) == 0)
225
226static __inline__ void atomic64_clear_mask(unsigned long mask, atomic64_t * v)
227{
228 __CSG_LOOP(v, ~mask, "ngr");
229}
230
231static __inline__ void atomic64_set_mask(unsigned long mask, atomic64_t * v)
232{
233 __CSG_LOOP(v, mask, "ogr");
234}
235
236#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
237
238static __inline__ long long atomic64_cmpxchg(atomic64_t *v,
239 long long old, long long new)
240{
241#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
242 asm volatile(
243 " csg %0,%2,%1"
244 : "+d" (old), "=Q" (v->counter)
245 : "d" (new), "Q" (v->counter)
246 : "cc", "memory");
247#else /* __GNUC__ */
248 asm volatile(
249 " csg %0,%3,0(%2)"
250 : "+d" (old), "=m" (v->counter)
251 : "a" (v), "d" (new), "m" (v->counter)
252 : "cc", "memory");
253#endif /* __GNUC__ */
254 return old;
255}
256
257static __inline__ int atomic64_add_unless(atomic64_t *v,
258 long long a, long long u)
259{
260 long long c, old;
261 c = atomic64_read(v);
262 for (;;) {
263 if (unlikely(c == u))
264 break;
265 old = atomic64_cmpxchg(v, c, c + a);
266 if (likely(old == c))
267 break;
268 c = old;
269 }
270 return c != u;
271}
272
273#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
274
275#undef __CSG_LOOP
276#endif
277
278#define smp_mb__before_atomic_dec() smp_mb()
279#define smp_mb__after_atomic_dec() smp_mb()
280#define smp_mb__before_atomic_inc() smp_mb()
281#define smp_mb__after_atomic_inc() smp_mb()
282
283#include <asm-generic/atomic.h>
284#endif /* __KERNEL__ */
285#endif /* __ARCH_S390_ATOMIC__ */
diff --git a/include/asm-s390/auxvec.h b/include/asm-s390/auxvec.h
deleted file mode 100644
index 0d340720fd99..000000000000
--- a/include/asm-s390/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASMS390_AUXVEC_H
2#define __ASMS390_AUXVEC_H
3
4#endif
diff --git a/include/asm-s390/bitops.h b/include/asm-s390/bitops.h
deleted file mode 100644
index b4eb24ab5af9..000000000000
--- a/include/asm-s390/bitops.h
+++ /dev/null
@@ -1,884 +0,0 @@
1#ifndef _S390_BITOPS_H
2#define _S390_BITOPS_H
3
4/*
5 * include/asm-s390/bitops.h
6 *
7 * S390 version
8 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
9 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
10 *
11 * Derived from "include/asm-i386/bitops.h"
12 * Copyright (C) 1992, Linus Torvalds
13 *
14 */
15
16#ifdef __KERNEL__
17
18#ifndef _LINUX_BITOPS_H
19#error only <linux/bitops.h> can be included directly
20#endif
21
22#include <linux/compiler.h>
23
24/*
25 * 32 bit bitops format:
26 * bit 0 is the LSB of *addr; bit 31 is the MSB of *addr;
27 * bit 32 is the LSB of *(addr+4). That combined with the
28 * big endian byte order on S390 give the following bit
29 * order in memory:
30 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 \
31 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
32 * after that follows the next long with bit numbers
33 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
34 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
35 * The reason for this bit ordering is the fact that
36 * in the architecture independent code bits operations
37 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
38 * with operation of the form "set_bit(bitnr, flags)".
39 *
40 * 64 bit bitops format:
41 * bit 0 is the LSB of *addr; bit 63 is the MSB of *addr;
42 * bit 64 is the LSB of *(addr+8). That combined with the
43 * big endian byte order on S390 give the following bit
44 * order in memory:
45 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
46 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
47 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10
48 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
49 * after that follows the next long with bit numbers
50 * 7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70
51 * 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60
52 * 5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50
53 * 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40
54 * The reason for this bit ordering is the fact that
55 * in the architecture independent code bits operations
56 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
57 * with operation of the form "set_bit(bitnr, flags)".
58 */
59
60/* bitmap tables from arch/S390/kernel/bitmap.S */
61extern const char _oi_bitmap[];
62extern const char _ni_bitmap[];
63extern const char _zb_findmap[];
64extern const char _sb_findmap[];
65
66#ifndef __s390x__
67
68#define __BITOPS_ALIGN 3
69#define __BITOPS_WORDSIZE 32
70#define __BITOPS_OR "or"
71#define __BITOPS_AND "nr"
72#define __BITOPS_XOR "xr"
73
74#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
75
76#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
77 asm volatile( \
78 " l %0,%2\n" \
79 "0: lr %1,%0\n" \
80 __op_string " %1,%3\n" \
81 " cs %0,%1,%2\n" \
82 " jl 0b" \
83 : "=&d" (__old), "=&d" (__new), \
84 "=Q" (*(unsigned long *) __addr) \
85 : "d" (__val), "Q" (*(unsigned long *) __addr) \
86 : "cc");
87
88#else /* __GNUC__ */
89
90#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
91 asm volatile( \
92 " l %0,0(%4)\n" \
93 "0: lr %1,%0\n" \
94 __op_string " %1,%3\n" \
95 " cs %0,%1,0(%4)\n" \
96 " jl 0b" \
97 : "=&d" (__old), "=&d" (__new), \
98 "=m" (*(unsigned long *) __addr) \
99 : "d" (__val), "a" (__addr), \
100 "m" (*(unsigned long *) __addr) : "cc");
101
102#endif /* __GNUC__ */
103
104#else /* __s390x__ */
105
106#define __BITOPS_ALIGN 7
107#define __BITOPS_WORDSIZE 64
108#define __BITOPS_OR "ogr"
109#define __BITOPS_AND "ngr"
110#define __BITOPS_XOR "xgr"
111
112#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
113
114#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
115 asm volatile( \
116 " lg %0,%2\n" \
117 "0: lgr %1,%0\n" \
118 __op_string " %1,%3\n" \
119 " csg %0,%1,%2\n" \
120 " jl 0b" \
121 : "=&d" (__old), "=&d" (__new), \
122 "=Q" (*(unsigned long *) __addr) \
123 : "d" (__val), "Q" (*(unsigned long *) __addr) \
124 : "cc");
125
126#else /* __GNUC__ */
127
128#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \
129 asm volatile( \
130 " lg %0,0(%4)\n" \
131 "0: lgr %1,%0\n" \
132 __op_string " %1,%3\n" \
133 " csg %0,%1,0(%4)\n" \
134 " jl 0b" \
135 : "=&d" (__old), "=&d" (__new), \
136 "=m" (*(unsigned long *) __addr) \
137 : "d" (__val), "a" (__addr), \
138 "m" (*(unsigned long *) __addr) : "cc");
139
140
141#endif /* __GNUC__ */
142
143#endif /* __s390x__ */
144
145#define __BITOPS_WORDS(bits) (((bits)+__BITOPS_WORDSIZE-1)/__BITOPS_WORDSIZE)
146#define __BITOPS_BARRIER() asm volatile("" : : : "memory")
147
148#ifdef CONFIG_SMP
149/*
150 * SMP safe set_bit routine based on compare and swap (CS)
151 */
152static inline void set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
153{
154 unsigned long addr, old, new, mask;
155
156 addr = (unsigned long) ptr;
157 /* calculate address for CS */
158 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
159 /* make OR mask */
160 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
161 /* Do the atomic update. */
162 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR);
163}
164
165/*
166 * SMP safe clear_bit routine based on compare and swap (CS)
167 */
168static inline void clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
169{
170 unsigned long addr, old, new, mask;
171
172 addr = (unsigned long) ptr;
173 /* calculate address for CS */
174 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
175 /* make AND mask */
176 mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1)));
177 /* Do the atomic update. */
178 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND);
179}
180
181/*
182 * SMP safe change_bit routine based on compare and swap (CS)
183 */
184static inline void change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
185{
186 unsigned long addr, old, new, mask;
187
188 addr = (unsigned long) ptr;
189 /* calculate address for CS */
190 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
191 /* make XOR mask */
192 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
193 /* Do the atomic update. */
194 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR);
195}
196
197/*
198 * SMP safe test_and_set_bit routine based on compare and swap (CS)
199 */
200static inline int
201test_and_set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
202{
203 unsigned long addr, old, new, mask;
204
205 addr = (unsigned long) ptr;
206 /* calculate address for CS */
207 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
208 /* make OR/test mask */
209 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
210 /* Do the atomic update. */
211 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR);
212 __BITOPS_BARRIER();
213 return (old & mask) != 0;
214}
215
216/*
217 * SMP safe test_and_clear_bit routine based on compare and swap (CS)
218 */
219static inline int
220test_and_clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
221{
222 unsigned long addr, old, new, mask;
223
224 addr = (unsigned long) ptr;
225 /* calculate address for CS */
226 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
227 /* make AND/test mask */
228 mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1)));
229 /* Do the atomic update. */
230 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND);
231 __BITOPS_BARRIER();
232 return (old ^ new) != 0;
233}
234
235/*
236 * SMP safe test_and_change_bit routine based on compare and swap (CS)
237 */
238static inline int
239test_and_change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
240{
241 unsigned long addr, old, new, mask;
242
243 addr = (unsigned long) ptr;
244 /* calculate address for CS */
245 addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
246 /* make XOR/test mask */
247 mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1));
248 /* Do the atomic update. */
249 __BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR);
250 __BITOPS_BARRIER();
251 return (old & mask) != 0;
252}
253#endif /* CONFIG_SMP */
254
255/*
256 * fast, non-SMP set_bit routine
257 */
258static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr)
259{
260 unsigned long addr;
261
262 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
263 asm volatile(
264 " oc 0(1,%1),0(%2)"
265 : "=m" (*(char *) addr) : "a" (addr),
266 "a" (_oi_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc" );
267}
268
269static inline void
270__constant_set_bit(const unsigned long nr, volatile unsigned long *ptr)
271{
272 unsigned long addr;
273
274 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
275 *(unsigned char *) addr |= 1 << (nr & 7);
276}
277
278#define set_bit_simple(nr,addr) \
279(__builtin_constant_p((nr)) ? \
280 __constant_set_bit((nr),(addr)) : \
281 __set_bit((nr),(addr)) )
282
283/*
284 * fast, non-SMP clear_bit routine
285 */
286static inline void
287__clear_bit(unsigned long nr, volatile unsigned long *ptr)
288{
289 unsigned long addr;
290
291 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
292 asm volatile(
293 " nc 0(1,%1),0(%2)"
294 : "=m" (*(char *) addr) : "a" (addr),
295 "a" (_ni_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc");
296}
297
298static inline void
299__constant_clear_bit(const unsigned long nr, volatile unsigned long *ptr)
300{
301 unsigned long addr;
302
303 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
304 *(unsigned char *) addr &= ~(1 << (nr & 7));
305}
306
307#define clear_bit_simple(nr,addr) \
308(__builtin_constant_p((nr)) ? \
309 __constant_clear_bit((nr),(addr)) : \
310 __clear_bit((nr),(addr)) )
311
312/*
313 * fast, non-SMP change_bit routine
314 */
315static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr)
316{
317 unsigned long addr;
318
319 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
320 asm volatile(
321 " xc 0(1,%1),0(%2)"
322 : "=m" (*(char *) addr) : "a" (addr),
323 "a" (_oi_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc" );
324}
325
326static inline void
327__constant_change_bit(const unsigned long nr, volatile unsigned long *ptr)
328{
329 unsigned long addr;
330
331 addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
332 *(unsigned char *) addr ^= 1 << (nr & 7);
333}
334
335#define change_bit_simple(nr,addr) \
336(__builtin_constant_p((nr)) ? \
337 __constant_change_bit((nr),(addr)) : \
338 __change_bit((nr),(addr)) )
339
340/*
341 * fast, non-SMP test_and_set_bit routine
342 */
343static inline int
344test_and_set_bit_simple(unsigned long nr, volatile unsigned long *ptr)
345{
346 unsigned long addr;
347 unsigned char ch;
348
349 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
350 ch = *(unsigned char *) addr;
351 asm volatile(
352 " oc 0(1,%1),0(%2)"
353 : "=m" (*(char *) addr)
354 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
355 "m" (*(char *) addr) : "cc", "memory");
356 return (ch >> (nr & 7)) & 1;
357}
358#define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y)
359
360/*
361 * fast, non-SMP test_and_clear_bit routine
362 */
363static inline int
364test_and_clear_bit_simple(unsigned long nr, volatile unsigned long *ptr)
365{
366 unsigned long addr;
367 unsigned char ch;
368
369 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
370 ch = *(unsigned char *) addr;
371 asm volatile(
372 " nc 0(1,%1),0(%2)"
373 : "=m" (*(char *) addr)
374 : "a" (addr), "a" (_ni_bitmap + (nr & 7)),
375 "m" (*(char *) addr) : "cc", "memory");
376 return (ch >> (nr & 7)) & 1;
377}
378#define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y)
379
380/*
381 * fast, non-SMP test_and_change_bit routine
382 */
383static inline int
384test_and_change_bit_simple(unsigned long nr, volatile unsigned long *ptr)
385{
386 unsigned long addr;
387 unsigned char ch;
388
389 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
390 ch = *(unsigned char *) addr;
391 asm volatile(
392 " xc 0(1,%1),0(%2)"
393 : "=m" (*(char *) addr)
394 : "a" (addr), "a" (_oi_bitmap + (nr & 7)),
395 "m" (*(char *) addr) : "cc", "memory");
396 return (ch >> (nr & 7)) & 1;
397}
398#define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y)
399
400#ifdef CONFIG_SMP
401#define set_bit set_bit_cs
402#define clear_bit clear_bit_cs
403#define change_bit change_bit_cs
404#define test_and_set_bit test_and_set_bit_cs
405#define test_and_clear_bit test_and_clear_bit_cs
406#define test_and_change_bit test_and_change_bit_cs
407#else
408#define set_bit set_bit_simple
409#define clear_bit clear_bit_simple
410#define change_bit change_bit_simple
411#define test_and_set_bit test_and_set_bit_simple
412#define test_and_clear_bit test_and_clear_bit_simple
413#define test_and_change_bit test_and_change_bit_simple
414#endif
415
416
417/*
418 * This routine doesn't need to be atomic.
419 */
420
421static inline int __test_bit(unsigned long nr, const volatile unsigned long *ptr)
422{
423 unsigned long addr;
424 unsigned char ch;
425
426 addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3);
427 ch = *(volatile unsigned char *) addr;
428 return (ch >> (nr & 7)) & 1;
429}
430
431static inline int
432__constant_test_bit(unsigned long nr, const volatile unsigned long *addr) {
433 return (((volatile char *) addr)
434 [(nr^(__BITOPS_WORDSIZE-8))>>3] & (1<<(nr&7))) != 0;
435}
436
437#define test_bit(nr,addr) \
438(__builtin_constant_p((nr)) ? \
439 __constant_test_bit((nr),(addr)) : \
440 __test_bit((nr),(addr)) )
441
442/*
443 * Optimized find bit helper functions.
444 */
445
446/**
447 * __ffz_word_loop - find byte offset of first long != -1UL
448 * @addr: pointer to array of unsigned long
449 * @size: size of the array in bits
450 */
451static inline unsigned long __ffz_word_loop(const unsigned long *addr,
452 unsigned long size)
453{
454 typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
455 unsigned long bytes = 0;
456
457 asm volatile(
458#ifndef __s390x__
459 " ahi %1,-1\n"
460 " sra %1,5\n"
461 " jz 1f\n"
462 "0: c %2,0(%0,%3)\n"
463 " jne 1f\n"
464 " la %0,4(%0)\n"
465 " brct %1,0b\n"
466 "1:\n"
467#else
468 " aghi %1,-1\n"
469 " srag %1,%1,6\n"
470 " jz 1f\n"
471 "0: cg %2,0(%0,%3)\n"
472 " jne 1f\n"
473 " la %0,8(%0)\n"
474 " brct %1,0b\n"
475 "1:\n"
476#endif
477 : "+&a" (bytes), "+&d" (size)
478 : "d" (-1UL), "a" (addr), "m" (*(addrtype *) addr)
479 : "cc" );
480 return bytes;
481}
482
483/**
484 * __ffs_word_loop - find byte offset of first long != 0UL
485 * @addr: pointer to array of unsigned long
486 * @size: size of the array in bits
487 */
488static inline unsigned long __ffs_word_loop(const unsigned long *addr,
489 unsigned long size)
490{
491 typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype;
492 unsigned long bytes = 0;
493
494 asm volatile(
495#ifndef __s390x__
496 " ahi %1,-1\n"
497 " sra %1,5\n"
498 " jz 1f\n"
499 "0: c %2,0(%0,%3)\n"
500 " jne 1f\n"
501 " la %0,4(%0)\n"
502 " brct %1,0b\n"
503 "1:\n"
504#else
505 " aghi %1,-1\n"
506 " srag %1,%1,6\n"
507 " jz 1f\n"
508 "0: cg %2,0(%0,%3)\n"
509 " jne 1f\n"
510 " la %0,8(%0)\n"
511 " brct %1,0b\n"
512 "1:\n"
513#endif
514 : "+&a" (bytes), "+&a" (size)
515 : "d" (0UL), "a" (addr), "m" (*(addrtype *) addr)
516 : "cc" );
517 return bytes;
518}
519
520/**
521 * __ffz_word - add number of the first unset bit
522 * @nr: base value the bit number is added to
523 * @word: the word that is searched for unset bits
524 */
525static inline unsigned long __ffz_word(unsigned long nr, unsigned long word)
526{
527#ifdef __s390x__
528 if (likely((word & 0xffffffff) == 0xffffffff)) {
529 word >>= 32;
530 nr += 32;
531 }
532#endif
533 if (likely((word & 0xffff) == 0xffff)) {
534 word >>= 16;
535 nr += 16;
536 }
537 if (likely((word & 0xff) == 0xff)) {
538 word >>= 8;
539 nr += 8;
540 }
541 return nr + _zb_findmap[(unsigned char) word];
542}
543
544/**
545 * __ffs_word - add number of the first set bit
546 * @nr: base value the bit number is added to
547 * @word: the word that is searched for set bits
548 */
549static inline unsigned long __ffs_word(unsigned long nr, unsigned long word)
550{
551#ifdef __s390x__
552 if (likely((word & 0xffffffff) == 0)) {
553 word >>= 32;
554 nr += 32;
555 }
556#endif
557 if (likely((word & 0xffff) == 0)) {
558 word >>= 16;
559 nr += 16;
560 }
561 if (likely((word & 0xff) == 0)) {
562 word >>= 8;
563 nr += 8;
564 }
565 return nr + _sb_findmap[(unsigned char) word];
566}
567
568
569/**
570 * __load_ulong_be - load big endian unsigned long
571 * @p: pointer to array of unsigned long
572 * @offset: byte offset of source value in the array
573 */
574static inline unsigned long __load_ulong_be(const unsigned long *p,
575 unsigned long offset)
576{
577 p = (unsigned long *)((unsigned long) p + offset);
578 return *p;
579}
580
581/**
582 * __load_ulong_le - load little endian unsigned long
583 * @p: pointer to array of unsigned long
584 * @offset: byte offset of source value in the array
585 */
586static inline unsigned long __load_ulong_le(const unsigned long *p,
587 unsigned long offset)
588{
589 unsigned long word;
590
591 p = (unsigned long *)((unsigned long) p + offset);
592#ifndef __s390x__
593 asm volatile(
594 " ic %0,0(%1)\n"
595 " icm %0,2,1(%1)\n"
596 " icm %0,4,2(%1)\n"
597 " icm %0,8,3(%1)"
598 : "=&d" (word) : "a" (p), "m" (*p) : "cc");
599#else
600 asm volatile(
601 " lrvg %0,%1"
602 : "=d" (word) : "m" (*p) );
603#endif
604 return word;
605}
606
607/*
608 * The various find bit functions.
609 */
610
611/*
612 * ffz - find first zero in word.
613 * @word: The word to search
614 *
615 * Undefined if no zero exists, so code should check against ~0UL first.
616 */
617static inline unsigned long ffz(unsigned long word)
618{
619 return __ffz_word(0, word);
620}
621
622/**
623 * __ffs - find first bit in word.
624 * @word: The word to search
625 *
626 * Undefined if no bit exists, so code should check against 0 first.
627 */
628static inline unsigned long __ffs (unsigned long word)
629{
630 return __ffs_word(0, word);
631}
632
633/**
634 * ffs - find first bit set
635 * @x: the word to search
636 *
637 * This is defined the same way as
638 * the libc and compiler builtin ffs routines, therefore
639 * differs in spirit from the above ffz (man ffs).
640 */
641static inline int ffs(int x)
642{
643 if (!x)
644 return 0;
645 return __ffs_word(1, x);
646}
647
648/**
649 * find_first_zero_bit - find the first zero bit in a memory region
650 * @addr: The address to start the search at
651 * @size: The maximum size to search
652 *
653 * Returns the bit-number of the first zero bit, not the number of the byte
654 * containing a bit.
655 */
656static inline unsigned long find_first_zero_bit(const unsigned long *addr,
657 unsigned long size)
658{
659 unsigned long bytes, bits;
660
661 if (!size)
662 return 0;
663 bytes = __ffz_word_loop(addr, size);
664 bits = __ffz_word(bytes*8, __load_ulong_be(addr, bytes));
665 return (bits < size) ? bits : size;
666}
667
668/**
669 * find_first_bit - find the first set bit in a memory region
670 * @addr: The address to start the search at
671 * @size: The maximum size to search
672 *
673 * Returns the bit-number of the first set bit, not the number of the byte
674 * containing a bit.
675 */
676static inline unsigned long find_first_bit(const unsigned long * addr,
677 unsigned long size)
678{
679 unsigned long bytes, bits;
680
681 if (!size)
682 return 0;
683 bytes = __ffs_word_loop(addr, size);
684 bits = __ffs_word(bytes*8, __load_ulong_be(addr, bytes));
685 return (bits < size) ? bits : size;
686}
687
688/**
689 * find_next_zero_bit - find the first zero bit in a memory region
690 * @addr: The address to base the search on
691 * @offset: The bitnumber to start searching at
692 * @size: The maximum size to search
693 */
694static inline int find_next_zero_bit (const unsigned long * addr,
695 unsigned long size,
696 unsigned long offset)
697{
698 const unsigned long *p;
699 unsigned long bit, set;
700
701 if (offset >= size)
702 return size;
703 bit = offset & (__BITOPS_WORDSIZE - 1);
704 offset -= bit;
705 size -= offset;
706 p = addr + offset / __BITOPS_WORDSIZE;
707 if (bit) {
708 /*
709 * __ffz_word returns __BITOPS_WORDSIZE
710 * if no zero bit is present in the word.
711 */
712 set = __ffz_word(0, *p >> bit) + bit;
713 if (set >= size)
714 return size + offset;
715 if (set < __BITOPS_WORDSIZE)
716 return set + offset;
717 offset += __BITOPS_WORDSIZE;
718 size -= __BITOPS_WORDSIZE;
719 p++;
720 }
721 return offset + find_first_zero_bit(p, size);
722}
723
724/**
725 * find_next_bit - find the first set bit in a memory region
726 * @addr: The address to base the search on
727 * @offset: The bitnumber to start searching at
728 * @size: The maximum size to search
729 */
730static inline int find_next_bit (const unsigned long * addr,
731 unsigned long size,
732 unsigned long offset)
733{
734 const unsigned long *p;
735 unsigned long bit, set;
736
737 if (offset >= size)
738 return size;
739 bit = offset & (__BITOPS_WORDSIZE - 1);
740 offset -= bit;
741 size -= offset;
742 p = addr + offset / __BITOPS_WORDSIZE;
743 if (bit) {
744 /*
745 * __ffs_word returns __BITOPS_WORDSIZE
746 * if no one bit is present in the word.
747 */
748 set = __ffs_word(0, *p & (~0UL << bit));
749 if (set >= size)
750 return size + offset;
751 if (set < __BITOPS_WORDSIZE)
752 return set + offset;
753 offset += __BITOPS_WORDSIZE;
754 size -= __BITOPS_WORDSIZE;
755 p++;
756 }
757 return offset + find_first_bit(p, size);
758}
759
760/*
761 * Every architecture must define this function. It's the fastest
762 * way of searching a 140-bit bitmap where the first 100 bits are
763 * unlikely to be set. It's guaranteed that at least one of the 140
764 * bits is cleared.
765 */
766static inline int sched_find_first_bit(unsigned long *b)
767{
768 return find_first_bit(b, 140);
769}
770
771#include <asm-generic/bitops/fls.h>
772#include <asm-generic/bitops/__fls.h>
773#include <asm-generic/bitops/fls64.h>
774
775#include <asm-generic/bitops/hweight.h>
776#include <asm-generic/bitops/lock.h>
777
778/*
779 * ATTENTION: intel byte ordering convention for ext2 and minix !!
780 * bit 0 is the LSB of addr; bit 31 is the MSB of addr;
781 * bit 32 is the LSB of (addr+4).
782 * That combined with the little endian byte order of Intel gives the
783 * following bit order in memory:
784 * 07 06 05 04 03 02 01 00 15 14 13 12 11 10 09 08 \
785 * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
786 */
787
788#define ext2_set_bit(nr, addr) \
789 __test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
790#define ext2_set_bit_atomic(lock, nr, addr) \
791 test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
792#define ext2_clear_bit(nr, addr) \
793 __test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
794#define ext2_clear_bit_atomic(lock, nr, addr) \
795 test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
796#define ext2_test_bit(nr, addr) \
797 test_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr)
798
799static inline int ext2_find_first_zero_bit(void *vaddr, unsigned int size)
800{
801 unsigned long bytes, bits;
802
803 if (!size)
804 return 0;
805 bytes = __ffz_word_loop(vaddr, size);
806 bits = __ffz_word(bytes*8, __load_ulong_le(vaddr, bytes));
807 return (bits < size) ? bits : size;
808}
809
810static inline int ext2_find_next_zero_bit(void *vaddr, unsigned long size,
811 unsigned long offset)
812{
813 unsigned long *addr = vaddr, *p;
814 unsigned long bit, set;
815
816 if (offset >= size)
817 return size;
818 bit = offset & (__BITOPS_WORDSIZE - 1);
819 offset -= bit;
820 size -= offset;
821 p = addr + offset / __BITOPS_WORDSIZE;
822 if (bit) {
823 /*
824 * s390 version of ffz returns __BITOPS_WORDSIZE
825 * if no zero bit is present in the word.
826 */
827 set = ffz(__load_ulong_le(p, 0) >> bit) + bit;
828 if (set >= size)
829 return size + offset;
830 if (set < __BITOPS_WORDSIZE)
831 return set + offset;
832 offset += __BITOPS_WORDSIZE;
833 size -= __BITOPS_WORDSIZE;
834 p++;
835 }
836 return offset + ext2_find_first_zero_bit(p, size);
837}
838
839static inline unsigned long ext2_find_first_bit(void *vaddr,
840 unsigned long size)
841{
842 unsigned long bytes, bits;
843
844 if (!size)
845 return 0;
846 bytes = __ffs_word_loop(vaddr, size);
847 bits = __ffs_word(bytes*8, __load_ulong_le(vaddr, bytes));
848 return (bits < size) ? bits : size;
849}
850
851static inline int ext2_find_next_bit(void *vaddr, unsigned long size,
852 unsigned long offset)
853{
854 unsigned long *addr = vaddr, *p;
855 unsigned long bit, set;
856
857 if (offset >= size)
858 return size;
859 bit = offset & (__BITOPS_WORDSIZE - 1);
860 offset -= bit;
861 size -= offset;
862 p = addr + offset / __BITOPS_WORDSIZE;
863 if (bit) {
864 /*
865 * s390 version of ffz returns __BITOPS_WORDSIZE
866 * if no zero bit is present in the word.
867 */
868 set = ffs(__load_ulong_le(p, 0) >> bit) + bit;
869 if (set >= size)
870 return size + offset;
871 if (set < __BITOPS_WORDSIZE)
872 return set + offset;
873 offset += __BITOPS_WORDSIZE;
874 size -= __BITOPS_WORDSIZE;
875 p++;
876 }
877 return offset + ext2_find_first_bit(p, size);
878}
879
880#include <asm-generic/bitops/minix.h>
881
882#endif /* __KERNEL__ */
883
884#endif /* _S390_BITOPS_H */
diff --git a/include/asm-s390/bug.h b/include/asm-s390/bug.h
deleted file mode 100644
index 384e3621e341..000000000000
--- a/include/asm-s390/bug.h
+++ /dev/null
@@ -1,70 +0,0 @@
1#ifndef _ASM_S390_BUG_H
2#define _ASM_S390_BUG_H
3
4#include <linux/kernel.h>
5
6#ifdef CONFIG_BUG
7
8#ifdef CONFIG_64BIT
9#define S390_LONG ".quad"
10#else
11#define S390_LONG ".long"
12#endif
13
14#ifdef CONFIG_DEBUG_BUGVERBOSE
15
16#define __EMIT_BUG(x) do { \
17 asm volatile( \
18 "0: j 0b+2\n" \
19 "1:\n" \
20 ".section .rodata.str,\"aMS\",@progbits,1\n" \
21 "2: .asciz \""__FILE__"\"\n" \
22 ".previous\n" \
23 ".section __bug_table,\"a\"\n" \
24 "3:\t" S390_LONG "\t1b,2b\n" \
25 " .short %0,%1\n" \
26 " .org 3b+%2\n" \
27 ".previous\n" \
28 : : "i" (__LINE__), \
29 "i" (x), \
30 "i" (sizeof(struct bug_entry))); \
31} while (0)
32
33#else /* CONFIG_DEBUG_BUGVERBOSE */
34
35#define __EMIT_BUG(x) do { \
36 asm volatile( \
37 "0: j 0b+2\n" \
38 "1:\n" \
39 ".section __bug_table,\"a\"\n" \
40 "2:\t" S390_LONG "\t1b\n" \
41 " .short %0\n" \
42 " .org 2b+%1\n" \
43 ".previous\n" \
44 : : "i" (x), \
45 "i" (sizeof(struct bug_entry))); \
46} while (0)
47
48#endif /* CONFIG_DEBUG_BUGVERBOSE */
49
50#define BUG() __EMIT_BUG(0)
51
52#define WARN_ON(x) ({ \
53 int __ret_warn_on = !!(x); \
54 if (__builtin_constant_p(__ret_warn_on)) { \
55 if (__ret_warn_on) \
56 __EMIT_BUG(BUGFLAG_WARNING); \
57 } else { \
58 if (unlikely(__ret_warn_on)) \
59 __EMIT_BUG(BUGFLAG_WARNING); \
60 } \
61 unlikely(__ret_warn_on); \
62})
63
64#define HAVE_ARCH_BUG
65#define HAVE_ARCH_WARN_ON
66#endif /* CONFIG_BUG */
67
68#include <asm-generic/bug.h>
69
70#endif /* _ASM_S390_BUG_H */
diff --git a/include/asm-s390/bugs.h b/include/asm-s390/bugs.h
deleted file mode 100644
index 011f1e6a2a6c..000000000000
--- a/include/asm-s390/bugs.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * include/asm-s390/bugs.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * Derived from "include/asm-i386/bugs.h"
9 * Copyright (C) 1994 Linus Torvalds
10 */
11
12/*
13 * This is included by init/main.c to check for architecture-dependent bugs.
14 *
15 * Needs:
16 * void check_bugs(void);
17 */
18
19static inline void check_bugs(void)
20{
21 /* s390 has no bugs ... */
22}
diff --git a/include/asm-s390/byteorder.h b/include/asm-s390/byteorder.h
deleted file mode 100644
index 1fe2492baa8d..000000000000
--- a/include/asm-s390/byteorder.h
+++ /dev/null
@@ -1,125 +0,0 @@
1#ifndef _S390_BYTEORDER_H
2#define _S390_BYTEORDER_H
3
4/*
5 * include/asm-s390/byteorder.h
6 *
7 * S390 version
8 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
9 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
10 */
11
12#include <asm/types.h>
13
14#ifdef __GNUC__
15
16#ifdef __s390x__
17static inline __u64 ___arch__swab64p(const __u64 *x)
18{
19 __u64 result;
20
21 asm volatile("lrvg %0,%1" : "=d" (result) : "m" (*x));
22 return result;
23}
24
25static inline __u64 ___arch__swab64(__u64 x)
26{
27 __u64 result;
28
29 asm volatile("lrvgr %0,%1" : "=d" (result) : "d" (x));
30 return result;
31}
32
33static inline void ___arch__swab64s(__u64 *x)
34{
35 *x = ___arch__swab64p(x);
36}
37#endif /* __s390x__ */
38
39static inline __u32 ___arch__swab32p(const __u32 *x)
40{
41 __u32 result;
42
43 asm volatile(
44#ifndef __s390x__
45 " icm %0,8,3(%1)\n"
46 " icm %0,4,2(%1)\n"
47 " icm %0,2,1(%1)\n"
48 " ic %0,0(%1)"
49 : "=&d" (result) : "a" (x), "m" (*x) : "cc");
50#else /* __s390x__ */
51 " lrv %0,%1"
52 : "=d" (result) : "m" (*x));
53#endif /* __s390x__ */
54 return result;
55}
56
57static inline __u32 ___arch__swab32(__u32 x)
58{
59#ifndef __s390x__
60 return ___arch__swab32p(&x);
61#else /* __s390x__ */
62 __u32 result;
63
64 asm volatile("lrvr %0,%1" : "=d" (result) : "d" (x));
65 return result;
66#endif /* __s390x__ */
67}
68
69static __inline__ void ___arch__swab32s(__u32 *x)
70{
71 *x = ___arch__swab32p(x);
72}
73
74static __inline__ __u16 ___arch__swab16p(const __u16 *x)
75{
76 __u16 result;
77
78 asm volatile(
79#ifndef __s390x__
80 " icm %0,2,1(%1)\n"
81 " ic %0,0(%1)\n"
82 : "=&d" (result) : "a" (x), "m" (*x) : "cc");
83#else /* __s390x__ */
84 " lrvh %0,%1"
85 : "=d" (result) : "m" (*x));
86#endif /* __s390x__ */
87 return result;
88}
89
90static __inline__ __u16 ___arch__swab16(__u16 x)
91{
92 return ___arch__swab16p(&x);
93}
94
95static __inline__ void ___arch__swab16s(__u16 *x)
96{
97 *x = ___arch__swab16p(x);
98}
99
100#ifdef __s390x__
101#define __arch__swab64(x) ___arch__swab64(x)
102#define __arch__swab64p(x) ___arch__swab64p(x)
103#define __arch__swab64s(x) ___arch__swab64s(x)
104#endif /* __s390x__ */
105#define __arch__swab32(x) ___arch__swab32(x)
106#define __arch__swab16(x) ___arch__swab16(x)
107#define __arch__swab32p(x) ___arch__swab32p(x)
108#define __arch__swab16p(x) ___arch__swab16p(x)
109#define __arch__swab32s(x) ___arch__swab32s(x)
110#define __arch__swab16s(x) ___arch__swab16s(x)
111
112#ifndef __s390x__
113#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
114# define __BYTEORDER_HAS_U64__
115# define __SWAB_64_THRU_32__
116#endif
117#else /* __s390x__ */
118#define __BYTEORDER_HAS_U64__
119#endif /* __s390x__ */
120
121#endif /* __GNUC__ */
122
123#include <linux/byteorder/big_endian.h>
124
125#endif /* _S390_BYTEORDER_H */
diff --git a/include/asm-s390/cache.h b/include/asm-s390/cache.h
deleted file mode 100644
index 9b866816863c..000000000000
--- a/include/asm-s390/cache.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * include/asm-s390/cache.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 *
7 * Derived from "include/asm-i386/cache.h"
8 * Copyright (C) 1992, Linus Torvalds
9 */
10
11#ifndef __ARCH_S390_CACHE_H
12#define __ARCH_S390_CACHE_H
13
14#define L1_CACHE_BYTES 256
15#define L1_CACHE_SHIFT 8
16
17#define __read_mostly __attribute__((__section__(".data.read_mostly")))
18
19#endif
diff --git a/include/asm-s390/cacheflush.h b/include/asm-s390/cacheflush.h
deleted file mode 100644
index 49d5af916d01..000000000000
--- a/include/asm-s390/cacheflush.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _S390_CACHEFLUSH_H
2#define _S390_CACHEFLUSH_H
3
4/* Keep includes the same across arches. */
5#include <linux/mm.h>
6
7/* Caches aren't brain-dead on the s390. */
8#define flush_cache_all() do { } while (0)
9#define flush_cache_mm(mm) do { } while (0)
10#define flush_cache_dup_mm(mm) do { } while (0)
11#define flush_cache_range(vma, start, end) do { } while (0)
12#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
13#define flush_dcache_page(page) do { } while (0)
14#define flush_dcache_mmap_lock(mapping) do { } while (0)
15#define flush_dcache_mmap_unlock(mapping) do { } while (0)
16#define flush_icache_range(start, end) do { } while (0)
17#define flush_icache_page(vma,pg) do { } while (0)
18#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
19#define flush_cache_vmap(start, end) do { } while (0)
20#define flush_cache_vunmap(start, end) do { } while (0)
21
22#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
23 memcpy(dst, src, len)
24#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
25 memcpy(dst, src, len)
26
27#ifdef CONFIG_DEBUG_PAGEALLOC
28void kernel_map_pages(struct page *page, int numpages, int enable);
29#endif
30
31#endif /* _S390_CACHEFLUSH_H */
diff --git a/include/asm-s390/ccwdev.h b/include/asm-s390/ccwdev.h
deleted file mode 100644
index ba007d8df941..000000000000
--- a/include/asm-s390/ccwdev.h
+++ /dev/null
@@ -1,192 +0,0 @@
1/*
2 * include/asm-s390/ccwdev.h
3 * include/asm-s390x/ccwdev.h
4 *
5 * Copyright (C) 2002 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Arnd Bergmann <arndb@de.ibm.com>
7 *
8 * Interface for CCW device drivers
9 */
10#ifndef _S390_CCWDEV_H_
11#define _S390_CCWDEV_H_
12
13#include <linux/device.h>
14#include <linux/mod_devicetable.h>
15#include <asm/fcx.h>
16
17/* structs from asm/cio.h */
18struct irb;
19struct ccw1;
20struct ccw_dev_id;
21
22/* simplified initializers for struct ccw_device:
23 * CCW_DEVICE and CCW_DEVICE_DEVTYPE initialize one
24 * entry in your MODULE_DEVICE_TABLE and set the match_flag correctly */
25#define CCW_DEVICE(cu, cum) \
26 .cu_type=(cu), .cu_model=(cum), \
27 .match_flags=(CCW_DEVICE_ID_MATCH_CU_TYPE \
28 | (cum ? CCW_DEVICE_ID_MATCH_CU_MODEL : 0))
29
30#define CCW_DEVICE_DEVTYPE(cu, cum, dev, devm) \
31 .cu_type=(cu), .cu_model=(cum), .dev_type=(dev), .dev_model=(devm),\
32 .match_flags=CCW_DEVICE_ID_MATCH_CU_TYPE \
33 | ((cum) ? CCW_DEVICE_ID_MATCH_CU_MODEL : 0) \
34 | CCW_DEVICE_ID_MATCH_DEVICE_TYPE \
35 | ((devm) ? CCW_DEVICE_ID_MATCH_DEVICE_MODEL : 0)
36
37/* scan through an array of device ids and return the first
38 * entry that matches the device.
39 *
40 * the array must end with an entry containing zero match_flags
41 */
42static inline const struct ccw_device_id *
43ccw_device_id_match(const struct ccw_device_id *array,
44 const struct ccw_device_id *match)
45{
46 const struct ccw_device_id *id = array;
47
48 for (id = array; id->match_flags; id++) {
49 if ((id->match_flags & CCW_DEVICE_ID_MATCH_CU_TYPE)
50 && (id->cu_type != match->cu_type))
51 continue;
52
53 if ((id->match_flags & CCW_DEVICE_ID_MATCH_CU_MODEL)
54 && (id->cu_model != match->cu_model))
55 continue;
56
57 if ((id->match_flags & CCW_DEVICE_ID_MATCH_DEVICE_TYPE)
58 && (id->dev_type != match->dev_type))
59 continue;
60
61 if ((id->match_flags & CCW_DEVICE_ID_MATCH_DEVICE_MODEL)
62 && (id->dev_model != match->dev_model))
63 continue;
64
65 return id;
66 }
67
68 return NULL;
69}
70
71/**
72 * struct ccw_device - channel attached device
73 * @ccwlock: pointer to device lock
74 * @id: id of this device
75 * @drv: ccw driver for this device
76 * @dev: embedded device structure
77 * @online: online status of device
78 * @handler: interrupt handler
79 *
80 * @handler is a member of the device rather than the driver since a driver
81 * can have different interrupt handlers for different ccw devices
82 * (multi-subchannel drivers).
83 */
84struct ccw_device {
85 spinlock_t *ccwlock;
86/* private: */
87 struct ccw_device_private *private; /* cio private information */
88/* public: */
89 struct ccw_device_id id;
90 struct ccw_driver *drv;
91 struct device dev;
92 int online;
93 void (*handler) (struct ccw_device *, unsigned long, struct irb *);
94};
95
96
97/**
98 * struct ccw driver - device driver for channel attached devices
99 * @owner: owning module
100 * @ids: ids supported by this driver
101 * @probe: function called on probe
102 * @remove: function called on remove
103 * @set_online: called when setting device online
104 * @set_offline: called when setting device offline
105 * @notify: notify driver of device state changes
106 * @shutdown: called at device shutdown
107 * @driver: embedded device driver structure
108 * @name: device driver name
109 */
110struct ccw_driver {
111 struct module *owner;
112 struct ccw_device_id *ids;
113 int (*probe) (struct ccw_device *);
114 void (*remove) (struct ccw_device *);
115 int (*set_online) (struct ccw_device *);
116 int (*set_offline) (struct ccw_device *);
117 int (*notify) (struct ccw_device *, int);
118 void (*shutdown) (struct ccw_device *);
119 struct device_driver driver;
120 char *name;
121};
122
123extern struct ccw_device *get_ccwdev_by_busid(struct ccw_driver *cdrv,
124 const char *bus_id);
125
126/* devices drivers call these during module load and unload.
127 * When a driver is registered, its probe method is called
128 * when new devices for its type pop up */
129extern int ccw_driver_register (struct ccw_driver *driver);
130extern void ccw_driver_unregister (struct ccw_driver *driver);
131
132struct ccw1;
133
134extern int ccw_device_set_options_mask(struct ccw_device *, unsigned long);
135extern int ccw_device_set_options(struct ccw_device *, unsigned long);
136extern void ccw_device_clear_options(struct ccw_device *, unsigned long);
137
138/* Allow for i/o completion notification after primary interrupt status. */
139#define CCWDEV_EARLY_NOTIFICATION 0x0001
140/* Report all interrupt conditions. */
141#define CCWDEV_REPORT_ALL 0x0002
142/* Try to perform path grouping. */
143#define CCWDEV_DO_PATHGROUP 0x0004
144/* Allow forced onlining of boxed devices. */
145#define CCWDEV_ALLOW_FORCE 0x0008
146
147extern int ccw_device_start(struct ccw_device *, struct ccw1 *,
148 unsigned long, __u8, unsigned long);
149extern int ccw_device_start_timeout(struct ccw_device *, struct ccw1 *,
150 unsigned long, __u8, unsigned long, int);
151extern int ccw_device_start_key(struct ccw_device *, struct ccw1 *,
152 unsigned long, __u8, __u8, unsigned long);
153extern int ccw_device_start_timeout_key(struct ccw_device *, struct ccw1 *,
154 unsigned long, __u8, __u8,
155 unsigned long, int);
156
157
158extern int ccw_device_resume(struct ccw_device *);
159extern int ccw_device_halt(struct ccw_device *, unsigned long);
160extern int ccw_device_clear(struct ccw_device *, unsigned long);
161int ccw_device_tm_start_key(struct ccw_device *cdev, struct tcw *tcw,
162 unsigned long intparm, u8 lpm, u8 key);
163int ccw_device_tm_start_key(struct ccw_device *, struct tcw *,
164 unsigned long, u8, u8);
165int ccw_device_tm_start_timeout_key(struct ccw_device *, struct tcw *,
166 unsigned long, u8, u8, int);
167int ccw_device_tm_start(struct ccw_device *, struct tcw *,
168 unsigned long, u8);
169int ccw_device_tm_start_timeout(struct ccw_device *, struct tcw *,
170 unsigned long, u8, int);
171int ccw_device_tm_intrg(struct ccw_device *cdev);
172
173extern int ccw_device_set_online(struct ccw_device *cdev);
174extern int ccw_device_set_offline(struct ccw_device *cdev);
175
176
177extern struct ciw *ccw_device_get_ciw(struct ccw_device *, __u32 cmd);
178extern __u8 ccw_device_get_path_mask(struct ccw_device *);
179extern void ccw_device_get_id(struct ccw_device *, struct ccw_dev_id *);
180
181#define get_ccwdev_lock(x) (x)->ccwlock
182
183#define to_ccwdev(n) container_of(n, struct ccw_device, dev)
184#define to_ccwdrv(n) container_of(n, struct ccw_driver, driver)
185
186extern struct ccw_device *ccw_device_probe_console(void);
187
188// FIXME: these have to go
189extern int _ccw_device_get_subchannel_number(struct ccw_device *);
190
191extern void *ccw_device_get_chp_desc(struct ccw_device *, int);
192#endif /* _S390_CCWDEV_H_ */
diff --git a/include/asm-s390/ccwgroup.h b/include/asm-s390/ccwgroup.h
deleted file mode 100644
index a27f68985a79..000000000000
--- a/include/asm-s390/ccwgroup.h
+++ /dev/null
@@ -1,69 +0,0 @@
1#ifndef S390_CCWGROUP_H
2#define S390_CCWGROUP_H
3
4struct ccw_device;
5struct ccw_driver;
6
7/**
8 * struct ccwgroup_device - ccw group device
9 * @creator_id: unique number of the driver
10 * @state: online/offline state
11 * @count: number of attached slave devices
12 * @dev: embedded device structure
13 * @cdev: variable number of slave devices, allocated as needed
14 */
15struct ccwgroup_device {
16 unsigned long creator_id;
17 enum {
18 CCWGROUP_OFFLINE,
19 CCWGROUP_ONLINE,
20 } state;
21/* private: */
22 atomic_t onoff;
23 struct mutex reg_mutex;
24/* public: */
25 unsigned int count;
26 struct device dev;
27 struct ccw_device *cdev[0];
28};
29
30/**
31 * struct ccwgroup_driver - driver for ccw group devices
32 * @owner: driver owner
33 * @name: driver name
34 * @max_slaves: maximum number of slave devices
35 * @driver_id: unique id
36 * @probe: function called on probe
37 * @remove: function called on remove
38 * @set_online: function called when device is set online
39 * @set_offline: function called when device is set offline
40 * @shutdown: function called when device is shut down
41 * @driver: embedded driver structure
42 */
43struct ccwgroup_driver {
44 struct module *owner;
45 char *name;
46 int max_slaves;
47 unsigned long driver_id;
48
49 int (*probe) (struct ccwgroup_device *);
50 void (*remove) (struct ccwgroup_device *);
51 int (*set_online) (struct ccwgroup_device *);
52 int (*set_offline) (struct ccwgroup_device *);
53 void (*shutdown)(struct ccwgroup_device *);
54
55 struct device_driver driver;
56};
57
58extern int ccwgroup_driver_register (struct ccwgroup_driver *cdriver);
59extern void ccwgroup_driver_unregister (struct ccwgroup_driver *cdriver);
60int ccwgroup_create_from_string(struct device *root, unsigned int creator_id,
61 struct ccw_driver *cdrv, int num_devices,
62 const char *buf);
63
64extern int ccwgroup_probe_ccwdev(struct ccw_device *cdev);
65extern void ccwgroup_remove_ccwdev(struct ccw_device *cdev);
66
67#define to_ccwgroupdev(x) container_of((x), struct ccwgroup_device, dev)
68#define to_ccwgroupdrv(x) container_of((x), struct ccwgroup_driver, driver)
69#endif
diff --git a/include/asm-s390/checksum.h b/include/asm-s390/checksum.h
deleted file mode 100644
index d5a8e7c1477c..000000000000
--- a/include/asm-s390/checksum.h
+++ /dev/null
@@ -1,166 +0,0 @@
1#ifndef _S390_CHECKSUM_H
2#define _S390_CHECKSUM_H
3
4/*
5 * include/asm-s390/checksum.h
6 * S390 fast network checksum routines
7 * see also arch/S390/lib/checksum.c
8 *
9 * S390 version
10 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
11 * Author(s): Ulrich Hild (first version)
12 * Martin Schwidefsky (heavily optimized CKSM version)
13 * D.J. Barrow (third attempt)
14 */
15
16#include <asm/uaccess.h>
17
18/*
19 * computes the checksum of a memory block at buff, length len,
20 * and adds in "sum" (32-bit)
21 *
22 * returns a 32-bit number suitable for feeding into itself
23 * or csum_tcpudp_magic
24 *
25 * this function must be called with even lengths, except
26 * for the last fragment, which may be odd
27 *
28 * it's best to have buff aligned on a 32-bit boundary
29 */
30static inline __wsum
31csum_partial(const void *buff, int len, __wsum sum)
32{
33 register unsigned long reg2 asm("2") = (unsigned long) buff;
34 register unsigned long reg3 asm("3") = (unsigned long) len;
35
36 asm volatile(
37 "0: cksm %0,%1\n" /* do checksum on longs */
38 " jo 0b\n"
39 : "+d" (sum), "+d" (reg2), "+d" (reg3) : : "cc", "memory");
40 return sum;
41}
42
43/*
44 * the same as csum_partial_copy, but copies from user space.
45 *
46 * here even more important to align src and dst on a 32-bit (or even
47 * better 64-bit) boundary
48 *
49 * Copy from userspace and compute checksum. If we catch an exception
50 * then zero the rest of the buffer.
51 */
52static inline __wsum
53csum_partial_copy_from_user(const void __user *src, void *dst,
54 int len, __wsum sum,
55 int *err_ptr)
56{
57 int missing;
58
59 missing = copy_from_user(dst, src, len);
60 if (missing) {
61 memset(dst + len - missing, 0, missing);
62 *err_ptr = -EFAULT;
63 }
64
65 return csum_partial(dst, len, sum);
66}
67
68
69static inline __wsum
70csum_partial_copy_nocheck (const void *src, void *dst, int len, __wsum sum)
71{
72 memcpy(dst,src,len);
73 return csum_partial(dst, len, sum);
74}
75
76/*
77 * Fold a partial checksum without adding pseudo headers
78 */
79static inline __sum16 csum_fold(__wsum sum)
80{
81#ifndef __s390x__
82 register_pair rp;
83
84 asm volatile(
85 " slr %N1,%N1\n" /* %0 = H L */
86 " lr %1,%0\n" /* %0 = H L, %1 = H L 0 0 */
87 " srdl %1,16\n" /* %0 = H L, %1 = 0 H L 0 */
88 " alr %1,%N1\n" /* %0 = H L, %1 = L H L 0 */
89 " alr %0,%1\n" /* %0 = H+L+C L+H */
90 " srl %0,16\n" /* %0 = H+L+C */
91 : "+&d" (sum), "=d" (rp) : : "cc");
92#else /* __s390x__ */
93 asm volatile(
94 " sr 3,3\n" /* %0 = H*65536 + L */
95 " lr 2,%0\n" /* %0 = H L, 2/3 = H L / 0 0 */
96 " srdl 2,16\n" /* %0 = H L, 2/3 = 0 H / L 0 */
97 " alr 2,3\n" /* %0 = H L, 2/3 = L H / L 0 */
98 " alr %0,2\n" /* %0 = H+L+C L+H */
99 " srl %0,16\n" /* %0 = H+L+C */
100 : "+&d" (sum) : : "cc", "2", "3");
101#endif /* __s390x__ */
102 return (__force __sum16) ~sum;
103}
104
105/*
106 * This is a version of ip_compute_csum() optimized for IP headers,
107 * which always checksum on 4 octet boundaries.
108 *
109 */
110static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
111{
112 return csum_fold(csum_partial(iph, ihl*4, 0));
113}
114
115/*
116 * computes the checksum of the TCP/UDP pseudo-header
117 * returns a 32-bit checksum
118 */
119static inline __wsum
120csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
121 unsigned short len, unsigned short proto,
122 __wsum sum)
123{
124 __u32 csum = (__force __u32)sum;
125
126 csum += (__force __u32)saddr;
127 if (csum < (__force __u32)saddr)
128 csum++;
129
130 csum += (__force __u32)daddr;
131 if (csum < (__force __u32)daddr)
132 csum++;
133
134 csum += len + proto;
135 if (csum < len + proto)
136 csum++;
137
138 return (__force __wsum)csum;
139}
140
141/*
142 * computes the checksum of the TCP/UDP pseudo-header
143 * returns a 16-bit checksum, already complemented
144 */
145
146static inline __sum16
147csum_tcpudp_magic(__be32 saddr, __be32 daddr,
148 unsigned short len, unsigned short proto,
149 __wsum sum)
150{
151 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
152}
153
154/*
155 * this routine is used for miscellaneous IP-like checksums, mainly
156 * in icmp.c
157 */
158
159static inline __sum16 ip_compute_csum(const void *buff, int len)
160{
161 return csum_fold(csum_partial(buff, len, 0));
162}
163
164#endif /* _S390_CHECKSUM_H */
165
166
diff --git a/include/asm-s390/chpid.h b/include/asm-s390/chpid.h
deleted file mode 100644
index dfe3c7f3439a..000000000000
--- a/include/asm-s390/chpid.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * drivers/s390/cio/chpid.h
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_CHPID_H
9#define _ASM_S390_CHPID_H _ASM_S390_CHPID_H
10
11#include <linux/string.h>
12#include <asm/types.h>
13
14#define __MAX_CHPID 255
15
16struct chp_id {
17 u8 reserved1;
18 u8 cssid;
19 u8 reserved2;
20 u8 id;
21} __attribute__((packed));
22
23#ifdef __KERNEL__
24#include <asm/cio.h>
25
26static inline void chp_id_init(struct chp_id *chpid)
27{
28 memset(chpid, 0, sizeof(struct chp_id));
29}
30
31static inline int chp_id_is_equal(struct chp_id *a, struct chp_id *b)
32{
33 return (a->id == b->id) && (a->cssid == b->cssid);
34}
35
36static inline void chp_id_next(struct chp_id *chpid)
37{
38 if (chpid->id < __MAX_CHPID)
39 chpid->id++;
40 else {
41 chpid->id = 0;
42 chpid->cssid++;
43 }
44}
45
46static inline int chp_id_is_valid(struct chp_id *chpid)
47{
48 return (chpid->cssid <= __MAX_CSSID);
49}
50
51
52#define chp_id_for_each(c) \
53 for (chp_id_init(c); chp_id_is_valid(c); chp_id_next(c))
54#endif /* __KERNEL */
55
56#endif /* _ASM_S390_CHPID_H */
diff --git a/include/asm-s390/chsc.h b/include/asm-s390/chsc.h
deleted file mode 100644
index d38d0cf62d4b..000000000000
--- a/include/asm-s390/chsc.h
+++ /dev/null
@@ -1,127 +0,0 @@
1/*
2 * ioctl interface for /dev/chsc
3 *
4 * Copyright 2008 IBM Corp.
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
6 */
7
8#ifndef _ASM_CHSC_H
9#define _ASM_CHSC_H
10
11#include <asm/chpid.h>
12#include <asm/schid.h>
13
14struct chsc_async_header {
15 __u16 length;
16 __u16 code;
17 __u32 cmd_dependend;
18 __u32 key : 4;
19 __u32 : 28;
20 struct subchannel_id sid;
21} __attribute__ ((packed));
22
23struct chsc_async_area {
24 struct chsc_async_header header;
25 __u8 data[PAGE_SIZE - 16 /* size of chsc_async_header */];
26} __attribute__ ((packed));
27
28
29struct chsc_response_struct {
30 __u16 length;
31 __u16 code;
32 __u32 parms;
33 __u8 data[PAGE_SIZE - 8];
34} __attribute__ ((packed));
35
36struct chsc_chp_cd {
37 struct chp_id chpid;
38 int m;
39 int fmt;
40 struct chsc_response_struct cpcb;
41};
42
43struct chsc_cu_cd {
44 __u16 cun;
45 __u8 cssid;
46 int m;
47 int fmt;
48 struct chsc_response_struct cucb;
49};
50
51struct chsc_sch_cud {
52 struct subchannel_id schid;
53 int fmt;
54 struct chsc_response_struct scub;
55};
56
57struct conf_id {
58 int m;
59 __u8 cssid;
60 __u8 ssid;
61};
62
63struct chsc_conf_info {
64 struct conf_id id;
65 int fmt;
66 struct chsc_response_struct scid;
67};
68
69struct ccl_parm_chpid {
70 int m;
71 struct chp_id chp;
72};
73
74struct ccl_parm_cssids {
75 __u8 f_cssid;
76 __u8 l_cssid;
77};
78
79struct chsc_comp_list {
80 struct {
81 enum {
82 CCL_CU_ON_CHP = 1,
83 CCL_CHP_TYPE_CAP = 2,
84 CCL_CSS_IMG = 4,
85 CCL_CSS_IMG_CONF_CHAR = 5,
86 CCL_IOP_CHP = 6,
87 } ctype;
88 int fmt;
89 struct ccl_parm_chpid chpid;
90 struct ccl_parm_cssids cssids;
91 } req;
92 struct chsc_response_struct sccl;
93};
94
95struct chsc_dcal {
96 struct {
97 enum {
98 DCAL_CSS_IID_PN = 4,
99 } atype;
100 __u32 list_parm[2];
101 int fmt;
102 } req;
103 struct chsc_response_struct sdcal;
104};
105
106struct chsc_cpd_info {
107 struct chp_id chpid;
108 int m;
109 int fmt;
110 int rfmt;
111 int c;
112 struct chsc_response_struct chpdb;
113};
114
115#define CHSC_IOCTL_MAGIC 'c'
116
117#define CHSC_START _IOWR(CHSC_IOCTL_MAGIC, 0x81, struct chsc_async_area)
118#define CHSC_INFO_CHANNEL_PATH _IOWR(CHSC_IOCTL_MAGIC, 0x82, \
119 struct chsc_chp_cd)
120#define CHSC_INFO_CU _IOWR(CHSC_IOCTL_MAGIC, 0x83, struct chsc_cu_cd)
121#define CHSC_INFO_SCH_CU _IOWR(CHSC_IOCTL_MAGIC, 0x84, struct chsc_sch_cud)
122#define CHSC_INFO_CI _IOWR(CHSC_IOCTL_MAGIC, 0x85, struct chsc_conf_info)
123#define CHSC_INFO_CCL _IOWR(CHSC_IOCTL_MAGIC, 0x86, struct chsc_comp_list)
124#define CHSC_INFO_CPD _IOWR(CHSC_IOCTL_MAGIC, 0x87, struct chsc_cpd_info)
125#define CHSC_INFO_DCAL _IOWR(CHSC_IOCTL_MAGIC, 0x88, struct chsc_dcal)
126
127#endif
diff --git a/include/asm-s390/cio.h b/include/asm-s390/cio.h
deleted file mode 100644
index 6dccb071aec3..000000000000
--- a/include/asm-s390/cio.h
+++ /dev/null
@@ -1,514 +0,0 @@
1/*
2 * include/asm-s390/cio.h
3 * include/asm-s390x/cio.h
4 *
5 * Common interface for I/O on S/390
6 */
7#ifndef _ASM_S390_CIO_H_
8#define _ASM_S390_CIO_H_
9
10#include <linux/spinlock.h>
11#include <asm/types.h>
12
13#ifdef __KERNEL__
14
15#define LPM_ANYPATH 0xff
16#define __MAX_CSSID 0
17
18/**
19 * struct cmd_scsw - command-mode subchannel status word
20 * @key: subchannel key
21 * @sctl: suspend control
22 * @eswf: esw format
23 * @cc: deferred condition code
24 * @fmt: format
25 * @pfch: prefetch
26 * @isic: initial-status interruption control
27 * @alcc: address-limit checking control
28 * @ssi: suppress-suspended interruption
29 * @zcc: zero condition code
30 * @ectl: extended control
31 * @pno: path not operational
32 * @res: reserved
33 * @fctl: function control
34 * @actl: activity control
35 * @stctl: status control
36 * @cpa: channel program address
37 * @dstat: device status
38 * @cstat: subchannel status
39 * @count: residual count
40 */
41struct cmd_scsw {
42 __u32 key : 4;
43 __u32 sctl : 1;
44 __u32 eswf : 1;
45 __u32 cc : 2;
46 __u32 fmt : 1;
47 __u32 pfch : 1;
48 __u32 isic : 1;
49 __u32 alcc : 1;
50 __u32 ssi : 1;
51 __u32 zcc : 1;
52 __u32 ectl : 1;
53 __u32 pno : 1;
54 __u32 res : 1;
55 __u32 fctl : 3;
56 __u32 actl : 7;
57 __u32 stctl : 5;
58 __u32 cpa;
59 __u32 dstat : 8;
60 __u32 cstat : 8;
61 __u32 count : 16;
62} __attribute__ ((packed));
63
64/**
65 * struct tm_scsw - transport-mode subchannel status word
66 * @key: subchannel key
67 * @eswf: esw format
68 * @cc: deferred condition code
69 * @fmt: format
70 * @x: IRB-format control
71 * @q: interrogate-complete
72 * @ectl: extended control
73 * @pno: path not operational
74 * @fctl: function control
75 * @actl: activity control
76 * @stctl: status control
77 * @tcw: TCW address
78 * @dstat: device status
79 * @cstat: subchannel status
80 * @fcxs: FCX status
81 * @schxs: subchannel-extended status
82 */
83struct tm_scsw {
84 u32 key:4;
85 u32 :1;
86 u32 eswf:1;
87 u32 cc:2;
88 u32 fmt:3;
89 u32 x:1;
90 u32 q:1;
91 u32 :1;
92 u32 ectl:1;
93 u32 pno:1;
94 u32 :1;
95 u32 fctl:3;
96 u32 actl:7;
97 u32 stctl:5;
98 u32 tcw;
99 u32 dstat:8;
100 u32 cstat:8;
101 u32 fcxs:8;
102 u32 schxs:8;
103} __attribute__ ((packed));
104
105/**
106 * union scsw - subchannel status word
107 * @cmd: command-mode SCSW
108 * @tm: transport-mode SCSW
109 */
110union scsw {
111 struct cmd_scsw cmd;
112 struct tm_scsw tm;
113} __attribute__ ((packed));
114
115int scsw_is_tm(union scsw *scsw);
116u32 scsw_key(union scsw *scsw);
117u32 scsw_eswf(union scsw *scsw);
118u32 scsw_cc(union scsw *scsw);
119u32 scsw_ectl(union scsw *scsw);
120u32 scsw_pno(union scsw *scsw);
121u32 scsw_fctl(union scsw *scsw);
122u32 scsw_actl(union scsw *scsw);
123u32 scsw_stctl(union scsw *scsw);
124u32 scsw_dstat(union scsw *scsw);
125u32 scsw_cstat(union scsw *scsw);
126int scsw_is_solicited(union scsw *scsw);
127int scsw_is_valid_key(union scsw *scsw);
128int scsw_is_valid_eswf(union scsw *scsw);
129int scsw_is_valid_cc(union scsw *scsw);
130int scsw_is_valid_ectl(union scsw *scsw);
131int scsw_is_valid_pno(union scsw *scsw);
132int scsw_is_valid_fctl(union scsw *scsw);
133int scsw_is_valid_actl(union scsw *scsw);
134int scsw_is_valid_stctl(union scsw *scsw);
135int scsw_is_valid_dstat(union scsw *scsw);
136int scsw_is_valid_cstat(union scsw *scsw);
137int scsw_cmd_is_valid_key(union scsw *scsw);
138int scsw_cmd_is_valid_sctl(union scsw *scsw);
139int scsw_cmd_is_valid_eswf(union scsw *scsw);
140int scsw_cmd_is_valid_cc(union scsw *scsw);
141int scsw_cmd_is_valid_fmt(union scsw *scsw);
142int scsw_cmd_is_valid_pfch(union scsw *scsw);
143int scsw_cmd_is_valid_isic(union scsw *scsw);
144int scsw_cmd_is_valid_alcc(union scsw *scsw);
145int scsw_cmd_is_valid_ssi(union scsw *scsw);
146int scsw_cmd_is_valid_zcc(union scsw *scsw);
147int scsw_cmd_is_valid_ectl(union scsw *scsw);
148int scsw_cmd_is_valid_pno(union scsw *scsw);
149int scsw_cmd_is_valid_fctl(union scsw *scsw);
150int scsw_cmd_is_valid_actl(union scsw *scsw);
151int scsw_cmd_is_valid_stctl(union scsw *scsw);
152int scsw_cmd_is_valid_dstat(union scsw *scsw);
153int scsw_cmd_is_valid_cstat(union scsw *scsw);
154int scsw_cmd_is_solicited(union scsw *scsw);
155int scsw_tm_is_valid_key(union scsw *scsw);
156int scsw_tm_is_valid_eswf(union scsw *scsw);
157int scsw_tm_is_valid_cc(union scsw *scsw);
158int scsw_tm_is_valid_fmt(union scsw *scsw);
159int scsw_tm_is_valid_x(union scsw *scsw);
160int scsw_tm_is_valid_q(union scsw *scsw);
161int scsw_tm_is_valid_ectl(union scsw *scsw);
162int scsw_tm_is_valid_pno(union scsw *scsw);
163int scsw_tm_is_valid_fctl(union scsw *scsw);
164int scsw_tm_is_valid_actl(union scsw *scsw);
165int scsw_tm_is_valid_stctl(union scsw *scsw);
166int scsw_tm_is_valid_dstat(union scsw *scsw);
167int scsw_tm_is_valid_cstat(union scsw *scsw);
168int scsw_tm_is_valid_fcxs(union scsw *scsw);
169int scsw_tm_is_valid_schxs(union scsw *scsw);
170int scsw_tm_is_solicited(union scsw *scsw);
171
172#define SCSW_FCTL_CLEAR_FUNC 0x1
173#define SCSW_FCTL_HALT_FUNC 0x2
174#define SCSW_FCTL_START_FUNC 0x4
175
176#define SCSW_ACTL_SUSPENDED 0x1
177#define SCSW_ACTL_DEVACT 0x2
178#define SCSW_ACTL_SCHACT 0x4
179#define SCSW_ACTL_CLEAR_PEND 0x8
180#define SCSW_ACTL_HALT_PEND 0x10
181#define SCSW_ACTL_START_PEND 0x20
182#define SCSW_ACTL_RESUME_PEND 0x40
183
184#define SCSW_STCTL_STATUS_PEND 0x1
185#define SCSW_STCTL_SEC_STATUS 0x2
186#define SCSW_STCTL_PRIM_STATUS 0x4
187#define SCSW_STCTL_INTER_STATUS 0x8
188#define SCSW_STCTL_ALERT_STATUS 0x10
189
190#define DEV_STAT_ATTENTION 0x80
191#define DEV_STAT_STAT_MOD 0x40
192#define DEV_STAT_CU_END 0x20
193#define DEV_STAT_BUSY 0x10
194#define DEV_STAT_CHN_END 0x08
195#define DEV_STAT_DEV_END 0x04
196#define DEV_STAT_UNIT_CHECK 0x02
197#define DEV_STAT_UNIT_EXCEP 0x01
198
199#define SCHN_STAT_PCI 0x80
200#define SCHN_STAT_INCORR_LEN 0x40
201#define SCHN_STAT_PROG_CHECK 0x20
202#define SCHN_STAT_PROT_CHECK 0x10
203#define SCHN_STAT_CHN_DATA_CHK 0x08
204#define SCHN_STAT_CHN_CTRL_CHK 0x04
205#define SCHN_STAT_INTF_CTRL_CHK 0x02
206#define SCHN_STAT_CHAIN_CHECK 0x01
207
208/*
209 * architectured values for first sense byte
210 */
211#define SNS0_CMD_REJECT 0x80
212#define SNS_CMD_REJECT SNS0_CMD_REJEC
213#define SNS0_INTERVENTION_REQ 0x40
214#define SNS0_BUS_OUT_CHECK 0x20
215#define SNS0_EQUIPMENT_CHECK 0x10
216#define SNS0_DATA_CHECK 0x08
217#define SNS0_OVERRUN 0x04
218#define SNS0_INCOMPL_DOMAIN 0x01
219
220/*
221 * architectured values for second sense byte
222 */
223#define SNS1_PERM_ERR 0x80
224#define SNS1_INV_TRACK_FORMAT 0x40
225#define SNS1_EOC 0x20
226#define SNS1_MESSAGE_TO_OPER 0x10
227#define SNS1_NO_REC_FOUND 0x08
228#define SNS1_FILE_PROTECTED 0x04
229#define SNS1_WRITE_INHIBITED 0x02
230#define SNS1_INPRECISE_END 0x01
231
232/*
233 * architectured values for third sense byte
234 */
235#define SNS2_REQ_INH_WRITE 0x80
236#define SNS2_CORRECTABLE 0x40
237#define SNS2_FIRST_LOG_ERR 0x20
238#define SNS2_ENV_DATA_PRESENT 0x10
239#define SNS2_INPRECISE_END 0x04
240
241/**
242 * struct ccw1 - channel command word
243 * @cmd_code: command code
244 * @flags: flags, like IDA adressing, etc.
245 * @count: byte count
246 * @cda: data address
247 *
248 * The ccw is the basic structure to build channel programs that perform
249 * operations with the device or the control unit. Only Format-1 channel
250 * command words are supported.
251 */
252struct ccw1 {
253 __u8 cmd_code;
254 __u8 flags;
255 __u16 count;
256 __u32 cda;
257} __attribute__ ((packed,aligned(8)));
258
259#define CCW_FLAG_DC 0x80
260#define CCW_FLAG_CC 0x40
261#define CCW_FLAG_SLI 0x20
262#define CCW_FLAG_SKIP 0x10
263#define CCW_FLAG_PCI 0x08
264#define CCW_FLAG_IDA 0x04
265#define CCW_FLAG_SUSPEND 0x02
266
267#define CCW_CMD_READ_IPL 0x02
268#define CCW_CMD_NOOP 0x03
269#define CCW_CMD_BASIC_SENSE 0x04
270#define CCW_CMD_TIC 0x08
271#define CCW_CMD_STLCK 0x14
272#define CCW_CMD_SENSE_PGID 0x34
273#define CCW_CMD_SUSPEND_RECONN 0x5B
274#define CCW_CMD_RDC 0x64
275#define CCW_CMD_RELEASE 0x94
276#define CCW_CMD_SET_PGID 0xAF
277#define CCW_CMD_SENSE_ID 0xE4
278#define CCW_CMD_DCTL 0xF3
279
280#define SENSE_MAX_COUNT 0x20
281
282/**
283 * struct erw - extended report word
284 * @res0: reserved
285 * @auth: authorization check
286 * @pvrf: path-verification-required flag
287 * @cpt: channel-path timeout
288 * @fsavf: failing storage address validity flag
289 * @cons: concurrent sense
290 * @scavf: secondary ccw address validity flag
291 * @fsaf: failing storage address format
292 * @scnt: sense count, if @cons == %1
293 * @res16: reserved
294 */
295struct erw {
296 __u32 res0 : 3;
297 __u32 auth : 1;
298 __u32 pvrf : 1;
299 __u32 cpt : 1;
300 __u32 fsavf : 1;
301 __u32 cons : 1;
302 __u32 scavf : 1;
303 __u32 fsaf : 1;
304 __u32 scnt : 6;
305 __u32 res16 : 16;
306} __attribute__ ((packed));
307
308/**
309 * struct sublog - subchannel logout area
310 * @res0: reserved
311 * @esf: extended status flags
312 * @lpum: last path used mask
313 * @arep: ancillary report
314 * @fvf: field-validity flags
315 * @sacc: storage access code
316 * @termc: termination code
317 * @devsc: device-status check
318 * @serr: secondary error
319 * @ioerr: i/o-error alert
320 * @seqc: sequence code
321 */
322struct sublog {
323 __u32 res0 : 1;
324 __u32 esf : 7;
325 __u32 lpum : 8;
326 __u32 arep : 1;
327 __u32 fvf : 5;
328 __u32 sacc : 2;
329 __u32 termc : 2;
330 __u32 devsc : 1;
331 __u32 serr : 1;
332 __u32 ioerr : 1;
333 __u32 seqc : 3;
334} __attribute__ ((packed));
335
336/**
337 * struct esw0 - Format 0 Extended Status Word (ESW)
338 * @sublog: subchannel logout
339 * @erw: extended report word
340 * @faddr: failing storage address
341 * @saddr: secondary ccw address
342 */
343struct esw0 {
344 struct sublog sublog;
345 struct erw erw;
346 __u32 faddr[2];
347 __u32 saddr;
348} __attribute__ ((packed));
349
350/**
351 * struct esw1 - Format 1 Extended Status Word (ESW)
352 * @zero0: reserved zeros
353 * @lpum: last path used mask
354 * @zero16: reserved zeros
355 * @erw: extended report word
356 * @zeros: three fullwords of zeros
357 */
358struct esw1 {
359 __u8 zero0;
360 __u8 lpum;
361 __u16 zero16;
362 struct erw erw;
363 __u32 zeros[3];
364} __attribute__ ((packed));
365
366/**
367 * struct esw2 - Format 2 Extended Status Word (ESW)
368 * @zero0: reserved zeros
369 * @lpum: last path used mask
370 * @dcti: device-connect-time interval
371 * @erw: extended report word
372 * @zeros: three fullwords of zeros
373 */
374struct esw2 {
375 __u8 zero0;
376 __u8 lpum;
377 __u16 dcti;
378 struct erw erw;
379 __u32 zeros[3];
380} __attribute__ ((packed));
381
382/**
383 * struct esw3 - Format 3 Extended Status Word (ESW)
384 * @zero0: reserved zeros
385 * @lpum: last path used mask
386 * @res: reserved
387 * @erw: extended report word
388 * @zeros: three fullwords of zeros
389 */
390struct esw3 {
391 __u8 zero0;
392 __u8 lpum;
393 __u16 res;
394 struct erw erw;
395 __u32 zeros[3];
396} __attribute__ ((packed));
397
398/**
399 * struct irb - interruption response block
400 * @scsw: subchannel status word
401 * @esw: extened status word, 4 formats
402 * @ecw: extended control word
403 *
404 * The irb that is handed to the device driver when an interrupt occurs. For
405 * solicited interrupts, the common I/O layer already performs checks whether
406 * a field is valid; a field not being valid is always passed as %0.
407 * If a unit check occured, @ecw may contain sense data; this is retrieved
408 * by the common I/O layer itself if the device doesn't support concurrent
409 * sense (so that the device driver never needs to perform basic sene itself).
410 * For unsolicited interrupts, the irb is passed as-is (expect for sense data,
411 * if applicable).
412 */
413struct irb {
414 union scsw scsw;
415 union {
416 struct esw0 esw0;
417 struct esw1 esw1;
418 struct esw2 esw2;
419 struct esw3 esw3;
420 } esw;
421 __u8 ecw[32];
422} __attribute__ ((packed,aligned(4)));
423
424/**
425 * struct ciw - command information word (CIW) layout
426 * @et: entry type
427 * @reserved: reserved bits
428 * @ct: command type
429 * @cmd: command code
430 * @count: command count
431 */
432struct ciw {
433 __u32 et : 2;
434 __u32 reserved : 2;
435 __u32 ct : 4;
436 __u32 cmd : 8;
437 __u32 count : 16;
438} __attribute__ ((packed));
439
440#define CIW_TYPE_RCD 0x0 /* read configuration data */
441#define CIW_TYPE_SII 0x1 /* set interface identifier */
442#define CIW_TYPE_RNI 0x2 /* read node identifier */
443
444/*
445 * Flags used as input parameters for do_IO()
446 */
447#define DOIO_ALLOW_SUSPEND 0x0001 /* allow for channel prog. suspend */
448#define DOIO_DENY_PREFETCH 0x0002 /* don't allow for CCW prefetch */
449#define DOIO_SUPPRESS_INTER 0x0004 /* suppress intermediate inter. */
450 /* ... for suspended CCWs */
451/* Device or subchannel gone. */
452#define CIO_GONE 0x0001
453/* No path to device. */
454#define CIO_NO_PATH 0x0002
455/* Device has appeared. */
456#define CIO_OPER 0x0004
457/* Sick revalidation of device. */
458#define CIO_REVALIDATE 0x0008
459
460/**
461 * struct ccw_dev_id - unique identifier for ccw devices
462 * @ssid: subchannel set id
463 * @devno: device number
464 *
465 * This structure is not directly based on any hardware structure. The
466 * hardware identifies a device by its device number and its subchannel,
467 * which is in turn identified by its id. In order to get a unique identifier
468 * for ccw devices across subchannel sets, @struct ccw_dev_id has been
469 * introduced.
470 */
471struct ccw_dev_id {
472 u8 ssid;
473 u16 devno;
474};
475
476/**
477 * ccw_device_id_is_equal() - compare two ccw_dev_ids
478 * @dev_id1: a ccw_dev_id
479 * @dev_id2: another ccw_dev_id
480 * Returns:
481 * %1 if the two structures are equal field-by-field,
482 * %0 if not.
483 * Context:
484 * any
485 */
486static inline int ccw_dev_id_is_equal(struct ccw_dev_id *dev_id1,
487 struct ccw_dev_id *dev_id2)
488{
489 if ((dev_id1->ssid == dev_id2->ssid) &&
490 (dev_id1->devno == dev_id2->devno))
491 return 1;
492 return 0;
493}
494
495extern void wait_cons_dev(void);
496
497extern void css_schedule_reprobe(void);
498
499extern void reipl_ccw_dev(struct ccw_dev_id *id);
500
501struct cio_iplinfo {
502 u16 devno;
503 int is_qdio;
504};
505
506extern int cio_get_iplinfo(struct cio_iplinfo *iplinfo);
507
508/* Function from drivers/s390/cio/chsc.c */
509int chsc_sstpc(void *page, unsigned int op, u16 ctrl);
510int chsc_sstpi(void *page, void *result, size_t size);
511
512#endif
513
514#endif
diff --git a/include/asm-s390/cmb.h b/include/asm-s390/cmb.h
deleted file mode 100644
index 50196857d27a..000000000000
--- a/include/asm-s390/cmb.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef S390_CMB_H
2#define S390_CMB_H
3/**
4 * struct cmbdata - channel measurement block data for user space
5 * @size: size of the stored data
6 * @elapsed_time: time since last sampling
7 * @ssch_rsch_count: number of ssch and rsch
8 * @sample_count: number of samples
9 * @device_connect_time: time of device connect
10 * @function_pending_time: time of function pending
11 * @device_disconnect_time: time of device disconnect
12 * @control_unit_queuing_time: time of control unit queuing
13 * @device_active_only_time: time of device active only
14 * @device_busy_time: time of device busy (ext. format)
15 * @initial_command_response_time: initial command response time (ext. format)
16 *
17 * All values are stored as 64 bit for simplicity, especially
18 * in 32 bit emulation mode. All time values are normalized to
19 * nanoseconds.
20 * Currently, two formats are known, which differ by the size of
21 * this structure, i.e. the last two members are only set when
22 * the extended channel measurement facility (first shipped in
23 * z990 machines) is activated.
24 * Potentially, more fields could be added, which would result in a
25 * new ioctl number.
26 */
27struct cmbdata {
28 __u64 size;
29 __u64 elapsed_time;
30 /* basic and exended format: */
31 __u64 ssch_rsch_count;
32 __u64 sample_count;
33 __u64 device_connect_time;
34 __u64 function_pending_time;
35 __u64 device_disconnect_time;
36 __u64 control_unit_queuing_time;
37 __u64 device_active_only_time;
38 /* extended format only: */
39 __u64 device_busy_time;
40 __u64 initial_command_response_time;
41};
42
43/* enable channel measurement */
44#define BIODASDCMFENABLE _IO(DASD_IOCTL_LETTER, 32)
45/* enable channel measurement */
46#define BIODASDCMFDISABLE _IO(DASD_IOCTL_LETTER, 33)
47/* read channel measurement data */
48#define BIODASDREADALLCMB _IOWR(DASD_IOCTL_LETTER, 33, struct cmbdata)
49
50#ifdef __KERNEL__
51struct ccw_device;
52extern int enable_cmf(struct ccw_device *cdev);
53extern int disable_cmf(struct ccw_device *cdev);
54extern u64 cmf_read(struct ccw_device *cdev, int index);
55extern int cmf_readall(struct ccw_device *cdev, struct cmbdata *data);
56
57#endif /* __KERNEL__ */
58#endif /* S390_CMB_H */
diff --git a/include/asm-s390/compat.h b/include/asm-s390/compat.h
deleted file mode 100644
index de065b32381a..000000000000
--- a/include/asm-s390/compat.h
+++ /dev/null
@@ -1,233 +0,0 @@
1#ifndef _ASM_S390X_COMPAT_H
2#define _ASM_S390X_COMPAT_H
3/*
4 * Architecture specific compatibility types
5 */
6#include <linux/types.h>
7#include <linux/sched.h>
8
9#define PSW32_MASK_PER 0x40000000UL
10#define PSW32_MASK_DAT 0x04000000UL
11#define PSW32_MASK_IO 0x02000000UL
12#define PSW32_MASK_EXT 0x01000000UL
13#define PSW32_MASK_KEY 0x00F00000UL
14#define PSW32_MASK_MCHECK 0x00040000UL
15#define PSW32_MASK_WAIT 0x00020000UL
16#define PSW32_MASK_PSTATE 0x00010000UL
17#define PSW32_MASK_ASC 0x0000C000UL
18#define PSW32_MASK_CC 0x00003000UL
19#define PSW32_MASK_PM 0x00000f00UL
20
21#define PSW32_ADDR_AMODE31 0x80000000UL
22#define PSW32_ADDR_INSN 0x7FFFFFFFUL
23
24#define PSW32_BASE_BITS 0x00080000UL
25
26#define PSW32_ASC_PRIMARY 0x00000000UL
27#define PSW32_ASC_ACCREG 0x00004000UL
28#define PSW32_ASC_SECONDARY 0x00008000UL
29#define PSW32_ASC_HOME 0x0000C000UL
30
31#define PSW32_MASK_MERGE(CURRENT,NEW) \
32 (((CURRENT) & ~(PSW32_MASK_CC|PSW32_MASK_PM)) | \
33 ((NEW) & (PSW32_MASK_CC|PSW32_MASK_PM)))
34
35extern long psw32_user_bits;
36
37#define COMPAT_USER_HZ 100
38
39typedef u32 compat_size_t;
40typedef s32 compat_ssize_t;
41typedef s32 compat_time_t;
42typedef s32 compat_clock_t;
43typedef s32 compat_pid_t;
44typedef u16 __compat_uid_t;
45typedef u16 __compat_gid_t;
46typedef u32 __compat_uid32_t;
47typedef u32 __compat_gid32_t;
48typedef u16 compat_mode_t;
49typedef u32 compat_ino_t;
50typedef u16 compat_dev_t;
51typedef s32 compat_off_t;
52typedef s64 compat_loff_t;
53typedef u16 compat_nlink_t;
54typedef u16 compat_ipc_pid_t;
55typedef s32 compat_daddr_t;
56typedef u32 compat_caddr_t;
57typedef __kernel_fsid_t compat_fsid_t;
58typedef s32 compat_key_t;
59typedef s32 compat_timer_t;
60
61typedef s32 compat_int_t;
62typedef s32 compat_long_t;
63typedef s64 compat_s64;
64typedef u32 compat_uint_t;
65typedef u32 compat_ulong_t;
66typedef u64 compat_u64;
67
68struct compat_timespec {
69 compat_time_t tv_sec;
70 s32 tv_nsec;
71};
72
73struct compat_timeval {
74 compat_time_t tv_sec;
75 s32 tv_usec;
76};
77
78struct compat_stat {
79 compat_dev_t st_dev;
80 u16 __pad1;
81 compat_ino_t st_ino;
82 compat_mode_t st_mode;
83 compat_nlink_t st_nlink;
84 __compat_uid_t st_uid;
85 __compat_gid_t st_gid;
86 compat_dev_t st_rdev;
87 u16 __pad2;
88 u32 st_size;
89 u32 st_blksize;
90 u32 st_blocks;
91 u32 st_atime;
92 u32 st_atime_nsec;
93 u32 st_mtime;
94 u32 st_mtime_nsec;
95 u32 st_ctime;
96 u32 st_ctime_nsec;
97 u32 __unused4;
98 u32 __unused5;
99};
100
101struct compat_flock {
102 short l_type;
103 short l_whence;
104 compat_off_t l_start;
105 compat_off_t l_len;
106 compat_pid_t l_pid;
107};
108
109#define F_GETLK64 12
110#define F_SETLK64 13
111#define F_SETLKW64 14
112
113struct compat_flock64 {
114 short l_type;
115 short l_whence;
116 compat_loff_t l_start;
117 compat_loff_t l_len;
118 compat_pid_t l_pid;
119};
120
121struct compat_statfs {
122 s32 f_type;
123 s32 f_bsize;
124 s32 f_blocks;
125 s32 f_bfree;
126 s32 f_bavail;
127 s32 f_files;
128 s32 f_ffree;
129 compat_fsid_t f_fsid;
130 s32 f_namelen;
131 s32 f_frsize;
132 s32 f_spare[6];
133};
134
135#define COMPAT_RLIM_OLD_INFINITY 0x7fffffff
136#define COMPAT_RLIM_INFINITY 0xffffffff
137
138typedef u32 compat_old_sigset_t; /* at least 32 bits */
139
140#define _COMPAT_NSIG 64
141#define _COMPAT_NSIG_BPW 32
142
143typedef u32 compat_sigset_word;
144
145#define COMPAT_OFF_T_MAX 0x7fffffff
146#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
147
148/*
149 * A pointer passed in from user mode. This should not
150 * be used for syscall parameters, just declare them
151 * as pointers because the syscall entry code will have
152 * appropriately converted them already.
153 */
154typedef u32 compat_uptr_t;
155
156static inline void __user *compat_ptr(compat_uptr_t uptr)
157{
158 return (void __user *)(unsigned long)(uptr & 0x7fffffffUL);
159}
160
161static inline compat_uptr_t ptr_to_compat(void __user *uptr)
162{
163 return (u32)(unsigned long)uptr;
164}
165
166static inline void __user *compat_alloc_user_space(long len)
167{
168 unsigned long stack;
169
170 stack = KSTK_ESP(current);
171 if (test_thread_flag(TIF_31BIT))
172 stack &= 0x7fffffffUL;
173 return (void __user *) (stack - len);
174}
175
176struct compat_ipc64_perm {
177 compat_key_t key;
178 __compat_uid32_t uid;
179 __compat_gid32_t gid;
180 __compat_uid32_t cuid;
181 __compat_gid32_t cgid;
182 compat_mode_t mode;
183 unsigned short __pad1;
184 unsigned short seq;
185 unsigned short __pad2;
186 unsigned int __unused1;
187 unsigned int __unused2;
188};
189
190struct compat_semid64_ds {
191 struct compat_ipc64_perm sem_perm;
192 compat_time_t sem_otime;
193 compat_ulong_t __pad1;
194 compat_time_t sem_ctime;
195 compat_ulong_t __pad2;
196 compat_ulong_t sem_nsems;
197 compat_ulong_t __unused1;
198 compat_ulong_t __unused2;
199};
200
201struct compat_msqid64_ds {
202 struct compat_ipc64_perm msg_perm;
203 compat_time_t msg_stime;
204 compat_ulong_t __pad1;
205 compat_time_t msg_rtime;
206 compat_ulong_t __pad2;
207 compat_time_t msg_ctime;
208 compat_ulong_t __pad3;
209 compat_ulong_t msg_cbytes;
210 compat_ulong_t msg_qnum;
211 compat_ulong_t msg_qbytes;
212 compat_pid_t msg_lspid;
213 compat_pid_t msg_lrpid;
214 compat_ulong_t __unused1;
215 compat_ulong_t __unused2;
216};
217
218struct compat_shmid64_ds {
219 struct compat_ipc64_perm shm_perm;
220 compat_size_t shm_segsz;
221 compat_time_t shm_atime;
222 compat_ulong_t __pad1;
223 compat_time_t shm_dtime;
224 compat_ulong_t __pad2;
225 compat_time_t shm_ctime;
226 compat_ulong_t __pad3;
227 compat_pid_t shm_cpid;
228 compat_pid_t shm_lpid;
229 compat_ulong_t shm_nattch;
230 compat_ulong_t __unused1;
231 compat_ulong_t __unused2;
232};
233#endif /* _ASM_S390X_COMPAT_H */
diff --git a/include/asm-s390/cpcmd.h b/include/asm-s390/cpcmd.h
deleted file mode 100644
index 48a9eab16429..000000000000
--- a/include/asm-s390/cpcmd.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * arch/s390/kernel/cpcmd.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Christian Borntraeger (cborntra@de.ibm.com),
8 */
9
10#ifndef _ASM_S390_CPCMD_H
11#define _ASM_S390_CPCMD_H
12
13/*
14 * the lowlevel function for cpcmd
15 * the caller of __cpcmd has to ensure that the response buffer is below 2 GB
16 */
17extern int __cpcmd(const char *cmd, char *response, int rlen, int *response_code);
18
19/*
20 * cpcmd is the in-kernel interface for issuing CP commands
21 *
22 * cmd: null-terminated command string, max 240 characters
23 * response: response buffer for VM's textual response
24 * rlen: size of the response buffer, cpcmd will not exceed this size
25 * but will cap the output, if its too large. Everything that
26 * did not fit into the buffer will be silently dropped
27 * response_code: return pointer for VM's error code
28 * return value: the size of the response. The caller can check if the buffer
29 * was large enough by comparing the return value and rlen
30 * NOTE: If the response buffer is not below 2 GB, cpcmd can sleep
31 */
32extern int cpcmd(const char *cmd, char *response, int rlen, int *response_code);
33
34#endif /* _ASM_S390_CPCMD_H */
diff --git a/include/asm-s390/cpu.h b/include/asm-s390/cpu.h
deleted file mode 100644
index e5a6a9ba3adf..000000000000
--- a/include/asm-s390/cpu.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * include/asm-s390/cpu.h
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_CPU_H_
9#define _ASM_S390_CPU_H_
10
11#include <linux/types.h>
12#include <linux/percpu.h>
13#include <linux/spinlock.h>
14
15struct s390_idle_data {
16 spinlock_t lock;
17 unsigned int in_idle;
18 unsigned long long idle_count;
19 unsigned long long idle_enter;
20 unsigned long long idle_time;
21};
22
23DECLARE_PER_CPU(struct s390_idle_data, s390_idle);
24
25void s390_idle_leave(void);
26
27static inline void s390_idle_check(void)
28{
29 if ((&__get_cpu_var(s390_idle))->in_idle)
30 s390_idle_leave();
31}
32
33#endif /* _ASM_S390_CPU_H_ */
diff --git a/include/asm-s390/cputime.h b/include/asm-s390/cputime.h
deleted file mode 100644
index 133ce054fc89..000000000000
--- a/include/asm-s390/cputime.h
+++ /dev/null
@@ -1,177 +0,0 @@
1/*
2 * include/asm-s390/cputime.h
3 *
4 * (C) Copyright IBM Corp. 2004
5 *
6 * Author: Martin Schwidefsky <schwidefsky@de.ibm.com>
7 */
8
9#ifndef _S390_CPUTIME_H
10#define _S390_CPUTIME_H
11
12#include <asm/div64.h>
13
14/* We want to use micro-second resolution. */
15
16typedef unsigned long long cputime_t;
17typedef unsigned long long cputime64_t;
18
19#ifndef __s390x__
20
21static inline unsigned int
22__div(unsigned long long n, unsigned int base)
23{
24 register_pair rp;
25
26 rp.pair = n >> 1;
27 asm ("dr %0,%1" : "+d" (rp) : "d" (base >> 1));
28 return rp.subreg.odd;
29}
30
31#else /* __s390x__ */
32
33static inline unsigned int
34__div(unsigned long long n, unsigned int base)
35{
36 return n / base;
37}
38
39#endif /* __s390x__ */
40
41#define cputime_zero (0ULL)
42#define cputime_max ((~0UL >> 1) - 1)
43#define cputime_add(__a, __b) ((__a) + (__b))
44#define cputime_sub(__a, __b) ((__a) - (__b))
45#define cputime_div(__a, __n) ({ \
46 unsigned long long __div = (__a); \
47 do_div(__div,__n); \
48 __div; \
49})
50#define cputime_halve(__a) ((__a) >> 1)
51#define cputime_eq(__a, __b) ((__a) == (__b))
52#define cputime_gt(__a, __b) ((__a) > (__b))
53#define cputime_ge(__a, __b) ((__a) >= (__b))
54#define cputime_lt(__a, __b) ((__a) < (__b))
55#define cputime_le(__a, __b) ((__a) <= (__b))
56#define cputime_to_jiffies(__ct) (__div((__ct), 1000000 / HZ))
57#define cputime_to_scaled(__ct) (__ct)
58#define jiffies_to_cputime(__hz) ((cputime_t)(__hz) * (1000000 / HZ))
59
60#define cputime64_zero (0ULL)
61#define cputime64_add(__a, __b) ((__a) + (__b))
62#define cputime_to_cputime64(__ct) (__ct)
63
64static inline u64
65cputime64_to_jiffies64(cputime64_t cputime)
66{
67 do_div(cputime, 1000000 / HZ);
68 return cputime;
69}
70
71/*
72 * Convert cputime to milliseconds and back.
73 */
74static inline unsigned int
75cputime_to_msecs(const cputime_t cputime)
76{
77 return __div(cputime, 1000);
78}
79
80static inline cputime_t
81msecs_to_cputime(const unsigned int m)
82{
83 return (cputime_t) m * 1000;
84}
85
86/*
87 * Convert cputime to milliseconds and back.
88 */
89static inline unsigned int
90cputime_to_secs(const cputime_t cputime)
91{
92 return __div(cputime, 1000000);
93}
94
95static inline cputime_t
96secs_to_cputime(const unsigned int s)
97{
98 return (cputime_t) s * 1000000;
99}
100
101/*
102 * Convert cputime to timespec and back.
103 */
104static inline cputime_t
105timespec_to_cputime(const struct timespec *value)
106{
107 return value->tv_nsec / 1000 + (u64) value->tv_sec * 1000000;
108}
109
110static inline void
111cputime_to_timespec(const cputime_t cputime, struct timespec *value)
112{
113#ifndef __s390x__
114 register_pair rp;
115
116 rp.pair = cputime >> 1;
117 asm ("dr %0,%1" : "+d" (rp) : "d" (1000000 >> 1));
118 value->tv_nsec = rp.subreg.even * 1000;
119 value->tv_sec = rp.subreg.odd;
120#else
121 value->tv_nsec = (cputime % 1000000) * 1000;
122 value->tv_sec = cputime / 1000000;
123#endif
124}
125
126/*
127 * Convert cputime to timeval and back.
128 * Since cputime and timeval have the same resolution (microseconds)
129 * this is easy.
130 */
131static inline cputime_t
132timeval_to_cputime(const struct timeval *value)
133{
134 return value->tv_usec + (u64) value->tv_sec * 1000000;
135}
136
137static inline void
138cputime_to_timeval(const cputime_t cputime, struct timeval *value)
139{
140#ifndef __s390x__
141 register_pair rp;
142
143 rp.pair = cputime >> 1;
144 asm ("dr %0,%1" : "+d" (rp) : "d" (1000000 >> 1));
145 value->tv_usec = rp.subreg.even;
146 value->tv_sec = rp.subreg.odd;
147#else
148 value->tv_usec = cputime % 1000000;
149 value->tv_sec = cputime / 1000000;
150#endif
151}
152
153/*
154 * Convert cputime to clock and back.
155 */
156static inline clock_t
157cputime_to_clock_t(cputime_t cputime)
158{
159 return __div(cputime, 1000000 / USER_HZ);
160}
161
162static inline cputime_t
163clock_t_to_cputime(unsigned long x)
164{
165 return (cputime_t) x * (1000000 / USER_HZ);
166}
167
168/*
169 * Convert cputime64 to clock.
170 */
171static inline clock_t
172cputime64_to_clock_t(cputime64_t cputime)
173{
174 return __div(cputime, 1000000 / USER_HZ);
175}
176
177#endif /* _S390_CPUTIME_H */
diff --git a/include/asm-s390/current.h b/include/asm-s390/current.h
deleted file mode 100644
index 83cf36cde2da..000000000000
--- a/include/asm-s390/current.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * include/asm-s390/current.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * Derived from "include/asm-i386/current.h"
9 */
10
11#ifndef _S390_CURRENT_H
12#define _S390_CURRENT_H
13
14#ifdef __KERNEL__
15#include <asm/lowcore.h>
16
17struct task_struct;
18
19#define current ((struct task_struct *const)S390_lowcore.current_task)
20
21#endif
22
23#endif /* !(_S390_CURRENT_H) */
diff --git a/include/asm-s390/dasd.h b/include/asm-s390/dasd.h
deleted file mode 100644
index 3f002e13d024..000000000000
--- a/include/asm-s390/dasd.h
+++ /dev/null
@@ -1,270 +0,0 @@
1/*
2 * File...........: linux/drivers/s390/block/dasd.c
3 * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com>
4 * Bugreports.to..: <Linux390@de.ibm.com>
5 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000
6 *
7 * This file is the interface of the DASD device driver, which is exported to user space
8 * any future changes wrt the API will result in a change of the APIVERSION reported
9 * to userspace by the DASDAPIVER-ioctl
10 *
11 */
12
13#ifndef DASD_H
14#define DASD_H
15#include <linux/ioctl.h>
16
17#define DASD_IOCTL_LETTER 'D'
18
19#define DASD_API_VERSION 6
20
21/*
22 * struct dasd_information2_t
23 * represents any data about the device, which is visible to userspace.
24 * including foramt and featueres.
25 */
26typedef struct dasd_information2_t {
27 unsigned int devno; /* S/390 devno */
28 unsigned int real_devno; /* for aliases */
29 unsigned int schid; /* S/390 subchannel identifier */
30 unsigned int cu_type : 16; /* from SenseID */
31 unsigned int cu_model : 8; /* from SenseID */
32 unsigned int dev_type : 16; /* from SenseID */
33 unsigned int dev_model : 8; /* from SenseID */
34 unsigned int open_count;
35 unsigned int req_queue_len;
36 unsigned int chanq_len; /* length of chanq */
37 char type[4]; /* from discipline.name, 'none' for unknown */
38 unsigned int status; /* current device level */
39 unsigned int label_block; /* where to find the VOLSER */
40 unsigned int FBA_layout; /* fixed block size (like AIXVOL) */
41 unsigned int characteristics_size;
42 unsigned int confdata_size;
43 char characteristics[64]; /* from read_device_characteristics */
44 char configuration_data[256]; /* from read_configuration_data */
45 unsigned int format; /* format info like formatted/cdl/ldl/... */
46 unsigned int features; /* dasd features like 'ro',... */
47 unsigned int reserved0; /* reserved for further use ,... */
48 unsigned int reserved1; /* reserved for further use ,... */
49 unsigned int reserved2; /* reserved for further use ,... */
50 unsigned int reserved3; /* reserved for further use ,... */
51 unsigned int reserved4; /* reserved for further use ,... */
52 unsigned int reserved5; /* reserved for further use ,... */
53 unsigned int reserved6; /* reserved for further use ,... */
54 unsigned int reserved7; /* reserved for further use ,... */
55} dasd_information2_t;
56
57/*
58 * values to be used for dasd_information_t.format
59 * 0x00: NOT formatted
60 * 0x01: Linux disc layout
61 * 0x02: Common disc layout
62 */
63#define DASD_FORMAT_NONE 0
64#define DASD_FORMAT_LDL 1
65#define DASD_FORMAT_CDL 2
66/*
67 * values to be used for dasd_information_t.features
68 * 0x00: default features
69 * 0x01: readonly (ro)
70 * 0x02: use diag discipline (diag)
71 * 0x04: set the device initially online (internal use only)
72 * 0x08: enable ERP related logging
73 */
74#define DASD_FEATURE_DEFAULT 0x00
75#define DASD_FEATURE_READONLY 0x01
76#define DASD_FEATURE_USEDIAG 0x02
77#define DASD_FEATURE_INITIAL_ONLINE 0x04
78#define DASD_FEATURE_ERPLOG 0x08
79
80#define DASD_PARTN_BITS 2
81
82/*
83 * struct dasd_information_t
84 * represents any data about the data, which is visible to userspace
85 */
86typedef struct dasd_information_t {
87 unsigned int devno; /* S/390 devno */
88 unsigned int real_devno; /* for aliases */
89 unsigned int schid; /* S/390 subchannel identifier */
90 unsigned int cu_type : 16; /* from SenseID */
91 unsigned int cu_model : 8; /* from SenseID */
92 unsigned int dev_type : 16; /* from SenseID */
93 unsigned int dev_model : 8; /* from SenseID */
94 unsigned int open_count;
95 unsigned int req_queue_len;
96 unsigned int chanq_len; /* length of chanq */
97 char type[4]; /* from discipline.name, 'none' for unknown */
98 unsigned int status; /* current device level */
99 unsigned int label_block; /* where to find the VOLSER */
100 unsigned int FBA_layout; /* fixed block size (like AIXVOL) */
101 unsigned int characteristics_size;
102 unsigned int confdata_size;
103 char characteristics[64]; /* from read_device_characteristics */
104 char configuration_data[256]; /* from read_configuration_data */
105} dasd_information_t;
106
107/*
108 * Read Subsystem Data - Performance Statistics
109 */
110typedef struct dasd_rssd_perf_stats_t {
111 unsigned char invalid:1;
112 unsigned char format:3;
113 unsigned char data_format:4;
114 unsigned char unit_address;
115 unsigned short device_status;
116 unsigned int nr_read_normal;
117 unsigned int nr_read_normal_hits;
118 unsigned int nr_write_normal;
119 unsigned int nr_write_fast_normal_hits;
120 unsigned int nr_read_seq;
121 unsigned int nr_read_seq_hits;
122 unsigned int nr_write_seq;
123 unsigned int nr_write_fast_seq_hits;
124 unsigned int nr_read_cache;
125 unsigned int nr_read_cache_hits;
126 unsigned int nr_write_cache;
127 unsigned int nr_write_fast_cache_hits;
128 unsigned int nr_inhibit_cache;
129 unsigned int nr_bybass_cache;
130 unsigned int nr_seq_dasd_to_cache;
131 unsigned int nr_dasd_to_cache;
132 unsigned int nr_cache_to_dasd;
133 unsigned int nr_delayed_fast_write;
134 unsigned int nr_normal_fast_write;
135 unsigned int nr_seq_fast_write;
136 unsigned int nr_cache_miss;
137 unsigned char status2;
138 unsigned int nr_quick_write_promotes;
139 unsigned char reserved;
140 unsigned short ssid;
141 unsigned char reseved2[96];
142} __attribute__((packed)) dasd_rssd_perf_stats_t;
143
144/*
145 * struct profile_info_t
146 * holds the profinling information
147 */
148typedef struct dasd_profile_info_t {
149 unsigned int dasd_io_reqs; /* number of requests processed at all */
150 unsigned int dasd_io_sects; /* number of sectors processed at all */
151 unsigned int dasd_io_secs[32]; /* histogram of request's sizes */
152 unsigned int dasd_io_times[32]; /* histogram of requests's times */
153 unsigned int dasd_io_timps[32]; /* histogram of requests's times per sector */
154 unsigned int dasd_io_time1[32]; /* histogram of time from build to start */
155 unsigned int dasd_io_time2[32]; /* histogram of time from start to irq */
156 unsigned int dasd_io_time2ps[32]; /* histogram of time from start to irq */
157 unsigned int dasd_io_time3[32]; /* histogram of time from irq to end */
158 unsigned int dasd_io_nr_req[32]; /* histogram of # of requests in chanq */
159} dasd_profile_info_t;
160
161/*
162 * struct format_data_t
163 * represents all data necessary to format a dasd
164 */
165typedef struct format_data_t {
166 int start_unit; /* from track */
167 int stop_unit; /* to track */
168 int blksize; /* sectorsize */
169 int intensity;
170} format_data_t;
171
172/*
173 * values to be used for format_data_t.intensity
174 * 0/8: normal format
175 * 1/9: also write record zero
176 * 3/11: also write home address
177 * 4/12: invalidate track
178 */
179#define DASD_FMT_INT_FMT_R0 1 /* write record zero */
180#define DASD_FMT_INT_FMT_HA 2 /* write home address, also set FMT_R0 ! */
181#define DASD_FMT_INT_INVAL 4 /* invalidate tracks */
182#define DASD_FMT_INT_COMPAT 8 /* use OS/390 compatible disk layout */
183
184
185/*
186 * struct attrib_data_t
187 * represents the operation (cache) bits for the device.
188 * Used in DE to influence caching of the DASD.
189 */
190typedef struct attrib_data_t {
191 unsigned char operation:3; /* cache operation mode */
192 unsigned char reserved:5; /* cache operation mode */
193 __u16 nr_cyl; /* no of cyliners for read ahaed */
194 __u8 reserved2[29]; /* for future use */
195} __attribute__ ((packed)) attrib_data_t;
196
197/* definition of operation (cache) bits within attributes of DE */
198#define DASD_NORMAL_CACHE 0x0
199#define DASD_BYPASS_CACHE 0x1
200#define DASD_INHIBIT_LOAD 0x2
201#define DASD_SEQ_ACCESS 0x3
202#define DASD_SEQ_PRESTAGE 0x4
203#define DASD_REC_ACCESS 0x5
204
205
206/********************************************************************************
207 * SECTION: Definition of IOCTLs
208 *
209 * Here ist how the ioctl-nr should be used:
210 * 0 - 31 DASD driver itself
211 * 32 - 239 still open
212 * 240 - 255 reserved for EMC
213 *******************************************************************************/
214
215/* Disable the volume (for Linux) */
216#define BIODASDDISABLE _IO(DASD_IOCTL_LETTER,0)
217/* Enable the volume (for Linux) */
218#define BIODASDENABLE _IO(DASD_IOCTL_LETTER,1)
219/* Issue a reserve/release command, rsp. */
220#define BIODASDRSRV _IO(DASD_IOCTL_LETTER,2) /* reserve */
221#define BIODASDRLSE _IO(DASD_IOCTL_LETTER,3) /* release */
222#define BIODASDSLCK _IO(DASD_IOCTL_LETTER,4) /* steal lock */
223/* reset profiling information of a device */
224#define BIODASDPRRST _IO(DASD_IOCTL_LETTER,5)
225/* Quiesce IO on device */
226#define BIODASDQUIESCE _IO(DASD_IOCTL_LETTER,6)
227/* Resume IO on device */
228#define BIODASDRESUME _IO(DASD_IOCTL_LETTER,7)
229
230
231/* retrieve API version number */
232#define DASDAPIVER _IOR(DASD_IOCTL_LETTER,0,int)
233/* Get information on a dasd device */
234#define BIODASDINFO _IOR(DASD_IOCTL_LETTER,1,dasd_information_t)
235/* retrieve profiling information of a device */
236#define BIODASDPRRD _IOR(DASD_IOCTL_LETTER,2,dasd_profile_info_t)
237/* Get information on a dasd device (enhanced) */
238#define BIODASDINFO2 _IOR(DASD_IOCTL_LETTER,3,dasd_information2_t)
239/* Performance Statistics Read */
240#define BIODASDPSRD _IOR(DASD_IOCTL_LETTER,4,dasd_rssd_perf_stats_t)
241/* Get Attributes (cache operations) */
242#define BIODASDGATTR _IOR(DASD_IOCTL_LETTER,5,attrib_data_t)
243
244
245/* #define BIODASDFORMAT _IOW(IOCTL_LETTER,0,format_data_t) , deprecated */
246#define BIODASDFMT _IOW(DASD_IOCTL_LETTER,1,format_data_t)
247/* Set Attributes (cache operations) */
248#define BIODASDSATTR _IOW(DASD_IOCTL_LETTER,2,attrib_data_t)
249
250
251#endif /* DASD_H */
252
253/*
254 * Overrides for Emacs so that we follow Linus's tabbing style.
255 * Emacs will notice this stuff at the end of the file and automatically
256 * adjust the settings for this buffer only. This must remain at the end
257 * of the file.
258 * ---------------------------------------------------------------------------
259 * Local variables:
260 * c-indent-level: 4
261 * c-brace-imaginary-offset: 0
262 * c-brace-offset: -4
263 * c-argdecl-indent: 4
264 * c-label-offset: -4
265 * c-continued-statement-offset: 4
266 * c-continued-brace-offset: 0
267 * indent-tabs-mode: nil
268 * tab-width: 8
269 * End:
270 */
diff --git a/include/asm-s390/debug.h b/include/asm-s390/debug.h
deleted file mode 100644
index 9450ce6e32de..000000000000
--- a/include/asm-s390/debug.h
+++ /dev/null
@@ -1,261 +0,0 @@
1/*
2 * include/asm-s390/debug.h
3 * S/390 debug facility
4 *
5 * Copyright (C) 1999, 2000 IBM Deutschland Entwicklung GmbH,
6 * IBM Corporation
7 */
8
9#ifndef DEBUG_H
10#define DEBUG_H
11
12#include <linux/fs.h>
13
14/* Note:
15 * struct __debug_entry must be defined outside of #ifdef __KERNEL__
16 * in order to allow a user program to analyze the 'raw'-view.
17 */
18
19struct __debug_entry{
20 union {
21 struct {
22 unsigned long long clock:52;
23 unsigned long long exception:1;
24 unsigned long long level:3;
25 unsigned long long cpuid:8;
26 } fields;
27
28 unsigned long long stck;
29 } id;
30 void* caller;
31} __attribute__((packed));
32
33
34#define __DEBUG_FEATURE_VERSION 2 /* version of debug feature */
35
36#ifdef __KERNEL__
37#include <linux/string.h>
38#include <linux/spinlock.h>
39#include <linux/kernel.h>
40#include <linux/time.h>
41
42#define DEBUG_MAX_LEVEL 6 /* debug levels range from 0 to 6 */
43#define DEBUG_OFF_LEVEL -1 /* level where debug is switched off */
44#define DEBUG_FLUSH_ALL -1 /* parameter to flush all areas */
45#define DEBUG_MAX_VIEWS 10 /* max number of views in proc fs */
46#define DEBUG_MAX_NAME_LEN 64 /* max length for a debugfs file name */
47#define DEBUG_DEFAULT_LEVEL 3 /* initial debug level */
48
49#define DEBUG_DIR_ROOT "s390dbf" /* name of debug root directory in proc fs */
50
51#define DEBUG_DATA(entry) (char*)(entry + 1) /* data is stored behind */
52 /* the entry information */
53
54typedef struct __debug_entry debug_entry_t;
55
56struct debug_view;
57
58typedef struct debug_info {
59 struct debug_info* next;
60 struct debug_info* prev;
61 atomic_t ref_count;
62 spinlock_t lock;
63 int level;
64 int nr_areas;
65 int pages_per_area;
66 int buf_size;
67 int entry_size;
68 debug_entry_t*** areas;
69 int active_area;
70 int *active_pages;
71 int *active_entries;
72 struct dentry* debugfs_root_entry;
73 struct dentry* debugfs_entries[DEBUG_MAX_VIEWS];
74 struct debug_view* views[DEBUG_MAX_VIEWS];
75 char name[DEBUG_MAX_NAME_LEN];
76 mode_t mode;
77} debug_info_t;
78
79typedef int (debug_header_proc_t) (debug_info_t* id,
80 struct debug_view* view,
81 int area,
82 debug_entry_t* entry,
83 char* out_buf);
84
85typedef int (debug_format_proc_t) (debug_info_t* id,
86 struct debug_view* view, char* out_buf,
87 const char* in_buf);
88typedef int (debug_prolog_proc_t) (debug_info_t* id,
89 struct debug_view* view,
90 char* out_buf);
91typedef int (debug_input_proc_t) (debug_info_t* id,
92 struct debug_view* view,
93 struct file* file,
94 const char __user *user_buf,
95 size_t in_buf_size, loff_t* offset);
96
97int debug_dflt_header_fn(debug_info_t* id, struct debug_view* view,
98 int area, debug_entry_t* entry, char* out_buf);
99
100struct debug_view {
101 char name[DEBUG_MAX_NAME_LEN];
102 debug_prolog_proc_t* prolog_proc;
103 debug_header_proc_t* header_proc;
104 debug_format_proc_t* format_proc;
105 debug_input_proc_t* input_proc;
106 void* private_data;
107};
108
109extern struct debug_view debug_hex_ascii_view;
110extern struct debug_view debug_raw_view;
111extern struct debug_view debug_sprintf_view;
112
113/* do NOT use the _common functions */
114
115debug_entry_t* debug_event_common(debug_info_t* id, int level,
116 const void* data, int length);
117
118debug_entry_t* debug_exception_common(debug_info_t* id, int level,
119 const void* data, int length);
120
121/* Debug Feature API: */
122
123debug_info_t *debug_register(const char *name, int pages, int nr_areas,
124 int buf_size);
125
126debug_info_t *debug_register_mode(const char *name, int pages, int nr_areas,
127 int buf_size, mode_t mode, uid_t uid,
128 gid_t gid);
129
130void debug_unregister(debug_info_t* id);
131
132void debug_set_level(debug_info_t* id, int new_level);
133
134void debug_stop_all(void);
135
136static inline debug_entry_t*
137debug_event(debug_info_t* id, int level, void* data, int length)
138{
139 if ((!id) || (level > id->level) || (id->pages_per_area == 0))
140 return NULL;
141 return debug_event_common(id,level,data,length);
142}
143
144static inline debug_entry_t*
145debug_int_event(debug_info_t* id, int level, unsigned int tag)
146{
147 unsigned int t=tag;
148 if ((!id) || (level > id->level) || (id->pages_per_area == 0))
149 return NULL;
150 return debug_event_common(id,level,&t,sizeof(unsigned int));
151}
152
153static inline debug_entry_t *
154debug_long_event (debug_info_t* id, int level, unsigned long tag)
155{
156 unsigned long t=tag;
157 if ((!id) || (level > id->level) || (id->pages_per_area == 0))
158 return NULL;
159 return debug_event_common(id,level,&t,sizeof(unsigned long));
160}
161
162static inline debug_entry_t*
163debug_text_event(debug_info_t* id, int level, const char* txt)
164{
165 if ((!id) || (level > id->level) || (id->pages_per_area == 0))
166 return NULL;
167 return debug_event_common(id,level,txt,strlen(txt));
168}
169
170extern debug_entry_t *
171debug_sprintf_event(debug_info_t* id,int level,char *string,...)
172 __attribute__ ((format(printf, 3, 4)));
173
174
175static inline debug_entry_t*
176debug_exception(debug_info_t* id, int level, void* data, int length)
177{
178 if ((!id) || (level > id->level) || (id->pages_per_area == 0))
179 return NULL;
180 return debug_exception_common(id,level,data,length);
181}
182
183static inline debug_entry_t*
184debug_int_exception(debug_info_t* id, int level, unsigned int tag)
185{
186 unsigned int t=tag;
187 if ((!id) || (level > id->level) || (id->pages_per_area == 0))
188 return NULL;
189 return debug_exception_common(id,level,&t,sizeof(unsigned int));
190}
191
192static inline debug_entry_t *
193debug_long_exception (debug_info_t* id, int level, unsigned long tag)
194{
195 unsigned long t=tag;
196 if ((!id) || (level > id->level) || (id->pages_per_area == 0))
197 return NULL;
198 return debug_exception_common(id,level,&t,sizeof(unsigned long));
199}
200
201static inline debug_entry_t*
202debug_text_exception(debug_info_t* id, int level, const char* txt)
203{
204 if ((!id) || (level > id->level) || (id->pages_per_area == 0))
205 return NULL;
206 return debug_exception_common(id,level,txt,strlen(txt));
207}
208
209
210extern debug_entry_t *
211debug_sprintf_exception(debug_info_t* id,int level,char *string,...)
212 __attribute__ ((format(printf, 3, 4)));
213
214int debug_register_view(debug_info_t* id, struct debug_view* view);
215int debug_unregister_view(debug_info_t* id, struct debug_view* view);
216
217/*
218 define the debug levels:
219 - 0 No debugging output to console or syslog
220 - 1 Log internal errors to syslog, ignore check conditions
221 - 2 Log internal errors and check conditions to syslog
222 - 3 Log internal errors to console, log check conditions to syslog
223 - 4 Log internal errors and check conditions to console
224 - 5 panic on internal errors, log check conditions to console
225 - 6 panic on both, internal errors and check conditions
226 */
227
228#ifndef DEBUG_LEVEL
229#define DEBUG_LEVEL 4
230#endif
231
232#define INTERNAL_ERRMSG(x,y...) "E" __FILE__ "%d: " x, __LINE__, y
233#define INTERNAL_WRNMSG(x,y...) "W" __FILE__ "%d: " x, __LINE__, y
234#define INTERNAL_INFMSG(x,y...) "I" __FILE__ "%d: " x, __LINE__, y
235#define INTERNAL_DEBMSG(x,y...) "D" __FILE__ "%d: " x, __LINE__, y
236
237#if DEBUG_LEVEL > 0
238#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x )
239#define PRINT_INFO(x...) printk ( KERN_INFO PRINTK_HEADER x )
240#define PRINT_WARN(x...) printk ( KERN_WARNING PRINTK_HEADER x )
241#define PRINT_ERR(x...) printk ( KERN_ERR PRINTK_HEADER x )
242#define PRINT_FATAL(x...) panic ( PRINTK_HEADER x )
243#else
244#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x )
245#define PRINT_INFO(x...) printk ( KERN_DEBUG PRINTK_HEADER x )
246#define PRINT_WARN(x...) printk ( KERN_DEBUG PRINTK_HEADER x )
247#define PRINT_ERR(x...) printk ( KERN_DEBUG PRINTK_HEADER x )
248#define PRINT_FATAL(x...) printk ( KERN_DEBUG PRINTK_HEADER x )
249#endif /* DASD_DEBUG */
250
251#undef DEBUG_MALLOC
252#ifdef DEBUG_MALLOC
253void *b;
254#define kmalloc(x...) (PRINT_INFO(" kmalloc %p\n",b=kmalloc(x)),b)
255#define kfree(x) PRINT_INFO(" kfree %p\n",x);kfree(x)
256#define get_zeroed_page(x...) (PRINT_INFO(" gfp %p\n",b=get_zeroed_page(x)),b)
257#define __get_free_pages(x...) (PRINT_INFO(" gfps %p\n",b=__get_free_pages(x)),b)
258#endif /* DEBUG_MALLOC */
259
260#endif /* __KERNEL__ */
261#endif /* DEBUG_H */
diff --git a/include/asm-s390/delay.h b/include/asm-s390/delay.h
deleted file mode 100644
index 78357314c450..000000000000
--- a/include/asm-s390/delay.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * include/asm-s390/delay.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * Derived from "include/asm-i386/delay.h"
9 * Copyright (C) 1993 Linus Torvalds
10 *
11 * Delay routines calling functions in arch/s390/lib/delay.c
12 */
13
14#ifndef _S390_DELAY_H
15#define _S390_DELAY_H
16
17extern void __udelay(unsigned long usecs);
18extern void __delay(unsigned long loops);
19
20#define udelay(n) __udelay(n)
21
22#endif /* defined(_S390_DELAY_H) */
diff --git a/include/asm-s390/device.h b/include/asm-s390/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/include/asm-s390/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/include/asm-s390/diag.h b/include/asm-s390/diag.h
deleted file mode 100644
index 72b2e2f2d32d..000000000000
--- a/include/asm-s390/diag.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * s390 diagnose functions
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Michael Holzheu <holzheu@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_DIAG_H
9#define _ASM_S390_DIAG_H
10
11/*
12 * Diagnose 10: Release pages
13 */
14extern void diag10(unsigned long addr);
15
16/*
17 * Diagnose 14: Input spool file manipulation
18 */
19extern int diag14(unsigned long rx, unsigned long ry1, unsigned long subcode);
20
21/*
22 * Diagnose 210: Get information about a virtual device
23 */
24struct diag210 {
25 u16 vrdcdvno; /* device number (input) */
26 u16 vrdclen; /* data block length (input) */
27 u8 vrdcvcla; /* virtual device class (output) */
28 u8 vrdcvtyp; /* virtual device type (output) */
29 u8 vrdcvsta; /* virtual device status (output) */
30 u8 vrdcvfla; /* virtual device flags (output) */
31 u8 vrdcrccl; /* real device class (output) */
32 u8 vrdccrty; /* real device type (output) */
33 u8 vrdccrmd; /* real device model (output) */
34 u8 vrdccrft; /* real device feature (output) */
35} __attribute__((packed, aligned(4)));
36
37extern int diag210(struct diag210 *addr);
38
39#endif /* _ASM_S390_DIAG_H */
diff --git a/include/asm-s390/div64.h b/include/asm-s390/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/include/asm-s390/div64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/div64.h>
diff --git a/include/asm-s390/dma.h b/include/asm-s390/dma.h
deleted file mode 100644
index 7425c6af6cd4..000000000000
--- a/include/asm-s390/dma.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * include/asm-s390/dma.h
3 *
4 * S390 version
5 */
6
7#ifndef _ASM_DMA_H
8#define _ASM_DMA_H
9
10#include <asm/io.h> /* need byte IO */
11
12#define MAX_DMA_ADDRESS 0x80000000
13
14#define free_dma(x) do { } while (0)
15
16#endif /* _ASM_DMA_H */
diff --git a/include/asm-s390/ebcdic.h b/include/asm-s390/ebcdic.h
deleted file mode 100644
index 7f6f641d32f4..000000000000
--- a/include/asm-s390/ebcdic.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * include/asm-s390/ebcdic.h
3 * EBCDIC -> ASCII, ASCII -> EBCDIC conversion routines.
4 *
5 * S390 version
6 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
8 */
9
10#ifndef _EBCDIC_H
11#define _EBCDIC_H
12
13#ifndef _S390_TYPES_H
14#include <types.h>
15#endif
16
17extern __u8 _ascebc_500[256]; /* ASCII -> EBCDIC 500 conversion table */
18extern __u8 _ebcasc_500[256]; /* EBCDIC 500 -> ASCII conversion table */
19extern __u8 _ascebc[256]; /* ASCII -> EBCDIC conversion table */
20extern __u8 _ebcasc[256]; /* EBCDIC -> ASCII conversion table */
21extern __u8 _ebc_tolower[256]; /* EBCDIC -> lowercase */
22extern __u8 _ebc_toupper[256]; /* EBCDIC -> uppercase */
23
24static inline void
25codepage_convert(const __u8 *codepage, volatile __u8 * addr, unsigned long nr)
26{
27 if (nr-- <= 0)
28 return;
29 asm volatile(
30 " bras 1,1f\n"
31 " tr 0(1,%0),0(%2)\n"
32 "0: tr 0(256,%0),0(%2)\n"
33 " la %0,256(%0)\n"
34 "1: ahi %1,-256\n"
35 " jnm 0b\n"
36 " ex %1,0(1)"
37 : "+&a" (addr), "+&a" (nr)
38 : "a" (codepage) : "cc", "memory", "1");
39}
40
41#define ASCEBC(addr,nr) codepage_convert(_ascebc, addr, nr)
42#define EBCASC(addr,nr) codepage_convert(_ebcasc, addr, nr)
43#define ASCEBC_500(addr,nr) codepage_convert(_ascebc_500, addr, nr)
44#define EBCASC_500(addr,nr) codepage_convert(_ebcasc_500, addr, nr)
45#define EBC_TOLOWER(addr,nr) codepage_convert(_ebc_tolower, addr, nr)
46#define EBC_TOUPPER(addr,nr) codepage_convert(_ebc_toupper, addr, nr)
47
48#endif
49
diff --git a/include/asm-s390/elf.h b/include/asm-s390/elf.h
deleted file mode 100644
index 3cad56923815..000000000000
--- a/include/asm-s390/elf.h
+++ /dev/null
@@ -1,196 +0,0 @@
1/*
2 * include/asm-s390/elf.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/elf.h"
7 */
8
9#ifndef __ASMS390_ELF_H
10#define __ASMS390_ELF_H
11
12/* s390 relocations defined by the ABIs */
13#define R_390_NONE 0 /* No reloc. */
14#define R_390_8 1 /* Direct 8 bit. */
15#define R_390_12 2 /* Direct 12 bit. */
16#define R_390_16 3 /* Direct 16 bit. */
17#define R_390_32 4 /* Direct 32 bit. */
18#define R_390_PC32 5 /* PC relative 32 bit. */
19#define R_390_GOT12 6 /* 12 bit GOT offset. */
20#define R_390_GOT32 7 /* 32 bit GOT offset. */
21#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
22#define R_390_COPY 9 /* Copy symbol at runtime. */
23#define R_390_GLOB_DAT 10 /* Create GOT entry. */
24#define R_390_JMP_SLOT 11 /* Create PLT entry. */
25#define R_390_RELATIVE 12 /* Adjust by program base. */
26#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
27#define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */
28#define R_390_GOT16 15 /* 16 bit GOT offset. */
29#define R_390_PC16 16 /* PC relative 16 bit. */
30#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */
31#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */
32#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */
33#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */
34#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */
35#define R_390_64 22 /* Direct 64 bit. */
36#define R_390_PC64 23 /* PC relative 64 bit. */
37#define R_390_GOT64 24 /* 64 bit GOT offset. */
38#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */
39#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */
40#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */
41#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */
42#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */
43#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */
44#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */
45#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */
46#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */
47#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */
48#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */
49#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
50#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */
51#define R_390_TLS_GDCALL 38 /* Tag for function call in general
52 dynamic TLS code. */
53#define R_390_TLS_LDCALL 39 /* Tag for function call in local
54 dynamic TLS code. */
55#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic
56 thread local data. */
57#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic
58 thread local data. */
59#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS
60 block offset. */
61#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS
62 block offset. */
63#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS
64 block offset. */
65#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic
66 thread local data in LD code. */
67#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic
68 thread local data in LD code. */
69#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for
70 negated static TLS block offset. */
71#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for
72 negated static TLS block offset. */
73#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for
74 negated static TLS block offset. */
75#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to
76 static TLS block. */
77#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to
78 static TLS block. */
79#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS
80 block. */
81#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS
82 block. */
83#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */
84#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */
85#define R_390_TLS_TPOFF 56 /* Negate offset in static TLS
86 block. */
87#define R_390_20 57 /* Direct 20 bit. */
88#define R_390_GOT20 58 /* 20 bit GOT offset. */
89#define R_390_GOTPLT20 59 /* 20 bit offset to jump slot. */
90#define R_390_TLS_GOTIE20 60 /* 20 bit GOT offset for static TLS
91 block offset. */
92/* Keep this the last entry. */
93#define R_390_NUM 61
94
95/*
96 * These are used to set parameters in the core dumps.
97 */
98#ifndef __s390x__
99#define ELF_CLASS ELFCLASS32
100#else /* __s390x__ */
101#define ELF_CLASS ELFCLASS64
102#endif /* __s390x__ */
103#define ELF_DATA ELFDATA2MSB
104#define ELF_ARCH EM_S390
105
106/*
107 * ELF register definitions..
108 */
109
110#include <asm/ptrace.h>
111#include <asm/user.h>
112
113typedef s390_fp_regs elf_fpregset_t;
114typedef s390_regs elf_gregset_t;
115
116typedef s390_fp_regs compat_elf_fpregset_t;
117typedef s390_compat_regs compat_elf_gregset_t;
118
119#include <linux/sched.h> /* for task_struct */
120#include <asm/system.h> /* for save_access_regs */
121#include <asm/mmu_context.h>
122
123/*
124 * This is used to ensure we don't load something for the wrong architecture.
125 */
126#define elf_check_arch(x) \
127 (((x)->e_machine == EM_S390 || (x)->e_machine == EM_S390_OLD) \
128 && (x)->e_ident[EI_CLASS] == ELF_CLASS)
129#define compat_elf_check_arch(x) \
130 (((x)->e_machine == EM_S390 || (x)->e_machine == EM_S390_OLD) \
131 && (x)->e_ident[EI_CLASS] == ELF_CLASS)
132#define compat_start_thread start_thread31
133
134/* For SVR4/S390 the function pointer to be registered with `atexit` is
135 passed in R14. */
136#define ELF_PLAT_INIT(_r, load_addr) \
137 do { \
138 _r->gprs[14] = 0; \
139 } while (0)
140
141#define CORE_DUMP_USE_REGSET
142#define USE_ELF_CORE_DUMP
143#define ELF_EXEC_PAGESIZE 4096
144
145/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
146 use of this is to invoke "./ld.so someprog" to test out a new version of
147 the loader. We need to make sure that it is out of the way of the program
148 that it will "exec", and that there is sufficient room for the brk. */
149#define ELF_ET_DYN_BASE (STACK_TOP / 3 * 2)
150
151/* This yields a mask that user programs can use to figure out what
152 instruction set this CPU supports. */
153
154extern unsigned long elf_hwcap;
155#define ELF_HWCAP (elf_hwcap)
156
157/* This yields a string that ld.so will use to load implementation
158 specific libraries for optimization. This is more specific in
159 intent than poking at uname or /proc/cpuinfo.
160
161 For the moment, we have only optimizations for the Intel generations,
162 but that could change... */
163
164#define ELF_PLATFORM_SIZE 8
165extern char elf_platform[];
166#define ELF_PLATFORM (elf_platform)
167
168#ifndef __s390x__
169#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
170#else /* __s390x__ */
171#define SET_PERSONALITY(ex, ibcs2) \
172do { \
173 if (ibcs2) \
174 set_personality(PER_SVR4); \
175 else if (current->personality != PER_LINUX32) \
176 set_personality(PER_LINUX); \
177 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
178 set_thread_flag(TIF_31BIT); \
179 else \
180 clear_thread_flag(TIF_31BIT); \
181} while (0)
182#endif /* __s390x__ */
183
184/*
185 * An executable for which elf_read_implies_exec() returns TRUE will
186 * have the READ_IMPLIES_EXEC personality flag set automatically.
187 */
188#define elf_read_implies_exec(ex, executable_stack) \
189({ \
190 if (current->mm->context.noexec && \
191 executable_stack != EXSTACK_DISABLE_X) \
192 disable_noexec(current->mm, current); \
193 current->mm->context.noexec == 0; \
194})
195
196#endif
diff --git a/include/asm-s390/emergency-restart.h b/include/asm-s390/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/include/asm-s390/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-s390/errno.h b/include/asm-s390/errno.h
deleted file mode 100644
index e41d5b37c4d6..000000000000
--- a/include/asm-s390/errno.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * include/asm-s390/errno.h
3 *
4 * S390 version
5 *
6 */
7
8#ifndef _S390_ERRNO_H
9#define _S390_ERRNO_H
10
11#include <asm-generic/errno.h>
12
13#endif
diff --git a/include/asm-s390/etr.h b/include/asm-s390/etr.h
deleted file mode 100644
index 80ef58c61970..000000000000
--- a/include/asm-s390/etr.h
+++ /dev/null
@@ -1,258 +0,0 @@
1/*
2 * include/asm-s390/etr.h
3 *
4 * Copyright IBM Corp. 2006
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
6 */
7#ifndef __S390_ETR_H
8#define __S390_ETR_H
9
10/* ETR attachment control register */
11struct etr_eacr {
12 unsigned int e0 : 1; /* port 0 stepping control */
13 unsigned int e1 : 1; /* port 1 stepping control */
14 unsigned int _pad0 : 5; /* must be 00100 */
15 unsigned int dp : 1; /* data port control */
16 unsigned int p0 : 1; /* port 0 change recognition control */
17 unsigned int p1 : 1; /* port 1 change recognition control */
18 unsigned int _pad1 : 3; /* must be 000 */
19 unsigned int ea : 1; /* ETR alert control */
20 unsigned int es : 1; /* ETR sync check control */
21 unsigned int sl : 1; /* switch to local control */
22} __attribute__ ((packed));
23
24/* Port state returned by steai */
25enum etr_psc {
26 etr_psc_operational = 0,
27 etr_psc_semi_operational = 1,
28 etr_psc_protocol_error = 4,
29 etr_psc_no_symbols = 8,
30 etr_psc_no_signal = 12,
31 etr_psc_pps_mode = 13
32};
33
34/* Logical port state returned by stetr */
35enum etr_lpsc {
36 etr_lpsc_operational_step = 0,
37 etr_lpsc_operational_alt = 1,
38 etr_lpsc_semi_operational = 2,
39 etr_lpsc_protocol_error = 4,
40 etr_lpsc_no_symbol_sync = 8,
41 etr_lpsc_no_signal = 12,
42 etr_lpsc_pps_mode = 13
43};
44
45/* ETR status words */
46struct etr_esw {
47 struct etr_eacr eacr; /* attachment control register */
48 unsigned int y : 1; /* stepping mode */
49 unsigned int _pad0 : 5; /* must be 00000 */
50 unsigned int p : 1; /* stepping port number */
51 unsigned int q : 1; /* data port number */
52 unsigned int psc0 : 4; /* port 0 state code */
53 unsigned int psc1 : 4; /* port 1 state code */
54} __attribute__ ((packed));
55
56/* Second level data register status word */
57struct etr_slsw {
58 unsigned int vv1 : 1; /* copy of validity bit data frame 1 */
59 unsigned int vv2 : 1; /* copy of validity bit data frame 2 */
60 unsigned int vv3 : 1; /* copy of validity bit data frame 3 */
61 unsigned int vv4 : 1; /* copy of validity bit data frame 4 */
62 unsigned int _pad0 : 19; /* must by all zeroes */
63 unsigned int n : 1; /* EAF port number */
64 unsigned int v1 : 1; /* validity bit ETR data frame 1 */
65 unsigned int v2 : 1; /* validity bit ETR data frame 2 */
66 unsigned int v3 : 1; /* validity bit ETR data frame 3 */
67 unsigned int v4 : 1; /* validity bit ETR data frame 4 */
68 unsigned int _pad1 : 4; /* must be 0000 */
69} __attribute__ ((packed));
70
71/* ETR data frames */
72struct etr_edf1 {
73 unsigned int u : 1; /* untuned bit */
74 unsigned int _pad0 : 1; /* must be 0 */
75 unsigned int r : 1; /* service request bit */
76 unsigned int _pad1 : 4; /* must be 0000 */
77 unsigned int a : 1; /* time adjustment bit */
78 unsigned int net_id : 8; /* ETR network id */
79 unsigned int etr_id : 8; /* id of ETR which sends data frames */
80 unsigned int etr_pn : 8; /* port number of ETR output port */
81} __attribute__ ((packed));
82
83struct etr_edf2 {
84 unsigned int etv : 32; /* Upper 32 bits of TOD. */
85} __attribute__ ((packed));
86
87struct etr_edf3 {
88 unsigned int rc : 8; /* failure reason code */
89 unsigned int _pad0 : 3; /* must be 000 */
90 unsigned int c : 1; /* ETR coupled bit */
91 unsigned int tc : 4; /* ETR type code */
92 unsigned int blto : 8; /* biased local time offset */
93 /* (blto - 128) * 15 = minutes */
94 unsigned int buo : 8; /* biased utc offset */
95 /* (buo - 128) = leap seconds */
96} __attribute__ ((packed));
97
98struct etr_edf4 {
99 unsigned int ed : 8; /* ETS device dependent data */
100 unsigned int _pad0 : 1; /* must be 0 */
101 unsigned int buc : 5; /* biased ut1 correction */
102 /* (buc - 16) * 0.1 seconds */
103 unsigned int em : 6; /* ETS error magnitude */
104 unsigned int dc : 6; /* ETS drift code */
105 unsigned int sc : 6; /* ETS steering code */
106} __attribute__ ((packed));
107
108/*
109 * ETR attachment information block, two formats
110 * format 1 has 4 reserved words with a size of 64 bytes
111 * format 2 has 16 reserved words with a size of 96 bytes
112 */
113struct etr_aib {
114 struct etr_esw esw;
115 struct etr_slsw slsw;
116 unsigned long long tsp;
117 struct etr_edf1 edf1;
118 struct etr_edf2 edf2;
119 struct etr_edf3 edf3;
120 struct etr_edf4 edf4;
121 unsigned int reserved[16];
122} __attribute__ ((packed,aligned(8)));
123
124/* ETR interruption parameter */
125struct etr_irq_parm {
126 unsigned int _pad0 : 8;
127 unsigned int pc0 : 1; /* port 0 state change */
128 unsigned int pc1 : 1; /* port 1 state change */
129 unsigned int _pad1 : 3;
130 unsigned int eai : 1; /* ETR alert indication */
131 unsigned int _pad2 : 18;
132} __attribute__ ((packed));
133
134/* Query TOD offset result */
135struct etr_ptff_qto {
136 unsigned long long physical_clock;
137 unsigned long long tod_offset;
138 unsigned long long logical_tod_offset;
139 unsigned long long tod_epoch_difference;
140} __attribute__ ((packed));
141
142/* Inline assembly helper functions */
143static inline int etr_setr(struct etr_eacr *ctrl)
144{
145 int rc = -ENOSYS;
146
147 asm volatile(
148 " .insn s,0xb2160000,0(%2)\n"
149 "0: la %0,0\n"
150 "1:\n"
151 EX_TABLE(0b,1b)
152 : "+d" (rc) : "m" (*ctrl), "a" (ctrl));
153 return rc;
154}
155
156/* Stores a format 1 aib with 64 bytes */
157static inline int etr_stetr(struct etr_aib *aib)
158{
159 int rc = -ENOSYS;
160
161 asm volatile(
162 " .insn s,0xb2170000,0(%2)\n"
163 "0: la %0,0\n"
164 "1:\n"
165 EX_TABLE(0b,1b)
166 : "+d" (rc) : "m" (*aib), "a" (aib));
167 return rc;
168}
169
170/* Stores a format 2 aib with 96 bytes for specified port */
171static inline int etr_steai(struct etr_aib *aib, unsigned int func)
172{
173 register unsigned int reg0 asm("0") = func;
174 int rc = -ENOSYS;
175
176 asm volatile(
177 " .insn s,0xb2b30000,0(%2)\n"
178 "0: la %0,0\n"
179 "1:\n"
180 EX_TABLE(0b,1b)
181 : "+d" (rc) : "m" (*aib), "a" (aib), "d" (reg0));
182 return rc;
183}
184
185/* Function codes for the steai instruction. */
186#define ETR_STEAI_STEPPING_PORT 0x10
187#define ETR_STEAI_ALTERNATE_PORT 0x11
188#define ETR_STEAI_PORT_0 0x12
189#define ETR_STEAI_PORT_1 0x13
190
191static inline int etr_ptff(void *ptff_block, unsigned int func)
192{
193 register unsigned int reg0 asm("0") = func;
194 register unsigned long reg1 asm("1") = (unsigned long) ptff_block;
195 int rc = -ENOSYS;
196
197 asm volatile(
198 " .word 0x0104\n"
199 " ipm %0\n"
200 " srl %0,28\n"
201 : "=d" (rc), "=m" (ptff_block)
202 : "d" (reg0), "d" (reg1), "m" (ptff_block) : "cc");
203 return rc;
204}
205
206/* Function codes for the ptff instruction. */
207#define ETR_PTFF_QAF 0x00 /* query available functions */
208#define ETR_PTFF_QTO 0x01 /* query tod offset */
209#define ETR_PTFF_QSI 0x02 /* query steering information */
210#define ETR_PTFF_ATO 0x40 /* adjust tod offset */
211#define ETR_PTFF_STO 0x41 /* set tod offset */
212#define ETR_PTFF_SFS 0x42 /* set fine steering rate */
213#define ETR_PTFF_SGS 0x43 /* set gross steering rate */
214
215/* Functions needed by the machine check handler */
216void etr_switch_to_local(void);
217void etr_sync_check(void);
218
219/* STP interruption parameter */
220struct stp_irq_parm {
221 unsigned int _pad0 : 14;
222 unsigned int tsc : 1; /* Timing status change */
223 unsigned int lac : 1; /* Link availability change */
224 unsigned int tcpc : 1; /* Time control parameter change */
225 unsigned int _pad2 : 15;
226} __attribute__ ((packed));
227
228#define STP_OP_SYNC 1
229#define STP_OP_CTRL 3
230
231struct stp_sstpi {
232 unsigned int rsvd0;
233 unsigned int rsvd1 : 8;
234 unsigned int stratum : 8;
235 unsigned int vbits : 16;
236 unsigned int leaps : 16;
237 unsigned int tmd : 4;
238 unsigned int ctn : 4;
239 unsigned int rsvd2 : 3;
240 unsigned int c : 1;
241 unsigned int tst : 4;
242 unsigned int tzo : 16;
243 unsigned int dsto : 16;
244 unsigned int ctrl : 16;
245 unsigned int rsvd3 : 16;
246 unsigned int tto;
247 unsigned int rsvd4;
248 unsigned int ctnid[3];
249 unsigned int rsvd5;
250 unsigned int todoff[4];
251 unsigned int rsvd6[48];
252} __attribute__ ((packed));
253
254/* Functions needed by the machine check handler */
255void stp_sync_check(void);
256void stp_island_check(void);
257
258#endif /* __S390_ETR_H */
diff --git a/include/asm-s390/extmem.h b/include/asm-s390/extmem.h
deleted file mode 100644
index 33837d756184..000000000000
--- a/include/asm-s390/extmem.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * include/asm-s390x/extmem.h
3 *
4 * definitions for external memory segment support
5 * Copyright (C) 2003 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 */
7
8#ifndef _ASM_S390X_DCSS_H
9#define _ASM_S390X_DCSS_H
10#ifndef __ASSEMBLY__
11
12/* possible values for segment type as returned by segment_info */
13#define SEG_TYPE_SW 0
14#define SEG_TYPE_EW 1
15#define SEG_TYPE_SR 2
16#define SEG_TYPE_ER 3
17#define SEG_TYPE_SN 4
18#define SEG_TYPE_EN 5
19#define SEG_TYPE_SC 6
20#define SEG_TYPE_EWEN 7
21
22#define SEGMENT_SHARED 0
23#define SEGMENT_EXCLUSIVE 1
24
25int segment_load (char *name, int segtype, unsigned long *addr, unsigned long *length);
26void segment_unload(char *name);
27void segment_save(char *name);
28int segment_type (char* name);
29int segment_modify_shared (char *name, int do_nonshared);
30void segment_warning(int rc, char *seg_name);
31
32#endif
33#endif
diff --git a/include/asm-s390/fb.h b/include/asm-s390/fb.h
deleted file mode 100644
index c7df38030992..000000000000
--- a/include/asm-s390/fb.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3#include <linux/fb.h>
4
5#define fb_pgprotect(...) do {} while (0)
6
7static inline int fb_is_primary_device(struct fb_info *info)
8{
9 return 0;
10}
11
12#endif /* _ASM_FB_H_ */
diff --git a/include/asm-s390/fcntl.h b/include/asm-s390/fcntl.h
deleted file mode 100644
index 46ab12db5739..000000000000
--- a/include/asm-s390/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/fcntl.h>
diff --git a/include/asm-s390/fcx.h b/include/asm-s390/fcx.h
deleted file mode 100644
index 8be1f3a58042..000000000000
--- a/include/asm-s390/fcx.h
+++ /dev/null
@@ -1,311 +0,0 @@
1/*
2 * Functions for assembling fcx enabled I/O control blocks.
3 *
4 * Copyright IBM Corp. 2008
5 * Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_FCX_H
9#define _ASM_S390_FCX_H _ASM_S390_FCX_H
10
11#include <linux/types.h>
12
13#define TCW_FORMAT_DEFAULT 0
14#define TCW_TIDAW_FORMAT_DEFAULT 0
15#define TCW_FLAGS_INPUT_TIDA 1 << (23 - 5)
16#define TCW_FLAGS_TCCB_TIDA 1 << (23 - 6)
17#define TCW_FLAGS_OUTPUT_TIDA 1 << (23 - 7)
18#define TCW_FLAGS_TIDAW_FORMAT(x) ((x) & 3) << (23 - 9)
19#define TCW_FLAGS_GET_TIDAW_FORMAT(x) (((x) >> (23 - 9)) & 3)
20
21/**
22 * struct tcw - Transport Control Word (TCW)
23 * @format: TCW format
24 * @flags: TCW flags
25 * @tccbl: Transport-Command-Control-Block Length
26 * @r: Read Operations
27 * @w: Write Operations
28 * @output: Output-Data Address
29 * @input: Input-Data Address
30 * @tsb: Transport-Status-Block Address
31 * @tccb: Transport-Command-Control-Block Address
32 * @output_count: Output Count
33 * @input_count: Input Count
34 * @intrg: Interrogate TCW Address
35 */
36struct tcw {
37 u32 format:2;
38 u32 :6;
39 u32 flags:24;
40 u32 :8;
41 u32 tccbl:6;
42 u32 r:1;
43 u32 w:1;
44 u32 :16;
45 u64 output;
46 u64 input;
47 u64 tsb;
48 u64 tccb;
49 u32 output_count;
50 u32 input_count;
51 u32 :32;
52 u32 :32;
53 u32 :32;
54 u32 intrg;
55} __attribute__ ((packed, aligned(64)));
56
57#define TIDAW_FLAGS_LAST 1 << (7 - 0)
58#define TIDAW_FLAGS_SKIP 1 << (7 - 1)
59#define TIDAW_FLAGS_DATA_INT 1 << (7 - 2)
60#define TIDAW_FLAGS_TTIC 1 << (7 - 3)
61#define TIDAW_FLAGS_INSERT_CBC 1 << (7 - 4)
62
63/**
64 * struct tidaw - Transport-Indirect-Addressing Word (TIDAW)
65 * @flags: TIDAW flags. Can be an arithmetic OR of the following constants:
66 * %TIDAW_FLAGS_LAST, %TIDAW_FLAGS_SKIP, %TIDAW_FLAGS_DATA_INT,
67 * %TIDAW_FLAGS_TTIC, %TIDAW_FLAGS_INSERT_CBC
68 * @count: Count
69 * @addr: Address
70 */
71struct tidaw {
72 u32 flags:8;
73 u32 :24;
74 u32 count;
75 u64 addr;
76} __attribute__ ((packed, aligned(16)));
77
78/**
79 * struct tsa_iostat - I/O-Status Transport-Status Area (IO-Stat TSA)
80 * @dev_time: Device Time
81 * @def_time: Defer Time
82 * @queue_time: Queue Time
83 * @dev_busy_time: Device-Busy Time
84 * @dev_act_time: Device-Active-Only Time
85 * @sense: Sense Data (if present)
86 */
87struct tsa_iostat {
88 u32 dev_time;
89 u32 def_time;
90 u32 queue_time;
91 u32 dev_busy_time;
92 u32 dev_act_time;
93 u8 sense[32];
94} __attribute__ ((packed));
95
96/**
97 * struct tsa_ddpcs - Device-Detected-Program-Check Transport-Status Area (DDPC TSA)
98 * @rc: Reason Code
99 * @rcq: Reason Code Qualifier
100 * @sense: Sense Data (if present)
101 */
102struct tsa_ddpc {
103 u32 :24;
104 u32 rc:8;
105 u8 rcq[16];
106 u8 sense[32];
107} __attribute__ ((packed));
108
109#define TSA_INTRG_FLAGS_CU_STATE_VALID 1 << (7 - 0)
110#define TSA_INTRG_FLAGS_DEV_STATE_VALID 1 << (7 - 1)
111#define TSA_INTRG_FLAGS_OP_STATE_VALID 1 << (7 - 2)
112
113/**
114 * struct tsa_intrg - Interrogate Transport-Status Area (Intrg. TSA)
115 * @format: Format
116 * @flags: Flags. Can be an arithmetic OR of the following constants:
117 * %TSA_INTRG_FLAGS_CU_STATE_VALID, %TSA_INTRG_FLAGS_DEV_STATE_VALID,
118 * %TSA_INTRG_FLAGS_OP_STATE_VALID
119 * @cu_state: Controle-Unit State
120 * @dev_state: Device State
121 * @op_state: Operation State
122 * @sd_info: State-Dependent Information
123 * @dl_id: Device-Level Identifier
124 * @dd_data: Device-Dependent Data
125 */
126struct tsa_intrg {
127 u32 format:8;
128 u32 flags:8;
129 u32 cu_state:8;
130 u32 dev_state:8;
131 u32 op_state:8;
132 u32 :24;
133 u8 sd_info[12];
134 u32 dl_id;
135 u8 dd_data[28];
136} __attribute__ ((packed));
137
138#define TSB_FORMAT_NONE 0
139#define TSB_FORMAT_IOSTAT 1
140#define TSB_FORMAT_DDPC 2
141#define TSB_FORMAT_INTRG 3
142
143#define TSB_FLAGS_DCW_OFFSET_VALID 1 << (7 - 0)
144#define TSB_FLAGS_COUNT_VALID 1 << (7 - 1)
145#define TSB_FLAGS_CACHE_MISS 1 << (7 - 2)
146#define TSB_FLAGS_TIME_VALID 1 << (7 - 3)
147#define TSB_FLAGS_FORMAT(x) ((x) & 7)
148#define TSB_FORMAT(t) ((t)->flags & 7)
149
150/**
151 * struct tsb - Transport-Status Block (TSB)
152 * @length: Length
153 * @flags: Flags. Can be an arithmetic OR of the following constants:
154 * %TSB_FLAGS_DCW_OFFSET_VALID, %TSB_FLAGS_COUNT_VALID, %TSB_FLAGS_CACHE_MISS,
155 * %TSB_FLAGS_TIME_VALID
156 * @dcw_offset: DCW Offset
157 * @count: Count
158 * @tsa: Transport-Status-Area
159 */
160struct tsb {
161 u32 length:8;
162 u32 flags:8;
163 u32 dcw_offset:16;
164 u32 count;
165 u32 :32;
166 union {
167 struct tsa_iostat iostat;
168 struct tsa_ddpc ddpc;
169 struct tsa_intrg intrg;
170 } __attribute__ ((packed)) tsa;
171} __attribute__ ((packed, aligned(8)));
172
173#define DCW_INTRG_FORMAT_DEFAULT 0
174
175#define DCW_INTRG_RC_UNSPECIFIED 0
176#define DCW_INTRG_RC_TIMEOUT 1
177
178#define DCW_INTRG_RCQ_UNSPECIFIED 0
179#define DCW_INTRG_RCQ_PRIMARY 1
180#define DCW_INTRG_RCQ_SECONDARY 2
181
182#define DCW_INTRG_FLAGS_MPM 1 < (7 - 0)
183#define DCW_INTRG_FLAGS_PPR 1 < (7 - 1)
184#define DCW_INTRG_FLAGS_CRIT 1 < (7 - 2)
185
186/**
187 * struct dcw_intrg_data - Interrogate DCW data
188 * @format: Format. Should be %DCW_INTRG_FORMAT_DEFAULT
189 * @rc: Reason Code. Can be one of %DCW_INTRG_RC_UNSPECIFIED,
190 * %DCW_INTRG_RC_TIMEOUT
191 * @rcq: Reason Code Qualifier: Can be one of %DCW_INTRG_RCQ_UNSPECIFIED,
192 * %DCW_INTRG_RCQ_PRIMARY, %DCW_INTRG_RCQ_SECONDARY
193 * @lpm: Logical-Path Mask
194 * @pam: Path-Available Mask
195 * @pim: Path-Installed Mask
196 * @timeout: Timeout
197 * @flags: Flags. Can be an arithmetic OR of %DCW_INTRG_FLAGS_MPM,
198 * %DCW_INTRG_FLAGS_PPR, %DCW_INTRG_FLAGS_CRIT
199 * @time: Time
200 * @prog_id: Program Identifier
201 * @prog_data: Program-Dependent Data
202 */
203struct dcw_intrg_data {
204 u32 format:8;
205 u32 rc:8;
206 u32 rcq:8;
207 u32 lpm:8;
208 u32 pam:8;
209 u32 pim:8;
210 u32 timeout:16;
211 u32 flags:8;
212 u32 :24;
213 u32 :32;
214 u64 time;
215 u64 prog_id;
216 u8 prog_data[0];
217} __attribute__ ((packed));
218
219#define DCW_FLAGS_CC 1 << (7 - 1)
220
221#define DCW_CMD_WRITE 0x01
222#define DCW_CMD_READ 0x02
223#define DCW_CMD_CONTROL 0x03
224#define DCW_CMD_SENSE 0x04
225#define DCW_CMD_SENSE_ID 0xe4
226#define DCW_CMD_INTRG 0x40
227
228/**
229 * struct dcw - Device-Command Word (DCW)
230 * @cmd: Command Code. Can be one of %DCW_CMD_WRITE, %DCW_CMD_READ,
231 * %DCW_CMD_CONTROL, %DCW_CMD_SENSE, %DCW_CMD_SENSE_ID, %DCW_CMD_INTRG
232 * @flags: Flags. Can be an arithmetic OR of %DCW_FLAGS_CC
233 * @cd_count: Control-Data Count
234 * @count: Count
235 * @cd: Control Data
236 */
237struct dcw {
238 u32 cmd:8;
239 u32 flags:8;
240 u32 :8;
241 u32 cd_count:8;
242 u32 count;
243 u8 cd[0];
244} __attribute__ ((packed));
245
246#define TCCB_FORMAT_DEFAULT 0x7f
247#define TCCB_MAX_DCW 30
248#define TCCB_MAX_SIZE (sizeof(struct tccb_tcah) + \
249 TCCB_MAX_DCW * sizeof(struct dcw) + \
250 sizeof(struct tccb_tcat))
251#define TCCB_SAC_DEFAULT 0xf901
252#define TCCB_SAC_INTRG 0xf902
253
254/**
255 * struct tccb_tcah - Transport-Command-Area Header (TCAH)
256 * @format: Format. Should be %TCCB_FORMAT_DEFAULT
257 * @tcal: Transport-Command-Area Length
258 * @sac: Service-Action Code. Can be one of %TCCB_SAC_DEFAULT, %TCCB_SAC_INTRG
259 * @prio: Priority
260 */
261struct tccb_tcah {
262 u32 format:8;
263 u32 :24;
264 u32 :24;
265 u32 tcal:8;
266 u32 sac:16;
267 u32 :8;
268 u32 prio:8;
269 u32 :32;
270} __attribute__ ((packed));
271
272/**
273 * struct tccb_tcat - Transport-Command-Area Trailer (TCAT)
274 * @count: Transport Count
275 */
276struct tccb_tcat {
277 u32 :32;
278 u32 count;
279} __attribute__ ((packed));
280
281/**
282 * struct tccb - (partial) Transport-Command-Control Block (TCCB)
283 * @tcah: TCAH
284 * @tca: Transport-Command Area
285 */
286struct tccb {
287 struct tccb_tcah tcah;
288 u8 tca[0];
289} __attribute__ ((packed, aligned(8)));
290
291struct tcw *tcw_get_intrg(struct tcw *tcw);
292void *tcw_get_data(struct tcw *tcw);
293struct tccb *tcw_get_tccb(struct tcw *tcw);
294struct tsb *tcw_get_tsb(struct tcw *tcw);
295
296void tcw_init(struct tcw *tcw, int r, int w);
297void tcw_finalize(struct tcw *tcw, int num_tidaws);
298
299void tcw_set_intrg(struct tcw *tcw, struct tcw *intrg_tcw);
300void tcw_set_data(struct tcw *tcw, void *data, int use_tidal);
301void tcw_set_tccb(struct tcw *tcw, struct tccb *tccb);
302void tcw_set_tsb(struct tcw *tcw, struct tsb *tsb);
303
304void tccb_init(struct tccb *tccb, size_t tccb_size, u32 sac);
305void tsb_init(struct tsb *tsb);
306struct dcw *tccb_add_dcw(struct tccb *tccb, size_t tccb_size, u8 cmd, u8 flags,
307 void *cd, u8 cd_count, u32 count);
308struct tidaw *tcw_add_tidaw(struct tcw *tcw, int num_tidaws, u8 flags,
309 void *addr, u32 count);
310
311#endif /* _ASM_S390_FCX_H */
diff --git a/include/asm-s390/futex.h b/include/asm-s390/futex.h
deleted file mode 100644
index 5c5d02de49e9..000000000000
--- a/include/asm-s390/futex.h
+++ /dev/null
@@ -1,52 +0,0 @@
1#ifndef _ASM_S390_FUTEX_H
2#define _ASM_S390_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <linux/uaccess.h>
8#include <asm/errno.h>
9
10static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
11{
12 int op = (encoded_op >> 28) & 7;
13 int cmp = (encoded_op >> 24) & 15;
14 int oparg = (encoded_op << 8) >> 20;
15 int cmparg = (encoded_op << 20) >> 20;
16 int oldval, ret;
17
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg;
20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
22 return -EFAULT;
23
24 pagefault_disable();
25 ret = uaccess.futex_atomic_op(op, uaddr, oparg, &oldval);
26 pagefault_enable();
27
28 if (!ret) {
29 switch (cmp) {
30 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
31 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
32 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
33 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
34 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
35 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
36 default: ret = -ENOSYS;
37 }
38 }
39 return ret;
40}
41
42static inline int futex_atomic_cmpxchg_inatomic(int __user *uaddr,
43 int oldval, int newval)
44{
45 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
46 return -EFAULT;
47
48 return uaccess.futex_atomic_cmpxchg(uaddr, oldval, newval);
49}
50
51#endif /* __KERNEL__ */
52#endif /* _ASM_S390_FUTEX_H */
diff --git a/include/asm-s390/hardirq.h b/include/asm-s390/hardirq.h
deleted file mode 100644
index 89ec7056da28..000000000000
--- a/include/asm-s390/hardirq.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * include/asm-s390/hardirq.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
8 *
9 * Derived from "include/asm-i386/hardirq.h"
10 */
11
12#ifndef __ASM_HARDIRQ_H
13#define __ASM_HARDIRQ_H
14
15#include <linux/threads.h>
16#include <linux/sched.h>
17#include <linux/cache.h>
18#include <linux/interrupt.h>
19#include <asm/lowcore.h>
20
21/* irq_cpustat_t is unused currently, but could be converted
22 * into a percpu variable instead of storing softirq_pending
23 * on the lowcore */
24typedef struct {
25 unsigned int __softirq_pending;
26} irq_cpustat_t;
27
28#define local_softirq_pending() (S390_lowcore.softirq_pending)
29
30#define __ARCH_IRQ_STAT
31#define __ARCH_HAS_DO_SOFTIRQ
32
33#define HARDIRQ_BITS 8
34
35void clock_comparator_work(void);
36
37static inline unsigned long long local_tick_disable(void)
38{
39 unsigned long long old;
40
41 old = S390_lowcore.clock_comparator;
42 S390_lowcore.clock_comparator = -1ULL;
43 return old;
44}
45
46static inline void local_tick_enable(unsigned long long comp)
47{
48 S390_lowcore.clock_comparator = comp;
49}
50
51#endif /* __ASM_HARDIRQ_H */
diff --git a/include/asm-s390/hugetlb.h b/include/asm-s390/hugetlb.h
deleted file mode 100644
index 670a1d1745d2..000000000000
--- a/include/asm-s390/hugetlb.h
+++ /dev/null
@@ -1,184 +0,0 @@
1/*
2 * IBM System z Huge TLB Page Support for Kernel.
3 *
4 * Copyright IBM Corp. 2008
5 * Author(s): Gerald Schaefer <gerald.schaefer@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_HUGETLB_H
9#define _ASM_S390_HUGETLB_H
10
11#include <asm/page.h>
12#include <asm/pgtable.h>
13
14
15#define is_hugepage_only_range(mm, addr, len) 0
16#define hugetlb_free_pgd_range free_pgd_range
17
18void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
19 pte_t *ptep, pte_t pte);
20
21/*
22 * If the arch doesn't supply something else, assume that hugepage
23 * size aligned regions are ok without further preparation.
24 */
25static inline int prepare_hugepage_range(struct file *file,
26 unsigned long addr, unsigned long len)
27{
28 if (len & ~HPAGE_MASK)
29 return -EINVAL;
30 if (addr & ~HPAGE_MASK)
31 return -EINVAL;
32 return 0;
33}
34
35#define hugetlb_prefault_arch_hook(mm) do { } while (0)
36
37int arch_prepare_hugepage(struct page *page);
38void arch_release_hugepage(struct page *page);
39
40static inline pte_t pte_mkhuge(pte_t pte)
41{
42 /*
43 * PROT_NONE needs to be remapped from the pte type to the ste type.
44 * The HW invalid bit is also different for pte and ste. The pte
45 * invalid bit happens to be the same as the ste _SEGMENT_ENTRY_LARGE
46 * bit, so we don't have to clear it.
47 */
48 if (pte_val(pte) & _PAGE_INVALID) {
49 if (pte_val(pte) & _PAGE_SWT)
50 pte_val(pte) |= _HPAGE_TYPE_NONE;
51 pte_val(pte) |= _SEGMENT_ENTRY_INV;
52 }
53 /*
54 * Clear SW pte bits SWT and SWX, there are no SW bits in a segment
55 * table entry.
56 */
57 pte_val(pte) &= ~(_PAGE_SWT | _PAGE_SWX);
58 /*
59 * Also set the change-override bit because we don't need dirty bit
60 * tracking for hugetlbfs pages.
61 */
62 pte_val(pte) |= (_SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_CO);
63 return pte;
64}
65
66static inline pte_t huge_pte_wrprotect(pte_t pte)
67{
68 pte_val(pte) |= _PAGE_RO;
69 return pte;
70}
71
72static inline int huge_pte_none(pte_t pte)
73{
74 return (pte_val(pte) & _SEGMENT_ENTRY_INV) &&
75 !(pte_val(pte) & _SEGMENT_ENTRY_RO);
76}
77
78static inline pte_t huge_ptep_get(pte_t *ptep)
79{
80 pte_t pte = *ptep;
81 unsigned long mask;
82
83 if (!MACHINE_HAS_HPAGE) {
84 ptep = (pte_t *) (pte_val(pte) & _SEGMENT_ENTRY_ORIGIN);
85 if (ptep) {
86 mask = pte_val(pte) &
87 (_SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO);
88 pte = pte_mkhuge(*ptep);
89 pte_val(pte) |= mask;
90 }
91 }
92 return pte;
93}
94
95static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
96 unsigned long addr, pte_t *ptep)
97{
98 pte_t pte = huge_ptep_get(ptep);
99
100 pmd_clear((pmd_t *) ptep);
101 return pte;
102}
103
104static inline void __pmd_csp(pmd_t *pmdp)
105{
106 register unsigned long reg2 asm("2") = pmd_val(*pmdp);
107 register unsigned long reg3 asm("3") = pmd_val(*pmdp) |
108 _SEGMENT_ENTRY_INV;
109 register unsigned long reg4 asm("4") = ((unsigned long) pmdp) + 5;
110
111 asm volatile(
112 " csp %1,%3"
113 : "=m" (*pmdp)
114 : "d" (reg2), "d" (reg3), "d" (reg4), "m" (*pmdp) : "cc");
115 pmd_val(*pmdp) = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY;
116}
117
118static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
119{
120 unsigned long sto = (unsigned long) pmdp -
121 pmd_index(address) * sizeof(pmd_t);
122
123 if (!(pmd_val(*pmdp) & _SEGMENT_ENTRY_INV)) {
124 asm volatile(
125 " .insn rrf,0xb98e0000,%2,%3,0,0"
126 : "=m" (*pmdp)
127 : "m" (*pmdp), "a" (sto),
128 "a" ((address & HPAGE_MASK))
129 );
130 }
131 pmd_val(*pmdp) = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY;
132}
133
134static inline void huge_ptep_invalidate(struct mm_struct *mm,
135 unsigned long address, pte_t *ptep)
136{
137 pmd_t *pmdp = (pmd_t *) ptep;
138
139 if (!MACHINE_HAS_IDTE) {
140 __pmd_csp(pmdp);
141 if (mm->context.noexec) {
142 pmdp = get_shadow_table(pmdp);
143 __pmd_csp(pmdp);
144 }
145 return;
146 }
147
148 __pmd_idte(address, pmdp);
149 if (mm->context.noexec) {
150 pmdp = get_shadow_table(pmdp);
151 __pmd_idte(address, pmdp);
152 }
153 return;
154}
155
156#define huge_ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \
157({ \
158 int __changed = !pte_same(huge_ptep_get(__ptep), __entry); \
159 if (__changed) { \
160 huge_ptep_invalidate((__vma)->vm_mm, __addr, __ptep); \
161 set_huge_pte_at((__vma)->vm_mm, __addr, __ptep, __entry); \
162 } \
163 __changed; \
164})
165
166#define huge_ptep_set_wrprotect(__mm, __addr, __ptep) \
167({ \
168 pte_t __pte = huge_ptep_get(__ptep); \
169 if (pte_write(__pte)) { \
170 if (atomic_read(&(__mm)->mm_users) > 1 || \
171 (__mm) != current->active_mm) \
172 huge_ptep_invalidate(__mm, __addr, __ptep); \
173 set_huge_pte_at(__mm, __addr, __ptep, \
174 huge_pte_wrprotect(__pte)); \
175 } \
176})
177
178static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
179 unsigned long address, pte_t *ptep)
180{
181 huge_ptep_invalidate(vma->vm_mm, address, ptep);
182}
183
184#endif /* _ASM_S390_HUGETLB_H */
diff --git a/include/asm-s390/idals.h b/include/asm-s390/idals.h
deleted file mode 100644
index e82c10efe65a..000000000000
--- a/include/asm-s390/idals.h
+++ /dev/null
@@ -1,256 +0,0 @@
1/*
2 * File...........: linux/include/asm-s390x/idals.h
3 * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com>
4 * Martin Schwidefsky <schwidefsky@de.ibm.com>
5 * Bugreports.to..: <Linux390@de.ibm.com>
6 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 2000a
7
8 * History of changes
9 * 07/24/00 new file
10 * 05/04/02 code restructuring.
11 */
12
13#ifndef _S390_IDALS_H
14#define _S390_IDALS_H
15
16#include <linux/errno.h>
17#include <linux/err.h>
18#include <linux/types.h>
19#include <linux/slab.h>
20#include <asm/cio.h>
21#include <asm/uaccess.h>
22
23#ifdef __s390x__
24#define IDA_SIZE_LOG 12 /* 11 for 2k , 12 for 4k */
25#else
26#define IDA_SIZE_LOG 11 /* 11 for 2k , 12 for 4k */
27#endif
28#define IDA_BLOCK_SIZE (1L<<IDA_SIZE_LOG)
29
30/*
31 * Test if an address/length pair needs an idal list.
32 */
33static inline int
34idal_is_needed(void *vaddr, unsigned int length)
35{
36#ifdef __s390x__
37 return ((__pa(vaddr) + length - 1) >> 31) != 0;
38#else
39 return 0;
40#endif
41}
42
43
44/*
45 * Return the number of idal words needed for an address/length pair.
46 */
47static inline unsigned int
48idal_nr_words(void *vaddr, unsigned int length)
49{
50#ifdef __s390x__
51 if (idal_is_needed(vaddr, length))
52 return ((__pa(vaddr) & (IDA_BLOCK_SIZE-1)) + length +
53 (IDA_BLOCK_SIZE-1)) >> IDA_SIZE_LOG;
54#endif
55 return 0;
56}
57
58/*
59 * Create the list of idal words for an address/length pair.
60 */
61static inline unsigned long *
62idal_create_words(unsigned long *idaws, void *vaddr, unsigned int length)
63{
64#ifdef __s390x__
65 unsigned long paddr;
66 unsigned int cidaw;
67
68 paddr = __pa(vaddr);
69 cidaw = ((paddr & (IDA_BLOCK_SIZE-1)) + length +
70 (IDA_BLOCK_SIZE-1)) >> IDA_SIZE_LOG;
71 *idaws++ = paddr;
72 paddr &= -IDA_BLOCK_SIZE;
73 while (--cidaw > 0) {
74 paddr += IDA_BLOCK_SIZE;
75 *idaws++ = paddr;
76 }
77#endif
78 return idaws;
79}
80
81/*
82 * Sets the address of the data in CCW.
83 * If necessary it allocates an IDAL and sets the appropriate flags.
84 */
85static inline int
86set_normalized_cda(struct ccw1 * ccw, void *vaddr)
87{
88#ifdef __s390x__
89 unsigned int nridaws;
90 unsigned long *idal;
91
92 if (ccw->flags & CCW_FLAG_IDA)
93 return -EINVAL;
94 nridaws = idal_nr_words(vaddr, ccw->count);
95 if (nridaws > 0) {
96 idal = kmalloc(nridaws * sizeof(unsigned long),
97 GFP_ATOMIC | GFP_DMA );
98 if (idal == NULL)
99 return -ENOMEM;
100 idal_create_words(idal, vaddr, ccw->count);
101 ccw->flags |= CCW_FLAG_IDA;
102 vaddr = idal;
103 }
104#endif
105 ccw->cda = (__u32)(unsigned long) vaddr;
106 return 0;
107}
108
109/*
110 * Releases any allocated IDAL related to the CCW.
111 */
112static inline void
113clear_normalized_cda(struct ccw1 * ccw)
114{
115#ifdef __s390x__
116 if (ccw->flags & CCW_FLAG_IDA) {
117 kfree((void *)(unsigned long) ccw->cda);
118 ccw->flags &= ~CCW_FLAG_IDA;
119 }
120#endif
121 ccw->cda = 0;
122}
123
124/*
125 * Idal buffer extension
126 */
127struct idal_buffer {
128 size_t size;
129 size_t page_order;
130 void *data[0];
131};
132
133/*
134 * Allocate an idal buffer
135 */
136static inline struct idal_buffer *
137idal_buffer_alloc(size_t size, int page_order)
138{
139 struct idal_buffer *ib;
140 int nr_chunks, nr_ptrs, i;
141
142 nr_ptrs = (size + IDA_BLOCK_SIZE - 1) >> IDA_SIZE_LOG;
143 nr_chunks = (4096 << page_order) >> IDA_SIZE_LOG;
144 ib = kmalloc(sizeof(struct idal_buffer) + nr_ptrs*sizeof(void *),
145 GFP_DMA | GFP_KERNEL);
146 if (ib == NULL)
147 return ERR_PTR(-ENOMEM);
148 ib->size = size;
149 ib->page_order = page_order;
150 for (i = 0; i < nr_ptrs; i++) {
151 if ((i & (nr_chunks - 1)) != 0) {
152 ib->data[i] = ib->data[i-1] + IDA_BLOCK_SIZE;
153 continue;
154 }
155 ib->data[i] = (void *)
156 __get_free_pages(GFP_KERNEL, page_order);
157 if (ib->data[i] != NULL)
158 continue;
159 // Not enough memory
160 while (i >= nr_chunks) {
161 i -= nr_chunks;
162 free_pages((unsigned long) ib->data[i],
163 ib->page_order);
164 }
165 kfree(ib);
166 return ERR_PTR(-ENOMEM);
167 }
168 return ib;
169}
170
171/*
172 * Free an idal buffer.
173 */
174static inline void
175idal_buffer_free(struct idal_buffer *ib)
176{
177 int nr_chunks, nr_ptrs, i;
178
179 nr_ptrs = (ib->size + IDA_BLOCK_SIZE - 1) >> IDA_SIZE_LOG;
180 nr_chunks = (4096 << ib->page_order) >> IDA_SIZE_LOG;
181 for (i = 0; i < nr_ptrs; i += nr_chunks)
182 free_pages((unsigned long) ib->data[i], ib->page_order);
183 kfree(ib);
184}
185
186/*
187 * Test if a idal list is really needed.
188 */
189static inline int
190__idal_buffer_is_needed(struct idal_buffer *ib)
191{
192#ifdef __s390x__
193 return ib->size > (4096ul << ib->page_order) ||
194 idal_is_needed(ib->data[0], ib->size);
195#else
196 return ib->size > (4096ul << ib->page_order);
197#endif
198}
199
200/*
201 * Set channel data address to idal buffer.
202 */
203static inline void
204idal_buffer_set_cda(struct idal_buffer *ib, struct ccw1 *ccw)
205{
206 if (__idal_buffer_is_needed(ib)) {
207 // setup idals;
208 ccw->cda = (u32)(addr_t) ib->data;
209 ccw->flags |= CCW_FLAG_IDA;
210 } else
211 // we do not need idals - use direct addressing
212 ccw->cda = (u32)(addr_t) ib->data[0];
213 ccw->count = ib->size;
214}
215
216/*
217 * Copy count bytes from an idal buffer to user memory
218 */
219static inline size_t
220idal_buffer_to_user(struct idal_buffer *ib, void __user *to, size_t count)
221{
222 size_t left;
223 int i;
224
225 BUG_ON(count > ib->size);
226 for (i = 0; count > IDA_BLOCK_SIZE; i++) {
227 left = copy_to_user(to, ib->data[i], IDA_BLOCK_SIZE);
228 if (left)
229 return left + count - IDA_BLOCK_SIZE;
230 to = (void __user *) to + IDA_BLOCK_SIZE;
231 count -= IDA_BLOCK_SIZE;
232 }
233 return copy_to_user(to, ib->data[i], count);
234}
235
236/*
237 * Copy count bytes from user memory to an idal buffer
238 */
239static inline size_t
240idal_buffer_from_user(struct idal_buffer *ib, const void __user *from, size_t count)
241{
242 size_t left;
243 int i;
244
245 BUG_ON(count > ib->size);
246 for (i = 0; count > IDA_BLOCK_SIZE; i++) {
247 left = copy_from_user(ib->data[i], from, IDA_BLOCK_SIZE);
248 if (left)
249 return left + count - IDA_BLOCK_SIZE;
250 from = (void __user *) from + IDA_BLOCK_SIZE;
251 count -= IDA_BLOCK_SIZE;
252 }
253 return copy_from_user(ib->data[i], from, count);
254}
255
256#endif
diff --git a/include/asm-s390/io.h b/include/asm-s390/io.h
deleted file mode 100644
index b7ff6afc3caa..000000000000
--- a/include/asm-s390/io.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * include/asm-s390/io.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * Derived from "include/asm-i386/io.h"
9 */
10
11#ifndef _S390_IO_H
12#define _S390_IO_H
13
14#ifdef __KERNEL__
15
16#include <asm/page.h>
17
18#define IO_SPACE_LIMIT 0xffffffff
19
20/*
21 * Change virtual addresses to physical addresses and vv.
22 * These are pretty trivial
23 */
24static inline unsigned long virt_to_phys(volatile void * address)
25{
26 unsigned long real_address;
27 asm volatile(
28 " lra %0,0(%1)\n"
29 " jz 0f\n"
30 " la %0,0\n"
31 "0:"
32 : "=a" (real_address) : "a" (address) : "cc");
33 return real_address;
34}
35
36static inline void * phys_to_virt(unsigned long address)
37{
38 return (void *) address;
39}
40
41/*
42 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
43 * access
44 */
45#define xlate_dev_mem_ptr(p) __va(p)
46
47/*
48 * Convert a virtual cached pointer to an uncached pointer
49 */
50#define xlate_dev_kmem_ptr(p) p
51
52#endif /* __KERNEL__ */
53
54#endif
diff --git a/include/asm-s390/ioctl.h b/include/asm-s390/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/include/asm-s390/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/include/asm-s390/ioctls.h b/include/asm-s390/ioctls.h
deleted file mode 100644
index 40e481b1b461..000000000000
--- a/include/asm-s390/ioctls.h
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 * include/asm-s390/ioctls.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/ioctls.h"
7 */
8
9#ifndef __ARCH_S390_IOCTLS_H__
10#define __ARCH_S390_IOCTLS_H__
11
12#include <asm/ioctl.h>
13
14/* 0x54 is just a magic number to make these relatively unique ('T') */
15
16#define TCGETS 0x5401
17#define TCSETS 0x5402
18#define TCSETSW 0x5403
19#define TCSETSF 0x5404
20#define TCGETA 0x5405
21#define TCSETA 0x5406
22#define TCSETAW 0x5407
23#define TCSETAF 0x5408
24#define TCSBRK 0x5409
25#define TCXONC 0x540A
26#define TCFLSH 0x540B
27#define TIOCEXCL 0x540C
28#define TIOCNXCL 0x540D
29#define TIOCSCTTY 0x540E
30#define TIOCGPGRP 0x540F
31#define TIOCSPGRP 0x5410
32#define TIOCOUTQ 0x5411
33#define TIOCSTI 0x5412
34#define TIOCGWINSZ 0x5413
35#define TIOCSWINSZ 0x5414
36#define TIOCMGET 0x5415
37#define TIOCMBIS 0x5416
38#define TIOCMBIC 0x5417
39#define TIOCMSET 0x5418
40#define TIOCGSOFTCAR 0x5419
41#define TIOCSSOFTCAR 0x541A
42#define FIONREAD 0x541B
43#define TIOCINQ FIONREAD
44#define TIOCLINUX 0x541C
45#define TIOCCONS 0x541D
46#define TIOCGSERIAL 0x541E
47#define TIOCSSERIAL 0x541F
48#define TIOCPKT 0x5420
49#define FIONBIO 0x5421
50#define TIOCNOTTY 0x5422
51#define TIOCSETD 0x5423
52#define TIOCGETD 0x5424
53#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
54#define TIOCSBRK 0x5427 /* BSD compatibility */
55#define TIOCCBRK 0x5428 /* BSD compatibility */
56#define TIOCGSID 0x5429 /* Return the session ID of FD */
57#define TCGETS2 _IOR('T',0x2A, struct termios2)
58#define TCSETS2 _IOW('T',0x2B, struct termios2)
59#define TCSETSW2 _IOW('T',0x2C, struct termios2)
60#define TCSETSF2 _IOW('T',0x2D, struct termios2)
61#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
62#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
63
64#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
65#define FIOCLEX 0x5451
66#define FIOASYNC 0x5452
67#define TIOCSERCONFIG 0x5453
68#define TIOCSERGWILD 0x5454
69#define TIOCSERSWILD 0x5455
70#define TIOCGLCKTRMIOS 0x5456
71#define TIOCSLCKTRMIOS 0x5457
72#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
73#define TIOCSERGETLSR 0x5459 /* Get line status register */
74#define TIOCSERGETMULTI 0x545A /* Get multiport config */
75#define TIOCSERSETMULTI 0x545B /* Set multiport config */
76
77#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
78#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
79#define FIOQSIZE 0x545E
80
81/* Used for packet mode */
82#define TIOCPKT_DATA 0
83#define TIOCPKT_FLUSHREAD 1
84#define TIOCPKT_FLUSHWRITE 2
85#define TIOCPKT_STOP 4
86#define TIOCPKT_START 8
87#define TIOCPKT_NOSTOP 16
88#define TIOCPKT_DOSTOP 32
89
90#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
91
92#endif
diff --git a/include/asm-s390/ipcbuf.h b/include/asm-s390/ipcbuf.h
deleted file mode 100644
index 37f293d12c8f..000000000000
--- a/include/asm-s390/ipcbuf.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef __S390_IPCBUF_H__
2#define __S390_IPCBUF_H__
3
4/*
5 * The user_ipc_perm structure for S/390 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24#ifndef __s390x__
25 unsigned short __pad2;
26#endif /* ! __s390x__ */
27 unsigned long __unused1;
28 unsigned long __unused2;
29};
30
31#endif /* __S390_IPCBUF_H__ */
diff --git a/include/asm-s390/ipl.h b/include/asm-s390/ipl.h
deleted file mode 100644
index 1171e6d144a3..000000000000
--- a/include/asm-s390/ipl.h
+++ /dev/null
@@ -1,168 +0,0 @@
1/*
2 * s390 (re)ipl support
3 *
4 * Copyright IBM Corp. 2007
5 */
6
7#ifndef _ASM_S390_IPL_H
8#define _ASM_S390_IPL_H
9
10#include <asm/types.h>
11#include <asm/cio.h>
12#include <asm/setup.h>
13
14#define IPL_PARMBLOCK_ORIGIN 0x2000
15
16#define IPL_PARM_BLK_FCP_LEN (sizeof(struct ipl_list_hdr) + \
17 sizeof(struct ipl_block_fcp))
18
19#define IPL_PARM_BLK0_FCP_LEN (sizeof(struct ipl_block_fcp) + 8)
20
21#define IPL_PARM_BLK_CCW_LEN (sizeof(struct ipl_list_hdr) + \
22 sizeof(struct ipl_block_ccw))
23
24#define IPL_PARM_BLK0_CCW_LEN (sizeof(struct ipl_block_ccw) + 8)
25
26#define IPL_MAX_SUPPORTED_VERSION (0)
27
28#define IPL_PARMBLOCK_START ((struct ipl_parameter_block *) \
29 IPL_PARMBLOCK_ORIGIN)
30#define IPL_PARMBLOCK_SIZE (IPL_PARMBLOCK_START->hdr.len)
31
32struct ipl_list_hdr {
33 u32 len;
34 u8 reserved1[3];
35 u8 version;
36 u32 blk0_len;
37 u8 pbt;
38 u8 flags;
39 u16 reserved2;
40} __attribute__((packed));
41
42struct ipl_block_fcp {
43 u8 reserved1[313-1];
44 u8 opt;
45 u8 reserved2[3];
46 u16 reserved3;
47 u16 devno;
48 u8 reserved4[4];
49 u64 wwpn;
50 u64 lun;
51 u32 bootprog;
52 u8 reserved5[12];
53 u64 br_lba;
54 u32 scp_data_len;
55 u8 reserved6[260];
56 u8 scp_data[];
57} __attribute__((packed));
58
59#define DIAG308_VMPARM_SIZE 64
60
61struct ipl_block_ccw {
62 u8 load_parm[8];
63 u8 reserved1[84];
64 u8 reserved2[2];
65 u16 devno;
66 u8 vm_flags;
67 u8 reserved3[3];
68 u32 vm_parm_len;
69 u8 nss_name[8];
70 u8 vm_parm[DIAG308_VMPARM_SIZE];
71 u8 reserved4[8];
72} __attribute__((packed));
73
74struct ipl_parameter_block {
75 struct ipl_list_hdr hdr;
76 union {
77 struct ipl_block_fcp fcp;
78 struct ipl_block_ccw ccw;
79 } ipl_info;
80} __attribute__((packed,aligned(4096)));
81
82/*
83 * IPL validity flags
84 */
85extern u32 ipl_flags;
86extern u32 dump_prefix_page;
87extern unsigned int zfcpdump_prefix_array[];
88
89extern void do_reipl(void);
90extern void do_halt(void);
91extern void do_poff(void);
92extern void ipl_save_parameters(void);
93extern void ipl_update_parameters(void);
94extern void get_ipl_vmparm(char *);
95
96enum {
97 IPL_DEVNO_VALID = 1,
98 IPL_PARMBLOCK_VALID = 2,
99 IPL_NSS_VALID = 4,
100};
101
102enum ipl_type {
103 IPL_TYPE_UNKNOWN = 1,
104 IPL_TYPE_CCW = 2,
105 IPL_TYPE_FCP = 4,
106 IPL_TYPE_FCP_DUMP = 8,
107 IPL_TYPE_NSS = 16,
108};
109
110struct ipl_info
111{
112 enum ipl_type type;
113 union {
114 struct {
115 struct ccw_dev_id dev_id;
116 } ccw;
117 struct {
118 struct ccw_dev_id dev_id;
119 u64 wwpn;
120 u64 lun;
121 } fcp;
122 struct {
123 char name[NSS_NAME_SIZE + 1];
124 } nss;
125 } data;
126};
127
128extern struct ipl_info ipl_info;
129extern void setup_ipl(void);
130
131/*
132 * DIAG 308 support
133 */
134enum diag308_subcode {
135 DIAG308_REL_HSA = 2,
136 DIAG308_IPL = 3,
137 DIAG308_DUMP = 4,
138 DIAG308_SET = 5,
139 DIAG308_STORE = 6,
140};
141
142enum diag308_ipl_type {
143 DIAG308_IPL_TYPE_FCP = 0,
144 DIAG308_IPL_TYPE_CCW = 2,
145};
146
147enum diag308_opt {
148 DIAG308_IPL_OPT_IPL = 0x10,
149 DIAG308_IPL_OPT_DUMP = 0x20,
150};
151
152enum diag308_flags {
153 DIAG308_FLAGS_LP_VALID = 0x80,
154};
155
156enum diag308_vm_flags {
157 DIAG308_VM_FLAGS_NSS_VALID = 0x80,
158 DIAG308_VM_FLAGS_VP_VALID = 0x40,
159};
160
161enum diag308_rc {
162 DIAG308_RC_OK = 0x0001,
163 DIAG308_RC_NOCONFIG = 0x0102,
164};
165
166extern int diag308(unsigned long subcode, void *addr);
167
168#endif /* _ASM_S390_IPL_H */
diff --git a/include/asm-s390/irq.h b/include/asm-s390/irq.h
deleted file mode 100644
index 7da991a858f8..000000000000
--- a/include/asm-s390/irq.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef _ASM_IRQ_H
2#define _ASM_IRQ_H
3
4#ifdef __KERNEL__
5#include <linux/hardirq.h>
6
7/*
8 * the definition of irqs has changed in 2.5.46:
9 * NR_IRQS is no longer the number of i/o
10 * interrupts (65536), but rather the number
11 * of interrupt classes (2).
12 * Only external and i/o interrupts make much sense here (CH).
13 */
14
15enum interruption_class {
16 EXTERNAL_INTERRUPT,
17 IO_INTERRUPT,
18
19 NR_IRQS,
20};
21
22#endif /* __KERNEL__ */
23#endif
diff --git a/include/asm-s390/irq_regs.h b/include/asm-s390/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/include/asm-s390/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/include/asm-s390/irqflags.h b/include/asm-s390/irqflags.h
deleted file mode 100644
index 3f26131120b7..000000000000
--- a/include/asm-s390/irqflags.h
+++ /dev/null
@@ -1,106 +0,0 @@
1/*
2 * include/asm-s390/irqflags.h
3 *
4 * Copyright (C) IBM Corp. 2006
5 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
6 */
7
8#ifndef __ASM_IRQFLAGS_H
9#define __ASM_IRQFLAGS_H
10
11#ifdef __KERNEL__
12
13#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
14
15/* store then or system mask. */
16#define __raw_local_irq_stosm(__or) \
17({ \
18 unsigned long __mask; \
19 asm volatile( \
20 " stosm %0,%1" \
21 : "=Q" (__mask) : "i" (__or) : "memory"); \
22 __mask; \
23})
24
25/* store then and system mask. */
26#define __raw_local_irq_stnsm(__and) \
27({ \
28 unsigned long __mask; \
29 asm volatile( \
30 " stnsm %0,%1" \
31 : "=Q" (__mask) : "i" (__and) : "memory"); \
32 __mask; \
33})
34
35/* set system mask. */
36#define __raw_local_irq_ssm(__mask) \
37({ \
38 asm volatile("ssm %0" : : "Q" (__mask) : "memory"); \
39})
40
41#else /* __GNUC__ */
42
43/* store then or system mask. */
44#define __raw_local_irq_stosm(__or) \
45({ \
46 unsigned long __mask; \
47 asm volatile( \
48 " stosm 0(%1),%2" \
49 : "=m" (__mask) \
50 : "a" (&__mask), "i" (__or) : "memory"); \
51 __mask; \
52})
53
54/* store then and system mask. */
55#define __raw_local_irq_stnsm(__and) \
56({ \
57 unsigned long __mask; \
58 asm volatile( \
59 " stnsm 0(%1),%2" \
60 : "=m" (__mask) \
61 : "a" (&__mask), "i" (__and) : "memory"); \
62 __mask; \
63})
64
65/* set system mask. */
66#define __raw_local_irq_ssm(__mask) \
67({ \
68 asm volatile( \
69 " ssm 0(%0)" \
70 : : "a" (&__mask), "m" (__mask) : "memory"); \
71})
72
73#endif /* __GNUC__ */
74
75/* interrupt control.. */
76static inline unsigned long raw_local_irq_enable(void)
77{
78 return __raw_local_irq_stosm(0x03);
79}
80
81static inline unsigned long raw_local_irq_disable(void)
82{
83 return __raw_local_irq_stnsm(0xfc);
84}
85
86#define raw_local_save_flags(x) \
87do { \
88 typecheck(unsigned long, x); \
89 (x) = __raw_local_irq_stosm(0x00); \
90} while (0)
91
92static inline void raw_local_irq_restore(unsigned long flags)
93{
94 __raw_local_irq_ssm(flags);
95}
96
97static inline int raw_irqs_disabled_flags(unsigned long flags)
98{
99 return !(flags & (3UL << (BITS_PER_LONG - 8)));
100}
101
102/* For spinlocks etc */
103#define raw_local_irq_save(x) ((x) = raw_local_irq_disable())
104
105#endif /* __KERNEL__ */
106#endif /* __ASM_IRQFLAGS_H */
diff --git a/include/asm-s390/isc.h b/include/asm-s390/isc.h
deleted file mode 100644
index 34bb8916db4f..000000000000
--- a/include/asm-s390/isc.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _ASM_S390_ISC_H
2#define _ASM_S390_ISC_H
3
4#include <linux/types.h>
5
6/*
7 * I/O interruption subclasses used by drivers.
8 * Please add all used iscs here so that it is possible to distribute
9 * isc usage between drivers.
10 * Reminder: 0 is highest priority, 7 lowest.
11 */
12#define MAX_ISC 7
13
14/* Regular I/O interrupts. */
15#define IO_SCH_ISC 3 /* regular I/O subchannels */
16#define CONSOLE_ISC 1 /* console I/O subchannel */
17#define CHSC_SCH_ISC 7 /* CHSC subchannels */
18/* Adapter interrupts. */
19#define QDIO_AIRQ_ISC IO_SCH_ISC /* I/O subchannel in qdio mode */
20
21/* Functions for registration of I/O interruption subclasses */
22void isc_register(unsigned int isc);
23void isc_unregister(unsigned int isc);
24
25#endif /* _ASM_S390_ISC_H */
diff --git a/include/asm-s390/itcw.h b/include/asm-s390/itcw.h
deleted file mode 100644
index a9bc5c36b32a..000000000000
--- a/include/asm-s390/itcw.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * Functions for incremental construction of fcx enabled I/O control blocks.
3 *
4 * Copyright IBM Corp. 2008
5 * Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_ITCW_H
9#define _ASM_S390_ITCW_H _ASM_S390_ITCW_H
10
11#include <linux/types.h>
12#include <asm/fcx.h>
13
14#define ITCW_OP_READ 0
15#define ITCW_OP_WRITE 1
16
17struct itcw;
18
19struct tcw *itcw_get_tcw(struct itcw *itcw);
20size_t itcw_calc_size(int intrg, int max_tidaws, int intrg_max_tidaws);
21struct itcw *itcw_init(void *buffer, size_t size, int op, int intrg,
22 int max_tidaws, int intrg_max_tidaws);
23struct dcw *itcw_add_dcw(struct itcw *itcw, u8 cmd, u8 flags, void *cd,
24 u8 cd_count, u32 count);
25struct tidaw *itcw_add_tidaw(struct itcw *itcw, u8 flags, void *addr,
26 u32 count);
27void itcw_set_data(struct itcw *itcw, void *addr, int use_tidal);
28void itcw_finalize(struct itcw *itcw);
29
30#endif /* _ASM_S390_ITCW_H */
diff --git a/include/asm-s390/kdebug.h b/include/asm-s390/kdebug.h
deleted file mode 100644
index 40db27cd6e60..000000000000
--- a/include/asm-s390/kdebug.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _S390_KDEBUG_H
2#define _S390_KDEBUG_H
3
4/*
5 * Feb 2006 Ported to s390 <grundym@us.ibm.com>
6 */
7
8struct pt_regs;
9
10enum die_val {
11 DIE_OOPS = 1,
12 DIE_BPT,
13 DIE_SSTEP,
14 DIE_PANIC,
15 DIE_NMI,
16 DIE_DIE,
17 DIE_NMIWATCHDOG,
18 DIE_KERNELDEBUG,
19 DIE_TRAP,
20 DIE_GPF,
21 DIE_CALL,
22 DIE_NMI_IPI,
23};
24
25extern void die(const char *, struct pt_regs *, long);
26
27#endif
diff --git a/include/asm-s390/kexec.h b/include/asm-s390/kexec.h
deleted file mode 100644
index f219c6411e0b..000000000000
--- a/include/asm-s390/kexec.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * include/asm-s390/kexec.h
3 *
4 * (C) Copyright IBM Corp. 2005
5 *
6 * Author(s): Rolf Adelsberger <adelsberger@de.ibm.com>
7 *
8 */
9
10#ifndef _S390_KEXEC_H
11#define _S390_KEXEC_H
12
13#ifdef __KERNEL__
14#include <asm/page.h>
15#endif
16#include <asm/processor.h>
17/*
18 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
19 * I.e. Maximum page that is mapped directly into kernel memory,
20 * and kmap is not required.
21 */
22
23/* Maximum physical address we can use pages from */
24#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
25
26/* Maximum address we can reach in physical address mode */
27#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
28
29/* Maximum address we can use for the control pages */
30/* Not more than 2GB */
31#define KEXEC_CONTROL_MEMORY_LIMIT (1UL<<31)
32
33/* Allocate one page for the pdp and the second for the code */
34#define KEXEC_CONTROL_CODE_SIZE 4096
35
36/* The native architecture */
37#define KEXEC_ARCH KEXEC_ARCH_S390
38
39/* Provide a dummy definition to avoid build failures. */
40static inline void crash_setup_regs(struct pt_regs *newregs,
41 struct pt_regs *oldregs) { }
42
43#endif /*_S390_KEXEC_H */
diff --git a/include/asm-s390/kmap_types.h b/include/asm-s390/kmap_types.h
deleted file mode 100644
index fd1574648223..000000000000
--- a/include/asm-s390/kmap_types.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _ASM_KMAP_TYPES_H
3#define _ASM_KMAP_TYPES_H
4
5enum km_type {
6 KM_BOUNCE_READ,
7 KM_SKB_SUNRPC_DATA,
8 KM_SKB_DATA_SOFTIRQ,
9 KM_USER0,
10 KM_USER1,
11 KM_BIO_SRC_IRQ,
12 KM_BIO_DST_IRQ,
13 KM_PTE0,
14 KM_PTE1,
15 KM_IRQ0,
16 KM_IRQ1,
17 KM_SOFTIRQ0,
18 KM_SOFTIRQ1,
19 KM_TYPE_NR
20};
21
22#endif
23#endif /* __KERNEL__ */
diff --git a/include/asm-s390/kprobes.h b/include/asm-s390/kprobes.h
deleted file mode 100644
index 330f68caffe4..000000000000
--- a/include/asm-s390/kprobes.h
+++ /dev/null
@@ -1,103 +0,0 @@
1#ifndef _ASM_S390_KPROBES_H
2#define _ASM_S390_KPROBES_H
3/*
4 * Kernel Probes (KProbes)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 * Copyright (C) IBM Corporation, 2002, 2006
21 *
22 * 2002-Oct Created by Vamsi Krishna S <vamsi_krishna@in.ibm.com> Kernel
23 * Probes initial implementation ( includes suggestions from
24 * Rusty Russell).
25 * 2004-Nov Modified for PPC64 by Ananth N Mavinakayanahalli
26 * <ananth@in.ibm.com>
27 * 2005-Dec Used as a template for s390 by Mike Grundy
28 * <grundym@us.ibm.com>
29 */
30#include <linux/types.h>
31#include <linux/ptrace.h>
32#include <linux/percpu.h>
33
34#define __ARCH_WANT_KPROBES_INSN_SLOT
35struct pt_regs;
36struct kprobe;
37
38typedef u16 kprobe_opcode_t;
39#define BREAKPOINT_INSTRUCTION 0x0002
40
41/* Maximum instruction size is 3 (16bit) halfwords: */
42#define MAX_INSN_SIZE 0x0003
43#define MAX_STACK_SIZE 64
44#define MIN_STACK_SIZE(ADDR) (((MAX_STACK_SIZE) < \
45 (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR))) \
46 ? (MAX_STACK_SIZE) \
47 : (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR)))
48
49#define kretprobe_blacklist_size 0
50
51#define KPROBE_SWAP_INST 0x10
52
53#define FIXUP_PSW_NORMAL 0x08
54#define FIXUP_BRANCH_NOT_TAKEN 0x04
55#define FIXUP_RETURN_REGISTER 0x02
56#define FIXUP_NOT_REQUIRED 0x01
57
58/* Architecture specific copy of original instruction */
59struct arch_specific_insn {
60 /* copy of original instruction */
61 kprobe_opcode_t *insn;
62 int fixup;
63 int ilen;
64 int reg;
65};
66
67struct ins_replace_args {
68 kprobe_opcode_t *ptr;
69 kprobe_opcode_t old;
70 kprobe_opcode_t new;
71};
72struct prev_kprobe {
73 struct kprobe *kp;
74 unsigned long status;
75 unsigned long saved_psw;
76 unsigned long kprobe_saved_imask;
77 unsigned long kprobe_saved_ctl[3];
78};
79
80/* per-cpu kprobe control block */
81struct kprobe_ctlblk {
82 unsigned long kprobe_status;
83 unsigned long kprobe_saved_imask;
84 unsigned long kprobe_saved_ctl[3];
85 struct pt_regs jprobe_saved_regs;
86 unsigned long jprobe_saved_r14;
87 unsigned long jprobe_saved_r15;
88 struct prev_kprobe prev_kprobe;
89 kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE];
90};
91
92void arch_remove_kprobe(struct kprobe *p);
93void kretprobe_trampoline(void);
94int is_prohibited_opcode(kprobe_opcode_t *instruction);
95void get_instruction_type(struct arch_specific_insn *ainsn);
96
97int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
98int kprobe_exceptions_notify(struct notifier_block *self,
99 unsigned long val, void *data);
100
101#define flush_insn_slot(p) do { } while (0)
102
103#endif /* _ASM_S390_KPROBES_H */
diff --git a/include/asm-s390/kvm.h b/include/asm-s390/kvm.h
deleted file mode 100644
index d74002f95794..000000000000
--- a/include/asm-s390/kvm.h
+++ /dev/null
@@ -1,45 +0,0 @@
1#ifndef __LINUX_KVM_S390_H
2#define __LINUX_KVM_S390_H
3
4/*
5 * asm-s390/kvm.h - KVM s390 specific structures and definitions
6 *
7 * Copyright IBM Corp. 2008
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License (version 2 only)
11 * as published by the Free Software Foundation.
12 *
13 * Author(s): Carsten Otte <cotte@de.ibm.com>
14 * Christian Borntraeger <borntraeger@de.ibm.com>
15 */
16#include <asm/types.h>
17
18/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
19struct kvm_pic_state {
20 /* no PIC for s390 */
21};
22
23struct kvm_ioapic_state {
24 /* no IOAPIC for s390 */
25};
26
27/* for KVM_GET_REGS and KVM_SET_REGS */
28struct kvm_regs {
29 /* general purpose regs for s390 */
30 __u64 gprs[16];
31};
32
33/* for KVM_GET_SREGS and KVM_SET_SREGS */
34struct kvm_sregs {
35 __u32 acrs[16];
36 __u64 crs[16];
37};
38
39/* for KVM_GET_FPU and KVM_SET_FPU */
40struct kvm_fpu {
41 __u32 fpc;
42 __u64 fprs[16];
43};
44
45#endif
diff --git a/include/asm-s390/kvm_host.h b/include/asm-s390/kvm_host.h
deleted file mode 100644
index 3c55e4107dcc..000000000000
--- a/include/asm-s390/kvm_host.h
+++ /dev/null
@@ -1,235 +0,0 @@
1/*
2 * asm-s390/kvm_host.h - definition for kernel virtual machines on s390
3 *
4 * Copyright IBM Corp. 2008
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
9 *
10 * Author(s): Carsten Otte <cotte@de.ibm.com>
11 */
12
13
14#ifndef ASM_KVM_HOST_H
15#define ASM_KVM_HOST_H
16#include <linux/kvm_host.h>
17#include <asm/debug.h>
18
19#define KVM_MAX_VCPUS 64
20#define KVM_MEMORY_SLOTS 32
21/* memory slots that does not exposed to userspace */
22#define KVM_PRIVATE_MEM_SLOTS 4
23
24struct kvm_guest_debug {
25};
26
27struct sca_entry {
28 atomic_t scn;
29 __u64 reserved;
30 __u64 sda;
31 __u64 reserved2[2];
32} __attribute__((packed));
33
34
35struct sca_block {
36 __u64 ipte_control;
37 __u64 reserved[5];
38 __u64 mcn;
39 __u64 reserved2;
40 struct sca_entry cpu[64];
41} __attribute__((packed));
42
43#define KVM_PAGES_PER_HPAGE 256
44
45#define CPUSTAT_HOST 0x80000000
46#define CPUSTAT_WAIT 0x10000000
47#define CPUSTAT_ECALL_PEND 0x08000000
48#define CPUSTAT_STOP_INT 0x04000000
49#define CPUSTAT_IO_INT 0x02000000
50#define CPUSTAT_EXT_INT 0x01000000
51#define CPUSTAT_RUNNING 0x00800000
52#define CPUSTAT_RETAINED 0x00400000
53#define CPUSTAT_TIMING_SUB 0x00020000
54#define CPUSTAT_SIE_SUB 0x00010000
55#define CPUSTAT_RRF 0x00008000
56#define CPUSTAT_SLSV 0x00004000
57#define CPUSTAT_SLSR 0x00002000
58#define CPUSTAT_ZARCH 0x00000800
59#define CPUSTAT_MCDS 0x00000100
60#define CPUSTAT_SM 0x00000080
61#define CPUSTAT_G 0x00000008
62#define CPUSTAT_J 0x00000002
63#define CPUSTAT_P 0x00000001
64
65struct kvm_s390_sie_block {
66 atomic_t cpuflags; /* 0x0000 */
67 __u32 prefix; /* 0x0004 */
68 __u8 reserved8[32]; /* 0x0008 */
69 __u64 cputm; /* 0x0028 */
70 __u64 ckc; /* 0x0030 */
71 __u64 epoch; /* 0x0038 */
72 __u8 reserved40[4]; /* 0x0040 */
73#define LCTL_CR0 0x8000
74 __u16 lctl; /* 0x0044 */
75 __s16 icpua; /* 0x0046 */
76 __u32 ictl; /* 0x0048 */
77 __u32 eca; /* 0x004c */
78 __u8 icptcode; /* 0x0050 */
79 __u8 reserved51; /* 0x0051 */
80 __u16 ihcpu; /* 0x0052 */
81 __u8 reserved54[2]; /* 0x0054 */
82 __u16 ipa; /* 0x0056 */
83 __u32 ipb; /* 0x0058 */
84 __u32 scaoh; /* 0x005c */
85 __u8 reserved60; /* 0x0060 */
86 __u8 ecb; /* 0x0061 */
87 __u8 reserved62[2]; /* 0x0062 */
88 __u32 scaol; /* 0x0064 */
89 __u8 reserved68[4]; /* 0x0068 */
90 __u32 todpr; /* 0x006c */
91 __u8 reserved70[16]; /* 0x0070 */
92 __u64 gmsor; /* 0x0080 */
93 __u64 gmslm; /* 0x0088 */
94 psw_t gpsw; /* 0x0090 */
95 __u64 gg14; /* 0x00a0 */
96 __u64 gg15; /* 0x00a8 */
97 __u8 reservedb0[30]; /* 0x00b0 */
98 __u16 iprcc; /* 0x00ce */
99 __u8 reservedd0[48]; /* 0x00d0 */
100 __u64 gcr[16]; /* 0x0100 */
101 __u64 gbea; /* 0x0180 */
102 __u8 reserved188[120]; /* 0x0188 */
103} __attribute__((packed));
104
105struct kvm_vcpu_stat {
106 u32 exit_userspace;
107 u32 exit_null;
108 u32 exit_external_request;
109 u32 exit_external_interrupt;
110 u32 exit_stop_request;
111 u32 exit_validity;
112 u32 exit_instruction;
113 u32 instruction_lctl;
114 u32 instruction_lctlg;
115 u32 exit_program_interruption;
116 u32 exit_instr_and_program;
117 u32 deliver_emergency_signal;
118 u32 deliver_service_signal;
119 u32 deliver_virtio_interrupt;
120 u32 deliver_stop_signal;
121 u32 deliver_prefix_signal;
122 u32 deliver_restart_signal;
123 u32 deliver_program_int;
124 u32 exit_wait_state;
125 u32 instruction_stidp;
126 u32 instruction_spx;
127 u32 instruction_stpx;
128 u32 instruction_stap;
129 u32 instruction_storage_key;
130 u32 instruction_stsch;
131 u32 instruction_chsc;
132 u32 instruction_stsi;
133 u32 instruction_stfl;
134 u32 instruction_sigp_sense;
135 u32 instruction_sigp_emergency;
136 u32 instruction_sigp_stop;
137 u32 instruction_sigp_arch;
138 u32 instruction_sigp_prefix;
139 u32 instruction_sigp_restart;
140 u32 diagnose_44;
141};
142
143struct kvm_s390_io_info {
144 __u16 subchannel_id; /* 0x0b8 */
145 __u16 subchannel_nr; /* 0x0ba */
146 __u32 io_int_parm; /* 0x0bc */
147 __u32 io_int_word; /* 0x0c0 */
148};
149
150struct kvm_s390_ext_info {
151 __u32 ext_params;
152 __u64 ext_params2;
153};
154
155#define PGM_OPERATION 0x01
156#define PGM_PRIVILEGED_OPERATION 0x02
157#define PGM_EXECUTE 0x03
158#define PGM_PROTECTION 0x04
159#define PGM_ADDRESSING 0x05
160#define PGM_SPECIFICATION 0x06
161#define PGM_DATA 0x07
162
163struct kvm_s390_pgm_info {
164 __u16 code;
165};
166
167struct kvm_s390_prefix_info {
168 __u32 address;
169};
170
171struct kvm_s390_interrupt_info {
172 struct list_head list;
173 u64 type;
174 union {
175 struct kvm_s390_io_info io;
176 struct kvm_s390_ext_info ext;
177 struct kvm_s390_pgm_info pgm;
178 struct kvm_s390_prefix_info prefix;
179 };
180};
181
182/* for local_interrupt.action_flags */
183#define ACTION_STORE_ON_STOP 1
184#define ACTION_STOP_ON_STOP 2
185
186struct kvm_s390_local_interrupt {
187 spinlock_t lock;
188 struct list_head list;
189 atomic_t active;
190 struct kvm_s390_float_interrupt *float_int;
191 int timer_due; /* event indicator for waitqueue below */
192 wait_queue_head_t wq;
193 atomic_t *cpuflags;
194 unsigned int action_bits;
195};
196
197struct kvm_s390_float_interrupt {
198 spinlock_t lock;
199 struct list_head list;
200 atomic_t active;
201 int next_rr_cpu;
202 unsigned long idle_mask [(64 + sizeof(long) - 1) / sizeof(long)];
203 struct kvm_s390_local_interrupt *local_int[64];
204};
205
206
207struct kvm_vcpu_arch {
208 struct kvm_s390_sie_block *sie_block;
209 unsigned long guest_gprs[16];
210 s390_fp_regs host_fpregs;
211 unsigned int host_acrs[NUM_ACRS];
212 s390_fp_regs guest_fpregs;
213 unsigned int guest_acrs[NUM_ACRS];
214 struct kvm_s390_local_interrupt local_int;
215 struct timer_list ckc_timer;
216 union {
217 cpuid_t cpu_id;
218 u64 stidp_data;
219 };
220};
221
222struct kvm_vm_stat {
223 u32 remote_tlb_flush;
224};
225
226struct kvm_arch{
227 unsigned long guest_origin;
228 unsigned long guest_memsize;
229 struct sca_block *sca;
230 debug_info_t *dbf;
231 struct kvm_s390_float_interrupt float_int;
232};
233
234extern int sie64a(struct kvm_s390_sie_block *, unsigned long *);
235#endif
diff --git a/include/asm-s390/kvm_para.h b/include/asm-s390/kvm_para.h
deleted file mode 100644
index 2c503796b619..000000000000
--- a/include/asm-s390/kvm_para.h
+++ /dev/null
@@ -1,150 +0,0 @@
1/*
2 * asm-s390/kvm_para.h - definition for paravirtual devices on s390
3 *
4 * Copyright IBM Corp. 2008
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
9 *
10 * Author(s): Christian Borntraeger <borntraeger@de.ibm.com>
11 */
12
13#ifndef __S390_KVM_PARA_H
14#define __S390_KVM_PARA_H
15
16/*
17 * Hypercalls for KVM on s390. The calling convention is similar to the
18 * s390 ABI, so we use R2-R6 for parameters 1-5. In addition we use R1
19 * as hypercall number and R7 as parameter 6. The return value is
20 * written to R2. We use the diagnose instruction as hypercall. To avoid
21 * conflicts with existing diagnoses for LPAR and z/VM, we do not use
22 * the instruction encoded number, but specify the number in R1 and
23 * use 0x500 as KVM hypercall
24 *
25 * Copyright IBM Corp. 2007,2008
26 * Author(s): Christian Borntraeger <borntraeger@de.ibm.com>
27 *
28 * This work is licensed under the terms of the GNU GPL, version 2.
29 */
30
31static inline long kvm_hypercall0(unsigned long nr)
32{
33 register unsigned long __nr asm("1") = nr;
34 register long __rc asm("2");
35
36 asm volatile ("diag 2,4,0x500\n"
37 : "=d" (__rc) : "d" (__nr): "memory", "cc");
38 return __rc;
39}
40
41static inline long kvm_hypercall1(unsigned long nr, unsigned long p1)
42{
43 register unsigned long __nr asm("1") = nr;
44 register unsigned long __p1 asm("2") = p1;
45 register long __rc asm("2");
46
47 asm volatile ("diag 2,4,0x500\n"
48 : "=d" (__rc) : "d" (__nr), "0" (__p1) : "memory", "cc");
49 return __rc;
50}
51
52static inline long kvm_hypercall2(unsigned long nr, unsigned long p1,
53 unsigned long p2)
54{
55 register unsigned long __nr asm("1") = nr;
56 register unsigned long __p1 asm("2") = p1;
57 register unsigned long __p2 asm("3") = p2;
58 register long __rc asm("2");
59
60 asm volatile ("diag 2,4,0x500\n"
61 : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2)
62 : "memory", "cc");
63 return __rc;
64}
65
66static inline long kvm_hypercall3(unsigned long nr, unsigned long p1,
67 unsigned long p2, unsigned long p3)
68{
69 register unsigned long __nr asm("1") = nr;
70 register unsigned long __p1 asm("2") = p1;
71 register unsigned long __p2 asm("3") = p2;
72 register unsigned long __p3 asm("4") = p3;
73 register long __rc asm("2");
74
75 asm volatile ("diag 2,4,0x500\n"
76 : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2),
77 "d" (__p3) : "memory", "cc");
78 return __rc;
79}
80
81
82static inline long kvm_hypercall4(unsigned long nr, unsigned long p1,
83 unsigned long p2, unsigned long p3,
84 unsigned long p4)
85{
86 register unsigned long __nr asm("1") = nr;
87 register unsigned long __p1 asm("2") = p1;
88 register unsigned long __p2 asm("3") = p2;
89 register unsigned long __p3 asm("4") = p3;
90 register unsigned long __p4 asm("5") = p4;
91 register long __rc asm("2");
92
93 asm volatile ("diag 2,4,0x500\n"
94 : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2),
95 "d" (__p3), "d" (__p4) : "memory", "cc");
96 return __rc;
97}
98
99static inline long kvm_hypercall5(unsigned long nr, unsigned long p1,
100 unsigned long p2, unsigned long p3,
101 unsigned long p4, unsigned long p5)
102{
103 register unsigned long __nr asm("1") = nr;
104 register unsigned long __p1 asm("2") = p1;
105 register unsigned long __p2 asm("3") = p2;
106 register unsigned long __p3 asm("4") = p3;
107 register unsigned long __p4 asm("5") = p4;
108 register unsigned long __p5 asm("6") = p5;
109 register long __rc asm("2");
110
111 asm volatile ("diag 2,4,0x500\n"
112 : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2),
113 "d" (__p3), "d" (__p4), "d" (__p5) : "memory", "cc");
114 return __rc;
115}
116
117static inline long kvm_hypercall6(unsigned long nr, unsigned long p1,
118 unsigned long p2, unsigned long p3,
119 unsigned long p4, unsigned long p5,
120 unsigned long p6)
121{
122 register unsigned long __nr asm("1") = nr;
123 register unsigned long __p1 asm("2") = p1;
124 register unsigned long __p2 asm("3") = p2;
125 register unsigned long __p3 asm("4") = p3;
126 register unsigned long __p4 asm("5") = p4;
127 register unsigned long __p5 asm("6") = p5;
128 register unsigned long __p6 asm("7") = p6;
129 register long __rc asm("2");
130
131 asm volatile ("diag 2,4,0x500\n"
132 : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2),
133 "d" (__p3), "d" (__p4), "d" (__p5), "d" (__p6)
134 : "memory", "cc");
135 return __rc;
136}
137
138/* kvm on s390 is always paravirtualization enabled */
139static inline int kvm_para_available(void)
140{
141 return 1;
142}
143
144/* No feature bits are currently assigned for kvm on s390 */
145static inline unsigned int kvm_arch_para_features(void)
146{
147 return 0;
148}
149
150#endif /* __S390_KVM_PARA_H */
diff --git a/include/asm-s390/kvm_virtio.h b/include/asm-s390/kvm_virtio.h
deleted file mode 100644
index 146100224def..000000000000
--- a/include/asm-s390/kvm_virtio.h
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * kvm_virtio.h - definition for virtio for kvm on s390
3 *
4 * Copyright IBM Corp. 2008
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
9 *
10 * Author(s): Christian Borntraeger <borntraeger@de.ibm.com>
11 */
12
13#ifndef __KVM_S390_VIRTIO_H
14#define __KVM_S390_VIRTIO_H
15
16#include <linux/types.h>
17
18struct kvm_device_desc {
19 /* The device type: console, network, disk etc. Type 0 terminates. */
20 __u8 type;
21 /* The number of virtqueues (first in config array) */
22 __u8 num_vq;
23 /*
24 * The number of bytes of feature bits. Multiply by 2: one for host
25 * features and one for guest acknowledgements.
26 */
27 __u8 feature_len;
28 /* The number of bytes of the config array after virtqueues. */
29 __u8 config_len;
30 /* A status byte, written by the Guest. */
31 __u8 status;
32 __u8 config[0];
33};
34
35/*
36 * This is how we expect the device configuration field for a virtqueue
37 * to be laid out in config space.
38 */
39struct kvm_vqconfig {
40 /* The token returned with an interrupt. Set by the guest */
41 __u64 token;
42 /* The address of the virtio ring */
43 __u64 address;
44 /* The number of entries in the virtio_ring */
45 __u16 num;
46
47};
48
49#define KVM_S390_VIRTIO_NOTIFY 0
50#define KVM_S390_VIRTIO_RESET 1
51#define KVM_S390_VIRTIO_SET_STATUS 2
52
53#ifdef __KERNEL__
54/* early virtio console setup */
55#ifdef CONFIG_VIRTIO_CONSOLE
56extern void s390_virtio_console_init(void);
57#else
58static inline void s390_virtio_console_init(void)
59{
60}
61#endif /* CONFIG_VIRTIO_CONSOLE */
62#endif /* __KERNEL__ */
63#endif
diff --git a/include/asm-s390/linkage.h b/include/asm-s390/linkage.h
deleted file mode 100644
index 291c2d01c44f..000000000000
--- a/include/asm-s390/linkage.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4/* Nothing to see here... */
5
6#endif
diff --git a/include/asm-s390/local.h b/include/asm-s390/local.h
deleted file mode 100644
index c11c530f74d0..000000000000
--- a/include/asm-s390/local.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local.h>
diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h
deleted file mode 100644
index 0bc51d52a899..000000000000
--- a/include/asm-s390/lowcore.h
+++ /dev/null
@@ -1,433 +0,0 @@
1/*
2 * include/asm-s390/lowcore.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
9 */
10
11#ifndef _ASM_S390_LOWCORE_H
12#define _ASM_S390_LOWCORE_H
13
14#ifndef __s390x__
15#define __LC_EXT_OLD_PSW 0x018
16#define __LC_SVC_OLD_PSW 0x020
17#define __LC_PGM_OLD_PSW 0x028
18#define __LC_MCK_OLD_PSW 0x030
19#define __LC_IO_OLD_PSW 0x038
20#define __LC_EXT_NEW_PSW 0x058
21#define __LC_SVC_NEW_PSW 0x060
22#define __LC_PGM_NEW_PSW 0x068
23#define __LC_MCK_NEW_PSW 0x070
24#define __LC_IO_NEW_PSW 0x078
25#else /* !__s390x__ */
26#define __LC_EXT_OLD_PSW 0x0130
27#define __LC_SVC_OLD_PSW 0x0140
28#define __LC_PGM_OLD_PSW 0x0150
29#define __LC_MCK_OLD_PSW 0x0160
30#define __LC_IO_OLD_PSW 0x0170
31#define __LC_EXT_NEW_PSW 0x01b0
32#define __LC_SVC_NEW_PSW 0x01c0
33#define __LC_PGM_NEW_PSW 0x01d0
34#define __LC_MCK_NEW_PSW 0x01e0
35#define __LC_IO_NEW_PSW 0x01f0
36#endif /* !__s390x__ */
37
38#define __LC_IPL_PARMBLOCK_PTR 0x014
39#define __LC_EXT_PARAMS 0x080
40#define __LC_CPU_ADDRESS 0x084
41#define __LC_EXT_INT_CODE 0x086
42
43#define __LC_SVC_ILC 0x088
44#define __LC_SVC_INT_CODE 0x08A
45#define __LC_PGM_ILC 0x08C
46#define __LC_PGM_INT_CODE 0x08E
47
48#define __LC_PER_ATMID 0x096
49#define __LC_PER_ADDRESS 0x098
50#define __LC_PER_ACCESS_ID 0x0A1
51#define __LC_AR_MODE_ID 0x0A3
52
53#define __LC_SUBCHANNEL_ID 0x0B8
54#define __LC_SUBCHANNEL_NR 0x0BA
55#define __LC_IO_INT_PARM 0x0BC
56#define __LC_IO_INT_WORD 0x0C0
57#define __LC_MCCK_CODE 0x0E8
58
59#define __LC_LAST_BREAK 0x110
60
61#define __LC_RETURN_PSW 0x200
62
63#define __LC_SAVE_AREA 0xC00
64
65#ifndef __s390x__
66#define __LC_IRB 0x208
67#define __LC_SYNC_ENTER_TIMER 0x248
68#define __LC_ASYNC_ENTER_TIMER 0x250
69#define __LC_EXIT_TIMER 0x258
70#define __LC_LAST_UPDATE_TIMER 0x260
71#define __LC_USER_TIMER 0x268
72#define __LC_SYSTEM_TIMER 0x270
73#define __LC_LAST_UPDATE_CLOCK 0x278
74#define __LC_STEAL_CLOCK 0x280
75#define __LC_RETURN_MCCK_PSW 0x288
76#define __LC_KERNEL_STACK 0xC40
77#define __LC_THREAD_INFO 0xC44
78#define __LC_ASYNC_STACK 0xC48
79#define __LC_KERNEL_ASCE 0xC4C
80#define __LC_USER_ASCE 0xC50
81#define __LC_PANIC_STACK 0xC54
82#define __LC_CPUID 0xC60
83#define __LC_CPUADDR 0xC68
84#define __LC_IPLDEV 0xC7C
85#define __LC_CURRENT 0xC90
86#define __LC_INT_CLOCK 0xC98
87#else /* __s390x__ */
88#define __LC_IRB 0x210
89#define __LC_SYNC_ENTER_TIMER 0x250
90#define __LC_ASYNC_ENTER_TIMER 0x258
91#define __LC_EXIT_TIMER 0x260
92#define __LC_LAST_UPDATE_TIMER 0x268
93#define __LC_USER_TIMER 0x270
94#define __LC_SYSTEM_TIMER 0x278
95#define __LC_LAST_UPDATE_CLOCK 0x280
96#define __LC_STEAL_CLOCK 0x288
97#define __LC_RETURN_MCCK_PSW 0x290
98#define __LC_KERNEL_STACK 0xD40
99#define __LC_THREAD_INFO 0xD48
100#define __LC_ASYNC_STACK 0xD50
101#define __LC_KERNEL_ASCE 0xD58
102#define __LC_USER_ASCE 0xD60
103#define __LC_PANIC_STACK 0xD68
104#define __LC_CPUID 0xD80
105#define __LC_CPUADDR 0xD88
106#define __LC_IPLDEV 0xDB8
107#define __LC_CURRENT 0xDD8
108#define __LC_INT_CLOCK 0xDE8
109#endif /* __s390x__ */
110
111
112#define __LC_PANIC_MAGIC 0xE00
113#ifndef __s390x__
114#define __LC_PFAULT_INTPARM 0x080
115#define __LC_CPU_TIMER_SAVE_AREA 0x0D8
116#define __LC_CLOCK_COMP_SAVE_AREA 0x0E0
117#define __LC_PSW_SAVE_AREA 0x100
118#define __LC_PREFIX_SAVE_AREA 0x108
119#define __LC_AREGS_SAVE_AREA 0x120
120#define __LC_FPREGS_SAVE_AREA 0x160
121#define __LC_GPREGS_SAVE_AREA 0x180
122#define __LC_CREGS_SAVE_AREA 0x1C0
123#else /* __s390x__ */
124#define __LC_PFAULT_INTPARM 0x11B8
125#define __LC_FPREGS_SAVE_AREA 0x1200
126#define __LC_GPREGS_SAVE_AREA 0x1280
127#define __LC_PSW_SAVE_AREA 0x1300
128#define __LC_PREFIX_SAVE_AREA 0x1318
129#define __LC_FP_CREG_SAVE_AREA 0x131C
130#define __LC_TODREG_SAVE_AREA 0x1324
131#define __LC_CPU_TIMER_SAVE_AREA 0x1328
132#define __LC_CLOCK_COMP_SAVE_AREA 0x1331
133#define __LC_AREGS_SAVE_AREA 0x1340
134#define __LC_CREGS_SAVE_AREA 0x1380
135#endif /* __s390x__ */
136
137#ifndef __ASSEMBLY__
138
139#include <asm/processor.h>
140#include <linux/types.h>
141#include <asm/sigp.h>
142
143void restart_int_handler(void);
144void ext_int_handler(void);
145void system_call(void);
146void pgm_check_handler(void);
147void mcck_int_handler(void);
148void io_int_handler(void);
149
150struct save_area_s390 {
151 u32 ext_save;
152 u64 timer;
153 u64 clk_cmp;
154 u8 pad1[24];
155 u8 psw[8];
156 u32 pref_reg;
157 u8 pad2[20];
158 u32 acc_regs[16];
159 u64 fp_regs[4];
160 u32 gp_regs[16];
161 u32 ctrl_regs[16];
162} __attribute__((packed));
163
164struct save_area_s390x {
165 u64 fp_regs[16];
166 u64 gp_regs[16];
167 u8 psw[16];
168 u8 pad1[8];
169 u32 pref_reg;
170 u32 fp_ctrl_reg;
171 u8 pad2[4];
172 u32 tod_reg;
173 u64 timer;
174 u64 clk_cmp;
175 u8 pad3[8];
176 u32 acc_regs[16];
177 u64 ctrl_regs[16];
178} __attribute__((packed));
179
180union save_area {
181 struct save_area_s390 s390;
182 struct save_area_s390x s390x;
183};
184
185#define SAVE_AREA_BASE_S390 0xd4
186#define SAVE_AREA_BASE_S390X 0x1200
187
188#ifndef __s390x__
189#define SAVE_AREA_SIZE sizeof(struct save_area_s390)
190#define SAVE_AREA_BASE SAVE_AREA_BASE_S390
191#else
192#define SAVE_AREA_SIZE sizeof(struct save_area_s390x)
193#define SAVE_AREA_BASE SAVE_AREA_BASE_S390X
194#endif
195
196struct _lowcore
197{
198#ifndef __s390x__
199 /* prefix area: defined by architecture */
200 psw_t restart_psw; /* 0x000 */
201 __u32 ccw2[4]; /* 0x008 */
202 psw_t external_old_psw; /* 0x018 */
203 psw_t svc_old_psw; /* 0x020 */
204 psw_t program_old_psw; /* 0x028 */
205 psw_t mcck_old_psw; /* 0x030 */
206 psw_t io_old_psw; /* 0x038 */
207 __u8 pad1[0x58-0x40]; /* 0x040 */
208 psw_t external_new_psw; /* 0x058 */
209 psw_t svc_new_psw; /* 0x060 */
210 psw_t program_new_psw; /* 0x068 */
211 psw_t mcck_new_psw; /* 0x070 */
212 psw_t io_new_psw; /* 0x078 */
213 __u32 ext_params; /* 0x080 */
214 __u16 cpu_addr; /* 0x084 */
215 __u16 ext_int_code; /* 0x086 */
216 __u16 svc_ilc; /* 0x088 */
217 __u16 svc_code; /* 0x08a */
218 __u16 pgm_ilc; /* 0x08c */
219 __u16 pgm_code; /* 0x08e */
220 __u32 trans_exc_code; /* 0x090 */
221 __u16 mon_class_num; /* 0x094 */
222 __u16 per_perc_atmid; /* 0x096 */
223 __u32 per_address; /* 0x098 */
224 __u32 monitor_code; /* 0x09c */
225 __u8 exc_access_id; /* 0x0a0 */
226 __u8 per_access_id; /* 0x0a1 */
227 __u8 pad2[0xB8-0xA2]; /* 0x0a2 */
228 __u16 subchannel_id; /* 0x0b8 */
229 __u16 subchannel_nr; /* 0x0ba */
230 __u32 io_int_parm; /* 0x0bc */
231 __u32 io_int_word; /* 0x0c0 */
232 __u8 pad3[0xc8-0xc4]; /* 0x0c4 */
233 __u32 stfl_fac_list; /* 0x0c8 */
234 __u8 pad4[0xd4-0xcc]; /* 0x0cc */
235 __u32 extended_save_area_addr; /* 0x0d4 */
236 __u32 cpu_timer_save_area[2]; /* 0x0d8 */
237 __u32 clock_comp_save_area[2]; /* 0x0e0 */
238 __u32 mcck_interruption_code[2]; /* 0x0e8 */
239 __u8 pad5[0xf4-0xf0]; /* 0x0f0 */
240 __u32 external_damage_code; /* 0x0f4 */
241 __u32 failing_storage_address; /* 0x0f8 */
242 __u8 pad6[0x100-0xfc]; /* 0x0fc */
243 __u32 st_status_fixed_logout[4];/* 0x100 */
244 __u8 pad7[0x120-0x110]; /* 0x110 */
245 __u32 access_regs_save_area[16];/* 0x120 */
246 __u32 floating_pt_save_area[8]; /* 0x160 */
247 __u32 gpregs_save_area[16]; /* 0x180 */
248 __u32 cregs_save_area[16]; /* 0x1c0 */
249
250 psw_t return_psw; /* 0x200 */
251 __u8 irb[64]; /* 0x208 */
252 __u64 sync_enter_timer; /* 0x248 */
253 __u64 async_enter_timer; /* 0x250 */
254 __u64 exit_timer; /* 0x258 */
255 __u64 last_update_timer; /* 0x260 */
256 __u64 user_timer; /* 0x268 */
257 __u64 system_timer; /* 0x270 */
258 __u64 last_update_clock; /* 0x278 */
259 __u64 steal_clock; /* 0x280 */
260 psw_t return_mcck_psw; /* 0x288 */
261 __u8 pad8[0xc00-0x290]; /* 0x290 */
262
263 /* System info area */
264 __u32 save_area[16]; /* 0xc00 */
265 __u32 kernel_stack; /* 0xc40 */
266 __u32 thread_info; /* 0xc44 */
267 __u32 async_stack; /* 0xc48 */
268 __u32 kernel_asce; /* 0xc4c */
269 __u32 user_asce; /* 0xc50 */
270 __u32 panic_stack; /* 0xc54 */
271 __u32 user_exec_asce; /* 0xc58 */
272 __u8 pad10[0xc60-0xc5c]; /* 0xc5c */
273 /* entry.S sensitive area start */
274 struct cpuinfo_S390 cpu_data; /* 0xc60 */
275 __u32 ipl_device; /* 0xc7c */
276 /* entry.S sensitive area end */
277
278 /* SMP info area: defined by DJB */
279 __u64 clock_comparator; /* 0xc80 */
280 __u32 ext_call_fast; /* 0xc88 */
281 __u32 percpu_offset; /* 0xc8c */
282 __u32 current_task; /* 0xc90 */
283 __u32 softirq_pending; /* 0xc94 */
284 __u64 int_clock; /* 0xc98 */
285 __u8 pad11[0xe00-0xca0]; /* 0xca0 */
286
287 /* 0xe00 is used as indicator for dump tools */
288 /* whether the kernel died with panic() or not */
289 __u32 panic_magic; /* 0xe00 */
290
291 /* Align to the top 1k of prefix area */
292 __u8 pad12[0x1000-0xe04]; /* 0xe04 */
293#else /* !__s390x__ */
294 /* prefix area: defined by architecture */
295 __u32 ccw1[2]; /* 0x000 */
296 __u32 ccw2[4]; /* 0x008 */
297 __u8 pad1[0x80-0x18]; /* 0x018 */
298 __u32 ext_params; /* 0x080 */
299 __u16 cpu_addr; /* 0x084 */
300 __u16 ext_int_code; /* 0x086 */
301 __u16 svc_ilc; /* 0x088 */
302 __u16 svc_code; /* 0x08a */
303 __u16 pgm_ilc; /* 0x08c */
304 __u16 pgm_code; /* 0x08e */
305 __u32 data_exc_code; /* 0x090 */
306 __u16 mon_class_num; /* 0x094 */
307 __u16 per_perc_atmid; /* 0x096 */
308 addr_t per_address; /* 0x098 */
309 __u8 exc_access_id; /* 0x0a0 */
310 __u8 per_access_id; /* 0x0a1 */
311 __u8 op_access_id; /* 0x0a2 */
312 __u8 ar_access_id; /* 0x0a3 */
313 __u8 pad2[0xA8-0xA4]; /* 0x0a4 */
314 addr_t trans_exc_code; /* 0x0A0 */
315 addr_t monitor_code; /* 0x09c */
316 __u16 subchannel_id; /* 0x0b8 */
317 __u16 subchannel_nr; /* 0x0ba */
318 __u32 io_int_parm; /* 0x0bc */
319 __u32 io_int_word; /* 0x0c0 */
320 __u8 pad3[0xc8-0xc4]; /* 0x0c4 */
321 __u32 stfl_fac_list; /* 0x0c8 */
322 __u8 pad4[0xe8-0xcc]; /* 0x0cc */
323 __u32 mcck_interruption_code[2]; /* 0x0e8 */
324 __u8 pad5[0xf4-0xf0]; /* 0x0f0 */
325 __u32 external_damage_code; /* 0x0f4 */
326 addr_t failing_storage_address; /* 0x0f8 */
327 __u8 pad6[0x120-0x100]; /* 0x100 */
328 psw_t restart_old_psw; /* 0x120 */
329 psw_t external_old_psw; /* 0x130 */
330 psw_t svc_old_psw; /* 0x140 */
331 psw_t program_old_psw; /* 0x150 */
332 psw_t mcck_old_psw; /* 0x160 */
333 psw_t io_old_psw; /* 0x170 */
334 __u8 pad7[0x1a0-0x180]; /* 0x180 */
335 psw_t restart_psw; /* 0x1a0 */
336 psw_t external_new_psw; /* 0x1b0 */
337 psw_t svc_new_psw; /* 0x1c0 */
338 psw_t program_new_psw; /* 0x1d0 */
339 psw_t mcck_new_psw; /* 0x1e0 */
340 psw_t io_new_psw; /* 0x1f0 */
341 psw_t return_psw; /* 0x200 */
342 __u8 irb[64]; /* 0x210 */
343 __u64 sync_enter_timer; /* 0x250 */
344 __u64 async_enter_timer; /* 0x258 */
345 __u64 exit_timer; /* 0x260 */
346 __u64 last_update_timer; /* 0x268 */
347 __u64 user_timer; /* 0x270 */
348 __u64 system_timer; /* 0x278 */
349 __u64 last_update_clock; /* 0x280 */
350 __u64 steal_clock; /* 0x288 */
351 psw_t return_mcck_psw; /* 0x290 */
352 __u8 pad8[0xc00-0x2a0]; /* 0x2a0 */
353 /* System info area */
354 __u64 save_area[16]; /* 0xc00 */
355 __u8 pad9[0xd40-0xc80]; /* 0xc80 */
356 __u64 kernel_stack; /* 0xd40 */
357 __u64 thread_info; /* 0xd48 */
358 __u64 async_stack; /* 0xd50 */
359 __u64 kernel_asce; /* 0xd58 */
360 __u64 user_asce; /* 0xd60 */
361 __u64 panic_stack; /* 0xd68 */
362 __u64 user_exec_asce; /* 0xd70 */
363 __u8 pad10[0xd80-0xd78]; /* 0xd78 */
364 /* entry.S sensitive area start */
365 struct cpuinfo_S390 cpu_data; /* 0xd80 */
366 __u32 ipl_device; /* 0xdb8 */
367 __u32 pad11; /* 0xdbc */
368 /* entry.S sensitive area end */
369
370 /* SMP info area: defined by DJB */
371 __u64 clock_comparator; /* 0xdc0 */
372 __u64 ext_call_fast; /* 0xdc8 */
373 __u64 percpu_offset; /* 0xdd0 */
374 __u64 current_task; /* 0xdd8 */
375 __u32 softirq_pending; /* 0xde0 */
376 __u32 pad_0x0de4; /* 0xde4 */
377 __u64 int_clock; /* 0xde8 */
378 __u8 pad12[0xe00-0xdf0]; /* 0xdf0 */
379
380 /* 0xe00 is used as indicator for dump tools */
381 /* whether the kernel died with panic() or not */
382 __u32 panic_magic; /* 0xe00 */
383
384 __u8 pad13[0x11b8-0xe04]; /* 0xe04 */
385
386 /* 64 bit extparam used for pfault, diag 250 etc */
387 __u64 ext_params2; /* 0x11B8 */
388
389 __u8 pad14[0x1200-0x11C0]; /* 0x11C0 */
390
391 /* System info area */
392
393 __u64 floating_pt_save_area[16]; /* 0x1200 */
394 __u64 gpregs_save_area[16]; /* 0x1280 */
395 __u32 st_status_fixed_logout[4]; /* 0x1300 */
396 __u8 pad15[0x1318-0x1310]; /* 0x1310 */
397 __u32 prefixreg_save_area; /* 0x1318 */
398 __u32 fpt_creg_save_area; /* 0x131c */
399 __u8 pad16[0x1324-0x1320]; /* 0x1320 */
400 __u32 tod_progreg_save_area; /* 0x1324 */
401 __u32 cpu_timer_save_area[2]; /* 0x1328 */
402 __u32 clock_comp_save_area[2]; /* 0x1330 */
403 __u8 pad17[0x1340-0x1338]; /* 0x1338 */
404 __u32 access_regs_save_area[16]; /* 0x1340 */
405 __u64 cregs_save_area[16]; /* 0x1380 */
406
407 /* align to the top of the prefix area */
408
409 __u8 pad18[0x2000-0x1400]; /* 0x1400 */
410#endif /* !__s390x__ */
411} __attribute__((packed)); /* End structure*/
412
413#define S390_lowcore (*((struct _lowcore *) 0))
414extern struct _lowcore *lowcore_ptr[];
415
416static inline void set_prefix(__u32 address)
417{
418 asm volatile("spx %0" : : "m" (address) : "memory");
419}
420
421static inline __u32 store_prefix(void)
422{
423 __u32 address;
424
425 asm volatile("stpx %0" : "=m" (address));
426 return address;
427}
428
429#define __PANIC_MAGIC 0xDEADC0DE
430
431#endif
432
433#endif
diff --git a/include/asm-s390/mathemu.h b/include/asm-s390/mathemu.h
deleted file mode 100644
index e8dd1ba8edb0..000000000000
--- a/include/asm-s390/mathemu.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * arch/s390/kernel/mathemu.h
3 * IEEE floating point emulation.
4 *
5 * S390 version
6 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
8 */
9
10#ifndef __MATHEMU__
11#define __MATHEMU__
12
13extern int math_emu_b3(__u8 *, struct pt_regs *);
14extern int math_emu_ed(__u8 *, struct pt_regs *);
15extern int math_emu_ldr(__u8 *);
16extern int math_emu_ler(__u8 *);
17extern int math_emu_std(__u8 *, struct pt_regs *);
18extern int math_emu_ld(__u8 *, struct pt_regs *);
19extern int math_emu_ste(__u8 *, struct pt_regs *);
20extern int math_emu_le(__u8 *, struct pt_regs *);
21extern int math_emu_lfpc(__u8 *, struct pt_regs *);
22extern int math_emu_stfpc(__u8 *, struct pt_regs *);
23extern int math_emu_srnm(__u8 *, struct pt_regs *);
24
25#endif /* __MATHEMU__ */
26
27
28
29
diff --git a/include/asm-s390/mman.h b/include/asm-s390/mman.h
deleted file mode 100644
index 7839767d837e..000000000000
--- a/include/asm-s390/mman.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * include/asm-s390/mman.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/mman.h"
7 */
8
9#ifndef __S390_MMAN_H__
10#define __S390_MMAN_H__
11
12#include <asm-generic/mman.h>
13
14#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
15#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
16#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
17#define MAP_LOCKED 0x2000 /* pages are locked */
18#define MAP_NORESERVE 0x4000 /* don't check for reservations */
19#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
20#define MAP_NONBLOCK 0x10000 /* do not block on IO */
21
22#define MCL_CURRENT 1 /* lock all current mappings */
23#define MCL_FUTURE 2 /* lock all future mappings */
24
25#endif /* __S390_MMAN_H__ */
diff --git a/include/asm-s390/mmu.h b/include/asm-s390/mmu.h
deleted file mode 100644
index 5dd5e7b3476f..000000000000
--- a/include/asm-s390/mmu.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __MMU_H
2#define __MMU_H
3
4typedef struct {
5 struct list_head crst_list;
6 struct list_head pgtable_list;
7 unsigned long asce_bits;
8 unsigned long asce_limit;
9 int noexec;
10 int pgstes;
11} mm_context_t;
12
13#endif
diff --git a/include/asm-s390/mmu_context.h b/include/asm-s390/mmu_context.h
deleted file mode 100644
index 4c2fbf48c9c4..000000000000
--- a/include/asm-s390/mmu_context.h
+++ /dev/null
@@ -1,77 +0,0 @@
1/*
2 * include/asm-s390/mmu_context.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/mmu_context.h"
7 */
8
9#ifndef __S390_MMU_CONTEXT_H
10#define __S390_MMU_CONTEXT_H
11
12#include <asm/pgalloc.h>
13#include <asm/uaccess.h>
14#include <asm-generic/mm_hooks.h>
15
16static inline int init_new_context(struct task_struct *tsk,
17 struct mm_struct *mm)
18{
19 mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
20#ifdef CONFIG_64BIT
21 mm->context.asce_bits |= _ASCE_TYPE_REGION3;
22#endif
23 if (current->mm->context.pgstes) {
24 mm->context.noexec = 0;
25 mm->context.pgstes = 1;
26 } else {
27 mm->context.noexec = s390_noexec;
28 mm->context.pgstes = 0;
29 }
30 mm->context.asce_limit = STACK_TOP_MAX;
31 crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
32 return 0;
33}
34
35#define destroy_context(mm) do { } while (0)
36
37#ifndef __s390x__
38#define LCTL_OPCODE "lctl"
39#else
40#define LCTL_OPCODE "lctlg"
41#endif
42
43static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk)
44{
45 pgd_t *pgd = mm->pgd;
46
47 S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd);
48 if (switch_amode) {
49 /* Load primary space page table origin. */
50 pgd = mm->context.noexec ? get_shadow_table(pgd) : pgd;
51 S390_lowcore.user_exec_asce = mm->context.asce_bits | __pa(pgd);
52 asm volatile(LCTL_OPCODE" 1,1,%0\n"
53 : : "m" (S390_lowcore.user_exec_asce) );
54 } else
55 /* Load home space page table origin. */
56 asm volatile(LCTL_OPCODE" 13,13,%0"
57 : : "m" (S390_lowcore.user_asce) );
58 set_fs(current->thread.mm_segment);
59}
60
61static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
62 struct task_struct *tsk)
63{
64 cpu_set(smp_processor_id(), next->cpu_vm_mask);
65 update_mm(next, tsk);
66}
67
68#define enter_lazy_tlb(mm,tsk) do { } while (0)
69#define deactivate_mm(tsk,mm) do { } while (0)
70
71static inline void activate_mm(struct mm_struct *prev,
72 struct mm_struct *next)
73{
74 switch_mm(prev, next, current);
75}
76
77#endif /* __S390_MMU_CONTEXT_H */
diff --git a/include/asm-s390/module.h b/include/asm-s390/module.h
deleted file mode 100644
index 1cc1c5af705a..000000000000
--- a/include/asm-s390/module.h
+++ /dev/null
@@ -1,46 +0,0 @@
1#ifndef _ASM_S390_MODULE_H
2#define _ASM_S390_MODULE_H
3/*
4 * This file contains the s390 architecture specific module code.
5 */
6
7struct mod_arch_syminfo
8{
9 unsigned long got_offset;
10 unsigned long plt_offset;
11 int got_initialized;
12 int plt_initialized;
13};
14
15struct mod_arch_specific
16{
17 /* Starting offset of got in the module core memory. */
18 unsigned long got_offset;
19 /* Starting offset of plt in the module core memory. */
20 unsigned long plt_offset;
21 /* Size of the got. */
22 unsigned long got_size;
23 /* Size of the plt. */
24 unsigned long plt_size;
25 /* Number of symbols in syminfo. */
26 int nsyms;
27 /* Additional symbol information (got and plt offsets). */
28 struct mod_arch_syminfo *syminfo;
29};
30
31#ifdef __s390x__
32#define ElfW(x) Elf64_ ## x
33#define ELFW(x) ELF64_ ## x
34#else
35#define ElfW(x) Elf32_ ## x
36#define ELFW(x) ELF32_ ## x
37#endif
38
39#define Elf_Addr ElfW(Addr)
40#define Elf_Rela ElfW(Rela)
41#define Elf_Shdr ElfW(Shdr)
42#define Elf_Sym ElfW(Sym)
43#define Elf_Ehdr ElfW(Ehdr)
44#define ELF_R_SYM ELFW(R_SYM)
45#define ELF_R_TYPE ELFW(R_TYPE)
46#endif /* _ASM_S390_MODULE_H */
diff --git a/include/asm-s390/monwriter.h b/include/asm-s390/monwriter.h
deleted file mode 100644
index f0cbf96c52e6..000000000000
--- a/include/asm-s390/monwriter.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * include/asm-s390/monwriter.h
3 *
4 * Copyright (C) IBM Corp. 2006
5 * Character device driver for writing z/VM APPLDATA monitor records
6 * Version 1.0
7 * Author(s): Melissa Howland <melissah@us.ibm.com>
8 *
9 */
10
11#ifndef _ASM_390_MONWRITER_H
12#define _ASM_390_MONWRITER_H
13
14/* mon_function values */
15#define MONWRITE_START_INTERVAL 0x00 /* start interval recording */
16#define MONWRITE_STOP_INTERVAL 0x01 /* stop interval or config recording */
17#define MONWRITE_GEN_EVENT 0x02 /* generate event record */
18#define MONWRITE_START_CONFIG 0x03 /* start configuration recording */
19
20/* the header the app uses in its write() data */
21struct monwrite_hdr {
22 unsigned char mon_function;
23 unsigned short applid;
24 unsigned char record_num;
25 unsigned short version;
26 unsigned short release;
27 unsigned short mod_level;
28 unsigned short datalen;
29 unsigned char hdrlen;
30
31} __attribute__((packed));
32
33#endif /* _ASM_390_MONWRITER_H */
diff --git a/include/asm-s390/msgbuf.h b/include/asm-s390/msgbuf.h
deleted file mode 100644
index 1bbdee927924..000000000000
--- a/include/asm-s390/msgbuf.h
+++ /dev/null
@@ -1,37 +0,0 @@
1#ifndef _S390_MSGBUF_H
2#define _S390_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for S/390 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17#ifndef __s390x__
18 unsigned long __unused1;
19#endif /* ! __s390x__ */
20 __kernel_time_t msg_rtime; /* last msgrcv time */
21#ifndef __s390x__
22 unsigned long __unused2;
23#endif /* ! __s390x__ */
24 __kernel_time_t msg_ctime; /* last change time */
25#ifndef __s390x__
26 unsigned long __unused3;
27#endif /* ! __s390x__ */
28 unsigned long msg_cbytes; /* current number of bytes on queue */
29 unsigned long msg_qnum; /* number of messages in queue */
30 unsigned long msg_qbytes; /* max number of bytes on queue */
31 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
32 __kernel_pid_t msg_lrpid; /* last receive pid */
33 unsigned long __unused4;
34 unsigned long __unused5;
35};
36
37#endif /* _S390_MSGBUF_H */
diff --git a/include/asm-s390/mutex.h b/include/asm-s390/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/include/asm-s390/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/include/asm-s390/page.h b/include/asm-s390/page.h
deleted file mode 100644
index 991ba939408c..000000000000
--- a/include/asm-s390/page.h
+++ /dev/null
@@ -1,155 +0,0 @@
1/*
2 * include/asm-s390/page.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 */
8
9#ifndef _S390_PAGE_H
10#define _S390_PAGE_H
11
12#include <linux/const.h>
13#include <asm/types.h>
14
15/* PAGE_SHIFT determines the page size */
16#define PAGE_SHIFT 12
17#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
18#define PAGE_MASK (~(PAGE_SIZE-1))
19#define PAGE_DEFAULT_ACC 0
20#define PAGE_DEFAULT_KEY (PAGE_DEFAULT_ACC << 4)
21
22#define HPAGE_SHIFT 20
23#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
24#define HPAGE_MASK (~(HPAGE_SIZE - 1))
25#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
26
27#define ARCH_HAS_SETCLEAR_HUGE_PTE
28#define ARCH_HAS_HUGE_PTE_TYPE
29#define ARCH_HAS_PREPARE_HUGEPAGE
30#define ARCH_HAS_HUGEPAGE_CLEAR_FLUSH
31
32#include <asm/setup.h>
33#ifndef __ASSEMBLY__
34
35static inline void clear_page(void *page)
36{
37 if (MACHINE_HAS_PFMF) {
38 asm volatile(
39 " .insn rre,0xb9af0000,%0,%1"
40 : : "d" (0x10000), "a" (page) : "memory", "cc");
41 } else {
42 register unsigned long reg1 asm ("1") = 0;
43 register void *reg2 asm ("2") = page;
44 register unsigned long reg3 asm ("3") = 4096;
45 asm volatile(
46 " mvcl 2,0"
47 : "+d" (reg2), "+d" (reg3) : "d" (reg1)
48 : "memory", "cc");
49 }
50}
51
52static inline void copy_page(void *to, void *from)
53{
54 if (MACHINE_HAS_MVPG) {
55 register unsigned long reg0 asm ("0") = 0;
56 asm volatile(
57 " mvpg %0,%1"
58 : : "a" (to), "a" (from), "d" (reg0)
59 : "memory", "cc");
60 } else
61 asm volatile(
62 " mvc 0(256,%0),0(%1)\n"
63 " mvc 256(256,%0),256(%1)\n"
64 " mvc 512(256,%0),512(%1)\n"
65 " mvc 768(256,%0),768(%1)\n"
66 " mvc 1024(256,%0),1024(%1)\n"
67 " mvc 1280(256,%0),1280(%1)\n"
68 " mvc 1536(256,%0),1536(%1)\n"
69 " mvc 1792(256,%0),1792(%1)\n"
70 " mvc 2048(256,%0),2048(%1)\n"
71 " mvc 2304(256,%0),2304(%1)\n"
72 " mvc 2560(256,%0),2560(%1)\n"
73 " mvc 2816(256,%0),2816(%1)\n"
74 " mvc 3072(256,%0),3072(%1)\n"
75 " mvc 3328(256,%0),3328(%1)\n"
76 " mvc 3584(256,%0),3584(%1)\n"
77 " mvc 3840(256,%0),3840(%1)\n"
78 : : "a" (to), "a" (from) : "memory");
79}
80
81#define clear_user_page(page, vaddr, pg) clear_page(page)
82#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
83
84#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
85 alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
86#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
87
88/*
89 * These are used to make use of C type-checking..
90 */
91
92typedef struct { unsigned long pgprot; } pgprot_t;
93typedef struct { unsigned long pte; } pte_t;
94typedef struct { unsigned long pmd; } pmd_t;
95typedef struct { unsigned long pud; } pud_t;
96typedef struct { unsigned long pgd; } pgd_t;
97typedef pte_t *pgtable_t;
98
99#define pgprot_val(x) ((x).pgprot)
100#define pte_val(x) ((x).pte)
101#define pmd_val(x) ((x).pmd)
102#define pud_val(x) ((x).pud)
103#define pgd_val(x) ((x).pgd)
104
105#define __pte(x) ((pte_t) { (x) } )
106#define __pmd(x) ((pmd_t) { (x) } )
107#define __pgd(x) ((pgd_t) { (x) } )
108#define __pgprot(x) ((pgprot_t) { (x) } )
109
110/* default storage key used for all pages */
111extern unsigned int default_storage_key;
112
113static inline void
114page_set_storage_key(unsigned long addr, unsigned int skey)
115{
116 asm volatile("sske %0,%1" : : "d" (skey), "a" (addr));
117}
118
119static inline unsigned int
120page_get_storage_key(unsigned long addr)
121{
122 unsigned int skey;
123
124 asm volatile("iske %0,%1" : "=d" (skey) : "a" (addr), "0" (0));
125 return skey;
126}
127
128#ifdef CONFIG_PAGE_STATES
129
130struct page;
131void arch_free_page(struct page *page, int order);
132void arch_alloc_page(struct page *page, int order);
133
134#define HAVE_ARCH_FREE_PAGE
135#define HAVE_ARCH_ALLOC_PAGE
136
137#endif
138
139#endif /* !__ASSEMBLY__ */
140
141#define __PAGE_OFFSET 0x0UL
142#define PAGE_OFFSET 0x0UL
143#define __pa(x) (unsigned long)(x)
144#define __va(x) (void *)(unsigned long)(x)
145#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
146#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
147#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
148
149#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
150 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
151
152#include <asm-generic/memory_model.h>
153#include <asm-generic/page.h>
154
155#endif /* _S390_PAGE_H */
diff --git a/include/asm-s390/param.h b/include/asm-s390/param.h
deleted file mode 100644
index 34aaa4603347..000000000000
--- a/include/asm-s390/param.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * include/asm-s390/param.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/param.h"
7 */
8
9#ifndef _ASMS390_PARAM_H
10#define _ASMS390_PARAM_H
11
12#ifdef __KERNEL__
13# define HZ CONFIG_HZ /* Internal kernel timer frequency */
14# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
15# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
16#endif
17
18#ifndef HZ
19#define HZ 100
20#endif
21
22#define EXEC_PAGESIZE 4096
23
24#ifndef NOGROUP
25#define NOGROUP (-1)
26#endif
27
28#define MAXHOSTNAMELEN 64 /* max length of hostname */
29
30#endif
diff --git a/include/asm-s390/pci.h b/include/asm-s390/pci.h
deleted file mode 100644
index 42a145c9ddd6..000000000000
--- a/include/asm-s390/pci.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef __ASM_S390_PCI_H
2#define __ASM_S390_PCI_H
3
4/* S/390 systems don't have a PCI bus. This file is just here because some stupid .c code
5 * includes it even if CONFIG_PCI is not set.
6 */
7#define PCI_DMA_BUS_IS_PHYS (0)
8
9#endif /* __ASM_S390_PCI_H */
10
diff --git a/include/asm-s390/percpu.h b/include/asm-s390/percpu.h
deleted file mode 100644
index 408d60b4f75b..000000000000
--- a/include/asm-s390/percpu.h
+++ /dev/null
@@ -1,37 +0,0 @@
1#ifndef __ARCH_S390_PERCPU__
2#define __ARCH_S390_PERCPU__
3
4#include <linux/compiler.h>
5#include <asm/lowcore.h>
6
7/*
8 * s390 uses its own implementation for per cpu data, the offset of
9 * the cpu local data area is cached in the cpu's lowcore memory.
10 * For 64 bit module code s390 forces the use of a GOT slot for the
11 * address of the per cpu variable. This is needed because the module
12 * may be more than 4G above the per cpu area.
13 */
14#if defined(__s390x__) && defined(MODULE)
15
16#define SHIFT_PERCPU_PTR(ptr,offset) (({ \
17 extern int simple_identifier_##var(void); \
18 unsigned long *__ptr; \
19 asm ( "larl %0, %1@GOTENT" \
20 : "=a" (__ptr) : "X" (ptr) ); \
21 (typeof(ptr))((*__ptr) + (offset)); }))
22
23#else
24
25#define SHIFT_PERCPU_PTR(ptr, offset) (({ \
26 extern int simple_identifier_##var(void); \
27 unsigned long __ptr; \
28 asm ( "" : "=a" (__ptr) : "0" (ptr) ); \
29 (typeof(ptr)) (__ptr + (offset)); }))
30
31#endif
32
33#define __my_cpu_offset S390_lowcore.percpu_offset
34
35#include <asm-generic/percpu.h>
36
37#endif /* __ARCH_S390_PERCPU__ */
diff --git a/include/asm-s390/pgalloc.h b/include/asm-s390/pgalloc.h
deleted file mode 100644
index f5b2bf3d7c1d..000000000000
--- a/include/asm-s390/pgalloc.h
+++ /dev/null
@@ -1,174 +0,0 @@
1/*
2 * include/asm-s390/pgalloc.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 *
9 * Derived from "include/asm-i386/pgalloc.h"
10 * Copyright (C) 1994 Linus Torvalds
11 */
12
13#ifndef _S390_PGALLOC_H
14#define _S390_PGALLOC_H
15
16#include <linux/threads.h>
17#include <linux/gfp.h>
18#include <linux/mm.h>
19
20#define check_pgt_cache() do {} while (0)
21
22unsigned long *crst_table_alloc(struct mm_struct *, int);
23void crst_table_free(struct mm_struct *, unsigned long *);
24
25unsigned long *page_table_alloc(struct mm_struct *);
26void page_table_free(struct mm_struct *, unsigned long *);
27void disable_noexec(struct mm_struct *, struct task_struct *);
28
29static inline void clear_table(unsigned long *s, unsigned long val, size_t n)
30{
31 *s = val;
32 n = (n / 256) - 1;
33 asm volatile(
34#ifdef CONFIG_64BIT
35 " mvc 8(248,%0),0(%0)\n"
36#else
37 " mvc 4(252,%0),0(%0)\n"
38#endif
39 "0: mvc 256(256,%0),0(%0)\n"
40 " la %0,256(%0)\n"
41 " brct %1,0b\n"
42 : "+a" (s), "+d" (n));
43}
44
45static inline void crst_table_init(unsigned long *crst, unsigned long entry)
46{
47 clear_table(crst, entry, sizeof(unsigned long)*2048);
48 crst = get_shadow_table(crst);
49 if (crst)
50 clear_table(crst, entry, sizeof(unsigned long)*2048);
51}
52
53#ifndef __s390x__
54
55static inline unsigned long pgd_entry_type(struct mm_struct *mm)
56{
57 return _SEGMENT_ENTRY_EMPTY;
58}
59
60#define pud_alloc_one(mm,address) ({ BUG(); ((pud_t *)2); })
61#define pud_free(mm, x) do { } while (0)
62
63#define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); })
64#define pmd_free(mm, x) do { } while (0)
65
66#define pgd_populate(mm, pgd, pud) BUG()
67#define pgd_populate_kernel(mm, pgd, pud) BUG()
68
69#define pud_populate(mm, pud, pmd) BUG()
70#define pud_populate_kernel(mm, pud, pmd) BUG()
71
72#else /* __s390x__ */
73
74static inline unsigned long pgd_entry_type(struct mm_struct *mm)
75{
76 if (mm->context.asce_limit <= (1UL << 31))
77 return _SEGMENT_ENTRY_EMPTY;
78 if (mm->context.asce_limit <= (1UL << 42))
79 return _REGION3_ENTRY_EMPTY;
80 return _REGION2_ENTRY_EMPTY;
81}
82
83int crst_table_upgrade(struct mm_struct *, unsigned long limit);
84void crst_table_downgrade(struct mm_struct *, unsigned long limit);
85
86static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long address)
87{
88 unsigned long *table = crst_table_alloc(mm, mm->context.noexec);
89 if (table)
90 crst_table_init(table, _REGION3_ENTRY_EMPTY);
91 return (pud_t *) table;
92}
93#define pud_free(mm, pud) crst_table_free(mm, (unsigned long *) pud)
94
95static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long vmaddr)
96{
97 unsigned long *table = crst_table_alloc(mm, mm->context.noexec);
98 if (table)
99 crst_table_init(table, _SEGMENT_ENTRY_EMPTY);
100 return (pmd_t *) table;
101}
102#define pmd_free(mm, pmd) crst_table_free(mm, (unsigned long *) pmd)
103
104static inline void pgd_populate_kernel(struct mm_struct *mm,
105 pgd_t *pgd, pud_t *pud)
106{
107 pgd_val(*pgd) = _REGION2_ENTRY | __pa(pud);
108}
109
110static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)
111{
112 pgd_populate_kernel(mm, pgd, pud);
113 if (mm->context.noexec) {
114 pgd = get_shadow_table(pgd);
115 pud = get_shadow_table(pud);
116 pgd_populate_kernel(mm, pgd, pud);
117 }
118}
119
120static inline void pud_populate_kernel(struct mm_struct *mm,
121 pud_t *pud, pmd_t *pmd)
122{
123 pud_val(*pud) = _REGION3_ENTRY | __pa(pmd);
124}
125
126static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
127{
128 pud_populate_kernel(mm, pud, pmd);
129 if (mm->context.noexec) {
130 pud = get_shadow_table(pud);
131 pmd = get_shadow_table(pmd);
132 pud_populate_kernel(mm, pud, pmd);
133 }
134}
135
136#endif /* __s390x__ */
137
138static inline pgd_t *pgd_alloc(struct mm_struct *mm)
139{
140 INIT_LIST_HEAD(&mm->context.crst_list);
141 INIT_LIST_HEAD(&mm->context.pgtable_list);
142 return (pgd_t *) crst_table_alloc(mm, s390_noexec);
143}
144#define pgd_free(mm, pgd) crst_table_free(mm, (unsigned long *) pgd)
145
146static inline void pmd_populate_kernel(struct mm_struct *mm,
147 pmd_t *pmd, pte_t *pte)
148{
149 pmd_val(*pmd) = _SEGMENT_ENTRY + __pa(pte);
150}
151
152static inline void pmd_populate(struct mm_struct *mm,
153 pmd_t *pmd, pgtable_t pte)
154{
155 pmd_populate_kernel(mm, pmd, pte);
156 if (mm->context.noexec) {
157 pmd = get_shadow_table(pmd);
158 pmd_populate_kernel(mm, pmd, pte + PTRS_PER_PTE);
159 }
160}
161
162#define pmd_pgtable(pmd) \
163 (pgtable_t)(pmd_val(pmd) & -sizeof(pte_t)*PTRS_PER_PTE)
164
165/*
166 * page table entry allocation/free routines.
167 */
168#define pte_alloc_one_kernel(mm, vmaddr) ((pte_t *) page_table_alloc(mm))
169#define pte_alloc_one(mm, vmaddr) ((pte_t *) page_table_alloc(mm))
170
171#define pte_free_kernel(mm, pte) page_table_free(mm, (unsigned long *) pte)
172#define pte_free(mm, pte) page_table_free(mm, (unsigned long *) pte)
173
174#endif /* _S390_PGALLOC_H */
diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h
deleted file mode 100644
index 0bdb704ae051..000000000000
--- a/include/asm-s390/pgtable.h
+++ /dev/null
@@ -1,1093 +0,0 @@
1/*
2 * include/asm-s390/pgtable.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 *
10 * Derived from "include/asm-i386/pgtable.h"
11 */
12
13#ifndef _ASM_S390_PGTABLE_H
14#define _ASM_S390_PGTABLE_H
15
16/*
17 * The Linux memory management assumes a three-level page table setup. For
18 * s390 31 bit we "fold" the mid level into the top-level page table, so
19 * that we physically have the same two-level page table as the s390 mmu
20 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
21 * the hardware provides (region first and region second tables are not
22 * used).
23 *
24 * The "pgd_xxx()" functions are trivial for a folded two-level
25 * setup: the pgd is never bad, and a pmd always exists (as it's folded
26 * into the pgd entry)
27 *
28 * This file contains the functions and defines necessary to modify and use
29 * the S390 page table tree.
30 */
31#ifndef __ASSEMBLY__
32#include <linux/sched.h>
33#include <linux/mm_types.h>
34#include <asm/bitops.h>
35#include <asm/bug.h>
36#include <asm/processor.h>
37
38extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
39extern void paging_init(void);
40extern void vmem_map_init(void);
41
42/*
43 * The S390 doesn't have any external MMU info: the kernel page
44 * tables contain all the necessary information.
45 */
46#define update_mmu_cache(vma, address, pte) do { } while (0)
47
48/*
49 * ZERO_PAGE is a global shared page that is always zero: used
50 * for zero-mapped memory areas etc..
51 */
52extern char empty_zero_page[PAGE_SIZE];
53#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
54#endif /* !__ASSEMBLY__ */
55
56/*
57 * PMD_SHIFT determines the size of the area a second-level page
58 * table can map
59 * PGDIR_SHIFT determines what a third-level page table entry can map
60 */
61#ifndef __s390x__
62# define PMD_SHIFT 20
63# define PUD_SHIFT 20
64# define PGDIR_SHIFT 20
65#else /* __s390x__ */
66# define PMD_SHIFT 20
67# define PUD_SHIFT 31
68# define PGDIR_SHIFT 42
69#endif /* __s390x__ */
70
71#define PMD_SIZE (1UL << PMD_SHIFT)
72#define PMD_MASK (~(PMD_SIZE-1))
73#define PUD_SIZE (1UL << PUD_SHIFT)
74#define PUD_MASK (~(PUD_SIZE-1))
75#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
76#define PGDIR_MASK (~(PGDIR_SIZE-1))
77
78/*
79 * entries per page directory level: the S390 is two-level, so
80 * we don't really have any PMD directory physically.
81 * for S390 segment-table entries are combined to one PGD
82 * that leads to 1024 pte per pgd
83 */
84#define PTRS_PER_PTE 256
85#ifndef __s390x__
86#define PTRS_PER_PMD 1
87#define PTRS_PER_PUD 1
88#else /* __s390x__ */
89#define PTRS_PER_PMD 2048
90#define PTRS_PER_PUD 2048
91#endif /* __s390x__ */
92#define PTRS_PER_PGD 2048
93
94#define FIRST_USER_ADDRESS 0
95
96#define pte_ERROR(e) \
97 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
98#define pmd_ERROR(e) \
99 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
100#define pud_ERROR(e) \
101 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
102#define pgd_ERROR(e) \
103 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
104
105#ifndef __ASSEMBLY__
106/*
107 * The vmalloc area will always be on the topmost area of the kernel
108 * mapping. We reserve 96MB (31bit) / 1GB (64bit) for vmalloc,
109 * which should be enough for any sane case.
110 * By putting vmalloc at the top, we maximise the gap between physical
111 * memory and vmalloc to catch misplaced memory accesses. As a side
112 * effect, this also makes sure that 64 bit module code cannot be used
113 * as system call address.
114 */
115#ifndef __s390x__
116#define VMALLOC_START 0x78000000UL
117#define VMALLOC_END 0x7e000000UL
118#define VMEM_MAP_END 0x80000000UL
119#else /* __s390x__ */
120#define VMALLOC_START 0x3e000000000UL
121#define VMALLOC_END 0x3e040000000UL
122#define VMEM_MAP_END 0x40000000000UL
123#endif /* __s390x__ */
124
125/*
126 * VMEM_MAX_PHYS is the highest physical address that can be added to the 1:1
127 * mapping. This needs to be calculated at compile time since the size of the
128 * VMEM_MAP is static but the size of struct page can change.
129 */
130#define VMEM_MAX_PAGES ((VMEM_MAP_END - VMALLOC_END) / sizeof(struct page))
131#define VMEM_MAX_PFN min(VMALLOC_START >> PAGE_SHIFT, VMEM_MAX_PAGES)
132#define VMEM_MAX_PHYS ((VMEM_MAX_PFN << PAGE_SHIFT) & ~((16 << 20) - 1))
133#define vmemmap ((struct page *) VMALLOC_END)
134
135/*
136 * A 31 bit pagetable entry of S390 has following format:
137 * | PFRA | | OS |
138 * 0 0IP0
139 * 00000000001111111111222222222233
140 * 01234567890123456789012345678901
141 *
142 * I Page-Invalid Bit: Page is not available for address-translation
143 * P Page-Protection Bit: Store access not possible for page
144 *
145 * A 31 bit segmenttable entry of S390 has following format:
146 * | P-table origin | |PTL
147 * 0 IC
148 * 00000000001111111111222222222233
149 * 01234567890123456789012345678901
150 *
151 * I Segment-Invalid Bit: Segment is not available for address-translation
152 * C Common-Segment Bit: Segment is not private (PoP 3-30)
153 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
154 *
155 * The 31 bit segmenttable origin of S390 has following format:
156 *
157 * |S-table origin | | STL |
158 * X **GPS
159 * 00000000001111111111222222222233
160 * 01234567890123456789012345678901
161 *
162 * X Space-Switch event:
163 * G Segment-Invalid Bit: *
164 * P Private-Space Bit: Segment is not private (PoP 3-30)
165 * S Storage-Alteration:
166 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
167 *
168 * A 64 bit pagetable entry of S390 has following format:
169 * | PFRA |0IP0| OS |
170 * 0000000000111111111122222222223333333333444444444455555555556666
171 * 0123456789012345678901234567890123456789012345678901234567890123
172 *
173 * I Page-Invalid Bit: Page is not available for address-translation
174 * P Page-Protection Bit: Store access not possible for page
175 *
176 * A 64 bit segmenttable entry of S390 has following format:
177 * | P-table origin | TT
178 * 0000000000111111111122222222223333333333444444444455555555556666
179 * 0123456789012345678901234567890123456789012345678901234567890123
180 *
181 * I Segment-Invalid Bit: Segment is not available for address-translation
182 * C Common-Segment Bit: Segment is not private (PoP 3-30)
183 * P Page-Protection Bit: Store access not possible for page
184 * TT Type 00
185 *
186 * A 64 bit region table entry of S390 has following format:
187 * | S-table origin | TF TTTL
188 * 0000000000111111111122222222223333333333444444444455555555556666
189 * 0123456789012345678901234567890123456789012345678901234567890123
190 *
191 * I Segment-Invalid Bit: Segment is not available for address-translation
192 * TT Type 01
193 * TF
194 * TL Table length
195 *
196 * The 64 bit regiontable origin of S390 has following format:
197 * | region table origon | DTTL
198 * 0000000000111111111122222222223333333333444444444455555555556666
199 * 0123456789012345678901234567890123456789012345678901234567890123
200 *
201 * X Space-Switch event:
202 * G Segment-Invalid Bit:
203 * P Private-Space Bit:
204 * S Storage-Alteration:
205 * R Real space
206 * TL Table-Length:
207 *
208 * A storage key has the following format:
209 * | ACC |F|R|C|0|
210 * 0 3 4 5 6 7
211 * ACC: access key
212 * F : fetch protection bit
213 * R : referenced bit
214 * C : changed bit
215 */
216
217/* Hardware bits in the page table entry */
218#define _PAGE_RO 0x200 /* HW read-only bit */
219#define _PAGE_INVALID 0x400 /* HW invalid bit */
220
221/* Software bits in the page table entry */
222#define _PAGE_SWT 0x001 /* SW pte type bit t */
223#define _PAGE_SWX 0x002 /* SW pte type bit x */
224#define _PAGE_SPECIAL 0x004 /* SW associated with special page */
225#define __HAVE_ARCH_PTE_SPECIAL
226
227/* Set of bits not changed in pte_modify */
228#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL)
229
230/* Six different types of pages. */
231#define _PAGE_TYPE_EMPTY 0x400
232#define _PAGE_TYPE_NONE 0x401
233#define _PAGE_TYPE_SWAP 0x403
234#define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
235#define _PAGE_TYPE_RO 0x200
236#define _PAGE_TYPE_RW 0x000
237#define _PAGE_TYPE_EX_RO 0x202
238#define _PAGE_TYPE_EX_RW 0x002
239
240/*
241 * Only four types for huge pages, using the invalid bit and protection bit
242 * of a segment table entry.
243 */
244#define _HPAGE_TYPE_EMPTY 0x020 /* _SEGMENT_ENTRY_INV */
245#define _HPAGE_TYPE_NONE 0x220
246#define _HPAGE_TYPE_RO 0x200 /* _SEGMENT_ENTRY_RO */
247#define _HPAGE_TYPE_RW 0x000
248
249/*
250 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
251 * pte_none and pte_file to find out the pte type WITHOUT holding the page
252 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
253 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
254 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
255 * This change is done while holding the lock, but the intermediate step
256 * of a previously valid pte with the hw invalid bit set can be observed by
257 * handle_pte_fault. That makes it necessary that all valid pte types with
258 * the hw invalid bit set must be distinguishable from the four pte types
259 * empty, none, swap and file.
260 *
261 * irxt ipte irxt
262 * _PAGE_TYPE_EMPTY 1000 -> 1000
263 * _PAGE_TYPE_NONE 1001 -> 1001
264 * _PAGE_TYPE_SWAP 1011 -> 1011
265 * _PAGE_TYPE_FILE 11?1 -> 11?1
266 * _PAGE_TYPE_RO 0100 -> 1100
267 * _PAGE_TYPE_RW 0000 -> 1000
268 * _PAGE_TYPE_EX_RO 0110 -> 1110
269 * _PAGE_TYPE_EX_RW 0010 -> 1010
270 *
271 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
272 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
273 * pte_file is true for bits combinations 1101, 1111
274 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
275 */
276
277/* Page status table bits for virtualization */
278#define RCP_PCL_BIT 55
279#define RCP_HR_BIT 54
280#define RCP_HC_BIT 53
281#define RCP_GR_BIT 50
282#define RCP_GC_BIT 49
283
284#ifndef __s390x__
285
286/* Bits in the segment table address-space-control-element */
287#define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
288#define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
289#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
290#define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
291#define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
292
293/* Bits in the segment table entry */
294#define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
295#define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
296#define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
297#define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
298
299#define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
300#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
301
302#else /* __s390x__ */
303
304/* Bits in the segment/region table address-space-control-element */
305#define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
306#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
307#define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
308#define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
309#define _ASCE_REAL_SPACE 0x20 /* real space control */
310#define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
311#define _ASCE_TYPE_REGION1 0x0c /* region first table type */
312#define _ASCE_TYPE_REGION2 0x08 /* region second table type */
313#define _ASCE_TYPE_REGION3 0x04 /* region third table type */
314#define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
315#define _ASCE_TABLE_LENGTH 0x03 /* region table length */
316
317/* Bits in the region table entry */
318#define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
319#define _REGION_ENTRY_INV 0x20 /* invalid region table entry */
320#define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
321#define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
322#define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
323#define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
324#define _REGION_ENTRY_LENGTH 0x03 /* region third length */
325
326#define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
327#define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INV)
328#define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
329#define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INV)
330#define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
331#define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INV)
332
333/* Bits in the segment table entry */
334#define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
335#define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
336#define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
337
338#define _SEGMENT_ENTRY (0)
339#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
340
341#define _SEGMENT_ENTRY_LARGE 0x400 /* STE-format control, large page */
342#define _SEGMENT_ENTRY_CO 0x100 /* change-recording override */
343
344#endif /* __s390x__ */
345
346/*
347 * A user page table pointer has the space-switch-event bit, the
348 * private-space-control bit and the storage-alteration-event-control
349 * bit set. A kernel page table pointer doesn't need them.
350 */
351#define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
352 _ASCE_ALT_EVENT)
353
354/* Bits int the storage key */
355#define _PAGE_CHANGED 0x02 /* HW changed bit */
356#define _PAGE_REFERENCED 0x04 /* HW referenced bit */
357
358/*
359 * Page protection definitions.
360 */
361#define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
362#define PAGE_RO __pgprot(_PAGE_TYPE_RO)
363#define PAGE_RW __pgprot(_PAGE_TYPE_RW)
364#define PAGE_EX_RO __pgprot(_PAGE_TYPE_EX_RO)
365#define PAGE_EX_RW __pgprot(_PAGE_TYPE_EX_RW)
366
367#define PAGE_KERNEL PAGE_RW
368#define PAGE_COPY PAGE_RO
369
370/*
371 * Dependent on the EXEC_PROTECT option s390 can do execute protection.
372 * Write permission always implies read permission. In theory with a
373 * primary/secondary page table execute only can be implemented but
374 * it would cost an additional bit in the pte to distinguish all the
375 * different pte types. To avoid that execute permission currently
376 * implies read permission as well.
377 */
378 /*xwr*/
379#define __P000 PAGE_NONE
380#define __P001 PAGE_RO
381#define __P010 PAGE_RO
382#define __P011 PAGE_RO
383#define __P100 PAGE_EX_RO
384#define __P101 PAGE_EX_RO
385#define __P110 PAGE_EX_RO
386#define __P111 PAGE_EX_RO
387
388#define __S000 PAGE_NONE
389#define __S001 PAGE_RO
390#define __S010 PAGE_RW
391#define __S011 PAGE_RW
392#define __S100 PAGE_EX_RO
393#define __S101 PAGE_EX_RO
394#define __S110 PAGE_EX_RW
395#define __S111 PAGE_EX_RW
396
397#ifndef __s390x__
398# define PxD_SHADOW_SHIFT 1
399#else /* __s390x__ */
400# define PxD_SHADOW_SHIFT 2
401#endif /* __s390x__ */
402
403static inline void *get_shadow_table(void *table)
404{
405 unsigned long addr, offset;
406 struct page *page;
407
408 addr = (unsigned long) table;
409 offset = addr & ((PAGE_SIZE << PxD_SHADOW_SHIFT) - 1);
410 page = virt_to_page((void *)(addr ^ offset));
411 return (void *)(addr_t)(page->index ? (page->index | offset) : 0UL);
412}
413
414/*
415 * Certain architectures need to do special things when PTEs
416 * within a page table are directly modified. Thus, the following
417 * hook is made available.
418 */
419static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
420 pte_t *ptep, pte_t entry)
421{
422 *ptep = entry;
423 if (mm->context.noexec) {
424 if (!(pte_val(entry) & _PAGE_INVALID) &&
425 (pte_val(entry) & _PAGE_SWX))
426 pte_val(entry) |= _PAGE_RO;
427 else
428 pte_val(entry) = _PAGE_TYPE_EMPTY;
429 ptep[PTRS_PER_PTE] = entry;
430 }
431}
432
433/*
434 * pgd/pmd/pte query functions
435 */
436#ifndef __s390x__
437
438static inline int pgd_present(pgd_t pgd) { return 1; }
439static inline int pgd_none(pgd_t pgd) { return 0; }
440static inline int pgd_bad(pgd_t pgd) { return 0; }
441
442static inline int pud_present(pud_t pud) { return 1; }
443static inline int pud_none(pud_t pud) { return 0; }
444static inline int pud_bad(pud_t pud) { return 0; }
445
446#else /* __s390x__ */
447
448static inline int pgd_present(pgd_t pgd)
449{
450 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
451 return 1;
452 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
453}
454
455static inline int pgd_none(pgd_t pgd)
456{
457 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
458 return 0;
459 return (pgd_val(pgd) & _REGION_ENTRY_INV) != 0UL;
460}
461
462static inline int pgd_bad(pgd_t pgd)
463{
464 /*
465 * With dynamic page table levels the pgd can be a region table
466 * entry or a segment table entry. Check for the bit that are
467 * invalid for either table entry.
468 */
469 unsigned long mask =
470 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
471 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
472 return (pgd_val(pgd) & mask) != 0;
473}
474
475static inline int pud_present(pud_t pud)
476{
477 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
478 return 1;
479 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
480}
481
482static inline int pud_none(pud_t pud)
483{
484 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
485 return 0;
486 return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL;
487}
488
489static inline int pud_bad(pud_t pud)
490{
491 /*
492 * With dynamic page table levels the pud can be a region table
493 * entry or a segment table entry. Check for the bit that are
494 * invalid for either table entry.
495 */
496 unsigned long mask =
497 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
498 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
499 return (pud_val(pud) & mask) != 0;
500}
501
502#endif /* __s390x__ */
503
504static inline int pmd_present(pmd_t pmd)
505{
506 return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
507}
508
509static inline int pmd_none(pmd_t pmd)
510{
511 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
512}
513
514static inline int pmd_bad(pmd_t pmd)
515{
516 unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV;
517 return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY;
518}
519
520static inline int pte_none(pte_t pte)
521{
522 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
523}
524
525static inline int pte_present(pte_t pte)
526{
527 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
528 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
529 (!(pte_val(pte) & _PAGE_INVALID) &&
530 !(pte_val(pte) & _PAGE_SWT));
531}
532
533static inline int pte_file(pte_t pte)
534{
535 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
536 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
537}
538
539static inline int pte_special(pte_t pte)
540{
541 return (pte_val(pte) & _PAGE_SPECIAL);
542}
543
544#define __HAVE_ARCH_PTE_SAME
545#define pte_same(a,b) (pte_val(a) == pte_val(b))
546
547static inline void rcp_lock(pte_t *ptep)
548{
549#ifdef CONFIG_PGSTE
550 unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
551 preempt_disable();
552 while (test_and_set_bit(RCP_PCL_BIT, pgste))
553 ;
554#endif
555}
556
557static inline void rcp_unlock(pte_t *ptep)
558{
559#ifdef CONFIG_PGSTE
560 unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
561 clear_bit(RCP_PCL_BIT, pgste);
562 preempt_enable();
563#endif
564}
565
566/* forward declaration for SetPageUptodate in page-flags.h*/
567static inline void page_clear_dirty(struct page *page);
568#include <linux/page-flags.h>
569
570static inline void ptep_rcp_copy(pte_t *ptep)
571{
572#ifdef CONFIG_PGSTE
573 struct page *page = virt_to_page(pte_val(*ptep));
574 unsigned int skey;
575 unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
576
577 skey = page_get_storage_key(page_to_phys(page));
578 if (skey & _PAGE_CHANGED)
579 set_bit_simple(RCP_GC_BIT, pgste);
580 if (skey & _PAGE_REFERENCED)
581 set_bit_simple(RCP_GR_BIT, pgste);
582 if (test_and_clear_bit_simple(RCP_HC_BIT, pgste))
583 SetPageDirty(page);
584 if (test_and_clear_bit_simple(RCP_HR_BIT, pgste))
585 SetPageReferenced(page);
586#endif
587}
588
589/*
590 * query functions pte_write/pte_dirty/pte_young only work if
591 * pte_present() is true. Undefined behaviour if not..
592 */
593static inline int pte_write(pte_t pte)
594{
595 return (pte_val(pte) & _PAGE_RO) == 0;
596}
597
598static inline int pte_dirty(pte_t pte)
599{
600 /* A pte is neither clean nor dirty on s/390. The dirty bit
601 * is in the storage key. See page_test_and_clear_dirty for
602 * details.
603 */
604 return 0;
605}
606
607static inline int pte_young(pte_t pte)
608{
609 /* A pte is neither young nor old on s/390. The young bit
610 * is in the storage key. See page_test_and_clear_young for
611 * details.
612 */
613 return 0;
614}
615
616/*
617 * pgd/pmd/pte modification functions
618 */
619
620#ifndef __s390x__
621
622#define pgd_clear(pgd) do { } while (0)
623#define pud_clear(pud) do { } while (0)
624
625#else /* __s390x__ */
626
627static inline void pgd_clear_kernel(pgd_t * pgd)
628{
629 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
630 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
631}
632
633static inline void pgd_clear(pgd_t * pgd)
634{
635 pgd_t *shadow = get_shadow_table(pgd);
636
637 pgd_clear_kernel(pgd);
638 if (shadow)
639 pgd_clear_kernel(shadow);
640}
641
642static inline void pud_clear_kernel(pud_t *pud)
643{
644 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
645 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
646}
647
648static inline void pud_clear(pud_t *pud)
649{
650 pud_t *shadow = get_shadow_table(pud);
651
652 pud_clear_kernel(pud);
653 if (shadow)
654 pud_clear_kernel(shadow);
655}
656
657#endif /* __s390x__ */
658
659static inline void pmd_clear_kernel(pmd_t * pmdp)
660{
661 pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
662}
663
664static inline void pmd_clear(pmd_t *pmd)
665{
666 pmd_t *shadow = get_shadow_table(pmd);
667
668 pmd_clear_kernel(pmd);
669 if (shadow)
670 pmd_clear_kernel(shadow);
671}
672
673static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
674{
675 if (mm->context.pgstes)
676 ptep_rcp_copy(ptep);
677 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
678 if (mm->context.noexec)
679 pte_val(ptep[PTRS_PER_PTE]) = _PAGE_TYPE_EMPTY;
680}
681
682/*
683 * The following pte modification functions only work if
684 * pte_present() is true. Undefined behaviour if not..
685 */
686static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
687{
688 pte_val(pte) &= _PAGE_CHG_MASK;
689 pte_val(pte) |= pgprot_val(newprot);
690 return pte;
691}
692
693static inline pte_t pte_wrprotect(pte_t pte)
694{
695 /* Do not clobber _PAGE_TYPE_NONE pages! */
696 if (!(pte_val(pte) & _PAGE_INVALID))
697 pte_val(pte) |= _PAGE_RO;
698 return pte;
699}
700
701static inline pte_t pte_mkwrite(pte_t pte)
702{
703 pte_val(pte) &= ~_PAGE_RO;
704 return pte;
705}
706
707static inline pte_t pte_mkclean(pte_t pte)
708{
709 /* The only user of pte_mkclean is the fork() code.
710 We must *not* clear the *physical* page dirty bit
711 just because fork() wants to clear the dirty bit in
712 *one* of the page's mappings. So we just do nothing. */
713 return pte;
714}
715
716static inline pte_t pte_mkdirty(pte_t pte)
717{
718 /* We do not explicitly set the dirty bit because the
719 * sske instruction is slow. It is faster to let the
720 * next instruction set the dirty bit.
721 */
722 return pte;
723}
724
725static inline pte_t pte_mkold(pte_t pte)
726{
727 /* S/390 doesn't keep its dirty/referenced bit in the pte.
728 * There is no point in clearing the real referenced bit.
729 */
730 return pte;
731}
732
733static inline pte_t pte_mkyoung(pte_t pte)
734{
735 /* S/390 doesn't keep its dirty/referenced bit in the pte.
736 * There is no point in setting the real referenced bit.
737 */
738 return pte;
739}
740
741static inline pte_t pte_mkspecial(pte_t pte)
742{
743 pte_val(pte) |= _PAGE_SPECIAL;
744 return pte;
745}
746
747#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
748static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
749 unsigned long addr, pte_t *ptep)
750{
751#ifdef CONFIG_PGSTE
752 unsigned long physpage;
753 int young;
754 unsigned long *pgste;
755
756 if (!vma->vm_mm->context.pgstes)
757 return 0;
758 physpage = pte_val(*ptep) & PAGE_MASK;
759 pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
760
761 young = ((page_get_storage_key(physpage) & _PAGE_REFERENCED) != 0);
762 rcp_lock(ptep);
763 if (young)
764 set_bit_simple(RCP_GR_BIT, pgste);
765 young |= test_and_clear_bit_simple(RCP_HR_BIT, pgste);
766 rcp_unlock(ptep);
767 return young;
768#endif
769 return 0;
770}
771
772#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
773static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
774 unsigned long address, pte_t *ptep)
775{
776 /* No need to flush TLB
777 * On s390 reference bits are in storage key and never in TLB
778 * With virtualization we handle the reference bit, without we
779 * we can simply return */
780#ifdef CONFIG_PGSTE
781 return ptep_test_and_clear_young(vma, address, ptep);
782#endif
783 return 0;
784}
785
786static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
787{
788 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
789#ifndef __s390x__
790 /* pto must point to the start of the segment table */
791 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
792#else
793 /* ipte in zarch mode can do the math */
794 pte_t *pto = ptep;
795#endif
796 asm volatile(
797 " ipte %2,%3"
798 : "=m" (*ptep) : "m" (*ptep),
799 "a" (pto), "a" (address));
800 }
801}
802
803static inline void ptep_invalidate(struct mm_struct *mm,
804 unsigned long address, pte_t *ptep)
805{
806 if (mm->context.pgstes) {
807 rcp_lock(ptep);
808 __ptep_ipte(address, ptep);
809 ptep_rcp_copy(ptep);
810 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
811 rcp_unlock(ptep);
812 return;
813 }
814 __ptep_ipte(address, ptep);
815 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
816 if (mm->context.noexec) {
817 __ptep_ipte(address, ptep + PTRS_PER_PTE);
818 pte_val(*(ptep + PTRS_PER_PTE)) = _PAGE_TYPE_EMPTY;
819 }
820}
821
822/*
823 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
824 * both clear the TLB for the unmapped pte. The reason is that
825 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
826 * to modify an active pte. The sequence is
827 * 1) ptep_get_and_clear
828 * 2) set_pte_at
829 * 3) flush_tlb_range
830 * On s390 the tlb needs to get flushed with the modification of the pte
831 * if the pte is active. The only way how this can be implemented is to
832 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
833 * is a nop.
834 */
835#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
836#define ptep_get_and_clear(__mm, __address, __ptep) \
837({ \
838 pte_t __pte = *(__ptep); \
839 if (atomic_read(&(__mm)->mm_users) > 1 || \
840 (__mm) != current->active_mm) \
841 ptep_invalidate(__mm, __address, __ptep); \
842 else \
843 pte_clear((__mm), (__address), (__ptep)); \
844 __pte; \
845})
846
847#define __HAVE_ARCH_PTEP_CLEAR_FLUSH
848static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
849 unsigned long address, pte_t *ptep)
850{
851 pte_t pte = *ptep;
852 ptep_invalidate(vma->vm_mm, address, ptep);
853 return pte;
854}
855
856/*
857 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
858 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
859 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
860 * cannot be accessed while the batched unmap is running. In this case
861 * full==1 and a simple pte_clear is enough. See tlb.h.
862 */
863#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
864static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
865 unsigned long addr,
866 pte_t *ptep, int full)
867{
868 pte_t pte = *ptep;
869
870 if (full)
871 pte_clear(mm, addr, ptep);
872 else
873 ptep_invalidate(mm, addr, ptep);
874 return pte;
875}
876
877#define __HAVE_ARCH_PTEP_SET_WRPROTECT
878#define ptep_set_wrprotect(__mm, __addr, __ptep) \
879({ \
880 pte_t __pte = *(__ptep); \
881 if (pte_write(__pte)) { \
882 if (atomic_read(&(__mm)->mm_users) > 1 || \
883 (__mm) != current->active_mm) \
884 ptep_invalidate(__mm, __addr, __ptep); \
885 set_pte_at(__mm, __addr, __ptep, pte_wrprotect(__pte)); \
886 } \
887})
888
889#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
890#define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \
891({ \
892 int __changed = !pte_same(*(__ptep), __entry); \
893 if (__changed) { \
894 ptep_invalidate((__vma)->vm_mm, __addr, __ptep); \
895 set_pte_at((__vma)->vm_mm, __addr, __ptep, __entry); \
896 } \
897 __changed; \
898})
899
900/*
901 * Test and clear dirty bit in storage key.
902 * We can't clear the changed bit atomically. This is a potential
903 * race against modification of the referenced bit. This function
904 * should therefore only be called if it is not mapped in any
905 * address space.
906 */
907#define __HAVE_ARCH_PAGE_TEST_DIRTY
908static inline int page_test_dirty(struct page *page)
909{
910 return (page_get_storage_key(page_to_phys(page)) & _PAGE_CHANGED) != 0;
911}
912
913#define __HAVE_ARCH_PAGE_CLEAR_DIRTY
914static inline void page_clear_dirty(struct page *page)
915{
916 page_set_storage_key(page_to_phys(page), PAGE_DEFAULT_KEY);
917}
918
919/*
920 * Test and clear referenced bit in storage key.
921 */
922#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
923static inline int page_test_and_clear_young(struct page *page)
924{
925 unsigned long physpage = page_to_phys(page);
926 int ccode;
927
928 asm volatile(
929 " rrbe 0,%1\n"
930 " ipm %0\n"
931 " srl %0,28\n"
932 : "=d" (ccode) : "a" (physpage) : "cc" );
933 return ccode & 2;
934}
935
936/*
937 * Conversion functions: convert a page and protection to a page entry,
938 * and a page entry and page directory to the page they refer to.
939 */
940static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
941{
942 pte_t __pte;
943 pte_val(__pte) = physpage + pgprot_val(pgprot);
944 return __pte;
945}
946
947static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
948{
949 unsigned long physpage = page_to_phys(page);
950
951 return mk_pte_phys(physpage, pgprot);
952}
953
954#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
955#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
956#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
957#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
958
959#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
960#define pgd_offset_k(address) pgd_offset(&init_mm, address)
961
962#ifndef __s390x__
963
964#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
965#define pud_deref(pmd) ({ BUG(); 0UL; })
966#define pgd_deref(pmd) ({ BUG(); 0UL; })
967
968#define pud_offset(pgd, address) ((pud_t *) pgd)
969#define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
970
971#else /* __s390x__ */
972
973#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
974#define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
975#define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
976
977static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
978{
979 pud_t *pud = (pud_t *) pgd;
980 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
981 pud = (pud_t *) pgd_deref(*pgd);
982 return pud + pud_index(address);
983}
984
985static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
986{
987 pmd_t *pmd = (pmd_t *) pud;
988 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
989 pmd = (pmd_t *) pud_deref(*pud);
990 return pmd + pmd_index(address);
991}
992
993#endif /* __s390x__ */
994
995#define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
996#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
997#define pte_page(x) pfn_to_page(pte_pfn(x))
998
999#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1000
1001/* Find an entry in the lowest level page table.. */
1002#define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1003#define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1004#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1005#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
1006#define pte_unmap(pte) do { } while (0)
1007#define pte_unmap_nested(pte) do { } while (0)
1008
1009/*
1010 * 31 bit swap entry format:
1011 * A page-table entry has some bits we have to treat in a special way.
1012 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1013 * exception will occur instead of a page translation exception. The
1014 * specifiation exception has the bad habit not to store necessary
1015 * information in the lowcore.
1016 * Bit 21 and bit 22 are the page invalid bit and the page protection
1017 * bit. We set both to indicate a swapped page.
1018 * Bit 30 and 31 are used to distinguish the different page types. For
1019 * a swapped page these bits need to be zero.
1020 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1021 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1022 * plus 24 for the offset.
1023 * 0| offset |0110|o|type |00|
1024 * 0 0000000001111111111 2222 2 22222 33
1025 * 0 1234567890123456789 0123 4 56789 01
1026 *
1027 * 64 bit swap entry format:
1028 * A page-table entry has some bits we have to treat in a special way.
1029 * Bits 52 and bit 55 have to be zero, otherwise an specification
1030 * exception will occur instead of a page translation exception. The
1031 * specifiation exception has the bad habit not to store necessary
1032 * information in the lowcore.
1033 * Bit 53 and bit 54 are the page invalid bit and the page protection
1034 * bit. We set both to indicate a swapped page.
1035 * Bit 62 and 63 are used to distinguish the different page types. For
1036 * a swapped page these bits need to be zero.
1037 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1038 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1039 * plus 56 for the offset.
1040 * | offset |0110|o|type |00|
1041 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1042 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1043 */
1044#ifndef __s390x__
1045#define __SWP_OFFSET_MASK (~0UL >> 12)
1046#else
1047#define __SWP_OFFSET_MASK (~0UL >> 11)
1048#endif
1049static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1050{
1051 pte_t pte;
1052 offset &= __SWP_OFFSET_MASK;
1053 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1054 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1055 return pte;
1056}
1057
1058#define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1059#define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1060#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1061
1062#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1063#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1064
1065#ifndef __s390x__
1066# define PTE_FILE_MAX_BITS 26
1067#else /* __s390x__ */
1068# define PTE_FILE_MAX_BITS 59
1069#endif /* __s390x__ */
1070
1071#define pte_to_pgoff(__pte) \
1072 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1073
1074#define pgoff_to_pte(__off) \
1075 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1076 | _PAGE_TYPE_FILE })
1077
1078#endif /* !__ASSEMBLY__ */
1079
1080#define kern_addr_valid(addr) (1)
1081
1082extern int vmem_add_mapping(unsigned long start, unsigned long size);
1083extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1084extern int s390_enable_sie(void);
1085
1086/*
1087 * No page table caches to initialise
1088 */
1089#define pgtable_cache_init() do { } while (0)
1090
1091#include <asm-generic/pgtable.h>
1092
1093#endif /* _S390_PAGE_H */
diff --git a/include/asm-s390/poll.h b/include/asm-s390/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/include/asm-s390/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/include/asm-s390/posix_types.h b/include/asm-s390/posix_types.h
deleted file mode 100644
index 397d93fba3a7..000000000000
--- a/include/asm-s390/posix_types.h
+++ /dev/null
@@ -1,111 +0,0 @@
1/*
2 * include/asm-s390/posix_types.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/posix_types.h"
7 */
8
9#ifndef __ARCH_S390_POSIX_TYPES_H
10#define __ARCH_S390_POSIX_TYPES_H
11
12/*
13 * This file is generally used by user-level software, so you need to
14 * be a little careful about namespace pollution etc. Also, we cannot
15 * assume GCC is being used.
16 */
17
18typedef long __kernel_off_t;
19typedef int __kernel_pid_t;
20typedef unsigned long __kernel_size_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30
31#ifdef __GNUC__
32typedef long long __kernel_loff_t;
33#endif
34
35#ifndef __s390x__
36
37typedef unsigned long __kernel_ino_t;
38typedef unsigned short __kernel_mode_t;
39typedef unsigned short __kernel_nlink_t;
40typedef unsigned short __kernel_ipc_pid_t;
41typedef unsigned short __kernel_uid_t;
42typedef unsigned short __kernel_gid_t;
43typedef int __kernel_ssize_t;
44typedef int __kernel_ptrdiff_t;
45typedef unsigned int __kernel_uid32_t;
46typedef unsigned int __kernel_gid32_t;
47typedef unsigned short __kernel_old_uid_t;
48typedef unsigned short __kernel_old_gid_t;
49typedef unsigned short __kernel_old_dev_t;
50
51#else /* __s390x__ */
52
53typedef unsigned int __kernel_ino_t;
54typedef unsigned int __kernel_mode_t;
55typedef unsigned int __kernel_nlink_t;
56typedef int __kernel_ipc_pid_t;
57typedef unsigned int __kernel_uid_t;
58typedef unsigned int __kernel_gid_t;
59typedef long __kernel_ssize_t;
60typedef long __kernel_ptrdiff_t;
61typedef unsigned long __kernel_sigset_t; /* at least 32 bits */
62typedef __kernel_uid_t __kernel_old_uid_t;
63typedef __kernel_gid_t __kernel_old_gid_t;
64typedef __kernel_uid_t __kernel_uid32_t;
65typedef __kernel_gid_t __kernel_gid32_t;
66typedef unsigned short __kernel_old_dev_t;
67
68#endif /* __s390x__ */
69
70typedef struct {
71#if defined(__KERNEL__) || defined(__USE_ALL)
72 int val[2];
73#else /* !defined(__KERNEL__) && !defined(__USE_ALL)*/
74 int __val[2];
75#endif /* !defined(__KERNEL__) && !defined(__USE_ALL)*/
76} __kernel_fsid_t;
77
78
79#ifdef __KERNEL__
80
81#undef __FD_SET
82static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp)
83{
84 unsigned long _tmp = fd / __NFDBITS;
85 unsigned long _rem = fd % __NFDBITS;
86 fdsetp->fds_bits[_tmp] |= (1UL<<_rem);
87}
88
89#undef __FD_CLR
90static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp)
91{
92 unsigned long _tmp = fd / __NFDBITS;
93 unsigned long _rem = fd % __NFDBITS;
94 fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem);
95}
96
97#undef __FD_ISSET
98static inline int __FD_ISSET(unsigned long fd, const __kernel_fd_set *fdsetp)
99{
100 unsigned long _tmp = fd / __NFDBITS;
101 unsigned long _rem = fd % __NFDBITS;
102 return (fdsetp->fds_bits[_tmp] & (1UL<<_rem)) != 0;
103}
104
105#undef __FD_ZERO
106#define __FD_ZERO(fdsetp) \
107 ((void) memset ((void *) (fdsetp), 0, sizeof (__kernel_fd_set)))
108
109#endif /* __KERNEL__ */
110
111#endif
diff --git a/include/asm-s390/processor.h b/include/asm-s390/processor.h
deleted file mode 100644
index 4af80af2a88f..000000000000
--- a/include/asm-s390/processor.h
+++ /dev/null
@@ -1,360 +0,0 @@
1/*
2 * include/asm-s390/processor.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 *
9 * Derived from "include/asm-i386/processor.h"
10 * Copyright (C) 1994, Linus Torvalds
11 */
12
13#ifndef __ASM_S390_PROCESSOR_H
14#define __ASM_S390_PROCESSOR_H
15
16#include <asm/ptrace.h>
17
18#ifdef __KERNEL__
19/*
20 * Default implementation of macro that returns current
21 * instruction pointer ("program counter").
22 */
23#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
24
25/*
26 * CPU type and hardware bug flags. Kept separately for each CPU.
27 * Members of this structure are referenced in head.S, so think twice
28 * before touching them. [mj]
29 */
30
31typedef struct
32{
33 unsigned int version : 8;
34 unsigned int ident : 24;
35 unsigned int machine : 16;
36 unsigned int unused : 16;
37} __attribute__ ((packed)) cpuid_t;
38
39static inline void get_cpu_id(cpuid_t *ptr)
40{
41 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
42}
43
44struct cpuinfo_S390
45{
46 cpuid_t cpu_id;
47 __u16 cpu_addr;
48 __u16 cpu_nr;
49 unsigned long loops_per_jiffy;
50 unsigned long *pgd_quick;
51#ifdef __s390x__
52 unsigned long *pmd_quick;
53#endif /* __s390x__ */
54 unsigned long *pte_quick;
55 unsigned long pgtable_cache_sz;
56};
57
58extern void s390_adjust_jiffies(void);
59extern void print_cpu_info(struct cpuinfo_S390 *);
60extern int get_cpu_capability(unsigned int *);
61
62/*
63 * User space process size: 2GB for 31 bit, 4TB for 64 bit.
64 */
65#ifndef __s390x__
66
67#define TASK_SIZE (1UL << 31)
68#define TASK_UNMAPPED_BASE (1UL << 30)
69
70#else /* __s390x__ */
71
72#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk,TIF_31BIT) ? \
73 (1UL << 31) : (1UL << 53))
74#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
75 (1UL << 30) : (1UL << 41))
76#define TASK_SIZE TASK_SIZE_OF(current)
77
78#endif /* __s390x__ */
79
80#ifdef __KERNEL__
81
82#ifndef __s390x__
83#define STACK_TOP (1UL << 31)
84#define STACK_TOP_MAX (1UL << 31)
85#else /* __s390x__ */
86#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
87#define STACK_TOP_MAX (1UL << 42)
88#endif /* __s390x__ */
89
90
91#endif
92
93#define HAVE_ARCH_PICK_MMAP_LAYOUT
94
95typedef struct {
96 __u32 ar4;
97} mm_segment_t;
98
99/*
100 * Thread structure
101 */
102struct thread_struct {
103 s390_fp_regs fp_regs;
104 unsigned int acrs[NUM_ACRS];
105 unsigned long ksp; /* kernel stack pointer */
106 mm_segment_t mm_segment;
107 unsigned long prot_addr; /* address of protection-excep. */
108 unsigned int trap_no;
109 per_struct per_info;
110 /* Used to give failing instruction back to user for ieee exceptions */
111 unsigned long ieee_instruction_pointer;
112 /* pfault_wait is used to block the process on a pfault event */
113 unsigned long pfault_wait;
114};
115
116typedef struct thread_struct thread_struct;
117
118/*
119 * Stack layout of a C stack frame.
120 */
121#ifndef __PACK_STACK
122struct stack_frame {
123 unsigned long back_chain;
124 unsigned long empty1[5];
125 unsigned long gprs[10];
126 unsigned int empty2[8];
127};
128#else
129struct stack_frame {
130 unsigned long empty1[5];
131 unsigned int empty2[8];
132 unsigned long gprs[10];
133 unsigned long back_chain;
134};
135#endif
136
137#define ARCH_MIN_TASKALIGN 8
138
139#define INIT_THREAD { \
140 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
141}
142
143/*
144 * Do necessary setup to start up a new thread.
145 */
146#define start_thread(regs, new_psw, new_stackp) do { \
147 set_fs(USER_DS); \
148 regs->psw.mask = psw_user_bits; \
149 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
150 regs->gprs[15] = new_stackp; \
151} while (0)
152
153#define start_thread31(regs, new_psw, new_stackp) do { \
154 set_fs(USER_DS); \
155 regs->psw.mask = psw_user32_bits; \
156 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
157 regs->gprs[15] = new_stackp; \
158 crst_table_downgrade(current->mm, 1UL << 31); \
159} while (0)
160
161/* Forward declaration, a strange C thing */
162struct task_struct;
163struct mm_struct;
164struct seq_file;
165
166/* Free all resources held by a thread. */
167extern void release_thread(struct task_struct *);
168extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
169
170/* Prepare to copy thread state - unlazy all lazy status */
171#define prepare_to_copy(tsk) do { } while (0)
172
173/*
174 * Return saved PC of a blocked thread.
175 */
176extern unsigned long thread_saved_pc(struct task_struct *t);
177
178/*
179 * Print register of task into buffer. Used in fs/proc/array.c.
180 */
181extern void task_show_regs(struct seq_file *m, struct task_struct *task);
182
183extern void show_code(struct pt_regs *regs);
184
185unsigned long get_wchan(struct task_struct *p);
186#define task_pt_regs(tsk) ((struct pt_regs *) \
187 (task_stack_page(tsk) + THREAD_SIZE) - 1)
188#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
189#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
190
191/*
192 * Give up the time slice of the virtual PU.
193 */
194static inline void cpu_relax(void)
195{
196 if (MACHINE_HAS_DIAG44)
197 asm volatile("diag 0,0,68");
198 barrier();
199}
200
201static inline void psw_set_key(unsigned int key)
202{
203 asm volatile("spka 0(%0)" : : "d" (key));
204}
205
206/*
207 * Set PSW to specified value.
208 */
209static inline void __load_psw(psw_t psw)
210{
211#ifndef __s390x__
212 asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
213#else
214 asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
215#endif
216}
217
218/*
219 * Set PSW mask to specified value, while leaving the
220 * PSW addr pointing to the next instruction.
221 */
222
223static inline void __load_psw_mask (unsigned long mask)
224{
225 unsigned long addr;
226 psw_t psw;
227
228 psw.mask = mask;
229
230#ifndef __s390x__
231 asm volatile(
232 " basr %0,0\n"
233 "0: ahi %0,1f-0b\n"
234 " st %0,4(%1)\n"
235 " lpsw 0(%1)\n"
236 "1:"
237 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
238#else /* __s390x__ */
239 asm volatile(
240 " larl %0,1f\n"
241 " stg %0,8(%1)\n"
242 " lpswe 0(%1)\n"
243 "1:"
244 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
245#endif /* __s390x__ */
246}
247
248/*
249 * Function to stop a processor until an interruption occurred
250 */
251static inline void enabled_wait(void)
252{
253 __load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT |
254 PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY);
255}
256
257/*
258 * Function to drop a processor into disabled wait state
259 */
260
261static inline void disabled_wait(unsigned long code)
262{
263 unsigned long ctl_buf;
264 psw_t dw_psw;
265
266 dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT;
267 dw_psw.addr = code;
268 /*
269 * Store status and then load disabled wait psw,
270 * the processor is dead afterwards
271 */
272#ifndef __s390x__
273 asm volatile(
274 " stctl 0,0,0(%2)\n"
275 " ni 0(%2),0xef\n" /* switch off protection */
276 " lctl 0,0,0(%2)\n"
277 " stpt 0xd8\n" /* store timer */
278 " stckc 0xe0\n" /* store clock comparator */
279 " stpx 0x108\n" /* store prefix register */
280 " stam 0,15,0x120\n" /* store access registers */
281 " std 0,0x160\n" /* store f0 */
282 " std 2,0x168\n" /* store f2 */
283 " std 4,0x170\n" /* store f4 */
284 " std 6,0x178\n" /* store f6 */
285 " stm 0,15,0x180\n" /* store general registers */
286 " stctl 0,15,0x1c0\n" /* store control registers */
287 " oi 0x1c0,0x10\n" /* fake protection bit */
288 " lpsw 0(%1)"
289 : "=m" (ctl_buf)
290 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
291#else /* __s390x__ */
292 asm volatile(
293 " stctg 0,0,0(%2)\n"
294 " ni 4(%2),0xef\n" /* switch off protection */
295 " lctlg 0,0,0(%2)\n"
296 " lghi 1,0x1000\n"
297 " stpt 0x328(1)\n" /* store timer */
298 " stckc 0x330(1)\n" /* store clock comparator */
299 " stpx 0x318(1)\n" /* store prefix register */
300 " stam 0,15,0x340(1)\n"/* store access registers */
301 " stfpc 0x31c(1)\n" /* store fpu control */
302 " std 0,0x200(1)\n" /* store f0 */
303 " std 1,0x208(1)\n" /* store f1 */
304 " std 2,0x210(1)\n" /* store f2 */
305 " std 3,0x218(1)\n" /* store f3 */
306 " std 4,0x220(1)\n" /* store f4 */
307 " std 5,0x228(1)\n" /* store f5 */
308 " std 6,0x230(1)\n" /* store f6 */
309 " std 7,0x238(1)\n" /* store f7 */
310 " std 8,0x240(1)\n" /* store f8 */
311 " std 9,0x248(1)\n" /* store f9 */
312 " std 10,0x250(1)\n" /* store f10 */
313 " std 11,0x258(1)\n" /* store f11 */
314 " std 12,0x260(1)\n" /* store f12 */
315 " std 13,0x268(1)\n" /* store f13 */
316 " std 14,0x270(1)\n" /* store f14 */
317 " std 15,0x278(1)\n" /* store f15 */
318 " stmg 0,15,0x280(1)\n"/* store general registers */
319 " stctg 0,15,0x380(1)\n"/* store control registers */
320 " oi 0x384(1),0x10\n"/* fake protection bit */
321 " lpswe 0(%1)"
322 : "=m" (ctl_buf)
323 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0");
324#endif /* __s390x__ */
325}
326
327/*
328 * Basic Machine Check/Program Check Handler.
329 */
330
331extern void s390_base_mcck_handler(void);
332extern void s390_base_pgm_handler(void);
333extern void s390_base_ext_handler(void);
334
335extern void (*s390_base_mcck_handler_fn)(void);
336extern void (*s390_base_pgm_handler_fn)(void);
337extern void (*s390_base_ext_handler_fn)(void);
338
339#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
340
341#endif
342
343/*
344 * Helper macro for exception table entries
345 */
346#ifndef __s390x__
347#define EX_TABLE(_fault,_target) \
348 ".section __ex_table,\"a\"\n" \
349 " .align 4\n" \
350 " .long " #_fault "," #_target "\n" \
351 ".previous\n"
352#else
353#define EX_TABLE(_fault,_target) \
354 ".section __ex_table,\"a\"\n" \
355 " .align 8\n" \
356 " .quad " #_fault "," #_target "\n" \
357 ".previous\n"
358#endif
359
360#endif /* __ASM_S390_PROCESSOR_H */
diff --git a/include/asm-s390/ptrace.h b/include/asm-s390/ptrace.h
deleted file mode 100644
index af2c9ac28a07..000000000000
--- a/include/asm-s390/ptrace.h
+++ /dev/null
@@ -1,499 +0,0 @@
1/*
2 * include/asm-s390/ptrace.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
7 */
8
9#ifndef _S390_PTRACE_H
10#define _S390_PTRACE_H
11
12/*
13 * Offsets in the user_regs_struct. They are used for the ptrace
14 * system call and in entry.S
15 */
16#ifndef __s390x__
17
18#define PT_PSWMASK 0x00
19#define PT_PSWADDR 0x04
20#define PT_GPR0 0x08
21#define PT_GPR1 0x0C
22#define PT_GPR2 0x10
23#define PT_GPR3 0x14
24#define PT_GPR4 0x18
25#define PT_GPR5 0x1C
26#define PT_GPR6 0x20
27#define PT_GPR7 0x24
28#define PT_GPR8 0x28
29#define PT_GPR9 0x2C
30#define PT_GPR10 0x30
31#define PT_GPR11 0x34
32#define PT_GPR12 0x38
33#define PT_GPR13 0x3C
34#define PT_GPR14 0x40
35#define PT_GPR15 0x44
36#define PT_ACR0 0x48
37#define PT_ACR1 0x4C
38#define PT_ACR2 0x50
39#define PT_ACR3 0x54
40#define PT_ACR4 0x58
41#define PT_ACR5 0x5C
42#define PT_ACR6 0x60
43#define PT_ACR7 0x64
44#define PT_ACR8 0x68
45#define PT_ACR9 0x6C
46#define PT_ACR10 0x70
47#define PT_ACR11 0x74
48#define PT_ACR12 0x78
49#define PT_ACR13 0x7C
50#define PT_ACR14 0x80
51#define PT_ACR15 0x84
52#define PT_ORIGGPR2 0x88
53#define PT_FPC 0x90
54/*
55 * A nasty fact of life that the ptrace api
56 * only supports passing of longs.
57 */
58#define PT_FPR0_HI 0x98
59#define PT_FPR0_LO 0x9C
60#define PT_FPR1_HI 0xA0
61#define PT_FPR1_LO 0xA4
62#define PT_FPR2_HI 0xA8
63#define PT_FPR2_LO 0xAC
64#define PT_FPR3_HI 0xB0
65#define PT_FPR3_LO 0xB4
66#define PT_FPR4_HI 0xB8
67#define PT_FPR4_LO 0xBC
68#define PT_FPR5_HI 0xC0
69#define PT_FPR5_LO 0xC4
70#define PT_FPR6_HI 0xC8
71#define PT_FPR6_LO 0xCC
72#define PT_FPR7_HI 0xD0
73#define PT_FPR7_LO 0xD4
74#define PT_FPR8_HI 0xD8
75#define PT_FPR8_LO 0XDC
76#define PT_FPR9_HI 0xE0
77#define PT_FPR9_LO 0xE4
78#define PT_FPR10_HI 0xE8
79#define PT_FPR10_LO 0xEC
80#define PT_FPR11_HI 0xF0
81#define PT_FPR11_LO 0xF4
82#define PT_FPR12_HI 0xF8
83#define PT_FPR12_LO 0xFC
84#define PT_FPR13_HI 0x100
85#define PT_FPR13_LO 0x104
86#define PT_FPR14_HI 0x108
87#define PT_FPR14_LO 0x10C
88#define PT_FPR15_HI 0x110
89#define PT_FPR15_LO 0x114
90#define PT_CR_9 0x118
91#define PT_CR_10 0x11C
92#define PT_CR_11 0x120
93#define PT_IEEE_IP 0x13C
94#define PT_LASTOFF PT_IEEE_IP
95#define PT_ENDREGS 0x140-1
96
97#define GPR_SIZE 4
98#define CR_SIZE 4
99
100#define STACK_FRAME_OVERHEAD 96 /* size of minimum stack frame */
101
102#else /* __s390x__ */
103
104#define PT_PSWMASK 0x00
105#define PT_PSWADDR 0x08
106#define PT_GPR0 0x10
107#define PT_GPR1 0x18
108#define PT_GPR2 0x20
109#define PT_GPR3 0x28
110#define PT_GPR4 0x30
111#define PT_GPR5 0x38
112#define PT_GPR6 0x40
113#define PT_GPR7 0x48
114#define PT_GPR8 0x50
115#define PT_GPR9 0x58
116#define PT_GPR10 0x60
117#define PT_GPR11 0x68
118#define PT_GPR12 0x70
119#define PT_GPR13 0x78
120#define PT_GPR14 0x80
121#define PT_GPR15 0x88
122#define PT_ACR0 0x90
123#define PT_ACR1 0x94
124#define PT_ACR2 0x98
125#define PT_ACR3 0x9C
126#define PT_ACR4 0xA0
127#define PT_ACR5 0xA4
128#define PT_ACR6 0xA8
129#define PT_ACR7 0xAC
130#define PT_ACR8 0xB0
131#define PT_ACR9 0xB4
132#define PT_ACR10 0xB8
133#define PT_ACR11 0xBC
134#define PT_ACR12 0xC0
135#define PT_ACR13 0xC4
136#define PT_ACR14 0xC8
137#define PT_ACR15 0xCC
138#define PT_ORIGGPR2 0xD0
139#define PT_FPC 0xD8
140#define PT_FPR0 0xE0
141#define PT_FPR1 0xE8
142#define PT_FPR2 0xF0
143#define PT_FPR3 0xF8
144#define PT_FPR4 0x100
145#define PT_FPR5 0x108
146#define PT_FPR6 0x110
147#define PT_FPR7 0x118
148#define PT_FPR8 0x120
149#define PT_FPR9 0x128
150#define PT_FPR10 0x130
151#define PT_FPR11 0x138
152#define PT_FPR12 0x140
153#define PT_FPR13 0x148
154#define PT_FPR14 0x150
155#define PT_FPR15 0x158
156#define PT_CR_9 0x160
157#define PT_CR_10 0x168
158#define PT_CR_11 0x170
159#define PT_IEEE_IP 0x1A8
160#define PT_LASTOFF PT_IEEE_IP
161#define PT_ENDREGS 0x1B0-1
162
163#define GPR_SIZE 8
164#define CR_SIZE 8
165
166#define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */
167
168#endif /* __s390x__ */
169
170#define NUM_GPRS 16
171#define NUM_FPRS 16
172#define NUM_CRS 16
173#define NUM_ACRS 16
174
175#define FPR_SIZE 8
176#define FPC_SIZE 4
177#define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */
178#define ACR_SIZE 4
179
180
181#define PTRACE_OLDSETOPTIONS 21
182
183#ifndef __ASSEMBLY__
184#include <linux/stddef.h>
185#include <linux/types.h>
186
187typedef union
188{
189 float f;
190 double d;
191 __u64 ui;
192 struct
193 {
194 __u32 hi;
195 __u32 lo;
196 } fp;
197} freg_t;
198
199typedef struct
200{
201 __u32 fpc;
202 freg_t fprs[NUM_FPRS];
203} s390_fp_regs;
204
205#define FPC_EXCEPTION_MASK 0xF8000000
206#define FPC_FLAGS_MASK 0x00F80000
207#define FPC_DXC_MASK 0x0000FF00
208#define FPC_RM_MASK 0x00000003
209#define FPC_VALID_MASK 0xF8F8FF03
210
211/* this typedef defines how a Program Status Word looks like */
212typedef struct
213{
214 unsigned long mask;
215 unsigned long addr;
216} __attribute__ ((aligned(8))) psw_t;
217
218typedef struct
219{
220 __u32 mask;
221 __u32 addr;
222} __attribute__ ((aligned(8))) psw_compat_t;
223
224#ifndef __s390x__
225
226#define PSW_MASK_PER 0x40000000UL
227#define PSW_MASK_DAT 0x04000000UL
228#define PSW_MASK_IO 0x02000000UL
229#define PSW_MASK_EXT 0x01000000UL
230#define PSW_MASK_KEY 0x00F00000UL
231#define PSW_MASK_MCHECK 0x00040000UL
232#define PSW_MASK_WAIT 0x00020000UL
233#define PSW_MASK_PSTATE 0x00010000UL
234#define PSW_MASK_ASC 0x0000C000UL
235#define PSW_MASK_CC 0x00003000UL
236#define PSW_MASK_PM 0x00000F00UL
237
238#define PSW_ADDR_AMODE 0x80000000UL
239#define PSW_ADDR_INSN 0x7FFFFFFFUL
240
241#define PSW_BASE_BITS 0x00080000UL
242#define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 20)
243
244#define PSW_ASC_PRIMARY 0x00000000UL
245#define PSW_ASC_ACCREG 0x00004000UL
246#define PSW_ASC_SECONDARY 0x00008000UL
247#define PSW_ASC_HOME 0x0000C000UL
248
249#else /* __s390x__ */
250
251#define PSW_MASK_PER 0x4000000000000000UL
252#define PSW_MASK_DAT 0x0400000000000000UL
253#define PSW_MASK_IO 0x0200000000000000UL
254#define PSW_MASK_EXT 0x0100000000000000UL
255#define PSW_MASK_KEY 0x00F0000000000000UL
256#define PSW_MASK_MCHECK 0x0004000000000000UL
257#define PSW_MASK_WAIT 0x0002000000000000UL
258#define PSW_MASK_PSTATE 0x0001000000000000UL
259#define PSW_MASK_ASC 0x0000C00000000000UL
260#define PSW_MASK_CC 0x0000300000000000UL
261#define PSW_MASK_PM 0x00000F0000000000UL
262
263#define PSW_ADDR_AMODE 0x0000000000000000UL
264#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL
265
266#define PSW_BASE_BITS 0x0000000180000000UL
267#define PSW_BASE32_BITS 0x0000000080000000UL
268#define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 52)
269
270#define PSW_ASC_PRIMARY 0x0000000000000000UL
271#define PSW_ASC_ACCREG 0x0000400000000000UL
272#define PSW_ASC_SECONDARY 0x0000800000000000UL
273#define PSW_ASC_HOME 0x0000C00000000000UL
274
275extern long psw_user32_bits;
276
277#endif /* __s390x__ */
278
279extern long psw_kernel_bits;
280extern long psw_user_bits;
281
282/* This macro merges a NEW PSW mask specified by the user into
283 the currently active PSW mask CURRENT, modifying only those
284 bits in CURRENT that the user may be allowed to change: this
285 is the condition code and the program mask bits. */
286#define PSW_MASK_MERGE(CURRENT,NEW) \
287 (((CURRENT) & ~(PSW_MASK_CC|PSW_MASK_PM)) | \
288 ((NEW) & (PSW_MASK_CC|PSW_MASK_PM)))
289
290/*
291 * The s390_regs structure is used to define the elf_gregset_t.
292 */
293typedef struct
294{
295 psw_t psw;
296 unsigned long gprs[NUM_GPRS];
297 unsigned int acrs[NUM_ACRS];
298 unsigned long orig_gpr2;
299} s390_regs;
300
301typedef struct
302{
303 psw_compat_t psw;
304 __u32 gprs[NUM_GPRS];
305 __u32 acrs[NUM_ACRS];
306 __u32 orig_gpr2;
307} s390_compat_regs;
308
309
310#ifdef __KERNEL__
311#include <asm/setup.h>
312#include <asm/page.h>
313
314/*
315 * The pt_regs struct defines the way the registers are stored on
316 * the stack during a system call.
317 */
318struct pt_regs
319{
320 unsigned long args[1];
321 psw_t psw;
322 unsigned long gprs[NUM_GPRS];
323 unsigned long orig_gpr2;
324 unsigned short ilc;
325 unsigned short trap;
326};
327#endif
328
329/*
330 * Now for the program event recording (trace) definitions.
331 */
332typedef struct
333{
334 unsigned long cr[3];
335} per_cr_words;
336
337#define PER_EM_MASK 0xE8000000UL
338
339typedef struct
340{
341#ifdef __s390x__
342 unsigned : 32;
343#endif /* __s390x__ */
344 unsigned em_branching : 1;
345 unsigned em_instruction_fetch : 1;
346 /*
347 * Switching on storage alteration automatically fixes
348 * the storage alteration event bit in the users std.
349 */
350 unsigned em_storage_alteration : 1;
351 unsigned em_gpr_alt_unused : 1;
352 unsigned em_store_real_address : 1;
353 unsigned : 3;
354 unsigned branch_addr_ctl : 1;
355 unsigned : 1;
356 unsigned storage_alt_space_ctl : 1;
357 unsigned : 21;
358 unsigned long starting_addr;
359 unsigned long ending_addr;
360} per_cr_bits;
361
362typedef struct
363{
364 unsigned short perc_atmid;
365 unsigned long address;
366 unsigned char access_id;
367} per_lowcore_words;
368
369typedef struct
370{
371 unsigned perc_branching : 1;
372 unsigned perc_instruction_fetch : 1;
373 unsigned perc_storage_alteration : 1;
374 unsigned perc_gpr_alt_unused : 1;
375 unsigned perc_store_real_address : 1;
376 unsigned : 3;
377 unsigned atmid_psw_bit_31 : 1;
378 unsigned atmid_validity_bit : 1;
379 unsigned atmid_psw_bit_32 : 1;
380 unsigned atmid_psw_bit_5 : 1;
381 unsigned atmid_psw_bit_16 : 1;
382 unsigned atmid_psw_bit_17 : 1;
383 unsigned si : 2;
384 unsigned long address;
385 unsigned : 4;
386 unsigned access_id : 4;
387} per_lowcore_bits;
388
389typedef struct
390{
391 union {
392 per_cr_words words;
393 per_cr_bits bits;
394 } control_regs;
395 /*
396 * Use these flags instead of setting em_instruction_fetch
397 * directly they are used so that single stepping can be
398 * switched on & off while not affecting other tracing
399 */
400 unsigned single_step : 1;
401 unsigned instruction_fetch : 1;
402 unsigned : 30;
403 /*
404 * These addresses are copied into cr10 & cr11 if single
405 * stepping is switched off
406 */
407 unsigned long starting_addr;
408 unsigned long ending_addr;
409 union {
410 per_lowcore_words words;
411 per_lowcore_bits bits;
412 } lowcore;
413} per_struct;
414
415typedef struct
416{
417 unsigned int len;
418 unsigned long kernel_addr;
419 unsigned long process_addr;
420} ptrace_area;
421
422/*
423 * S/390 specific non posix ptrace requests. I chose unusual values so
424 * they are unlikely to clash with future ptrace definitions.
425 */
426#define PTRACE_PEEKUSR_AREA 0x5000
427#define PTRACE_POKEUSR_AREA 0x5001
428#define PTRACE_PEEKTEXT_AREA 0x5002
429#define PTRACE_PEEKDATA_AREA 0x5003
430#define PTRACE_POKETEXT_AREA 0x5004
431#define PTRACE_POKEDATA_AREA 0x5005
432
433/*
434 * PT_PROT definition is loosely based on hppa bsd definition in
435 * gdb/hppab-nat.c
436 */
437#define PTRACE_PROT 21
438
439typedef enum
440{
441 ptprot_set_access_watchpoint,
442 ptprot_set_write_watchpoint,
443 ptprot_disable_watchpoint
444} ptprot_flags;
445
446typedef struct
447{
448 unsigned long lowaddr;
449 unsigned long hiaddr;
450 ptprot_flags prot;
451} ptprot_area;
452
453/* Sequence of bytes for breakpoint illegal instruction. */
454#define S390_BREAKPOINT {0x0,0x1}
455#define S390_BREAKPOINT_U16 ((__u16)0x0001)
456#define S390_SYSCALL_OPCODE ((__u16)0x0a00)
457#define S390_SYSCALL_SIZE 2
458
459/*
460 * The user_regs_struct defines the way the user registers are
461 * store on the stack for signal handling.
462 */
463struct user_regs_struct
464{
465 psw_t psw;
466 unsigned long gprs[NUM_GPRS];
467 unsigned int acrs[NUM_ACRS];
468 unsigned long orig_gpr2;
469 s390_fp_regs fp_regs;
470 /*
471 * These per registers are in here so that gdb can modify them
472 * itself as there is no "official" ptrace interface for hardware
473 * watchpoints. This is the way intel does it.
474 */
475 per_struct per_info;
476 unsigned long ieee_instruction_pointer;
477 /* Used to give failing instruction back to user for ieee exceptions */
478};
479
480#ifdef __KERNEL__
481/*
482 * These are defined as per linux/ptrace.h, which see.
483 */
484#define arch_has_single_step() (1)
485struct task_struct;
486extern void user_enable_single_step(struct task_struct *);
487extern void user_disable_single_step(struct task_struct *);
488
489#define __ARCH_WANT_COMPAT_SYS_PTRACE
490
491#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
492#define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
493#define regs_return_value(regs)((regs)->gprs[2])
494#define profile_pc(regs) instruction_pointer(regs)
495extern void show_regs(struct pt_regs * regs);
496#endif /* __KERNEL__ */
497#endif /* __ASSEMBLY__ */
498
499#endif /* _S390_PTRACE_H */
diff --git a/include/asm-s390/qdio.h b/include/asm-s390/qdio.h
deleted file mode 100644
index 6813772171f2..000000000000
--- a/include/asm-s390/qdio.h
+++ /dev/null
@@ -1,382 +0,0 @@
1/*
2 * linux/include/asm-s390/qdio.h
3 *
4 * Copyright 2000,2008 IBM Corp.
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 *
8 */
9#ifndef __QDIO_H__
10#define __QDIO_H__
11
12#include <linux/interrupt.h>
13#include <asm/cio.h>
14#include <asm/ccwdev.h>
15
16#define QDIO_MAX_QUEUES_PER_IRQ 32
17#define QDIO_MAX_BUFFERS_PER_Q 128
18#define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
19#define QDIO_MAX_ELEMENTS_PER_BUFFER 16
20#define QDIO_SBAL_SIZE 256
21
22#define QDIO_QETH_QFMT 0
23#define QDIO_ZFCP_QFMT 1
24#define QDIO_IQDIO_QFMT 2
25
26/**
27 * struct qdesfmt0 - queue descriptor, format 0
28 * @sliba: storage list information block address
29 * @sla: storage list address
30 * @slsba: storage list state block address
31 * @akey: access key for DLIB
32 * @bkey: access key for SL
33 * @ckey: access key for SBALs
34 * @dkey: access key for SLSB
35 */
36struct qdesfmt0 {
37 u64 sliba;
38 u64 sla;
39 u64 slsba;
40 u32 : 32;
41 u32 akey : 4;
42 u32 bkey : 4;
43 u32 ckey : 4;
44 u32 dkey : 4;
45 u32 : 16;
46} __attribute__ ((packed));
47
48/**
49 * struct qdr - queue description record (QDR)
50 * @qfmt: queue format
51 * @pfmt: implementation dependent parameter format
52 * @ac: adapter characteristics
53 * @iqdcnt: input queue descriptor count
54 * @oqdcnt: output queue descriptor count
55 * @iqdsz: inpout queue descriptor size
56 * @oqdsz: output queue descriptor size
57 * @qiba: queue information block address
58 * @qkey: queue information block key
59 * @qdf0: queue descriptions
60 */
61struct qdr {
62 u32 qfmt : 8;
63 u32 pfmt : 8;
64 u32 : 8;
65 u32 ac : 8;
66 u32 : 8;
67 u32 iqdcnt : 8;
68 u32 : 8;
69 u32 oqdcnt : 8;
70 u32 : 8;
71 u32 iqdsz : 8;
72 u32 : 8;
73 u32 oqdsz : 8;
74 /* private: */
75 u32 res[9];
76 /* public: */
77 u64 qiba;
78 u32 : 32;
79 u32 qkey : 4;
80 u32 : 28;
81 struct qdesfmt0 qdf0[126];
82} __attribute__ ((packed, aligned(4096)));
83
84#define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
85#define QIB_RFLAGS_ENABLE_QEBSM 0x80
86
87/**
88 * struct qib - queue information block (QIB)
89 * @qfmt: queue format
90 * @pfmt: implementation dependent parameter format
91 * @rflags: QEBSM
92 * @ac: adapter characteristics
93 * @isliba: absolute address of first input SLIB
94 * @osliba: absolute address of first output SLIB
95 * @ebcnam: adapter identifier in EBCDIC
96 * @parm: implementation dependent parameters
97 */
98struct qib {
99 u32 qfmt : 8;
100 u32 pfmt : 8;
101 u32 rflags : 8;
102 u32 ac : 8;
103 u32 : 32;
104 u64 isliba;
105 u64 osliba;
106 u32 : 32;
107 u32 : 32;
108 u8 ebcnam[8];
109 /* private: */
110 u8 res[88];
111 /* public: */
112 u8 parm[QDIO_MAX_BUFFERS_PER_Q];
113} __attribute__ ((packed, aligned(256)));
114
115/**
116 * struct slibe - storage list information block element (SLIBE)
117 * @parms: implementation dependent parameters
118 */
119struct slibe {
120 u64 parms;
121};
122
123/**
124 * struct slib - storage list information block (SLIB)
125 * @nsliba: next SLIB address (if any)
126 * @sla: SL address
127 * @slsba: SLSB address
128 * @slibe: SLIB elements
129 */
130struct slib {
131 u64 nsliba;
132 u64 sla;
133 u64 slsba;
134 /* private: */
135 u8 res[1000];
136 /* public: */
137 struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
138} __attribute__ ((packed, aligned(2048)));
139
140/**
141 * struct sbal_flags - storage block address list flags
142 * @last: last entry
143 * @cont: contiguous storage
144 * @frag: fragmentation
145 */
146struct sbal_flags {
147 u8 : 1;
148 u8 last : 1;
149 u8 cont : 1;
150 u8 : 1;
151 u8 frag : 2;
152 u8 : 2;
153} __attribute__ ((packed));
154
155#define SBAL_FLAGS_FIRST_FRAG 0x04000000UL
156#define SBAL_FLAGS_MIDDLE_FRAG 0x08000000UL
157#define SBAL_FLAGS_LAST_FRAG 0x0c000000UL
158#define SBAL_FLAGS_LAST_ENTRY 0x40000000UL
159#define SBAL_FLAGS_CONTIGUOUS 0x20000000UL
160
161#define SBAL_FLAGS0_DATA_CONTINUATION 0x20UL
162
163/* Awesome OpenFCP extensions */
164#define SBAL_FLAGS0_TYPE_STATUS 0x00UL
165#define SBAL_FLAGS0_TYPE_WRITE 0x08UL
166#define SBAL_FLAGS0_TYPE_READ 0x10UL
167#define SBAL_FLAGS0_TYPE_WRITE_READ 0x18UL
168#define SBAL_FLAGS0_MORE_SBALS 0x04UL
169#define SBAL_FLAGS0_COMMAND 0x02UL
170#define SBAL_FLAGS0_LAST_SBAL 0x00UL
171#define SBAL_FLAGS0_ONLY_SBAL SBAL_FLAGS0_COMMAND
172#define SBAL_FLAGS0_MIDDLE_SBAL SBAL_FLAGS0_MORE_SBALS
173#define SBAL_FLAGS0_FIRST_SBAL SBAL_FLAGS0_MORE_SBALS | SBAL_FLAGS0_COMMAND
174#define SBAL_FLAGS0_PCI 0x40
175
176/**
177 * struct sbal_sbalf_0 - sbal flags for sbale 0
178 * @pci: PCI indicator
179 * @cont: data continuation
180 * @sbtype: storage-block type (FCP)
181 */
182struct sbal_sbalf_0 {
183 u8 : 1;
184 u8 pci : 1;
185 u8 cont : 1;
186 u8 sbtype : 2;
187 u8 : 3;
188} __attribute__ ((packed));
189
190/**
191 * struct sbal_sbalf_1 - sbal flags for sbale 1
192 * @key: storage key
193 */
194struct sbal_sbalf_1 {
195 u8 : 4;
196 u8 key : 4;
197} __attribute__ ((packed));
198
199/**
200 * struct sbal_sbalf_14 - sbal flags for sbale 14
201 * @erridx: error index
202 */
203struct sbal_sbalf_14 {
204 u8 : 4;
205 u8 erridx : 4;
206} __attribute__ ((packed));
207
208/**
209 * struct sbal_sbalf_15 - sbal flags for sbale 15
210 * @reason: reason for error state
211 */
212struct sbal_sbalf_15 {
213 u8 reason;
214} __attribute__ ((packed));
215
216/**
217 * union sbal_sbalf - storage block address list flags
218 * @i0: sbalf0
219 * @i1: sbalf1
220 * @i14: sbalf14
221 * @i15: sblaf15
222 * @value: raw value
223 */
224union sbal_sbalf {
225 struct sbal_sbalf_0 i0;
226 struct sbal_sbalf_1 i1;
227 struct sbal_sbalf_14 i14;
228 struct sbal_sbalf_15 i15;
229 u8 value;
230};
231
232/**
233 * struct qdio_buffer_element - SBAL entry
234 * @flags: flags
235 * @length: length
236 * @addr: address
237*/
238struct qdio_buffer_element {
239 u32 flags;
240 u32 length;
241#ifdef CONFIG_32BIT
242 /* private: */
243 void *reserved;
244 /* public: */
245#endif
246 void *addr;
247} __attribute__ ((packed, aligned(16)));
248
249/**
250 * struct qdio_buffer - storage block address list (SBAL)
251 * @element: SBAL entries
252 */
253struct qdio_buffer {
254 struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
255} __attribute__ ((packed, aligned(256)));
256
257/**
258 * struct sl_element - storage list entry
259 * @sbal: absolute SBAL address
260 */
261struct sl_element {
262#ifdef CONFIG_32BIT
263 /* private: */
264 unsigned long reserved;
265 /* public: */
266#endif
267 unsigned long sbal;
268} __attribute__ ((packed));
269
270/**
271 * struct sl - storage list (SL)
272 * @element: SL entries
273 */
274struct sl {
275 struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
276} __attribute__ ((packed, aligned(1024)));
277
278/**
279 * struct slsb - storage list state block (SLSB)
280 * @val: state per buffer
281 */
282struct slsb {
283 u8 val[QDIO_MAX_BUFFERS_PER_Q];
284} __attribute__ ((packed, aligned(256)));
285
286struct qdio_ssqd_desc {
287 u8 flags;
288 u8:8;
289 u16 sch;
290 u8 qfmt;
291 u8 parm;
292 u8 qdioac1;
293 u8 sch_class;
294 u8 pcnt;
295 u8 icnt;
296 u8:8;
297 u8 ocnt;
298 u8:8;
299 u8 mbccnt;
300 u16 qdioac2;
301 u64 sch_token;
302 u64:64;
303} __attribute__ ((packed));
304
305/* params are: ccw_device, qdio_error, queue_number,
306 first element processed, number of elements processed, int_parm */
307typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
308 int, int, unsigned long);
309
310/* qdio errors reported to the upper-layer program */
311#define QDIO_ERROR_SIGA_ACCESS_EXCEPTION 0x10
312#define QDIO_ERROR_SIGA_BUSY 0x20
313#define QDIO_ERROR_ACTIVATE_CHECK_CONDITION 0x40
314#define QDIO_ERROR_SLSB_STATE 0x80
315
316/* for qdio_initialize */
317#define QDIO_INBOUND_0COPY_SBALS 0x01
318#define QDIO_OUTBOUND_0COPY_SBALS 0x02
319#define QDIO_USE_OUTBOUND_PCIS 0x04
320
321/* for qdio_cleanup */
322#define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01
323#define QDIO_FLAG_CLEANUP_USING_HALT 0x02
324
325/**
326 * struct qdio_initialize - qdio initalization data
327 * @cdev: associated ccw device
328 * @q_format: queue format
329 * @adapter_name: name for the adapter
330 * @qib_param_field_format: format for qib_parm_field
331 * @qib_param_field: pointer to 128 bytes or NULL, if no param field
332 * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL
333 * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL
334 * @no_input_qs: number of input queues
335 * @no_output_qs: number of output queues
336 * @input_handler: handler to be called for input queues
337 * @output_handler: handler to be called for output queues
338 * @int_parm: interruption parameter
339 * @flags: initialization flags
340 * @input_sbal_addr_array: address of no_input_qs * 128 pointers
341 * @output_sbal_addr_array: address of no_output_qs * 128 pointers
342 */
343struct qdio_initialize {
344 struct ccw_device *cdev;
345 unsigned char q_format;
346 unsigned char adapter_name[8];
347 unsigned int qib_param_field_format;
348 unsigned char *qib_param_field;
349 unsigned long *input_slib_elements;
350 unsigned long *output_slib_elements;
351 unsigned int no_input_qs;
352 unsigned int no_output_qs;
353 qdio_handler_t *input_handler;
354 qdio_handler_t *output_handler;
355 unsigned long int_parm;
356 unsigned long flags;
357 void **input_sbal_addr_array;
358 void **output_sbal_addr_array;
359};
360
361#define QDIO_STATE_INACTIVE 0x00000002 /* after qdio_cleanup */
362#define QDIO_STATE_ESTABLISHED 0x00000004 /* after qdio_establish */
363#define QDIO_STATE_ACTIVE 0x00000008 /* after qdio_activate */
364#define QDIO_STATE_STOPPED 0x00000010 /* after queues went down */
365
366#define QDIO_FLAG_SYNC_INPUT 0x01
367#define QDIO_FLAG_SYNC_OUTPUT 0x02
368#define QDIO_FLAG_PCI_OUT 0x10
369
370extern int qdio_initialize(struct qdio_initialize *init_data);
371extern int qdio_allocate(struct qdio_initialize *init_data);
372extern int qdio_establish(struct qdio_initialize *init_data);
373extern int qdio_activate(struct ccw_device *);
374
375extern int do_QDIO(struct ccw_device*, unsigned int flags,
376 int q_nr, int qidx, int count);
377extern int qdio_cleanup(struct ccw_device*, int how);
378extern int qdio_shutdown(struct ccw_device*, int how);
379extern int qdio_free(struct ccw_device *);
380extern struct qdio_ssqd_desc *qdio_get_ssqd_desc(struct ccw_device *cdev);
381
382#endif /* __QDIO_H__ */
diff --git a/include/asm-s390/qeth.h b/include/asm-s390/qeth.h
deleted file mode 100644
index 930d378ef75a..000000000000
--- a/include/asm-s390/qeth.h
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * include/asm-s390/qeth.h
3 *
4 * ioctl definitions for qeth driver
5 *
6 * Copyright (C) 2004 IBM Corporation
7 *
8 * Author(s): Thomas Spatzier <tspat@de.ibm.com>
9 *
10 */
11#ifndef __ASM_S390_QETH_IOCTL_H__
12#define __ASM_S390_QETH_IOCTL_H__
13#include <linux/ioctl.h>
14
15#define SIOC_QETH_ARP_SET_NO_ENTRIES (SIOCDEVPRIVATE)
16#define SIOC_QETH_ARP_QUERY_INFO (SIOCDEVPRIVATE + 1)
17#define SIOC_QETH_ARP_ADD_ENTRY (SIOCDEVPRIVATE + 2)
18#define SIOC_QETH_ARP_REMOVE_ENTRY (SIOCDEVPRIVATE + 3)
19#define SIOC_QETH_ARP_FLUSH_CACHE (SIOCDEVPRIVATE + 4)
20#define SIOC_QETH_ADP_SET_SNMP_CONTROL (SIOCDEVPRIVATE + 5)
21#define SIOC_QETH_GET_CARD_TYPE (SIOCDEVPRIVATE + 6)
22
23struct qeth_arp_cache_entry {
24 __u8 macaddr[6];
25 __u8 reserved1[2];
26 __u8 ipaddr[16]; /* for both IPv4 and IPv6 */
27 __u8 reserved2[32];
28} __attribute__ ((packed));
29
30struct qeth_arp_qi_entry7 {
31 __u8 media_specific[32];
32 __u8 macaddr_type;
33 __u8 ipaddr_type;
34 __u8 macaddr[6];
35 __u8 ipaddr[4];
36} __attribute__((packed));
37
38struct qeth_arp_qi_entry7_short {
39 __u8 macaddr_type;
40 __u8 ipaddr_type;
41 __u8 macaddr[6];
42 __u8 ipaddr[4];
43} __attribute__((packed));
44
45struct qeth_arp_qi_entry5 {
46 __u8 media_specific[32];
47 __u8 macaddr_type;
48 __u8 ipaddr_type;
49 __u8 ipaddr[4];
50} __attribute__((packed));
51
52struct qeth_arp_qi_entry5_short {
53 __u8 macaddr_type;
54 __u8 ipaddr_type;
55 __u8 ipaddr[4];
56} __attribute__((packed));
57
58/*
59 * can be set by user if no "media specific information" is wanted
60 * -> saves a lot of space in user space buffer
61 */
62#define QETH_QARP_STRIP_ENTRIES 0x8000
63#define QETH_QARP_REQUEST_MASK 0x00ff
64
65/* data sent to user space as result of query arp ioctl */
66#define QETH_QARP_USER_DATA_SIZE 20000
67#define QETH_QARP_MASK_OFFSET 4
68#define QETH_QARP_ENTRIES_OFFSET 6
69struct qeth_arp_query_user_data {
70 union {
71 __u32 data_len; /* set by user space program */
72 __u32 no_entries; /* set by kernel */
73 } u;
74 __u16 mask_bits;
75 char *entries;
76} __attribute__((packed));
77
78#endif /* __ASM_S390_QETH_IOCTL_H__ */
diff --git a/include/asm-s390/reset.h b/include/asm-s390/reset.h
deleted file mode 100644
index f584f4a52581..000000000000
--- a/include/asm-s390/reset.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * include/asm-s390/reset.h
3 *
4 * Copyright IBM Corp. 2006
5 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_RESET_H
9#define _ASM_S390_RESET_H
10
11#include <linux/list.h>
12
13struct reset_call {
14 struct list_head list;
15 void (*fn)(void);
16};
17
18extern void register_reset_call(struct reset_call *reset);
19extern void unregister_reset_call(struct reset_call *reset);
20extern void s390_reset_system(void);
21#endif /* _ASM_S390_RESET_H */
diff --git a/include/asm-s390/resource.h b/include/asm-s390/resource.h
deleted file mode 100644
index 366c01de04f2..000000000000
--- a/include/asm-s390/resource.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * include/asm-s390/resource.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/resources.h"
7 */
8
9#ifndef _S390_RESOURCE_H
10#define _S390_RESOURCE_H
11
12#include <asm-generic/resource.h>
13
14#endif
15
diff --git a/include/asm-s390/rwsem.h b/include/asm-s390/rwsem.h
deleted file mode 100644
index 9d2a17971805..000000000000
--- a/include/asm-s390/rwsem.h
+++ /dev/null
@@ -1,387 +0,0 @@
1#ifndef _S390_RWSEM_H
2#define _S390_RWSEM_H
3
4/*
5 * include/asm-s390/rwsem.h
6 *
7 * S390 version
8 * Copyright (C) 2002 IBM Deutschland Entwicklung GmbH, IBM Corporation
9 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
10 *
11 * Based on asm-alpha/semaphore.h and asm-i386/rwsem.h
12 */
13
14/*
15 *
16 * The MSW of the count is the negated number of active writers and waiting
17 * lockers, and the LSW is the total number of active locks
18 *
19 * The lock count is initialized to 0 (no active and no waiting lockers).
20 *
21 * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
22 * uncontended lock. This can be determined because XADD returns the old value.
23 * Readers increment by 1 and see a positive value when uncontended, negative
24 * if there are writers (and maybe) readers waiting (in which case it goes to
25 * sleep).
26 *
27 * The value of WAITING_BIAS supports up to 32766 waiting processes. This can
28 * be extended to 65534 by manually checking the whole MSW rather than relying
29 * on the S flag.
30 *
31 * The value of ACTIVE_BIAS supports up to 65535 active processes.
32 *
33 * This should be totally fair - if anything is waiting, a process that wants a
34 * lock will go to the back of the queue. When the currently active lock is
35 * released, if there's a writer at the front of the queue, then that and only
36 * that will be woken up; if there's a bunch of consequtive readers at the
37 * front, then they'll all be woken up, but no other readers will be.
38 */
39
40#ifndef _LINUX_RWSEM_H
41#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
42#endif
43
44#ifdef __KERNEL__
45
46#include <linux/list.h>
47#include <linux/spinlock.h>
48
49struct rwsem_waiter;
50
51extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *);
52extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *);
53extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *);
54extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *);
55extern struct rw_semaphore *rwsem_downgrade_write(struct rw_semaphore *);
56
57/*
58 * the semaphore definition
59 */
60struct rw_semaphore {
61 signed long count;
62 spinlock_t wait_lock;
63 struct list_head wait_list;
64#ifdef CONFIG_DEBUG_LOCK_ALLOC
65 struct lockdep_map dep_map;
66#endif
67};
68
69#ifndef __s390x__
70#define RWSEM_UNLOCKED_VALUE 0x00000000
71#define RWSEM_ACTIVE_BIAS 0x00000001
72#define RWSEM_ACTIVE_MASK 0x0000ffff
73#define RWSEM_WAITING_BIAS (-0x00010000)
74#else /* __s390x__ */
75#define RWSEM_UNLOCKED_VALUE 0x0000000000000000L
76#define RWSEM_ACTIVE_BIAS 0x0000000000000001L
77#define RWSEM_ACTIVE_MASK 0x00000000ffffffffL
78#define RWSEM_WAITING_BIAS (-0x0000000100000000L)
79#endif /* __s390x__ */
80#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
81#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
82
83/*
84 * initialisation
85 */
86
87#ifdef CONFIG_DEBUG_LOCK_ALLOC
88# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
89#else
90# define __RWSEM_DEP_MAP_INIT(lockname)
91#endif
92
93#define __RWSEM_INITIALIZER(name) \
94 { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait.lock), \
95 LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) }
96
97#define DECLARE_RWSEM(name) \
98 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
99
100static inline void init_rwsem(struct rw_semaphore *sem)
101{
102 sem->count = RWSEM_UNLOCKED_VALUE;
103 spin_lock_init(&sem->wait_lock);
104 INIT_LIST_HEAD(&sem->wait_list);
105}
106
107extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
108 struct lock_class_key *key);
109
110#define init_rwsem(sem) \
111do { \
112 static struct lock_class_key __key; \
113 \
114 __init_rwsem((sem), #sem, &__key); \
115} while (0)
116
117
118/*
119 * lock for reading
120 */
121static inline void __down_read(struct rw_semaphore *sem)
122{
123 signed long old, new;
124
125 asm volatile(
126#ifndef __s390x__
127 " l %0,0(%3)\n"
128 "0: lr %1,%0\n"
129 " ahi %1,%5\n"
130 " cs %0,%1,0(%3)\n"
131 " jl 0b"
132#else /* __s390x__ */
133 " lg %0,0(%3)\n"
134 "0: lgr %1,%0\n"
135 " aghi %1,%5\n"
136 " csg %0,%1,0(%3)\n"
137 " jl 0b"
138#endif /* __s390x__ */
139 : "=&d" (old), "=&d" (new), "=m" (sem->count)
140 : "a" (&sem->count), "m" (sem->count),
141 "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory");
142 if (old < 0)
143 rwsem_down_read_failed(sem);
144}
145
146/*
147 * trylock for reading -- returns 1 if successful, 0 if contention
148 */
149static inline int __down_read_trylock(struct rw_semaphore *sem)
150{
151 signed long old, new;
152
153 asm volatile(
154#ifndef __s390x__
155 " l %0,0(%3)\n"
156 "0: ltr %1,%0\n"
157 " jm 1f\n"
158 " ahi %1,%5\n"
159 " cs %0,%1,0(%3)\n"
160 " jl 0b\n"
161 "1:"
162#else /* __s390x__ */
163 " lg %0,0(%3)\n"
164 "0: ltgr %1,%0\n"
165 " jm 1f\n"
166 " aghi %1,%5\n"
167 " csg %0,%1,0(%3)\n"
168 " jl 0b\n"
169 "1:"
170#endif /* __s390x__ */
171 : "=&d" (old), "=&d" (new), "=m" (sem->count)
172 : "a" (&sem->count), "m" (sem->count),
173 "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory");
174 return old >= 0 ? 1 : 0;
175}
176
177/*
178 * lock for writing
179 */
180static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
181{
182 signed long old, new, tmp;
183
184 tmp = RWSEM_ACTIVE_WRITE_BIAS;
185 asm volatile(
186#ifndef __s390x__
187 " l %0,0(%3)\n"
188 "0: lr %1,%0\n"
189 " a %1,%5\n"
190 " cs %0,%1,0(%3)\n"
191 " jl 0b"
192#else /* __s390x__ */
193 " lg %0,0(%3)\n"
194 "0: lgr %1,%0\n"
195 " ag %1,%5\n"
196 " csg %0,%1,0(%3)\n"
197 " jl 0b"
198#endif /* __s390x__ */
199 : "=&d" (old), "=&d" (new), "=m" (sem->count)
200 : "a" (&sem->count), "m" (sem->count), "m" (tmp)
201 : "cc", "memory");
202 if (old != 0)
203 rwsem_down_write_failed(sem);
204}
205
206static inline void __down_write(struct rw_semaphore *sem)
207{
208 __down_write_nested(sem, 0);
209}
210
211/*
212 * trylock for writing -- returns 1 if successful, 0 if contention
213 */
214static inline int __down_write_trylock(struct rw_semaphore *sem)
215{
216 signed long old;
217
218 asm volatile(
219#ifndef __s390x__
220 " l %0,0(%2)\n"
221 "0: ltr %0,%0\n"
222 " jnz 1f\n"
223 " cs %0,%4,0(%2)\n"
224 " jl 0b\n"
225#else /* __s390x__ */
226 " lg %0,0(%2)\n"
227 "0: ltgr %0,%0\n"
228 " jnz 1f\n"
229 " csg %0,%4,0(%2)\n"
230 " jl 0b\n"
231#endif /* __s390x__ */
232 "1:"
233 : "=&d" (old), "=m" (sem->count)
234 : "a" (&sem->count), "m" (sem->count),
235 "d" (RWSEM_ACTIVE_WRITE_BIAS) : "cc", "memory");
236 return (old == RWSEM_UNLOCKED_VALUE) ? 1 : 0;
237}
238
239/*
240 * unlock after reading
241 */
242static inline void __up_read(struct rw_semaphore *sem)
243{
244 signed long old, new;
245
246 asm volatile(
247#ifndef __s390x__
248 " l %0,0(%3)\n"
249 "0: lr %1,%0\n"
250 " ahi %1,%5\n"
251 " cs %0,%1,0(%3)\n"
252 " jl 0b"
253#else /* __s390x__ */
254 " lg %0,0(%3)\n"
255 "0: lgr %1,%0\n"
256 " aghi %1,%5\n"
257 " csg %0,%1,0(%3)\n"
258 " jl 0b"
259#endif /* __s390x__ */
260 : "=&d" (old), "=&d" (new), "=m" (sem->count)
261 : "a" (&sem->count), "m" (sem->count),
262 "i" (-RWSEM_ACTIVE_READ_BIAS)
263 : "cc", "memory");
264 if (new < 0)
265 if ((new & RWSEM_ACTIVE_MASK) == 0)
266 rwsem_wake(sem);
267}
268
269/*
270 * unlock after writing
271 */
272static inline void __up_write(struct rw_semaphore *sem)
273{
274 signed long old, new, tmp;
275
276 tmp = -RWSEM_ACTIVE_WRITE_BIAS;
277 asm volatile(
278#ifndef __s390x__
279 " l %0,0(%3)\n"
280 "0: lr %1,%0\n"
281 " a %1,%5\n"
282 " cs %0,%1,0(%3)\n"
283 " jl 0b"
284#else /* __s390x__ */
285 " lg %0,0(%3)\n"
286 "0: lgr %1,%0\n"
287 " ag %1,%5\n"
288 " csg %0,%1,0(%3)\n"
289 " jl 0b"
290#endif /* __s390x__ */
291 : "=&d" (old), "=&d" (new), "=m" (sem->count)
292 : "a" (&sem->count), "m" (sem->count), "m" (tmp)
293 : "cc", "memory");
294 if (new < 0)
295 if ((new & RWSEM_ACTIVE_MASK) == 0)
296 rwsem_wake(sem);
297}
298
299/*
300 * downgrade write lock to read lock
301 */
302static inline void __downgrade_write(struct rw_semaphore *sem)
303{
304 signed long old, new, tmp;
305
306 tmp = -RWSEM_WAITING_BIAS;
307 asm volatile(
308#ifndef __s390x__
309 " l %0,0(%3)\n"
310 "0: lr %1,%0\n"
311 " a %1,%5\n"
312 " cs %0,%1,0(%3)\n"
313 " jl 0b"
314#else /* __s390x__ */
315 " lg %0,0(%3)\n"
316 "0: lgr %1,%0\n"
317 " ag %1,%5\n"
318 " csg %0,%1,0(%3)\n"
319 " jl 0b"
320#endif /* __s390x__ */
321 : "=&d" (old), "=&d" (new), "=m" (sem->count)
322 : "a" (&sem->count), "m" (sem->count), "m" (tmp)
323 : "cc", "memory");
324 if (new > 1)
325 rwsem_downgrade_wake(sem);
326}
327
328/*
329 * implement atomic add functionality
330 */
331static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
332{
333 signed long old, new;
334
335 asm volatile(
336#ifndef __s390x__
337 " l %0,0(%3)\n"
338 "0: lr %1,%0\n"
339 " ar %1,%5\n"
340 " cs %0,%1,0(%3)\n"
341 " jl 0b"
342#else /* __s390x__ */
343 " lg %0,0(%3)\n"
344 "0: lgr %1,%0\n"
345 " agr %1,%5\n"
346 " csg %0,%1,0(%3)\n"
347 " jl 0b"
348#endif /* __s390x__ */
349 : "=&d" (old), "=&d" (new), "=m" (sem->count)
350 : "a" (&sem->count), "m" (sem->count), "d" (delta)
351 : "cc", "memory");
352}
353
354/*
355 * implement exchange and add functionality
356 */
357static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
358{
359 signed long old, new;
360
361 asm volatile(
362#ifndef __s390x__
363 " l %0,0(%3)\n"
364 "0: lr %1,%0\n"
365 " ar %1,%5\n"
366 " cs %0,%1,0(%3)\n"
367 " jl 0b"
368#else /* __s390x__ */
369 " lg %0,0(%3)\n"
370 "0: lgr %1,%0\n"
371 " agr %1,%5\n"
372 " csg %0,%1,0(%3)\n"
373 " jl 0b"
374#endif /* __s390x__ */
375 : "=&d" (old), "=&d" (new), "=m" (sem->count)
376 : "a" (&sem->count), "m" (sem->count), "d" (delta)
377 : "cc", "memory");
378 return new;
379}
380
381static inline int rwsem_is_locked(struct rw_semaphore *sem)
382{
383 return (sem->count != 0);
384}
385
386#endif /* __KERNEL__ */
387#endif /* _S390_RWSEM_H */
diff --git a/include/asm-s390/s390_ext.h b/include/asm-s390/s390_ext.h
deleted file mode 100644
index 2afc060266a2..000000000000
--- a/include/asm-s390/s390_ext.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef _S390_EXTINT_H
2#define _S390_EXTINT_H
3
4/*
5 * include/asm-s390/s390_ext.h
6 *
7 * S390 version
8 * Copyright IBM Corp. 1999,2007
9 * Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com),
10 * Martin Schwidefsky (schwidefsky@de.ibm.com)
11 */
12
13#include <linux/types.h>
14
15typedef void (*ext_int_handler_t)(__u16 code);
16
17typedef struct ext_int_info_t {
18 struct ext_int_info_t *next;
19 ext_int_handler_t handler;
20 __u16 code;
21} ext_int_info_t;
22
23extern ext_int_info_t *ext_int_hash[];
24
25int register_external_interrupt(__u16 code, ext_int_handler_t handler);
26int register_early_external_interrupt(__u16 code, ext_int_handler_t handler,
27 ext_int_info_t *info);
28int unregister_external_interrupt(__u16 code, ext_int_handler_t handler);
29int unregister_early_external_interrupt(__u16 code, ext_int_handler_t handler,
30 ext_int_info_t *info);
31
32#endif
diff --git a/include/asm-s390/s390_rdev.h b/include/asm-s390/s390_rdev.h
deleted file mode 100644
index 6fa20442a48c..000000000000
--- a/include/asm-s390/s390_rdev.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/*
2 * include/asm-s390/ccwdev.h
3 *
4 * Copyright (C) 2002,2005 IBM Deutschland Entwicklung GmbH, IBM Corporation
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
6 * Carsten Otte <cotte@de.ibm.com>
7 *
8 * Interface for s390 root device
9 */
10
11#ifndef _S390_RDEV_H_
12#define _S390_RDEV_H_
13extern struct device *s390_root_dev_register(const char *);
14extern void s390_root_dev_unregister(struct device *);
15#endif /* _S390_RDEV_H_ */
diff --git a/include/asm-s390/scatterlist.h b/include/asm-s390/scatterlist.h
deleted file mode 100644
index 29ec8e28c8df..000000000000
--- a/include/asm-s390/scatterlist.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASMS390_SCATTERLIST_H
2#define _ASMS390_SCATTERLIST_H
3
4struct scatterlist {
5#ifdef CONFIG_DEBUG_SG
6 unsigned long sg_magic;
7#endif
8 unsigned long page_link;
9 unsigned int offset;
10 unsigned int length;
11};
12
13#ifdef __s390x__
14#define ISA_DMA_THRESHOLD (0xffffffffffffffffUL)
15#else
16#define ISA_DMA_THRESHOLD (0xffffffffUL)
17#endif
18
19#endif /* _ASMS390X_SCATTERLIST_H */
diff --git a/include/asm-s390/schid.h b/include/asm-s390/schid.h
deleted file mode 100644
index 825503cf3dc2..000000000000
--- a/include/asm-s390/schid.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef ASM_SCHID_H
2#define ASM_SCHID_H
3
4struct subchannel_id {
5 __u32 cssid : 8;
6 __u32 : 4;
7 __u32 m : 1;
8 __u32 ssid : 2;
9 __u32 one : 1;
10 __u32 sch_no : 16;
11} __attribute__ ((packed, aligned(4)));
12
13#ifdef __KERNEL__
14#include <linux/string.h>
15
16/* Helper function for sane state of pre-allocated subchannel_id. */
17static inline void
18init_subchannel_id(struct subchannel_id *schid)
19{
20 memset(schid, 0, sizeof(struct subchannel_id));
21 schid->one = 1;
22}
23
24static inline int
25schid_equal(struct subchannel_id *schid1, struct subchannel_id *schid2)
26{
27 return !memcmp(schid1, schid2, sizeof(struct subchannel_id));
28}
29
30#endif /* __KERNEL__ */
31
32#endif /* ASM_SCHID_H */
diff --git a/include/asm-s390/sclp.h b/include/asm-s390/sclp.h
deleted file mode 100644
index fed7bee650a0..000000000000
--- a/include/asm-s390/sclp.h
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * include/asm-s390/sclp.h
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
6 */
7
8#ifndef _ASM_S390_SCLP_H
9#define _ASM_S390_SCLP_H
10
11#include <linux/types.h>
12#include <asm/chpid.h>
13
14#define SCLP_CHP_INFO_MASK_SIZE 32
15
16struct sclp_chp_info {
17 u8 recognized[SCLP_CHP_INFO_MASK_SIZE];
18 u8 standby[SCLP_CHP_INFO_MASK_SIZE];
19 u8 configured[SCLP_CHP_INFO_MASK_SIZE];
20};
21
22#define LOADPARM_LEN 8
23
24struct sclp_ipl_info {
25 int is_valid;
26 int has_dump;
27 char loadparm[LOADPARM_LEN];
28};
29
30struct sclp_cpu_entry {
31 u8 address;
32 u8 reserved0[13];
33 u8 type;
34 u8 reserved1;
35} __attribute__((packed));
36
37struct sclp_cpu_info {
38 unsigned int configured;
39 unsigned int standby;
40 unsigned int combined;
41 int has_cpu_type;
42 struct sclp_cpu_entry cpu[255];
43};
44
45int sclp_get_cpu_info(struct sclp_cpu_info *info);
46int sclp_cpu_configure(u8 cpu);
47int sclp_cpu_deconfigure(u8 cpu);
48void sclp_facilities_detect(void);
49unsigned long long sclp_get_rnmax(void);
50unsigned long long sclp_get_rzm(void);
51int sclp_sdias_blk_count(void);
52int sclp_sdias_copy(void *dest, int blk_num, int nr_blks);
53int sclp_chp_configure(struct chp_id chpid);
54int sclp_chp_deconfigure(struct chp_id chpid);
55int sclp_chp_read_info(struct sclp_chp_info *info);
56void sclp_get_ipl_info(struct sclp_ipl_info *info);
57
58#endif /* _ASM_S390_SCLP_H */
diff --git a/include/asm-s390/sections.h b/include/asm-s390/sections.h
deleted file mode 100644
index fbd9116eb17b..000000000000
--- a/include/asm-s390/sections.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _S390_SECTIONS_H
2#define _S390_SECTIONS_H
3
4#include <asm-generic/sections.h>
5
6extern char _eshared[], _ehead[];
7
8#endif
diff --git a/include/asm-s390/segment.h b/include/asm-s390/segment.h
deleted file mode 100644
index 8bfce3475b1c..000000000000
--- a/include/asm-s390/segment.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef _ASM_SEGMENT_H
2#define _ASM_SEGMENT_H
3
4#endif
diff --git a/include/asm-s390/sembuf.h b/include/asm-s390/sembuf.h
deleted file mode 100644
index 32626b0cac4b..000000000000
--- a/include/asm-s390/sembuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef _S390_SEMBUF_H
2#define _S390_SEMBUF_H
3
4/*
5 * The semid64_ds structure for S/390 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem (for !__s390x__)
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17#ifndef __s390x__
18 unsigned long __unused1;
19#endif /* ! __s390x__ */
20 __kernel_time_t sem_ctime; /* last change time */
21#ifndef __s390x__
22 unsigned long __unused2;
23#endif /* ! __s390x__ */
24 unsigned long sem_nsems; /* no. of semaphores in array */
25 unsigned long __unused3;
26 unsigned long __unused4;
27};
28
29#endif /* _S390_SEMBUF_H */
diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h
deleted file mode 100644
index 2bd9faeb3919..000000000000
--- a/include/asm-s390/setup.h
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * include/asm-s390/setup.h
3 *
4 * S390 version
5 * Copyright IBM Corp. 1999,2006
6 */
7
8#ifndef _ASM_S390_SETUP_H
9#define _ASM_S390_SETUP_H
10
11#define COMMAND_LINE_SIZE 1024
12
13#define ARCH_COMMAND_LINE_SIZE 896
14
15#ifdef __KERNEL__
16
17#include <asm/types.h>
18
19#define PARMAREA 0x10400
20#define MEMORY_CHUNKS 256
21
22#ifndef __ASSEMBLY__
23
24#ifndef __s390x__
25#define IPL_DEVICE (*(unsigned long *) (0x10404))
26#define INITRD_START (*(unsigned long *) (0x1040C))
27#define INITRD_SIZE (*(unsigned long *) (0x10414))
28#else /* __s390x__ */
29#define IPL_DEVICE (*(unsigned long *) (0x10400))
30#define INITRD_START (*(unsigned long *) (0x10408))
31#define INITRD_SIZE (*(unsigned long *) (0x10410))
32#endif /* __s390x__ */
33#define COMMAND_LINE ((char *) (0x10480))
34
35#define CHUNK_READ_WRITE 0
36#define CHUNK_READ_ONLY 1
37
38struct mem_chunk {
39 unsigned long addr;
40 unsigned long size;
41 int type;
42};
43
44extern struct mem_chunk memory_chunk[];
45extern unsigned long real_memory_size;
46
47void detect_memory_layout(struct mem_chunk chunk[]);
48
49#ifdef CONFIG_S390_SWITCH_AMODE
50extern unsigned int switch_amode;
51#else
52#define switch_amode (0)
53#endif
54
55#ifdef CONFIG_S390_EXEC_PROTECT
56extern unsigned int s390_noexec;
57#else
58#define s390_noexec (0)
59#endif
60
61/*
62 * Machine features detected in head.S
63 */
64extern unsigned long machine_flags;
65
66#define MACHINE_FLAG_VM (1UL << 0)
67#define MACHINE_FLAG_IEEE (1UL << 1)
68#define MACHINE_FLAG_CSP (1UL << 3)
69#define MACHINE_FLAG_MVPG (1UL << 4)
70#define MACHINE_FLAG_DIAG44 (1UL << 5)
71#define MACHINE_FLAG_IDTE (1UL << 6)
72#define MACHINE_FLAG_DIAG9C (1UL << 7)
73#define MACHINE_FLAG_MVCOS (1UL << 8)
74#define MACHINE_FLAG_KVM (1UL << 9)
75#define MACHINE_FLAG_HPAGE (1UL << 10)
76#define MACHINE_FLAG_PFMF (1UL << 11)
77
78#define MACHINE_IS_VM (machine_flags & MACHINE_FLAG_VM)
79#define MACHINE_IS_KVM (machine_flags & MACHINE_FLAG_KVM)
80#define MACHINE_HAS_DIAG9C (machine_flags & MACHINE_FLAG_DIAG9C)
81
82#ifndef __s390x__
83#define MACHINE_HAS_IEEE (machine_flags & MACHINE_FLAG_IEEE)
84#define MACHINE_HAS_CSP (machine_flags & MACHINE_FLAG_CSP)
85#define MACHINE_HAS_IDTE (0)
86#define MACHINE_HAS_DIAG44 (1)
87#define MACHINE_HAS_MVPG (machine_flags & MACHINE_FLAG_MVPG)
88#define MACHINE_HAS_MVCOS (0)
89#define MACHINE_HAS_HPAGE (0)
90#define MACHINE_HAS_PFMF (0)
91#else /* __s390x__ */
92#define MACHINE_HAS_IEEE (1)
93#define MACHINE_HAS_CSP (1)
94#define MACHINE_HAS_IDTE (machine_flags & MACHINE_FLAG_IDTE)
95#define MACHINE_HAS_DIAG44 (machine_flags & MACHINE_FLAG_DIAG44)
96#define MACHINE_HAS_MVPG (1)
97#define MACHINE_HAS_MVCOS (machine_flags & MACHINE_FLAG_MVCOS)
98#define MACHINE_HAS_HPAGE (machine_flags & MACHINE_FLAG_HPAGE)
99#define MACHINE_HAS_PFMF (machine_flags & MACHINE_FLAG_PFMF)
100#endif /* __s390x__ */
101
102#define ZFCPDUMP_HSA_SIZE (32UL<<20)
103
104/*
105 * Console mode. Override with conmode=
106 */
107extern unsigned int console_mode;
108extern unsigned int console_devno;
109extern unsigned int console_irq;
110
111extern char vmhalt_cmd[];
112extern char vmpoff_cmd[];
113
114#define CONSOLE_IS_UNDEFINED (console_mode == 0)
115#define CONSOLE_IS_SCLP (console_mode == 1)
116#define CONSOLE_IS_3215 (console_mode == 2)
117#define CONSOLE_IS_3270 (console_mode == 3)
118#define SET_CONSOLE_SCLP do { console_mode = 1; } while (0)
119#define SET_CONSOLE_3215 do { console_mode = 2; } while (0)
120#define SET_CONSOLE_3270 do { console_mode = 3; } while (0)
121
122#define NSS_NAME_SIZE 8
123extern char kernel_nss_name[];
124
125#else /* __ASSEMBLY__ */
126
127#ifndef __s390x__
128#define IPL_DEVICE 0x10404
129#define INITRD_START 0x1040C
130#define INITRD_SIZE 0x10414
131#else /* __s390x__ */
132#define IPL_DEVICE 0x10400
133#define INITRD_START 0x10408
134#define INITRD_SIZE 0x10410
135#endif /* __s390x__ */
136#define COMMAND_LINE 0x10480
137
138#endif /* __ASSEMBLY__ */
139#endif /* __KERNEL__ */
140#endif /* _ASM_S390_SETUP_H */
diff --git a/include/asm-s390/sfp-machine.h b/include/asm-s390/sfp-machine.h
deleted file mode 100644
index 4e16aede4b06..000000000000
--- a/include/asm-s390/sfp-machine.h
+++ /dev/null
@@ -1,142 +0,0 @@
1/* Machine-dependent software floating-point definitions.
2 S/390 kernel version.
3 Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
4 This file is part of the GNU C Library.
5 Contributed by Richard Henderson (rth@cygnus.com),
6 Jakub Jelinek (jj@ultra.linux.cz),
7 David S. Miller (davem@redhat.com) and
8 Peter Maydell (pmaydell@chiark.greenend.org.uk).
9
10 The GNU C Library is free software; you can redistribute it and/or
11 modify it under the terms of the GNU Library General Public License as
12 published by the Free Software Foundation; either version 2 of the
13 License, or (at your option) any later version.
14
15 The GNU C Library is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 Library General Public License for more details.
19
20 You should have received a copy of the GNU Library General Public
21 License along with the GNU C Library; see the file COPYING.LIB. If
22 not, write to the Free Software Foundation, Inc.,
23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25#ifndef _SFP_MACHINE_H
26#define _SFP_MACHINE_H
27
28
29#define _FP_W_TYPE_SIZE 32
30#define _FP_W_TYPE unsigned int
31#define _FP_WS_TYPE signed int
32#define _FP_I_TYPE int
33
34#define _FP_MUL_MEAT_S(R,X,Y) \
35 _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
36#define _FP_MUL_MEAT_D(R,X,Y) \
37 _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
38#define _FP_MUL_MEAT_Q(R,X,Y) \
39 _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
40
41#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y)
42#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
43#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
44
45#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
46#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
47#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
48#define _FP_NANSIGN_S 0
49#define _FP_NANSIGN_D 0
50#define _FP_NANSIGN_Q 0
51
52#define _FP_KEEPNANFRACP 1
53
54/*
55 * If one NaN is signaling and the other is not,
56 * we choose that one, otherwise we choose X.
57 */
58#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
59 do { \
60 if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
61 && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
62 { \
63 R##_s = Y##_s; \
64 _FP_FRAC_COPY_##wc(R,Y); \
65 } \
66 else \
67 { \
68 R##_s = X##_s; \
69 _FP_FRAC_COPY_##wc(R,X); \
70 } \
71 R##_c = FP_CLS_NAN; \
72 } while (0)
73
74/* Some assembly to speed things up. */
75#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \
76 unsigned int __r2 = (x2) + (y2); \
77 unsigned int __r1 = (x1); \
78 unsigned int __r0 = (x0); \
79 asm volatile( \
80 " alr %2,%3\n" \
81 " brc 12,0f\n" \
82 " lhi 0,1\n" \
83 " alr %1,0\n" \
84 " brc 12,0f\n" \
85 " alr %0,0\n" \
86 "0:" \
87 : "+&d" (__r2), "+&d" (__r1), "+&d" (__r0) \
88 : "d" (y0), "i" (1) : "cc", "0" ); \
89 asm volatile( \
90 " alr %1,%2\n" \
91 " brc 12,0f\n" \
92 " ahi %0,1\n" \
93 "0:" \
94 : "+&d" (__r2), "+&d" (__r1) \
95 : "d" (y1) : "cc"); \
96 (r2) = __r2; \
97 (r1) = __r1; \
98 (r0) = __r0; \
99})
100
101#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \
102 unsigned int __r2 = (x2) - (y2); \
103 unsigned int __r1 = (x1); \
104 unsigned int __r0 = (x0); \
105 asm volatile( \
106 " slr %2,%3\n" \
107 " brc 3,0f\n" \
108 " lhi 0,1\n" \
109 " slr %1,0\n" \
110 " brc 3,0f\n" \
111 " slr %0,0\n" \
112 "0:" \
113 : "+&d" (__r2), "+&d" (__r1), "+&d" (__r0) \
114 : "d" (y0) : "cc", "0"); \
115 asm volatile( \
116 " slr %1,%2\n" \
117 " brc 3,0f\n" \
118 " ahi %0,-1\n" \
119 "0:" \
120 : "+&d" (__r2), "+&d" (__r1) \
121 : "d" (y1) : "cc"); \
122 (r2) = __r2; \
123 (r1) = __r1; \
124 (r0) = __r0; \
125})
126
127#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0)
128
129/* Obtain the current rounding mode. */
130#define FP_ROUNDMODE mode
131
132/* Exception flags. */
133#define FP_EX_INVALID 0x800000
134#define FP_EX_DIVZERO 0x400000
135#define FP_EX_OVERFLOW 0x200000
136#define FP_EX_UNDERFLOW 0x100000
137#define FP_EX_INEXACT 0x080000
138
139/* We write the results always */
140#define FP_INHIBIT_RESULTS 0
141
142#endif
diff --git a/include/asm-s390/sfp-util.h b/include/asm-s390/sfp-util.h
deleted file mode 100644
index 0addc6466d95..000000000000
--- a/include/asm-s390/sfp-util.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#include <linux/kernel.h>
2#include <linux/sched.h>
3#include <linux/types.h>
4#include <asm/byteorder.h>
5
6#define add_ssaaaa(sh, sl, ah, al, bh, bl) ({ \
7 unsigned int __sh = (ah); \
8 unsigned int __sl = (al); \
9 asm volatile( \
10 " alr %1,%3\n" \
11 " brc 12,0f\n" \
12 " ahi %0,1\n" \
13 "0: alr %0,%2" \
14 : "+&d" (__sh), "+d" (__sl) \
15 : "d" (bh), "d" (bl) : "cc"); \
16 (sh) = __sh; \
17 (sl) = __sl; \
18})
19
20#define sub_ddmmss(sh, sl, ah, al, bh, bl) ({ \
21 unsigned int __sh = (ah); \
22 unsigned int __sl = (al); \
23 asm volatile( \
24 " slr %1,%3\n" \
25 " brc 3,0f\n" \
26 " ahi %0,-1\n" \
27 "0: slr %0,%2" \
28 : "+&d" (__sh), "+d" (__sl) \
29 : "d" (bh), "d" (bl) : "cc"); \
30 (sh) = __sh; \
31 (sl) = __sl; \
32})
33
34/* a umul b = a mul b + (a>=2<<31) ? b<<32:0 + (b>=2<<31) ? a<<32:0 */
35#define umul_ppmm(wh, wl, u, v) ({ \
36 unsigned int __wh = u; \
37 unsigned int __wl = v; \
38 asm volatile( \
39 " ltr 1,%0\n" \
40 " mr 0,%1\n" \
41 " jnm 0f\n" \
42 " alr 0,%1\n" \
43 "0: ltr %1,%1\n" \
44 " jnm 1f\n" \
45 " alr 0,%0\n" \
46 "1: lr %0,0\n" \
47 " lr %1,1\n" \
48 : "+d" (__wh), "+d" (__wl) \
49 : : "0", "1", "cc"); \
50 wh = __wh; \
51 wl = __wl; \
52})
53
54#ifdef __s390x__
55#define udiv_qrnnd(q, r, n1, n0, d) \
56 do { unsigned long __n; \
57 unsigned int __r, __d; \
58 __n = ((unsigned long)(n1) << 32) + n0; \
59 __d = (d); \
60 (q) = __n / __d; \
61 (r) = __n % __d; \
62 } while (0)
63#else
64#define udiv_qrnnd(q, r, n1, n0, d) \
65 do { unsigned int __r; \
66 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
67 (r) = __r; \
68 } while (0)
69extern unsigned long __udiv_qrnnd (unsigned int *, unsigned int,
70 unsigned int , unsigned int);
71#endif
72
73#define UDIV_NEEDS_NORMALIZATION 0
74
75#define abort() return 0
76
77#define __BYTE_ORDER __BIG_ENDIAN
diff --git a/include/asm-s390/shmbuf.h b/include/asm-s390/shmbuf.h
deleted file mode 100644
index eed2e280ce37..000000000000
--- a/include/asm-s390/shmbuf.h
+++ /dev/null
@@ -1,48 +0,0 @@
1#ifndef _S390_SHMBUF_H
2#define _S390_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for S/390 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem (for !__s390x__)
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18#ifndef __s390x__
19 unsigned long __unused1;
20#endif /* ! __s390x__ */
21 __kernel_time_t shm_dtime; /* last detach time */
22#ifndef __s390x__
23 unsigned long __unused2;
24#endif /* ! __s390x__ */
25 __kernel_time_t shm_ctime; /* last change time */
26#ifndef __s390x__
27 unsigned long __unused3;
28#endif /* ! __s390x__ */
29 __kernel_pid_t shm_cpid; /* pid of creator */
30 __kernel_pid_t shm_lpid; /* pid of last operator */
31 unsigned long shm_nattch; /* no. of current attaches */
32 unsigned long __unused4;
33 unsigned long __unused5;
34};
35
36struct shminfo64 {
37 unsigned long shmmax;
38 unsigned long shmmin;
39 unsigned long shmmni;
40 unsigned long shmseg;
41 unsigned long shmall;
42 unsigned long __unused1;
43 unsigned long __unused2;
44 unsigned long __unused3;
45 unsigned long __unused4;
46};
47
48#endif /* _S390_SHMBUF_H */
diff --git a/include/asm-s390/shmparam.h b/include/asm-s390/shmparam.h
deleted file mode 100644
index c2e0c0508e73..000000000000
--- a/include/asm-s390/shmparam.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/*
2 * include/asm-s390/shmparam.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/shmparam.h"
7 */
8#ifndef _ASM_S390_SHMPARAM_H
9#define _ASM_S390_SHMPARAM_H
10
11#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
12
13#endif /* _ASM_S390_SHMPARAM_H */
diff --git a/include/asm-s390/sigcontext.h b/include/asm-s390/sigcontext.h
deleted file mode 100644
index aeb6e0b13329..000000000000
--- a/include/asm-s390/sigcontext.h
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * include/asm-s390/sigcontext.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 */
7
8#ifndef _ASM_S390_SIGCONTEXT_H
9#define _ASM_S390_SIGCONTEXT_H
10
11#include <linux/compiler.h>
12
13#define __NUM_GPRS 16
14#define __NUM_FPRS 16
15#define __NUM_ACRS 16
16
17#ifndef __s390x__
18
19/* Has to be at least _NSIG_WORDS from asm/signal.h */
20#define _SIGCONTEXT_NSIG 64
21#define _SIGCONTEXT_NSIG_BPW 32
22/* Size of stack frame allocated when calling signal handler. */
23#define __SIGNAL_FRAMESIZE 96
24
25#else /* __s390x__ */
26
27/* Has to be at least _NSIG_WORDS from asm/signal.h */
28#define _SIGCONTEXT_NSIG 64
29#define _SIGCONTEXT_NSIG_BPW 64
30/* Size of stack frame allocated when calling signal handler. */
31#define __SIGNAL_FRAMESIZE 160
32
33#endif /* __s390x__ */
34
35#define _SIGCONTEXT_NSIG_WORDS (_SIGCONTEXT_NSIG / _SIGCONTEXT_NSIG_BPW)
36#define _SIGMASK_COPY_SIZE (sizeof(unsigned long)*_SIGCONTEXT_NSIG_WORDS)
37
38typedef struct
39{
40 unsigned long mask;
41 unsigned long addr;
42} __attribute__ ((aligned(8))) _psw_t;
43
44typedef struct
45{
46 _psw_t psw;
47 unsigned long gprs[__NUM_GPRS];
48 unsigned int acrs[__NUM_ACRS];
49} _s390_regs_common;
50
51typedef struct
52{
53 unsigned int fpc;
54 double fprs[__NUM_FPRS];
55} _s390_fp_regs;
56
57typedef struct
58{
59 _s390_regs_common regs;
60 _s390_fp_regs fpregs;
61} _sigregs;
62
63struct sigcontext
64{
65 unsigned long oldmask[_SIGCONTEXT_NSIG_WORDS];
66 _sigregs __user *sregs;
67};
68
69
70#endif
71
diff --git a/include/asm-s390/siginfo.h b/include/asm-s390/siginfo.h
deleted file mode 100644
index e0ff1ab054be..000000000000
--- a/include/asm-s390/siginfo.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * include/asm-s390/siginfo.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/siginfo.h"
7 */
8
9#ifndef _S390_SIGINFO_H
10#define _S390_SIGINFO_H
11
12#ifdef __s390x__
13#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
14#endif
15
16#include <asm-generic/siginfo.h>
17
18#endif
diff --git a/include/asm-s390/signal.h b/include/asm-s390/signal.h
deleted file mode 100644
index f6cfddb278cb..000000000000
--- a/include/asm-s390/signal.h
+++ /dev/null
@@ -1,172 +0,0 @@
1/*
2 * include/asm-s390/signal.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/signal.h"
7 */
8
9#ifndef _ASMS390_SIGNAL_H
10#define _ASMS390_SIGNAL_H
11
12#include <linux/types.h>
13#include <linux/time.h>
14
15/* Avoid too many header ordering problems. */
16struct siginfo;
17struct pt_regs;
18
19#ifdef __KERNEL__
20/* Most things should be clean enough to redefine this at will, if care
21 is taken to make libc match. */
22#include <asm/sigcontext.h>
23#define _NSIG _SIGCONTEXT_NSIG
24#define _NSIG_BPW _SIGCONTEXT_NSIG_BPW
25#define _NSIG_WORDS _SIGCONTEXT_NSIG_WORDS
26
27typedef unsigned long old_sigset_t; /* at least 32 bits */
28
29typedef struct {
30 unsigned long sig[_NSIG_WORDS];
31} sigset_t;
32
33#else
34/* Here we must cater to libcs that poke about in kernel headers. */
35
36#define NSIG 32
37typedef unsigned long sigset_t;
38
39#endif /* __KERNEL__ */
40
41#define SIGHUP 1
42#define SIGINT 2
43#define SIGQUIT 3
44#define SIGILL 4
45#define SIGTRAP 5
46#define SIGABRT 6
47#define SIGIOT 6
48#define SIGBUS 7
49#define SIGFPE 8
50#define SIGKILL 9
51#define SIGUSR1 10
52#define SIGSEGV 11
53#define SIGUSR2 12
54#define SIGPIPE 13
55#define SIGALRM 14
56#define SIGTERM 15
57#define SIGSTKFLT 16
58#define SIGCHLD 17
59#define SIGCONT 18
60#define SIGSTOP 19
61#define SIGTSTP 20
62#define SIGTTIN 21
63#define SIGTTOU 22
64#define SIGURG 23
65#define SIGXCPU 24
66#define SIGXFSZ 25
67#define SIGVTALRM 26
68#define SIGPROF 27
69#define SIGWINCH 28
70#define SIGIO 29
71#define SIGPOLL SIGIO
72/*
73#define SIGLOST 29
74*/
75#define SIGPWR 30
76#define SIGSYS 31
77#define SIGUNUSED 31
78
79/* These should not be considered constants from userland. */
80#define SIGRTMIN 32
81#define SIGRTMAX _NSIG
82
83/*
84 * SA_FLAGS values:
85 *
86 * SA_ONSTACK indicates that a registered stack_t will be used.
87 * SA_RESTART flag to get restarting signals (which were the default long ago)
88 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
89 * SA_RESETHAND clears the handler when the signal is delivered.
90 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
91 * SA_NODEFER prevents the current signal from being masked in the handler.
92 *
93 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
94 * Unix names RESETHAND and NODEFER respectively.
95 */
96#define SA_NOCLDSTOP 0x00000001
97#define SA_NOCLDWAIT 0x00000002
98#define SA_SIGINFO 0x00000004
99#define SA_ONSTACK 0x08000000
100#define SA_RESTART 0x10000000
101#define SA_NODEFER 0x40000000
102#define SA_RESETHAND 0x80000000
103
104#define SA_NOMASK SA_NODEFER
105#define SA_ONESHOT SA_RESETHAND
106
107#define SA_RESTORER 0x04000000
108
109/*
110 * sigaltstack controls
111 */
112#define SS_ONSTACK 1
113#define SS_DISABLE 2
114
115#define MINSIGSTKSZ 2048
116#define SIGSTKSZ 8192
117
118#include <asm-generic/signal.h>
119
120#ifdef __KERNEL__
121struct old_sigaction {
122 __sighandler_t sa_handler;
123 old_sigset_t sa_mask;
124 unsigned long sa_flags;
125 void (*sa_restorer)(void);
126};
127
128struct sigaction {
129 __sighandler_t sa_handler;
130 unsigned long sa_flags;
131 void (*sa_restorer)(void);
132 sigset_t sa_mask; /* mask last for extensibility */
133};
134
135struct k_sigaction {
136 struct sigaction sa;
137};
138
139#define ptrace_signal_deliver(regs, cookie) do { } while (0)
140
141#else
142/* Here we must cater to libcs that poke about in kernel headers. */
143
144struct sigaction {
145 union {
146 __sighandler_t _sa_handler;
147 void (*_sa_sigaction)(int, struct siginfo *, void *);
148 } _u;
149#ifndef __s390x__ /* lovely */
150 sigset_t sa_mask;
151 unsigned long sa_flags;
152 void (*sa_restorer)(void);
153#else /* __s390x__ */
154 unsigned long sa_flags;
155 void (*sa_restorer)(void);
156 sigset_t sa_mask;
157#endif /* __s390x__ */
158};
159
160#define sa_handler _u._sa_handler
161#define sa_sigaction _u._sa_sigaction
162
163#endif /* __KERNEL__ */
164
165typedef struct sigaltstack {
166 void __user *ss_sp;
167 int ss_flags;
168 size_t ss_size;
169} stack_t;
170
171
172#endif
diff --git a/include/asm-s390/sigp.h b/include/asm-s390/sigp.h
deleted file mode 100644
index e16d56f8dfe1..000000000000
--- a/include/asm-s390/sigp.h
+++ /dev/null
@@ -1,126 +0,0 @@
1/*
2 * include/asm-s390/sigp.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Heiko Carstens (heiko.carstens@de.ibm.com)
9 *
10 * sigp.h by D.J. Barrow (c) IBM 1999
11 * contains routines / structures for signalling other S/390 processors in an
12 * SMP configuration.
13 */
14
15#ifndef __SIGP__
16#define __SIGP__
17
18#include <asm/ptrace.h>
19#include <asm/atomic.h>
20
21/* get real cpu address from logical cpu number */
22extern volatile int __cpu_logical_map[];
23
24typedef enum
25{
26 sigp_unassigned=0x0,
27 sigp_sense,
28 sigp_external_call,
29 sigp_emergency_signal,
30 sigp_start,
31 sigp_stop,
32 sigp_restart,
33 sigp_unassigned1,
34 sigp_unassigned2,
35 sigp_stop_and_store_status,
36 sigp_unassigned3,
37 sigp_initial_cpu_reset,
38 sigp_cpu_reset,
39 sigp_set_prefix,
40 sigp_store_status_at_address,
41 sigp_store_extended_status_at_address
42} sigp_order_code;
43
44typedef __u32 sigp_status_word;
45
46typedef enum
47{
48 sigp_order_code_accepted=0,
49 sigp_status_stored,
50 sigp_busy,
51 sigp_not_operational
52} sigp_ccode;
53
54
55/*
56 * Definitions for the external call
57 */
58
59/* 'Bit' signals, asynchronous */
60typedef enum
61{
62 ec_schedule=0,
63 ec_call_function,
64 ec_bit_last
65} ec_bit_sig;
66
67/*
68 * Signal processor
69 */
70static inline sigp_ccode
71signal_processor(__u16 cpu_addr, sigp_order_code order_code)
72{
73 register unsigned long reg1 asm ("1") = 0;
74 sigp_ccode ccode;
75
76 asm volatile(
77 " sigp %1,%2,0(%3)\n"
78 " ipm %0\n"
79 " srl %0,28\n"
80 : "=d" (ccode)
81 : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]),
82 "a" (order_code) : "cc" , "memory");
83 return ccode;
84}
85
86/*
87 * Signal processor with parameter
88 */
89static inline sigp_ccode
90signal_processor_p(__u32 parameter, __u16 cpu_addr, sigp_order_code order_code)
91{
92 register unsigned int reg1 asm ("1") = parameter;
93 sigp_ccode ccode;
94
95 asm volatile(
96 " sigp %1,%2,0(%3)\n"
97 " ipm %0\n"
98 " srl %0,28\n"
99 : "=d" (ccode)
100 : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]),
101 "a" (order_code) : "cc" , "memory");
102 return ccode;
103}
104
105/*
106 * Signal processor with parameter and return status
107 */
108static inline sigp_ccode
109signal_processor_ps(__u32 *statusptr, __u32 parameter, __u16 cpu_addr,
110 sigp_order_code order_code)
111{
112 register unsigned int reg1 asm ("1") = parameter;
113 sigp_ccode ccode;
114
115 asm volatile(
116 " sigp %1,%2,0(%3)\n"
117 " ipm %0\n"
118 " srl %0,28\n"
119 : "=d" (ccode), "+d" (reg1)
120 : "d" (__cpu_logical_map[cpu_addr]), "a" (order_code)
121 : "cc" , "memory");
122 *statusptr = reg1;
123 return ccode;
124}
125
126#endif /* __SIGP__ */
diff --git a/include/asm-s390/smp.h b/include/asm-s390/smp.h
deleted file mode 100644
index ae89cf2478fc..000000000000
--- a/include/asm-s390/smp.h
+++ /dev/null
@@ -1,116 +0,0 @@
1/*
2 * include/asm-s390/smp.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Heiko Carstens (heiko.carstens@de.ibm.com)
9 */
10#ifndef __ASM_SMP_H
11#define __ASM_SMP_H
12
13#include <linux/threads.h>
14#include <linux/cpumask.h>
15#include <linux/bitops.h>
16
17#if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__)
18
19#include <asm/lowcore.h>
20#include <asm/sigp.h>
21#include <asm/ptrace.h>
22#include <asm/system.h>
23
24/*
25 s390 specific smp.c headers
26 */
27typedef struct
28{
29 int intresting;
30 sigp_ccode ccode;
31 __u32 status;
32 __u16 cpu;
33} sigp_info;
34
35extern void machine_restart_smp(char *);
36extern void machine_halt_smp(void);
37extern void machine_power_off_smp(void);
38
39#define NO_PROC_ID 0xFF /* No processor magic marker */
40
41/*
42 * This magic constant controls our willingness to transfer
43 * a process across CPUs. Such a transfer incurs misses on the L1
44 * cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
45 * gut feeling is this will vary by board in value. For a board
46 * with separate L2 cache it probably depends also on the RSS, and
47 * for a board with shared L2 cache it ought to decay fast as other
48 * processes are run.
49 */
50
51#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
52
53#define raw_smp_processor_id() (S390_lowcore.cpu_data.cpu_nr)
54
55static inline __u16 hard_smp_processor_id(void)
56{
57 return stap();
58}
59
60/*
61 * returns 1 if cpu is in stopped/check stopped state or not operational
62 * returns 0 otherwise
63 */
64static inline int
65smp_cpu_not_running(int cpu)
66{
67 __u32 status;
68
69 switch (signal_processor_ps(&status, 0, cpu, sigp_sense)) {
70 case sigp_order_code_accepted:
71 case sigp_status_stored:
72 /* Check for stopped and check stop state */
73 if (status & 0x50)
74 return 1;
75 break;
76 case sigp_not_operational:
77 return 1;
78 default:
79 break;
80 }
81 return 0;
82}
83
84#define cpu_logical_map(cpu) (cpu)
85
86extern int __cpu_disable (void);
87extern void __cpu_die (unsigned int cpu);
88extern void cpu_die (void) __attribute__ ((noreturn));
89extern int __cpu_up (unsigned int cpu);
90
91extern struct mutex smp_cpu_state_mutex;
92extern int smp_cpu_polarization[];
93
94extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
95 void *info, int wait);
96#endif
97
98#ifndef CONFIG_SMP
99static inline void smp_send_stop(void)
100{
101 /* Disable all interrupts/machine checks */
102 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
103}
104
105#define hard_smp_processor_id() 0
106#define smp_cpu_not_running(cpu) 1
107#endif
108
109#ifdef CONFIG_HOTPLUG_CPU
110extern int smp_rescan_cpus(void);
111#else
112static inline int smp_rescan_cpus(void) { return 0; }
113#endif
114
115extern union save_area *zfcpdump_save_areas[NR_CPUS + 1];
116#endif
diff --git a/include/asm-s390/socket.h b/include/asm-s390/socket.h
deleted file mode 100644
index c786ab623b2d..000000000000
--- a/include/asm-s390/socket.h
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * include/asm-s390/socket.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/socket.h"
7 */
8
9#ifndef _ASM_SOCKET_H
10#define _ASM_SOCKET_H
11
12#include <asm/sockios.h>
13
14/* For setsockopt(2) */
15#define SOL_SOCKET 1
16
17#define SO_DEBUG 1
18#define SO_REUSEADDR 2
19#define SO_TYPE 3
20#define SO_ERROR 4
21#define SO_DONTROUTE 5
22#define SO_BROADCAST 6
23#define SO_SNDBUF 7
24#define SO_RCVBUF 8
25#define SO_SNDBUFFORCE 32
26#define SO_RCVBUFFORCE 33
27#define SO_KEEPALIVE 9
28#define SO_OOBINLINE 10
29#define SO_NO_CHECK 11
30#define SO_PRIORITY 12
31#define SO_LINGER 13
32#define SO_BSDCOMPAT 14
33/* To add :#define SO_REUSEPORT 15 */
34#define SO_PASSCRED 16
35#define SO_PEERCRED 17
36#define SO_RCVLOWAT 18
37#define SO_SNDLOWAT 19
38#define SO_RCVTIMEO 20
39#define SO_SNDTIMEO 21
40
41/* Security levels - as per NRL IPv6 - don't actually do anything */
42#define SO_SECURITY_AUTHENTICATION 22
43#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
44#define SO_SECURITY_ENCRYPTION_NETWORK 24
45
46#define SO_BINDTODEVICE 25
47
48/* Socket filtering */
49#define SO_ATTACH_FILTER 26
50#define SO_DETACH_FILTER 27
51
52#define SO_PEERNAME 28
53#define SO_TIMESTAMP 29
54#define SCM_TIMESTAMP SO_TIMESTAMP
55
56#define SO_ACCEPTCONN 30
57
58#define SO_PEERSEC 31
59#define SO_PASSSEC 34
60#define SO_TIMESTAMPNS 35
61#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
62
63#define SO_MARK 36
64
65#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-s390/sockios.h b/include/asm-s390/sockios.h
deleted file mode 100644
index f4fc16c7da59..000000000000
--- a/include/asm-s390/sockios.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * include/asm-s390/sockios.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/sockios.h"
7 */
8
9#ifndef __ARCH_S390_SOCKIOS__
10#define __ARCH_S390_SOCKIOS__
11
12/* Socket-level I/O control calls. */
13#define FIOSETOWN 0x8901
14#define SIOCSPGRP 0x8902
15#define FIOGETOWN 0x8903
16#define SIOCGPGRP 0x8904
17#define SIOCATMARK 0x8905
18#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
19#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
20
21#endif
diff --git a/include/asm-s390/sparsemem.h b/include/asm-s390/sparsemem.h
deleted file mode 100644
index 545d219e6a2d..000000000000
--- a/include/asm-s390/sparsemem.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef _ASM_S390_SPARSEMEM_H
2#define _ASM_S390_SPARSEMEM_H
3
4#ifdef CONFIG_64BIT
5
6#define SECTION_SIZE_BITS 28
7#define MAX_PHYSADDR_BITS 42
8#define MAX_PHYSMEM_BITS 42
9
10#else
11
12#define SECTION_SIZE_BITS 25
13#define MAX_PHYSADDR_BITS 31
14#define MAX_PHYSMEM_BITS 31
15
16#endif /* CONFIG_64BIT */
17
18#endif /* _ASM_S390_SPARSEMEM_H */
diff --git a/include/asm-s390/spinlock.h b/include/asm-s390/spinlock.h
deleted file mode 100644
index df84ae96915f..000000000000
--- a/include/asm-s390/spinlock.h
+++ /dev/null
@@ -1,178 +0,0 @@
1/*
2 * include/asm-s390/spinlock.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * Derived from "include/asm-i386/spinlock.h"
9 */
10
11#ifndef __ASM_SPINLOCK_H
12#define __ASM_SPINLOCK_H
13
14#include <linux/smp.h>
15
16#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
17
18static inline int
19_raw_compare_and_swap(volatile unsigned int *lock,
20 unsigned int old, unsigned int new)
21{
22 asm volatile(
23 " cs %0,%3,%1"
24 : "=d" (old), "=Q" (*lock)
25 : "0" (old), "d" (new), "Q" (*lock)
26 : "cc", "memory" );
27 return old;
28}
29
30#else /* __GNUC__ */
31
32static inline int
33_raw_compare_and_swap(volatile unsigned int *lock,
34 unsigned int old, unsigned int new)
35{
36 asm volatile(
37 " cs %0,%3,0(%4)"
38 : "=d" (old), "=m" (*lock)
39 : "0" (old), "d" (new), "a" (lock), "m" (*lock)
40 : "cc", "memory" );
41 return old;
42}
43
44#endif /* __GNUC__ */
45
46/*
47 * Simple spin lock operations. There are two variants, one clears IRQ's
48 * on the local processor, one does not.
49 *
50 * We make no fairness assumptions. They have a cost.
51 *
52 * (the type definitions are in asm/spinlock_types.h)
53 */
54
55#define __raw_spin_is_locked(x) ((x)->owner_cpu != 0)
56#define __raw_spin_unlock_wait(lock) \
57 do { while (__raw_spin_is_locked(lock)) \
58 _raw_spin_relax(lock); } while (0)
59
60extern void _raw_spin_lock_wait(raw_spinlock_t *);
61extern void _raw_spin_lock_wait_flags(raw_spinlock_t *, unsigned long flags);
62extern int _raw_spin_trylock_retry(raw_spinlock_t *);
63extern void _raw_spin_relax(raw_spinlock_t *lock);
64
65static inline void __raw_spin_lock(raw_spinlock_t *lp)
66{
67 int old;
68
69 old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
70 if (likely(old == 0))
71 return;
72 _raw_spin_lock_wait(lp);
73}
74
75static inline void __raw_spin_lock_flags(raw_spinlock_t *lp,
76 unsigned long flags)
77{
78 int old;
79
80 old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
81 if (likely(old == 0))
82 return;
83 _raw_spin_lock_wait_flags(lp, flags);
84}
85
86static inline int __raw_spin_trylock(raw_spinlock_t *lp)
87{
88 int old;
89
90 old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
91 if (likely(old == 0))
92 return 1;
93 return _raw_spin_trylock_retry(lp);
94}
95
96static inline void __raw_spin_unlock(raw_spinlock_t *lp)
97{
98 _raw_compare_and_swap(&lp->owner_cpu, lp->owner_cpu, 0);
99}
100
101/*
102 * Read-write spinlocks, allowing multiple readers
103 * but only one writer.
104 *
105 * NOTE! it is quite common to have readers in interrupts
106 * but no interrupt writers. For those circumstances we
107 * can "mix" irq-safe locks - any writer needs to get a
108 * irq-safe write-lock, but readers can get non-irqsafe
109 * read-locks.
110 */
111
112/**
113 * read_can_lock - would read_trylock() succeed?
114 * @lock: the rwlock in question.
115 */
116#define __raw_read_can_lock(x) ((int)(x)->lock >= 0)
117
118/**
119 * write_can_lock - would write_trylock() succeed?
120 * @lock: the rwlock in question.
121 */
122#define __raw_write_can_lock(x) ((x)->lock == 0)
123
124extern void _raw_read_lock_wait(raw_rwlock_t *lp);
125extern int _raw_read_trylock_retry(raw_rwlock_t *lp);
126extern void _raw_write_lock_wait(raw_rwlock_t *lp);
127extern int _raw_write_trylock_retry(raw_rwlock_t *lp);
128
129static inline void __raw_read_lock(raw_rwlock_t *rw)
130{
131 unsigned int old;
132 old = rw->lock & 0x7fffffffU;
133 if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old)
134 _raw_read_lock_wait(rw);
135}
136
137static inline void __raw_read_unlock(raw_rwlock_t *rw)
138{
139 unsigned int old, cmp;
140
141 old = rw->lock;
142 do {
143 cmp = old;
144 old = _raw_compare_and_swap(&rw->lock, old, old - 1);
145 } while (cmp != old);
146}
147
148static inline void __raw_write_lock(raw_rwlock_t *rw)
149{
150 if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0))
151 _raw_write_lock_wait(rw);
152}
153
154static inline void __raw_write_unlock(raw_rwlock_t *rw)
155{
156 _raw_compare_and_swap(&rw->lock, 0x80000000, 0);
157}
158
159static inline int __raw_read_trylock(raw_rwlock_t *rw)
160{
161 unsigned int old;
162 old = rw->lock & 0x7fffffffU;
163 if (likely(_raw_compare_and_swap(&rw->lock, old, old + 1) == old))
164 return 1;
165 return _raw_read_trylock_retry(rw);
166}
167
168static inline int __raw_write_trylock(raw_rwlock_t *rw)
169{
170 if (likely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) == 0))
171 return 1;
172 return _raw_write_trylock_retry(rw);
173}
174
175#define _raw_read_relax(lock) cpu_relax()
176#define _raw_write_relax(lock) cpu_relax()
177
178#endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-s390/spinlock_types.h b/include/asm-s390/spinlock_types.h
deleted file mode 100644
index 654abc40de04..000000000000
--- a/include/asm-s390/spinlock_types.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H
3
4#ifndef __LINUX_SPINLOCK_TYPES_H
5# error "please don't include this file directly"
6#endif
7
8typedef struct {
9 volatile unsigned int owner_cpu;
10} __attribute__ ((aligned (4))) raw_spinlock_t;
11
12#define __RAW_SPIN_LOCK_UNLOCKED { 0 }
13
14typedef struct {
15 volatile unsigned int lock;
16} raw_rwlock_t;
17
18#define __RAW_RW_LOCK_UNLOCKED { 0 }
19
20#endif
diff --git a/include/asm-s390/stat.h b/include/asm-s390/stat.h
deleted file mode 100644
index d92959eebb65..000000000000
--- a/include/asm-s390/stat.h
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * include/asm-s390/stat.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/stat.h"
7 */
8
9#ifndef _S390_STAT_H
10#define _S390_STAT_H
11
12#ifndef __s390x__
13struct __old_kernel_stat {
14 unsigned short st_dev;
15 unsigned short st_ino;
16 unsigned short st_mode;
17 unsigned short st_nlink;
18 unsigned short st_uid;
19 unsigned short st_gid;
20 unsigned short st_rdev;
21 unsigned long st_size;
22 unsigned long st_atime;
23 unsigned long st_mtime;
24 unsigned long st_ctime;
25};
26
27struct stat {
28 unsigned short st_dev;
29 unsigned short __pad1;
30 unsigned long st_ino;
31 unsigned short st_mode;
32 unsigned short st_nlink;
33 unsigned short st_uid;
34 unsigned short st_gid;
35 unsigned short st_rdev;
36 unsigned short __pad2;
37 unsigned long st_size;
38 unsigned long st_blksize;
39 unsigned long st_blocks;
40 unsigned long st_atime;
41 unsigned long st_atime_nsec;
42 unsigned long st_mtime;
43 unsigned long st_mtime_nsec;
44 unsigned long st_ctime;
45 unsigned long st_ctime_nsec;
46 unsigned long __unused4;
47 unsigned long __unused5;
48};
49
50/* This matches struct stat64 in glibc2.1, hence the absolutely
51 * insane amounts of padding around dev_t's.
52 */
53struct stat64 {
54 unsigned long long st_dev;
55 unsigned int __pad1;
56#define STAT64_HAS_BROKEN_ST_INO 1
57 unsigned long __st_ino;
58 unsigned int st_mode;
59 unsigned int st_nlink;
60 unsigned long st_uid;
61 unsigned long st_gid;
62 unsigned long long st_rdev;
63 unsigned int __pad3;
64 long long st_size;
65 unsigned long st_blksize;
66 unsigned char __pad4[4];
67 unsigned long __pad5; /* future possible st_blocks high bits */
68 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
69 unsigned long st_atime;
70 unsigned long st_atime_nsec;
71 unsigned long st_mtime;
72 unsigned long st_mtime_nsec;
73 unsigned long st_ctime;
74 unsigned long st_ctime_nsec; /* will be high 32 bits of ctime someday */
75 unsigned long long st_ino;
76};
77
78#else /* __s390x__ */
79
80struct stat {
81 unsigned long st_dev;
82 unsigned long st_ino;
83 unsigned long st_nlink;
84 unsigned int st_mode;
85 unsigned int st_uid;
86 unsigned int st_gid;
87 unsigned int __pad1;
88 unsigned long st_rdev;
89 unsigned long st_size;
90 unsigned long st_atime;
91 unsigned long st_atime_nsec;
92 unsigned long st_mtime;
93 unsigned long st_mtime_nsec;
94 unsigned long st_ctime;
95 unsigned long st_ctime_nsec;
96 unsigned long st_blksize;
97 long st_blocks;
98 unsigned long __unused[3];
99};
100
101#endif /* __s390x__ */
102
103#define STAT_HAVE_NSEC 1
104
105#endif
diff --git a/include/asm-s390/statfs.h b/include/asm-s390/statfs.h
deleted file mode 100644
index 099a45579190..000000000000
--- a/include/asm-s390/statfs.h
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * include/asm-s390/statfs.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/statfs.h"
7 */
8
9#ifndef _S390_STATFS_H
10#define _S390_STATFS_H
11
12#ifndef __s390x__
13#include <asm-generic/statfs.h>
14#else
15
16#ifndef __KERNEL_STRICT_NAMES
17
18#include <linux/types.h>
19
20typedef __kernel_fsid_t fsid_t;
21
22#endif
23
24/*
25 * This is ugly -- we're already 64-bit clean, so just duplicate the
26 * definitions.
27 */
28struct statfs {
29 int f_type;
30 int f_bsize;
31 long f_blocks;
32 long f_bfree;
33 long f_bavail;
34 long f_files;
35 long f_ffree;
36 __kernel_fsid_t f_fsid;
37 int f_namelen;
38 int f_frsize;
39 int f_spare[5];
40};
41
42struct statfs64 {
43 int f_type;
44 int f_bsize;
45 long f_blocks;
46 long f_bfree;
47 long f_bavail;
48 long f_files;
49 long f_ffree;
50 __kernel_fsid_t f_fsid;
51 int f_namelen;
52 int f_frsize;
53 int f_spare[5];
54};
55
56struct compat_statfs64 {
57 __u32 f_type;
58 __u32 f_bsize;
59 __u64 f_blocks;
60 __u64 f_bfree;
61 __u64 f_bavail;
62 __u64 f_files;
63 __u64 f_ffree;
64 __kernel_fsid_t f_fsid;
65 __u32 f_namelen;
66 __u32 f_frsize;
67 __u32 f_spare[5];
68};
69
70#endif /* __s390x__ */
71#endif
diff --git a/include/asm-s390/string.h b/include/asm-s390/string.h
deleted file mode 100644
index d074673a6d9b..000000000000
--- a/include/asm-s390/string.h
+++ /dev/null
@@ -1,143 +0,0 @@
1/*
2 * include/asm-s390/string.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 */
8
9#ifndef _S390_STRING_H_
10#define _S390_STRING_H_
11
12#ifdef __KERNEL__
13
14#ifndef _LINUX_TYPES_H
15#include <linux/types.h>
16#endif
17
18#define __HAVE_ARCH_MEMCHR /* inline & arch function */
19#define __HAVE_ARCH_MEMCMP /* arch function */
20#define __HAVE_ARCH_MEMCPY /* gcc builtin & arch function */
21#define __HAVE_ARCH_MEMSCAN /* inline & arch function */
22#define __HAVE_ARCH_MEMSET /* gcc builtin & arch function */
23#define __HAVE_ARCH_STRCAT /* inline & arch function */
24#define __HAVE_ARCH_STRCMP /* arch function */
25#define __HAVE_ARCH_STRCPY /* inline & arch function */
26#define __HAVE_ARCH_STRLCAT /* arch function */
27#define __HAVE_ARCH_STRLCPY /* arch function */
28#define __HAVE_ARCH_STRLEN /* inline & arch function */
29#define __HAVE_ARCH_STRNCAT /* arch function */
30#define __HAVE_ARCH_STRNCPY /* arch function */
31#define __HAVE_ARCH_STRNLEN /* inline & arch function */
32#define __HAVE_ARCH_STRRCHR /* arch function */
33#define __HAVE_ARCH_STRSTR /* arch function */
34
35/* Prototypes for non-inlined arch strings functions. */
36extern int memcmp(const void *, const void *, size_t);
37extern void *memcpy(void *, const void *, size_t);
38extern void *memset(void *, int, size_t);
39extern int strcmp(const char *,const char *);
40extern size_t strlcat(char *, const char *, size_t);
41extern size_t strlcpy(char *, const char *, size_t);
42extern char *strncat(char *, const char *, size_t);
43extern char *strncpy(char *, const char *, size_t);
44extern char *strrchr(const char *, int);
45extern char *strstr(const char *, const char *);
46
47#undef __HAVE_ARCH_MEMMOVE
48#undef __HAVE_ARCH_STRCHR
49#undef __HAVE_ARCH_STRNCHR
50#undef __HAVE_ARCH_STRNCMP
51#undef __HAVE_ARCH_STRNICMP
52#undef __HAVE_ARCH_STRPBRK
53#undef __HAVE_ARCH_STRSEP
54#undef __HAVE_ARCH_STRSPN
55
56#if !defined(IN_ARCH_STRING_C)
57
58static inline void *memchr(const void * s, int c, size_t n)
59{
60 register int r0 asm("0") = (char) c;
61 const void *ret = s + n;
62
63 asm volatile(
64 "0: srst %0,%1\n"
65 " jo 0b\n"
66 " jl 1f\n"
67 " la %0,0\n"
68 "1:"
69 : "+a" (ret), "+&a" (s) : "d" (r0) : "cc");
70 return (void *) ret;
71}
72
73static inline void *memscan(void *s, int c, size_t n)
74{
75 register int r0 asm("0") = (char) c;
76 const void *ret = s + n;
77
78 asm volatile(
79 "0: srst %0,%1\n"
80 " jo 0b\n"
81 : "+a" (ret), "+&a" (s) : "d" (r0) : "cc");
82 return (void *) ret;
83}
84
85static inline char *strcat(char *dst, const char *src)
86{
87 register int r0 asm("0") = 0;
88 unsigned long dummy;
89 char *ret = dst;
90
91 asm volatile(
92 "0: srst %0,%1\n"
93 " jo 0b\n"
94 "1: mvst %0,%2\n"
95 " jo 1b"
96 : "=&a" (dummy), "+a" (dst), "+a" (src)
97 : "d" (r0), "0" (0) : "cc", "memory" );
98 return ret;
99}
100
101static inline char *strcpy(char *dst, const char *src)
102{
103 register int r0 asm("0") = 0;
104 char *ret = dst;
105
106 asm volatile(
107 "0: mvst %0,%1\n"
108 " jo 0b"
109 : "+&a" (dst), "+&a" (src) : "d" (r0)
110 : "cc", "memory");
111 return ret;
112}
113
114static inline size_t strlen(const char *s)
115{
116 register unsigned long r0 asm("0") = 0;
117 const char *tmp = s;
118
119 asm volatile(
120 "0: srst %0,%1\n"
121 " jo 0b"
122 : "+d" (r0), "+a" (tmp) : : "cc");
123 return r0 - (unsigned long) s;
124}
125
126static inline size_t strnlen(const char * s, size_t n)
127{
128 register int r0 asm("0") = 0;
129 const char *tmp = s;
130 const char *end = s + n;
131
132 asm volatile(
133 "0: srst %0,%1\n"
134 " jo 0b"
135 : "+a" (end), "+a" (tmp) : "d" (r0) : "cc");
136 return end - s;
137}
138
139#endif /* !IN_ARCH_STRING_C */
140
141#endif /* __KERNEL__ */
142
143#endif /* __S390_STRING_H_ */
diff --git a/include/asm-s390/suspend.h b/include/asm-s390/suspend.h
deleted file mode 100644
index 1f34580e67a7..000000000000
--- a/include/asm-s390/suspend.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifndef __ASM_S390_SUSPEND_H
2#define __ASM_S390_SUSPEND_H
3
4#endif
5
diff --git a/include/asm-s390/sysinfo.h b/include/asm-s390/sysinfo.h
deleted file mode 100644
index 79d01343f8b0..000000000000
--- a/include/asm-s390/sysinfo.h
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * definition for store system information stsi
3 *
4 * Copyright IBM Corp. 2001,2008
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License (version 2 only)
8 * as published by the Free Software Foundation.
9 *
10 * Author(s): Ulrich Weigand <weigand@de.ibm.com>
11 * Christian Borntraeger <borntraeger@de.ibm.com>
12 */
13
14#ifndef __ASM_S390_SYSINFO_H
15#define __ASM_S390_SYSINFO_H
16
17struct sysinfo_1_1_1 {
18 char reserved_0[32];
19 char manufacturer[16];
20 char type[4];
21 char reserved_1[12];
22 char model_capacity[16];
23 char sequence[16];
24 char plant[4];
25 char model[16];
26 char model_perm_cap[16];
27 char model_temp_cap[16];
28 char model_cap_rating[4];
29 char model_perm_cap_rating[4];
30 char model_temp_cap_rating[4];
31};
32
33struct sysinfo_1_2_1 {
34 char reserved_0[80];
35 char sequence[16];
36 char plant[4];
37 char reserved_1[2];
38 unsigned short cpu_address;
39};
40
41struct sysinfo_1_2_2 {
42 char format;
43 char reserved_0[1];
44 unsigned short acc_offset;
45 char reserved_1[24];
46 unsigned int secondary_capability;
47 unsigned int capability;
48 unsigned short cpus_total;
49 unsigned short cpus_configured;
50 unsigned short cpus_standby;
51 unsigned short cpus_reserved;
52 unsigned short adjustment[0];
53};
54
55struct sysinfo_1_2_2_extension {
56 unsigned int alt_capability;
57 unsigned short alt_adjustment[0];
58};
59
60struct sysinfo_2_2_1 {
61 char reserved_0[80];
62 char sequence[16];
63 char plant[4];
64 unsigned short cpu_id;
65 unsigned short cpu_address;
66};
67
68struct sysinfo_2_2_2 {
69 char reserved_0[32];
70 unsigned short lpar_number;
71 char reserved_1;
72 unsigned char characteristics;
73 unsigned short cpus_total;
74 unsigned short cpus_configured;
75 unsigned short cpus_standby;
76 unsigned short cpus_reserved;
77 char name[8];
78 unsigned int caf;
79 char reserved_2[16];
80 unsigned short cpus_dedicated;
81 unsigned short cpus_shared;
82};
83
84#define LPAR_CHAR_DEDICATED (1 << 7)
85#define LPAR_CHAR_SHARED (1 << 6)
86#define LPAR_CHAR_LIMITED (1 << 5)
87
88struct sysinfo_3_2_2 {
89 char reserved_0[31];
90 unsigned char count;
91 struct {
92 char reserved_0[4];
93 unsigned short cpus_total;
94 unsigned short cpus_configured;
95 unsigned short cpus_standby;
96 unsigned short cpus_reserved;
97 char name[8];
98 unsigned int caf;
99 char cpi[16];
100 char reserved_1[24];
101
102 } vm[8];
103};
104
105static inline int stsi(void *sysinfo, int fc, int sel1, int sel2)
106{
107 register int r0 asm("0") = (fc << 28) | sel1;
108 register int r1 asm("1") = sel2;
109
110 asm volatile(
111 " stsi 0(%2)\n"
112 "0: jz 2f\n"
113 "1: lhi %0,%3\n"
114 "2:\n"
115 EX_TABLE(0b, 1b)
116 : "+d" (r0) : "d" (r1), "a" (sysinfo), "K" (-ENOSYS)
117 : "cc", "memory");
118 return r0;
119}
120
121#endif /* __ASM_S390_SYSINFO_H */
diff --git a/include/asm-s390/system.h b/include/asm-s390/system.h
deleted file mode 100644
index 819e7d99ca0c..000000000000
--- a/include/asm-s390/system.h
+++ /dev/null
@@ -1,462 +0,0 @@
1/*
2 * include/asm-s390/system.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 *
8 * Derived from "include/asm-i386/system.h"
9 */
10
11#ifndef __ASM_SYSTEM_H
12#define __ASM_SYSTEM_H
13
14#include <linux/kernel.h>
15#include <asm/types.h>
16#include <asm/ptrace.h>
17#include <asm/setup.h>
18#include <asm/processor.h>
19#include <asm/lowcore.h>
20
21#ifdef __KERNEL__
22
23struct task_struct;
24
25extern struct task_struct *__switch_to(void *, void *);
26
27static inline void save_fp_regs(s390_fp_regs *fpregs)
28{
29 asm volatile(
30 " std 0,8(%1)\n"
31 " std 2,24(%1)\n"
32 " std 4,40(%1)\n"
33 " std 6,56(%1)"
34 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory");
35 if (!MACHINE_HAS_IEEE)
36 return;
37 asm volatile(
38 " stfpc 0(%1)\n"
39 " std 1,16(%1)\n"
40 " std 3,32(%1)\n"
41 " std 5,48(%1)\n"
42 " std 7,64(%1)\n"
43 " std 8,72(%1)\n"
44 " std 9,80(%1)\n"
45 " std 10,88(%1)\n"
46 " std 11,96(%1)\n"
47 " std 12,104(%1)\n"
48 " std 13,112(%1)\n"
49 " std 14,120(%1)\n"
50 " std 15,128(%1)\n"
51 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory");
52}
53
54static inline void restore_fp_regs(s390_fp_regs *fpregs)
55{
56 asm volatile(
57 " ld 0,8(%0)\n"
58 " ld 2,24(%0)\n"
59 " ld 4,40(%0)\n"
60 " ld 6,56(%0)"
61 : : "a" (fpregs), "m" (*fpregs));
62 if (!MACHINE_HAS_IEEE)
63 return;
64 asm volatile(
65 " lfpc 0(%0)\n"
66 " ld 1,16(%0)\n"
67 " ld 3,32(%0)\n"
68 " ld 5,48(%0)\n"
69 " ld 7,64(%0)\n"
70 " ld 8,72(%0)\n"
71 " ld 9,80(%0)\n"
72 " ld 10,88(%0)\n"
73 " ld 11,96(%0)\n"
74 " ld 12,104(%0)\n"
75 " ld 13,112(%0)\n"
76 " ld 14,120(%0)\n"
77 " ld 15,128(%0)\n"
78 : : "a" (fpregs), "m" (*fpregs));
79}
80
81static inline void save_access_regs(unsigned int *acrs)
82{
83 asm volatile("stam 0,15,0(%0)" : : "a" (acrs) : "memory");
84}
85
86static inline void restore_access_regs(unsigned int *acrs)
87{
88 asm volatile("lam 0,15,0(%0)" : : "a" (acrs));
89}
90
91#define switch_to(prev,next,last) do { \
92 if (prev == next) \
93 break; \
94 save_fp_regs(&prev->thread.fp_regs); \
95 restore_fp_regs(&next->thread.fp_regs); \
96 save_access_regs(&prev->thread.acrs[0]); \
97 restore_access_regs(&next->thread.acrs[0]); \
98 prev = __switch_to(prev,next); \
99} while (0)
100
101#ifdef CONFIG_VIRT_CPU_ACCOUNTING
102extern void account_vtime(struct task_struct *);
103extern void account_tick_vtime(struct task_struct *);
104extern void account_system_vtime(struct task_struct *);
105#else
106#define account_vtime(x) do { /* empty */ } while (0)
107#endif
108
109#ifdef CONFIG_PFAULT
110extern void pfault_irq_init(void);
111extern int pfault_init(void);
112extern void pfault_fini(void);
113#else /* CONFIG_PFAULT */
114#define pfault_irq_init() do { } while (0)
115#define pfault_init() ({-1;})
116#define pfault_fini() do { } while (0)
117#endif /* CONFIG_PFAULT */
118
119#ifdef CONFIG_PAGE_STATES
120extern void cmma_init(void);
121#else
122static inline void cmma_init(void) { }
123#endif
124
125#define finish_arch_switch(prev) do { \
126 set_fs(current->thread.mm_segment); \
127 account_vtime(prev); \
128} while (0)
129
130#define nop() asm volatile("nop")
131
132#define xchg(ptr,x) \
133({ \
134 __typeof__(*(ptr)) __ret; \
135 __ret = (__typeof__(*(ptr))) \
136 __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \
137 __ret; \
138})
139
140extern void __xchg_called_with_bad_pointer(void);
141
142static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
143{
144 unsigned long addr, old;
145 int shift;
146
147 switch (size) {
148 case 1:
149 addr = (unsigned long) ptr;
150 shift = (3 ^ (addr & 3)) << 3;
151 addr ^= addr & 3;
152 asm volatile(
153 " l %0,0(%4)\n"
154 "0: lr 0,%0\n"
155 " nr 0,%3\n"
156 " or 0,%2\n"
157 " cs %0,0,0(%4)\n"
158 " jl 0b\n"
159 : "=&d" (old), "=m" (*(int *) addr)
160 : "d" (x << shift), "d" (~(255 << shift)), "a" (addr),
161 "m" (*(int *) addr) : "memory", "cc", "0");
162 return old >> shift;
163 case 2:
164 addr = (unsigned long) ptr;
165 shift = (2 ^ (addr & 2)) << 3;
166 addr ^= addr & 2;
167 asm volatile(
168 " l %0,0(%4)\n"
169 "0: lr 0,%0\n"
170 " nr 0,%3\n"
171 " or 0,%2\n"
172 " cs %0,0,0(%4)\n"
173 " jl 0b\n"
174 : "=&d" (old), "=m" (*(int *) addr)
175 : "d" (x << shift), "d" (~(65535 << shift)), "a" (addr),
176 "m" (*(int *) addr) : "memory", "cc", "0");
177 return old >> shift;
178 case 4:
179 asm volatile(
180 " l %0,0(%3)\n"
181 "0: cs %0,%2,0(%3)\n"
182 " jl 0b\n"
183 : "=&d" (old), "=m" (*(int *) ptr)
184 : "d" (x), "a" (ptr), "m" (*(int *) ptr)
185 : "memory", "cc");
186 return old;
187#ifdef __s390x__
188 case 8:
189 asm volatile(
190 " lg %0,0(%3)\n"
191 "0: csg %0,%2,0(%3)\n"
192 " jl 0b\n"
193 : "=&d" (old), "=m" (*(long *) ptr)
194 : "d" (x), "a" (ptr), "m" (*(long *) ptr)
195 : "memory", "cc");
196 return old;
197#endif /* __s390x__ */
198 }
199 __xchg_called_with_bad_pointer();
200 return x;
201}
202
203/*
204 * Atomic compare and exchange. Compare OLD with MEM, if identical,
205 * store NEW in MEM. Return the initial value in MEM. Success is
206 * indicated by comparing RETURN with OLD.
207 */
208
209#define __HAVE_ARCH_CMPXCHG 1
210
211#define cmpxchg(ptr, o, n) \
212 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
213 (unsigned long)(n), sizeof(*(ptr))))
214
215extern void __cmpxchg_called_with_bad_pointer(void);
216
217static inline unsigned long
218__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
219{
220 unsigned long addr, prev, tmp;
221 int shift;
222
223 switch (size) {
224 case 1:
225 addr = (unsigned long) ptr;
226 shift = (3 ^ (addr & 3)) << 3;
227 addr ^= addr & 3;
228 asm volatile(
229 " l %0,0(%4)\n"
230 "0: nr %0,%5\n"
231 " lr %1,%0\n"
232 " or %0,%2\n"
233 " or %1,%3\n"
234 " cs %0,%1,0(%4)\n"
235 " jnl 1f\n"
236 " xr %1,%0\n"
237 " nr %1,%5\n"
238 " jnz 0b\n"
239 "1:"
240 : "=&d" (prev), "=&d" (tmp)
241 : "d" (old << shift), "d" (new << shift), "a" (ptr),
242 "d" (~(255 << shift))
243 : "memory", "cc");
244 return prev >> shift;
245 case 2:
246 addr = (unsigned long) ptr;
247 shift = (2 ^ (addr & 2)) << 3;
248 addr ^= addr & 2;
249 asm volatile(
250 " l %0,0(%4)\n"
251 "0: nr %0,%5\n"
252 " lr %1,%0\n"
253 " or %0,%2\n"
254 " or %1,%3\n"
255 " cs %0,%1,0(%4)\n"
256 " jnl 1f\n"
257 " xr %1,%0\n"
258 " nr %1,%5\n"
259 " jnz 0b\n"
260 "1:"
261 : "=&d" (prev), "=&d" (tmp)
262 : "d" (old << shift), "d" (new << shift), "a" (ptr),
263 "d" (~(65535 << shift))
264 : "memory", "cc");
265 return prev >> shift;
266 case 4:
267 asm volatile(
268 " cs %0,%2,0(%3)\n"
269 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
270 : "memory", "cc");
271 return prev;
272#ifdef __s390x__
273 case 8:
274 asm volatile(
275 " csg %0,%2,0(%3)\n"
276 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
277 : "memory", "cc");
278 return prev;
279#endif /* __s390x__ */
280 }
281 __cmpxchg_called_with_bad_pointer();
282 return old;
283}
284
285/*
286 * Force strict CPU ordering.
287 * And yes, this is required on UP too when we're talking
288 * to devices.
289 *
290 * This is very similar to the ppc eieio/sync instruction in that is
291 * does a checkpoint syncronisation & makes sure that
292 * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ).
293 */
294
295#define eieio() asm volatile("bcr 15,0" : : : "memory")
296#define SYNC_OTHER_CORES(x) eieio()
297#define mb() eieio()
298#define rmb() eieio()
299#define wmb() eieio()
300#define read_barrier_depends() do { } while(0)
301#define smp_mb() mb()
302#define smp_rmb() rmb()
303#define smp_wmb() wmb()
304#define smp_read_barrier_depends() read_barrier_depends()
305#define smp_mb__before_clear_bit() smp_mb()
306#define smp_mb__after_clear_bit() smp_mb()
307
308
309#define set_mb(var, value) do { var = value; mb(); } while (0)
310
311#ifdef __s390x__
312
313#define __ctl_load(array, low, high) ({ \
314 typedef struct { char _[sizeof(array)]; } addrtype; \
315 asm volatile( \
316 " lctlg %1,%2,0(%0)\n" \
317 : : "a" (&array), "i" (low), "i" (high), \
318 "m" (*(addrtype *)(&array))); \
319 })
320
321#define __ctl_store(array, low, high) ({ \
322 typedef struct { char _[sizeof(array)]; } addrtype; \
323 asm volatile( \
324 " stctg %2,%3,0(%1)\n" \
325 : "=m" (*(addrtype *)(&array)) \
326 : "a" (&array), "i" (low), "i" (high)); \
327 })
328
329#else /* __s390x__ */
330
331#define __ctl_load(array, low, high) ({ \
332 typedef struct { char _[sizeof(array)]; } addrtype; \
333 asm volatile( \
334 " lctl %1,%2,0(%0)\n" \
335 : : "a" (&array), "i" (low), "i" (high), \
336 "m" (*(addrtype *)(&array))); \
337})
338
339#define __ctl_store(array, low, high) ({ \
340 typedef struct { char _[sizeof(array)]; } addrtype; \
341 asm volatile( \
342 " stctl %2,%3,0(%1)\n" \
343 : "=m" (*(addrtype *)(&array)) \
344 : "a" (&array), "i" (low), "i" (high)); \
345 })
346
347#endif /* __s390x__ */
348
349#define __ctl_set_bit(cr, bit) ({ \
350 unsigned long __dummy; \
351 __ctl_store(__dummy, cr, cr); \
352 __dummy |= 1UL << (bit); \
353 __ctl_load(__dummy, cr, cr); \
354})
355
356#define __ctl_clear_bit(cr, bit) ({ \
357 unsigned long __dummy; \
358 __ctl_store(__dummy, cr, cr); \
359 __dummy &= ~(1UL << (bit)); \
360 __ctl_load(__dummy, cr, cr); \
361})
362
363#include <linux/irqflags.h>
364
365#include <asm-generic/cmpxchg-local.h>
366
367static inline unsigned long __cmpxchg_local(volatile void *ptr,
368 unsigned long old,
369 unsigned long new, int size)
370{
371 switch (size) {
372 case 1:
373 case 2:
374 case 4:
375#ifdef __s390x__
376 case 8:
377#endif
378 return __cmpxchg(ptr, old, new, size);
379 default:
380 return __cmpxchg_local_generic(ptr, old, new, size);
381 }
382
383 return old;
384}
385
386/*
387 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
388 * them available.
389 */
390#define cmpxchg_local(ptr, o, n) \
391 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
392 (unsigned long)(n), sizeof(*(ptr))))
393#ifdef __s390x__
394#define cmpxchg64_local(ptr, o, n) \
395 ({ \
396 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
397 cmpxchg_local((ptr), (o), (n)); \
398 })
399#else
400#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
401#endif
402
403/*
404 * Use to set psw mask except for the first byte which
405 * won't be changed by this function.
406 */
407static inline void
408__set_psw_mask(unsigned long mask)
409{
410 __load_psw_mask(mask | (__raw_local_irq_stosm(0x00) & ~(-1UL >> 8)));
411}
412
413#define local_mcck_enable() __set_psw_mask(psw_kernel_bits)
414#define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK)
415
416int stfle(unsigned long long *list, int doublewords);
417
418#ifdef CONFIG_SMP
419
420extern void smp_ctl_set_bit(int cr, int bit);
421extern void smp_ctl_clear_bit(int cr, int bit);
422#define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
423#define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
424
425#else
426
427#define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
428#define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
429
430#endif /* CONFIG_SMP */
431
432static inline unsigned int stfl(void)
433{
434 asm volatile(
435 " .insn s,0xb2b10000,0(0)\n" /* stfl */
436 "0:\n"
437 EX_TABLE(0b,0b));
438 return S390_lowcore.stfl_fac_list;
439}
440
441static inline unsigned short stap(void)
442{
443 unsigned short cpu_address;
444
445 asm volatile("stap %0" : "=m" (cpu_address));
446 return cpu_address;
447}
448
449extern void (*_machine_restart)(char *command);
450extern void (*_machine_halt)(void);
451extern void (*_machine_power_off)(void);
452
453#define arch_align_stack(x) (x)
454
455#ifdef CONFIG_TRACE_IRQFLAGS
456extern psw_t sysc_restore_trace_psw;
457extern psw_t io_restore_trace_psw;
458#endif
459
460#endif /* __KERNEL__ */
461
462#endif
diff --git a/include/asm-s390/tape390.h b/include/asm-s390/tape390.h
deleted file mode 100644
index 884fba48f1ff..000000000000
--- a/include/asm-s390/tape390.h
+++ /dev/null
@@ -1,103 +0,0 @@
1/*************************************************************************
2 *
3 * tape390.h
4 * enables user programs to display messages and control encryption
5 * on s390 tape devices
6 *
7 * Copyright IBM Corp. 2001,2006
8 * Author(s): Michael Holzheu <holzheu@de.ibm.com>
9 *
10 *************************************************************************/
11
12#ifndef _TAPE390_H
13#define _TAPE390_H
14
15#define TAPE390_DISPLAY _IOW('d', 1, struct display_struct)
16
17/*
18 * The TAPE390_DISPLAY ioctl calls the Load Display command
19 * which transfers 17 bytes of data from the channel to the subsystem:
20 * - 1 format control byte, and
21 * - two 8-byte messages
22 *
23 * Format control byte:
24 * 0-2: New Message Overlay
25 * 3: Alternate Messages
26 * 4: Blink Message
27 * 5: Display Low/High Message
28 * 6: Reserved
29 * 7: Automatic Load Request
30 *
31 */
32
33typedef struct display_struct {
34 char cntrl;
35 char message1[8];
36 char message2[8];
37} display_struct;
38
39/*
40 * Tape encryption support
41 */
42
43struct tape390_crypt_info {
44 char capability;
45 char status;
46 char medium_status;
47} __attribute__ ((packed));
48
49
50/* Macros for "capable" field */
51#define TAPE390_CRYPT_SUPPORTED_MASK 0x01
52#define TAPE390_CRYPT_SUPPORTED(x) \
53 ((x.capability & TAPE390_CRYPT_SUPPORTED_MASK))
54
55/* Macros for "status" field */
56#define TAPE390_CRYPT_ON_MASK 0x01
57#define TAPE390_CRYPT_ON(x) (((x.status) & TAPE390_CRYPT_ON_MASK))
58
59/* Macros for "medium status" field */
60#define TAPE390_MEDIUM_LOADED_MASK 0x01
61#define TAPE390_MEDIUM_ENCRYPTED_MASK 0x02
62#define TAPE390_MEDIUM_ENCRYPTED(x) \
63 (((x.medium_status) & TAPE390_MEDIUM_ENCRYPTED_MASK))
64#define TAPE390_MEDIUM_LOADED(x) \
65 (((x.medium_status) & TAPE390_MEDIUM_LOADED_MASK))
66
67/*
68 * The TAPE390_CRYPT_SET ioctl is used to switch on/off encryption.
69 * The "encryption_capable" and "tape_status" fields are ignored for this ioctl!
70 */
71#define TAPE390_CRYPT_SET _IOW('d', 2, struct tape390_crypt_info)
72
73/*
74 * The TAPE390_CRYPT_QUERY ioctl is used to query the encryption state.
75 */
76#define TAPE390_CRYPT_QUERY _IOR('d', 3, struct tape390_crypt_info)
77
78/* Values for "kekl1/2_type" and "kekl1/2_type_on_tape" fields */
79#define TAPE390_KEKL_TYPE_NONE 0
80#define TAPE390_KEKL_TYPE_LABEL 1
81#define TAPE390_KEKL_TYPE_HASH 2
82
83struct tape390_kekl {
84 unsigned char type;
85 unsigned char type_on_tape;
86 char label[65];
87} __attribute__ ((packed));
88
89struct tape390_kekl_pair {
90 struct tape390_kekl kekl[2];
91} __attribute__ ((packed));
92
93/*
94 * The TAPE390_KEKL_SET ioctl is used to set Key Encrypting Key labels.
95 */
96#define TAPE390_KEKL_SET _IOW('d', 4, struct tape390_kekl_pair)
97
98/*
99 * The TAPE390_KEKL_QUERY ioctl is used to query Key Encrypting Key labels.
100 */
101#define TAPE390_KEKL_QUERY _IOR('d', 5, struct tape390_kekl_pair)
102
103#endif
diff --git a/include/asm-s390/termbits.h b/include/asm-s390/termbits.h
deleted file mode 100644
index 58731853d529..000000000000
--- a/include/asm-s390/termbits.h
+++ /dev/null
@@ -1,206 +0,0 @@
1/*
2 * include/asm-s390/termbits.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/termbits.h"
7 */
8
9#ifndef __ARCH_S390_TERMBITS_H__
10#define __ARCH_S390_TERMBITS_H__
11
12#include <linux/posix_types.h>
13
14typedef unsigned char cc_t;
15typedef unsigned int speed_t;
16typedef unsigned int tcflag_t;
17
18#define NCCS 19
19struct termios {
20 tcflag_t c_iflag; /* input mode flags */
21 tcflag_t c_oflag; /* output mode flags */
22 tcflag_t c_cflag; /* control mode flags */
23 tcflag_t c_lflag; /* local mode flags */
24 cc_t c_line; /* line discipline */
25 cc_t c_cc[NCCS]; /* control characters */
26};
27
28struct termios2 {
29 tcflag_t c_iflag; /* input mode flags */
30 tcflag_t c_oflag; /* output mode flags */
31 tcflag_t c_cflag; /* control mode flags */
32 tcflag_t c_lflag; /* local mode flags */
33 cc_t c_line; /* line discipline */
34 cc_t c_cc[NCCS]; /* control characters */
35 speed_t c_ispeed; /* input speed */
36 speed_t c_ospeed; /* output speed */
37};
38
39struct ktermios {
40 tcflag_t c_iflag; /* input mode flags */
41 tcflag_t c_oflag; /* output mode flags */
42 tcflag_t c_cflag; /* control mode flags */
43 tcflag_t c_lflag; /* local mode flags */
44 cc_t c_line; /* line discipline */
45 cc_t c_cc[NCCS]; /* control characters */
46 speed_t c_ispeed; /* input speed */
47 speed_t c_ospeed; /* output speed */
48};
49
50/* c_cc characters */
51#define VINTR 0
52#define VQUIT 1
53#define VERASE 2
54#define VKILL 3
55#define VEOF 4
56#define VTIME 5
57#define VMIN 6
58#define VSWTC 7
59#define VSTART 8
60#define VSTOP 9
61#define VSUSP 10
62#define VEOL 11
63#define VREPRINT 12
64#define VDISCARD 13
65#define VWERASE 14
66#define VLNEXT 15
67#define VEOL2 16
68
69/* c_iflag bits */
70#define IGNBRK 0000001
71#define BRKINT 0000002
72#define IGNPAR 0000004
73#define PARMRK 0000010
74#define INPCK 0000020
75#define ISTRIP 0000040
76#define INLCR 0000100
77#define IGNCR 0000200
78#define ICRNL 0000400
79#define IUCLC 0001000
80#define IXON 0002000
81#define IXANY 0004000
82#define IXOFF 0010000
83#define IMAXBEL 0020000
84#define IUTF8 0040000
85
86/* c_oflag bits */
87#define OPOST 0000001
88#define OLCUC 0000002
89#define ONLCR 0000004
90#define OCRNL 0000010
91#define ONOCR 0000020
92#define ONLRET 0000040
93#define OFILL 0000100
94#define OFDEL 0000200
95#define NLDLY 0000400
96#define NL0 0000000
97#define NL1 0000400
98#define CRDLY 0003000
99#define CR0 0000000
100#define CR1 0001000
101#define CR2 0002000
102#define CR3 0003000
103#define TABDLY 0014000
104#define TAB0 0000000
105#define TAB1 0004000
106#define TAB2 0010000
107#define TAB3 0014000
108#define XTABS 0014000
109#define BSDLY 0020000
110#define BS0 0000000
111#define BS1 0020000
112#define VTDLY 0040000
113#define VT0 0000000
114#define VT1 0040000
115#define FFDLY 0100000
116#define FF0 0000000
117#define FF1 0100000
118
119/* c_cflag bit meaning */
120#define CBAUD 0010017
121#define B0 0000000 /* hang up */
122#define B50 0000001
123#define B75 0000002
124#define B110 0000003
125#define B134 0000004
126#define B150 0000005
127#define B200 0000006
128#define B300 0000007
129#define B600 0000010
130#define B1200 0000011
131#define B1800 0000012
132#define B2400 0000013
133#define B4800 0000014
134#define B9600 0000015
135#define B19200 0000016
136#define B38400 0000017
137#define EXTA B19200
138#define EXTB B38400
139#define CSIZE 0000060
140#define CS5 0000000
141#define CS6 0000020
142#define CS7 0000040
143#define CS8 0000060
144#define CSTOPB 0000100
145#define CREAD 0000200
146#define PARENB 0000400
147#define PARODD 0001000
148#define HUPCL 0002000
149#define CLOCAL 0004000
150#define CBAUDEX 0010000
151#define BOTHER 0010000
152#define B57600 0010001
153#define B115200 0010002
154#define B230400 0010003
155#define B460800 0010004
156#define B500000 0010005
157#define B576000 0010006
158#define B921600 0010007
159#define B1000000 0010010
160#define B1152000 0010011
161#define B1500000 0010012
162#define B2000000 0010013
163#define B2500000 0010014
164#define B3000000 0010015
165#define B3500000 0010016
166#define B4000000 0010017
167#define CIBAUD 002003600000 /* input baud rate */
168#define CMSPAR 010000000000 /* mark or space (stick) parity */
169#define CRTSCTS 020000000000 /* flow control */
170
171#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
172
173/* c_lflag bits */
174#define ISIG 0000001
175#define ICANON 0000002
176#define XCASE 0000004
177#define ECHO 0000010
178#define ECHOE 0000020
179#define ECHOK 0000040
180#define ECHONL 0000100
181#define NOFLSH 0000200
182#define TOSTOP 0000400
183#define ECHOCTL 0001000
184#define ECHOPRT 0002000
185#define ECHOKE 0004000
186#define FLUSHO 0010000
187#define PENDIN 0040000
188#define IEXTEN 0100000
189
190/* tcflow() and TCXONC use these */
191#define TCOOFF 0
192#define TCOON 1
193#define TCIOFF 2
194#define TCION 3
195
196/* tcflush() and TCFLSH use these */
197#define TCIFLUSH 0
198#define TCOFLUSH 1
199#define TCIOFLUSH 2
200
201/* tcsetattr uses these */
202#define TCSANOW 0
203#define TCSADRAIN 1
204#define TCSAFLUSH 2
205
206#endif
diff --git a/include/asm-s390/termios.h b/include/asm-s390/termios.h
deleted file mode 100644
index 67f66278f533..000000000000
--- a/include/asm-s390/termios.h
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * include/asm-s390/termios.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/termios.h"
7 */
8
9#ifndef _S390_TERMIOS_H
10#define _S390_TERMIOS_H
11
12#include <asm/termbits.h>
13#include <asm/ioctls.h>
14
15struct winsize {
16 unsigned short ws_row;
17 unsigned short ws_col;
18 unsigned short ws_xpixel;
19 unsigned short ws_ypixel;
20};
21
22#define NCC 8
23struct termio {
24 unsigned short c_iflag; /* input mode flags */
25 unsigned short c_oflag; /* output mode flags */
26 unsigned short c_cflag; /* control mode flags */
27 unsigned short c_lflag; /* local mode flags */
28 unsigned char c_line; /* line discipline */
29 unsigned char c_cc[NCC]; /* control characters */
30};
31
32/* modem lines */
33#define TIOCM_LE 0x001
34#define TIOCM_DTR 0x002
35#define TIOCM_RTS 0x004
36#define TIOCM_ST 0x008
37#define TIOCM_SR 0x010
38#define TIOCM_CTS 0x020
39#define TIOCM_CAR 0x040
40#define TIOCM_RNG 0x080
41#define TIOCM_DSR 0x100
42#define TIOCM_CD TIOCM_CAR
43#define TIOCM_RI TIOCM_RNG
44#define TIOCM_OUT1 0x2000
45#define TIOCM_OUT2 0x4000
46#define TIOCM_LOOP 0x8000
47
48/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
49
50#ifdef __KERNEL__
51
52/* intr=^C quit=^\ erase=del kill=^U
53 eof=^D vtime=\0 vmin=\1 sxtc=\0
54 start=^Q stop=^S susp=^Z eol=\0
55 reprint=^R discard=^U werase=^W lnext=^V
56 eol2=\0
57*/
58#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
59
60#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
61#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
62
63#include <asm-generic/termios.h>
64
65#endif /* __KERNEL__ */
66
67#endif /* _S390_TERMIOS_H */
diff --git a/include/asm-s390/thread_info.h b/include/asm-s390/thread_info.h
deleted file mode 100644
index 91a8f93ad355..000000000000
--- a/include/asm-s390/thread_info.h
+++ /dev/null
@@ -1,118 +0,0 @@
1/*
2 * include/asm-s390/thread_info.h
3 *
4 * S390 version
5 * Copyright (C) IBM Corp. 2002,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 */
8
9#ifndef _ASM_THREAD_INFO_H
10#define _ASM_THREAD_INFO_H
11
12#ifdef __KERNEL__
13
14/*
15 * Size of kernel stack for each process
16 */
17#ifndef __s390x__
18#ifndef __SMALL_STACK
19#define THREAD_ORDER 1
20#define ASYNC_ORDER 1
21#else
22#define THREAD_ORDER 0
23#define ASYNC_ORDER 0
24#endif
25#else /* __s390x__ */
26#ifndef __SMALL_STACK
27#define THREAD_ORDER 2
28#define ASYNC_ORDER 2
29#else
30#define THREAD_ORDER 1
31#define ASYNC_ORDER 1
32#endif
33#endif /* __s390x__ */
34
35#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
36#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER)
37
38#ifndef __ASSEMBLY__
39#include <asm/processor.h>
40#include <asm/lowcore.h>
41
42/*
43 * low level task data that entry.S needs immediate access to
44 * - this struct should fit entirely inside of one cache line
45 * - this struct shares the supervisor stack pages
46 * - if the contents of this structure are changed, the assembly constants must also be changed
47 */
48struct thread_info {
49 struct task_struct *task; /* main task structure */
50 struct exec_domain *exec_domain; /* execution domain */
51 unsigned long flags; /* low level flags */
52 unsigned int cpu; /* current CPU */
53 int preempt_count; /* 0 => preemptable, <0 => BUG */
54 struct restart_block restart_block;
55};
56
57/*
58 * macros/functions for gaining access to the thread information structure
59 */
60#define INIT_THREAD_INFO(tsk) \
61{ \
62 .task = &tsk, \
63 .exec_domain = &default_exec_domain, \
64 .flags = 0, \
65 .cpu = 0, \
66 .preempt_count = 1, \
67 .restart_block = { \
68 .fn = do_no_restart_syscall, \
69 }, \
70}
71
72#define init_thread_info (init_thread_union.thread_info)
73#define init_stack (init_thread_union.stack)
74
75/* how to get the thread information struct from C */
76static inline struct thread_info *current_thread_info(void)
77{
78 return (struct thread_info *)((*(unsigned long *) __LC_KERNEL_STACK)-THREAD_SIZE);
79}
80
81#define THREAD_SIZE_ORDER THREAD_ORDER
82
83#endif
84
85/*
86 * thread information flags bit numbers
87 */
88#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
89#define TIF_SIGPENDING 2 /* signal pending */
90#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
91#define TIF_RESTART_SVC 4 /* restart svc with new svc number */
92#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */
93#define TIF_SINGLE_STEP 6 /* deliver sigtrap on return to user */
94#define TIF_MCCK_PENDING 7 /* machine check handling is pending */
95#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
96#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling
97 TIF_NEED_RESCHED */
98#define TIF_31BIT 18 /* 32bit process */
99#define TIF_MEMDIE 19
100#define TIF_RESTORE_SIGMASK 20 /* restore signal mask in do_signal() */
101
102#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
103#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
104#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
105#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
106#define _TIF_RESTART_SVC (1<<TIF_RESTART_SVC)
107#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
108#define _TIF_SINGLE_STEP (1<<TIF_SINGLE_STEP)
109#define _TIF_MCCK_PENDING (1<<TIF_MCCK_PENDING)
110#define _TIF_USEDFPU (1<<TIF_USEDFPU)
111#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
112#define _TIF_31BIT (1<<TIF_31BIT)
113
114#endif /* __KERNEL__ */
115
116#define PREEMPT_ACTIVE 0x4000000
117
118#endif /* _ASM_THREAD_INFO_H */
diff --git a/include/asm-s390/timer.h b/include/asm-s390/timer.h
deleted file mode 100644
index d98d79e35cd6..000000000000
--- a/include/asm-s390/timer.h
+++ /dev/null
@@ -1,65 +0,0 @@
1/*
2 * include/asm-s390/timer.h
3 *
4 * (C) Copyright IBM Corp. 2003,2006
5 * Virtual CPU timer
6 *
7 * Author: Jan Glauber (jang@de.ibm.com)
8 */
9
10#ifndef _ASM_S390_TIMER_H
11#define _ASM_S390_TIMER_H
12
13#ifdef __KERNEL__
14
15#include <linux/timer.h>
16
17#define VTIMER_MAX_SLICE (0x7ffffffffffff000LL)
18
19struct vtimer_list {
20 struct list_head entry;
21
22 int cpu;
23 __u64 expires;
24 __u64 interval;
25
26 spinlock_t lock;
27 unsigned long magic;
28
29 void (*function)(unsigned long);
30 unsigned long data;
31};
32
33/* the offset value will wrap after ca. 71 years */
34struct vtimer_queue {
35 struct list_head list;
36 spinlock_t lock;
37 __u64 to_expire; /* current event expire time */
38 __u64 offset; /* list offset to zero */
39 __u64 idle; /* temp var for idle */
40};
41
42extern void init_virt_timer(struct vtimer_list *timer);
43extern void add_virt_timer(void *new);
44extern void add_virt_timer_periodic(void *new);
45extern int mod_virt_timer(struct vtimer_list *timer, __u64 expires);
46extern int del_virt_timer(struct vtimer_list *timer);
47
48extern void init_cpu_vtimer(void);
49extern void vtime_init(void);
50
51#ifdef CONFIG_VIRT_TIMER
52
53extern void vtime_start_cpu_timer(void);
54extern void vtime_stop_cpu_timer(void);
55
56#else
57
58static inline void vtime_start_cpu_timer(void) { }
59static inline void vtime_stop_cpu_timer(void) { }
60
61#endif /* CONFIG_VIRT_TIMER */
62
63#endif /* __KERNEL__ */
64
65#endif /* _ASM_S390_TIMER_H */
diff --git a/include/asm-s390/timex.h b/include/asm-s390/timex.h
deleted file mode 100644
index d744c3d62de5..000000000000
--- a/include/asm-s390/timex.h
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 * include/asm-s390/timex.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 *
7 * Derived from "include/asm-i386/timex.h"
8 * Copyright (C) 1992, Linus Torvalds
9 */
10
11#ifndef _ASM_S390_TIMEX_H
12#define _ASM_S390_TIMEX_H
13
14/* Inline functions for clock register access. */
15static inline int set_clock(__u64 time)
16{
17 int cc;
18
19 asm volatile(
20 " sck 0(%2)\n"
21 " ipm %0\n"
22 " srl %0,28\n"
23 : "=d" (cc) : "m" (time), "a" (&time) : "cc");
24 return cc;
25}
26
27static inline int store_clock(__u64 *time)
28{
29 int cc;
30
31 asm volatile(
32 " stck 0(%2)\n"
33 " ipm %0\n"
34 " srl %0,28\n"
35 : "=d" (cc), "=m" (*time) : "a" (time) : "cc");
36 return cc;
37}
38
39static inline void set_clock_comparator(__u64 time)
40{
41 asm volatile("sckc 0(%1)" : : "m" (time), "a" (&time));
42}
43
44static inline void store_clock_comparator(__u64 *time)
45{
46 asm volatile("stckc 0(%1)" : "=m" (*time) : "a" (time));
47}
48
49#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
50
51typedef unsigned long long cycles_t;
52
53static inline unsigned long long get_clock (void)
54{
55 unsigned long long clk;
56
57#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
58 asm volatile("stck %0" : "=Q" (clk) : : "cc");
59#else /* __GNUC__ */
60 asm volatile("stck 0(%1)" : "=m" (clk) : "a" (&clk) : "cc");
61#endif /* __GNUC__ */
62 return clk;
63}
64
65static inline unsigned long long get_clock_xt(void)
66{
67 unsigned char clk[16];
68
69#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
70 asm volatile("stcke %0" : "=Q" (clk) : : "cc");
71#else /* __GNUC__ */
72 asm volatile("stcke 0(%1)" : "=m" (clk)
73 : "a" (clk) : "cc");
74#endif /* __GNUC__ */
75
76 return *((unsigned long long *)&clk[1]);
77}
78
79static inline cycles_t get_cycles(void)
80{
81 return (cycles_t) get_clock() >> 2;
82}
83
84int get_sync_clock(unsigned long long *clock);
85void init_cpu_timer(void);
86unsigned long long monotonic_clock(void);
87
88#endif
diff --git a/include/asm-s390/tlb.h b/include/asm-s390/tlb.h
deleted file mode 100644
index 3d8a96d39d9d..000000000000
--- a/include/asm-s390/tlb.h
+++ /dev/null
@@ -1,156 +0,0 @@
1#ifndef _S390_TLB_H
2#define _S390_TLB_H
3
4/*
5 * TLB flushing on s390 is complicated. The following requirement
6 * from the principles of operation is the most arduous:
7 *
8 * "A valid table entry must not be changed while it is attached
9 * to any CPU and may be used for translation by that CPU except to
10 * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY,
11 * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page
12 * table entry, or (3) make a change by means of a COMPARE AND SWAP
13 * AND PURGE instruction that purges the TLB."
14 *
15 * The modification of a pte of an active mm struct therefore is
16 * a two step process: i) invalidate the pte, ii) store the new pte.
17 * This is true for the page protection bit as well.
18 * The only possible optimization is to flush at the beginning of
19 * a tlb_gather_mmu cycle if the mm_struct is currently not in use.
20 *
21 * Pages used for the page tables is a different story. FIXME: more
22 */
23
24#include <linux/mm.h>
25#include <linux/swap.h>
26#include <asm/processor.h>
27#include <asm/pgalloc.h>
28#include <asm/smp.h>
29#include <asm/tlbflush.h>
30
31#ifndef CONFIG_SMP
32#define TLB_NR_PTRS 1
33#else
34#define TLB_NR_PTRS 508
35#endif
36
37struct mmu_gather {
38 struct mm_struct *mm;
39 unsigned int fullmm;
40 unsigned int nr_ptes;
41 unsigned int nr_pxds;
42 void *array[TLB_NR_PTRS];
43};
44
45DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
46
47static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm,
48 unsigned int full_mm_flush)
49{
50 struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
51
52 tlb->mm = mm;
53 tlb->fullmm = full_mm_flush || (num_online_cpus() == 1) ||
54 (atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm);
55 tlb->nr_ptes = 0;
56 tlb->nr_pxds = TLB_NR_PTRS;
57 if (tlb->fullmm)
58 __tlb_flush_mm(mm);
59 return tlb;
60}
61
62static inline void tlb_flush_mmu(struct mmu_gather *tlb,
63 unsigned long start, unsigned long end)
64{
65 if (!tlb->fullmm && (tlb->nr_ptes > 0 || tlb->nr_pxds < TLB_NR_PTRS))
66 __tlb_flush_mm(tlb->mm);
67 while (tlb->nr_ptes > 0)
68 pte_free(tlb->mm, tlb->array[--tlb->nr_ptes]);
69 while (tlb->nr_pxds < TLB_NR_PTRS)
70 /* pgd_free frees the pointer as region or segment table */
71 pgd_free(tlb->mm, tlb->array[tlb->nr_pxds++]);
72}
73
74static inline void tlb_finish_mmu(struct mmu_gather *tlb,
75 unsigned long start, unsigned long end)
76{
77 tlb_flush_mmu(tlb, start, end);
78
79 /* keep the page table cache within bounds */
80 check_pgt_cache();
81
82 put_cpu_var(mmu_gathers);
83}
84
85/*
86 * Release the page cache reference for a pte removed by
87 * tlb_ptep_clear_flush. In both flush modes the tlb fo a page cache page
88 * has already been freed, so just do free_page_and_swap_cache.
89 */
90static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
91{
92 free_page_and_swap_cache(page);
93}
94
95/*
96 * pte_free_tlb frees a pte table and clears the CRSTE for the
97 * page table from the tlb.
98 */
99static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte)
100{
101 if (!tlb->fullmm) {
102 tlb->array[tlb->nr_ptes++] = pte;
103 if (tlb->nr_ptes >= tlb->nr_pxds)
104 tlb_flush_mmu(tlb, 0, 0);
105 } else
106 pte_free(tlb->mm, pte);
107}
108
109/*
110 * pmd_free_tlb frees a pmd table and clears the CRSTE for the
111 * segment table entry from the tlb.
112 * If the mm uses a two level page table the single pmd is freed
113 * as the pgd. pmd_free_tlb checks the asce_limit against 2GB
114 * to avoid the double free of the pmd in this case.
115 */
116static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
117{
118#ifdef __s390x__
119 if (tlb->mm->context.asce_limit <= (1UL << 31))
120 return;
121 if (!tlb->fullmm) {
122 tlb->array[--tlb->nr_pxds] = pmd;
123 if (tlb->nr_ptes >= tlb->nr_pxds)
124 tlb_flush_mmu(tlb, 0, 0);
125 } else
126 pmd_free(tlb->mm, pmd);
127#endif
128}
129
130/*
131 * pud_free_tlb frees a pud table and clears the CRSTE for the
132 * region third table entry from the tlb.
133 * If the mm uses a three level page table the single pud is freed
134 * as the pgd. pud_free_tlb checks the asce_limit against 4TB
135 * to avoid the double free of the pud in this case.
136 */
137static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
138{
139#ifdef __s390x__
140 if (tlb->mm->context.asce_limit <= (1UL << 42))
141 return;
142 if (!tlb->fullmm) {
143 tlb->array[--tlb->nr_pxds] = pud;
144 if (tlb->nr_ptes >= tlb->nr_pxds)
145 tlb_flush_mmu(tlb, 0, 0);
146 } else
147 pud_free(tlb->mm, pud);
148#endif
149}
150
151#define tlb_start_vma(tlb, vma) do { } while (0)
152#define tlb_end_vma(tlb, vma) do { } while (0)
153#define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0)
154#define tlb_migrate_finish(mm) do { } while (0)
155
156#endif /* _S390_TLB_H */
diff --git a/include/asm-s390/tlbflush.h b/include/asm-s390/tlbflush.h
deleted file mode 100644
index d60394b9745e..000000000000
--- a/include/asm-s390/tlbflush.h
+++ /dev/null
@@ -1,140 +0,0 @@
1#ifndef _S390_TLBFLUSH_H
2#define _S390_TLBFLUSH_H
3
4#include <linux/mm.h>
5#include <linux/sched.h>
6#include <asm/processor.h>
7#include <asm/pgalloc.h>
8
9/*
10 * Flush all tlb entries on the local cpu.
11 */
12static inline void __tlb_flush_local(void)
13{
14 asm volatile("ptlb" : : : "memory");
15}
16
17#ifdef CONFIG_SMP
18/*
19 * Flush all tlb entries on all cpus.
20 */
21void smp_ptlb_all(void);
22
23static inline void __tlb_flush_global(void)
24{
25 register unsigned long reg2 asm("2");
26 register unsigned long reg3 asm("3");
27 register unsigned long reg4 asm("4");
28 long dummy;
29
30#ifndef __s390x__
31 if (!MACHINE_HAS_CSP) {
32 smp_ptlb_all();
33 return;
34 }
35#endif /* __s390x__ */
36
37 dummy = 0;
38 reg2 = reg3 = 0;
39 reg4 = ((unsigned long) &dummy) + 1;
40 asm volatile(
41 " csp %0,%2"
42 : : "d" (reg2), "d" (reg3), "d" (reg4), "m" (dummy) : "cc" );
43}
44
45static inline void __tlb_flush_full(struct mm_struct *mm)
46{
47 cpumask_t local_cpumask;
48
49 preempt_disable();
50 /*
51 * If the process only ran on the local cpu, do a local flush.
52 */
53 local_cpumask = cpumask_of_cpu(smp_processor_id());
54 if (cpus_equal(mm->cpu_vm_mask, local_cpumask))
55 __tlb_flush_local();
56 else
57 __tlb_flush_global();
58 preempt_enable();
59}
60#else
61#define __tlb_flush_full(mm) __tlb_flush_local()
62#endif
63
64/*
65 * Flush all tlb entries of a page table on all cpus.
66 */
67static inline void __tlb_flush_idte(unsigned long asce)
68{
69 asm volatile(
70 " .insn rrf,0xb98e0000,0,%0,%1,0"
71 : : "a" (2048), "a" (asce) : "cc" );
72}
73
74static inline void __tlb_flush_mm(struct mm_struct * mm)
75{
76 if (unlikely(cpus_empty(mm->cpu_vm_mask)))
77 return;
78 /*
79 * If the machine has IDTE we prefer to do a per mm flush
80 * on all cpus instead of doing a local flush if the mm
81 * only ran on the local cpu.
82 */
83 if (MACHINE_HAS_IDTE) {
84 if (mm->context.noexec)
85 __tlb_flush_idte((unsigned long)
86 get_shadow_table(mm->pgd) |
87 mm->context.asce_bits);
88 __tlb_flush_idte((unsigned long) mm->pgd |
89 mm->context.asce_bits);
90 return;
91 }
92 __tlb_flush_full(mm);
93}
94
95static inline void __tlb_flush_mm_cond(struct mm_struct * mm)
96{
97 if (atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm)
98 __tlb_flush_mm(mm);
99}
100
101/*
102 * TLB flushing:
103 * flush_tlb() - flushes the current mm struct TLBs
104 * flush_tlb_all() - flushes all processes TLBs
105 * flush_tlb_mm(mm) - flushes the specified mm context TLB's
106 * flush_tlb_page(vma, vmaddr) - flushes one page
107 * flush_tlb_range(vma, start, end) - flushes a range of pages
108 * flush_tlb_kernel_range(start, end) - flushes a range of kernel pages
109 */
110
111/*
112 * flush_tlb_mm goes together with ptep_set_wrprotect for the
113 * copy_page_range operation and flush_tlb_range is related to
114 * ptep_get_and_clear for change_protection. ptep_set_wrprotect and
115 * ptep_get_and_clear do not flush the TLBs directly if the mm has
116 * only one user. At the end of the update the flush_tlb_mm and
117 * flush_tlb_range functions need to do the flush.
118 */
119#define flush_tlb() do { } while (0)
120#define flush_tlb_all() do { } while (0)
121#define flush_tlb_page(vma, addr) do { } while (0)
122
123static inline void flush_tlb_mm(struct mm_struct *mm)
124{
125 __tlb_flush_mm_cond(mm);
126}
127
128static inline void flush_tlb_range(struct vm_area_struct *vma,
129 unsigned long start, unsigned long end)
130{
131 __tlb_flush_mm_cond(vma->vm_mm);
132}
133
134static inline void flush_tlb_kernel_range(unsigned long start,
135 unsigned long end)
136{
137 __tlb_flush_mm(&init_mm);
138}
139
140#endif /* _S390_TLBFLUSH_H */
diff --git a/include/asm-s390/todclk.h b/include/asm-s390/todclk.h
deleted file mode 100644
index c7f62055488a..000000000000
--- a/include/asm-s390/todclk.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * File...........: linux/include/asm/todclk.h
3 * Author(s)......: Holger Smolinski <Holger.Smolinski@de.ibm.com>
4 * Bugreports.to..: <Linux390@de.ibm.com>
5 * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000
6 *
7 * History of changes (starts July 2000)
8 */
9
10#ifndef __ASM_TODCLK_H
11#define __ASM_TODCLK_H
12
13#ifdef __KERNEL__
14
15#define TOD_uSEC (0x1000ULL)
16#define TOD_mSEC (1000 * TOD_uSEC)
17#define TOD_SEC (1000 * TOD_mSEC)
18#define TOD_MIN (60 * TOD_SEC)
19#define TOD_HOUR (60 * TOD_MIN)
20
21#endif
22
23#endif
diff --git a/include/asm-s390/topology.h b/include/asm-s390/topology.h
deleted file mode 100644
index d96c91643458..000000000000
--- a/include/asm-s390/topology.h
+++ /dev/null
@@ -1,33 +0,0 @@
1#ifndef _ASM_S390_TOPOLOGY_H
2#define _ASM_S390_TOPOLOGY_H
3
4#include <linux/cpumask.h>
5
6#define mc_capable() (1)
7
8cpumask_t cpu_coregroup_map(unsigned int cpu);
9
10extern cpumask_t cpu_core_map[NR_CPUS];
11
12#define topology_core_siblings(cpu) (cpu_core_map[cpu])
13
14int topology_set_cpu_management(int fc);
15void topology_schedule_update(void);
16
17#define POLARIZATION_UNKNWN (-1)
18#define POLARIZATION_HRZ (0)
19#define POLARIZATION_VL (1)
20#define POLARIZATION_VM (2)
21#define POLARIZATION_VH (3)
22
23#ifdef CONFIG_SMP
24void s390_init_cpu_topology(void);
25#else
26static inline void s390_init_cpu_topology(void)
27{
28};
29#endif
30
31#include <asm-generic/topology.h>
32
33#endif /* _ASM_S390_TOPOLOGY_H */
diff --git a/include/asm-s390/types.h b/include/asm-s390/types.h
deleted file mode 100644
index 41c547656130..000000000000
--- a/include/asm-s390/types.h
+++ /dev/null
@@ -1,63 +0,0 @@
1/*
2 * include/asm-s390/types.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/types.h"
7 */
8
9#ifndef _S390_TYPES_H
10#define _S390_TYPES_H
11
12#ifndef __s390x__
13# include <asm-generic/int-ll64.h>
14#else
15# include <asm-generic/int-l64.h>
16#endif
17
18#ifndef __ASSEMBLY__
19
20typedef unsigned short umode_t;
21
22/* A address type so that arithmetic can be done on it & it can be upgraded to
23 64 bit when necessary
24*/
25typedef unsigned long addr_t;
26typedef __signed__ long saddr_t;
27
28#endif /* __ASSEMBLY__ */
29
30/*
31 * These aren't exported outside the kernel to avoid name space clashes
32 */
33#ifdef __KERNEL__
34
35#ifndef __s390x__
36#define BITS_PER_LONG 32
37#else
38#define BITS_PER_LONG 64
39#endif
40
41#ifndef __ASSEMBLY__
42
43typedef u64 dma64_addr_t;
44#ifdef __s390x__
45/* DMA addresses come in 32-bit and 64-bit flavours. */
46typedef u64 dma_addr_t;
47#else
48typedef u32 dma_addr_t;
49#endif
50
51#ifndef __s390x__
52typedef union {
53 unsigned long long pair;
54 struct {
55 unsigned long even;
56 unsigned long odd;
57 } subreg;
58} register_pair;
59
60#endif /* ! __s390x__ */
61#endif /* __ASSEMBLY__ */
62#endif /* __KERNEL__ */
63#endif /* _S390_TYPES_H */
diff --git a/include/asm-s390/uaccess.h b/include/asm-s390/uaccess.h
deleted file mode 100644
index 0235970278f0..000000000000
--- a/include/asm-s390/uaccess.h
+++ /dev/null
@@ -1,363 +0,0 @@
1/*
2 * include/asm-s390/uaccess.h
3 *
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 *
9 * Derived from "include/asm-i386/uaccess.h"
10 */
11#ifndef __S390_UACCESS_H
12#define __S390_UACCESS_H
13
14/*
15 * User space memory access functions
16 */
17#include <linux/sched.h>
18#include <linux/errno.h>
19
20#define VERIFY_READ 0
21#define VERIFY_WRITE 1
22
23
24/*
25 * The fs value determines whether argument validity checking should be
26 * performed or not. If get_fs() == USER_DS, checking is performed, with
27 * get_fs() == KERNEL_DS, checking is bypassed.
28 *
29 * For historical reasons, these macros are grossly misnamed.
30 */
31
32#define MAKE_MM_SEG(a) ((mm_segment_t) { (a) })
33
34
35#define KERNEL_DS MAKE_MM_SEG(0)
36#define USER_DS MAKE_MM_SEG(1)
37
38#define get_ds() (KERNEL_DS)
39#define get_fs() (current->thread.mm_segment)
40
41#define set_fs(x) \
42({ \
43 unsigned long __pto; \
44 current->thread.mm_segment = (x); \
45 __pto = current->thread.mm_segment.ar4 ? \
46 S390_lowcore.user_asce : S390_lowcore.kernel_asce; \
47 __ctl_load(__pto, 7, 7); \
48})
49
50#define segment_eq(a,b) ((a).ar4 == (b).ar4)
51
52
53static inline int __access_ok(const void __user *addr, unsigned long size)
54{
55 return 1;
56}
57#define access_ok(type,addr,size) __access_ok(addr,size)
58
59/*
60 * The exception table consists of pairs of addresses: the first is the
61 * address of an instruction that is allowed to fault, and the second is
62 * the address at which the program should continue. No registers are
63 * modified, so it is entirely up to the continuation code to figure out
64 * what to do.
65 *
66 * All the routines below use bits of fixup code that are out of line
67 * with the main instruction path. This means when everything is well,
68 * we don't even have to jump over them. Further, they do not intrude
69 * on our cache or tlb entries.
70 */
71
72struct exception_table_entry
73{
74 unsigned long insn, fixup;
75};
76
77struct uaccess_ops {
78 size_t (*copy_from_user)(size_t, const void __user *, void *);
79 size_t (*copy_from_user_small)(size_t, const void __user *, void *);
80 size_t (*copy_to_user)(size_t, void __user *, const void *);
81 size_t (*copy_to_user_small)(size_t, void __user *, const void *);
82 size_t (*copy_in_user)(size_t, void __user *, const void __user *);
83 size_t (*clear_user)(size_t, void __user *);
84 size_t (*strnlen_user)(size_t, const char __user *);
85 size_t (*strncpy_from_user)(size_t, const char __user *, char *);
86 int (*futex_atomic_op)(int op, int __user *, int oparg, int *old);
87 int (*futex_atomic_cmpxchg)(int __user *, int old, int new);
88};
89
90extern struct uaccess_ops uaccess;
91extern struct uaccess_ops uaccess_std;
92extern struct uaccess_ops uaccess_mvcos;
93extern struct uaccess_ops uaccess_mvcos_switch;
94extern struct uaccess_ops uaccess_pt;
95
96static inline int __put_user_fn(size_t size, void __user *ptr, void *x)
97{
98 size = uaccess.copy_to_user_small(size, ptr, x);
99 return size ? -EFAULT : size;
100}
101
102static inline int __get_user_fn(size_t size, const void __user *ptr, void *x)
103{
104 size = uaccess.copy_from_user_small(size, ptr, x);
105 return size ? -EFAULT : size;
106}
107
108/*
109 * These are the main single-value transfer routines. They automatically
110 * use the right size if we just have the right pointer type.
111 */
112#define __put_user(x, ptr) \
113({ \
114 __typeof__(*(ptr)) __x = (x); \
115 int __pu_err = -EFAULT; \
116 __chk_user_ptr(ptr); \
117 switch (sizeof (*(ptr))) { \
118 case 1: \
119 case 2: \
120 case 4: \
121 case 8: \
122 __pu_err = __put_user_fn(sizeof (*(ptr)), \
123 ptr, &__x); \
124 break; \
125 default: \
126 __put_user_bad(); \
127 break; \
128 } \
129 __pu_err; \
130})
131
132#define put_user(x, ptr) \
133({ \
134 might_sleep(); \
135 __put_user(x, ptr); \
136})
137
138
139extern int __put_user_bad(void) __attribute__((noreturn));
140
141#define __get_user(x, ptr) \
142({ \
143 int __gu_err = -EFAULT; \
144 __chk_user_ptr(ptr); \
145 switch (sizeof(*(ptr))) { \
146 case 1: { \
147 unsigned char __x; \
148 __gu_err = __get_user_fn(sizeof (*(ptr)), \
149 ptr, &__x); \
150 (x) = *(__force __typeof__(*(ptr)) *) &__x; \
151 break; \
152 }; \
153 case 2: { \
154 unsigned short __x; \
155 __gu_err = __get_user_fn(sizeof (*(ptr)), \
156 ptr, &__x); \
157 (x) = *(__force __typeof__(*(ptr)) *) &__x; \
158 break; \
159 }; \
160 case 4: { \
161 unsigned int __x; \
162 __gu_err = __get_user_fn(sizeof (*(ptr)), \
163 ptr, &__x); \
164 (x) = *(__force __typeof__(*(ptr)) *) &__x; \
165 break; \
166 }; \
167 case 8: { \
168 unsigned long long __x; \
169 __gu_err = __get_user_fn(sizeof (*(ptr)), \
170 ptr, &__x); \
171 (x) = *(__force __typeof__(*(ptr)) *) &__x; \
172 break; \
173 }; \
174 default: \
175 __get_user_bad(); \
176 break; \
177 } \
178 __gu_err; \
179})
180
181#define get_user(x, ptr) \
182({ \
183 might_sleep(); \
184 __get_user(x, ptr); \
185})
186
187extern int __get_user_bad(void) __attribute__((noreturn));
188
189#define __put_user_unaligned __put_user
190#define __get_user_unaligned __get_user
191
192/**
193 * __copy_to_user: - Copy a block of data into user space, with less checking.
194 * @to: Destination address, in user space.
195 * @from: Source address, in kernel space.
196 * @n: Number of bytes to copy.
197 *
198 * Context: User context only. This function may sleep.
199 *
200 * Copy data from kernel space to user space. Caller must check
201 * the specified block with access_ok() before calling this function.
202 *
203 * Returns number of bytes that could not be copied.
204 * On success, this will be zero.
205 */
206static inline unsigned long __must_check
207__copy_to_user(void __user *to, const void *from, unsigned long n)
208{
209 if (__builtin_constant_p(n) && (n <= 256))
210 return uaccess.copy_to_user_small(n, to, from);
211 else
212 return uaccess.copy_to_user(n, to, from);
213}
214
215#define __copy_to_user_inatomic __copy_to_user
216#define __copy_from_user_inatomic __copy_from_user
217
218/**
219 * copy_to_user: - Copy a block of data into user space.
220 * @to: Destination address, in user space.
221 * @from: Source address, in kernel space.
222 * @n: Number of bytes to copy.
223 *
224 * Context: User context only. This function may sleep.
225 *
226 * Copy data from kernel space to user space.
227 *
228 * Returns number of bytes that could not be copied.
229 * On success, this will be zero.
230 */
231static inline unsigned long __must_check
232copy_to_user(void __user *to, const void *from, unsigned long n)
233{
234 might_sleep();
235 if (access_ok(VERIFY_WRITE, to, n))
236 n = __copy_to_user(to, from, n);
237 return n;
238}
239
240/**
241 * __copy_from_user: - Copy a block of data from user space, with less checking.
242 * @to: Destination address, in kernel space.
243 * @from: Source address, in user space.
244 * @n: Number of bytes to copy.
245 *
246 * Context: User context only. This function may sleep.
247 *
248 * Copy data from user space to kernel space. Caller must check
249 * the specified block with access_ok() before calling this function.
250 *
251 * Returns number of bytes that could not be copied.
252 * On success, this will be zero.
253 *
254 * If some data could not be copied, this function will pad the copied
255 * data to the requested size using zero bytes.
256 */
257static inline unsigned long __must_check
258__copy_from_user(void *to, const void __user *from, unsigned long n)
259{
260 if (__builtin_constant_p(n) && (n <= 256))
261 return uaccess.copy_from_user_small(n, from, to);
262 else
263 return uaccess.copy_from_user(n, from, to);
264}
265
266/**
267 * copy_from_user: - Copy a block of data from user space.
268 * @to: Destination address, in kernel space.
269 * @from: Source address, in user space.
270 * @n: Number of bytes to copy.
271 *
272 * Context: User context only. This function may sleep.
273 *
274 * Copy data from user space to kernel space.
275 *
276 * Returns number of bytes that could not be copied.
277 * On success, this will be zero.
278 *
279 * If some data could not be copied, this function will pad the copied
280 * data to the requested size using zero bytes.
281 */
282static inline unsigned long __must_check
283copy_from_user(void *to, const void __user *from, unsigned long n)
284{
285 might_sleep();
286 if (access_ok(VERIFY_READ, from, n))
287 n = __copy_from_user(to, from, n);
288 else
289 memset(to, 0, n);
290 return n;
291}
292
293static inline unsigned long __must_check
294__copy_in_user(void __user *to, const void __user *from, unsigned long n)
295{
296 return uaccess.copy_in_user(n, to, from);
297}
298
299static inline unsigned long __must_check
300copy_in_user(void __user *to, const void __user *from, unsigned long n)
301{
302 might_sleep();
303 if (__access_ok(from,n) && __access_ok(to,n))
304 n = __copy_in_user(to, from, n);
305 return n;
306}
307
308/*
309 * Copy a null terminated string from userspace.
310 */
311static inline long __must_check
312strncpy_from_user(char *dst, const char __user *src, long count)
313{
314 long res = -EFAULT;
315 might_sleep();
316 if (access_ok(VERIFY_READ, src, 1))
317 res = uaccess.strncpy_from_user(count, src, dst);
318 return res;
319}
320
321static inline unsigned long
322strnlen_user(const char __user * src, unsigned long n)
323{
324 might_sleep();
325 return uaccess.strnlen_user(n, src);
326}
327
328/**
329 * strlen_user: - Get the size of a string in user space.
330 * @str: The string to measure.
331 *
332 * Context: User context only. This function may sleep.
333 *
334 * Get the size of a NUL-terminated string in user space.
335 *
336 * Returns the size of the string INCLUDING the terminating NUL.
337 * On exception, returns 0.
338 *
339 * If there is a limit on the length of a valid string, you may wish to
340 * consider using strnlen_user() instead.
341 */
342#define strlen_user(str) strnlen_user(str, ~0UL)
343
344/*
345 * Zero Userspace
346 */
347
348static inline unsigned long __must_check
349__clear_user(void __user *to, unsigned long n)
350{
351 return uaccess.clear_user(n, to);
352}
353
354static inline unsigned long __must_check
355clear_user(void __user *to, unsigned long n)
356{
357 might_sleep();
358 if (access_ok(VERIFY_WRITE, to, n))
359 n = uaccess.clear_user(n, to);
360 return n;
361}
362
363#endif /* __S390_UACCESS_H */
diff --git a/include/asm-s390/ucontext.h b/include/asm-s390/ucontext.h
deleted file mode 100644
index d69bec0b03f5..000000000000
--- a/include/asm-s390/ucontext.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * include/asm-s390/ucontext.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/ucontext.h"
7 */
8
9#ifndef _ASM_S390_UCONTEXT_H
10#define _ASM_S390_UCONTEXT_H
11
12struct ucontext {
13 unsigned long uc_flags;
14 struct ucontext *uc_link;
15 stack_t uc_stack;
16 _sigregs uc_mcontext;
17 sigset_t uc_sigmask; /* mask last for extensibility */
18};
19
20#endif /* !_ASM_S390_UCONTEXT_H */
diff --git a/include/asm-s390/unaligned.h b/include/asm-s390/unaligned.h
deleted file mode 100644
index da9627afe5d8..000000000000
--- a/include/asm-s390/unaligned.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef _ASM_S390_UNALIGNED_H
2#define _ASM_S390_UNALIGNED_H
3
4/*
5 * The S390 can do unaligned accesses itself.
6 */
7#include <linux/unaligned/access_ok.h>
8#include <linux/unaligned/generic.h>
9
10#define get_unaligned __get_unaligned_be
11#define put_unaligned __put_unaligned_be
12
13#endif /* _ASM_S390_UNALIGNED_H */
diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h
deleted file mode 100644
index c8ad350d1444..000000000000
--- a/include/asm-s390/unistd.h
+++ /dev/null
@@ -1,411 +0,0 @@
1/*
2 * include/asm-s390/unistd.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/unistd.h"
7 */
8
9#ifndef _ASM_S390_UNISTD_H_
10#define _ASM_S390_UNISTD_H_
11
12/*
13 * This file contains the system call numbers.
14 */
15
16#define __NR_exit 1
17#define __NR_fork 2
18#define __NR_read 3
19#define __NR_write 4
20#define __NR_open 5
21#define __NR_close 6
22#define __NR_restart_syscall 7
23#define __NR_creat 8
24#define __NR_link 9
25#define __NR_unlink 10
26#define __NR_execve 11
27#define __NR_chdir 12
28#define __NR_mknod 14
29#define __NR_chmod 15
30#define __NR_lseek 19
31#define __NR_getpid 20
32#define __NR_mount 21
33#define __NR_umount 22
34#define __NR_ptrace 26
35#define __NR_alarm 27
36#define __NR_pause 29
37#define __NR_utime 30
38#define __NR_access 33
39#define __NR_nice 34
40#define __NR_sync 36
41#define __NR_kill 37
42#define __NR_rename 38
43#define __NR_mkdir 39
44#define __NR_rmdir 40
45#define __NR_dup 41
46#define __NR_pipe 42
47#define __NR_times 43
48#define __NR_brk 45
49#define __NR_signal 48
50#define __NR_acct 51
51#define __NR_umount2 52
52#define __NR_ioctl 54
53#define __NR_fcntl 55
54#define __NR_setpgid 57
55#define __NR_umask 60
56#define __NR_chroot 61
57#define __NR_ustat 62
58#define __NR_dup2 63
59#define __NR_getppid 64
60#define __NR_getpgrp 65
61#define __NR_setsid 66
62#define __NR_sigaction 67
63#define __NR_sigsuspend 72
64#define __NR_sigpending 73
65#define __NR_sethostname 74
66#define __NR_setrlimit 75
67#define __NR_getrusage 77
68#define __NR_gettimeofday 78
69#define __NR_settimeofday 79
70#define __NR_symlink 83
71#define __NR_readlink 85
72#define __NR_uselib 86
73#define __NR_swapon 87
74#define __NR_reboot 88
75#define __NR_readdir 89
76#define __NR_mmap 90
77#define __NR_munmap 91
78#define __NR_truncate 92
79#define __NR_ftruncate 93
80#define __NR_fchmod 94
81#define __NR_getpriority 96
82#define __NR_setpriority 97
83#define __NR_statfs 99
84#define __NR_fstatfs 100
85#define __NR_socketcall 102
86#define __NR_syslog 103
87#define __NR_setitimer 104
88#define __NR_getitimer 105
89#define __NR_stat 106
90#define __NR_lstat 107
91#define __NR_fstat 108
92#define __NR_lookup_dcookie 110
93#define __NR_vhangup 111
94#define __NR_idle 112
95#define __NR_wait4 114
96#define __NR_swapoff 115
97#define __NR_sysinfo 116
98#define __NR_ipc 117
99#define __NR_fsync 118
100#define __NR_sigreturn 119
101#define __NR_clone 120
102#define __NR_setdomainname 121
103#define __NR_uname 122
104#define __NR_adjtimex 124
105#define __NR_mprotect 125
106#define __NR_sigprocmask 126
107#define __NR_create_module 127
108#define __NR_init_module 128
109#define __NR_delete_module 129
110#define __NR_get_kernel_syms 130
111#define __NR_quotactl 131
112#define __NR_getpgid 132
113#define __NR_fchdir 133
114#define __NR_bdflush 134
115#define __NR_sysfs 135
116#define __NR_personality 136
117#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
118#define __NR_getdents 141
119#define __NR_flock 143
120#define __NR_msync 144
121#define __NR_readv 145
122#define __NR_writev 146
123#define __NR_getsid 147
124#define __NR_fdatasync 148
125#define __NR__sysctl 149
126#define __NR_mlock 150
127#define __NR_munlock 151
128#define __NR_mlockall 152
129#define __NR_munlockall 153
130#define __NR_sched_setparam 154
131#define __NR_sched_getparam 155
132#define __NR_sched_setscheduler 156
133#define __NR_sched_getscheduler 157
134#define __NR_sched_yield 158
135#define __NR_sched_get_priority_max 159
136#define __NR_sched_get_priority_min 160
137#define __NR_sched_rr_get_interval 161
138#define __NR_nanosleep 162
139#define __NR_mremap 163
140#define __NR_query_module 167
141#define __NR_poll 168
142#define __NR_nfsservctl 169
143#define __NR_prctl 172
144#define __NR_rt_sigreturn 173
145#define __NR_rt_sigaction 174
146#define __NR_rt_sigprocmask 175
147#define __NR_rt_sigpending 176
148#define __NR_rt_sigtimedwait 177
149#define __NR_rt_sigqueueinfo 178
150#define __NR_rt_sigsuspend 179
151#define __NR_pread64 180
152#define __NR_pwrite64 181
153#define __NR_getcwd 183
154#define __NR_capget 184
155#define __NR_capset 185
156#define __NR_sigaltstack 186
157#define __NR_sendfile 187
158#define __NR_getpmsg 188
159#define __NR_putpmsg 189
160#define __NR_vfork 190
161#define __NR_pivot_root 217
162#define __NR_mincore 218
163#define __NR_madvise 219
164#define __NR_getdents64 220
165#define __NR_readahead 222
166#define __NR_setxattr 224
167#define __NR_lsetxattr 225
168#define __NR_fsetxattr 226
169#define __NR_getxattr 227
170#define __NR_lgetxattr 228
171#define __NR_fgetxattr 229
172#define __NR_listxattr 230
173#define __NR_llistxattr 231
174#define __NR_flistxattr 232
175#define __NR_removexattr 233
176#define __NR_lremovexattr 234
177#define __NR_fremovexattr 235
178#define __NR_gettid 236
179#define __NR_tkill 237
180#define __NR_futex 238
181#define __NR_sched_setaffinity 239
182#define __NR_sched_getaffinity 240
183#define __NR_tgkill 241
184/* Number 242 is reserved for tux */
185#define __NR_io_setup 243
186#define __NR_io_destroy 244
187#define __NR_io_getevents 245
188#define __NR_io_submit 246
189#define __NR_io_cancel 247
190#define __NR_exit_group 248
191#define __NR_epoll_create 249
192#define __NR_epoll_ctl 250
193#define __NR_epoll_wait 251
194#define __NR_set_tid_address 252
195#define __NR_fadvise64 253
196#define __NR_timer_create 254
197#define __NR_timer_settime (__NR_timer_create+1)
198#define __NR_timer_gettime (__NR_timer_create+2)
199#define __NR_timer_getoverrun (__NR_timer_create+3)
200#define __NR_timer_delete (__NR_timer_create+4)
201#define __NR_clock_settime (__NR_timer_create+5)
202#define __NR_clock_gettime (__NR_timer_create+6)
203#define __NR_clock_getres (__NR_timer_create+7)
204#define __NR_clock_nanosleep (__NR_timer_create+8)
205/* Number 263 is reserved for vserver */
206#define __NR_statfs64 265
207#define __NR_fstatfs64 266
208#define __NR_remap_file_pages 267
209/* Number 268 is reserved for new sys_mbind */
210/* Number 269 is reserved for new sys_get_mempolicy */
211/* Number 270 is reserved for new sys_set_mempolicy */
212#define __NR_mq_open 271
213#define __NR_mq_unlink 272
214#define __NR_mq_timedsend 273
215#define __NR_mq_timedreceive 274
216#define __NR_mq_notify 275
217#define __NR_mq_getsetattr 276
218#define __NR_kexec_load 277
219#define __NR_add_key 278
220#define __NR_request_key 279
221#define __NR_keyctl 280
222#define __NR_waitid 281
223#define __NR_ioprio_set 282
224#define __NR_ioprio_get 283
225#define __NR_inotify_init 284
226#define __NR_inotify_add_watch 285
227#define __NR_inotify_rm_watch 286
228/* Number 287 is reserved for new sys_migrate_pages */
229#define __NR_openat 288
230#define __NR_mkdirat 289
231#define __NR_mknodat 290
232#define __NR_fchownat 291
233#define __NR_futimesat 292
234#define __NR_unlinkat 294
235#define __NR_renameat 295
236#define __NR_linkat 296
237#define __NR_symlinkat 297
238#define __NR_readlinkat 298
239#define __NR_fchmodat 299
240#define __NR_faccessat 300
241#define __NR_pselect6 301
242#define __NR_ppoll 302
243#define __NR_unshare 303
244#define __NR_set_robust_list 304
245#define __NR_get_robust_list 305
246#define __NR_splice 306
247#define __NR_sync_file_range 307
248#define __NR_tee 308
249#define __NR_vmsplice 309
250/* Number 310 is reserved for new sys_move_pages */
251#define __NR_getcpu 311
252#define __NR_epoll_pwait 312
253#define __NR_utimes 313
254#define __NR_fallocate 314
255#define __NR_utimensat 315
256#define __NR_signalfd 316
257#define __NR_timerfd 317
258#define __NR_eventfd 318
259#define __NR_timerfd_create 319
260#define __NR_timerfd_settime 320
261#define __NR_timerfd_gettime 321
262#define __NR_signalfd4 322
263#define __NR_eventfd2 323
264#define __NR_inotify_init1 324
265#define __NR_pipe2 325
266#define __NR_dup3 326
267#define __NR_epoll_create1 327
268#define NR_syscalls 328
269
270/*
271 * There are some system calls that are not present on 64 bit, some
272 * have a different name although they do the same (e.g. __NR_chown32
273 * is __NR_chown on 64 bit).
274 */
275#ifndef __s390x__
276
277#define __NR_time 13
278#define __NR_lchown 16
279#define __NR_setuid 23
280#define __NR_getuid 24
281#define __NR_stime 25
282#define __NR_setgid 46
283#define __NR_getgid 47
284#define __NR_geteuid 49
285#define __NR_getegid 50
286#define __NR_setreuid 70
287#define __NR_setregid 71
288#define __NR_getrlimit 76
289#define __NR_getgroups 80
290#define __NR_setgroups 81
291#define __NR_fchown 95
292#define __NR_ioperm 101
293#define __NR_setfsuid 138
294#define __NR_setfsgid 139
295#define __NR__llseek 140
296#define __NR__newselect 142
297#define __NR_setresuid 164
298#define __NR_getresuid 165
299#define __NR_setresgid 170
300#define __NR_getresgid 171
301#define __NR_chown 182
302#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
303#define __NR_mmap2 192
304#define __NR_truncate64 193
305#define __NR_ftruncate64 194
306#define __NR_stat64 195
307#define __NR_lstat64 196
308#define __NR_fstat64 197
309#define __NR_lchown32 198
310#define __NR_getuid32 199
311#define __NR_getgid32 200
312#define __NR_geteuid32 201
313#define __NR_getegid32 202
314#define __NR_setreuid32 203
315#define __NR_setregid32 204
316#define __NR_getgroups32 205
317#define __NR_setgroups32 206
318#define __NR_fchown32 207
319#define __NR_setresuid32 208
320#define __NR_getresuid32 209
321#define __NR_setresgid32 210
322#define __NR_getresgid32 211
323#define __NR_chown32 212
324#define __NR_setuid32 213
325#define __NR_setgid32 214
326#define __NR_setfsuid32 215
327#define __NR_setfsgid32 216
328#define __NR_fcntl64 221
329#define __NR_sendfile64 223
330#define __NR_fadvise64_64 264
331#define __NR_fstatat64 293
332
333#else
334
335#define __NR_select 142
336#define __NR_getrlimit 191 /* SuS compliant getrlimit */
337#define __NR_lchown 198
338#define __NR_getuid 199
339#define __NR_getgid 200
340#define __NR_geteuid 201
341#define __NR_getegid 202
342#define __NR_setreuid 203
343#define __NR_setregid 204
344#define __NR_getgroups 205
345#define __NR_setgroups 206
346#define __NR_fchown 207
347#define __NR_setresuid 208
348#define __NR_getresuid 209
349#define __NR_setresgid 210
350#define __NR_getresgid 211
351#define __NR_chown 212
352#define __NR_setuid 213
353#define __NR_setgid 214
354#define __NR_setfsuid 215
355#define __NR_setfsgid 216
356#define __NR_newfstatat 293
357
358#endif
359
360#ifdef __KERNEL__
361
362#ifndef CONFIG_64BIT
363#define __IGNORE_select
364#else
365#define __IGNORE_time
366#endif
367
368/* Ignore NUMA system calls. Not wired up on s390. */
369#define __IGNORE_mbind
370#define __IGNORE_get_mempolicy
371#define __IGNORE_set_mempolicy
372#define __IGNORE_migrate_pages
373#define __IGNORE_move_pages
374
375#define __ARCH_WANT_IPC_PARSE_VERSION
376#define __ARCH_WANT_OLD_READDIR
377#define __ARCH_WANT_SYS_ALARM
378#define __ARCH_WANT_SYS_GETHOSTNAME
379#define __ARCH_WANT_SYS_PAUSE
380#define __ARCH_WANT_SYS_SIGNAL
381#define __ARCH_WANT_SYS_UTIME
382#define __ARCH_WANT_SYS_SOCKETCALL
383#define __ARCH_WANT_SYS_FADVISE64
384#define __ARCH_WANT_SYS_GETPGRP
385#define __ARCH_WANT_SYS_LLSEEK
386#define __ARCH_WANT_SYS_NICE
387#define __ARCH_WANT_SYS_OLD_GETRLIMIT
388#define __ARCH_WANT_SYS_OLDUMOUNT
389#define __ARCH_WANT_SYS_SIGPENDING
390#define __ARCH_WANT_SYS_SIGPROCMASK
391#define __ARCH_WANT_SYS_RT_SIGACTION
392#define __ARCH_WANT_SYS_RT_SIGSUSPEND
393# ifndef CONFIG_64BIT
394# define __ARCH_WANT_STAT64
395# define __ARCH_WANT_SYS_TIME
396# endif
397# ifdef CONFIG_COMPAT
398# define __ARCH_WANT_COMPAT_SYS_TIME
399# define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
400# endif
401
402/*
403 * "Conditional" syscalls
404 *
405 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
406 * but it doesn't work on all toolchains, so we just do it by hand
407 */
408#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
409
410#endif /* __KERNEL__ */
411#endif /* _ASM_S390_UNISTD_H_ */
diff --git a/include/asm-s390/user.h b/include/asm-s390/user.h
deleted file mode 100644
index 1b050e35fdc6..000000000000
--- a/include/asm-s390/user.h
+++ /dev/null
@@ -1,76 +0,0 @@
1/*
2 * include/asm-s390/user.h
3 *
4 * S390 version
5 *
6 * Derived from "include/asm-i386/usr.h"
7 */
8
9#ifndef _S390_USER_H
10#define _S390_USER_H
11
12#include <asm/page.h>
13#include <asm/ptrace.h>
14/* Core file format: The core file is written in such a way that gdb
15 can understand it and provide useful information to the user (under
16 linux we use the 'trad-core' bfd). There are quite a number of
17 obstacles to being able to view the contents of the floating point
18 registers, and until these are solved you will not be able to view the
19 contents of them. Actually, you can read in the core file and look at
20 the contents of the user struct to find out what the floating point
21 registers contain.
22 The actual file contents are as follows:
23 UPAGE: 1 page consisting of a user struct that tells gdb what is present
24 in the file. Directly after this is a copy of the task_struct, which
25 is currently not used by gdb, but it may come in useful at some point.
26 All of the registers are stored as part of the upage. The upage should
27 always be only one page.
28 DATA: The data area is stored. We use current->end_text to
29 current->brk to pick up all of the user variables, plus any memory
30 that may have been malloced. No attempt is made to determine if a page
31 is demand-zero or if a page is totally unused, we just cover the entire
32 range. All of the addresses are rounded in such a way that an integral
33 number of pages is written.
34 STACK: We need the stack information in order to get a meaningful
35 backtrace. We need to write the data from (esp) to
36 current->start_stack, so we round each of these off in order to be able
37 to write an integer number of pages.
38 The minimum core file size is 3 pages, or 12288 bytes.
39*/
40
41
42/*
43 * This is the old layout of "struct pt_regs", and
44 * is still the layout used by user mode (the new
45 * pt_regs doesn't have all registers as the kernel
46 * doesn't use the extra segment registers)
47 */
48
49/* When the kernel dumps core, it starts by dumping the user struct -
50 this will be used by gdb to figure out where the data and stack segments
51 are within the file, and what virtual addresses to use. */
52struct user {
53/* We start with the registers, to mimic the way that "memory" is returned
54 from the ptrace(3,...) function. */
55 struct user_regs_struct regs; /* Where the registers are actually stored */
56/* The rest of this junk is to help gdb figure out what goes where */
57 unsigned long int u_tsize; /* Text segment size (pages). */
58 unsigned long int u_dsize; /* Data segment size (pages). */
59 unsigned long int u_ssize; /* Stack segment size (pages). */
60 unsigned long start_code; /* Starting virtual address of text. */
61 unsigned long start_stack; /* Starting virtual address of stack area.
62 This is actually the bottom of the stack,
63 the top of the stack is always found in the
64 esp register. */
65 long int signal; /* Signal that caused the core dump. */
66 unsigned long u_ar0; /* Used by gdb to help find the values for */
67 /* the registers. */
68 unsigned long magic; /* To uniquely identify a core file */
69 char u_comm[32]; /* User command that was responsible */
70};
71#define NBPG PAGE_SIZE
72#define UPAGES 1
73#define HOST_TEXT_START_ADDR (u.start_code)
74#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
75
76#endif /* _S390_USER_H */
diff --git a/include/asm-s390/vtoc.h b/include/asm-s390/vtoc.h
deleted file mode 100644
index 3a5267d90d29..000000000000
--- a/include/asm-s390/vtoc.h
+++ /dev/null
@@ -1,203 +0,0 @@
1/*
2 * include/asm-s390/vtoc.h
3 *
4 * This file contains volume label definitions for DASD devices.
5 *
6 * (C) Copyright IBM Corp. 2005
7 *
8 * Author(s): Volker Sameske <sameske@de.ibm.com>
9 *
10 */
11
12#ifndef _ASM_S390_VTOC_H
13#define _ASM_S390_VTOC_H
14
15#include <linux/types.h>
16
17struct vtoc_ttr
18{
19 __u16 tt;
20 __u8 r;
21} __attribute__ ((packed));
22
23struct vtoc_cchhb
24{
25 __u16 cc;
26 __u16 hh;
27 __u8 b;
28} __attribute__ ((packed));
29
30struct vtoc_cchh
31{
32 __u16 cc;
33 __u16 hh;
34} __attribute__ ((packed));
35
36struct vtoc_labeldate
37{
38 __u8 year;
39 __u16 day;
40} __attribute__ ((packed));
41
42struct vtoc_volume_label
43{
44 char volkey[4]; /* volume key = volume label */
45 char vollbl[4]; /* volume label */
46 char volid[6]; /* volume identifier */
47 __u8 security; /* security byte */
48 struct vtoc_cchhb vtoc; /* VTOC address */
49 char res1[5]; /* reserved */
50 char cisize[4]; /* CI-size for FBA,... */
51 /* ...blanks for CKD */
52 char blkperci[4]; /* no of blocks per CI (FBA), blanks for CKD */
53 char labperci[4]; /* no of labels per CI (FBA), blanks for CKD */
54 char res2[4]; /* reserved */
55 char lvtoc[14]; /* owner code for LVTOC */
56 char res3[29]; /* reserved */
57} __attribute__ ((packed));
58
59struct vtoc_extent
60{
61 __u8 typeind; /* extent type indicator */
62 __u8 seqno; /* extent sequence number */
63 struct vtoc_cchh llimit; /* starting point of this extent */
64 struct vtoc_cchh ulimit; /* ending point of this extent */
65} __attribute__ ((packed));
66
67struct vtoc_dev_const
68{
69 __u16 DS4DSCYL; /* number of logical cyls */
70 __u16 DS4DSTRK; /* number of tracks in a logical cylinder */
71 __u16 DS4DEVTK; /* device track length */
72 __u8 DS4DEVI; /* non-last keyed record overhead */
73 __u8 DS4DEVL; /* last keyed record overhead */
74 __u8 DS4DEVK; /* non-keyed record overhead differential */
75 __u8 DS4DEVFG; /* flag byte */
76 __u16 DS4DEVTL; /* device tolerance */
77 __u8 DS4DEVDT; /* number of DSCB's per track */
78 __u8 DS4DEVDB; /* number of directory blocks per track */
79} __attribute__ ((packed));
80
81struct vtoc_format1_label
82{
83 char DS1DSNAM[44]; /* data set name */
84 __u8 DS1FMTID; /* format identifier */
85 char DS1DSSN[6]; /* data set serial number */
86 __u16 DS1VOLSQ; /* volume sequence number */
87 struct vtoc_labeldate DS1CREDT; /* creation date: ydd */
88 struct vtoc_labeldate DS1EXPDT; /* expiration date */
89 __u8 DS1NOEPV; /* number of extents on volume */
90 __u8 DS1NOBDB; /* no. of bytes used in last direction blk */
91 __u8 DS1FLAG1; /* flag 1 */
92 char DS1SYSCD[13]; /* system code */
93 struct vtoc_labeldate DS1REFD; /* date last referenced */
94 __u8 DS1SMSFG; /* system managed storage indicators */
95 __u8 DS1SCXTF; /* sec. space extension flag byte */
96 __u16 DS1SCXTV; /* secondary space extension value */
97 __u8 DS1DSRG1; /* data set organisation byte 1 */
98 __u8 DS1DSRG2; /* data set organisation byte 2 */
99 __u8 DS1RECFM; /* record format */
100 __u8 DS1OPTCD; /* option code */
101 __u16 DS1BLKL; /* block length */
102 __u16 DS1LRECL; /* record length */
103 __u8 DS1KEYL; /* key length */
104 __u16 DS1RKP; /* relative key position */
105 __u8 DS1DSIND; /* data set indicators */
106 __u8 DS1SCAL1; /* secondary allocation flag byte */
107 char DS1SCAL3[3]; /* secondary allocation quantity */
108 struct vtoc_ttr DS1LSTAR; /* last used track and block on track */
109 __u16 DS1TRBAL; /* space remaining on last used track */
110 __u16 res1; /* reserved */
111 struct vtoc_extent DS1EXT1; /* first extent description */
112 struct vtoc_extent DS1EXT2; /* second extent description */
113 struct vtoc_extent DS1EXT3; /* third extent description */
114 struct vtoc_cchhb DS1PTRDS; /* possible pointer to f2 or f3 DSCB */
115} __attribute__ ((packed));
116
117struct vtoc_format4_label
118{
119 char DS4KEYCD[44]; /* key code for VTOC labels: 44 times 0x04 */
120 __u8 DS4IDFMT; /* format identifier */
121 struct vtoc_cchhb DS4HPCHR; /* highest address of a format 1 DSCB */
122 __u16 DS4DSREC; /* number of available DSCB's */
123 struct vtoc_cchh DS4HCCHH; /* CCHH of next available alternate track */
124 __u16 DS4NOATK; /* number of remaining alternate tracks */
125 __u8 DS4VTOCI; /* VTOC indicators */
126 __u8 DS4NOEXT; /* number of extents in VTOC */
127 __u8 DS4SMSFG; /* system managed storage indicators */
128 __u8 DS4DEVAC; /* number of alternate cylinders.
129 * Subtract from first two bytes of
130 * DS4DEVSZ to get number of usable
131 * cylinders. can be zero. valid
132 * only if DS4DEVAV on. */
133 struct vtoc_dev_const DS4DEVCT; /* device constants */
134 char DS4AMTIM[8]; /* VSAM time stamp */
135 char DS4AMCAT[3]; /* VSAM catalog indicator */
136 char DS4R2TIM[8]; /* VSAM volume/catalog match time stamp */
137 char res1[5]; /* reserved */
138 char DS4F6PTR[5]; /* pointer to first format 6 DSCB */
139 struct vtoc_extent DS4VTOCE; /* VTOC extent description */
140 char res2[10]; /* reserved */
141 __u8 DS4EFLVL; /* extended free-space management level */
142 struct vtoc_cchhb DS4EFPTR; /* pointer to extended free-space info */
143 char res3[9]; /* reserved */
144} __attribute__ ((packed));
145
146struct vtoc_ds5ext
147{
148 __u16 t; /* RTA of the first track of free extent */
149 __u16 fc; /* number of whole cylinders in free ext. */
150 __u8 ft; /* number of remaining free tracks */
151} __attribute__ ((packed));
152
153struct vtoc_format5_label
154{
155 char DS5KEYID[4]; /* key identifier */
156 struct vtoc_ds5ext DS5AVEXT; /* first available (free-space) extent. */
157 struct vtoc_ds5ext DS5EXTAV[7]; /* seven available extents */
158 __u8 DS5FMTID; /* format identifier */
159 struct vtoc_ds5ext DS5MAVET[18]; /* eighteen available extents */
160 struct vtoc_cchhb DS5PTRDS; /* pointer to next format5 DSCB */
161} __attribute__ ((packed));
162
163struct vtoc_ds7ext
164{
165 __u32 a; /* starting RTA value */
166 __u32 b; /* ending RTA value + 1 */
167} __attribute__ ((packed));
168
169struct vtoc_format7_label
170{
171 char DS7KEYID[4]; /* key identifier */
172 struct vtoc_ds7ext DS7EXTNT[5]; /* space for 5 extent descriptions */
173 __u8 DS7FMTID; /* format identifier */
174 struct vtoc_ds7ext DS7ADEXT[11]; /* space for 11 extent descriptions */
175 char res1[2]; /* reserved */
176 struct vtoc_cchhb DS7PTRDS; /* pointer to next FMT7 DSCB */
177} __attribute__ ((packed));
178
179struct vtoc_cms_label {
180 __u8 label_id[4]; /* Label identifier */
181 __u8 vol_id[6]; /* Volid */
182 __u16 version_id; /* Version identifier */
183 __u32 block_size; /* Disk block size */
184 __u32 origin_ptr; /* Disk origin pointer */
185 __u32 usable_count; /* Number of usable cylinders/blocks */
186 __u32 formatted_count; /* Maximum number of formatted cylinders/
187 * blocks */
188 __u32 block_count; /* Disk size in CMS blocks */
189 __u32 used_count; /* Number of CMS blocks in use */
190 __u32 fst_size; /* File Status Table (FST) size */
191 __u32 fst_count; /* Number of FSTs per CMS block */
192 __u8 format_date[6]; /* Disk FORMAT date */
193 __u8 reserved1[2];
194 __u32 disk_offset; /* Disk offset when reserved*/
195 __u32 map_block; /* Allocation Map Block with next hole */
196 __u32 hblk_disp; /* Displacement into HBLK data of next hole */
197 __u32 user_disp; /* Displacement into user part of Allocation
198 * map */
199 __u8 reserved2[4];
200 __u8 segment_name[8]; /* Name of shared segment */
201} __attribute__ ((packed));
202
203#endif /* _ASM_S390_VTOC_H */
diff --git a/include/asm-s390/xor.h b/include/asm-s390/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/include/asm-s390/xor.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/xor.h>
diff --git a/include/asm-s390/zcrypt.h b/include/asm-s390/zcrypt.h
deleted file mode 100644
index 00d3bbd44117..000000000000
--- a/include/asm-s390/zcrypt.h
+++ /dev/null
@@ -1,276 +0,0 @@
1/*
2 * include/asm-s390/zcrypt.h
3 *
4 * zcrypt 2.1.0 (user-visible header)
5 *
6 * Copyright (C) 2001, 2006 IBM Corporation
7 * Author(s): Robert Burroughs
8 * Eric Rossman (edrossma@us.ibm.com)
9 *
10 * Hotplug & misc device support: Jochen Roehrig (roehrig@de.ibm.com)
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#ifndef __ASM_S390_ZCRYPT_H
28#define __ASM_S390_ZCRYPT_H
29
30#define ZCRYPT_VERSION 2
31#define ZCRYPT_RELEASE 1
32#define ZCRYPT_VARIANT 1
33
34#include <linux/ioctl.h>
35#include <linux/compiler.h>
36
37/**
38 * struct ica_rsa_modexpo
39 *
40 * Requirements:
41 * - outputdatalength is at least as large as inputdatalength.
42 * - All key parts are right justified in their fields, padded on
43 * the left with zeroes.
44 * - length(b_key) = inputdatalength
45 * - length(n_modulus) = inputdatalength
46 */
47struct ica_rsa_modexpo {
48 char __user * inputdata;
49 unsigned int inputdatalength;
50 char __user * outputdata;
51 unsigned int outputdatalength;
52 char __user * b_key;
53 char __user * n_modulus;
54};
55
56/**
57 * struct ica_rsa_modexpo_crt
58 *
59 * Requirements:
60 * - inputdatalength is even.
61 * - outputdatalength is at least as large as inputdatalength.
62 * - All key parts are right justified in their fields, padded on
63 * the left with zeroes.
64 * - length(bp_key) = inputdatalength/2 + 8
65 * - length(bq_key) = inputdatalength/2
66 * - length(np_key) = inputdatalength/2 + 8
67 * - length(nq_key) = inputdatalength/2
68 * - length(u_mult_inv) = inputdatalength/2 + 8
69 */
70struct ica_rsa_modexpo_crt {
71 char __user * inputdata;
72 unsigned int inputdatalength;
73 char __user * outputdata;
74 unsigned int outputdatalength;
75 char __user * bp_key;
76 char __user * bq_key;
77 char __user * np_prime;
78 char __user * nq_prime;
79 char __user * u_mult_inv;
80};
81
82/**
83 * CPRBX
84 * Note that all shorts and ints are big-endian.
85 * All pointer fields are 16 bytes long, and mean nothing.
86 *
87 * A request CPRB is followed by a request_parameter_block.
88 *
89 * The request (or reply) parameter block is organized thus:
90 * function code
91 * VUD block
92 * key block
93 */
94struct CPRBX {
95 unsigned short cprb_len; /* CPRB length 220 */
96 unsigned char cprb_ver_id; /* CPRB version id. 0x02 */
97 unsigned char pad_000[3]; /* Alignment pad bytes */
98 unsigned char func_id[2]; /* function id 0x5432 */
99 unsigned char cprb_flags[4]; /* Flags */
100 unsigned int req_parml; /* request parameter buffer len */
101 unsigned int req_datal; /* request data buffer */
102 unsigned int rpl_msgbl; /* reply message block length */
103 unsigned int rpld_parml; /* replied parameter block len */
104 unsigned int rpl_datal; /* reply data block len */
105 unsigned int rpld_datal; /* replied data block len */
106 unsigned int req_extbl; /* request extension block len */
107 unsigned char pad_001[4]; /* reserved */
108 unsigned int rpld_extbl; /* replied extension block len */
109 unsigned char padx000[16 - sizeof (char *)];
110 unsigned char * req_parmb; /* request parm block 'address' */
111 unsigned char padx001[16 - sizeof (char *)];
112 unsigned char * req_datab; /* request data block 'address' */
113 unsigned char padx002[16 - sizeof (char *)];
114 unsigned char * rpl_parmb; /* reply parm block 'address' */
115 unsigned char padx003[16 - sizeof (char *)];
116 unsigned char * rpl_datab; /* reply data block 'address' */
117 unsigned char padx004[16 - sizeof (char *)];
118 unsigned char * req_extb; /* request extension block 'addr'*/
119 unsigned char padx005[16 - sizeof (char *)];
120 unsigned char * rpl_extb; /* reply extension block 'address'*/
121 unsigned short ccp_rtcode; /* server return code */
122 unsigned short ccp_rscode; /* server reason code */
123 unsigned int mac_data_len; /* Mac Data Length */
124 unsigned char logon_id[8]; /* Logon Identifier */
125 unsigned char mac_value[8]; /* Mac Value */
126 unsigned char mac_content_flgs;/* Mac content flag byte */
127 unsigned char pad_002; /* Alignment */
128 unsigned short domain; /* Domain */
129 unsigned char usage_domain[4];/* Usage domain */
130 unsigned char cntrl_domain[4];/* Control domain */
131 unsigned char S390enf_mask[4];/* S/390 enforcement mask */
132 unsigned char pad_004[36]; /* reserved */
133} __attribute__((packed));
134
135/**
136 * xcRB
137 */
138struct ica_xcRB {
139 unsigned short agent_ID;
140 unsigned int user_defined;
141 unsigned short request_ID;
142 unsigned int request_control_blk_length;
143 unsigned char padding1[16 - sizeof (char *)];
144 char __user * request_control_blk_addr;
145 unsigned int request_data_length;
146 char padding2[16 - sizeof (char *)];
147 char __user * request_data_address;
148 unsigned int reply_control_blk_length;
149 char padding3[16 - sizeof (char *)];
150 char __user * reply_control_blk_addr;
151 unsigned int reply_data_length;
152 char padding4[16 - sizeof (char *)];
153 char __user * reply_data_addr;
154 unsigned short priority_window;
155 unsigned int status;
156} __attribute__((packed));
157#define AUTOSELECT ((unsigned int)0xFFFFFFFF)
158
159#define ZCRYPT_IOCTL_MAGIC 'z'
160
161/**
162 * Interface notes:
163 *
164 * The ioctl()s which are implemented (along with relevant details)
165 * are:
166 *
167 * ICARSAMODEXPO
168 * Perform an RSA operation using a Modulus-Exponent pair
169 * This takes an ica_rsa_modexpo struct as its arg.
170 *
171 * NOTE: please refer to the comments preceding this structure
172 * for the implementation details for the contents of the
173 * block
174 *
175 * ICARSACRT
176 * Perform an RSA operation using a Chinese-Remainder Theorem key
177 * This takes an ica_rsa_modexpo_crt struct as its arg.
178 *
179 * NOTE: please refer to the comments preceding this structure
180 * for the implementation details for the contents of the
181 * block
182 *
183 * ZSECSENDCPRB
184 * Send an arbitrary CPRB to a crypto card.
185 *
186 * Z90STAT_STATUS_MASK
187 * Return an 64 element array of unsigned chars for the status of
188 * all devices.
189 * 0x01: PCICA
190 * 0x02: PCICC
191 * 0x03: PCIXCC_MCL2
192 * 0x04: PCIXCC_MCL3
193 * 0x05: CEX2C
194 * 0x06: CEX2A
195 * 0x0d: device is disabled via the proc filesystem
196 *
197 * Z90STAT_QDEPTH_MASK
198 * Return an 64 element array of unsigned chars for the queue
199 * depth of all devices.
200 *
201 * Z90STAT_PERDEV_REQCNT
202 * Return an 64 element array of unsigned integers for the number
203 * of successfully completed requests per device since the device
204 * was detected and made available.
205 *
206 * Z90STAT_REQUESTQ_COUNT
207 * Return an integer count of the number of entries waiting to be
208 * sent to a device.
209 *
210 * Z90STAT_PENDINGQ_COUNT
211 * Return an integer count of the number of entries sent to all
212 * devices awaiting the reply.
213 *
214 * Z90STAT_TOTALOPEN_COUNT
215 * Return an integer count of the number of open file handles.
216 *
217 * Z90STAT_DOMAIN_INDEX
218 * Return the integer value of the Cryptographic Domain.
219 *
220 * The following ioctls are deprecated and should be no longer used:
221 *
222 * Z90STAT_TOTALCOUNT
223 * Return an integer count of all device types together.
224 *
225 * Z90STAT_PCICACOUNT
226 * Return an integer count of all PCICAs.
227 *
228 * Z90STAT_PCICCCOUNT
229 * Return an integer count of all PCICCs.
230 *
231 * Z90STAT_PCIXCCMCL2COUNT
232 * Return an integer count of all MCL2 PCIXCCs.
233 *
234 * Z90STAT_PCIXCCMCL3COUNT
235 * Return an integer count of all MCL3 PCIXCCs.
236 *
237 * Z90STAT_CEX2CCOUNT
238 * Return an integer count of all CEX2Cs.
239 *
240 * Z90STAT_CEX2ACOUNT
241 * Return an integer count of all CEX2As.
242 *
243 * ICAZ90STATUS
244 * Return some device driver status in a ica_z90_status struct
245 * This takes an ica_z90_status struct as its arg.
246 *
247 * Z90STAT_PCIXCCCOUNT
248 * Return an integer count of all PCIXCCs (MCL2 + MCL3).
249 * This is DEPRECATED now that MCL3 PCIXCCs are treated differently from
250 * MCL2 PCIXCCs.
251 */
252
253/**
254 * Supported ioctl calls
255 */
256#define ICARSAMODEXPO _IOC(_IOC_READ|_IOC_WRITE, ZCRYPT_IOCTL_MAGIC, 0x05, 0)
257#define ICARSACRT _IOC(_IOC_READ|_IOC_WRITE, ZCRYPT_IOCTL_MAGIC, 0x06, 0)
258#define ZSECSENDCPRB _IOC(_IOC_READ|_IOC_WRITE, ZCRYPT_IOCTL_MAGIC, 0x81, 0)
259
260/* New status calls */
261#define Z90STAT_TOTALCOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x40, int)
262#define Z90STAT_PCICACOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x41, int)
263#define Z90STAT_PCICCCOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x42, int)
264#define Z90STAT_PCIXCCMCL2COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4b, int)
265#define Z90STAT_PCIXCCMCL3COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4c, int)
266#define Z90STAT_CEX2CCOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4d, int)
267#define Z90STAT_CEX2ACOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4e, int)
268#define Z90STAT_REQUESTQ_COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x44, int)
269#define Z90STAT_PENDINGQ_COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x45, int)
270#define Z90STAT_TOTALOPEN_COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x46, int)
271#define Z90STAT_DOMAIN_INDEX _IOR(ZCRYPT_IOCTL_MAGIC, 0x47, int)
272#define Z90STAT_STATUS_MASK _IOR(ZCRYPT_IOCTL_MAGIC, 0x48, char[64])
273#define Z90STAT_QDEPTH_MASK _IOR(ZCRYPT_IOCTL_MAGIC, 0x49, char[64])
274#define Z90STAT_PERDEV_REQCNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4a, int[64])
275
276#endif /* __ASM_S390_ZCRYPT_H */
diff --git a/include/linux/ihex.h b/include/linux/ihex.h
index 2baace2788a7..31d8629e75a1 100644
--- a/include/linux/ihex.h
+++ b/include/linux/ihex.h
@@ -18,7 +18,7 @@ struct ihex_binrec {
18 __be32 addr; 18 __be32 addr;
19 __be16 len; 19 __be16 len;
20 uint8_t data[0]; 20 uint8_t data[0];
21} __attribute__((aligned(4))); 21} __attribute__((packed));
22 22
23/* Find the next record, taking into account the 4-byte alignment */ 23/* Find the next record, taking into account the 4-byte alignment */
24static inline const struct ihex_binrec * 24static inline const struct ihex_binrec *
diff --git a/include/linux/mISDNif.h b/include/linux/mISDNif.h
index 5c948f337817..8f2d60da04e7 100644
--- a/include/linux/mISDNif.h
+++ b/include/linux/mISDNif.h
@@ -37,7 +37,7 @@
37 */ 37 */
38#define MISDN_MAJOR_VERSION 1 38#define MISDN_MAJOR_VERSION 1
39#define MISDN_MINOR_VERSION 0 39#define MISDN_MINOR_VERSION 0
40#define MISDN_RELEASE 18 40#define MISDN_RELEASE 19
41 41
42/* primitives for information exchange 42/* primitives for information exchange
43 * generell format 43 * generell format
@@ -242,7 +242,8 @@ struct mISDNhead {
242#define TEI_SAPI 63 242#define TEI_SAPI 63
243#define CTRL_SAPI 0 243#define CTRL_SAPI 0
244 244
245#define MISDN_CHMAP_SIZE 4 245#define MISDN_MAX_CHANNEL 127
246#define MISDN_CHMAP_SIZE ((MISDN_MAX_CHANNEL + 1) >> 3)
246 247
247#define SOL_MISDN 0 248#define SOL_MISDN 0
248 249
@@ -275,11 +276,32 @@ struct mISDN_devinfo {
275 u_int Dprotocols; 276 u_int Dprotocols;
276 u_int Bprotocols; 277 u_int Bprotocols;
277 u_int protocol; 278 u_int protocol;
278 u_long channelmap[MISDN_CHMAP_SIZE]; 279 u_char channelmap[MISDN_CHMAP_SIZE];
279 u_int nrbchan; 280 u_int nrbchan;
280 char name[MISDN_MAX_IDLEN]; 281 char name[MISDN_MAX_IDLEN];
281}; 282};
282 283
284static inline int
285test_channelmap(u_int nr, u_char *map)
286{
287 if (nr <= MISDN_MAX_CHANNEL)
288 return map[nr >> 3] & (1 << (nr & 7));
289 else
290 return 0;
291}
292
293static inline void
294set_channelmap(u_int nr, u_char *map)
295{
296 map[nr >> 3] |= (1 << (nr & 7));
297}
298
299static inline void
300clear_channelmap(u_int nr, u_char *map)
301{
302 map[nr >> 3] &= ~(1 << (nr & 7));
303}
304
283/* CONTROL_CHANNEL parameters */ 305/* CONTROL_CHANNEL parameters */
284#define MISDN_CTRL_GETOP 0x0000 306#define MISDN_CTRL_GETOP 0x0000
285#define MISDN_CTRL_LOOP 0x0001 307#define MISDN_CTRL_LOOP 0x0001
@@ -405,7 +427,7 @@ struct mISDNdevice {
405 u_int Dprotocols; 427 u_int Dprotocols;
406 u_int Bprotocols; 428 u_int Bprotocols;
407 u_int nrbchan; 429 u_int nrbchan;
408 u_long channelmap[MISDN_CHMAP_SIZE]; 430 u_char channelmap[MISDN_CHMAP_SIZE];
409 struct list_head bchannels; 431 struct list_head bchannels;
410 struct mISDNchannel *teimgr; 432 struct mISDNchannel *teimgr;
411 struct device dev; 433 struct device dev;
@@ -430,7 +452,7 @@ struct mISDNstack {
430#endif 452#endif
431}; 453};
432 454
433/* global alloc/queue dunctions */ 455/* global alloc/queue functions */
434 456
435static inline struct sk_buff * 457static inline struct sk_buff *
436mI_alloc_skb(unsigned int len, gfp_t gfp_mask) 458mI_alloc_skb(unsigned int len, gfp_t gfp_mask)
diff --git a/include/linux/parser.h b/include/linux/parser.h
index cc554ca8bc78..7dcd05075756 100644
--- a/include/linux/parser.h
+++ b/include/linux/parser.h
@@ -14,7 +14,7 @@ struct match_token {
14 const char *pattern; 14 const char *pattern;
15}; 15};
16 16
17typedef const struct match_token match_table_t[]; 17typedef struct match_token match_table_t[];
18 18
19/* Maximum number of arguments that match_token will find in a pattern */ 19/* Maximum number of arguments that match_token will find in a pattern */
20enum {MAX_OPT_ARGS = 3}; 20enum {MAX_OPT_ARGS = 3};
diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h
index 12532839f508..ab3ef7aefa95 100644
--- a/include/linux/tracehook.h
+++ b/include/linux/tracehook.h
@@ -487,6 +487,9 @@ static inline int tracehook_notify_jctl(int notify, int why)
487 return notify || (current->ptrace & PT_PTRACED); 487 return notify || (current->ptrace & PT_PTRACED);
488} 488}
489 489
490#define DEATH_REAP -1
491#define DEATH_DELAYED_GROUP_LEADER -2
492
490/** 493/**
491 * tracehook_notify_death - task is dead, ready to notify parent 494 * tracehook_notify_death - task is dead, ready to notify parent
492 * @task: @current task now exiting 495 * @task: @current task now exiting
@@ -501,8 +504,6 @@ static inline int tracehook_notify_jctl(int notify, int why)
501 * 504 *
502 * Called with write_lock_irq(&tasklist_lock) held. 505 * Called with write_lock_irq(&tasklist_lock) held.
503 */ 506 */
504#define DEATH_REAP -1
505#define DEATH_DELAYED_GROUP_LEADER -2
506static inline int tracehook_notify_death(struct task_struct *task, 507static inline int tracehook_notify_death(struct task_struct *task,
507 void **death_cookie, int group_dead) 508 void **death_cookie, int group_dead)
508{ 509{
diff --git a/include/linux/vt_kern.h b/include/linux/vt_kern.h
index 8c8119ffee12..1c78d56c57e5 100644
--- a/include/linux/vt_kern.h
+++ b/include/linux/vt_kern.h
@@ -86,6 +86,7 @@ int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc);
86#define con_copy_unimap(d, s) (0) 86#define con_copy_unimap(d, s) (0)
87#define con_get_unimap(vc, ct, uct, list) (-EINVAL) 87#define con_get_unimap(vc, ct, uct, list) (-EINVAL)
88#define con_free_unimap(vc) do { ; } while (0) 88#define con_free_unimap(vc) do { ; } while (0)
89#define con_protect_unimap(vc, rdonly) do { ; } while (0)
89 90
90#define vc_translate(vc, c) (c) 91#define vc_translate(vc, c) (c)
91#endif 92#endif
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 291d56a19167..9cecc409f0f8 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -140,8 +140,7 @@ struct scsi_device {
140 unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */ 140 unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */
141 unsigned guess_capacity:1; /* READ_CAPACITY might be too high by 1 */ 141 unsigned guess_capacity:1; /* READ_CAPACITY might be too high by 1 */
142 unsigned retry_hwerror:1; /* Retry HARDWARE_ERROR */ 142 unsigned retry_hwerror:1; /* Retry HARDWARE_ERROR */
143 unsigned last_sector_bug:1; /* do not use multisector accesses on 143 unsigned last_sector_bug:1; /* Always read last sector in a 1 sector read */
144 SD_LAST_BUGGY_SECTORS */
145 144
146 DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */ 145 DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */
147 struct list_head event_list; /* asserted events */ 146 struct list_head event_list; /* asserted events */