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-rw-r--r--include/acpi/acmacros.h6
-rw-r--r--include/acpi/platform/acgcc.h2
-rw-r--r--include/asm-arm/plat-s3c/debug-macro.S75
-rw-r--r--include/asm-arm/plat-s3c/map.h40
-rw-r--r--include/asm-arm/plat-s3c/regs-adc.h60
-rw-r--r--include/asm-arm/plat-s3c/regs-serial.h232
-rw-r--r--include/asm-arm/plat-s3c/regs-timer.h115
-rw-r--r--include/asm-arm/plat-s3c/uncompress.h155
-rw-r--r--include/asm-arm/plat-s3c24xx/clock.h64
-rw-r--r--include/asm-arm/plat-s3c24xx/common-smdk.h15
-rw-r--r--include/asm-arm/plat-s3c24xx/cpu.h54
-rw-r--r--include/asm-arm/plat-s3c24xx/devs.h49
-rw-r--r--include/asm-arm/plat-s3c24xx/dma.h82
-rw-r--r--include/asm-arm/plat-s3c24xx/irq.h109
-rw-r--r--include/asm-arm/plat-s3c24xx/pm.h73
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2400.h31
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2410.h31
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2412.h29
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2440.h17
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2442.h17
-rw-r--r--include/asm-arm/plat-s3c24xx/s3c2443.h32
-rw-r--r--include/asm-cris/elf.h2
-rw-r--r--include/asm-cris/thread_info.h2
-rw-r--r--include/asm-frv/elf.h2
-rw-r--r--include/asm-frv/ide.h10
-rw-r--r--include/asm-frv/unaligned.h2
-rw-r--r--include/asm-generic/bug.h4
-rw-r--r--include/asm-generic/gpio.h18
-rw-r--r--include/asm-generic/rtc.h24
-rw-r--r--include/asm-generic/vmlinux.lds.h24
-rw-r--r--include/asm-h8300/timer.h25
-rw-r--r--include/asm-m32r/elf.h2
-rw-r--r--include/asm-m68k/elf.h2
-rw-r--r--include/asm-m68k/ide.h9
-rw-r--r--include/asm-m68k/thread_info.h1
-rw-r--r--include/asm-mips/cevt-r4k.h46
-rw-r--r--include/asm-mn10300/elf.h2
-rw-r--r--include/asm-parisc/Kbuild3
-rw-r--r--include/asm-parisc/agp.h24
-rw-r--r--include/asm-parisc/asmregs.h183
-rw-r--r--include/asm-parisc/assembly.h519
-rw-r--r--include/asm-parisc/atomic.h348
-rw-r--r--include/asm-parisc/auxvec.h4
-rw-r--r--include/asm-parisc/bitops.h239
-rw-r--r--include/asm-parisc/bug.h92
-rw-r--r--include/asm-parisc/bugs.h19
-rw-r--r--include/asm-parisc/byteorder.h82
-rw-r--r--include/asm-parisc/cache.h60
-rw-r--r--include/asm-parisc/cacheflush.h121
-rw-r--r--include/asm-parisc/checksum.h210
-rw-r--r--include/asm-parisc/compat.h165
-rw-r--r--include/asm-parisc/compat_rt_sigframe.h50
-rw-r--r--include/asm-parisc/compat_signal.h2
-rw-r--r--include/asm-parisc/compat_ucontext.h17
-rw-r--r--include/asm-parisc/cputime.h6
-rw-r--r--include/asm-parisc/current.h15
-rw-r--r--include/asm-parisc/delay.h43
-rw-r--r--include/asm-parisc/device.h7
-rw-r--r--include/asm-parisc/div64.h1
-rw-r--r--include/asm-parisc/dma-mapping.h253
-rw-r--r--include/asm-parisc/dma.h186
-rw-r--r--include/asm-parisc/eisa_bus.h23
-rw-r--r--include/asm-parisc/eisa_eeprom.h153
-rw-r--r--include/asm-parisc/elf.h342
-rw-r--r--include/asm-parisc/emergency-restart.h6
-rw-r--r--include/asm-parisc/errno.h124
-rw-r--r--include/asm-parisc/fb.h19
-rw-r--r--include/asm-parisc/fcntl.h39
-rw-r--r--include/asm-parisc/fixmap.h30
-rw-r--r--include/asm-parisc/floppy.h271
-rw-r--r--include/asm-parisc/futex.h77
-rw-r--r--include/asm-parisc/grfioctl.h113
-rw-r--r--include/asm-parisc/hardirq.h29
-rw-r--r--include/asm-parisc/hardware.h127
-rw-r--r--include/asm-parisc/hw_irq.h8
-rw-r--r--include/asm-parisc/ide.h61
-rw-r--r--include/asm-parisc/io.h293
-rw-r--r--include/asm-parisc/ioctl.h44
-rw-r--r--include/asm-parisc/ioctls.h90
-rw-r--r--include/asm-parisc/ipcbuf.h27
-rw-r--r--include/asm-parisc/irq.h57
-rw-r--r--include/asm-parisc/irq_regs.h1
-rw-r--r--include/asm-parisc/kdebug.h1
-rw-r--r--include/asm-parisc/kmap_types.h30
-rw-r--r--include/asm-parisc/led.h42
-rw-r--r--include/asm-parisc/linkage.h31
-rw-r--r--include/asm-parisc/local.h1
-rw-r--r--include/asm-parisc/machdep.h16
-rw-r--r--include/asm-parisc/mc146818rtc.h9
-rw-r--r--include/asm-parisc/mckinley.h9
-rw-r--r--include/asm-parisc/mman.h61
-rw-r--r--include/asm-parisc/mmu.h7
-rw-r--r--include/asm-parisc/mmu_context.h75
-rw-r--r--include/asm-parisc/mmzone.h73
-rw-r--r--include/asm-parisc/module.h32
-rw-r--r--include/asm-parisc/msgbuf.h37
-rw-r--r--include/asm-parisc/mutex.h9
-rw-r--r--include/asm-parisc/page.h173
-rw-r--r--include/asm-parisc/param.h22
-rw-r--r--include/asm-parisc/parisc-device.h64
-rw-r--r--include/asm-parisc/parport.h18
-rw-r--r--include/asm-parisc/pci.h294
-rw-r--r--include/asm-parisc/pdc.h757
-rw-r--r--include/asm-parisc/pdc_chassis.h381
-rw-r--r--include/asm-parisc/pdcpat.h308
-rw-r--r--include/asm-parisc/percpu.h7
-rw-r--r--include/asm-parisc/perf.h74
-rw-r--r--include/asm-parisc/pgalloc.h149
-rw-r--r--include/asm-parisc/pgtable.h508
-rw-r--r--include/asm-parisc/poll.h1
-rw-r--r--include/asm-parisc/posix_types.h129
-rw-r--r--include/asm-parisc/prefetch.h39
-rw-r--r--include/asm-parisc/processor.h357
-rw-r--r--include/asm-parisc/psw.h62
-rw-r--r--include/asm-parisc/ptrace.h58
-rw-r--r--include/asm-parisc/real.h5
-rw-r--r--include/asm-parisc/resource.h7
-rw-r--r--include/asm-parisc/ropes.h322
-rw-r--r--include/asm-parisc/rt_sigframe.h23
-rw-r--r--include/asm-parisc/rtc.h131
-rw-r--r--include/asm-parisc/runway.h12
-rw-r--r--include/asm-parisc/scatterlist.h27
-rw-r--r--include/asm-parisc/sections.h12
-rw-r--r--include/asm-parisc/segment.h6
-rw-r--r--include/asm-parisc/sembuf.h29
-rw-r--r--include/asm-parisc/serial.h10
-rw-r--r--include/asm-parisc/setup.h6
-rw-r--r--include/asm-parisc/shmbuf.h58
-rw-r--r--include/asm-parisc/shmparam.h8
-rw-r--r--include/asm-parisc/sigcontext.h20
-rw-r--r--include/asm-parisc/siginfo.h9
-rw-r--r--include/asm-parisc/signal.h153
-rw-r--r--include/asm-parisc/smp.h68
-rw-r--r--include/asm-parisc/socket.h62
-rw-r--r--include/asm-parisc/sockios.h13
-rw-r--r--include/asm-parisc/spinlock.h194
-rw-r--r--include/asm-parisc/spinlock_types.h21
-rw-r--r--include/asm-parisc/stat.h100
-rw-r--r--include/asm-parisc/statfs.h7
-rw-r--r--include/asm-parisc/string.h10
-rw-r--r--include/asm-parisc/superio.h85
-rw-r--r--include/asm-parisc/system.h182
-rw-r--r--include/asm-parisc/termbits.h200
-rw-r--r--include/asm-parisc/termios.h90
-rw-r--r--include/asm-parisc/thread_info.h74
-rw-r--r--include/asm-parisc/timex.h20
-rw-r--r--include/asm-parisc/tlb.h27
-rw-r--r--include/asm-parisc/tlbflush.h80
-rw-r--r--include/asm-parisc/topology.h6
-rw-r--r--include/asm-parisc/traps.h16
-rw-r--r--include/asm-parisc/types.h36
-rw-r--r--include/asm-parisc/uaccess.h244
-rw-r--r--include/asm-parisc/ucontext.h12
-rw-r--r--include/asm-parisc/unaligned.h16
-rw-r--r--include/asm-parisc/unistd.h991
-rw-r--r--include/asm-parisc/unwind.h77
-rw-r--r--include/asm-parisc/user.h5
-rw-r--r--include/asm-parisc/vga.h6
-rw-r--r--include/asm-parisc/xor.h1
-rw-r--r--include/asm-um/elf-i386.h2
-rw-r--r--include/asm-um/elf-ppc.h2
-rw-r--r--include/asm-um/elf-x86_64.h2
-rw-r--r--include/asm-um/thread_info.h2
-rw-r--r--include/asm-x86/apic.h16
-rw-r--r--include/asm-x86/bigsmp/apic.h15
-rw-r--r--include/asm-x86/efi.h13
-rw-r--r--include/asm-x86/elf.h4
-rw-r--r--include/asm-x86/es7000/apic.h5
-rw-r--r--include/asm-x86/ftrace.h10
-rw-r--r--include/asm-x86/genapic_32.h2
-rw-r--r--include/asm-x86/hpet.h21
-rw-r--r--include/asm-x86/hw_irq.h13
-rw-r--r--include/asm-x86/io_apic.h24
-rw-r--r--include/asm-x86/iommu.h2
-rw-r--r--include/asm-x86/irq_vectors.h24
-rw-r--r--include/asm-x86/kvm.h22
-rw-r--r--include/asm-x86/kvm_host.h82
-rw-r--r--include/asm-x86/mach-default/entry_arch.h1
-rw-r--r--include/asm-x86/mach-default/mach_apic.h15
-rw-r--r--include/asm-x86/mach-generic/irq_vectors_limits.h14
-rw-r--r--include/asm-x86/mach-generic/mach_apic.h1
-rw-r--r--include/asm-x86/msr-index.h3
-rw-r--r--include/asm-x86/numaq/apic.h2
-rw-r--r--include/asm-x86/page_32.h2
-rw-r--r--include/asm-x86/page_64.h1
-rw-r--r--include/asm-x86/pgtable.h7
-rw-r--r--include/asm-x86/pvclock.h1
-rw-r--r--include/asm-x86/summit/apic.h3
-rw-r--r--include/asm-x86/summit/irq_vectors_limits.h14
-rw-r--r--include/asm-x86/uv/bios.h94
-rw-r--r--include/asm-x86/uv/uv_irq.h36
-rw-r--r--include/asm-x86/xen/page.h4
-rw-r--r--include/asm-xtensa/elf.h2
-rw-r--r--include/asm-xtensa/thread_info.h2
-rw-r--r--include/drm/drm.h63
-rw-r--r--include/drm/drmP.h249
-rw-r--r--include/drm/drm_pciids.h54
-rw-r--r--include/drm/i915_drm.h333
-rw-r--r--include/linux/Kbuild3
-rw-r--r--include/linux/aer.h5
-rw-r--r--include/linux/aio.h9
-rw-r--r--include/linux/auto_dev-ioctl.h157
-rw-r--r--include/linux/auto_fs4.h7
-rw-r--r--include/linux/backing-dev.h13
-rw-r--r--include/linux/bcd.h16
-rw-r--r--include/linux/binfmts.h5
-rw-r--r--include/linux/bio.h33
-rw-r--r--include/linux/bitmap.h2
-rw-r--r--include/linux/blkdev.h16
-rw-r--r--include/linux/blktrace_api.h32
-rw-r--r--include/linux/buffer_head.h2
-rw-r--r--include/linux/byteorder/Kbuild1
-rw-r--r--include/linux/byteorder/big_endian.h1
-rw-r--r--include/linux/byteorder/little_endian.h1
-rw-r--r--include/linux/cgroup.h31
-rw-r--r--include/linux/cgroup_subsys.h6
-rw-r--r--include/linux/clk.h4
-rw-r--r--include/linux/clocksource.h14
-rw-r--r--include/linux/compat.h6
-rw-r--r--include/linux/compiler.h2
-rw-r--r--include/linux/console_struct.h1
-rw-r--r--include/linux/crash_dump.h38
-rw-r--r--include/linux/device.h18
-rw-r--r--include/linux/dma_remapping.h157
-rw-r--r--include/linux/dmar.h1
-rw-r--r--include/linux/ds1286.h2
-rw-r--r--include/linux/dvb/frontend.h2
-rw-r--r--include/linux/dynamic_printk.h93
-rw-r--r--include/linux/efi.h4
-rw-r--r--include/linux/ext2_fs.h2
-rw-r--r--include/linux/ext3_fs.h6
-rw-r--r--include/linux/ext3_jbd.h14
-rw-r--r--include/linux/fb.h1
-rw-r--r--include/linux/firewire-cdev.h9
-rw-r--r--include/linux/freezer.h43
-rw-r--r--include/linux/fs.h65
-rw-r--r--include/linux/ftrace.h84
-rw-r--r--include/linux/fuse.h12
-rw-r--r--include/linux/gameport.h7
-rw-r--r--include/linux/gpio.h3
-rw-r--r--include/linux/hid.h373
-rw-r--r--include/linux/hiddev.h46
-rw-r--r--include/linux/hrtimer.h10
-rw-r--r--include/linux/i2c-id.h2
-rw-r--r--include/linux/i2c/twl4030.h343
-rw-r--r--include/linux/i2o.h292
-rw-r--r--include/linux/icmpv6.h6
-rw-r--r--include/linux/ide.h36
-rw-r--r--include/linux/init.h6
-rw-r--r--include/linux/input.h15
-rw-r--r--include/linux/intel-iommu.h327
-rw-r--r--include/linux/interrupt.h24
-rw-r--r--include/linux/iommu-helper.h3
-rw-r--r--include/linux/ioport.h8
-rw-r--r--include/linux/iova.h52
-rw-r--r--include/linux/irq.h56
-rw-r--r--include/linux/irqnr.h24
-rw-r--r--include/linux/jbd.h9
-rw-r--r--include/linux/jbd2.h13
-rw-r--r--include/linux/journal-head.h2
-rw-r--r--include/linux/kallsyms.h8
-rw-r--r--include/linux/kernel.h41
-rw-r--r--include/linux/kernel_stat.h21
-rw-r--r--include/linux/kmod.h3
-rw-r--r--include/linux/kprobes.h5
-rw-r--r--include/linux/kvm.h72
-rw-r--r--include/linux/kvm_host.h82
-rw-r--r--include/linux/libata.h3
-rw-r--r--include/linux/linkage.h2
-rw-r--r--include/linux/lockd/bind.h11
-rw-r--r--include/linux/lockd/lockd.h137
-rw-r--r--include/linux/lockd/xdr.h2
-rw-r--r--include/linux/map_to_7segment.h187
-rw-r--r--include/linux/marker.h7
-rw-r--r--include/linux/memcontrol.h34
-rw-r--r--include/linux/mfd/da903x.h201
-rw-r--r--include/linux/mfd/t7l66xb.h2
-rw-r--r--include/linux/mfd/tc6387xb.h3
-rw-r--r--include/linux/mfd/tc6393xb.h17
-rw-r--r--include/linux/mfd/tmio.h19
-rw-r--r--include/linux/mfd/wm8350/audio.h598
-rw-r--r--include/linux/mfd/wm8350/comparator.h167
-rw-r--r--include/linux/mfd/wm8350/core.h631
-rw-r--r--include/linux/mfd/wm8350/gpio.h342
-rw-r--r--include/linux/mfd/wm8350/pmic.h741
-rw-r--r--include/linux/mfd/wm8350/rtc.h266
-rw-r--r--include/linux/mfd/wm8350/supply.h111
-rw-r--r--include/linux/mfd/wm8350/wdt.h28
-rw-r--r--include/linux/mfd/wm8400-audio.h1186
-rw-r--r--include/linux/mfd/wm8400-private.h936
-rw-r--r--include/linux/mfd/wm8400.h40
-rw-r--r--include/linux/migrate.h3
-rw-r--r--include/linux/mlx4/cmd.h9
-rw-r--r--include/linux/mlx4/device.h54
-rw-r--r--include/linux/mm.h9
-rw-r--r--include/linux/mm_inline.h98
-rw-r--r--include/linux/mm_types.h3
-rw-r--r--include/linux/mmiotrace.h20
-rw-r--r--include/linux/mmzone.h105
-rw-r--r--include/linux/mod_devicetable.h12
-rw-r--r--include/linux/module.h18
-rw-r--r--include/linux/mount.h2
-rw-r--r--include/linux/mtd/cfi.h9
-rw-r--r--include/linux/mtd/flashchip.h4
-rw-r--r--include/linux/mtd/mtd.h4
-rw-r--r--include/linux/mtd/nand-gpio.h19
-rw-r--r--include/linux/mtd/nand.h1
-rw-r--r--include/linux/mtd/onenand_regs.h2
-rw-r--r--include/linux/mtd/partitions.h1
-rw-r--r--include/linux/mtd/sh_flctl.h125
-rw-r--r--include/linux/netfilter/nfnetlink.h3
-rw-r--r--include/linux/nfs_fs.h27
-rw-r--r--include/linux/nfs_fs_sb.h1
-rw-r--r--include/linux/nfs_mount.h4
-rw-r--r--include/linux/nfs_xdr.h11
-rw-r--r--include/linux/nfsd/nfsd.h3
-rw-r--r--include/linux/of.h3
-rw-r--r--include/linux/oprofile.h16
-rw-r--r--include/linux/page-flags.h55
-rw-r--r--include/linux/page_cgroup.h108
-rw-r--r--include/linux/pagemap.h44
-rw-r--r--include/linux/pagevec.h34
-rw-r--r--include/linux/parport.h2
-rw-r--r--include/linux/pci.h26
-rw-r--r--include/linux/pci_ids.h7
-rw-r--r--include/linux/pci_regs.h14
-rw-r--r--include/linux/pfn.h6
-rw-r--r--include/linux/pid_namespace.h6
-rw-r--r--include/linux/platform_device.h2
-rw-r--r--include/linux/pm.h2
-rw-r--r--include/linux/pnp.h6
-rw-r--r--include/linux/posix-timers.h4
-rw-r--r--include/linux/power_supply.h6
-rw-r--r--include/linux/proc_fs.h1
-rw-r--r--include/linux/profile.h13
-rw-r--r--include/linux/ptrace.h1
-rw-r--r--include/linux/quota.h2
-rw-r--r--include/linux/quotaops.h3
-rw-r--r--include/linux/raid/linear.h10
-rw-r--r--include/linux/raid/md.h32
-rw-r--r--include/linux/regulator/driver.h10
-rw-r--r--include/linux/regulator/machine.h30
-rw-r--r--include/linux/reiserfs_fs.h2
-rw-r--r--include/linux/ring_buffer.h127
-rw-r--r--include/linux/rmap.h29
-rw-r--r--include/linux/rtmutex.h2
-rw-r--r--include/linux/sched.h97
-rw-r--r--include/linux/seq_file.h13
-rw-r--r--include/linux/sh_intc.h91
-rw-r--r--include/linux/smp.h4
-rw-r--r--include/linux/spi/orion_spi.h1
-rw-r--r--include/linux/sunrpc/clnt.h5
-rw-r--r--include/linux/sunrpc/svc.h19
-rw-r--r--include/linux/sunrpc/svc_rdma.h27
-rw-r--r--include/linux/sunrpc/svcsock.h5
-rw-r--r--include/linux/sunrpc/xprtrdma.h4
-rw-r--r--include/linux/swab.h10
-rw-r--r--include/linux/swap.h69
-rw-r--r--include/linux/swiotlb.h83
-rw-r--r--include/linux/sysctl.h2
-rw-r--r--include/linux/sysfs.h41
-rw-r--r--include/linux/task_io_accounting.h2
-rw-r--r--include/linux/telephony.h4
-rw-r--r--include/linux/tick.h7
-rw-r--r--include/linux/time.h7
-rw-r--r--include/linux/timex.h11
-rw-r--r--include/linux/tracepoint.h137
-rw-r--r--include/linux/types.h8
-rw-r--r--include/linux/usb.h7
-rw-r--r--include/linux/usb/Kbuild3
-rw-r--r--include/linux/usb/cdc.h9
-rw-r--r--include/linux/usb/composite.h11
-rw-r--r--include/linux/usb/serial.h2
-rw-r--r--include/linux/usb/tmc.h43
-rw-r--r--include/linux/usb/vstusb.h71
-rw-r--r--include/linux/usb/wusb-wa.h271
-rw-r--r--include/linux/usb/wusb.h376
-rw-r--r--include/linux/uwb.h765
-rw-r--r--include/linux/uwb/debug-cmd.h57
-rw-r--r--include/linux/uwb/debug.h82
-rw-r--r--include/linux/uwb/spec.h727
-rw-r--r--include/linux/uwb/umc.h194
-rw-r--r--include/linux/uwb/whci.h117
-rw-r--r--include/linux/vmalloc.h15
-rw-r--r--include/linux/vmstat.h20
-rw-r--r--include/linux/wait.h9
-rw-r--r--include/linux/wlp.h735
-rw-r--r--include/linux/writeback.h10
-rw-r--r--include/math-emu/op-2.h2
-rw-r--r--include/math-emu/op-common.h12
-rw-r--r--include/math-emu/soft-fp.h19
-rw-r--r--include/media/saa7146.h2
-rw-r--r--include/media/soc_camera_platform.h11
-rw-r--r--include/media/tuner.h1
-rw-r--r--include/media/v4l2-i2c-drv-legacy.h11
-rw-r--r--include/media/v4l2-i2c-drv.h11
-rw-r--r--include/media/videobuf-dvb.h29
-rw-r--r--include/net/9p/9p.h121
-rw-r--r--include/net/9p/client.h124
-rw-r--r--include/net/9p/transport.h55
-rw-r--r--include/net/bluetooth/bluetooth.h4
-rw-r--r--include/net/ieee80211.h2
-rw-r--r--include/net/ip.h2
-rw-r--r--include/net/ip_vs.h4
-rw-r--r--include/net/irda/irda.h2
-rw-r--r--include/net/mac80211.h3
-rw-r--r--include/net/ndisc.h5
-rw-r--r--include/net/netfilter/nf_nat_core.h8
-rw-r--r--include/net/netns/x_tables.h4
-rw-r--r--include/net/sctp/sctp.h2
-rw-r--r--include/scsi/iscsi_if.h2
-rw-r--r--include/scsi/libiscsi.h15
-rw-r--r--include/scsi/scsi.h6
-rw-r--r--include/scsi/scsi_device.h10
-rw-r--r--include/scsi/scsi_transport_fc.h8
-rw-r--r--include/scsi/scsi_transport_iscsi.h5
-rw-r--r--include/trace/sched.h56
-rw-r--r--include/video/cyblafb.h2
-rw-r--r--include/video/neomagic.h1
-rw-r--r--include/video/radeon.h23
-rw-r--r--include/video/s1d13xxxfb.h3
-rw-r--r--include/video/sh_mobile_lcdc.h78
422 files changed, 14347 insertions, 14618 deletions
diff --git a/include/acpi/acmacros.h b/include/acpi/acmacros.h
index 57ab9e9d7593..74a9617776a8 100644
--- a/include/acpi/acmacros.h
+++ b/include/acpi/acmacros.h
@@ -467,7 +467,7 @@ struct acpi_integer_overlay {
467/* 467/*
468 * If ACPI_GET_FUNCTION_NAME was not defined in the compiler-dependent header, 468 * If ACPI_GET_FUNCTION_NAME was not defined in the compiler-dependent header,
469 * define it now. This is the case where there the compiler does not support 469 * define it now. This is the case where there the compiler does not support
470 * a __FUNCTION__ macro or equivalent. 470 * a __func__ macro or equivalent.
471 */ 471 */
472#ifndef ACPI_GET_FUNCTION_NAME 472#ifndef ACPI_GET_FUNCTION_NAME
473#define ACPI_GET_FUNCTION_NAME _acpi_function_name 473#define ACPI_GET_FUNCTION_NAME _acpi_function_name
@@ -475,12 +475,12 @@ struct acpi_integer_overlay {
475 * The Name parameter should be the procedure name as a quoted string. 475 * The Name parameter should be the procedure name as a quoted string.
476 * The function name is also used by the function exit macros below. 476 * The function name is also used by the function exit macros below.
477 * Note: (const char) is used to be compatible with the debug interfaces 477 * Note: (const char) is used to be compatible with the debug interfaces
478 * and macros such as __FUNCTION__. 478 * and macros such as __func__.
479 */ 479 */
480#define ACPI_FUNCTION_NAME(name) static const char _acpi_function_name[] = #name; 480#define ACPI_FUNCTION_NAME(name) static const char _acpi_function_name[] = #name;
481 481
482#else 482#else
483/* Compiler supports __FUNCTION__ (or equivalent) -- Ignore this macro */ 483/* Compiler supports __func__ (or equivalent) -- Ignore this macro */
484 484
485#define ACPI_FUNCTION_NAME(name) 485#define ACPI_FUNCTION_NAME(name)
486#endif 486#endif
diff --git a/include/acpi/platform/acgcc.h b/include/acpi/platform/acgcc.h
index 8996dba90cd9..8e2cdc57b197 100644
--- a/include/acpi/platform/acgcc.h
+++ b/include/acpi/platform/acgcc.h
@@ -46,7 +46,7 @@
46 46
47/* Function name is used for debug output. Non-ANSI, compiler-dependent */ 47/* Function name is used for debug output. Non-ANSI, compiler-dependent */
48 48
49#define ACPI_GET_FUNCTION_NAME __FUNCTION__ 49#define ACPI_GET_FUNCTION_NAME __func__
50 50
51/* 51/*
52 * This macro is used to tag functions as "printf-like" because 52 * This macro is used to tag functions as "printf-like" because
diff --git a/include/asm-arm/plat-s3c/debug-macro.S b/include/asm-arm/plat-s3c/debug-macro.S
deleted file mode 100644
index 84c40b847da8..000000000000
--- a/include/asm-arm/plat-s3c/debug-macro.S
+++ /dev/null
@@ -1,75 +0,0 @@
1/* linux/include/asm-arm/plat-s3c/debug-macro.S
2 *
3 * Copyright 2005, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <asm/plat-s3c/regs-serial.h>
13
14/* The S3C2440 implementations are used by default as they are the
15 * most widely re-used */
16
17 .macro fifo_level_s3c2440 rd, rx
18 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
19 and \rd, \rd, #S3C2440_UFSTAT_TXMASK
20 .endm
21
22#ifndef fifo_level
23#define fifo_level fifo_level_s3c2410
24#endif
25
26 .macro fifo_full_s3c2440 rd, rx
27 ldr \rd, [ \rx, # S3C2410_UFSTAT ]
28 tst \rd, #S3C2440_UFSTAT_TXFULL
29 .endm
30
31#ifndef fifo_full
32#define fifo_full fifo_full_s3c2440
33#endif
34
35 .macro senduart,rd,rx
36 strb \rd, [\rx, # S3C2410_UTXH ]
37 .endm
38
39 .macro busyuart, rd, rx
40 ldr \rd, [ \rx, # S3C2410_UFCON ]
41 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
42 beq 1001f @
43 @ FIFO enabled...
441003:
45 fifo_full \rd, \rx
46 bne 1003b
47 b 1002f
48
491001:
50 @ busy waiting for non fifo
51 ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
52 tst \rd, #S3C2410_UTRSTAT_TXFE
53 beq 1001b
54
551002: @ exit busyuart
56 .endm
57
58 .macro waituart,rd,rx
59 ldr \rd, [ \rx, # S3C2410_UFCON ]
60 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
61 beq 1001f @
62 @ FIFO enabled...
631003:
64 fifo_level \rd, \rx
65 teq \rd, #0
66 bne 1003b
67 b 1002f
681001:
69 @ idle waiting for non fifo
70 ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
71 tst \rd, #S3C2410_UTRSTAT_TXFE
72 beq 1001b
73
741002: @ exit busyuart
75 .endm
diff --git a/include/asm-arm/plat-s3c/map.h b/include/asm-arm/plat-s3c/map.h
deleted file mode 100644
index b84289d32a54..000000000000
--- a/include/asm-arm/plat-s3c/map.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/* linux/include/asm-arm/plat-s3c/map.h
2 *
3 * Copyright 2003, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C - Memory map definitions (virtual addresses)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_PLAT_MAP_H
15#define __ASM_PLAT_MAP_H __FILE__
16
17/* Fit all our registers in at 0xF4000000 upwards, trying to use as
18 * little of the VA space as possible so vmalloc and friends have a
19 * better chance of getting memory.
20 *
21 * we try to ensure stuff like the IRQ registers are available for
22 * an single MOVS instruction (ie, only 8 bits of set data)
23 */
24
25#define S3C_ADDR_BASE (0xF4000000)
26
27#ifndef __ASSEMBLY__
28#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
29#else
30#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
31#endif
32
33#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
34#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
35#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */
36#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
37#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
38#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
39
40#endif /* __ASM_PLAT_MAP_H */
diff --git a/include/asm-arm/plat-s3c/regs-adc.h b/include/asm-arm/plat-s3c/regs-adc.h
deleted file mode 100644
index 4323cccc86cd..000000000000
--- a/include/asm-arm/plat-s3c/regs-adc.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-adc.h
2 *
3 * Copyright (c) 2004 Shannon Holland <holland@loser.net>
4 *
5 * This program is free software; yosu can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * S3C2410 ADC registers
10*/
11
12#ifndef __ASM_ARCH_REGS_ADC_H
13#define __ASM_ARCH_REGS_ADC_H "regs-adc.h"
14
15#define S3C2410_ADCREG(x) (x)
16
17#define S3C2410_ADCCON S3C2410_ADCREG(0x00)
18#define S3C2410_ADCTSC S3C2410_ADCREG(0x04)
19#define S3C2410_ADCDLY S3C2410_ADCREG(0x08)
20#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C)
21#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10)
22
23
24/* ADCCON Register Bits */
25#define S3C2410_ADCCON_ECFLG (1<<15)
26#define S3C2410_ADCCON_PRSCEN (1<<14)
27#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6)
28#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6)
29#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3)
30#define S3C2410_ADCCON_MUXMASK (0x7<<3)
31#define S3C2410_ADCCON_STDBM (1<<2)
32#define S3C2410_ADCCON_READ_START (1<<1)
33#define S3C2410_ADCCON_ENABLE_START (1<<0)
34#define S3C2410_ADCCON_STARTMASK (0x3<<0)
35
36
37/* ADCTSC Register Bits */
38#define S3C2410_ADCTSC_YM_SEN (1<<7)
39#define S3C2410_ADCTSC_YP_SEN (1<<6)
40#define S3C2410_ADCTSC_XM_SEN (1<<5)
41#define S3C2410_ADCTSC_XP_SEN (1<<4)
42#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3)
43#define S3C2410_ADCTSC_AUTO_PST (1<<2)
44#define S3C2410_ADCTSC_XY_PST(x) (((x)&0x3)<<0)
45
46/* ADCDAT0 Bits */
47#define S3C2410_ADCDAT0_UPDOWN (1<<15)
48#define S3C2410_ADCDAT0_AUTO_PST (1<<14)
49#define S3C2410_ADCDAT0_XY_PST (0x3<<12)
50#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF)
51
52/* ADCDAT1 Bits */
53#define S3C2410_ADCDAT1_UPDOWN (1<<15)
54#define S3C2410_ADCDAT1_AUTO_PST (1<<14)
55#define S3C2410_ADCDAT1_XY_PST (0x3<<12)
56#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF)
57
58#endif /* __ASM_ARCH_REGS_ADC_H */
59
60
diff --git a/include/asm-arm/plat-s3c/regs-serial.h b/include/asm-arm/plat-s3c/regs-serial.h
deleted file mode 100644
index a0daa647b92c..000000000000
--- a/include/asm-arm/plat-s3c/regs-serial.h
+++ /dev/null
@@ -1,232 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-serial.h
2 *
3 * From linux/include/asm-arm/hardware/serial_s3c2410.h
4 *
5 * Internal header file for Samsung S3C2410 serial ports (UART0-2)
6 *
7 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
8 *
9 * Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk)
10 *
11 * Adapted from:
12 *
13 * Internal header file for MX1ADS serial ports (UART1 & 2)
14 *
15 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30*/
31
32#ifndef __ASM_ARM_REGS_SERIAL_H
33#define __ASM_ARM_REGS_SERIAL_H
34
35#define S3C24XX_VA_UART0 (S3C_VA_UART)
36#define S3C24XX_VA_UART1 (S3C_VA_UART + 0x4000 )
37#define S3C24XX_VA_UART2 (S3C_VA_UART + 0x8000 )
38#define S3C24XX_VA_UART3 (S3C_VA_UART + 0xC000 )
39
40#define S3C2410_PA_UART0 (S3C24XX_PA_UART)
41#define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 )
42#define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 )
43#define S3C2443_PA_UART3 (S3C24XX_PA_UART + 0xC000 )
44
45#define S3C2410_URXH (0x24)
46#define S3C2410_UTXH (0x20)
47#define S3C2410_ULCON (0x00)
48#define S3C2410_UCON (0x04)
49#define S3C2410_UFCON (0x08)
50#define S3C2410_UMCON (0x0C)
51#define S3C2410_UBRDIV (0x28)
52#define S3C2410_UTRSTAT (0x10)
53#define S3C2410_UERSTAT (0x14)
54#define S3C2410_UFSTAT (0x18)
55#define S3C2410_UMSTAT (0x1C)
56
57#define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3))
58
59#define S3C2410_LCON_CS5 (0x0)
60#define S3C2410_LCON_CS6 (0x1)
61#define S3C2410_LCON_CS7 (0x2)
62#define S3C2410_LCON_CS8 (0x3)
63#define S3C2410_LCON_CSMASK (0x3)
64
65#define S3C2410_LCON_PNONE (0x0)
66#define S3C2410_LCON_PEVEN (0x5 << 3)
67#define S3C2410_LCON_PODD (0x4 << 3)
68#define S3C2410_LCON_PMASK (0x7 << 3)
69
70#define S3C2410_LCON_STOPB (1<<2)
71#define S3C2410_LCON_IRM (1<<6)
72
73#define S3C2440_UCON_CLKMASK (3<<10)
74#define S3C2440_UCON_PCLK (0<<10)
75#define S3C2440_UCON_UCLK (1<<10)
76#define S3C2440_UCON_PCLK2 (2<<10)
77#define S3C2440_UCON_FCLK (3<<10)
78#define S3C2443_UCON_EPLL (3<<10)
79
80#define S3C2440_UCON2_FCLK_EN (1<<15)
81#define S3C2440_UCON0_DIVMASK (15 << 12)
82#define S3C2440_UCON1_DIVMASK (15 << 12)
83#define S3C2440_UCON2_DIVMASK (7 << 12)
84#define S3C2440_UCON_DIVSHIFT (12)
85
86#define S3C2412_UCON_CLKMASK (3<<10)
87#define S3C2412_UCON_UCLK (1<<10)
88#define S3C2412_UCON_USYSCLK (3<<10)
89#define S3C2412_UCON_PCLK (0<<10)
90#define S3C2412_UCON_PCLK2 (2<<10)
91
92#define S3C2410_UCON_UCLK (1<<10)
93#define S3C2410_UCON_SBREAK (1<<4)
94
95#define S3C2410_UCON_TXILEVEL (1<<9)
96#define S3C2410_UCON_RXILEVEL (1<<8)
97#define S3C2410_UCON_TXIRQMODE (1<<2)
98#define S3C2410_UCON_RXIRQMODE (1<<0)
99#define S3C2410_UCON_RXFIFO_TOI (1<<7)
100#define S3C2443_UCON_RXERR_IRQEN (1<<6)
101#define S3C2443_UCON_LOOPBACK (1<<5)
102
103#define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
104 S3C2410_UCON_RXILEVEL | \
105 S3C2410_UCON_TXIRQMODE | \
106 S3C2410_UCON_RXIRQMODE | \
107 S3C2410_UCON_RXFIFO_TOI)
108
109#define S3C2410_UFCON_FIFOMODE (1<<0)
110#define S3C2410_UFCON_TXTRIG0 (0<<6)
111#define S3C2410_UFCON_RXTRIG8 (1<<4)
112#define S3C2410_UFCON_RXTRIG12 (2<<4)
113
114/* S3C2440 FIFO trigger levels */
115#define S3C2440_UFCON_RXTRIG1 (0<<4)
116#define S3C2440_UFCON_RXTRIG8 (1<<4)
117#define S3C2440_UFCON_RXTRIG16 (2<<4)
118#define S3C2440_UFCON_RXTRIG32 (3<<4)
119
120#define S3C2440_UFCON_TXTRIG0 (0<<6)
121#define S3C2440_UFCON_TXTRIG16 (1<<6)
122#define S3C2440_UFCON_TXTRIG32 (2<<6)
123#define S3C2440_UFCON_TXTRIG48 (3<<6)
124
125#define S3C2410_UFCON_RESETBOTH (3<<1)
126#define S3C2410_UFCON_RESETTX (1<<2)
127#define S3C2410_UFCON_RESETRX (1<<1)
128
129#define S3C2410_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
130 S3C2410_UFCON_TXTRIG0 | \
131 S3C2410_UFCON_RXTRIG8 )
132
133#define S3C2410_UMCOM_AFC (1<<4)
134#define S3C2410_UMCOM_RTS_LOW (1<<0)
135
136#define S3C2412_UMCON_AFC_63 (0<<5) /* same as s3c2443 */
137#define S3C2412_UMCON_AFC_56 (1<<5)
138#define S3C2412_UMCON_AFC_48 (2<<5)
139#define S3C2412_UMCON_AFC_40 (3<<5)
140#define S3C2412_UMCON_AFC_32 (4<<5)
141#define S3C2412_UMCON_AFC_24 (5<<5)
142#define S3C2412_UMCON_AFC_16 (6<<5)
143#define S3C2412_UMCON_AFC_8 (7<<5)
144
145#define S3C2410_UFSTAT_TXFULL (1<<9)
146#define S3C2410_UFSTAT_RXFULL (1<<8)
147#define S3C2410_UFSTAT_TXMASK (15<<4)
148#define S3C2410_UFSTAT_TXSHIFT (4)
149#define S3C2410_UFSTAT_RXMASK (15<<0)
150#define S3C2410_UFSTAT_RXSHIFT (0)
151
152/* UFSTAT S3C2443 same as S3C2440 */
153#define S3C2440_UFSTAT_TXFULL (1<<14)
154#define S3C2440_UFSTAT_RXFULL (1<<6)
155#define S3C2440_UFSTAT_TXSHIFT (8)
156#define S3C2440_UFSTAT_RXSHIFT (0)
157#define S3C2440_UFSTAT_TXMASK (63<<8)
158#define S3C2440_UFSTAT_RXMASK (63)
159
160#define S3C2410_UTRSTAT_TXE (1<<2)
161#define S3C2410_UTRSTAT_TXFE (1<<1)
162#define S3C2410_UTRSTAT_RXDR (1<<0)
163
164#define S3C2410_UERSTAT_OVERRUN (1<<0)
165#define S3C2410_UERSTAT_FRAME (1<<2)
166#define S3C2410_UERSTAT_BREAK (1<<3)
167#define S3C2443_UERSTAT_PARITY (1<<1)
168
169#define S3C2410_UERSTAT_ANY (S3C2410_UERSTAT_OVERRUN | \
170 S3C2410_UERSTAT_FRAME | \
171 S3C2410_UERSTAT_BREAK)
172
173#define S3C2410_UMSTAT_CTS (1<<0)
174#define S3C2410_UMSTAT_DeltaCTS (1<<2)
175
176#define S3C2443_DIVSLOT (0x2C)
177
178#ifndef __ASSEMBLY__
179
180/* struct s3c24xx_uart_clksrc
181 *
182 * this structure defines a named clock source that can be used for the
183 * uart, so that the best clock can be selected for the requested baud
184 * rate.
185 *
186 * min_baud and max_baud define the range of baud-rates this clock is
187 * acceptable for, if they are both zero, it is assumed any baud rate that
188 * can be generated from this clock will be used.
189 *
190 * divisor gives the divisor from the clock to the one seen by the uart
191*/
192
193struct s3c24xx_uart_clksrc {
194 const char *name;
195 unsigned int divisor;
196 unsigned int min_baud;
197 unsigned int max_baud;
198};
199
200/* configuration structure for per-machine configurations for the
201 * serial port
202 *
203 * the pointer is setup by the machine specific initialisation from the
204 * arch/arm/mach-s3c2410/ directory.
205*/
206
207struct s3c2410_uartcfg {
208 unsigned char hwport; /* hardware port number */
209 unsigned char unused;
210 unsigned short flags;
211 upf_t uart_flags; /* default uart flags */
212
213 unsigned long ucon; /* value of ucon for port */
214 unsigned long ulcon; /* value of ulcon for port */
215 unsigned long ufcon; /* value of ufcon for port */
216
217 struct s3c24xx_uart_clksrc *clocks;
218 unsigned int clocks_size;
219};
220
221/* s3c24xx_uart_devs
222 *
223 * this is exported from the core as we cannot use driver_register(),
224 * or platform_add_device() before the console_initcall()
225*/
226
227extern struct platform_device *s3c24xx_uart_devs[3];
228
229#endif /* __ASSEMBLY__ */
230
231#endif /* __ASM_ARM_REGS_SERIAL_H */
232
diff --git a/include/asm-arm/plat-s3c/regs-timer.h b/include/asm-arm/plat-s3c/regs-timer.h
deleted file mode 100644
index cc0eedd53e38..000000000000
--- a/include/asm-arm/plat-s3c/regs-timer.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-timer.h
2 *
3 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C2410 Timer configuration
11*/
12
13
14#ifndef __ASM_ARCH_REGS_TIMER_H
15#define __ASM_ARCH_REGS_TIMER_H
16
17#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
18#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
19
20#define S3C2410_TCFG0 S3C_TIMERREG(0x00)
21#define S3C2410_TCFG1 S3C_TIMERREG(0x04)
22#define S3C2410_TCON S3C_TIMERREG(0x08)
23
24#define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
25#define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
26#define S3C2410_TCFG_PRESCALER1_SHIFT (8)
27#define S3C2410_TCFG_DEADZONE_MASK (255<<16)
28#define S3C2410_TCFG_DEADZONE_SHIFT (16)
29
30#define S3C2410_TCFG1_MUX4_DIV2 (0<<16)
31#define S3C2410_TCFG1_MUX4_DIV4 (1<<16)
32#define S3C2410_TCFG1_MUX4_DIV8 (2<<16)
33#define S3C2410_TCFG1_MUX4_DIV16 (3<<16)
34#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16)
35#define S3C2410_TCFG1_MUX4_MASK (15<<16)
36#define S3C2410_TCFG1_MUX4_SHIFT (16)
37
38#define S3C2410_TCFG1_MUX3_DIV2 (0<<12)
39#define S3C2410_TCFG1_MUX3_DIV4 (1<<12)
40#define S3C2410_TCFG1_MUX3_DIV8 (2<<12)
41#define S3C2410_TCFG1_MUX3_DIV16 (3<<12)
42#define S3C2410_TCFG1_MUX3_TCLK1 (4<<12)
43#define S3C2410_TCFG1_MUX3_MASK (15<<12)
44
45
46#define S3C2410_TCFG1_MUX2_DIV2 (0<<8)
47#define S3C2410_TCFG1_MUX2_DIV4 (1<<8)
48#define S3C2410_TCFG1_MUX2_DIV8 (2<<8)
49#define S3C2410_TCFG1_MUX2_DIV16 (3<<8)
50#define S3C2410_TCFG1_MUX2_TCLK1 (4<<8)
51#define S3C2410_TCFG1_MUX2_MASK (15<<8)
52
53
54#define S3C2410_TCFG1_MUX1_DIV2 (0<<4)
55#define S3C2410_TCFG1_MUX1_DIV4 (1<<4)
56#define S3C2410_TCFG1_MUX1_DIV8 (2<<4)
57#define S3C2410_TCFG1_MUX1_DIV16 (3<<4)
58#define S3C2410_TCFG1_MUX1_TCLK0 (4<<4)
59#define S3C2410_TCFG1_MUX1_MASK (15<<4)
60
61#define S3C2410_TCFG1_MUX0_DIV2 (0<<0)
62#define S3C2410_TCFG1_MUX0_DIV4 (1<<0)
63#define S3C2410_TCFG1_MUX0_DIV8 (2<<0)
64#define S3C2410_TCFG1_MUX0_DIV16 (3<<0)
65#define S3C2410_TCFG1_MUX0_TCLK0 (4<<0)
66#define S3C2410_TCFG1_MUX0_MASK (15<<0)
67
68#define S3C2410_TCFG1_MUX_DIV2 (0<<0)
69#define S3C2410_TCFG1_MUX_DIV4 (1<<0)
70#define S3C2410_TCFG1_MUX_DIV8 (2<<0)
71#define S3C2410_TCFG1_MUX_DIV16 (3<<0)
72#define S3C2410_TCFG1_MUX_TCLK (4<<0)
73#define S3C2410_TCFG1_MUX_MASK (15<<0)
74
75#define S3C2410_TCFG1_SHIFT(x) ((x) * 4)
76
77/* for each timer, we have an count buffer, an compare buffer and
78 * an observation buffer
79*/
80
81/* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */
82
83#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00)
84#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04)
85#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
86
87#define S3C2410_TCON_T4RELOAD (1<<22)
88#define S3C2410_TCON_T4MANUALUPD (1<<21)
89#define S3C2410_TCON_T4START (1<<20)
90
91#define S3C2410_TCON_T3RELOAD (1<<19)
92#define S3C2410_TCON_T3INVERT (1<<18)
93#define S3C2410_TCON_T3MANUALUPD (1<<17)
94#define S3C2410_TCON_T3START (1<<16)
95
96#define S3C2410_TCON_T2RELOAD (1<<15)
97#define S3C2410_TCON_T2INVERT (1<<14)
98#define S3C2410_TCON_T2MANUALUPD (1<<13)
99#define S3C2410_TCON_T2START (1<<12)
100
101#define S3C2410_TCON_T1RELOAD (1<<11)
102#define S3C2410_TCON_T1INVERT (1<<10)
103#define S3C2410_TCON_T1MANUALUPD (1<<9)
104#define S3C2410_TCON_T1START (1<<8)
105
106#define S3C2410_TCON_T0DEADZONE (1<<4)
107#define S3C2410_TCON_T0RELOAD (1<<3)
108#define S3C2410_TCON_T0INVERT (1<<2)
109#define S3C2410_TCON_T0MANUALUPD (1<<1)
110#define S3C2410_TCON_T0START (1<<0)
111
112#endif /* __ASM_ARCH_REGS_TIMER_H */
113
114
115
diff --git a/include/asm-arm/plat-s3c/uncompress.h b/include/asm-arm/plat-s3c/uncompress.h
deleted file mode 100644
index 19b9eda39485..000000000000
--- a/include/asm-arm/plat-s3c/uncompress.h
+++ /dev/null
@@ -1,155 +0,0 @@
1/* linux/include/asm-arm/plat-s3c/uncompress.h
2 *
3 * Copyright 2003, 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C - uncompress code
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#ifndef __ASM_PLAT_UNCOMPRESS_H
15#define __ASM_PLAT_UNCOMPRESS_H
16
17typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
18
19/* uart setup */
20
21static unsigned int fifo_mask;
22static unsigned int fifo_max;
23
24/* forward declerations */
25
26static void arch_detect_cpu(void);
27
28/* defines for UART registers */
29
30#include <asm/plat-s3c/regs-serial.h>
31#include <asm/plat-s3c/regs-watchdog.h>
32
33/* working in physical space... */
34#undef S3C2410_WDOGREG
35#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
36
37/* how many bytes we allow into the FIFO at a time in FIFO mode */
38#define FIFO_MAX (14)
39
40#define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C_LOWLEVEL_UART_PORT)
41
42static __inline__ void
43uart_wr(unsigned int reg, unsigned int val)
44{
45 volatile unsigned int *ptr;
46
47 ptr = (volatile unsigned int *)(reg + uart_base);
48 *ptr = val;
49}
50
51static __inline__ unsigned int
52uart_rd(unsigned int reg)
53{
54 volatile unsigned int *ptr;
55
56 ptr = (volatile unsigned int *)(reg + uart_base);
57 return *ptr;
58}
59
60/* we can deal with the case the UARTs are being run
61 * in FIFO mode, so that we don't hold up our execution
62 * waiting for tx to happen...
63*/
64
65static void putc(int ch)
66{
67 if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
68 int level;
69
70 while (1) {
71 level = uart_rd(S3C2410_UFSTAT);
72 level &= fifo_mask;
73
74 if (level < fifo_max)
75 break;
76 }
77
78 } else {
79 /* not using fifos */
80
81 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
82 barrier();
83 }
84
85 /* write byte to transmission register */
86 uart_wr(S3C2410_UTXH, ch);
87}
88
89static inline void flush(void)
90{
91}
92
93#define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)
94
95/* CONFIG_S3C_BOOT_WATCHDOG
96 *
97 * Simple boot-time watchdog setup, to reboot the system if there is
98 * any problem with the boot process
99*/
100
101#ifdef CONFIG_S3C_BOOT_WATCHDOG
102
103#define WDOG_COUNT (0xff00)
104
105static inline void arch_decomp_wdog(void)
106{
107 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
108}
109
110static void arch_decomp_wdog_start(void)
111{
112 __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
113 __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
114 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
115}
116
117#else
118#define arch_decomp_wdog_start()
119#define arch_decomp_wdog()
120#endif
121
122#ifdef CONFIG_S3C_BOOT_ERROR_RESET
123
124static void arch_decomp_error(const char *x)
125{
126 putstr("\n\n");
127 putstr(x);
128 putstr("\n\n -- System resetting\n");
129
130 __raw_writel(0x4000, S3C2410_WTDAT);
131 __raw_writel(0x4000, S3C2410_WTCNT);
132 __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
133
134 while(1);
135}
136
137#define arch_error arch_decomp_error
138#endif
139
140static void error(char *err);
141
142static void
143arch_decomp_setup(void)
144{
145 /* we may need to setup the uart(s) here if we are not running
146 * on an BAST... the BAST will have left the uarts configured
147 * after calling linux.
148 */
149
150 arch_detect_cpu();
151 arch_decomp_wdog_start();
152}
153
154
155#endif /* __ASM_PLAT_UNCOMPRESS_H */
diff --git a/include/asm-arm/plat-s3c24xx/clock.h b/include/asm-arm/plat-s3c24xx/clock.h
deleted file mode 100644
index 235b753cd877..000000000000
--- a/include/asm-arm/plat-s3c24xx/clock.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/clock.h
2 * linux/arch/arm/mach-s3c2410/clock.h
3 *
4 * Copyright (c) 2004-2005 Simtec Electronics
5 * http://www.simtec.co.uk/products/SWLINUX/
6 * Written by Ben Dooks, <ben@simtec.co.uk>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13struct clk {
14 struct list_head list;
15 struct module *owner;
16 struct clk *parent;
17 const char *name;
18 int id;
19 int usage;
20 unsigned long rate;
21 unsigned long ctrlbit;
22
23 int (*enable)(struct clk *, int enable);
24 int (*set_rate)(struct clk *c, unsigned long rate);
25 unsigned long (*get_rate)(struct clk *c);
26 unsigned long (*round_rate)(struct clk *c, unsigned long rate);
27 int (*set_parent)(struct clk *c, struct clk *parent);
28};
29
30/* other clocks which may be registered by board support */
31
32extern struct clk s3c24xx_dclk0;
33extern struct clk s3c24xx_dclk1;
34extern struct clk s3c24xx_clkout0;
35extern struct clk s3c24xx_clkout1;
36extern struct clk s3c24xx_uclk;
37
38extern struct clk clk_usb_bus;
39
40/* core clock support */
41
42extern struct clk clk_f;
43extern struct clk clk_h;
44extern struct clk clk_p;
45extern struct clk clk_mpll;
46extern struct clk clk_upll;
47extern struct clk clk_xtal;
48
49/* exports for arch/arm/mach-s3c2410
50 *
51 * Please DO NOT use these outside of arch/arm/mach-s3c2410
52*/
53
54extern struct mutex clocks_mutex;
55
56extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
57
58extern int s3c24xx_register_clock(struct clk *clk);
59extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
60
61extern int s3c24xx_setup_clocks(unsigned long xtal,
62 unsigned long fclk,
63 unsigned long hclk,
64 unsigned long pclk);
diff --git a/include/asm-arm/plat-s3c24xx/common-smdk.h b/include/asm-arm/plat-s3c24xx/common-smdk.h
deleted file mode 100644
index 58d9094c935c..000000000000
--- a/include/asm-arm/plat-s3c24xx/common-smdk.h
+++ /dev/null
@@ -1,15 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/common-smdk.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Common code for SMDK2410 and SMDK2440 boards
7 *
8 * http://www.fluff.org/ben/smdk2440/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15extern void smdk_machine_init(void);
diff --git a/include/asm-arm/plat-s3c24xx/cpu.h b/include/asm-arm/plat-s3c24xx/cpu.h
deleted file mode 100644
index 23e420e8bd5b..000000000000
--- a/include/asm-arm/plat-s3c24xx/cpu.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/cpu.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C24XX CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* todo - fix when rmk changes iodescs to use `void __iomem *` */
14
15#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
16
17#ifndef MHZ
18#define MHZ (1000*1000)
19#endif
20
21#define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000)
22
23/* forward declaration */
24struct s3c24xx_uart_resources;
25struct platform_device;
26struct s3c2410_uartcfg;
27struct map_desc;
28
29/* core initialisation functions */
30
31extern void s3c24xx_init_irq(void);
32
33extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
34
35extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
36
37extern void s3c24xx_init_clocks(int xtal);
38
39extern void s3c24xx_init_uartdevs(char *name,
40 struct s3c24xx_uart_resources *res,
41 struct s3c2410_uartcfg *cfg, int no);
42
43/* timer for 2410/2440 */
44
45struct sys_timer;
46extern struct sys_timer s3c24xx_timer;
47
48/* system device classes */
49
50extern struct sysdev_class s3c2410_sysclass;
51extern struct sysdev_class s3c2412_sysclass;
52extern struct sysdev_class s3c2440_sysclass;
53extern struct sysdev_class s3c2442_sysclass;
54extern struct sysdev_class s3c2443_sysclass;
diff --git a/include/asm-arm/plat-s3c24xx/devs.h b/include/asm-arm/plat-s3c24xx/devs.h
deleted file mode 100644
index badaac9d64a8..000000000000
--- a/include/asm-arm/plat-s3c24xx/devs.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/devs.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2410 standard platform devices
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12#include <linux/platform_device.h>
13
14struct s3c24xx_uart_resources {
15 struct resource *resources;
16 unsigned long nr_resources;
17};
18
19extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
20
21extern struct platform_device *s3c24xx_uart_devs[];
22extern struct platform_device *s3c24xx_uart_src[];
23
24extern struct platform_device s3c_device_timer[];
25
26extern struct platform_device s3c_device_usb;
27extern struct platform_device s3c_device_lcd;
28extern struct platform_device s3c_device_wdt;
29extern struct platform_device s3c_device_i2c;
30extern struct platform_device s3c_device_iis;
31extern struct platform_device s3c_device_rtc;
32extern struct platform_device s3c_device_adc;
33extern struct platform_device s3c_device_sdi;
34extern struct platform_device s3c_device_hsmmc;
35
36extern struct platform_device s3c_device_spi0;
37extern struct platform_device s3c_device_spi1;
38
39extern struct platform_device s3c_device_nand;
40
41extern struct platform_device s3c_device_usbgadget;
42
43/* s3c2440 specific devices */
44
45#ifdef CONFIG_CPU_S3C2440
46
47extern struct platform_device s3c_device_camif;
48
49#endif
diff --git a/include/asm-arm/plat-s3c24xx/dma.h b/include/asm-arm/plat-s3c24xx/dma.h
deleted file mode 100644
index c78efe316fc8..000000000000
--- a/include/asm-arm/plat-s3c24xx/dma.h
+++ /dev/null
@@ -1,82 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/dma.h
2 *
3 * Copyright (C) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C24XX DMA support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13extern struct sysdev_class dma_sysclass;
14extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
15
16#define DMA_CH_VALID (1<<31)
17#define DMA_CH_NEVER (1<<30)
18
19struct s3c24xx_dma_addr {
20 unsigned long from;
21 unsigned long to;
22};
23
24/* struct s3c24xx_dma_map
25 *
26 * this holds the mapping information for the channel selected
27 * to be connected to the specified device
28*/
29
30struct s3c24xx_dma_map {
31 const char *name;
32 struct s3c24xx_dma_addr hw_addr;
33
34 unsigned long channels[S3C2410_DMA_CHANNELS];
35 unsigned long channels_rx[S3C2410_DMA_CHANNELS];
36};
37
38struct s3c24xx_dma_selection {
39 struct s3c24xx_dma_map *map;
40 unsigned long map_size;
41 unsigned long dcon_mask;
42
43 void (*select)(struct s3c2410_dma_chan *chan,
44 struct s3c24xx_dma_map *map);
45
46 void (*direction)(struct s3c2410_dma_chan *chan,
47 struct s3c24xx_dma_map *map,
48 enum s3c2410_dmasrc dir);
49};
50
51extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
52
53/* struct s3c24xx_dma_order_ch
54 *
55 * channel map for one of the `enum dma_ch` dma channels. the list
56 * entry contains a set of low-level channel numbers, orred with
57 * DMA_CH_VALID, which are checked in the order in the array.
58*/
59
60struct s3c24xx_dma_order_ch {
61 unsigned int list[S3C2410_DMA_CHANNELS]; /* list of channels */
62 unsigned int flags; /* flags */
63};
64
65/* struct s3c24xx_dma_order
66 *
67 * information provided by either the core or the board to give the
68 * dma system a hint on how to allocate channels
69*/
70
71struct s3c24xx_dma_order {
72 struct s3c24xx_dma_order_ch channels[DMACH_MAX];
73};
74
75extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
76
77/* DMA init code, called from the cpu support code */
78
79extern int s3c2410_dma_init(void);
80
81extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
82 unsigned int stride);
diff --git a/include/asm-arm/plat-s3c24xx/irq.h b/include/asm-arm/plat-s3c24xx/irq.h
deleted file mode 100644
index 45746a995343..000000000000
--- a/include/asm-arm/plat-s3c24xx/irq.h
+++ /dev/null
@@ -1,109 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/irq.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C24XX CPU IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#define irqdbf(x...)
14#define irqdbf2(x...)
15
16#define EXTINT_OFF (IRQ_EINT4 - 4)
17
18/* these are exported for arch/arm/mach-* usage */
19extern struct irq_chip s3c_irq_level_chip;
20extern struct irq_chip s3c_irq_chip;
21
22static inline void
23s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
24 int subcheck)
25{
26 unsigned long mask;
27 unsigned long submask;
28
29 submask = __raw_readl(S3C2410_INTSUBMSK);
30 mask = __raw_readl(S3C2410_INTMSK);
31
32 submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
33
34 /* check to see if we need to mask the parent IRQ */
35
36 if ((submask & subcheck) == subcheck) {
37 __raw_writel(mask | parentbit, S3C2410_INTMSK);
38 }
39
40 /* write back masks */
41 __raw_writel(submask, S3C2410_INTSUBMSK);
42
43}
44
45static inline void
46s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
47{
48 unsigned long mask;
49 unsigned long submask;
50
51 submask = __raw_readl(S3C2410_INTSUBMSK);
52 mask = __raw_readl(S3C2410_INTMSK);
53
54 submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
55 mask &= ~parentbit;
56
57 /* write back masks */
58 __raw_writel(submask, S3C2410_INTSUBMSK);
59 __raw_writel(mask, S3C2410_INTMSK);
60}
61
62
63static inline void
64s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
65{
66 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
67
68 s3c_irqsub_mask(irqno, parentmask, group);
69
70 __raw_writel(bit, S3C2410_SUBSRCPND);
71
72 /* only ack parent if we've got all the irqs (seems we must
73 * ack, all and hope that the irq system retriggers ok when
74 * the interrupt goes off again)
75 */
76
77 if (1) {
78 __raw_writel(parentmask, S3C2410_SRCPND);
79 __raw_writel(parentmask, S3C2410_INTPND);
80 }
81}
82
83static inline void
84s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
85{
86 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
87
88 __raw_writel(bit, S3C2410_SUBSRCPND);
89
90 /* only ack parent if we've got all the irqs (seems we must
91 * ack, all and hope that the irq system retriggers ok when
92 * the interrupt goes off again)
93 */
94
95 if (1) {
96 __raw_writel(parentmask, S3C2410_SRCPND);
97 __raw_writel(parentmask, S3C2410_INTPND);
98 }
99}
100
101/* exported for use in arch/arm/mach-s3c2410 */
102
103#ifdef CONFIG_PM
104extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
105#else
106#define s3c_irq_wake NULL
107#endif
108
109extern int s3c_irqext_type(unsigned int irq, unsigned int type);
diff --git a/include/asm-arm/plat-s3c24xx/pm.h b/include/asm-arm/plat-s3c24xx/pm.h
deleted file mode 100644
index cc623667e48a..000000000000
--- a/include/asm-arm/plat-s3c24xx/pm.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/pm.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Written by Ben Dooks, <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11/* s3c2410_pm_init
12 *
13 * called from board at initialisation time to setup the power
14 * management
15*/
16
17#ifdef CONFIG_PM
18
19extern __init int s3c2410_pm_init(void);
20
21#else
22
23static inline int s3c2410_pm_init(void)
24{
25 return 0;
26}
27#endif
28
29/* configuration for the IRQ mask over sleep */
30extern unsigned long s3c_irqwake_intmask;
31extern unsigned long s3c_irqwake_eintmask;
32
33/* IRQ masks for IRQs allowed to go to sleep (see irq.c) */
34extern unsigned long s3c_irqwake_intallow;
35extern unsigned long s3c_irqwake_eintallow;
36
37/* per-cpu sleep functions */
38
39extern void (*pm_cpu_prep)(void);
40extern void (*pm_cpu_sleep)(void);
41
42/* Flags for PM Control */
43
44extern unsigned long s3c_pm_flags;
45
46/* from sleep.S */
47
48extern int s3c2410_cpu_save(unsigned long *saveblk);
49extern void s3c2410_cpu_suspend(void);
50extern void s3c2410_cpu_resume(void);
51
52extern unsigned long s3c2410_sleep_save_phys;
53
54/* sleep save info */
55
56struct sleep_save {
57 void __iomem *reg;
58 unsigned long val;
59};
60
61#define SAVE_ITEM(x) \
62 { .reg = (x) }
63
64extern void s3c2410_pm_do_save(struct sleep_save *ptr, int count);
65extern void s3c2410_pm_do_restore(struct sleep_save *ptr, int count);
66
67#ifdef CONFIG_PM
68extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state);
69extern int s3c24xx_irq_resume(struct sys_device *dev);
70#else
71#define s3c24xx_irq_suspend NULL
72#define s3c24xx_irq_resume NULL
73#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2400.h b/include/asm-arm/plat-s3c24xx/s3c2400.h
deleted file mode 100644
index 3a5a16821af8..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2400.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2400.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C2400 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 09-Fev-2006 LCVR First version, based on s3c2410.h
14*/
15
16#ifdef CONFIG_CPU_S3C2400
17
18extern int s3c2400_init(void);
19
20extern void s3c2400_map_io(struct map_desc *mach_desc, int size);
21
22extern void s3c2400_init_uarts(struct s3c2410_uartcfg *cfg, int no);
23
24extern void s3c2400_init_clocks(int xtal);
25
26#else
27#define s3c2400_init_clocks NULL
28#define s3c2400_init_uarts NULL
29#define s3c2400_map_io NULL
30#define s3c2400_init NULL
31#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2410.h b/include/asm-arm/plat-s3c24xx/s3c2410.h
deleted file mode 100644
index 3cd1ec677b3f..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2410.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2410.h
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2410 machine directory
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#ifdef CONFIG_CPU_S3C2410
15
16extern int s3c2410_init(void);
17
18extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
19
20extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
21
22extern void s3c2410_init_clocks(int xtal);
23
24#else
25#define s3c2410_init_clocks NULL
26#define s3c2410_init_uarts NULL
27#define s3c2410_map_io NULL
28#define s3c2410_init NULL
29#endif
30
31extern int s3c2410_baseclk_add(void);
diff --git a/include/asm-arm/plat-s3c24xx/s3c2412.h b/include/asm-arm/plat-s3c24xx/s3c2412.h
deleted file mode 100644
index 3ec97685e781..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2412.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2412.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2412 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2412
14
15extern int s3c2412_init(void);
16
17extern void s3c2412_map_io(struct map_desc *mach_desc, int size);
18
19extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
20
21extern void s3c2412_init_clocks(int xtal);
22
23extern int s3c2412_baseclk_add(void);
24#else
25#define s3c2412_init_clocks NULL
26#define s3c2412_init_uarts NULL
27#define s3c2412_map_io NULL
28#define s3c2412_init NULL
29#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2440.h b/include/asm-arm/plat-s3c24xx/s3c2440.h
deleted file mode 100644
index 107853bf9481..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2440.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2440.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2440
14extern int s3c2440_init(void);
15#else
16#define s3c2440_init NULL
17#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2442.h b/include/asm-arm/plat-s3c24xx/s3c2442.h
deleted file mode 100644
index 451a23a2092a..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2442.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2442.h
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2442 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2442
14extern int s3c2442_init(void);
15#else
16#define s3c2442_init NULL
17#endif
diff --git a/include/asm-arm/plat-s3c24xx/s3c2443.h b/include/asm-arm/plat-s3c24xx/s3c2443.h
deleted file mode 100644
index 11d83b5c84e6..000000000000
--- a/include/asm-arm/plat-s3c24xx/s3c2443.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/s3c2443.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for s3c2443 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifdef CONFIG_CPU_S3C2443
14
15struct s3c2410_uartcfg;
16
17extern int s3c2443_init(void);
18
19extern void s3c2443_map_io(struct map_desc *mach_desc, int size);
20
21extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
22
23extern void s3c2443_init_clocks(int xtal);
24
25extern int s3c2443_baseclk_add(void);
26
27#else
28#define s3c2443_init_clocks NULL
29#define s3c2443_init_uarts NULL
30#define s3c2443_map_io NULL
31#define s3c2443_init NULL
32#endif
diff --git a/include/asm-cris/elf.h b/include/asm-cris/elf.h
index 001f64ad11e8..f0d17fbc81ba 100644
--- a/include/asm-cris/elf.h
+++ b/include/asm-cris/elf.h
@@ -88,6 +88,6 @@ typedef unsigned long elf_fpregset_t;
88 88
89#define ELF_PLATFORM (NULL) 89#define ELF_PLATFORM (NULL)
90 90
91#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) 91#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
92 92
93#endif 93#endif
diff --git a/include/asm-cris/thread_info.h b/include/asm-cris/thread_info.h
index 7efe1000f99d..cee97f14af3b 100644
--- a/include/asm-cris/thread_info.h
+++ b/include/asm-cris/thread_info.h
@@ -88,6 +88,7 @@ struct thread_info {
88#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */ 88#define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
89#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 89#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
90#define TIF_MEMDIE 17 90#define TIF_MEMDIE 17
91#define TIF_FREEZE 18 /* is freezing for suspend */
91 92
92#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 93#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
93#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 94#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
@@ -95,6 +96,7 @@ struct thread_info {
95#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 96#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
96#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 97#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
97#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 98#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
99#define _TIF_FREEZE (1<<TIF_FREEZE)
98 100
99#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 101#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
100#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */ 102#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
diff --git a/include/asm-frv/elf.h b/include/asm-frv/elf.h
index 9fb946bb7dc9..7279ec07d62e 100644
--- a/include/asm-frv/elf.h
+++ b/include/asm-frv/elf.h
@@ -137,6 +137,6 @@ do { \
137 137
138#define ELF_PLATFORM (NULL) 138#define ELF_PLATFORM (NULL)
139 139
140#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) 140#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
141 141
142#endif 142#endif
diff --git a/include/asm-frv/ide.h b/include/asm-frv/ide.h
index 7ebcc56a2229..361076611855 100644
--- a/include/asm-frv/ide.h
+++ b/include/asm-frv/ide.h
@@ -18,15 +18,7 @@
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/irq.h> 19#include <asm/irq.h>
20 20
21/****************************************************************************/ 21#include <asm-generic/ide_iops.h>
22/*
23 * some bits needed for parts of the IDE subsystem to compile
24 */
25#define __ide_mm_insw(port, addr, n) insw((unsigned long) (port), addr, n)
26#define __ide_mm_insl(port, addr, n) insl((unsigned long) (port), addr, n)
27#define __ide_mm_outsw(port, addr, n) outsw((unsigned long) (port), addr, n)
28#define __ide_mm_outsl(port, addr, n) outsl((unsigned long) (port), addr, n)
29
30 22
31#endif /* __KERNEL__ */ 23#endif /* __KERNEL__ */
32#endif /* _ASM_IDE_H */ 24#endif /* _ASM_IDE_H */
diff --git a/include/asm-frv/unaligned.h b/include/asm-frv/unaligned.h
index 839a2fbffa0f..6c61c05b2e0c 100644
--- a/include/asm-frv/unaligned.h
+++ b/include/asm-frv/unaligned.h
@@ -13,7 +13,7 @@
13#define _ASM_UNALIGNED_H 13#define _ASM_UNALIGNED_H
14 14
15#include <linux/unaligned/le_byteshift.h> 15#include <linux/unaligned/le_byteshift.h>
16#include <linux/unaligned/be_byteshift.h> 16#include <linux/unaligned/be_struct.h>
17#include <linux/unaligned/generic.h> 17#include <linux/unaligned/generic.h>
18 18
19#define get_unaligned __get_unaligned_be 19#define get_unaligned __get_unaligned_be
diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h
index edc6ba82e090..12c07c1866b2 100644
--- a/include/asm-generic/bug.h
+++ b/include/asm-generic/bug.h
@@ -22,7 +22,7 @@ struct bug_entry {
22 22
23#ifndef HAVE_ARCH_BUG 23#ifndef HAVE_ARCH_BUG
24#define BUG() do { \ 24#define BUG() do { \
25 printk("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \ 25 printk("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
26 panic("BUG!"); \ 26 panic("BUG!"); \
27} while (0) 27} while (0)
28#endif 28#endif
@@ -41,7 +41,7 @@ extern void warn_slowpath(const char *file, const int line,
41#define __WARN() warn_on_slowpath(__FILE__, __LINE__) 41#define __WARN() warn_on_slowpath(__FILE__, __LINE__)
42#define __WARN_printf(arg...) warn_slowpath(__FILE__, __LINE__, arg) 42#define __WARN_printf(arg...) warn_slowpath(__FILE__, __LINE__, arg)
43#else 43#else
44#define __WARN_printf(arg...) __WARN() 44#define __WARN_printf(arg...) do { printk(arg); __WARN(); } while (0)
45#endif 45#endif
46 46
47#ifndef WARN_ON 47#ifndef WARN_ON
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 0f99ad38b012..81797ec9ab29 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -35,11 +35,17 @@ struct module;
35 * @label: for diagnostics 35 * @label: for diagnostics
36 * @dev: optional device providing the GPIOs 36 * @dev: optional device providing the GPIOs
37 * @owner: helps prevent removal of modules exporting active GPIOs 37 * @owner: helps prevent removal of modules exporting active GPIOs
38 * @request: optional hook for chip-specific activation, such as
39 * enabling module power and clock; may sleep
40 * @free: optional hook for chip-specific deactivation, such as
41 * disabling module power and clock; may sleep
38 * @direction_input: configures signal "offset" as input, or returns error 42 * @direction_input: configures signal "offset" as input, or returns error
39 * @get: returns value for signal "offset"; for output signals this 43 * @get: returns value for signal "offset"; for output signals this
40 * returns either the value actually sensed, or zero 44 * returns either the value actually sensed, or zero
41 * @direction_output: configures signal "offset" as output, or returns error 45 * @direction_output: configures signal "offset" as output, or returns error
42 * @set: assigns output value for signal "offset" 46 * @set: assigns output value for signal "offset"
47 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
48 * implementation may not sleep
43 * @dbg_show: optional routine to show contents in debugfs; default code 49 * @dbg_show: optional routine to show contents in debugfs; default code
44 * will be used when this is omitted, but custom code can show extra 50 * will be used when this is omitted, but custom code can show extra
45 * state (such as pullup/pulldown configuration). 51 * state (such as pullup/pulldown configuration).
@@ -61,10 +67,15 @@ struct module;
61 * is calculated by subtracting @base from the gpio number. 67 * is calculated by subtracting @base from the gpio number.
62 */ 68 */
63struct gpio_chip { 69struct gpio_chip {
64 char *label; 70 const char *label;
65 struct device *dev; 71 struct device *dev;
66 struct module *owner; 72 struct module *owner;
67 73
74 int (*request)(struct gpio_chip *chip,
75 unsigned offset);
76 void (*free)(struct gpio_chip *chip,
77 unsigned offset);
78
68 int (*direction_input)(struct gpio_chip *chip, 79 int (*direction_input)(struct gpio_chip *chip,
69 unsigned offset); 80 unsigned offset);
70 int (*get)(struct gpio_chip *chip, 81 int (*get)(struct gpio_chip *chip,
@@ -73,6 +84,10 @@ struct gpio_chip {
73 unsigned offset, int value); 84 unsigned offset, int value);
74 void (*set)(struct gpio_chip *chip, 85 void (*set)(struct gpio_chip *chip,
75 unsigned offset, int value); 86 unsigned offset, int value);
87
88 int (*to_irq)(struct gpio_chip *chip,
89 unsigned offset);
90
76 void (*dbg_show)(struct seq_file *s, 91 void (*dbg_show)(struct seq_file *s,
77 struct gpio_chip *chip); 92 struct gpio_chip *chip);
78 int base; 93 int base;
@@ -112,6 +127,7 @@ extern void __gpio_set_value(unsigned gpio, int value);
112 127
113extern int __gpio_cansleep(unsigned gpio); 128extern int __gpio_cansleep(unsigned gpio);
114 129
130extern int __gpio_to_irq(unsigned gpio);
115 131
116#ifdef CONFIG_GPIO_SYSFS 132#ifdef CONFIG_GPIO_SYSFS
117 133
diff --git a/include/asm-generic/rtc.h b/include/asm-generic/rtc.h
index 71ef3f0b9685..89061c1a67d4 100644
--- a/include/asm-generic/rtc.h
+++ b/include/asm-generic/rtc.h
@@ -84,12 +84,12 @@ static inline unsigned int get_rtc_time(struct rtc_time *time)
84 84
85 if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) 85 if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
86 { 86 {
87 BCD_TO_BIN(time->tm_sec); 87 time->tm_sec = bcd2bin(time->tm_sec);
88 BCD_TO_BIN(time->tm_min); 88 time->tm_min = bcd2bin(time->tm_min);
89 BCD_TO_BIN(time->tm_hour); 89 time->tm_hour = bcd2bin(time->tm_hour);
90 BCD_TO_BIN(time->tm_mday); 90 time->tm_mday = bcd2bin(time->tm_mday);
91 BCD_TO_BIN(time->tm_mon); 91 time->tm_mon = bcd2bin(time->tm_mon);
92 BCD_TO_BIN(time->tm_year); 92 time->tm_year = bcd2bin(time->tm_year);
93 } 93 }
94 94
95#ifdef CONFIG_MACH_DECSTATION 95#ifdef CONFIG_MACH_DECSTATION
@@ -159,12 +159,12 @@ static inline int set_rtc_time(struct rtc_time *time)
159 159
160 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) 160 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY)
161 || RTC_ALWAYS_BCD) { 161 || RTC_ALWAYS_BCD) {
162 BIN_TO_BCD(sec); 162 sec = bin2bcd(sec);
163 BIN_TO_BCD(min); 163 min = bin2bcd(min);
164 BIN_TO_BCD(hrs); 164 hrs = bin2bcd(hrs);
165 BIN_TO_BCD(day); 165 day = bin2bcd(day);
166 BIN_TO_BCD(mon); 166 mon = bin2bcd(mon);
167 BIN_TO_BCD(yrs); 167 yrs = bin2bcd(yrs);
168 } 168 }
169 169
170 save_control = CMOS_READ(RTC_CONTROL); 170 save_control = CMOS_READ(RTC_CONTROL);
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 7440a0dceddb..80744606bad1 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -37,6 +37,13 @@
37#define MEM_DISCARD(sec) *(.mem##sec) 37#define MEM_DISCARD(sec) *(.mem##sec)
38#endif 38#endif
39 39
40#ifdef CONFIG_FTRACE_MCOUNT_RECORD
41#define MCOUNT_REC() VMLINUX_SYMBOL(__start_mcount_loc) = .; \
42 *(__mcount_loc) \
43 VMLINUX_SYMBOL(__stop_mcount_loc) = .;
44#else
45#define MCOUNT_REC()
46#endif
40 47
41/* .data section */ 48/* .data section */
42#define DATA_DATA \ 49#define DATA_DATA \
@@ -52,7 +59,10 @@
52 . = ALIGN(8); \ 59 . = ALIGN(8); \
53 VMLINUX_SYMBOL(__start___markers) = .; \ 60 VMLINUX_SYMBOL(__start___markers) = .; \
54 *(__markers) \ 61 *(__markers) \
55 VMLINUX_SYMBOL(__stop___markers) = .; 62 VMLINUX_SYMBOL(__stop___markers) = .; \
63 VMLINUX_SYMBOL(__start___tracepoints) = .; \
64 *(__tracepoints) \
65 VMLINUX_SYMBOL(__stop___tracepoints) = .;
56 66
57#define RO_DATA(align) \ 67#define RO_DATA(align) \
58 . = ALIGN((align)); \ 68 . = ALIGN((align)); \
@@ -61,6 +71,7 @@
61 *(.rodata) *(.rodata.*) \ 71 *(.rodata) *(.rodata.*) \
62 *(__vermagic) /* Kernel version magic */ \ 72 *(__vermagic) /* Kernel version magic */ \
63 *(__markers_strings) /* Markers: strings */ \ 73 *(__markers_strings) /* Markers: strings */ \
74 *(__tracepoints_strings)/* Tracepoints: strings */ \
64 } \ 75 } \
65 \ 76 \
66 .rodata1 : AT(ADDR(.rodata1) - LOAD_OFFSET) { \ 77 .rodata1 : AT(ADDR(.rodata1) - LOAD_OFFSET) { \
@@ -188,6 +199,7 @@
188 /* __*init sections */ \ 199 /* __*init sections */ \
189 __init_rodata : AT(ADDR(__init_rodata) - LOAD_OFFSET) { \ 200 __init_rodata : AT(ADDR(__init_rodata) - LOAD_OFFSET) { \
190 *(.ref.rodata) \ 201 *(.ref.rodata) \
202 MCOUNT_REC() \
191 DEV_KEEP(init.rodata) \ 203 DEV_KEEP(init.rodata) \
192 DEV_KEEP(exit.rodata) \ 204 DEV_KEEP(exit.rodata) \
193 CPU_KEEP(init.rodata) \ 205 CPU_KEEP(init.rodata) \
@@ -268,7 +280,15 @@
268 CPU_DISCARD(init.data) \ 280 CPU_DISCARD(init.data) \
269 CPU_DISCARD(init.rodata) \ 281 CPU_DISCARD(init.rodata) \
270 MEM_DISCARD(init.data) \ 282 MEM_DISCARD(init.data) \
271 MEM_DISCARD(init.rodata) 283 MEM_DISCARD(init.rodata) \
284 /* implement dynamic printk debug */ \
285 VMLINUX_SYMBOL(__start___verbose_strings) = .; \
286 *(__verbose_strings) \
287 VMLINUX_SYMBOL(__stop___verbose_strings) = .; \
288 . = ALIGN(8); \
289 VMLINUX_SYMBOL(__start___verbose) = .; \
290 *(__verbose) \
291 VMLINUX_SYMBOL(__stop___verbose) = .;
272 292
273#define INIT_TEXT \ 293#define INIT_TEXT \
274 *(.init.text) \ 294 *(.init.text) \
diff --git a/include/asm-h8300/timer.h b/include/asm-h8300/timer.h
new file mode 100644
index 000000000000..def80464d38f
--- /dev/null
+++ b/include/asm-h8300/timer.h
@@ -0,0 +1,25 @@
1#ifndef __H8300_TIMER_H
2#define __H8300_TIMER_H
3
4void h8300_timer_tick(void);
5void h8300_timer_setup(void);
6void h8300_gettod(unsigned int *year, unsigned int *mon, unsigned int *day,
7 unsigned int *hour, unsigned int *min, unsigned int *sec);
8
9#define TIMER_FREQ (CONFIG_CPU_CLOCK*10000) /* Timer input freq. */
10
11#define calc_param(cnt, div, rate, limit) \
12do { \
13 cnt = TIMER_FREQ / HZ; \
14 for (div = 0; div < ARRAY_SIZE(divide_rate); div++) { \
15 if (rate[div] == 0) \
16 continue; \
17 if ((cnt / rate[div]) > limit) \
18 break; \
19 } \
20 if (div == ARRAY_SIZE(divide_rate)) \
21 panic("Timer counter overflow"); \
22 cnt /= divide_rate[div]; \
23} while(0)
24
25#endif
diff --git a/include/asm-m32r/elf.h b/include/asm-m32r/elf.h
index 67bcd77494a5..0cc34c94bf2b 100644
--- a/include/asm-m32r/elf.h
+++ b/include/asm-m32r/elf.h
@@ -129,6 +129,6 @@ typedef elf_fpreg_t elf_fpregset_t;
129 intent than poking at uname or /proc/cpuinfo. */ 129 intent than poking at uname or /proc/cpuinfo. */
130#define ELF_PLATFORM (NULL) 130#define ELF_PLATFORM (NULL)
131 131
132#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) 132#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
133 133
134#endif /* _ASM_M32R__ELF_H */ 134#endif /* _ASM_M32R__ELF_H */
diff --git a/include/asm-m68k/elf.h b/include/asm-m68k/elf.h
index 14ea42152b97..0b0f49eb876b 100644
--- a/include/asm-m68k/elf.h
+++ b/include/asm-m68k/elf.h
@@ -114,6 +114,6 @@ typedef struct user_m68kfp_struct elf_fpregset_t;
114 114
115#define ELF_PLATFORM (NULL) 115#define ELF_PLATFORM (NULL)
116 116
117#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) 117#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
118 118
119#endif 119#endif
diff --git a/include/asm-m68k/ide.h b/include/asm-m68k/ide.h
index 1daf6cbdd9f0..b996a3c8cff5 100644
--- a/include/asm-m68k/ide.h
+++ b/include/asm-m68k/ide.h
@@ -92,15 +92,6 @@
92#define outsw_swapw(port, addr, n) raw_outsw_swapw((u16 *)port, addr, n) 92#define outsw_swapw(port, addr, n) raw_outsw_swapw((u16 *)port, addr, n)
93#endif 93#endif
94 94
95
96/* Q40 and Atari have byteswapped IDE busses and since many interesting
97 * values in the identification string are text, chars and words they
98 * happened to be almost correct without swapping.. However *_capacity
99 * is needed for drives over 8 GB. RZ */
100#if defined(CONFIG_Q40) || defined(CONFIG_ATARI)
101#define M68K_IDE_SWAPW (MACH_IS_Q40 || MACH_IS_ATARI)
102#endif
103
104#ifdef CONFIG_BLK_DEV_FALCON_IDE 95#ifdef CONFIG_BLK_DEV_FALCON_IDE
105#define IDE_ARCH_LOCK 96#define IDE_ARCH_LOCK
106 97
diff --git a/include/asm-m68k/thread_info.h b/include/asm-m68k/thread_info.h
index abc002798a2b..af0fda46e94b 100644
--- a/include/asm-m68k/thread_info.h
+++ b/include/asm-m68k/thread_info.h
@@ -52,5 +52,6 @@ struct thread_info {
52#define TIF_DELAYED_TRACE 14 /* single step a syscall */ 52#define TIF_DELAYED_TRACE 14 /* single step a syscall */
53#define TIF_SYSCALL_TRACE 15 /* syscall trace active */ 53#define TIF_SYSCALL_TRACE 15 /* syscall trace active */
54#define TIF_MEMDIE 16 54#define TIF_MEMDIE 16
55#define TIF_FREEZE 17 /* thread is freezing for suspend */
55 56
56#endif /* _ASM_M68K_THREAD_INFO_H */ 57#endif /* _ASM_M68K_THREAD_INFO_H */
diff --git a/include/asm-mips/cevt-r4k.h b/include/asm-mips/cevt-r4k.h
deleted file mode 100644
index fa4328f9124f..000000000000
--- a/include/asm-mips/cevt-r4k.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Kevin D. Kissell
7 */
8
9/*
10 * Definitions used for common event timer implementation
11 * for MIPS 4K-type processors and their MIPS MT variants.
12 * Avoids unsightly extern declarations in C files.
13 */
14#ifndef __ASM_CEVT_R4K_H
15#define __ASM_CEVT_R4K_H
16
17DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
18
19void mips_event_handler(struct clock_event_device *dev);
20int c0_compare_int_usable(void);
21void mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *);
22irqreturn_t c0_compare_interrupt(int, void *);
23
24extern struct irqaction c0_compare_irqaction;
25extern int cp0_timer_irq_installed;
26
27/*
28 * Possibly handle a performance counter interrupt.
29 * Return true if the timer interrupt should not be checked
30 */
31
32static inline int handle_perf_irq(int r2)
33{
34 /*
35 * The performance counter overflow interrupt may be shared with the
36 * timer interrupt (cp0_perfcount_irq < 0). If it is and a
37 * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
38 * and we can't reliably determine if a counter interrupt has also
39 * happened (!r2) then don't check for a timer interrupt.
40 */
41 return (cp0_perfcount_irq < 0) &&
42 perf_irq() == IRQ_HANDLED &&
43 !r2;
44}
45
46#endif /* __ASM_CEVT_R4K_H */
diff --git a/include/asm-mn10300/elf.h b/include/asm-mn10300/elf.h
index 256a70466ca4..bf09f8bb392e 100644
--- a/include/asm-mn10300/elf.h
+++ b/include/asm-mn10300/elf.h
@@ -141,7 +141,7 @@ do { \
141#define ELF_PLATFORM (NULL) 141#define ELF_PLATFORM (NULL)
142 142
143#ifdef __KERNEL__ 143#ifdef __KERNEL__
144#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) 144#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
145#endif 145#endif
146 146
147#endif /* _ASM_ELF_H */ 147#endif /* _ASM_ELF_H */
diff --git a/include/asm-parisc/Kbuild b/include/asm-parisc/Kbuild
deleted file mode 100644
index f88b252e419c..000000000000
--- a/include/asm-parisc/Kbuild
+++ /dev/null
@@ -1,3 +0,0 @@
1include include/asm-generic/Kbuild.asm
2
3unifdef-y += pdc.h
diff --git a/include/asm-parisc/agp.h b/include/asm-parisc/agp.h
deleted file mode 100644
index 9651660da639..000000000000
--- a/include/asm-parisc/agp.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef _ASM_PARISC_AGP_H
2#define _ASM_PARISC_AGP_H
3
4/*
5 * PARISC specific AGP definitions.
6 * Copyright (c) 2006 Kyle McMartin <kyle@parisc-linux.org>
7 *
8 */
9
10#define map_page_into_agp(page) /* nothing */
11#define unmap_page_from_agp(page) /* nothing */
12#define flush_agp_cache() mb()
13
14/* Convert a physical address to an address suitable for the GART. */
15#define phys_to_gart(x) (x)
16#define gart_to_phys(x) (x)
17
18/* GATT allocation. Returns/accepts GATT kernel virtual address. */
19#define alloc_gatt_pages(order) \
20 ((char *)__get_free_pages(GFP_KERNEL, (order)))
21#define free_gatt_pages(table, order) \
22 free_pages((unsigned long)(table), (order))
23
24#endif /* _ASM_PARISC_AGP_H */
diff --git a/include/asm-parisc/asmregs.h b/include/asm-parisc/asmregs.h
deleted file mode 100644
index d93c646e1887..000000000000
--- a/include/asm-parisc/asmregs.h
+++ /dev/null
@@ -1,183 +0,0 @@
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef _PARISC_ASMREGS_H
20#define _PARISC_ASMREGS_H
21
22;! General Registers
23
24rp: .reg %r2
25arg3: .reg %r23
26arg2: .reg %r24
27arg1: .reg %r25
28arg0: .reg %r26
29dp: .reg %r27
30ret0: .reg %r28
31ret1: .reg %r29
32sl: .reg %r29
33sp: .reg %r30
34
35#if 0
36/* PA20_REVISIT */
37arg7: .reg r19
38arg6: .reg r20
39arg5: .reg r21
40arg4: .reg r22
41gp: .reg r27
42ap: .reg r29
43#endif
44
45
46r0: .reg %r0
47r1: .reg %r1
48r2: .reg %r2
49r3: .reg %r3
50r4: .reg %r4
51r5: .reg %r5
52r6: .reg %r6
53r7: .reg %r7
54r8: .reg %r8
55r9: .reg %r9
56r10: .reg %r10
57r11: .reg %r11
58r12: .reg %r12
59r13: .reg %r13
60r14: .reg %r14
61r15: .reg %r15
62r16: .reg %r16
63r17: .reg %r17
64r18: .reg %r18
65r19: .reg %r19
66r20: .reg %r20
67r21: .reg %r21
68r22: .reg %r22
69r23: .reg %r23
70r24: .reg %r24
71r25: .reg %r25
72r26: .reg %r26
73r27: .reg %r27
74r28: .reg %r28
75r29: .reg %r29
76r30: .reg %r30
77r31: .reg %r31
78
79
80;! Space Registers
81
82sr0: .reg %sr0
83sr1: .reg %sr1
84sr2: .reg %sr2
85sr3: .reg %sr3
86sr4: .reg %sr4
87sr5: .reg %sr5
88sr6: .reg %sr6
89sr7: .reg %sr7
90
91
92;! Floating Point Registers
93
94fr0: .reg %fr0
95fr1: .reg %fr1
96fr2: .reg %fr2
97fr3: .reg %fr3
98fr4: .reg %fr4
99fr5: .reg %fr5
100fr6: .reg %fr6
101fr7: .reg %fr7
102fr8: .reg %fr8
103fr9: .reg %fr9
104fr10: .reg %fr10
105fr11: .reg %fr11
106fr12: .reg %fr12
107fr13: .reg %fr13
108fr14: .reg %fr14
109fr15: .reg %fr15
110fr16: .reg %fr16
111fr17: .reg %fr17
112fr18: .reg %fr18
113fr19: .reg %fr19
114fr20: .reg %fr20
115fr21: .reg %fr21
116fr22: .reg %fr22
117fr23: .reg %fr23
118fr24: .reg %fr24
119fr25: .reg %fr25
120fr26: .reg %fr26
121fr27: .reg %fr27
122fr28: .reg %fr28
123fr29: .reg %fr29
124fr30: .reg %fr30
125fr31: .reg %fr31
126
127
128;! Control Registers
129
130rctr: .reg %cr0
131pidr1: .reg %cr8
132pidr2: .reg %cr9
133ccr: .reg %cr10
134sar: .reg %cr11
135pidr3: .reg %cr12
136pidr4: .reg %cr13
137iva: .reg %cr14
138eiem: .reg %cr15
139itmr: .reg %cr16
140pcsq: .reg %cr17
141pcoq: .reg %cr18
142iir: .reg %cr19
143isr: .reg %cr20
144ior: .reg %cr21
145ipsw: .reg %cr22
146eirr: .reg %cr23
147tr0: .reg %cr24
148tr1: .reg %cr25
149tr2: .reg %cr26
150tr3: .reg %cr27
151tr4: .reg %cr28
152tr5: .reg %cr29
153tr6: .reg %cr30
154tr7: .reg %cr31
155
156
157cr0: .reg %cr0
158cr8: .reg %cr8
159cr9: .reg %cr9
160cr10: .reg %cr10
161cr11: .reg %cr11
162cr12: .reg %cr12
163cr13: .reg %cr13
164cr14: .reg %cr14
165cr15: .reg %cr15
166cr16: .reg %cr16
167cr17: .reg %cr17
168cr18: .reg %cr18
169cr19: .reg %cr19
170cr20: .reg %cr20
171cr21: .reg %cr21
172cr22: .reg %cr22
173cr23: .reg %cr23
174cr24: .reg %cr24
175cr25: .reg %cr25
176cr26: .reg %cr26
177cr27: .reg %cr27
178cr28: .reg %cr28
179cr29: .reg %cr29
180cr30: .reg %cr30
181cr31: .reg %cr31
182
183#endif
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
deleted file mode 100644
index ffb208840ecc..000000000000
--- a/include/asm-parisc/assembly.h
+++ /dev/null
@@ -1,519 +0,0 @@
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
4 * Copyright (C) 1999 SuSE GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef _PARISC_ASSEMBLY_H
22#define _PARISC_ASSEMBLY_H
23
24#define CALLEE_FLOAT_FRAME_SIZE 80
25
26#ifdef CONFIG_64BIT
27#define LDREG ldd
28#define STREG std
29#define LDREGX ldd,s
30#define LDREGM ldd,mb
31#define STREGM std,ma
32#define SHRREG shrd
33#define SHLREG shld
34#define ANDCM andcm,*
35#define COND(x) * ## x
36#define RP_OFFSET 16
37#define FRAME_SIZE 128
38#define CALLEE_REG_FRAME_SIZE 144
39#define ASM_ULONG_INSN .dword
40#else /* CONFIG_64BIT */
41#define LDREG ldw
42#define STREG stw
43#define LDREGX ldwx,s
44#define LDREGM ldwm
45#define STREGM stwm
46#define SHRREG shr
47#define SHLREG shlw
48#define ANDCM andcm
49#define COND(x) x
50#define RP_OFFSET 20
51#define FRAME_SIZE 64
52#define CALLEE_REG_FRAME_SIZE 128
53#define ASM_ULONG_INSN .word
54#endif
55
56#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
57
58#ifdef CONFIG_PA20
59#define LDCW ldcw,co
60#define BL b,l
61# ifdef CONFIG_64BIT
62# define LEVEL 2.0w
63# else
64# define LEVEL 2.0
65# endif
66#else
67#define LDCW ldcw
68#define BL bl
69#define LEVEL 1.1
70#endif
71
72#ifdef __ASSEMBLY__
73
74#ifdef CONFIG_64BIT
75/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
76 * work around that for now... */
77 .level 2.0w
78#endif
79
80#include <asm/asm-offsets.h>
81#include <asm/page.h>
82
83#include <asm/asmregs.h>
84
85 sp = 30
86 gp = 27
87 ipsw = 22
88
89 /*
90 * We provide two versions of each macro to convert from physical
91 * to virtual and vice versa. The "_r1" versions take one argument
92 * register, but trashes r1 to do the conversion. The other
93 * version takes two arguments: a src and destination register.
94 * However, the source and destination registers can not be
95 * the same register.
96 */
97
98 .macro tophys grvirt, grphys
99 ldil L%(__PAGE_OFFSET), \grphys
100 sub \grvirt, \grphys, \grphys
101 .endm
102
103 .macro tovirt grphys, grvirt
104 ldil L%(__PAGE_OFFSET), \grvirt
105 add \grphys, \grvirt, \grvirt
106 .endm
107
108 .macro tophys_r1 gr
109 ldil L%(__PAGE_OFFSET), %r1
110 sub \gr, %r1, \gr
111 .endm
112
113 .macro tovirt_r1 gr
114 ldil L%(__PAGE_OFFSET), %r1
115 add \gr, %r1, \gr
116 .endm
117
118 .macro delay value
119 ldil L%\value, 1
120 ldo R%\value(1), 1
121 addib,UV,n -1,1,.
122 addib,NUV,n -1,1,.+8
123 nop
124 .endm
125
126 .macro debug value
127 .endm
128
129
130 /* Shift Left - note the r and t can NOT be the same! */
131 .macro shl r, sa, t
132 dep,z \r, 31-\sa, 32-\sa, \t
133 .endm
134
135 /* The PA 2.0 shift left */
136 .macro shlw r, sa, t
137 depw,z \r, 31-\sa, 32-\sa, \t
138 .endm
139
140 /* And the PA 2.0W shift left */
141 .macro shld r, sa, t
142 depd,z \r, 63-\sa, 64-\sa, \t
143 .endm
144
145 /* Shift Right - note the r and t can NOT be the same! */
146 .macro shr r, sa, t
147 extru \r, 31-\sa, 32-\sa, \t
148 .endm
149
150 /* pa20w version of shift right */
151 .macro shrd r, sa, t
152 extrd,u \r, 63-\sa, 64-\sa, \t
153 .endm
154
155 /* load 32-bit 'value' into 'reg' compensating for the ldil
156 * sign-extension when running in wide mode.
157 * WARNING!! neither 'value' nor 'reg' can be expressions
158 * containing '.'!!!! */
159 .macro load32 value, reg
160 ldil L%\value, \reg
161 ldo R%\value(\reg), \reg
162 .endm
163
164 .macro loadgp
165#ifdef CONFIG_64BIT
166 ldil L%__gp, %r27
167 ldo R%__gp(%r27), %r27
168#else
169 ldil L%$global$, %r27
170 ldo R%$global$(%r27), %r27
171#endif
172 .endm
173
174#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
175#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
176#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
177#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
178
179 .macro save_general regs
180 STREG %r1, PT_GR1 (\regs)
181 STREG %r2, PT_GR2 (\regs)
182 STREG %r3, PT_GR3 (\regs)
183 STREG %r4, PT_GR4 (\regs)
184 STREG %r5, PT_GR5 (\regs)
185 STREG %r6, PT_GR6 (\regs)
186 STREG %r7, PT_GR7 (\regs)
187 STREG %r8, PT_GR8 (\regs)
188 STREG %r9, PT_GR9 (\regs)
189 STREG %r10, PT_GR10(\regs)
190 STREG %r11, PT_GR11(\regs)
191 STREG %r12, PT_GR12(\regs)
192 STREG %r13, PT_GR13(\regs)
193 STREG %r14, PT_GR14(\regs)
194 STREG %r15, PT_GR15(\regs)
195 STREG %r16, PT_GR16(\regs)
196 STREG %r17, PT_GR17(\regs)
197 STREG %r18, PT_GR18(\regs)
198 STREG %r19, PT_GR19(\regs)
199 STREG %r20, PT_GR20(\regs)
200 STREG %r21, PT_GR21(\regs)
201 STREG %r22, PT_GR22(\regs)
202 STREG %r23, PT_GR23(\regs)
203 STREG %r24, PT_GR24(\regs)
204 STREG %r25, PT_GR25(\regs)
205 /* r26 is saved in get_stack and used to preserve a value across virt_map */
206 STREG %r27, PT_GR27(\regs)
207 STREG %r28, PT_GR28(\regs)
208 /* r29 is saved in get_stack and used to point to saved registers */
209 /* r30 stack pointer saved in get_stack */
210 STREG %r31, PT_GR31(\regs)
211 .endm
212
213 .macro rest_general regs
214 /* r1 used as a temp in rest_stack and is restored there */
215 LDREG PT_GR2 (\regs), %r2
216 LDREG PT_GR3 (\regs), %r3
217 LDREG PT_GR4 (\regs), %r4
218 LDREG PT_GR5 (\regs), %r5
219 LDREG PT_GR6 (\regs), %r6
220 LDREG PT_GR7 (\regs), %r7
221 LDREG PT_GR8 (\regs), %r8
222 LDREG PT_GR9 (\regs), %r9
223 LDREG PT_GR10(\regs), %r10
224 LDREG PT_GR11(\regs), %r11
225 LDREG PT_GR12(\regs), %r12
226 LDREG PT_GR13(\regs), %r13
227 LDREG PT_GR14(\regs), %r14
228 LDREG PT_GR15(\regs), %r15
229 LDREG PT_GR16(\regs), %r16
230 LDREG PT_GR17(\regs), %r17
231 LDREG PT_GR18(\regs), %r18
232 LDREG PT_GR19(\regs), %r19
233 LDREG PT_GR20(\regs), %r20
234 LDREG PT_GR21(\regs), %r21
235 LDREG PT_GR22(\regs), %r22
236 LDREG PT_GR23(\regs), %r23
237 LDREG PT_GR24(\regs), %r24
238 LDREG PT_GR25(\regs), %r25
239 LDREG PT_GR26(\regs), %r26
240 LDREG PT_GR27(\regs), %r27
241 LDREG PT_GR28(\regs), %r28
242 /* r29 points to register save area, and is restored in rest_stack */
243 /* r30 stack pointer restored in rest_stack */
244 LDREG PT_GR31(\regs), %r31
245 .endm
246
247 .macro save_fp regs
248 fstd,ma %fr0, 8(\regs)
249 fstd,ma %fr1, 8(\regs)
250 fstd,ma %fr2, 8(\regs)
251 fstd,ma %fr3, 8(\regs)
252 fstd,ma %fr4, 8(\regs)
253 fstd,ma %fr5, 8(\regs)
254 fstd,ma %fr6, 8(\regs)
255 fstd,ma %fr7, 8(\regs)
256 fstd,ma %fr8, 8(\regs)
257 fstd,ma %fr9, 8(\regs)
258 fstd,ma %fr10, 8(\regs)
259 fstd,ma %fr11, 8(\regs)
260 fstd,ma %fr12, 8(\regs)
261 fstd,ma %fr13, 8(\regs)
262 fstd,ma %fr14, 8(\regs)
263 fstd,ma %fr15, 8(\regs)
264 fstd,ma %fr16, 8(\regs)
265 fstd,ma %fr17, 8(\regs)
266 fstd,ma %fr18, 8(\regs)
267 fstd,ma %fr19, 8(\regs)
268 fstd,ma %fr20, 8(\regs)
269 fstd,ma %fr21, 8(\regs)
270 fstd,ma %fr22, 8(\regs)
271 fstd,ma %fr23, 8(\regs)
272 fstd,ma %fr24, 8(\regs)
273 fstd,ma %fr25, 8(\regs)
274 fstd,ma %fr26, 8(\regs)
275 fstd,ma %fr27, 8(\regs)
276 fstd,ma %fr28, 8(\regs)
277 fstd,ma %fr29, 8(\regs)
278 fstd,ma %fr30, 8(\regs)
279 fstd %fr31, 0(\regs)
280 .endm
281
282 .macro rest_fp regs
283 fldd 0(\regs), %fr31
284 fldd,mb -8(\regs), %fr30
285 fldd,mb -8(\regs), %fr29
286 fldd,mb -8(\regs), %fr28
287 fldd,mb -8(\regs), %fr27
288 fldd,mb -8(\regs), %fr26
289 fldd,mb -8(\regs), %fr25
290 fldd,mb -8(\regs), %fr24
291 fldd,mb -8(\regs), %fr23
292 fldd,mb -8(\regs), %fr22
293 fldd,mb -8(\regs), %fr21
294 fldd,mb -8(\regs), %fr20
295 fldd,mb -8(\regs), %fr19
296 fldd,mb -8(\regs), %fr18
297 fldd,mb -8(\regs), %fr17
298 fldd,mb -8(\regs), %fr16
299 fldd,mb -8(\regs), %fr15
300 fldd,mb -8(\regs), %fr14
301 fldd,mb -8(\regs), %fr13
302 fldd,mb -8(\regs), %fr12
303 fldd,mb -8(\regs), %fr11
304 fldd,mb -8(\regs), %fr10
305 fldd,mb -8(\regs), %fr9
306 fldd,mb -8(\regs), %fr8
307 fldd,mb -8(\regs), %fr7
308 fldd,mb -8(\regs), %fr6
309 fldd,mb -8(\regs), %fr5
310 fldd,mb -8(\regs), %fr4
311 fldd,mb -8(\regs), %fr3
312 fldd,mb -8(\regs), %fr2
313 fldd,mb -8(\regs), %fr1
314 fldd,mb -8(\regs), %fr0
315 .endm
316
317 .macro callee_save_float
318 fstd,ma %fr12, 8(%r30)
319 fstd,ma %fr13, 8(%r30)
320 fstd,ma %fr14, 8(%r30)
321 fstd,ma %fr15, 8(%r30)
322 fstd,ma %fr16, 8(%r30)
323 fstd,ma %fr17, 8(%r30)
324 fstd,ma %fr18, 8(%r30)
325 fstd,ma %fr19, 8(%r30)
326 fstd,ma %fr20, 8(%r30)
327 fstd,ma %fr21, 8(%r30)
328 .endm
329
330 .macro callee_rest_float
331 fldd,mb -8(%r30), %fr21
332 fldd,mb -8(%r30), %fr20
333 fldd,mb -8(%r30), %fr19
334 fldd,mb -8(%r30), %fr18
335 fldd,mb -8(%r30), %fr17
336 fldd,mb -8(%r30), %fr16
337 fldd,mb -8(%r30), %fr15
338 fldd,mb -8(%r30), %fr14
339 fldd,mb -8(%r30), %fr13
340 fldd,mb -8(%r30), %fr12
341 .endm
342
343#ifdef CONFIG_64BIT
344 .macro callee_save
345 std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
346 mfctl %cr27, %r3
347 std %r4, -136(%r30)
348 std %r5, -128(%r30)
349 std %r6, -120(%r30)
350 std %r7, -112(%r30)
351 std %r8, -104(%r30)
352 std %r9, -96(%r30)
353 std %r10, -88(%r30)
354 std %r11, -80(%r30)
355 std %r12, -72(%r30)
356 std %r13, -64(%r30)
357 std %r14, -56(%r30)
358 std %r15, -48(%r30)
359 std %r16, -40(%r30)
360 std %r17, -32(%r30)
361 std %r18, -24(%r30)
362 std %r3, -16(%r30)
363 .endm
364
365 .macro callee_rest
366 ldd -16(%r30), %r3
367 ldd -24(%r30), %r18
368 ldd -32(%r30), %r17
369 ldd -40(%r30), %r16
370 ldd -48(%r30), %r15
371 ldd -56(%r30), %r14
372 ldd -64(%r30), %r13
373 ldd -72(%r30), %r12
374 ldd -80(%r30), %r11
375 ldd -88(%r30), %r10
376 ldd -96(%r30), %r9
377 ldd -104(%r30), %r8
378 ldd -112(%r30), %r7
379 ldd -120(%r30), %r6
380 ldd -128(%r30), %r5
381 ldd -136(%r30), %r4
382 mtctl %r3, %cr27
383 ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
384 .endm
385
386#else /* ! CONFIG_64BIT */
387
388 .macro callee_save
389 stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
390 mfctl %cr27, %r3
391 stw %r4, -124(%r30)
392 stw %r5, -120(%r30)
393 stw %r6, -116(%r30)
394 stw %r7, -112(%r30)
395 stw %r8, -108(%r30)
396 stw %r9, -104(%r30)
397 stw %r10, -100(%r30)
398 stw %r11, -96(%r30)
399 stw %r12, -92(%r30)
400 stw %r13, -88(%r30)
401 stw %r14, -84(%r30)
402 stw %r15, -80(%r30)
403 stw %r16, -76(%r30)
404 stw %r17, -72(%r30)
405 stw %r18, -68(%r30)
406 stw %r3, -64(%r30)
407 .endm
408
409 .macro callee_rest
410 ldw -64(%r30), %r3
411 ldw -68(%r30), %r18
412 ldw -72(%r30), %r17
413 ldw -76(%r30), %r16
414 ldw -80(%r30), %r15
415 ldw -84(%r30), %r14
416 ldw -88(%r30), %r13
417 ldw -92(%r30), %r12
418 ldw -96(%r30), %r11
419 ldw -100(%r30), %r10
420 ldw -104(%r30), %r9
421 ldw -108(%r30), %r8
422 ldw -112(%r30), %r7
423 ldw -116(%r30), %r6
424 ldw -120(%r30), %r5
425 ldw -124(%r30), %r4
426 mtctl %r3, %cr27
427 ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
428 .endm
429#endif /* ! CONFIG_64BIT */
430
431 .macro save_specials regs
432
433 SAVE_SP (%sr0, PT_SR0 (\regs))
434 SAVE_SP (%sr1, PT_SR1 (\regs))
435 SAVE_SP (%sr2, PT_SR2 (\regs))
436 SAVE_SP (%sr3, PT_SR3 (\regs))
437 SAVE_SP (%sr4, PT_SR4 (\regs))
438 SAVE_SP (%sr5, PT_SR5 (\regs))
439 SAVE_SP (%sr6, PT_SR6 (\regs))
440 SAVE_SP (%sr7, PT_SR7 (\regs))
441
442 SAVE_CR (%cr17, PT_IASQ0(\regs))
443 mtctl %r0, %cr17
444 SAVE_CR (%cr17, PT_IASQ1(\regs))
445
446 SAVE_CR (%cr18, PT_IAOQ0(\regs))
447 mtctl %r0, %cr18
448 SAVE_CR (%cr18, PT_IAOQ1(\regs))
449
450#ifdef CONFIG_64BIT
451 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
452 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
453 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
454 * we lose the 6th bit on a save/restore over interrupt.
455 */
456 mfctl,w %cr11, %r1
457 STREG %r1, PT_SAR (\regs)
458#else
459 SAVE_CR (%cr11, PT_SAR (\regs))
460#endif
461 SAVE_CR (%cr19, PT_IIR (\regs))
462
463 /*
464 * Code immediately following this macro (in intr_save) relies
465 * on r8 containing ipsw.
466 */
467 mfctl %cr22, %r8
468 STREG %r8, PT_PSW(\regs)
469 .endm
470
471 .macro rest_specials regs
472
473 REST_SP (%sr0, PT_SR0 (\regs))
474 REST_SP (%sr1, PT_SR1 (\regs))
475 REST_SP (%sr2, PT_SR2 (\regs))
476 REST_SP (%sr3, PT_SR3 (\regs))
477 REST_SP (%sr4, PT_SR4 (\regs))
478 REST_SP (%sr5, PT_SR5 (\regs))
479 REST_SP (%sr6, PT_SR6 (\regs))
480 REST_SP (%sr7, PT_SR7 (\regs))
481
482 REST_CR (%cr17, PT_IASQ0(\regs))
483 REST_CR (%cr17, PT_IASQ1(\regs))
484
485 REST_CR (%cr18, PT_IAOQ0(\regs))
486 REST_CR (%cr18, PT_IAOQ1(\regs))
487
488 REST_CR (%cr11, PT_SAR (\regs))
489
490 REST_CR (%cr22, PT_PSW (\regs))
491 .endm
492
493
494 /* First step to create a "relied upon translation"
495 * See PA 2.0 Arch. page F-4 and F-5.
496 *
497 * The ssm was originally necessary due to a "PCxT bug".
498 * But someone decided it needed to be added to the architecture
499 * and this "feature" went into rev3 of PA-RISC 1.1 Arch Manual.
500 * It's been carried forward into PA 2.0 Arch as well. :^(
501 *
502 * "ssm 0,%r0" is a NOP with side effects (prefetch barrier).
503 * rsm/ssm prevents the ifetch unit from speculatively fetching
504 * instructions past this line in the code stream.
505 * PA 2.0 processor will single step all insn in the same QUAD (4 insn).
506 */
507 .macro pcxt_ssm_bug
508 rsm PSW_SM_I,%r0
509 nop /* 1 */
510 nop /* 2 */
511 nop /* 3 */
512 nop /* 4 */
513 nop /* 5 */
514 nop /* 6 */
515 nop /* 7 */
516 .endm
517
518#endif /* __ASSEMBLY__ */
519#endif
diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h
deleted file mode 100644
index 57fcc4a5ebb4..000000000000
--- a/include/asm-parisc/atomic.h
+++ /dev/null
@@ -1,348 +0,0 @@
1/* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
2 * Copyright (C) 2006 Kyle McMartin <kyle@parisc-linux.org>
3 */
4
5#ifndef _ASM_PARISC_ATOMIC_H_
6#define _ASM_PARISC_ATOMIC_H_
7
8#include <linux/types.h>
9#include <asm/system.h>
10
11/*
12 * Atomic operations that C can't guarantee us. Useful for
13 * resource counting etc..
14 *
15 * And probably incredibly slow on parisc. OTOH, we don't
16 * have to write any serious assembly. prumpf
17 */
18
19#ifdef CONFIG_SMP
20#include <asm/spinlock.h>
21#include <asm/cache.h> /* we use L1_CACHE_BYTES */
22
23/* Use an array of spinlocks for our atomic_ts.
24 * Hash function to index into a different SPINLOCK.
25 * Since "a" is usually an address, use one spinlock per cacheline.
26 */
27# define ATOMIC_HASH_SIZE 4
28# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
29
30extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
31
32/* Can't use raw_spin_lock_irq because of #include problems, so
33 * this is the substitute */
34#define _atomic_spin_lock_irqsave(l,f) do { \
35 raw_spinlock_t *s = ATOMIC_HASH(l); \
36 local_irq_save(f); \
37 __raw_spin_lock(s); \
38} while(0)
39
40#define _atomic_spin_unlock_irqrestore(l,f) do { \
41 raw_spinlock_t *s = ATOMIC_HASH(l); \
42 __raw_spin_unlock(s); \
43 local_irq_restore(f); \
44} while(0)
45
46
47#else
48# define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
49# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
50#endif
51
52/* This should get optimized out since it's never called.
53** Or get a link error if xchg is used "wrong".
54*/
55extern void __xchg_called_with_bad_pointer(void);
56
57
58/* __xchg32/64 defined in arch/parisc/lib/bitops.c */
59extern unsigned long __xchg8(char, char *);
60extern unsigned long __xchg32(int, int *);
61#ifdef CONFIG_64BIT
62extern unsigned long __xchg64(unsigned long, unsigned long *);
63#endif
64
65/* optimizer better get rid of switch since size is a constant */
66static __inline__ unsigned long
67__xchg(unsigned long x, __volatile__ void * ptr, int size)
68{
69 switch(size) {
70#ifdef CONFIG_64BIT
71 case 8: return __xchg64(x,(unsigned long *) ptr);
72#endif
73 case 4: return __xchg32((int) x, (int *) ptr);
74 case 1: return __xchg8((char) x, (char *) ptr);
75 }
76 __xchg_called_with_bad_pointer();
77 return x;
78}
79
80
81/*
82** REVISIT - Abandoned use of LDCW in xchg() for now:
83** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
84** o and while we are at it, could CONFIG_64BIT code use LDCD too?
85**
86** if (__builtin_constant_p(x) && (x == NULL))
87** if (((unsigned long)p & 0xf) == 0)
88** return __ldcw(p);
89*/
90#define xchg(ptr,x) \
91 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
92
93
94#define __HAVE_ARCH_CMPXCHG 1
95
96/* bug catcher for when unsupported size is used - won't link */
97extern void __cmpxchg_called_with_bad_pointer(void);
98
99/* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */
100extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old, unsigned int new_);
101extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr, unsigned long old, unsigned long new_);
102
103/* don't worry...optimizer will get rid of most of this */
104static __inline__ unsigned long
105__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
106{
107 switch(size) {
108#ifdef CONFIG_64BIT
109 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
110#endif
111 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
112 }
113 __cmpxchg_called_with_bad_pointer();
114 return old;
115}
116
117#define cmpxchg(ptr,o,n) \
118 ({ \
119 __typeof__(*(ptr)) _o_ = (o); \
120 __typeof__(*(ptr)) _n_ = (n); \
121 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
122 (unsigned long)_n_, sizeof(*(ptr))); \
123 })
124
125#include <asm-generic/cmpxchg-local.h>
126
127static inline unsigned long __cmpxchg_local(volatile void *ptr,
128 unsigned long old,
129 unsigned long new_, int size)
130{
131 switch (size) {
132#ifdef CONFIG_64BIT
133 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
134#endif
135 case 4: return __cmpxchg_u32(ptr, old, new_);
136 default:
137 return __cmpxchg_local_generic(ptr, old, new_, size);
138 }
139}
140
141/*
142 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
143 * them available.
144 */
145#define cmpxchg_local(ptr, o, n) \
146 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
147 (unsigned long)(n), sizeof(*(ptr))))
148#ifdef CONFIG_64BIT
149#define cmpxchg64_local(ptr, o, n) \
150 ({ \
151 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
152 cmpxchg_local((ptr), (o), (n)); \
153 })
154#else
155#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
156#endif
157
158/* Note that we need not lock read accesses - aligned word writes/reads
159 * are atomic, so a reader never sees unconsistent values.
160 *
161 * Cache-line alignment would conflict with, for example, linux/module.h
162 */
163
164typedef struct { volatile int counter; } atomic_t;
165
166/* It's possible to reduce all atomic operations to either
167 * __atomic_add_return, atomic_set and atomic_read (the latter
168 * is there only for consistency).
169 */
170
171static __inline__ int __atomic_add_return(int i, atomic_t *v)
172{
173 int ret;
174 unsigned long flags;
175 _atomic_spin_lock_irqsave(v, flags);
176
177 ret = (v->counter += i);
178
179 _atomic_spin_unlock_irqrestore(v, flags);
180 return ret;
181}
182
183static __inline__ void atomic_set(atomic_t *v, int i)
184{
185 unsigned long flags;
186 _atomic_spin_lock_irqsave(v, flags);
187
188 v->counter = i;
189
190 _atomic_spin_unlock_irqrestore(v, flags);
191}
192
193static __inline__ int atomic_read(const atomic_t *v)
194{
195 return v->counter;
196}
197
198/* exported interface */
199#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
200#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
201
202/**
203 * atomic_add_unless - add unless the number is a given value
204 * @v: pointer of type atomic_t
205 * @a: the amount to add to v...
206 * @u: ...unless v is equal to u.
207 *
208 * Atomically adds @a to @v, so long as it was not @u.
209 * Returns non-zero if @v was not @u, and zero otherwise.
210 */
211static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
212{
213 int c, old;
214 c = atomic_read(v);
215 for (;;) {
216 if (unlikely(c == (u)))
217 break;
218 old = atomic_cmpxchg((v), c, c + (a));
219 if (likely(old == c))
220 break;
221 c = old;
222 }
223 return c != (u);
224}
225
226#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
227
228#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v))))
229#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v))))
230#define atomic_inc(v) ((void)(__atomic_add_return( 1,(v))))
231#define atomic_dec(v) ((void)(__atomic_add_return( -1,(v))))
232
233#define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v)))
234#define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v)))
235#define atomic_inc_return(v) (__atomic_add_return( 1,(v)))
236#define atomic_dec_return(v) (__atomic_add_return( -1,(v)))
237
238#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
239
240/*
241 * atomic_inc_and_test - increment and test
242 * @v: pointer of type atomic_t
243 *
244 * Atomically increments @v by 1
245 * and returns true if the result is zero, or false for all
246 * other cases.
247 */
248#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
249
250#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
251
252#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
253
254#define ATOMIC_INIT(i) ((atomic_t) { (i) })
255
256#define smp_mb__before_atomic_dec() smp_mb()
257#define smp_mb__after_atomic_dec() smp_mb()
258#define smp_mb__before_atomic_inc() smp_mb()
259#define smp_mb__after_atomic_inc() smp_mb()
260
261#ifdef CONFIG_64BIT
262
263typedef struct { volatile s64 counter; } atomic64_t;
264
265#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
266
267static __inline__ int
268__atomic64_add_return(s64 i, atomic64_t *v)
269{
270 int ret;
271 unsigned long flags;
272 _atomic_spin_lock_irqsave(v, flags);
273
274 ret = (v->counter += i);
275
276 _atomic_spin_unlock_irqrestore(v, flags);
277 return ret;
278}
279
280static __inline__ void
281atomic64_set(atomic64_t *v, s64 i)
282{
283 unsigned long flags;
284 _atomic_spin_lock_irqsave(v, flags);
285
286 v->counter = i;
287
288 _atomic_spin_unlock_irqrestore(v, flags);
289}
290
291static __inline__ s64
292atomic64_read(const atomic64_t *v)
293{
294 return v->counter;
295}
296
297#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)i),(v))))
298#define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)i),(v))))
299#define atomic64_inc(v) ((void)(__atomic64_add_return( 1,(v))))
300#define atomic64_dec(v) ((void)(__atomic64_add_return( -1,(v))))
301
302#define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)i),(v)))
303#define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)i),(v)))
304#define atomic64_inc_return(v) (__atomic64_add_return( 1,(v)))
305#define atomic64_dec_return(v) (__atomic64_add_return( -1,(v)))
306
307#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
308
309#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
310#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
311#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
312
313/* exported interface */
314#define atomic64_cmpxchg(v, o, n) \
315 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
316#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
317
318/**
319 * atomic64_add_unless - add unless the number is a given value
320 * @v: pointer of type atomic64_t
321 * @a: the amount to add to v...
322 * @u: ...unless v is equal to u.
323 *
324 * Atomically adds @a to @v, so long as it was not @u.
325 * Returns non-zero if @v was not @u, and zero otherwise.
326 */
327static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
328{
329 long c, old;
330 c = atomic64_read(v);
331 for (;;) {
332 if (unlikely(c == (u)))
333 break;
334 old = atomic64_cmpxchg((v), c, c + (a));
335 if (likely(old == c))
336 break;
337 c = old;
338 }
339 return c != (u);
340}
341
342#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
343
344#endif /* CONFIG_64BIT */
345
346#include <asm-generic/atomic.h>
347
348#endif /* _ASM_PARISC_ATOMIC_H_ */
diff --git a/include/asm-parisc/auxvec.h b/include/asm-parisc/auxvec.h
deleted file mode 100644
index 9c3ac4b89dc9..000000000000
--- a/include/asm-parisc/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASMPARISC_AUXVEC_H
2#define __ASMPARISC_AUXVEC_H
3
4#endif
diff --git a/include/asm-parisc/bitops.h b/include/asm-parisc/bitops.h
deleted file mode 100644
index 7a6ea10bd231..000000000000
--- a/include/asm-parisc/bitops.h
+++ /dev/null
@@ -1,239 +0,0 @@
1#ifndef _PARISC_BITOPS_H
2#define _PARISC_BITOPS_H
3
4#ifndef _LINUX_BITOPS_H
5#error only <linux/bitops.h> can be included directly
6#endif
7
8#include <linux/compiler.h>
9#include <asm/types.h> /* for BITS_PER_LONG/SHIFT_PER_LONG */
10#include <asm/byteorder.h>
11#include <asm/atomic.h>
12
13/*
14 * HP-PARISC specific bit operations
15 * for a detailed description of the functions please refer
16 * to include/asm-i386/bitops.h or kerneldoc
17 */
18
19#define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1))
20
21
22#define smp_mb__before_clear_bit() smp_mb()
23#define smp_mb__after_clear_bit() smp_mb()
24
25/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
26 * on use of volatile and __*_bit() (set/clear/change):
27 * *_bit() want use of volatile.
28 * __*_bit() are "relaxed" and don't use spinlock or volatile.
29 */
30
31static __inline__ void set_bit(int nr, volatile unsigned long * addr)
32{
33 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
34 unsigned long flags;
35
36 addr += (nr >> SHIFT_PER_LONG);
37 _atomic_spin_lock_irqsave(addr, flags);
38 *addr |= mask;
39 _atomic_spin_unlock_irqrestore(addr, flags);
40}
41
42static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
43{
44 unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr));
45 unsigned long flags;
46
47 addr += (nr >> SHIFT_PER_LONG);
48 _atomic_spin_lock_irqsave(addr, flags);
49 *addr &= mask;
50 _atomic_spin_unlock_irqrestore(addr, flags);
51}
52
53static __inline__ void change_bit(int nr, volatile unsigned long * addr)
54{
55 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
56 unsigned long flags;
57
58 addr += (nr >> SHIFT_PER_LONG);
59 _atomic_spin_lock_irqsave(addr, flags);
60 *addr ^= mask;
61 _atomic_spin_unlock_irqrestore(addr, flags);
62}
63
64static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
65{
66 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
67 unsigned long old;
68 unsigned long flags;
69 int set;
70
71 addr += (nr >> SHIFT_PER_LONG);
72 _atomic_spin_lock_irqsave(addr, flags);
73 old = *addr;
74 set = (old & mask) ? 1 : 0;
75 if (!set)
76 *addr = old | mask;
77 _atomic_spin_unlock_irqrestore(addr, flags);
78
79 return set;
80}
81
82static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
83{
84 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
85 unsigned long old;
86 unsigned long flags;
87 int set;
88
89 addr += (nr >> SHIFT_PER_LONG);
90 _atomic_spin_lock_irqsave(addr, flags);
91 old = *addr;
92 set = (old & mask) ? 1 : 0;
93 if (set)
94 *addr = old & ~mask;
95 _atomic_spin_unlock_irqrestore(addr, flags);
96
97 return set;
98}
99
100static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
101{
102 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
103 unsigned long oldbit;
104 unsigned long flags;
105
106 addr += (nr >> SHIFT_PER_LONG);
107 _atomic_spin_lock_irqsave(addr, flags);
108 oldbit = *addr;
109 *addr = oldbit ^ mask;
110 _atomic_spin_unlock_irqrestore(addr, flags);
111
112 return (oldbit & mask) ? 1 : 0;
113}
114
115#include <asm-generic/bitops/non-atomic.h>
116
117#ifdef __KERNEL__
118
119/**
120 * __ffs - find first bit in word. returns 0 to "BITS_PER_LONG-1".
121 * @word: The word to search
122 *
123 * __ffs() return is undefined if no bit is set.
124 *
125 * 32-bit fast __ffs by LaMont Jones "lamont At hp com".
126 * 64-bit enhancement by Grant Grundler "grundler At parisc-linux org".
127 * (with help from willy/jejb to get the semantics right)
128 *
129 * This algorithm avoids branches by making use of nullification.
130 * One side effect of "extr" instructions is it sets PSW[N] bit.
131 * How PSW[N] (nullify next insn) gets set is determined by the
132 * "condition" field (eg "<>" or "TR" below) in the extr* insn.
133 * Only the 1st and one of either the 2cd or 3rd insn will get executed.
134 * Each set of 3 insn will get executed in 2 cycles on PA8x00 vs 16 or so
135 * cycles for each mispredicted branch.
136 */
137
138static __inline__ unsigned long __ffs(unsigned long x)
139{
140 unsigned long ret;
141
142 __asm__(
143#ifdef CONFIG_64BIT
144 " ldi 63,%1\n"
145 " extrd,u,*<> %0,63,32,%%r0\n"
146 " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */
147 " addi -32,%1,%1\n"
148#else
149 " ldi 31,%1\n"
150#endif
151 " extru,<> %0,31,16,%%r0\n"
152 " extru,TR %0,15,16,%0\n" /* xxxx0000 -> 0000xxxx */
153 " addi -16,%1,%1\n"
154 " extru,<> %0,31,8,%%r0\n"
155 " extru,TR %0,23,8,%0\n" /* 0000xx00 -> 000000xx */
156 " addi -8,%1,%1\n"
157 " extru,<> %0,31,4,%%r0\n"
158 " extru,TR %0,27,4,%0\n" /* 000000x0 -> 0000000x */
159 " addi -4,%1,%1\n"
160 " extru,<> %0,31,2,%%r0\n"
161 " extru,TR %0,29,2,%0\n" /* 0000000y, 1100b -> 0011b */
162 " addi -2,%1,%1\n"
163 " extru,= %0,31,1,%%r0\n" /* check last bit */
164 " addi -1,%1,%1\n"
165 : "+r" (x), "=r" (ret) );
166 return ret;
167}
168
169#include <asm-generic/bitops/ffz.h>
170
171/*
172 * ffs: find first bit set. returns 1 to BITS_PER_LONG or 0 (if none set)
173 * This is defined the same way as the libc and compiler builtin
174 * ffs routines, therefore differs in spirit from the above ffz (man ffs).
175 */
176static __inline__ int ffs(int x)
177{
178 return x ? (__ffs((unsigned long)x) + 1) : 0;
179}
180
181/*
182 * fls: find last (most significant) bit set.
183 * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
184 */
185
186static __inline__ int fls(int x)
187{
188 int ret;
189 if (!x)
190 return 0;
191
192 __asm__(
193 " ldi 1,%1\n"
194 " extru,<> %0,15,16,%%r0\n"
195 " zdep,TR %0,15,16,%0\n" /* xxxx0000 */
196 " addi 16,%1,%1\n"
197 " extru,<> %0,7,8,%%r0\n"
198 " zdep,TR %0,23,24,%0\n" /* xx000000 */
199 " addi 8,%1,%1\n"
200 " extru,<> %0,3,4,%%r0\n"
201 " zdep,TR %0,27,28,%0\n" /* x0000000 */
202 " addi 4,%1,%1\n"
203 " extru,<> %0,1,2,%%r0\n"
204 " zdep,TR %0,29,30,%0\n" /* y0000000 (y&3 = 0) */
205 " addi 2,%1,%1\n"
206 " extru,= %0,0,1,%%r0\n"
207 " addi 1,%1,%1\n" /* if y & 8, add 1 */
208 : "+r" (x), "=r" (ret) );
209
210 return ret;
211}
212
213#include <asm-generic/bitops/__fls.h>
214#include <asm-generic/bitops/fls64.h>
215#include <asm-generic/bitops/hweight.h>
216#include <asm-generic/bitops/lock.h>
217#include <asm-generic/bitops/sched.h>
218
219#endif /* __KERNEL__ */
220
221#include <asm-generic/bitops/find.h>
222
223#ifdef __KERNEL__
224
225#include <asm-generic/bitops/ext2-non-atomic.h>
226
227/* '3' is bits per byte */
228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3)
229
230#define ext2_set_bit_atomic(l,nr,addr) \
231 test_and_set_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr)
232#define ext2_clear_bit_atomic(l,nr,addr) \
233 test_and_clear_bit( (nr) ^ LE_BYTE_ADDR, (unsigned long *)addr)
234
235#endif /* __KERNEL__ */
236
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* _PARISC_BITOPS_H */
diff --git a/include/asm-parisc/bug.h b/include/asm-parisc/bug.h
deleted file mode 100644
index 8cfc553fc837..000000000000
--- a/include/asm-parisc/bug.h
+++ /dev/null
@@ -1,92 +0,0 @@
1#ifndef _PARISC_BUG_H
2#define _PARISC_BUG_H
3
4/*
5 * Tell the user there is some problem.
6 * The offending file and line are encoded in the __bug_table section.
7 */
8
9#ifdef CONFIG_BUG
10#define HAVE_ARCH_BUG
11#define HAVE_ARCH_WARN_ON
12
13/* the break instruction is used as BUG() marker. */
14#define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff"
15#define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */
16
17#if defined(CONFIG_64BIT)
18#define ASM_WORD_INSN ".dword\t"
19#else
20#define ASM_WORD_INSN ".word\t"
21#endif
22
23#ifdef CONFIG_DEBUG_BUGVERBOSE
24#define BUG() \
25 do { \
26 asm volatile("\n" \
27 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
28 "\t.pushsection __bug_table,\"a\"\n" \
29 "2:\t" ASM_WORD_INSN "1b, %c0\n" \
30 "\t.short %c1, %c2\n" \
31 "\t.org 2b+%c3\n" \
32 "\t.popsection" \
33 : : "i" (__FILE__), "i" (__LINE__), \
34 "i" (0), "i" (sizeof(struct bug_entry)) ); \
35 for(;;) ; \
36 } while(0)
37
38#else
39#define BUG() \
40 do { \
41 asm volatile(PARISC_BUG_BREAK_ASM : : ); \
42 for(;;) ; \
43 } while(0)
44#endif
45
46#ifdef CONFIG_DEBUG_BUGVERBOSE
47#define __WARN() \
48 do { \
49 asm volatile("\n" \
50 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
51 "\t.pushsection __bug_table,\"a\"\n" \
52 "2:\t" ASM_WORD_INSN "1b, %c0\n" \
53 "\t.short %c1, %c2\n" \
54 "\t.org 2b+%c3\n" \
55 "\t.popsection" \
56 : : "i" (__FILE__), "i" (__LINE__), \
57 "i" (BUGFLAG_WARNING), \
58 "i" (sizeof(struct bug_entry)) ); \
59 } while(0)
60#else
61#define __WARN() \
62 do { \
63 asm volatile("\n" \
64 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
65 "\t.pushsection __bug_table,\"a\"\n" \
66 "2:\t" ASM_WORD_INSN "1b\n" \
67 "\t.short %c0\n" \
68 "\t.org 2b+%c1\n" \
69 "\t.popsection" \
70 : : "i" (BUGFLAG_WARNING), \
71 "i" (sizeof(struct bug_entry)) ); \
72 } while(0)
73#endif
74
75
76#define WARN_ON(x) ({ \
77 int __ret_warn_on = !!(x); \
78 if (__builtin_constant_p(__ret_warn_on)) { \
79 if (__ret_warn_on) \
80 __WARN(); \
81 } else { \
82 if (unlikely(__ret_warn_on)) \
83 __WARN(); \
84 } \
85 unlikely(__ret_warn_on); \
86})
87
88#endif
89
90#include <asm-generic/bug.h>
91#endif
92
diff --git a/include/asm-parisc/bugs.h b/include/asm-parisc/bugs.h
deleted file mode 100644
index 9e6284342a5f..000000000000
--- a/include/asm-parisc/bugs.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * include/asm-parisc/bugs.h
3 *
4 * Copyright (C) 1999 Mike Shaver
5 */
6
7/*
8 * This is included by init/main.c to check for architecture-dependent bugs.
9 *
10 * Needs:
11 * void check_bugs(void);
12 */
13
14#include <asm/processor.h>
15
16static inline void check_bugs(void)
17{
18// identify_cpu(&boot_cpu_data);
19}
diff --git a/include/asm-parisc/byteorder.h b/include/asm-parisc/byteorder.h
deleted file mode 100644
index db148313de5d..000000000000
--- a/include/asm-parisc/byteorder.h
+++ /dev/null
@@ -1,82 +0,0 @@
1#ifndef _PARISC_BYTEORDER_H
2#define _PARISC_BYTEORDER_H
3
4#include <asm/types.h>
5#include <linux/compiler.h>
6
7#ifdef __GNUC__
8
9static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
10{
11 __asm__("dep %0, 15, 8, %0\n\t" /* deposit 00ab -> 0bab */
12 "shd %%r0, %0, 8, %0" /* shift 000000ab -> 00ba */
13 : "=r" (x)
14 : "0" (x));
15 return x;
16}
17
18static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x)
19{
20 __asm__("shd %0, %0, 8, %0\n\t" /* shift xabcxabc -> cxab */
21 "dep %0, 15, 8, %0\n\t" /* deposit cxab -> cbab */
22 "shd %%r0, %0, 8, %0" /* shift 0000cbab -> 0cba */
23 : "=r" (x)
24 : "0" (x));
25 return x;
26}
27
28static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
29{
30 unsigned int temp;
31 __asm__("shd %0, %0, 16, %1\n\t" /* shift abcdabcd -> cdab */
32 "dep %1, 15, 8, %1\n\t" /* deposit cdab -> cbab */
33 "shd %0, %1, 8, %0" /* shift abcdcbab -> dcba */
34 : "=r" (x), "=&r" (temp)
35 : "0" (x));
36 return x;
37}
38
39
40#if BITS_PER_LONG > 32
41/*
42** From "PA-RISC 2.0 Architecture", HP Professional Books.
43** See Appendix I page 8 , "Endian Byte Swapping".
44**
45** Pretty cool algorithm: (* == zero'd bits)
46** PERMH 01234567 -> 67452301 into %0
47** HSHL 67452301 -> 7*5*3*1* into %1
48** HSHR 67452301 -> *6*4*2*0 into %0
49** OR %0 | %1 -> 76543210 into %0 (all done!)
50*/
51static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) {
52 __u64 temp;
53 __asm__("permh,3210 %0, %0\n\t"
54 "hshl %0, 8, %1\n\t"
55 "hshr,u %0, 8, %0\n\t"
56 "or %1, %0, %0"
57 : "=r" (x), "=&r" (temp)
58 : "0" (x));
59 return x;
60}
61#define __arch__swab64(x) ___arch__swab64(x)
62#define __BYTEORDER_HAS_U64__
63#elif !defined(__STRICT_ANSI__)
64static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
65{
66 __u32 t1 = ___arch__swab32((__u32) x);
67 __u32 t2 = ___arch__swab32((__u32) (x >> 32));
68 return (((__u64) t1 << 32) | t2);
69}
70#define __arch__swab64(x) ___arch__swab64(x)
71#define __BYTEORDER_HAS_U64__
72#endif
73
74#define __arch__swab16(x) ___arch__swab16(x)
75#define __arch__swab24(x) ___arch__swab24(x)
76#define __arch__swab32(x) ___arch__swab32(x)
77
78#endif /* __GNUC__ */
79
80#include <linux/byteorder/big_endian.h>
81
82#endif /* _PARISC_BYTEORDER_H */
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h
deleted file mode 100644
index 32c2cca74345..000000000000
--- a/include/asm-parisc/cache.h
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * include/asm-parisc/cache.h
3 */
4
5#ifndef __ARCH_PARISC_CACHE_H
6#define __ARCH_PARISC_CACHE_H
7
8
9/*
10 * PA 2.0 processors have 64-byte cachelines; PA 1.1 processors have
11 * 32-byte cachelines. The default configuration is not for SMP anyway,
12 * so if you're building for SMP, you should select the appropriate
13 * processor type. There is a potential livelock danger when running
14 * a machine with this value set too small, but it's more probable you'll
15 * just ruin performance.
16 */
17#ifdef CONFIG_PA20
18#define L1_CACHE_BYTES 64
19#define L1_CACHE_SHIFT 6
20#else
21#define L1_CACHE_BYTES 32
22#define L1_CACHE_SHIFT 5
23#endif
24
25#ifndef __ASSEMBLY__
26
27#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
28
29#define SMP_CACHE_BYTES L1_CACHE_BYTES
30
31#define __read_mostly __attribute__((__section__(".data.read_mostly")))
32
33void parisc_cache_init(void); /* initializes cache-flushing */
34void disable_sr_hashing_asm(int); /* low level support for above */
35void disable_sr_hashing(void); /* turns off space register hashing */
36void free_sid(unsigned long);
37unsigned long alloc_sid(void);
38
39struct seq_file;
40extern void show_cache_info(struct seq_file *m);
41
42extern int split_tlb;
43extern int dcache_stride;
44extern int icache_stride;
45extern struct pdc_cache_info cache_info;
46void parisc_setup_cache_timing(void);
47
48#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr));
49#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr));
50#define pdtlb_kernel(addr) asm volatile("pdtlb 0(%0)" : : "r" (addr));
51
52#endif /* ! __ASSEMBLY__ */
53
54/* Classes of processor wrt: disabling space register hashing */
55
56#define SRHASH_PCXST 0 /* pcxs, pcxt, pcxt_ */
57#define SRHASH_PCXL 1 /* pcxl */
58#define SRHASH_PA20 2 /* pcxu, pcxu_, pcxw, pcxw_ */
59
60#endif
diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h
deleted file mode 100644
index b7ca6dc7fddc..000000000000
--- a/include/asm-parisc/cacheflush.h
+++ /dev/null
@@ -1,121 +0,0 @@
1#ifndef _PARISC_CACHEFLUSH_H
2#define _PARISC_CACHEFLUSH_H
3
4#include <linux/mm.h>
5
6/* The usual comment is "Caches aren't brain-dead on the <architecture>".
7 * Unfortunately, that doesn't apply to PA-RISC. */
8
9/* Internal implementation */
10void flush_data_cache_local(void *); /* flushes local data-cache only */
11void flush_instruction_cache_local(void *); /* flushes local code-cache only */
12#ifdef CONFIG_SMP
13void flush_data_cache(void); /* flushes data-cache only (all processors) */
14void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
15#else
16#define flush_data_cache() flush_data_cache_local(NULL)
17#define flush_instruction_cache() flush_instruction_cache_local(NULL)
18#endif
19
20#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
21
22void flush_user_icache_range_asm(unsigned long, unsigned long);
23void flush_kernel_icache_range_asm(unsigned long, unsigned long);
24void flush_user_dcache_range_asm(unsigned long, unsigned long);
25void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_page_asm(void *);
27void flush_kernel_icache_page(void *);
28void flush_user_dcache_page(unsigned long);
29void flush_user_icache_page(unsigned long);
30void flush_user_dcache_range(unsigned long, unsigned long);
31void flush_user_icache_range(unsigned long, unsigned long);
32
33/* Cache flush operations */
34
35void flush_cache_all_local(void);
36void flush_cache_all(void);
37void flush_cache_mm(struct mm_struct *mm);
38
39#define flush_kernel_dcache_range(start,size) \
40 flush_kernel_dcache_range_asm((start), (start)+(size));
41
42#define flush_cache_vmap(start, end) flush_cache_all()
43#define flush_cache_vunmap(start, end) flush_cache_all()
44
45extern void flush_dcache_page(struct page *page);
46
47#define flush_dcache_mmap_lock(mapping) \
48 spin_lock_irq(&(mapping)->tree_lock)
49#define flush_dcache_mmap_unlock(mapping) \
50 spin_unlock_irq(&(mapping)->tree_lock)
51
52#define flush_icache_page(vma,page) do { \
53 flush_kernel_dcache_page(page); \
54 flush_kernel_icache_page(page_address(page)); \
55} while (0)
56
57#define flush_icache_range(s,e) do { \
58 flush_kernel_dcache_range_asm(s,e); \
59 flush_kernel_icache_range_asm(s,e); \
60} while (0)
61
62#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
63do { \
64 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
65 memcpy(dst, src, len); \
66 flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \
67} while (0)
68
69#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
70do { \
71 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
72 memcpy(dst, src, len); \
73} while (0)
74
75void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn);
76void flush_cache_range(struct vm_area_struct *vma,
77 unsigned long start, unsigned long end);
78
79#define ARCH_HAS_FLUSH_ANON_PAGE
80static inline void
81flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
82{
83 if (PageAnon(page))
84 flush_user_dcache_page(vmaddr);
85}
86
87#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
88void flush_kernel_dcache_page_addr(void *addr);
89static inline void flush_kernel_dcache_page(struct page *page)
90{
91 flush_kernel_dcache_page_addr(page_address(page));
92}
93
94#ifdef CONFIG_DEBUG_RODATA
95void mark_rodata_ro(void);
96#endif
97
98#ifdef CONFIG_PA8X00
99/* Only pa8800, pa8900 needs this */
100#define ARCH_HAS_KMAP
101
102void kunmap_parisc(void *addr);
103
104static inline void *kmap(struct page *page)
105{
106 might_sleep();
107 return page_address(page);
108}
109
110#define kunmap(page) kunmap_parisc(page_address(page))
111
112#define kmap_atomic(page, idx) page_address(page)
113
114#define kunmap_atomic(addr, idx) kunmap_parisc(addr)
115
116#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn))
117#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
118#endif
119
120#endif /* _PARISC_CACHEFLUSH_H */
121
diff --git a/include/asm-parisc/checksum.h b/include/asm-parisc/checksum.h
deleted file mode 100644
index e9639ccc3fce..000000000000
--- a/include/asm-parisc/checksum.h
+++ /dev/null
@@ -1,210 +0,0 @@
1#ifndef _PARISC_CHECKSUM_H
2#define _PARISC_CHECKSUM_H
3
4#include <linux/in6.h>
5
6/*
7 * computes the checksum of a memory block at buff, length len,
8 * and adds in "sum" (32-bit)
9 *
10 * returns a 32-bit number suitable for feeding into itself
11 * or csum_tcpudp_magic
12 *
13 * this function must be called with even lengths, except
14 * for the last fragment, which may be odd
15 *
16 * it's best to have buff aligned on a 32-bit boundary
17 */
18extern __wsum csum_partial(const void *, int, __wsum);
19
20/*
21 * The same as csum_partial, but copies from src while it checksums.
22 *
23 * Here even more important to align src and dst on a 32-bit (or even
24 * better 64-bit) boundary
25 */
26extern __wsum csum_partial_copy_nocheck(const void *, void *, int, __wsum);
27
28/*
29 * this is a new version of the above that records errors it finds in *errp,
30 * but continues and zeros the rest of the buffer.
31 */
32extern __wsum csum_partial_copy_from_user(const void __user *src,
33 void *dst, int len, __wsum sum, int *errp);
34
35/*
36 * Optimized for IP headers, which always checksum on 4 octet boundaries.
37 *
38 * Written by Randolph Chung <tausq@debian.org>, and then mucked with by
39 * LaMont Jones <lamont@debian.org>
40 */
41static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
42{
43 unsigned int sum;
44
45 __asm__ __volatile__ (
46" ldws,ma 4(%1), %0\n"
47" addib,<= -4, %2, 2f\n"
48"\n"
49" ldws 4(%1), %%r20\n"
50" ldws 8(%1), %%r21\n"
51" add %0, %%r20, %0\n"
52" ldws,ma 12(%1), %%r19\n"
53" addc %0, %%r21, %0\n"
54" addc %0, %%r19, %0\n"
55"1: ldws,ma 4(%1), %%r19\n"
56" addib,< 0, %2, 1b\n"
57" addc %0, %%r19, %0\n"
58"\n"
59" extru %0, 31, 16, %%r20\n"
60" extru %0, 15, 16, %%r21\n"
61" addc %%r20, %%r21, %0\n"
62" extru %0, 15, 16, %%r21\n"
63" add %0, %%r21, %0\n"
64" subi -1, %0, %0\n"
65"2:\n"
66 : "=r" (sum), "=r" (iph), "=r" (ihl)
67 : "1" (iph), "2" (ihl)
68 : "r19", "r20", "r21", "memory");
69
70 return (__force __sum16)sum;
71}
72
73/*
74 * Fold a partial checksum
75 */
76static inline __sum16 csum_fold(__wsum csum)
77{
78 u32 sum = (__force u32)csum;
79 /* add the swapped two 16-bit halves of sum,
80 a possible carry from adding the two 16-bit halves,
81 will carry from the lower half into the upper half,
82 giving us the correct sum in the upper half. */
83 sum += (sum << 16) + (sum >> 16);
84 return (__force __sum16)(~sum >> 16);
85}
86
87static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
88 unsigned short len,
89 unsigned short proto,
90 __wsum sum)
91{
92 __asm__(
93 " add %1, %0, %0\n"
94 " addc %2, %0, %0\n"
95 " addc %3, %0, %0\n"
96 " addc %%r0, %0, %0\n"
97 : "=r" (sum)
98 : "r" (daddr), "r"(saddr), "r"(proto+len), "0"(sum));
99 return sum;
100}
101
102/*
103 * computes the checksum of the TCP/UDP pseudo-header
104 * returns a 16-bit checksum, already complemented
105 */
106static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
107 unsigned short len,
108 unsigned short proto,
109 __wsum sum)
110{
111 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
112}
113
114/*
115 * this routine is used for miscellaneous IP-like checksums, mainly
116 * in icmp.c
117 */
118static inline __sum16 ip_compute_csum(const void *buf, int len)
119{
120 return csum_fold (csum_partial(buf, len, 0));
121}
122
123
124#define _HAVE_ARCH_IPV6_CSUM
125static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
126 const struct in6_addr *daddr,
127 __u32 len, unsigned short proto,
128 __wsum sum)
129{
130 __asm__ __volatile__ (
131
132#if BITS_PER_LONG > 32
133
134 /*
135 ** We can execute two loads and two adds per cycle on PA 8000.
136 ** But add insn's get serialized waiting for the carry bit.
137 ** Try to keep 4 registers with "live" values ahead of the ALU.
138 */
139
140" ldd,ma 8(%1), %%r19\n" /* get 1st saddr word */
141" ldd,ma 8(%2), %%r20\n" /* get 1st daddr word */
142" add %8, %3, %3\n"/* add 16-bit proto + len */
143" add %%r19, %0, %0\n"
144" ldd,ma 8(%1), %%r21\n" /* 2cd saddr */
145" ldd,ma 8(%2), %%r22\n" /* 2cd daddr */
146" add,dc %%r20, %0, %0\n"
147" add,dc %%r21, %0, %0\n"
148" add,dc %%r22, %0, %0\n"
149" add,dc %3, %0, %0\n" /* fold in proto+len | carry bit */
150" extrd,u %0, 31, 32, %%r19\n" /* copy upper half down */
151" depdi 0, 31, 32, %0\n" /* clear upper half */
152" add %%r19, %0, %0\n" /* fold into 32-bits */
153" addc 0, %0, %0\n" /* add carry */
154
155#else
156
157 /*
158 ** For PA 1.x, the insn order doesn't matter as much.
159 ** Insn stream is serialized on the carry bit here too.
160 ** result from the previous operation (eg r0 + x)
161 */
162
163" ldw,ma 4(%1), %%r19\n" /* get 1st saddr word */
164" ldw,ma 4(%2), %%r20\n" /* get 1st daddr word */
165" add %8, %3, %3\n" /* add 16-bit proto + len */
166" add %%r19, %0, %0\n"
167" ldw,ma 4(%1), %%r21\n" /* 2cd saddr */
168" addc %%r20, %0, %0\n"
169" ldw,ma 4(%2), %%r22\n" /* 2cd daddr */
170" addc %%r21, %0, %0\n"
171" ldw,ma 4(%1), %%r19\n" /* 3rd saddr */
172" addc %%r22, %0, %0\n"
173" ldw,ma 4(%2), %%r20\n" /* 3rd daddr */
174" addc %%r19, %0, %0\n"
175" ldw,ma 4(%1), %%r21\n" /* 4th saddr */
176" addc %%r20, %0, %0\n"
177" ldw,ma 4(%2), %%r22\n" /* 4th daddr */
178" addc %%r21, %0, %0\n"
179" addc %%r22, %0, %0\n"
180" addc %3, %0, %0\n" /* fold in proto+len, catch carry */
181
182#endif
183 : "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len)
184 : "0" (sum), "1" (saddr), "2" (daddr), "3" (len), "r" (proto)
185 : "r19", "r20", "r21", "r22");
186 return csum_fold(sum);
187}
188
189/*
190 * Copy and checksum to user
191 */
192#define HAVE_CSUM_COPY_USER
193static __inline__ __wsum csum_and_copy_to_user(const void *src,
194 void __user *dst,
195 int len, __wsum sum,
196 int *err_ptr)
197{
198 /* code stolen from include/asm-mips64 */
199 sum = csum_partial(src, len, sum);
200
201 if (copy_to_user(dst, src, len)) {
202 *err_ptr = -EFAULT;
203 return (__force __wsum)-1;
204 }
205
206 return sum;
207}
208
209#endif
210
diff --git a/include/asm-parisc/compat.h b/include/asm-parisc/compat.h
deleted file mode 100644
index 7f32611a7a5e..000000000000
--- a/include/asm-parisc/compat.h
+++ /dev/null
@@ -1,165 +0,0 @@
1#ifndef _ASM_PARISC_COMPAT_H
2#define _ASM_PARISC_COMPAT_H
3/*
4 * Architecture specific compatibility types
5 */
6#include <linux/types.h>
7#include <linux/sched.h>
8#include <linux/thread_info.h>
9
10#define COMPAT_USER_HZ 100
11
12typedef u32 compat_size_t;
13typedef s32 compat_ssize_t;
14typedef s32 compat_time_t;
15typedef s32 compat_clock_t;
16typedef s32 compat_pid_t;
17typedef u32 __compat_uid_t;
18typedef u32 __compat_gid_t;
19typedef u32 __compat_uid32_t;
20typedef u32 __compat_gid32_t;
21typedef u16 compat_mode_t;
22typedef u32 compat_ino_t;
23typedef u32 compat_dev_t;
24typedef s32 compat_off_t;
25typedef s64 compat_loff_t;
26typedef u16 compat_nlink_t;
27typedef u16 compat_ipc_pid_t;
28typedef s32 compat_daddr_t;
29typedef u32 compat_caddr_t;
30typedef s32 compat_timer_t;
31
32typedef s32 compat_int_t;
33typedef s32 compat_long_t;
34typedef s64 compat_s64;
35typedef u32 compat_uint_t;
36typedef u32 compat_ulong_t;
37typedef u64 compat_u64;
38
39struct compat_timespec {
40 compat_time_t tv_sec;
41 s32 tv_nsec;
42};
43
44struct compat_timeval {
45 compat_time_t tv_sec;
46 s32 tv_usec;
47};
48
49struct compat_stat {
50 compat_dev_t st_dev; /* dev_t is 32 bits on parisc */
51 compat_ino_t st_ino; /* 32 bits */
52 compat_mode_t st_mode; /* 16 bits */
53 compat_nlink_t st_nlink; /* 16 bits */
54 u16 st_reserved1; /* old st_uid */
55 u16 st_reserved2; /* old st_gid */
56 compat_dev_t st_rdev;
57 compat_off_t st_size;
58 compat_time_t st_atime;
59 u32 st_atime_nsec;
60 compat_time_t st_mtime;
61 u32 st_mtime_nsec;
62 compat_time_t st_ctime;
63 u32 st_ctime_nsec;
64 s32 st_blksize;
65 s32 st_blocks;
66 u32 __unused1; /* ACL stuff */
67 compat_dev_t __unused2; /* network */
68 compat_ino_t __unused3; /* network */
69 u32 __unused4; /* cnodes */
70 u16 __unused5; /* netsite */
71 short st_fstype;
72 compat_dev_t st_realdev;
73 u16 st_basemode;
74 u16 st_spareshort;
75 __compat_uid32_t st_uid;
76 __compat_gid32_t st_gid;
77 u32 st_spare4[3];
78};
79
80struct compat_flock {
81 short l_type;
82 short l_whence;
83 compat_off_t l_start;
84 compat_off_t l_len;
85 compat_pid_t l_pid;
86};
87
88struct compat_flock64 {
89 short l_type;
90 short l_whence;
91 compat_loff_t l_start;
92 compat_loff_t l_len;
93 compat_pid_t l_pid;
94};
95
96struct compat_statfs {
97 s32 f_type;
98 s32 f_bsize;
99 s32 f_blocks;
100 s32 f_bfree;
101 s32 f_bavail;
102 s32 f_files;
103 s32 f_ffree;
104 __kernel_fsid_t f_fsid;
105 s32 f_namelen;
106 s32 f_frsize;
107 s32 f_spare[5];
108};
109
110struct compat_sigcontext {
111 compat_int_t sc_flags;
112 compat_int_t sc_gr[32]; /* PSW in sc_gr[0] */
113 u64 sc_fr[32];
114 compat_int_t sc_iasq[2];
115 compat_int_t sc_iaoq[2];
116 compat_int_t sc_sar; /* cr11 */
117};
118
119#define COMPAT_RLIM_INFINITY 0xffffffff
120
121typedef u32 compat_old_sigset_t; /* at least 32 bits */
122
123#define _COMPAT_NSIG 64
124#define _COMPAT_NSIG_BPW 32
125
126typedef u32 compat_sigset_word;
127
128#define COMPAT_OFF_T_MAX 0x7fffffff
129#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
130
131/*
132 * A pointer passed in from user mode. This should not
133 * be used for syscall parameters, just declare them
134 * as pointers because the syscall entry code will have
135 * appropriately converted them already.
136 */
137typedef u32 compat_uptr_t;
138
139static inline void __user *compat_ptr(compat_uptr_t uptr)
140{
141 return (void __user *)(unsigned long)uptr;
142}
143
144static inline compat_uptr_t ptr_to_compat(void __user *uptr)
145{
146 return (u32)(unsigned long)uptr;
147}
148
149static __inline__ void __user *compat_alloc_user_space(long len)
150{
151 struct pt_regs *regs = &current->thread.regs;
152 return (void __user *)regs->gr[30];
153}
154
155static inline int __is_compat_task(struct task_struct *t)
156{
157 return test_ti_thread_flag(task_thread_info(t), TIF_32BIT);
158}
159
160static inline int is_compat_task(void)
161{
162 return __is_compat_task(current);
163}
164
165#endif /* _ASM_PARISC_COMPAT_H */
diff --git a/include/asm-parisc/compat_rt_sigframe.h b/include/asm-parisc/compat_rt_sigframe.h
deleted file mode 100644
index 81bec28bdc48..000000000000
--- a/include/asm-parisc/compat_rt_sigframe.h
+++ /dev/null
@@ -1,50 +0,0 @@
1#include<linux/compat.h>
2#include<linux/compat_siginfo.h>
3#include<asm/compat_ucontext.h>
4
5#ifndef _ASM_PARISC_COMPAT_RT_SIGFRAME_H
6#define _ASM_PARISC_COMPAT_RT_SIGFRAME_H
7
8/* In a deft move of uber-hackery, we decide to carry the top half of all
9 * 64-bit registers in a non-portable, non-ABI, hidden structure.
10 * Userspace can read the hidden structure if it *wants* but is never
11 * guaranteed to be in the same place. Infact the uc_sigmask from the
12 * ucontext_t structure may push the hidden register file downards
13 */
14struct compat_regfile {
15 /* Upper half of all the 64-bit registers that were truncated
16 on a copy to a 32-bit userspace */
17 compat_int_t rf_gr[32];
18 compat_int_t rf_iasq[2];
19 compat_int_t rf_iaoq[2];
20 compat_int_t rf_sar;
21};
22
23#define COMPAT_SIGRETURN_TRAMP 4
24#define COMPAT_SIGRESTARTBLOCK_TRAMP 5
25#define COMPAT_TRAMP_SIZE (COMPAT_SIGRETURN_TRAMP + COMPAT_SIGRESTARTBLOCK_TRAMP)
26
27struct compat_rt_sigframe {
28 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
29 Secondary to that it must protect the ERESTART_RESTARTBLOCK
30 trampoline we left on the stack (we were bad and didn't
31 change sp so we could run really fast.) */
32 compat_uint_t tramp[COMPAT_TRAMP_SIZE];
33 compat_siginfo_t info;
34 struct compat_ucontext uc;
35 /* Hidden location of truncated registers, *must* be last. */
36 struct compat_regfile regs;
37};
38
39/*
40 * The 32-bit ABI wants at least 48 bytes for a function call frame:
41 * 16 bytes for arg0-arg3, and 32 bytes for magic (the only part of
42 * which Linux/parisc uses is sp-20 for the saved return pointer...)
43 * Then, the stack pointer must be rounded to a cache line (64 bytes).
44 */
45#define SIGFRAME32 64
46#define FUNCTIONCALLFRAME32 48
47#define PARISC_RT_SIGFRAME_SIZE32 \
48 (((sizeof(struct compat_rt_sigframe) + FUNCTIONCALLFRAME32) + SIGFRAME32) & -SIGFRAME32)
49
50#endif
diff --git a/include/asm-parisc/compat_signal.h b/include/asm-parisc/compat_signal.h
deleted file mode 100644
index 6ad02c360b21..000000000000
--- a/include/asm-parisc/compat_signal.h
+++ /dev/null
@@ -1,2 +0,0 @@
1/* Use generic */
2#include <asm-generic/compat_signal.h>
diff --git a/include/asm-parisc/compat_ucontext.h b/include/asm-parisc/compat_ucontext.h
deleted file mode 100644
index 2f7292afde3c..000000000000
--- a/include/asm-parisc/compat_ucontext.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef _ASM_PARISC_COMPAT_UCONTEXT_H
2#define _ASM_PARISC_COMPAT_UCONTEXT_H
3
4#include <linux/compat.h>
5
6/* 32-bit ucontext as seen from an 64-bit kernel */
7struct compat_ucontext {
8 compat_uint_t uc_flags;
9 compat_uptr_t uc_link;
10 compat_stack_t uc_stack; /* struct compat_sigaltstack (12 bytes)*/
11 /* FIXME: Pad out to get uc_mcontext to start at an 8-byte aligned boundary */
12 compat_uint_t pad[1];
13 struct compat_sigcontext uc_mcontext;
14 compat_sigset_t uc_sigmask; /* mask last for extensibility */
15};
16
17#endif /* !_ASM_PARISC_COMPAT_UCONTEXT_H */
diff --git a/include/asm-parisc/cputime.h b/include/asm-parisc/cputime.h
deleted file mode 100644
index dcdf2fbd7e72..000000000000
--- a/include/asm-parisc/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __PARISC_CPUTIME_H
2#define __PARISC_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __PARISC_CPUTIME_H */
diff --git a/include/asm-parisc/current.h b/include/asm-parisc/current.h
deleted file mode 100644
index 0fb9338e3bf2..000000000000
--- a/include/asm-parisc/current.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _PARISC_CURRENT_H
2#define _PARISC_CURRENT_H
3
4#include <linux/thread_info.h>
5
6struct task_struct;
7
8static inline struct task_struct * get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current get_current()
14
15#endif /* !(_PARISC_CURRENT_H) */
diff --git a/include/asm-parisc/delay.h b/include/asm-parisc/delay.h
deleted file mode 100644
index 7a75e984674b..000000000000
--- a/include/asm-parisc/delay.h
+++ /dev/null
@@ -1,43 +0,0 @@
1#ifndef _PARISC_DELAY_H
2#define _PARISC_DELAY_H
3
4#include <asm/system.h> /* for mfctl() */
5#include <asm/processor.h> /* for boot_cpu_data */
6
7
8/*
9 * Copyright (C) 1993 Linus Torvalds
10 *
11 * Delay routines
12 */
13
14static __inline__ void __delay(unsigned long loops) {
15 asm volatile(
16 " .balignl 64,0x34000034\n"
17 " addib,UV -1,%0,.\n"
18 " nop\n"
19 : "=r" (loops) : "0" (loops));
20}
21
22static __inline__ void __cr16_delay(unsigned long clocks) {
23 unsigned long start;
24
25 /*
26 * Note: Due to unsigned math, cr16 rollovers shouldn't be
27 * a problem here. However, on 32 bit, we need to make sure
28 * we don't pass in too big a value. The current default
29 * value of MAX_UDELAY_MS should help prevent this.
30 */
31
32 start = mfctl(16);
33 while ((mfctl(16) - start) < clocks)
34 ;
35}
36
37static __inline__ void __udelay(unsigned long usecs) {
38 __cr16_delay(usecs * ((unsigned long)boot_cpu_data.cpu_hz / 1000000UL));
39}
40
41#define udelay(n) __udelay(n)
42
43#endif /* defined(_PARISC_DELAY_H) */
diff --git a/include/asm-parisc/device.h b/include/asm-parisc/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/include/asm-parisc/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/include/asm-parisc/div64.h b/include/asm-parisc/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/include/asm-parisc/div64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/div64.h>
diff --git a/include/asm-parisc/dma-mapping.h b/include/asm-parisc/dma-mapping.h
deleted file mode 100644
index 53af696f23d2..000000000000
--- a/include/asm-parisc/dma-mapping.h
+++ /dev/null
@@ -1,253 +0,0 @@
1#ifndef _PARISC_DMA_MAPPING_H
2#define _PARISC_DMA_MAPPING_H
3
4#include <linux/mm.h>
5#include <asm/cacheflush.h>
6#include <asm/scatterlist.h>
7
8/* See Documentation/DMA-mapping.txt */
9struct hppa_dma_ops {
10 int (*dma_supported)(struct device *dev, u64 mask);
11 void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
12 void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
13 void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova);
14 dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction);
15 void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction);
16 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction);
17 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nhwents, enum dma_data_direction direction);
18 void (*dma_sync_single_for_cpu)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
19 void (*dma_sync_single_for_device)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
20 void (*dma_sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
21 void (*dma_sync_sg_for_device)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
22};
23
24/*
25** We could live without the hppa_dma_ops indirection if we didn't want
26** to support 4 different coherent dma models with one binary (they will
27** someday be loadable modules):
28** I/O MMU consistent method dma_sync behavior
29** ============= ====================== =======================
30** a) PA-7x00LC uncachable host memory flush/purge
31** b) U2/Uturn cachable host memory NOP
32** c) Ike/Astro cachable host memory NOP
33** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
34**
35** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
36**
37** Systems (eg PCX-T workstations) that don't fall into the above
38** categories will need to modify the needed drivers to perform
39** flush/purge and allocate "regular" cacheable pages for everything.
40*/
41
42#ifdef CONFIG_PA11
43extern struct hppa_dma_ops pcxl_dma_ops;
44extern struct hppa_dma_ops pcx_dma_ops;
45#endif
46
47extern struct hppa_dma_ops *hppa_dma_ops;
48
49static inline void *
50dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
51 gfp_t flag)
52{
53 return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag);
54}
55
56static inline void *
57dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
58 gfp_t flag)
59{
60 return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag);
61}
62
63static inline void
64dma_free_coherent(struct device *dev, size_t size,
65 void *vaddr, dma_addr_t dma_handle)
66{
67 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
68}
69
70static inline void
71dma_free_noncoherent(struct device *dev, size_t size,
72 void *vaddr, dma_addr_t dma_handle)
73{
74 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
75}
76
77static inline dma_addr_t
78dma_map_single(struct device *dev, void *ptr, size_t size,
79 enum dma_data_direction direction)
80{
81 return hppa_dma_ops->map_single(dev, ptr, size, direction);
82}
83
84static inline void
85dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
86 enum dma_data_direction direction)
87{
88 hppa_dma_ops->unmap_single(dev, dma_addr, size, direction);
89}
90
91static inline int
92dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
93 enum dma_data_direction direction)
94{
95 return hppa_dma_ops->map_sg(dev, sg, nents, direction);
96}
97
98static inline void
99dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
100 enum dma_data_direction direction)
101{
102 hppa_dma_ops->unmap_sg(dev, sg, nhwentries, direction);
103}
104
105static inline dma_addr_t
106dma_map_page(struct device *dev, struct page *page, unsigned long offset,
107 size_t size, enum dma_data_direction direction)
108{
109 return dma_map_single(dev, (page_address(page) + (offset)), size, direction);
110}
111
112static inline void
113dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
114 enum dma_data_direction direction)
115{
116 dma_unmap_single(dev, dma_address, size, direction);
117}
118
119
120static inline void
121dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
122 enum dma_data_direction direction)
123{
124 if(hppa_dma_ops->dma_sync_single_for_cpu)
125 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, 0, size, direction);
126}
127
128static inline void
129dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
130 enum dma_data_direction direction)
131{
132 if(hppa_dma_ops->dma_sync_single_for_device)
133 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, 0, size, direction);
134}
135
136static inline void
137dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
138 unsigned long offset, size_t size,
139 enum dma_data_direction direction)
140{
141 if(hppa_dma_ops->dma_sync_single_for_cpu)
142 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, offset, size, direction);
143}
144
145static inline void
146dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
147 unsigned long offset, size_t size,
148 enum dma_data_direction direction)
149{
150 if(hppa_dma_ops->dma_sync_single_for_device)
151 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, offset, size, direction);
152}
153
154static inline void
155dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
156 enum dma_data_direction direction)
157{
158 if(hppa_dma_ops->dma_sync_sg_for_cpu)
159 hppa_dma_ops->dma_sync_sg_for_cpu(dev, sg, nelems, direction);
160}
161
162static inline void
163dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
164 enum dma_data_direction direction)
165{
166 if(hppa_dma_ops->dma_sync_sg_for_device)
167 hppa_dma_ops->dma_sync_sg_for_device(dev, sg, nelems, direction);
168}
169
170static inline int
171dma_supported(struct device *dev, u64 mask)
172{
173 return hppa_dma_ops->dma_supported(dev, mask);
174}
175
176static inline int
177dma_set_mask(struct device *dev, u64 mask)
178{
179 if(!dev->dma_mask || !dma_supported(dev, mask))
180 return -EIO;
181
182 *dev->dma_mask = mask;
183
184 return 0;
185}
186
187static inline int
188dma_get_cache_alignment(void)
189{
190 return dcache_stride;
191}
192
193static inline int
194dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
195{
196 return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
197}
198
199static inline void
200dma_cache_sync(struct device *dev, void *vaddr, size_t size,
201 enum dma_data_direction direction)
202{
203 if(hppa_dma_ops->dma_sync_single_for_cpu)
204 flush_kernel_dcache_range((unsigned long)vaddr, size);
205}
206
207static inline void *
208parisc_walk_tree(struct device *dev)
209{
210 struct device *otherdev;
211 if(likely(dev->platform_data != NULL))
212 return dev->platform_data;
213 /* OK, just traverse the bus to find it */
214 for(otherdev = dev->parent; otherdev;
215 otherdev = otherdev->parent) {
216 if(otherdev->platform_data) {
217 dev->platform_data = otherdev->platform_data;
218 break;
219 }
220 }
221 BUG_ON(!dev->platform_data);
222 return dev->platform_data;
223}
224
225#define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu);
226
227
228#ifdef CONFIG_IOMMU_CCIO
229struct parisc_device;
230struct ioc;
231void * ccio_get_iommu(const struct parisc_device *dev);
232int ccio_request_resource(const struct parisc_device *dev,
233 struct resource *res);
234int ccio_allocate_resource(const struct parisc_device *dev,
235 struct resource *res, unsigned long size,
236 unsigned long min, unsigned long max, unsigned long align);
237#else /* !CONFIG_IOMMU_CCIO */
238#define ccio_get_iommu(dev) NULL
239#define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
240#define ccio_allocate_resource(dev, res, size, min, max, align) \
241 allocate_resource(&iomem_resource, res, size, min, max, \
242 align, NULL, NULL)
243#endif /* !CONFIG_IOMMU_CCIO */
244
245#ifdef CONFIG_IOMMU_SBA
246struct parisc_device;
247void * sba_get_iommu(struct parisc_device *dev);
248#endif
249
250/* At the moment, we panic on error for IOMMU resource exaustion */
251#define dma_mapping_error(dev, x) 0
252
253#endif
diff --git a/include/asm-parisc/dma.h b/include/asm-parisc/dma.h
deleted file mode 100644
index 31ad0f05af3d..000000000000
--- a/include/asm-parisc/dma.h
+++ /dev/null
@@ -1,186 +0,0 @@
1/* $Id: dma.h,v 1.2 1999/04/27 00:46:18 deller Exp $
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 * (c) Copyright 2000, Grant Grundler
7 */
8
9#ifndef _ASM_DMA_H
10#define _ASM_DMA_H
11
12#include <asm/io.h> /* need byte IO */
13#include <asm/system.h>
14
15#define dma_outb outb
16#define dma_inb inb
17
18/*
19** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
20** (or rather not merge) DMAs into manageable chunks.
21** On parisc, this is more of the software/tuning constraint
22** rather than the HW. I/O MMU allocation algorithms can be
23** faster with smaller sizes (to some degree).
24*/
25#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE)
26
27/* The maximum address that we can perform a DMA transfer to on this platform
28** New dynamic DMA interfaces should obsolete this....
29*/
30#define MAX_DMA_ADDRESS (~0UL)
31
32/*
33** We don't have DMA channels... well V-class does but the
34** Dynamic DMA Mapping interface will support them... right? :^)
35** Note: this is not relevant right now for PA-RISC, but we cannot
36** leave this as undefined because some things (e.g. sound)
37** won't compile :-(
38*/
39#define MAX_DMA_CHANNELS 8
40#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
41#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
42#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
43
44#define DMA_AUTOINIT 0x10
45
46/* 8237 DMA controllers */
47#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
48#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
49
50/* DMA controller registers */
51#define DMA1_CMD_REG 0x08 /* command register (w) */
52#define DMA1_STAT_REG 0x08 /* status register (r) */
53#define DMA1_REQ_REG 0x09 /* request register (w) */
54#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
55#define DMA1_MODE_REG 0x0B /* mode register (w) */
56#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
57#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
58#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
59#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
60#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
61#define DMA1_EXT_MODE_REG (0x400 | DMA1_MODE_REG)
62
63#define DMA2_CMD_REG 0xD0 /* command register (w) */
64#define DMA2_STAT_REG 0xD0 /* status register (r) */
65#define DMA2_REQ_REG 0xD2 /* request register (w) */
66#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
67#define DMA2_MODE_REG 0xD6 /* mode register (w) */
68#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
69#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
70#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
71#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
72#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
73#define DMA2_EXT_MODE_REG (0x400 | DMA2_MODE_REG)
74
75static __inline__ unsigned long claim_dma_lock(void)
76{
77 return 0;
78}
79
80static __inline__ void release_dma_lock(unsigned long flags)
81{
82}
83
84
85/* Get DMA residue count. After a DMA transfer, this
86 * should return zero. Reading this while a DMA transfer is
87 * still in progress will return unpredictable results.
88 * If called before the channel has been used, it may return 1.
89 * Otherwise, it returns the number of _bytes_ left to transfer.
90 *
91 * Assumes DMA flip-flop is clear.
92 */
93static __inline__ int get_dma_residue(unsigned int dmanr)
94{
95 unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
96 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
97
98 /* using short to get 16-bit wrap around */
99 unsigned short count;
100
101 count = 1 + dma_inb(io_port);
102 count += dma_inb(io_port) << 8;
103
104 return (dmanr<=3)? count : (count<<1);
105}
106
107/* enable/disable a specific DMA channel */
108static __inline__ void enable_dma(unsigned int dmanr)
109{
110#ifdef CONFIG_SUPERIO
111 if (dmanr<=3)
112 dma_outb(dmanr, DMA1_MASK_REG);
113 else
114 dma_outb(dmanr & 3, DMA2_MASK_REG);
115#endif
116}
117
118static __inline__ void disable_dma(unsigned int dmanr)
119{
120#ifdef CONFIG_SUPERIO
121 if (dmanr<=3)
122 dma_outb(dmanr | 4, DMA1_MASK_REG);
123 else
124 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
125#endif
126}
127
128/* reserve a DMA channel */
129#define request_dma(dmanr, device_id) (0)
130
131/* Clear the 'DMA Pointer Flip Flop'.
132 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
133 * Use this once to initialize the FF to a known state.
134 * After that, keep track of it. :-)
135 * --- In order to do that, the DMA routines below should ---
136 * --- only be used while holding the DMA lock ! ---
137 */
138static __inline__ void clear_dma_ff(unsigned int dmanr)
139{
140}
141
142/* set mode (above) for a specific DMA channel */
143static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
144{
145}
146
147/* Set only the page register bits of the transfer address.
148 * This is used for successive transfers when we know the contents of
149 * the lower 16 bits of the DMA current address register, but a 64k boundary
150 * may have been crossed.
151 */
152static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
153{
154}
155
156
157/* Set transfer address & page bits for specific DMA channel.
158 * Assumes dma flipflop is clear.
159 */
160static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
161{
162}
163
164
165/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
166 * a specific DMA channel.
167 * You must ensure the parameters are valid.
168 * NOTE: from a manual: "the number of transfers is one more
169 * than the initial word count"! This is taken into account.
170 * Assumes dma flip-flop is clear.
171 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
172 */
173static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
174{
175}
176
177
178#define free_dma(dmanr)
179
180#ifdef CONFIG_PCI
181extern int isa_dma_bridge_buggy;
182#else
183#define isa_dma_bridge_buggy (0)
184#endif
185
186#endif /* _ASM_DMA_H */
diff --git a/include/asm-parisc/eisa_bus.h b/include/asm-parisc/eisa_bus.h
deleted file mode 100644
index 201085f83dd5..000000000000
--- a/include/asm-parisc/eisa_bus.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * eisa_bus.h interface between the eisa BA driver and the bus enumerator
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Copyright (c) 2002 Daniel Engstrom <5116@telia.com>
10 *
11 */
12
13#ifndef ASM_EISA_H
14#define ASM_EISA_H
15
16extern void eisa_make_irq_level(int num);
17extern void eisa_make_irq_edge(int num);
18extern int eisa_enumerator(unsigned long eeprom_addr,
19 struct resource *io_parent,
20 struct resource *mem_parent);
21extern int eisa_eeprom_init(unsigned long addr);
22
23#endif
diff --git a/include/asm-parisc/eisa_eeprom.h b/include/asm-parisc/eisa_eeprom.h
deleted file mode 100644
index 9c9da980402a..000000000000
--- a/include/asm-parisc/eisa_eeprom.h
+++ /dev/null
@@ -1,153 +0,0 @@
1/*
2 * eisa_eeprom.h - provide support for EISA adapters in PA-RISC machines
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Copyright (c) 2001, 2002 Daniel Engstrom <5116@telia.com>
10 *
11 */
12
13#ifndef ASM_EISA_EEPROM_H
14#define ASM_EISA_EEPROM_H
15
16extern void __iomem *eisa_eeprom_addr;
17
18#define HPEE_MAX_LENGTH 0x2000 /* maximum eeprom length */
19
20#define HPEE_SLOT_INFO(slot) (20+(48*slot))
21
22struct eeprom_header
23{
24
25 u_int32_t num_writes; /* number of writes */
26 u_int8_t flags; /* flags, usage? */
27 u_int8_t ver_maj;
28 u_int8_t ver_min;
29 u_int8_t num_slots; /* number of EISA slots in system */
30 u_int16_t csum; /* checksum, I don't know how to calulate this */
31 u_int8_t pad[10];
32} __attribute__ ((packed));
33
34
35struct eeprom_eisa_slot_info
36{
37 u_int32_t eisa_slot_id;
38 u_int32_t config_data_offset;
39 u_int32_t num_writes;
40 u_int16_t csum;
41 u_int16_t num_functions;
42 u_int16_t config_data_length;
43
44 /* bits 0..3 are the duplicate slot id */
45#define HPEE_SLOT_INFO_EMBEDDED 0x10
46#define HPEE_SLOT_INFO_VIRTUAL 0x20
47#define HPEE_SLOT_INFO_NO_READID 0x40
48#define HPEE_SLOT_INFO_DUPLICATE 0x80
49 u_int8_t slot_info;
50
51#define HPEE_SLOT_FEATURES_ENABLE 0x01
52#define HPEE_SLOT_FEATURES_IOCHK 0x02
53#define HPEE_SLOT_FEATURES_CFG_INCOMPLETE 0x80
54 u_int8_t slot_features;
55
56 u_int8_t ver_min;
57 u_int8_t ver_maj;
58
59#define HPEE_FUNCTION_INFO_HAVE_TYPE 0x01
60#define HPEE_FUNCTION_INFO_HAVE_MEMORY 0x02
61#define HPEE_FUNCTION_INFO_HAVE_IRQ 0x04
62#define HPEE_FUNCTION_INFO_HAVE_DMA 0x08
63#define HPEE_FUNCTION_INFO_HAVE_PORT 0x10
64#define HPEE_FUNCTION_INFO_HAVE_PORT_INIT 0x20
65/* I think there are two slighty different
66 * versions of the function_info field
67 * one int the fixed header and one optional
68 * in the parsed slot data area */
69#define HPEE_FUNCTION_INFO_HAVE_FUNCTION 0x01
70#define HPEE_FUNCTION_INFO_F_DISABLED 0x80
71#define HPEE_FUNCTION_INFO_CFG_FREE_FORM 0x40
72 u_int8_t function_info;
73
74#define HPEE_FLAG_BOARD_IS_ISA 0x01 /* flag and minor version for isa board */
75 u_int8_t flags;
76 u_int8_t pad[24];
77} __attribute__ ((packed));
78
79
80#define HPEE_MEMORY_MAX_ENT 9
81/* memory descriptor: byte 0 */
82#define HPEE_MEMORY_WRITABLE 0x01
83#define HPEE_MEMORY_CACHABLE 0x02
84#define HPEE_MEMORY_TYPE_MASK 0x18
85#define HPEE_MEMORY_TYPE_SYS 0x00
86#define HPEE_MEMORY_TYPE_EXP 0x08
87#define HPEE_MEMORY_TYPE_VIR 0x10
88#define HPEE_MEMORY_TYPE_OTH 0x18
89#define HPEE_MEMORY_SHARED 0x20
90#define HPEE_MEMORY_MORE 0x80
91
92/* memory descriptor: byte 1 */
93#define HPEE_MEMORY_WIDTH_MASK 0x03
94#define HPEE_MEMORY_WIDTH_BYTE 0x00
95#define HPEE_MEMORY_WIDTH_WORD 0x01
96#define HPEE_MEMORY_WIDTH_DWORD 0x02
97#define HPEE_MEMORY_DECODE_MASK 0x0c
98#define HPEE_MEMORY_DECODE_20BITS 0x00
99#define HPEE_MEMORY_DECODE_24BITS 0x04
100#define HPEE_MEMORY_DECODE_32BITS 0x08
101/* byte 2 and 3 are a 16bit LE value
102 * containging the memory size in kilobytes */
103/* byte 4,5,6 are a 24bit LE value
104 * containing the memory base address */
105
106
107#define HPEE_IRQ_MAX_ENT 7
108/* Interrupt entry: byte 0 */
109#define HPEE_IRQ_CHANNEL_MASK 0xf
110#define HPEE_IRQ_TRIG_LEVEL 0x20
111#define HPEE_IRQ_MORE 0x80
112/* byte 1 seems to be unused */
113
114#define HPEE_DMA_MAX_ENT 4
115
116/* dma entry: byte 0 */
117#define HPEE_DMA_CHANNEL_MASK 7
118#define HPEE_DMA_SIZE_MASK 0xc
119#define HPEE_DMA_SIZE_BYTE 0x0
120#define HPEE_DMA_SIZE_WORD 0x4
121#define HPEE_DMA_SIZE_DWORD 0x8
122#define HPEE_DMA_SHARED 0x40
123#define HPEE_DMA_MORE 0x80
124
125/* dma entry: byte 1 */
126#define HPEE_DMA_TIMING_MASK 0x30
127#define HPEE_DMA_TIMING_ISA 0x0
128#define HPEE_DMA_TIMING_TYPEA 0x10
129#define HPEE_DMA_TIMING_TYPEB 0x20
130#define HPEE_DMA_TIMING_TYPEC 0x30
131
132#define HPEE_PORT_MAX_ENT 20
133/* port entry byte 0 */
134#define HPEE_PORT_SIZE_MASK 0x1f
135#define HPEE_PORT_SHARED 0x40
136#define HPEE_PORT_MORE 0x80
137/* byte 1 and 2 is a 16bit LE value
138 * conating the start port number */
139
140#define HPEE_PORT_INIT_MAX_LEN 60 /* in bytes here */
141/* port init entry byte 0 */
142#define HPEE_PORT_INIT_WIDTH_MASK 0x3
143#define HPEE_PORT_INIT_WIDTH_BYTE 0x0
144#define HPEE_PORT_INIT_WIDTH_WORD 0x1
145#define HPEE_PORT_INIT_WIDTH_DWORD 0x2
146#define HPEE_PORT_INIT_MASK 0x4
147#define HPEE_PORT_INIT_MORE 0x80
148
149#define HPEE_SELECTION_MAX_ENT 26
150
151#define HPEE_TYPE_MAX_LEN 80
152
153#endif
diff --git a/include/asm-parisc/elf.h b/include/asm-parisc/elf.h
deleted file mode 100644
index d0a4a8262818..000000000000
--- a/include/asm-parisc/elf.h
+++ /dev/null
@@ -1,342 +0,0 @@
1#ifndef __ASMPARISC_ELF_H
2#define __ASMPARISC_ELF_H
3
4/*
5 * ELF register definitions..
6 */
7
8#include <asm/ptrace.h>
9
10#define EM_PARISC 15
11
12/* HPPA specific definitions. */
13
14/* Legal values for e_flags field of Elf32_Ehdr. */
15
16#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
17#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
18#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
19#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
20#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
21 prediction. */
22#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
23#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
24
25/* Defined values for `e_flags & EF_PARISC_ARCH' are: */
26
27#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
28#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
29#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
30
31/* Additional section indices. */
32
33#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
34 symbols in ANSI C. */
35#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
36
37/* Legal values for sh_type field of Elf32_Shdr. */
38
39#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
40#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
41#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
42
43/* Legal values for sh_flags field of Elf32_Shdr. */
44
45#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
46#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
47#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
48
49/* Legal values for ST_TYPE subfield of st_info (symbol type). */
50
51#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
52
53#define STT_HP_OPAQUE (STT_LOOS + 0x1)
54#define STT_HP_STUB (STT_LOOS + 0x2)
55
56/* HPPA relocs. */
57
58#define R_PARISC_NONE 0 /* No reloc. */
59#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
60#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
61#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
62#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
63#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
64#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
65#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
66#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
67#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
68#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
69#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
70#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
71#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
72#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
73#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
74#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
75#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
76#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
77#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
78#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
79#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
80#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
81#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
82#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
83#define R_PARISC_FPTR64 64 /* 64 bits function address. */
84#define R_PARISC_PLABEL32 65 /* 32 bits function address. */
85#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
86#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
87#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
88#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
89#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
90#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
91#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
92#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
93#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
94#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
95#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
96#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
97#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
98#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
99#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
100#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
101#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
102#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
103#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
104#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
105#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
106#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
107#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
108#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
109#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
110#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
111#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
112#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
113#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
114#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
115#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
116#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
117#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
118#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
119#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
120#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
121#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
122#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
123#define R_PARISC_LORESERVE 128
124#define R_PARISC_COPY 128 /* Copy relocation. */
125#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
126#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
127#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
128#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
129#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
130#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
131#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
132#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
133#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
134#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
135#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
136#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
137#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
138#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
139#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
140#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
141#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
142#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
143#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
144#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
145#define R_PARISC_HIRESERVE 255
146
147#define PA_PLABEL_FDESC 0x02 /* bit set if PLABEL points to
148 * a function descriptor, not
149 * an address */
150
151/* The following are PA function descriptors
152 *
153 * addr: the absolute address of the function
154 * gp: either the data pointer (r27) for non-PIC code or the
155 * the PLT pointer (r19) for PIC code */
156
157/* Format for the Elf32 Function descriptor */
158typedef struct elf32_fdesc {
159 __u32 addr;
160 __u32 gp;
161} Elf32_Fdesc;
162
163/* Format for the Elf64 Function descriptor */
164typedef struct elf64_fdesc {
165 __u64 dummy[2]; /* FIXME: nothing uses these, why waste
166 * the space */
167 __u64 addr;
168 __u64 gp;
169} Elf64_Fdesc;
170
171/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
172
173#define PT_HP_TLS (PT_LOOS + 0x0)
174#define PT_HP_CORE_NONE (PT_LOOS + 0x1)
175#define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
176#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
177#define PT_HP_CORE_COMM (PT_LOOS + 0x4)
178#define PT_HP_CORE_PROC (PT_LOOS + 0x5)
179#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
180#define PT_HP_CORE_STACK (PT_LOOS + 0x7)
181#define PT_HP_CORE_SHM (PT_LOOS + 0x8)
182#define PT_HP_CORE_MMF (PT_LOOS + 0x9)
183#define PT_HP_PARALLEL (PT_LOOS + 0x10)
184#define PT_HP_FASTBIND (PT_LOOS + 0x11)
185#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
186#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
187#define PT_HP_STACK (PT_LOOS + 0x14)
188
189#define PT_PARISC_ARCHEXT 0x70000000
190#define PT_PARISC_UNWIND 0x70000001
191
192/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
193
194#define PF_PARISC_SBP 0x08000000
195
196#define PF_HP_PAGE_SIZE 0x00100000
197#define PF_HP_FAR_SHARED 0x00200000
198#define PF_HP_NEAR_SHARED 0x00400000
199#define PF_HP_CODE 0x01000000
200#define PF_HP_MODIFY 0x02000000
201#define PF_HP_LAZYSWAP 0x04000000
202#define PF_HP_SBP 0x08000000
203
204/*
205 * The following definitions are those for 32-bit ELF binaries on a 32-bit
206 * kernel and for 64-bit binaries on a 64-bit kernel. To run 32-bit binaries
207 * on a 64-bit kernel, arch/parisc/kernel/binfmt_elf32.c defines these
208 * macros appropriately and then #includes binfmt_elf.c, which then includes
209 * this file.
210 */
211#ifndef ELF_CLASS
212
213/*
214 * This is used to ensure we don't load something for the wrong architecture.
215 *
216 * Note that this header file is used by default in fs/binfmt_elf.c. So
217 * the following macros are for the default case. However, for the 64
218 * bit kernel we also support 32 bit parisc binaries. To do that
219 * arch/parisc/kernel/binfmt_elf32.c defines its own set of these
220 * macros, and then it includes fs/binfmt_elf.c to provide an alternate
221 * elf binary handler for 32 bit binaries (on the 64 bit kernel).
222 */
223#ifdef CONFIG_64BIT
224#define ELF_CLASS ELFCLASS64
225#else
226#define ELF_CLASS ELFCLASS32
227#endif
228
229typedef unsigned long elf_greg_t;
230
231/*
232 * This yields a string that ld.so will use to load implementation
233 * specific libraries for optimization. This is more specific in
234 * intent than poking at uname or /proc/cpuinfo.
235 */
236
237#define ELF_PLATFORM ("PARISC\0")
238
239#define SET_PERSONALITY(ex, ibcs2) \
240 current->personality = PER_LINUX; \
241 current->thread.map_base = DEFAULT_MAP_BASE; \
242 current->thread.task_size = DEFAULT_TASK_SIZE \
243
244/*
245 * Fill in general registers in a core dump. This saves pretty
246 * much the same registers as hp-ux, although in a different order.
247 * Registers marked # below are not currently saved in pt_regs, so
248 * we use their current values here.
249 *
250 * gr0..gr31
251 * sr0..sr7
252 * iaoq0..iaoq1
253 * iasq0..iasq1
254 * cr11 (sar)
255 * cr19 (iir)
256 * cr20 (isr)
257 * cr21 (ior)
258 * # cr22 (ipsw)
259 * # cr0 (recovery counter)
260 * # cr24..cr31 (temporary registers)
261 * # cr8,9,12,13 (protection IDs)
262 * # cr10 (scr/ccr)
263 * # cr15 (ext int enable mask)
264 *
265 */
266
267#define ELF_CORE_COPY_REGS(dst, pt) \
268 memset(dst, 0, sizeof(dst)); /* don't leak any "random" bits */ \
269 memcpy(dst + 0, pt->gr, 32 * sizeof(elf_greg_t)); \
270 memcpy(dst + 32, pt->sr, 8 * sizeof(elf_greg_t)); \
271 memcpy(dst + 40, pt->iaoq, 2 * sizeof(elf_greg_t)); \
272 memcpy(dst + 42, pt->iasq, 2 * sizeof(elf_greg_t)); \
273 dst[44] = pt->sar; dst[45] = pt->iir; \
274 dst[46] = pt->isr; dst[47] = pt->ior; \
275 dst[48] = mfctl(22); dst[49] = mfctl(0); \
276 dst[50] = mfctl(24); dst[51] = mfctl(25); \
277 dst[52] = mfctl(26); dst[53] = mfctl(27); \
278 dst[54] = mfctl(28); dst[55] = mfctl(29); \
279 dst[56] = mfctl(30); dst[57] = mfctl(31); \
280 dst[58] = mfctl( 8); dst[59] = mfctl( 9); \
281 dst[60] = mfctl(12); dst[61] = mfctl(13); \
282 dst[62] = mfctl(10); dst[63] = mfctl(15);
283
284#endif /* ! ELF_CLASS */
285
286#define ELF_NGREG 80 /* We only need 64 at present, but leave space
287 for expansion. */
288typedef elf_greg_t elf_gregset_t[ELF_NGREG];
289
290#define ELF_NFPREG 32
291typedef double elf_fpreg_t;
292typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
293
294struct task_struct;
295
296extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
297#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
298
299struct pt_regs; /* forward declaration... */
300
301
302#define elf_check_arch(x) ((x)->e_machine == EM_PARISC && (x)->e_ident[EI_CLASS] == ELF_CLASS)
303
304/*
305 * These are used to set parameters in the core dumps.
306 */
307#define ELF_DATA ELFDATA2MSB
308#define ELF_ARCH EM_PARISC
309#define ELF_OSABI ELFOSABI_LINUX
310
311/* %r23 is set by ld.so to a pointer to a function which might be
312 registered using atexit. This provides a means for the dynamic
313 linker to call DT_FINI functions for shared libraries that have
314 been loaded before the code runs.
315
316 So that we can use the same startup file with static executables,
317 we start programs with a value of 0 to indicate that there is no
318 such function. */
319#define ELF_PLAT_INIT(_r, load_addr) _r->gr[23] = 0
320
321#define USE_ELF_CORE_DUMP
322#define ELF_EXEC_PAGESIZE 4096
323
324/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
325 use of this is to invoke "./ld.so someprog" to test out a new version of
326 the loader. We need to make sure that it is out of the way of the program
327 that it will "exec", and that there is sufficient room for the brk.
328
329 (2 * TASK_SIZE / 3) turns into something undefined when run through a
330 32 bit preprocessor and in some cases results in the kernel trying to map
331 ld.so to the kernel virtual base. Use a sane value instead. /Jes
332 */
333
334#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE + 0x01000000)
335
336/* This yields a mask that user programs can use to figure out what
337 instruction set this CPU supports. This could be done in user space,
338 but it's not easy, and we've already done it here. */
339
340#define ELF_HWCAP 0
341
342#endif
diff --git a/include/asm-parisc/emergency-restart.h b/include/asm-parisc/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/include/asm-parisc/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-parisc/errno.h b/include/asm-parisc/errno.h
deleted file mode 100644
index e2f3ddc796be..000000000000
--- a/include/asm-parisc/errno.h
+++ /dev/null
@@ -1,124 +0,0 @@
1#ifndef _PARISC_ERRNO_H
2#define _PARISC_ERRNO_H
3
4#include <asm-generic/errno-base.h>
5
6#define ENOMSG 35 /* No message of desired type */
7#define EIDRM 36 /* Identifier removed */
8#define ECHRNG 37 /* Channel number out of range */
9#define EL2NSYNC 38 /* Level 2 not synchronized */
10#define EL3HLT 39 /* Level 3 halted */
11#define EL3RST 40 /* Level 3 reset */
12#define ELNRNG 41 /* Link number out of range */
13#define EUNATCH 42 /* Protocol driver not attached */
14#define ENOCSI 43 /* No CSI structure available */
15#define EL2HLT 44 /* Level 2 halted */
16#define EDEADLK 45 /* Resource deadlock would occur */
17#define EDEADLOCK EDEADLK
18#define ENOLCK 46 /* No record locks available */
19#define EILSEQ 47 /* Illegal byte sequence */
20
21#define ENONET 50 /* Machine is not on the network */
22#define ENODATA 51 /* No data available */
23#define ETIME 52 /* Timer expired */
24#define ENOSR 53 /* Out of streams resources */
25#define ENOSTR 54 /* Device not a stream */
26#define ENOPKG 55 /* Package not installed */
27
28#define ENOLINK 57 /* Link has been severed */
29#define EADV 58 /* Advertise error */
30#define ESRMNT 59 /* Srmount error */
31#define ECOMM 60 /* Communication error on send */
32#define EPROTO 61 /* Protocol error */
33
34#define EMULTIHOP 64 /* Multihop attempted */
35
36#define EDOTDOT 66 /* RFS specific error */
37#define EBADMSG 67 /* Not a data message */
38#define EUSERS 68 /* Too many users */
39#define EDQUOT 69 /* Quota exceeded */
40#define ESTALE 70 /* Stale NFS file handle */
41#define EREMOTE 71 /* Object is remote */
42#define EOVERFLOW 72 /* Value too large for defined data type */
43
44/* these errnos are defined by Linux but not HPUX. */
45
46#define EBADE 160 /* Invalid exchange */
47#define EBADR 161 /* Invalid request descriptor */
48#define EXFULL 162 /* Exchange full */
49#define ENOANO 163 /* No anode */
50#define EBADRQC 164 /* Invalid request code */
51#define EBADSLT 165 /* Invalid slot */
52#define EBFONT 166 /* Bad font file format */
53#define ENOTUNIQ 167 /* Name not unique on network */
54#define EBADFD 168 /* File descriptor in bad state */
55#define EREMCHG 169 /* Remote address changed */
56#define ELIBACC 170 /* Can not access a needed shared library */
57#define ELIBBAD 171 /* Accessing a corrupted shared library */
58#define ELIBSCN 172 /* .lib section in a.out corrupted */
59#define ELIBMAX 173 /* Attempting to link in too many shared libraries */
60#define ELIBEXEC 174 /* Cannot exec a shared library directly */
61#define ERESTART 175 /* Interrupted system call should be restarted */
62#define ESTRPIPE 176 /* Streams pipe error */
63#define EUCLEAN 177 /* Structure needs cleaning */
64#define ENOTNAM 178 /* Not a XENIX named type file */
65#define ENAVAIL 179 /* No XENIX semaphores available */
66#define EISNAM 180 /* Is a named type file */
67#define EREMOTEIO 181 /* Remote I/O error */
68#define ENOMEDIUM 182 /* No medium found */
69#define EMEDIUMTYPE 183 /* Wrong medium type */
70#define ENOKEY 184 /* Required key not available */
71#define EKEYEXPIRED 185 /* Key has expired */
72#define EKEYREVOKED 186 /* Key has been revoked */
73#define EKEYREJECTED 187 /* Key was rejected by service */
74
75/* We now return you to your regularly scheduled HPUX. */
76
77#define ENOSYM 215 /* symbol does not exist in executable */
78#define ENOTSOCK 216 /* Socket operation on non-socket */
79#define EDESTADDRREQ 217 /* Destination address required */
80#define EMSGSIZE 218 /* Message too long */
81#define EPROTOTYPE 219 /* Protocol wrong type for socket */
82#define ENOPROTOOPT 220 /* Protocol not available */
83#define EPROTONOSUPPORT 221 /* Protocol not supported */
84#define ESOCKTNOSUPPORT 222 /* Socket type not supported */
85#define EOPNOTSUPP 223 /* Operation not supported on transport endpoint */
86#define EPFNOSUPPORT 224 /* Protocol family not supported */
87#define EAFNOSUPPORT 225 /* Address family not supported by protocol */
88#define EADDRINUSE 226 /* Address already in use */
89#define EADDRNOTAVAIL 227 /* Cannot assign requested address */
90#define ENETDOWN 228 /* Network is down */
91#define ENETUNREACH 229 /* Network is unreachable */
92#define ENETRESET 230 /* Network dropped connection because of reset */
93#define ECONNABORTED 231 /* Software caused connection abort */
94#define ECONNRESET 232 /* Connection reset by peer */
95#define ENOBUFS 233 /* No buffer space available */
96#define EISCONN 234 /* Transport endpoint is already connected */
97#define ENOTCONN 235 /* Transport endpoint is not connected */
98#define ESHUTDOWN 236 /* Cannot send after transport endpoint shutdown */
99#define ETOOMANYREFS 237 /* Too many references: cannot splice */
100#define EREFUSED ECONNREFUSED /* for HP's NFS apparently */
101#define ETIMEDOUT 238 /* Connection timed out */
102#define ECONNREFUSED 239 /* Connection refused */
103#define EREMOTERELEASE 240 /* Remote peer released connection */
104#define EHOSTDOWN 241 /* Host is down */
105#define EHOSTUNREACH 242 /* No route to host */
106
107#define EALREADY 244 /* Operation already in progress */
108#define EINPROGRESS 245 /* Operation now in progress */
109#define EWOULDBLOCK 246 /* Operation would block (Linux returns EAGAIN) */
110#define ENOTEMPTY 247 /* Directory not empty */
111#define ENAMETOOLONG 248 /* File name too long */
112#define ELOOP 249 /* Too many symbolic links encountered */
113#define ENOSYS 251 /* Function not implemented */
114
115#define ENOTSUP 252 /* Function not implemented (POSIX.4 / HPUX) */
116#define ECANCELLED 253 /* aio request was canceled before complete (POSIX.4 / HPUX) */
117#define ECANCELED ECANCELLED /* SuSv3 and Solaris wants one 'L' */
118
119/* for robust mutexes */
120#define EOWNERDEAD 254 /* Owner died */
121#define ENOTRECOVERABLE 255 /* State not recoverable */
122
123
124#endif
diff --git a/include/asm-parisc/fb.h b/include/asm-parisc/fb.h
deleted file mode 100644
index 4d503a023ab2..000000000000
--- a/include/asm-parisc/fb.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
12}
13
14static inline int fb_is_primary_device(struct fb_info *info)
15{
16 return 0;
17}
18
19#endif /* _ASM_FB_H_ */
diff --git a/include/asm-parisc/fcntl.h b/include/asm-parisc/fcntl.h
deleted file mode 100644
index 1e1c824764ee..000000000000
--- a/include/asm-parisc/fcntl.h
+++ /dev/null
@@ -1,39 +0,0 @@
1#ifndef _PARISC_FCNTL_H
2#define _PARISC_FCNTL_H
3
4/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
5 located on an ext2 file system */
6#define O_APPEND 000000010
7#define O_BLKSEEK 000000100 /* HPUX only */
8#define O_CREAT 000000400 /* not fcntl */
9#define O_EXCL 000002000 /* not fcntl */
10#define O_LARGEFILE 000004000
11#define O_SYNC 000100000
12#define O_NONBLOCK 000200004 /* HPUX has separate NDELAY & NONBLOCK */
13#define O_NOCTTY 000400000 /* not fcntl */
14#define O_DSYNC 001000000 /* HPUX only */
15#define O_RSYNC 002000000 /* HPUX only */
16#define O_NOATIME 004000000
17#define O_CLOEXEC 010000000 /* set close_on_exec */
18
19#define O_DIRECTORY 000010000 /* must be a directory */
20#define O_NOFOLLOW 000000200 /* don't follow links */
21#define O_INVISIBLE 004000000 /* invisible I/O, for DMAPI/XDSM */
22
23#define F_GETLK64 8
24#define F_SETLK64 9
25#define F_SETLKW64 10
26
27#define F_GETOWN 11 /* for sockets. */
28#define F_SETOWN 12 /* for sockets. */
29#define F_SETSIG 13 /* for sockets. */
30#define F_GETSIG 14 /* for sockets. */
31
32/* for posix fcntl() and lockf() */
33#define F_RDLCK 01
34#define F_WRLCK 02
35#define F_UNLCK 03
36
37#include <asm-generic/fcntl.h>
38
39#endif
diff --git a/include/asm-parisc/fixmap.h b/include/asm-parisc/fixmap.h
deleted file mode 100644
index de3fe3a18229..000000000000
--- a/include/asm-parisc/fixmap.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef _ASM_FIXMAP_H
2#define _ASM_FIXMAP_H
3
4/*
5 * This file defines the locations of the fixed mappings on parisc.
6 *
7 * All of the values in this file are machine virtual addresses.
8 *
9 * All of the values in this file must be <4GB (because of assembly
10 * loading restrictions). If you place this region anywhere above
11 * __PAGE_OFFSET, you must adjust the memory map accordingly */
12
13/* The alias region is used in kernel space to do copy/clear to or
14 * from areas congruently mapped with user space. It is 8MB large
15 * and must be 16MB aligned */
16#define TMPALIAS_MAP_START ((__PAGE_OFFSET) - 16*1024*1024)
17/* This is the kernel area for all maps (vmalloc, dma etc.) most
18 * usually, it extends up to TMPALIAS_MAP_START. Virtual addresses
19 * 0..GATEWAY_PAGE_SIZE are reserved for the gateway page */
20#define KERNEL_MAP_START (GATEWAY_PAGE_SIZE)
21#define KERNEL_MAP_END (TMPALIAS_MAP_START)
22
23#ifndef __ASSEMBLY__
24extern void *vmalloc_start;
25#define PCXL_DMA_MAP_SIZE (8*1024*1024)
26#define VMALLOC_START ((unsigned long)vmalloc_start)
27#define VMALLOC_END (KERNEL_MAP_END)
28#endif /*__ASSEMBLY__*/
29
30#endif /*_ASM_FIXMAP_H*/
diff --git a/include/asm-parisc/floppy.h b/include/asm-parisc/floppy.h
deleted file mode 100644
index 4ca69f558fae..000000000000
--- a/include/asm-parisc/floppy.h
+++ /dev/null
@@ -1,271 +0,0 @@
1/* Architecture specific parts of the Floppy driver
2 *
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
4 * Copyright (C) 2000 Matthew Wilcox (willy a debian . org)
5 * Copyright (C) 2000 Dave Kennedy
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_PARISC_FLOPPY_H
22#define __ASM_PARISC_FLOPPY_H
23
24#include <linux/vmalloc.h>
25
26
27/*
28 * The DMA channel used by the floppy controller cannot access data at
29 * addresses >= 16MB
30 *
31 * Went back to the 1MB limit, as some people had problems with the floppy
32 * driver otherwise. It doesn't matter much for performance anyway, as most
33 * floppy accesses go through the track buffer.
34 */
35#define _CROSS_64KB(a,s,vdma) \
36(!vdma && ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))
37
38#define CROSS_64KB(a,s) _CROSS_64KB(a,s,use_virtual_dma & 1)
39
40
41#define SW fd_routine[use_virtual_dma&1]
42#define CSW fd_routine[can_use_virtual_dma & 1]
43
44
45#define fd_inb(port) readb(port)
46#define fd_outb(value, port) writeb(value, port)
47
48#define fd_request_dma() CSW._request_dma(FLOPPY_DMA,"floppy")
49#define fd_free_dma() CSW._free_dma(FLOPPY_DMA)
50#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
51#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
52#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
53#define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
54#define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
55#define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
56
57#define FLOPPY_CAN_FALLBACK_ON_NODMA
58
59static int virtual_dma_count=0;
60static int virtual_dma_residue=0;
61static char *virtual_dma_addr=0;
62static int virtual_dma_mode=0;
63static int doing_pdma=0;
64
65static void floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
66{
67 register unsigned char st;
68
69#undef TRACE_FLPY_INT
70
71#ifdef TRACE_FLPY_INT
72 static int calls=0;
73 static int bytes=0;
74 static int dma_wait=0;
75#endif
76 if (!doing_pdma) {
77 floppy_interrupt(irq, dev_id, regs);
78 return;
79 }
80
81#ifdef TRACE_FLPY_INT
82 if(!calls)
83 bytes = virtual_dma_count;
84#endif
85
86 {
87 register int lcount;
88 register char *lptr = virtual_dma_addr;
89
90 for (lcount = virtual_dma_count; lcount; lcount--) {
91 st = fd_inb(virtual_dma_port+4) & 0xa0 ;
92 if (st != 0xa0)
93 break;
94 if (virtual_dma_mode) {
95 fd_outb(*lptr, virtual_dma_port+5);
96 } else {
97 *lptr = fd_inb(virtual_dma_port+5);
98 }
99 lptr++;
100 }
101 virtual_dma_count = lcount;
102 virtual_dma_addr = lptr;
103 st = fd_inb(virtual_dma_port+4);
104 }
105
106#ifdef TRACE_FLPY_INT
107 calls++;
108#endif
109 if (st == 0x20)
110 return;
111 if (!(st & 0x20)) {
112 virtual_dma_residue += virtual_dma_count;
113 virtual_dma_count = 0;
114#ifdef TRACE_FLPY_INT
115 printk("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n",
116 virtual_dma_count, virtual_dma_residue, calls, bytes,
117 dma_wait);
118 calls = 0;
119 dma_wait=0;
120#endif
121 doing_pdma = 0;
122 floppy_interrupt(irq, dev_id, regs);
123 return;
124 }
125#ifdef TRACE_FLPY_INT
126 if (!virtual_dma_count)
127 dma_wait++;
128#endif
129}
130
131static void fd_disable_dma(void)
132{
133 if(! (can_use_virtual_dma & 1))
134 disable_dma(FLOPPY_DMA);
135 doing_pdma = 0;
136 virtual_dma_residue += virtual_dma_count;
137 virtual_dma_count=0;
138}
139
140static int vdma_request_dma(unsigned int dmanr, const char * device_id)
141{
142 return 0;
143}
144
145static void vdma_nop(unsigned int dummy)
146{
147}
148
149
150static int vdma_get_dma_residue(unsigned int dummy)
151{
152 return virtual_dma_count + virtual_dma_residue;
153}
154
155
156static int fd_request_irq(void)
157{
158 if(can_use_virtual_dma)
159 return request_irq(FLOPPY_IRQ, floppy_hardint,
160 IRQF_DISABLED, "floppy", NULL);
161 else
162 return request_irq(FLOPPY_IRQ, floppy_interrupt,
163 IRQF_DISABLED, "floppy", NULL);
164}
165
166static unsigned long dma_mem_alloc(unsigned long size)
167{
168 return __get_dma_pages(GFP_KERNEL, get_order(size));
169}
170
171
172static unsigned long vdma_mem_alloc(unsigned long size)
173{
174 return (unsigned long) vmalloc(size);
175
176}
177
178#define nodma_mem_alloc(size) vdma_mem_alloc(size)
179
180static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
181{
182 if((unsigned int) addr >= (unsigned int) high_memory)
183 return vfree((void *)addr);
184 else
185 free_pages(addr, get_order(size));
186}
187
188#define fd_dma_mem_free(addr, size) _fd_dma_mem_free(addr, size)
189
190static void _fd_chose_dma_mode(char *addr, unsigned long size)
191{
192 if(can_use_virtual_dma == 2) {
193 if((unsigned int) addr >= (unsigned int) high_memory ||
194 virt_to_bus(addr) >= 0x1000000 ||
195 _CROSS_64KB(addr, size, 0))
196 use_virtual_dma = 1;
197 else
198 use_virtual_dma = 0;
199 } else {
200 use_virtual_dma = can_use_virtual_dma & 1;
201 }
202}
203
204#define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size)
205
206
207static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
208{
209 doing_pdma = 1;
210 virtual_dma_port = io;
211 virtual_dma_mode = (mode == DMA_MODE_WRITE);
212 virtual_dma_addr = addr;
213 virtual_dma_count = size;
214 virtual_dma_residue = 0;
215 return 0;
216}
217
218static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
219{
220#ifdef FLOPPY_SANITY_CHECK
221 if (CROSS_64KB(addr, size)) {
222 printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);
223 return -1;
224 }
225#endif
226 /* actual, physical DMA */
227 doing_pdma = 0;
228 clear_dma_ff(FLOPPY_DMA);
229 set_dma_mode(FLOPPY_DMA,mode);
230 set_dma_addr(FLOPPY_DMA,virt_to_bus(addr));
231 set_dma_count(FLOPPY_DMA,size);
232 enable_dma(FLOPPY_DMA);
233 return 0;
234}
235
236static struct fd_routine_l {
237 int (*_request_dma)(unsigned int dmanr, const char * device_id);
238 void (*_free_dma)(unsigned int dmanr);
239 int (*_get_dma_residue)(unsigned int dummy);
240 unsigned long (*_dma_mem_alloc) (unsigned long size);
241 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
242} fd_routine[] = {
243 {
244 request_dma,
245 free_dma,
246 get_dma_residue,
247 dma_mem_alloc,
248 hard_dma_setup
249 },
250 {
251 vdma_request_dma,
252 vdma_nop,
253 vdma_get_dma_residue,
254 vdma_mem_alloc,
255 vdma_dma_setup
256 }
257};
258
259
260static int FDC1 = 0x3f0; /* Lies. Floppy controller is memory mapped, not io mapped */
261static int FDC2 = -1;
262
263#define FLOPPY0_TYPE 0
264#define FLOPPY1_TYPE 0
265
266#define N_FDC 1
267#define N_DRIVE 8
268
269#define EXTRA_FLOPPY_PARAMS
270
271#endif /* __ASM_PARISC_FLOPPY_H */
diff --git a/include/asm-parisc/futex.h b/include/asm-parisc/futex.h
deleted file mode 100644
index 0c705c3a55ef..000000000000
--- a/include/asm-parisc/futex.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#ifndef _ASM_PARISC_FUTEX_H
2#define _ASM_PARISC_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <linux/uaccess.h>
8#include <asm/errno.h>
9
10static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
12{
13 int op = (encoded_op >> 28) & 7;
14 int cmp = (encoded_op >> 24) & 15;
15 int oparg = (encoded_op << 8) >> 20;
16 int cmparg = (encoded_op << 20) >> 20;
17 int oldval = 0, ret;
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg;
20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
22 return -EFAULT;
23
24 pagefault_disable();
25
26 switch (op) {
27 case FUTEX_OP_SET:
28 case FUTEX_OP_ADD:
29 case FUTEX_OP_OR:
30 case FUTEX_OP_ANDN:
31 case FUTEX_OP_XOR:
32 default:
33 ret = -ENOSYS;
34 }
35
36 pagefault_enable();
37
38 if (!ret) {
39 switch (cmp) {
40 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
41 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
42 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
43 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
44 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
45 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
46 default: ret = -ENOSYS;
47 }
48 }
49 return ret;
50}
51
52/* Non-atomic version */
53static inline int
54futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
55{
56 int err = 0;
57 int uval;
58
59 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
60 * our gateway page, and causes no end of trouble...
61 */
62 if (segment_eq(KERNEL_DS, get_fs()) && !uaddr)
63 return -EFAULT;
64
65 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
66 return -EFAULT;
67
68 err = get_user(uval, uaddr);
69 if (err) return -EFAULT;
70 if (uval == oldval)
71 err = put_user(newval, uaddr);
72 if (err) return -EFAULT;
73 return uval;
74}
75
76#endif /*__KERNEL__*/
77#endif /*_ASM_PARISC_FUTEX_H*/
diff --git a/include/asm-parisc/grfioctl.h b/include/asm-parisc/grfioctl.h
deleted file mode 100644
index 671e06042b40..000000000000
--- a/include/asm-parisc/grfioctl.h
+++ /dev/null
@@ -1,113 +0,0 @@
1/* Architecture specific parts of HP's STI (framebuffer) driver.
2 * Structures are HP-UX compatible for XFree86 usage.
3 *
4 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Copyright (C) 2001 Helge Deller (deller a parisc-linux org)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __ASM_PARISC_GRFIOCTL_H
23#define __ASM_PARISC_GRFIOCTL_H
24
25/* upper 32 bits of graphics id (HP/UX identifier) */
26
27#define GRFGATOR 8
28#define S9000_ID_S300 9
29#define GRFBOBCAT 9
30#define GRFCATSEYE 9
31#define S9000_ID_98720 10
32#define GRFRBOX 10
33#define S9000_ID_98550 11
34#define GRFFIREEYE 11
35#define S9000_ID_A1096A 12
36#define GRFHYPERION 12
37#define S9000_ID_FRI 13
38#define S9000_ID_98730 14
39#define GRFDAVINCI 14
40#define S9000_ID_98705 0x26C08070 /* Tigershark */
41#define S9000_ID_98736 0x26D148AB
42#define S9000_ID_A1659A 0x26D1482A /* CRX 8 plane color (=ELK) */
43#define S9000_ID_ELK S9000_ID_A1659A
44#define S9000_ID_A1439A 0x26D148EE /* CRX24 = CRX+ (24-plane color) */
45#define S9000_ID_A1924A 0x26D1488C /* GRX gray-scale */
46#define S9000_ID_ELM S9000_ID_A1924A
47#define S9000_ID_98765 0x27480DEF
48#define S9000_ID_ELK_768 0x27482101
49#define S9000_ID_STINGER 0x27A4A402
50#define S9000_ID_TIMBER 0x27F12392 /* Bushmaster (710) Graphics */
51#define S9000_ID_TOMCAT 0x27FCCB6D /* dual-headed ELK (Dual CRX) */
52#define S9000_ID_ARTIST 0x2B4DED6D /* Artist (Gecko/712 & 715) onboard Graphics */
53#define S9000_ID_HCRX 0x2BCB015A /* Hyperdrive/Hyperbowl (A4071A) Graphics */
54#define CRX24_OVERLAY_PLANES 0x920825AA /* Overlay planes on CRX24 */
55
56#define CRT_ID_ELK_1024 S9000_ID_ELK_768 /* Elk 1024x768 CRX */
57#define CRT_ID_ELK_1280 S9000_ID_A1659A /* Elk 1280x1024 CRX */
58#define CRT_ID_ELK_1024DB 0x27849CA5 /* Elk 1024x768 double buffer */
59#define CRT_ID_ELK_GS S9000_ID_A1924A /* Elk 1280x1024 GreyScale */
60#define CRT_ID_CRX24 S9000_ID_A1439A /* Piranha */
61#define CRT_ID_VISUALIZE_EG 0x2D08C0A7 /* Graffiti, A4450A (built-in B132+/B160L) */
62#define CRT_ID_THUNDER 0x2F23E5FC /* Thunder 1 VISUALIZE 48*/
63#define CRT_ID_THUNDER2 0x2F8D570E /* Thunder 2 VISUALIZE 48 XP*/
64#define CRT_ID_HCRX S9000_ID_HCRX /* Hyperdrive HCRX */
65#define CRT_ID_CRX48Z S9000_ID_STINGER /* Stinger */
66#define CRT_ID_DUAL_CRX S9000_ID_TOMCAT /* Tomcat */
67#define CRT_ID_PVRX S9000_ID_98705 /* Tigershark */
68#define CRT_ID_TIMBER S9000_ID_TIMBER /* Timber (710 builtin) */
69#define CRT_ID_TVRX S9000_ID_98765 /* TVRX (gto/falcon) */
70#define CRT_ID_ARTIST S9000_ID_ARTIST /* Artist */
71#define CRT_ID_SUMMIT 0x2FC1066B /* Summit FX2, FX4, FX6 ... */
72#define CRT_ID_LEGO 0x35ACDA30 /* Lego FX5, FX10 ... */
73#define CRT_ID_PINNACLE 0x35ACDA16 /* Pinnacle FXe */
74
75/* structure for ioctl(GCDESCRIBE) */
76
77#define gaddr_t unsigned long /* FIXME: PA2.0 (64bit) portable ? */
78
79struct grf_fbinfo {
80 unsigned int id; /* upper 32 bits of graphics id */
81 unsigned int mapsize; /* mapped size of framebuffer */
82 unsigned int dwidth, dlength;/* x and y sizes */
83 unsigned int width, length; /* total x and total y size */
84 unsigned int xlen; /* x pitch size */
85 unsigned int bpp, bppu; /* bits per pixel and used bpp */
86 unsigned int npl, nplbytes; /* # of planes and bytes per plane */
87 char name[32]; /* name of the device (from ROM) */
88 unsigned int attr; /* attributes */
89 gaddr_t fbbase, regbase;/* framebuffer and register base addr */
90 gaddr_t regions[6]; /* region bases */
91};
92
93#define GCID _IOR('G', 0, int)
94#define GCON _IO('G', 1)
95#define GCOFF _IO('G', 2)
96#define GCAON _IO('G', 3)
97#define GCAOFF _IO('G', 4)
98#define GCMAP _IOWR('G', 5, int)
99#define GCUNMAP _IOWR('G', 6, int)
100#define GCMAP_HPUX _IO('G', 5)
101#define GCUNMAP_HPUX _IO('G', 6)
102#define GCLOCK _IO('G', 7)
103#define GCUNLOCK _IO('G', 8)
104#define GCLOCK_MINIMUM _IO('G', 9)
105#define GCUNLOCK_MINIMUM _IO('G', 10)
106#define GCSTATIC_CMAP _IO('G', 11)
107#define GCVARIABLE_CMAP _IO('G', 12)
108#define GCTERM _IOWR('G',20,int) /* multi-headed Tomcat */
109#define GCDESCRIBE _IOR('G', 21, struct grf_fbinfo)
110#define GCFASTLOCK _IO('G', 26)
111
112#endif /* __ASM_PARISC_GRFIOCTL_H */
113
diff --git a/include/asm-parisc/hardirq.h b/include/asm-parisc/hardirq.h
deleted file mode 100644
index ce93133d5112..000000000000
--- a/include/asm-parisc/hardirq.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/* hardirq.h: PA-RISC hard IRQ support.
2 *
3 * Copyright (C) 2001 Matthew Wilcox <matthew@wil.cx>
4 *
5 * The locking is really quite interesting. There's a cpu-local
6 * count of how many interrupts are being handled, and a global
7 * lock. An interrupt can only be serviced if the global lock
8 * is free. You can't be sure no more interrupts are being
9 * serviced until you've acquired the lock and then checked
10 * all the per-cpu interrupt counts are all zero. It's a specialised
11 * br_lock, and that's exactly how Sparc does it. We don't because
12 * it's more locking for us. This way is lock-free in the interrupt path.
13 */
14
15#ifndef _PARISC_HARDIRQ_H
16#define _PARISC_HARDIRQ_H
17
18#include <linux/threads.h>
19#include <linux/irq.h>
20
21typedef struct {
22 unsigned long __softirq_pending; /* set_bit is used on this */
23} ____cacheline_aligned irq_cpustat_t;
24
25#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
26
27void ack_bad_irq(unsigned int irq);
28
29#endif /* _PARISC_HARDIRQ_H */
diff --git a/include/asm-parisc/hardware.h b/include/asm-parisc/hardware.h
deleted file mode 100644
index 4e9626836bab..000000000000
--- a/include/asm-parisc/hardware.h
+++ /dev/null
@@ -1,127 +0,0 @@
1#ifndef _PARISC_HARDWARE_H
2#define _PARISC_HARDWARE_H
3
4#include <linux/mod_devicetable.h>
5#include <asm/pdc.h>
6
7#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID
8#define HVERSION_ANY_ID PA_HVERSION_ANY_ID
9#define HVERSION_REV_ANY_ID PA_HVERSION_REV_ANY_ID
10#define SVERSION_ANY_ID PA_SVERSION_ANY_ID
11
12struct hp_hardware {
13 unsigned short hw_type:5; /* HPHW_xxx */
14 unsigned short hversion;
15 unsigned long sversion:28;
16 unsigned short opt;
17 const char name[80]; /* The hardware description */
18};
19
20struct parisc_device;
21
22enum cpu_type {
23 pcx = 0, /* pa7000 pa 1.0 */
24 pcxs = 1, /* pa7000 pa 1.1a */
25 pcxt = 2, /* pa7100 pa 1.1b */
26 pcxt_ = 3, /* pa7200 (t') pa 1.1c */
27 pcxl = 4, /* pa7100lc pa 1.1d */
28 pcxl2 = 5, /* pa7300lc pa 1.1e */
29 pcxu = 6, /* pa8000 pa 2.0 */
30 pcxu_ = 7, /* pa8200 (u+) pa 2.0 */
31 pcxw = 8, /* pa8500 pa 2.0 */
32 pcxw_ = 9, /* pa8600 (w+) pa 2.0 */
33 pcxw2 = 10, /* pa8700 pa 2.0 */
34 mako = 11, /* pa8800 pa 2.0 */
35 mako2 = 12 /* pa8900 pa 2.0 */
36};
37
38extern const char * const cpu_name_version[][2]; /* mapping from enum cpu_type to strings */
39
40struct parisc_driver;
41
42struct io_module {
43 volatile uint32_t nothing; /* reg 0 */
44 volatile uint32_t io_eim;
45 volatile uint32_t io_dc_adata;
46 volatile uint32_t io_ii_cdata;
47 volatile uint32_t io_dma_link; /* reg 4 */
48 volatile uint32_t io_dma_command;
49 volatile uint32_t io_dma_address;
50 volatile uint32_t io_dma_count;
51 volatile uint32_t io_flex; /* reg 8 */
52 volatile uint32_t io_spa_address;
53 volatile uint32_t reserved1[2];
54 volatile uint32_t io_command; /* reg 12 */
55 volatile uint32_t io_status;
56 volatile uint32_t io_control;
57 volatile uint32_t io_data;
58 volatile uint32_t reserved2; /* reg 16 */
59 volatile uint32_t chain_addr;
60 volatile uint32_t sub_mask_clr;
61 volatile uint32_t reserved3[13];
62 volatile uint32_t undefined[480];
63 volatile uint32_t unpriv[512];
64};
65
66struct bc_module {
67 volatile uint32_t unused1[12];
68 volatile uint32_t io_command;
69 volatile uint32_t io_status;
70 volatile uint32_t io_control;
71 volatile uint32_t unused2[1];
72 volatile uint32_t io_err_resp;
73 volatile uint32_t io_err_info;
74 volatile uint32_t io_err_req;
75 volatile uint32_t unused3[11];
76 volatile uint32_t io_io_low;
77 volatile uint32_t io_io_high;
78};
79
80#define HPHW_NPROC 0
81#define HPHW_MEMORY 1
82#define HPHW_B_DMA 2
83#define HPHW_OBSOLETE 3
84#define HPHW_A_DMA 4
85#define HPHW_A_DIRECT 5
86#define HPHW_OTHER 6
87#define HPHW_BCPORT 7
88#define HPHW_CIO 8
89#define HPHW_CONSOLE 9
90#define HPHW_FIO 10
91#define HPHW_BA 11
92#define HPHW_IOA 12
93#define HPHW_BRIDGE 13
94#define HPHW_FABRIC 14
95#define HPHW_MC 15
96#define HPHW_FAULTY 31
97
98
99/* hardware.c: */
100extern const char *parisc_hardware_description(struct parisc_device_id *id);
101extern enum cpu_type parisc_get_cpu_type(unsigned long hversion);
102
103struct pci_dev;
104
105/* drivers.c: */
106extern struct parisc_device *alloc_pa_dev(unsigned long hpa,
107 struct hardware_path *path);
108extern int register_parisc_device(struct parisc_device *dev);
109extern int register_parisc_driver(struct parisc_driver *driver);
110extern int count_parisc_driver(struct parisc_driver *driver);
111extern int unregister_parisc_driver(struct parisc_driver *driver);
112extern void walk_central_bus(void);
113extern const struct parisc_device *find_pa_parent_type(const struct parisc_device *, int);
114extern void print_parisc_devices(void);
115extern char *print_pa_hwpath(struct parisc_device *dev, char *path);
116extern char *print_pci_hwpath(struct pci_dev *dev, char *path);
117extern void get_pci_node_path(struct pci_dev *dev, struct hardware_path *path);
118extern void init_parisc_bus(void);
119extern struct device *hwpath_to_device(struct hardware_path *modpath);
120extern void device_to_hwpath(struct device *dev, struct hardware_path *path);
121
122
123/* inventory.c: */
124extern void do_memory_inventory(void);
125extern void do_device_inventory(void);
126
127#endif /* _PARISC_HARDWARE_H */
diff --git a/include/asm-parisc/hw_irq.h b/include/asm-parisc/hw_irq.h
deleted file mode 100644
index 6707f7df3921..000000000000
--- a/include/asm-parisc/hw_irq.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASM_HW_IRQ_H
2#define _ASM_HW_IRQ_H
3
4/*
5 * linux/include/asm/hw_irq.h
6 */
7
8#endif
diff --git a/include/asm-parisc/ide.h b/include/asm-parisc/ide.h
deleted file mode 100644
index c246ef75017d..000000000000
--- a/include/asm-parisc/ide.h
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * linux/include/asm-parisc/ide.h
3 *
4 * Copyright (C) 1994-1996 Linus Torvalds & authors
5 */
6
7/*
8 * This file contains the PARISC architecture specific IDE code.
9 */
10
11#ifndef __ASM_PARISC_IDE_H
12#define __ASM_PARISC_IDE_H
13
14#ifdef __KERNEL__
15
16#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id))
17#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id))
18#define ide_request_region(from,extent,name) request_region((from), (extent), (name))
19#define ide_release_region(from,extent) release_region((from), (extent))
20/* Generic I/O and MEMIO string operations. */
21
22#define __ide_insw insw
23#define __ide_insl insl
24#define __ide_outsw outsw
25#define __ide_outsl outsl
26
27static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
28{
29 while (count--) {
30 *(u16 *)addr = __raw_readw(port);
31 addr += 2;
32 }
33}
34
35static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
36{
37 while (count--) {
38 *(u32 *)addr = __raw_readl(port);
39 addr += 4;
40 }
41}
42
43static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
44{
45 while (count--) {
46 __raw_writew(*(u16 *)addr, port);
47 addr += 2;
48 }
49}
50
51static __inline__ void __ide_mm_outsl(void __iomem *port, void *addr, u32 count)
52{
53 while (count--) {
54 __raw_writel(*(u32 *)addr, port);
55 addr += 4;
56 }
57}
58
59#endif /* __KERNEL__ */
60
61#endif /* __ASM_PARISC_IDE_H */
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
deleted file mode 100644
index 55ddb1842107..000000000000
--- a/include/asm-parisc/io.h
+++ /dev/null
@@ -1,293 +0,0 @@
1#ifndef _ASM_IO_H
2#define _ASM_IO_H
3
4#include <linux/types.h>
5#include <asm/pgtable.h>
6
7extern unsigned long parisc_vmerge_boundary;
8extern unsigned long parisc_vmerge_max_size;
9
10#define BIO_VMERGE_BOUNDARY parisc_vmerge_boundary
11#define BIO_VMERGE_MAX_SIZE parisc_vmerge_max_size
12
13#define virt_to_phys(a) ((unsigned long)__pa(a))
14#define phys_to_virt(a) __va(a)
15#define virt_to_bus virt_to_phys
16#define bus_to_virt phys_to_virt
17
18static inline unsigned long isa_bus_to_virt(unsigned long addr) {
19 BUG();
20 return 0;
21}
22
23static inline unsigned long isa_virt_to_bus(void *addr) {
24 BUG();
25 return 0;
26}
27
28/*
29 * Memory mapped I/O
30 *
31 * readX()/writeX() do byteswapping and take an ioremapped address
32 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
33 * gsc_*() don't byteswap and operate on physical addresses;
34 * eg dev->hpa or 0xfee00000.
35 */
36
37static inline unsigned char gsc_readb(unsigned long addr)
38{
39 long flags;
40 unsigned char ret;
41
42 __asm__ __volatile__(
43 " rsm 2,%0\n"
44 " ldbx 0(%2),%1\n"
45 " mtsm %0\n"
46 : "=&r" (flags), "=r" (ret) : "r" (addr) );
47
48 return ret;
49}
50
51static inline unsigned short gsc_readw(unsigned long addr)
52{
53 long flags;
54 unsigned short ret;
55
56 __asm__ __volatile__(
57 " rsm 2,%0\n"
58 " ldhx 0(%2),%1\n"
59 " mtsm %0\n"
60 : "=&r" (flags), "=r" (ret) : "r" (addr) );
61
62 return ret;
63}
64
65static inline unsigned int gsc_readl(unsigned long addr)
66{
67 u32 ret;
68
69 __asm__ __volatile__(
70 " ldwax 0(%1),%0\n"
71 : "=r" (ret) : "r" (addr) );
72
73 return ret;
74}
75
76static inline unsigned long long gsc_readq(unsigned long addr)
77{
78 unsigned long long ret;
79
80#ifdef CONFIG_64BIT
81 __asm__ __volatile__(
82 " ldda 0(%1),%0\n"
83 : "=r" (ret) : "r" (addr) );
84#else
85 /* two reads may have side effects.. */
86 ret = ((u64) gsc_readl(addr)) << 32;
87 ret |= gsc_readl(addr+4);
88#endif
89 return ret;
90}
91
92static inline void gsc_writeb(unsigned char val, unsigned long addr)
93{
94 long flags;
95 __asm__ __volatile__(
96 " rsm 2,%0\n"
97 " stbs %1,0(%2)\n"
98 " mtsm %0\n"
99 : "=&r" (flags) : "r" (val), "r" (addr) );
100}
101
102static inline void gsc_writew(unsigned short val, unsigned long addr)
103{
104 long flags;
105 __asm__ __volatile__(
106 " rsm 2,%0\n"
107 " sths %1,0(%2)\n"
108 " mtsm %0\n"
109 : "=&r" (flags) : "r" (val), "r" (addr) );
110}
111
112static inline void gsc_writel(unsigned int val, unsigned long addr)
113{
114 __asm__ __volatile__(
115 " stwas %0,0(%1)\n"
116 : : "r" (val), "r" (addr) );
117}
118
119static inline void gsc_writeq(unsigned long long val, unsigned long addr)
120{
121#ifdef CONFIG_64BIT
122 __asm__ __volatile__(
123 " stda %0,0(%1)\n"
124 : : "r" (val), "r" (addr) );
125#else
126 /* two writes may have side effects.. */
127 gsc_writel(val >> 32, addr);
128 gsc_writel(val, addr+4);
129#endif
130}
131
132/*
133 * The standard PCI ioremap interfaces
134 */
135
136extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
137
138/* Most machines react poorly to I/O-space being cacheable... Instead let's
139 * define ioremap() in terms of ioremap_nocache().
140 */
141static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
142{
143 return __ioremap(offset, size, _PAGE_NO_CACHE);
144}
145#define ioremap_nocache(off, sz) ioremap((off), (sz))
146
147extern void iounmap(const volatile void __iomem *addr);
148
149static inline unsigned char __raw_readb(const volatile void __iomem *addr)
150{
151 return (*(volatile unsigned char __force *) (addr));
152}
153static inline unsigned short __raw_readw(const volatile void __iomem *addr)
154{
155 return *(volatile unsigned short __force *) addr;
156}
157static inline unsigned int __raw_readl(const volatile void __iomem *addr)
158{
159 return *(volatile unsigned int __force *) addr;
160}
161static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
162{
163 return *(volatile unsigned long long __force *) addr;
164}
165
166static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
167{
168 *(volatile unsigned char __force *) addr = b;
169}
170static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
171{
172 *(volatile unsigned short __force *) addr = b;
173}
174static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
175{
176 *(volatile unsigned int __force *) addr = b;
177}
178static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
179{
180 *(volatile unsigned long long __force *) addr = b;
181}
182
183/* readb can never be const, so use __fswab instead of le*_to_cpu */
184#define readb(addr) __raw_readb(addr)
185#define readw(addr) __fswab16(__raw_readw(addr))
186#define readl(addr) __fswab32(__raw_readl(addr))
187#define readq(addr) __fswab64(__raw_readq(addr))
188#define writeb(b, addr) __raw_writeb(b, addr)
189#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr)
190#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr)
191#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
192
193#define readb_relaxed(addr) readb(addr)
194#define readw_relaxed(addr) readw(addr)
195#define readl_relaxed(addr) readl(addr)
196#define readq_relaxed(addr) readq(addr)
197
198#define mmiowb() do { } while (0)
199
200void memset_io(volatile void __iomem *addr, unsigned char val, int count);
201void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
202void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
203
204/* Port-space IO */
205
206#define inb_p inb
207#define inw_p inw
208#define inl_p inl
209#define outb_p outb
210#define outw_p outw
211#define outl_p outl
212
213extern unsigned char eisa_in8(unsigned short port);
214extern unsigned short eisa_in16(unsigned short port);
215extern unsigned int eisa_in32(unsigned short port);
216extern void eisa_out8(unsigned char data, unsigned short port);
217extern void eisa_out16(unsigned short data, unsigned short port);
218extern void eisa_out32(unsigned int data, unsigned short port);
219
220#if defined(CONFIG_PCI)
221extern unsigned char inb(int addr);
222extern unsigned short inw(int addr);
223extern unsigned int inl(int addr);
224
225extern void outb(unsigned char b, int addr);
226extern void outw(unsigned short b, int addr);
227extern void outl(unsigned int b, int addr);
228#elif defined(CONFIG_EISA)
229#define inb eisa_in8
230#define inw eisa_in16
231#define inl eisa_in32
232#define outb eisa_out8
233#define outw eisa_out16
234#define outl eisa_out32
235#else
236static inline char inb(unsigned long addr)
237{
238 BUG();
239 return -1;
240}
241
242static inline short inw(unsigned long addr)
243{
244 BUG();
245 return -1;
246}
247
248static inline int inl(unsigned long addr)
249{
250 BUG();
251 return -1;
252}
253
254#define outb(x, y) BUG()
255#define outw(x, y) BUG()
256#define outl(x, y) BUG()
257#endif
258
259/*
260 * String versions of in/out ops:
261 */
262extern void insb (unsigned long port, void *dst, unsigned long count);
263extern void insw (unsigned long port, void *dst, unsigned long count);
264extern void insl (unsigned long port, void *dst, unsigned long count);
265extern void outsb (unsigned long port, const void *src, unsigned long count);
266extern void outsw (unsigned long port, const void *src, unsigned long count);
267extern void outsl (unsigned long port, const void *src, unsigned long count);
268
269
270/* IO Port space is : BBiiii where BB is HBA number. */
271#define IO_SPACE_LIMIT 0x00ffffff
272
273/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
274 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
275 * mode (essentially just sign extending. This macro takes in a 32
276 * bit I/O address (still with the leading f) and outputs the correct
277 * value for either 32 or 64 bit mode */
278#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
279
280#include <asm-generic/iomap.h>
281
282/*
283 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
284 * access
285 */
286#define xlate_dev_mem_ptr(p) __va(p)
287
288/*
289 * Convert a virtual cached pointer to an uncached pointer
290 */
291#define xlate_dev_kmem_ptr(p) p
292
293#endif
diff --git a/include/asm-parisc/ioctl.h b/include/asm-parisc/ioctl.h
deleted file mode 100644
index ec8efa02beda..000000000000
--- a/include/asm-parisc/ioctl.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
3 * Copyright (C) 1999,2003 Matthew Wilcox < willy at debian . org >
4 * portions from "linux/ioctl.h for Linux" by H.H. Bergman.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21
22#ifndef _ASM_PARISC_IOCTL_H
23#define _ASM_PARISC_IOCTL_H
24
25/* ioctl command encoding: 32 bits total, command in lower 16 bits,
26 * size of the parameter structure in the lower 14 bits of the
27 * upper 16 bits.
28 * Encoding the size of the parameter structure in the ioctl request
29 * is useful for catching programs compiled with old versions
30 * and to avoid overwriting user space outside the user buffer area.
31 * The highest 2 bits are reserved for indicating the ``access mode''.
32 * NOTE: This limits the max parameter size to 16kB -1 !
33 */
34
35/*
36 * Direction bits.
37 */
38#define _IOC_NONE 0U
39#define _IOC_WRITE 2U
40#define _IOC_READ 1U
41
42#include <asm-generic/ioctl.h>
43
44#endif /* _ASM_PARISC_IOCTL_H */
diff --git a/include/asm-parisc/ioctls.h b/include/asm-parisc/ioctls.h
deleted file mode 100644
index 6747fad07a3e..000000000000
--- a/include/asm-parisc/ioctls.h
+++ /dev/null
@@ -1,90 +0,0 @@
1#ifndef __ARCH_PARISC_IOCTLS_H__
2#define __ARCH_PARISC_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS _IOR('T', 16, struct termios) /* TCGETATTR */
9#define TCSETS _IOW('T', 17, struct termios) /* TCSETATTR */
10#define TCSETSW _IOW('T', 18, struct termios) /* TCSETATTRD */
11#define TCSETSF _IOW('T', 19, struct termios) /* TCSETATTRF */
12#define TCGETA _IOR('T', 1, struct termio)
13#define TCSETA _IOW('T', 2, struct termio)
14#define TCSETAW _IOW('T', 3, struct termio)
15#define TCSETAF _IOW('T', 4, struct termio)
16#define TCSBRK _IO('T', 5)
17#define TCXONC _IO('T', 6)
18#define TCFLSH _IO('T', 7)
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP _IOR('T', 30, int)
23#define TIOCSPGRP _IOW('T', 29, int)
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCSBRK 0x5427 /* BSD compatibility */
47#define TIOCCBRK 0x5428 /* BSD compatibility */
48#define TIOCGSID _IOR('T', 20, int) /* Return the session ID of FD */
49#define TCGETS2 _IOR('T',0x2A, struct termios2)
50#define TCSETS2 _IOW('T',0x2B, struct termios2)
51#define TCSETSW2 _IOW('T',0x2C, struct termios2)
52#define TCSETSF2 _IOW('T',0x2D, struct termios2)
53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
55
56#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
57#define FIOCLEX 0x5451
58#define FIOASYNC 0x5452
59#define TIOCSERCONFIG 0x5453
60#define TIOCSERGWILD 0x5454
61#define TIOCSERSWILD 0x5455
62#define TIOCGLCKTRMIOS 0x5456
63#define TIOCSLCKTRMIOS 0x5457
64#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
65#define TIOCSERGETLSR 0x5459 /* Get line status register */
66#define TIOCSERGETMULTI 0x545A /* Get multiport config */
67#define TIOCSERSETMULTI 0x545B /* Set multiport config */
68
69#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
70#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
71#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
72#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
73#define FIOQSIZE 0x5460 /* Get exact space used by quota */
74
75#define TIOCSTART 0x5461
76#define TIOCSTOP 0x5462
77#define TIOCSLTC 0x5462
78
79/* Used for packet mode */
80#define TIOCPKT_DATA 0
81#define TIOCPKT_FLUSHREAD 1
82#define TIOCPKT_FLUSHWRITE 2
83#define TIOCPKT_STOP 4
84#define TIOCPKT_START 8
85#define TIOCPKT_NOSTOP 16
86#define TIOCPKT_DOSTOP 32
87
88#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
89
90#endif /* _ASM_PARISC_IOCTLS_H */
diff --git a/include/asm-parisc/ipcbuf.h b/include/asm-parisc/ipcbuf.h
deleted file mode 100644
index bd956c425785..000000000000
--- a/include/asm-parisc/ipcbuf.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef __PARISC_IPCBUF_H__
2#define __PARISC_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for PA-RISC is almost identical to
6 * kern_ipc_perm as we have always had 32-bit UIDs and GIDs in the kernel.
7 * 'seq' has been changed from long to int so that it's the same size
8 * on 64-bit kernels as on 32-bit ones.
9 */
10
11struct ipc64_perm
12{
13 key_t key;
14 uid_t uid;
15 gid_t gid;
16 uid_t cuid;
17 gid_t cgid;
18 unsigned short int __pad1;
19 mode_t mode;
20 unsigned short int __pad2;
21 unsigned short int seq;
22 unsigned int __pad3;
23 unsigned long long int __unused1;
24 unsigned long long int __unused2;
25};
26
27#endif /* __PARISC_IPCBUF_H__ */
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
deleted file mode 100644
index 399c81981ed5..000000000000
--- a/include/asm-parisc/irq.h
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * include/asm-parisc/irq.h
3 *
4 * Copyright 2005 Matthew Wilcox <matthew@wil.cx>
5 */
6
7#ifndef _ASM_PARISC_IRQ_H
8#define _ASM_PARISC_IRQ_H
9
10#include <linux/cpumask.h>
11#include <asm/types.h>
12
13#define NO_IRQ (-1)
14
15#ifdef CONFIG_GSC
16#define GSC_IRQ_BASE 16
17#define GSC_IRQ_MAX 63
18#define CPU_IRQ_BASE 64
19#else
20#define CPU_IRQ_BASE 16
21#endif
22
23#define TIMER_IRQ (CPU_IRQ_BASE + 0)
24#define IPI_IRQ (CPU_IRQ_BASE + 1)
25#define CPU_IRQ_MAX (CPU_IRQ_BASE + (BITS_PER_LONG - 1))
26
27#define NR_IRQS (CPU_IRQ_MAX + 1)
28
29static __inline__ int irq_canonicalize(int irq)
30{
31 return (irq == 2) ? 9 : irq;
32}
33
34struct irq_chip;
35
36/*
37 * Some useful "we don't have to do anything here" handlers. Should
38 * probably be provided by the generic code.
39 */
40void no_ack_irq(unsigned int irq);
41void no_end_irq(unsigned int irq);
42void cpu_ack_irq(unsigned int irq);
43void cpu_end_irq(unsigned int irq);
44
45extern int txn_alloc_irq(unsigned int nbits);
46extern int txn_claim_irq(int);
47extern unsigned int txn_alloc_data(unsigned int);
48extern unsigned long txn_alloc_addr(unsigned int);
49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
50
51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
52extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
53
54/* soft power switch support (power.c) */
55extern struct tasklet_struct power_tasklet;
56
57#endif /* _ASM_PARISC_IRQ_H */
diff --git a/include/asm-parisc/irq_regs.h b/include/asm-parisc/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/include/asm-parisc/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/include/asm-parisc/kdebug.h b/include/asm-parisc/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/include/asm-parisc/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/include/asm-parisc/kmap_types.h b/include/asm-parisc/kmap_types.h
deleted file mode 100644
index 806aae3c5338..000000000000
--- a/include/asm-parisc/kmap_types.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef _ASM_KMAP_TYPES_H
2#define _ASM_KMAP_TYPES_H
3
4
5#ifdef CONFIG_DEBUG_HIGHMEM
6# define D(n) __KM_FENCE_##n ,
7#else
8# define D(n)
9#endif
10
11enum km_type {
12D(0) KM_BOUNCE_READ,
13D(1) KM_SKB_SUNRPC_DATA,
14D(2) KM_SKB_DATA_SOFTIRQ,
15D(3) KM_USER0,
16D(4) KM_USER1,
17D(5) KM_BIO_SRC_IRQ,
18D(6) KM_BIO_DST_IRQ,
19D(7) KM_PTE0,
20D(8) KM_PTE1,
21D(9) KM_IRQ0,
22D(10) KM_IRQ1,
23D(11) KM_SOFTIRQ0,
24D(12) KM_SOFTIRQ1,
25D(13) KM_TYPE_NR
26};
27
28#undef D
29
30#endif
diff --git a/include/asm-parisc/led.h b/include/asm-parisc/led.h
deleted file mode 100644
index c3405ab9d60a..000000000000
--- a/include/asm-parisc/led.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef LED_H
2#define LED_H
3
4#define LED7 0x80 /* top (or furthest right) LED */
5#define LED6 0x40
6#define LED5 0x20
7#define LED4 0x10
8#define LED3 0x08
9#define LED2 0x04
10#define LED1 0x02
11#define LED0 0x01 /* bottom (or furthest left) LED */
12
13#define LED_LAN_TX LED0 /* for LAN transmit activity */
14#define LED_LAN_RCV LED1 /* for LAN receive activity */
15#define LED_DISK_IO LED2 /* for disk activity */
16#define LED_HEARTBEAT LED3 /* heartbeat */
17
18/* values for pdc_chassis_lcd_info_ret_block.model: */
19#define DISPLAY_MODEL_LCD 0 /* KittyHawk LED or LCD */
20#define DISPLAY_MODEL_NONE 1 /* no LED or LCD */
21#define DISPLAY_MODEL_LASI 2 /* LASI style 8 bit LED */
22#define DISPLAY_MODEL_OLD_ASP 0x7F /* faked: ASP style 8 x 1 bit LED (only very old ASP versions) */
23
24#define LED_CMD_REG_NONE 0 /* NULL == no addr for the cmd register */
25
26/* register_led_driver() */
27int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg);
28
29/* registers the LED regions for procfs */
30void __init register_led_regions(void);
31
32#ifdef CONFIG_CHASSIS_LCD_LED
33/* writes a string to the LCD display (if possible on this h/w) */
34int lcd_print(const char *str);
35#else
36#define lcd_print(str)
37#endif
38
39/* main LED initialization function (uses PDC) */
40int __init led_init(void);
41
42#endif /* LED_H */
diff --git a/include/asm-parisc/linkage.h b/include/asm-parisc/linkage.h
deleted file mode 100644
index 0b19a7242d0c..000000000000
--- a/include/asm-parisc/linkage.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef __ASM_PARISC_LINKAGE_H
2#define __ASM_PARISC_LINKAGE_H
3
4#ifndef __ALIGN
5#define __ALIGN .align 4
6#define __ALIGN_STR ".align 4"
7#endif
8
9/*
10 * In parisc assembly a semicolon marks a comment while a
11 * exclamation mark is used to separate independent lines.
12 */
13#ifdef __ASSEMBLY__
14
15#define ENTRY(name) \
16 .export name !\
17 ALIGN !\
18name:
19
20#ifdef CONFIG_64BIT
21#define ENDPROC(name) \
22 END(name)
23#else
24#define ENDPROC(name) \
25 .type name, @function !\
26 END(name)
27#endif
28
29#endif /* __ASSEMBLY__ */
30
31#endif /* __ASM_PARISC_LINKAGE_H */
diff --git a/include/asm-parisc/local.h b/include/asm-parisc/local.h
deleted file mode 100644
index c11c530f74d0..000000000000
--- a/include/asm-parisc/local.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local.h>
diff --git a/include/asm-parisc/machdep.h b/include/asm-parisc/machdep.h
deleted file mode 100644
index a231c97d703e..000000000000
--- a/include/asm-parisc/machdep.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _PARISC_MACHDEP_H
2#define _PARISC_MACHDEP_H
3
4#include <linux/notifier.h>
5
6#define MACH_RESTART 1
7#define MACH_HALT 2
8#define MACH_POWER_ON 3
9#define MACH_POWER_OFF 4
10
11extern struct notifier_block *mach_notifier;
12extern void pa7300lc_init(void);
13
14extern void (*cpu_lpmc)(int, struct pt_regs *);
15
16#endif
diff --git a/include/asm-parisc/mc146818rtc.h b/include/asm-parisc/mc146818rtc.h
deleted file mode 100644
index adf41631449f..000000000000
--- a/include/asm-parisc/mc146818rtc.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H
6
7/* empty include file to satisfy the include in genrtc.c */
8
9#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-parisc/mckinley.h b/include/asm-parisc/mckinley.h
deleted file mode 100644
index d1ea6f12915e..000000000000
--- a/include/asm-parisc/mckinley.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef ASM_PARISC_MCKINLEY_H
2#define ASM_PARISC_MCKINLEY_H
3#ifdef __KERNEL__
4
5/* declared in arch/parisc/kernel/setup.c */
6extern struct proc_dir_entry * proc_mckinley_root;
7
8#endif /*__KERNEL__*/
9#endif /*ASM_PARISC_MCKINLEY_H*/
diff --git a/include/asm-parisc/mman.h b/include/asm-parisc/mman.h
deleted file mode 100644
index defe752cc996..000000000000
--- a/include/asm-parisc/mman.h
+++ /dev/null
@@ -1,61 +0,0 @@
1#ifndef __PARISC_MMAN_H__
2#define __PARISC_MMAN_H__
3
4#define PROT_READ 0x1 /* page can be read */
5#define PROT_WRITE 0x2 /* page can be written */
6#define PROT_EXEC 0x4 /* page can be executed */
7#define PROT_SEM 0x8 /* page may be used for atomic ops */
8#define PROT_NONE 0x0 /* page can not be accessed */
9#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
10#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
11
12#define MAP_SHARED 0x01 /* Share changes */
13#define MAP_PRIVATE 0x02 /* Changes are private */
14#define MAP_TYPE 0x03 /* Mask for type of mapping */
15#define MAP_FIXED 0x04 /* Interpret addr exactly */
16#define MAP_ANONYMOUS 0x10 /* don't use a file */
17
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22#define MAP_GROWSDOWN 0x8000 /* stack-like segment */
23#define MAP_POPULATE 0x10000 /* populate (prefault) pagetables */
24#define MAP_NONBLOCK 0x20000 /* do not block on IO */
25
26#define MS_SYNC 1 /* synchronous memory sync */
27#define MS_ASYNC 2 /* sync memory asynchronously */
28#define MS_INVALIDATE 4 /* invalidate the caches */
29
30#define MCL_CURRENT 1 /* lock all current mappings */
31#define MCL_FUTURE 2 /* lock all future mappings */
32
33#define MADV_NORMAL 0 /* no further special treatment */
34#define MADV_RANDOM 1 /* expect random page references */
35#define MADV_SEQUENTIAL 2 /* expect sequential page references */
36#define MADV_WILLNEED 3 /* will need these pages */
37#define MADV_DONTNEED 4 /* don't need these pages */
38#define MADV_SPACEAVAIL 5 /* insure that resources are reserved */
39#define MADV_VPS_PURGE 6 /* Purge pages from VM page cache */
40#define MADV_VPS_INHERIT 7 /* Inherit parents page size */
41
42/* common/generic parameters */
43#define MADV_REMOVE 9 /* remove these pages & resources */
44#define MADV_DONTFORK 10 /* don't inherit across fork */
45#define MADV_DOFORK 11 /* do inherit across fork */
46
47/* The range 12-64 is reserved for page size specification. */
48#define MADV_4K_PAGES 12 /* Use 4K pages */
49#define MADV_16K_PAGES 14 /* Use 16K pages */
50#define MADV_64K_PAGES 16 /* Use 64K pages */
51#define MADV_256K_PAGES 18 /* Use 256K pages */
52#define MADV_1M_PAGES 20 /* Use 1 Megabyte pages */
53#define MADV_4M_PAGES 22 /* Use 4 Megabyte pages */
54#define MADV_16M_PAGES 24 /* Use 16 Megabyte pages */
55#define MADV_64M_PAGES 26 /* Use 64 Megabyte pages */
56
57/* compatibility flags */
58#define MAP_FILE 0
59#define MAP_VARIABLE 0
60
61#endif /* __PARISC_MMAN_H__ */
diff --git a/include/asm-parisc/mmu.h b/include/asm-parisc/mmu.h
deleted file mode 100644
index 6a310cf8b734..000000000000
--- a/include/asm-parisc/mmu.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _PARISC_MMU_H_
2#define _PARISC_MMU_H_
3
4/* On parisc, we store the space id here */
5typedef unsigned long mm_context_t;
6
7#endif /* _PARISC_MMU_H_ */
diff --git a/include/asm-parisc/mmu_context.h b/include/asm-parisc/mmu_context.h
deleted file mode 100644
index 85856c74ad1d..000000000000
--- a/include/asm-parisc/mmu_context.h
+++ /dev/null
@@ -1,75 +0,0 @@
1#ifndef __PARISC_MMU_CONTEXT_H
2#define __PARISC_MMU_CONTEXT_H
3
4#include <linux/mm.h>
5#include <linux/sched.h>
6#include <asm/atomic.h>
7#include <asm/pgalloc.h>
8#include <asm/pgtable.h>
9#include <asm-generic/mm_hooks.h>
10
11static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
12{
13}
14
15/* on PA-RISC, we actually have enough contexts to justify an allocator
16 * for them. prumpf */
17
18extern unsigned long alloc_sid(void);
19extern void free_sid(unsigned long);
20
21static inline int
22init_new_context(struct task_struct *tsk, struct mm_struct *mm)
23{
24 BUG_ON(atomic_read(&mm->mm_users) != 1);
25
26 mm->context = alloc_sid();
27 return 0;
28}
29
30static inline void
31destroy_context(struct mm_struct *mm)
32{
33 free_sid(mm->context);
34 mm->context = 0;
35}
36
37static inline void load_context(mm_context_t context)
38{
39 mtsp(context, 3);
40#if SPACEID_SHIFT == 0
41 mtctl(context << 1,8);
42#else
43 mtctl(context >> (SPACEID_SHIFT - 1),8);
44#endif
45}
46
47static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
48{
49
50 if (prev != next) {
51 mtctl(__pa(next->pgd), 25);
52 load_context(next->context);
53 }
54}
55
56#define deactivate_mm(tsk,mm) do { } while (0)
57
58static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
59{
60 /*
61 * Activate_mm is our one chance to allocate a space id
62 * for a new mm created in the exec path. There's also
63 * some lazy tlb stuff, which is currently dead code, but
64 * we only allocate a space id if one hasn't been allocated
65 * already, so we should be OK.
66 */
67
68 BUG_ON(next == &init_mm); /* Should never happen */
69
70 if (next->context == 0)
71 next->context = alloc_sid();
72
73 switch_mm(prev,next,current);
74}
75#endif
diff --git a/include/asm-parisc/mmzone.h b/include/asm-parisc/mmzone.h
deleted file mode 100644
index 9608d2cf214a..000000000000
--- a/include/asm-parisc/mmzone.h
+++ /dev/null
@@ -1,73 +0,0 @@
1#ifndef _PARISC_MMZONE_H
2#define _PARISC_MMZONE_H
3
4#ifdef CONFIG_DISCONTIGMEM
5
6#define MAX_PHYSMEM_RANGES 8 /* Fix the size for now (current known max is 3) */
7extern int npmem_ranges;
8
9struct node_map_data {
10 pg_data_t pg_data;
11};
12
13extern struct node_map_data node_data[];
14
15#define NODE_DATA(nid) (&node_data[nid].pg_data)
16
17#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18#define node_end_pfn(nid) \
19({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \
22})
23
24/* We have these possible memory map layouts:
25 * Astro: 0-3.75, 67.75-68, 4-64
26 * zx1: 0-1, 257-260, 4-256
27 * Stretch (N-class): 0-2, 4-32, 34-xxx
28 */
29
30/* Since each 1GB can only belong to one region (node), we can create
31 * an index table for pfn to nid lookup; each entry in pfnnid_map
32 * represents 1GB, and contains the node that the memory belongs to. */
33
34#define PFNNID_SHIFT (30 - PAGE_SHIFT)
35#define PFNNID_MAP_MAX 512 /* support 512GB */
36extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
37
38#ifndef CONFIG_64BIT
39#define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
40#else
41/* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */
42#define pfn_is_io(pfn) ((pfn & (0xf000000000000000UL >> PAGE_SHIFT)) == (0xf000000000000000UL >> PAGE_SHIFT))
43#endif
44
45static inline int pfn_to_nid(unsigned long pfn)
46{
47 unsigned int i;
48 unsigned char r;
49
50 if (unlikely(pfn_is_io(pfn)))
51 return 0;
52
53 i = pfn >> PFNNID_SHIFT;
54 BUG_ON(i >= sizeof(pfnnid_map) / sizeof(pfnnid_map[0]));
55 r = pfnnid_map[i];
56 BUG_ON(r == 0xff);
57
58 return (int)r;
59}
60
61static inline int pfn_valid(int pfn)
62{
63 int nid = pfn_to_nid(pfn);
64
65 if (nid >= 0)
66 return (pfn < node_end_pfn(nid));
67 return 0;
68}
69
70#else /* !CONFIG_DISCONTIGMEM */
71#define MAX_PHYSMEM_RANGES 1
72#endif
73#endif /* _PARISC_MMZONE_H */
diff --git a/include/asm-parisc/module.h b/include/asm-parisc/module.h
deleted file mode 100644
index c2cb49e934c1..000000000000
--- a/include/asm-parisc/module.h
+++ /dev/null
@@ -1,32 +0,0 @@
1#ifndef _ASM_PARISC_MODULE_H
2#define _ASM_PARISC_MODULE_H
3/*
4 * This file contains the parisc architecture specific module code.
5 */
6#ifdef CONFIG_64BIT
7#define Elf_Shdr Elf64_Shdr
8#define Elf_Sym Elf64_Sym
9#define Elf_Ehdr Elf64_Ehdr
10#define Elf_Addr Elf64_Addr
11#define Elf_Rela Elf64_Rela
12#else
13#define Elf_Shdr Elf32_Shdr
14#define Elf_Sym Elf32_Sym
15#define Elf_Ehdr Elf32_Ehdr
16#define Elf_Addr Elf32_Addr
17#define Elf_Rela Elf32_Rela
18#endif
19
20struct unwind_table;
21
22struct mod_arch_specific
23{
24 unsigned long got_offset, got_count, got_max;
25 unsigned long fdesc_offset, fdesc_count, fdesc_max;
26 unsigned long stub_offset, stub_count, stub_max;
27 unsigned long init_stub_offset, init_stub_count, init_stub_max;
28 int unwind_section;
29 struct unwind_table *unwind;
30};
31
32#endif /* _ASM_PARISC_MODULE_H */
diff --git a/include/asm-parisc/msgbuf.h b/include/asm-parisc/msgbuf.h
deleted file mode 100644
index fe88f2649418..000000000000
--- a/include/asm-parisc/msgbuf.h
+++ /dev/null
@@ -1,37 +0,0 @@
1#ifndef _PARISC_MSGBUF_H
2#define _PARISC_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for parisc architecture, copied from sparc.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t msg_stime; /* last msgsnd time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t msg_rtime; /* last msgrcv time */
24#ifndef CONFIG_64BIT
25 unsigned int __pad3;
26#endif
27 __kernel_time_t msg_ctime; /* last change time */
28 unsigned int msg_cbytes; /* current number of bytes on queue */
29 unsigned int msg_qnum; /* number of messages in queue */
30 unsigned int msg_qbytes; /* max number of bytes on queue */
31 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
32 __kernel_pid_t msg_lrpid; /* last receive pid */
33 unsigned int __unused1;
34 unsigned int __unused2;
35};
36
37#endif /* _PARISC_MSGBUF_H */
diff --git a/include/asm-parisc/mutex.h b/include/asm-parisc/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/include/asm-parisc/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
deleted file mode 100644
index c3941f09a878..000000000000
--- a/include/asm-parisc/page.h
+++ /dev/null
@@ -1,173 +0,0 @@
1#ifndef _PARISC_PAGE_H
2#define _PARISC_PAGE_H
3
4#include <linux/const.h>
5
6#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
7# define PAGE_SHIFT 12
8#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
9# define PAGE_SHIFT 14
10#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
11# define PAGE_SHIFT 16
12#else
13# error "unknown default kernel page size"
14#endif
15#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
16#define PAGE_MASK (~(PAGE_SIZE-1))
17
18
19#ifndef __ASSEMBLY__
20
21#include <asm/types.h>
22#include <asm/cache.h>
23
24#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
25#define copy_page(to,from) copy_user_page_asm((void *)(to), (void *)(from))
26
27struct page;
28
29void copy_user_page_asm(void *to, void *from);
30void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
31 struct page *pg);
32void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
33
34/*
35 * These are used to make use of C type-checking..
36 */
37#define STRICT_MM_TYPECHECKS
38#ifdef STRICT_MM_TYPECHECKS
39typedef struct { unsigned long pte;
40#if !defined(CONFIG_64BIT)
41 unsigned long future_flags;
42 /* XXX: it's possible to remove future_flags and change BITS_PER_PTE_ENTRY
43 to 2, but then strangely the identical 32bit kernel boots on a
44 c3000(pa20), but not any longer on a 715(pa11).
45 Still investigating... HelgeD.
46 */
47#endif
48} pte_t; /* either 32 or 64bit */
49
50/* NOTE: even on 64 bits, these entries are __u32 because we allocate
51 * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */
52typedef struct { __u32 pmd; } pmd_t;
53typedef struct { __u32 pgd; } pgd_t;
54typedef struct { unsigned long pgprot; } pgprot_t;
55
56#define pte_val(x) ((x).pte)
57/* These do not work lvalues, so make sure we don't use them as such. */
58#define pmd_val(x) ((x).pmd + 0)
59#define pgd_val(x) ((x).pgd + 0)
60#define pgprot_val(x) ((x).pgprot)
61
62#define __pte(x) ((pte_t) { (x) } )
63#define __pmd(x) ((pmd_t) { (x) } )
64#define __pgd(x) ((pgd_t) { (x) } )
65#define __pgprot(x) ((pgprot_t) { (x) } )
66
67#define __pmd_val_set(x,n) (x).pmd = (n)
68#define __pgd_val_set(x,n) (x).pgd = (n)
69
70#else
71/*
72 * .. while these make it easier on the compiler
73 */
74typedef unsigned long pte_t;
75typedef __u32 pmd_t;
76typedef __u32 pgd_t;
77typedef unsigned long pgprot_t;
78
79#define pte_val(x) (x)
80#define pmd_val(x) (x)
81#define pgd_val(x) (x)
82#define pgprot_val(x) (x)
83
84#define __pte(x) (x)
85#define __pmd(x) (x)
86#define __pgd(x) (x)
87#define __pgprot(x) (x)
88
89#define __pmd_val_set(x,n) (x) = (n)
90#define __pgd_val_set(x,n) (x) = (n)
91
92#endif /* STRICT_MM_TYPECHECKS */
93
94typedef struct page *pgtable_t;
95
96typedef struct __physmem_range {
97 unsigned long start_pfn;
98 unsigned long pages; /* PAGE_SIZE pages */
99} physmem_range_t;
100
101extern physmem_range_t pmem_ranges[];
102extern int npmem_ranges;
103
104#endif /* !__ASSEMBLY__ */
105
106/* WARNING: The definitions below must match exactly to sizeof(pte_t)
107 * etc
108 */
109#ifdef CONFIG_64BIT
110#define BITS_PER_PTE_ENTRY 3
111#define BITS_PER_PMD_ENTRY 2
112#define BITS_PER_PGD_ENTRY 2
113#else
114#define BITS_PER_PTE_ENTRY 3
115#define BITS_PER_PMD_ENTRY 2
116#define BITS_PER_PGD_ENTRY BITS_PER_PMD_ENTRY
117#endif
118#define PGD_ENTRY_SIZE (1UL << BITS_PER_PGD_ENTRY)
119#define PMD_ENTRY_SIZE (1UL << BITS_PER_PMD_ENTRY)
120#define PTE_ENTRY_SIZE (1UL << BITS_PER_PTE_ENTRY)
121
122#define LINUX_GATEWAY_SPACE 0
123
124/* This governs the relationship between virtual and physical addresses.
125 * If you alter it, make sure to take care of our various fixed mapping
126 * segments in fixmap.h */
127#ifdef CONFIG_64BIT
128#define __PAGE_OFFSET (0x40000000) /* 1GB */
129#else
130#define __PAGE_OFFSET (0x10000000) /* 256MB */
131#endif
132
133#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
134
135/* The size of the gateway page (we leave lots of room for expansion) */
136#define GATEWAY_PAGE_SIZE 0x4000
137
138/* The start of the actual kernel binary---used in vmlinux.lds.S
139 * Leave some space after __PAGE_OFFSET for detecting kernel null
140 * ptr derefs */
141#define KERNEL_BINARY_TEXT_START (__PAGE_OFFSET + 0x100000)
142
143/* These macros don't work for 64-bit C code -- don't allow in C at all */
144#ifdef __ASSEMBLY__
145# define PA(x) ((x)-__PAGE_OFFSET)
146# define VA(x) ((x)+__PAGE_OFFSET)
147#endif
148#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
149#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
150
151#ifndef CONFIG_DISCONTIGMEM
152#define pfn_valid(pfn) ((pfn) < max_mapnr)
153#endif /* CONFIG_DISCONTIGMEM */
154
155#ifdef CONFIG_HUGETLB_PAGE
156#define HPAGE_SHIFT 22 /* 4MB (is this fixed?) */
157#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
158#define HPAGE_MASK (~(HPAGE_SIZE - 1))
159#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
160#endif
161
162#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
163
164#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
165#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
166
167#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
168 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
169
170#include <asm-generic/memory_model.h>
171#include <asm-generic/page.h>
172
173#endif /* _PARISC_PAGE_H */
diff --git a/include/asm-parisc/param.h b/include/asm-parisc/param.h
deleted file mode 100644
index 32e03d877858..000000000000
--- a/include/asm-parisc/param.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef _ASMPARISC_PARAM_H
2#define _ASMPARISC_PARAM_H
3
4#ifdef __KERNEL__
5#define HZ CONFIG_HZ
6#define USER_HZ 100 /* some user API use "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif
diff --git a/include/asm-parisc/parisc-device.h b/include/asm-parisc/parisc-device.h
deleted file mode 100644
index 7aa13f2add7a..000000000000
--- a/include/asm-parisc/parisc-device.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef _ASM_PARISC_PARISC_DEVICE_H_
2#define _ASM_PARISC_PARISC_DEVICE_H_
3
4#include <linux/device.h>
5
6struct parisc_device {
7 struct resource hpa; /* Hard Physical Address */
8 struct parisc_device_id id;
9 struct parisc_driver *driver; /* Driver for this device */
10 char name[80]; /* The hardware description */
11 int irq;
12 int aux_irq; /* Some devices have a second IRQ */
13
14 char hw_path; /* The module number on this bus */
15 unsigned int num_addrs; /* some devices have additional address ranges. */
16 unsigned long *addr; /* which will be stored here */
17
18#ifdef CONFIG_64BIT
19 /* parms for pdc_pat_cell_module() call */
20 unsigned long pcell_loc; /* Physical Cell location */
21 unsigned long mod_index; /* PAT specific - Misc Module info */
22
23 /* generic info returned from pdc_pat_cell_module() */
24 unsigned long mod_info; /* PAT specific - Misc Module info */
25 unsigned long pmod_loc; /* physical Module location */
26#endif
27 u64 dma_mask; /* DMA mask for I/O */
28 struct device dev;
29};
30
31struct parisc_driver {
32 struct parisc_driver *next;
33 char *name;
34 const struct parisc_device_id *id_table;
35 int (*probe) (struct parisc_device *dev); /* New device discovered */
36 int (*remove) (struct parisc_device *dev);
37 struct device_driver drv;
38};
39
40
41#define to_parisc_device(d) container_of(d, struct parisc_device, dev)
42#define to_parisc_driver(d) container_of(d, struct parisc_driver, drv)
43#define parisc_parent(d) to_parisc_device(d->dev.parent)
44
45static inline char *parisc_pathname(struct parisc_device *d)
46{
47 return d->dev.bus_id;
48}
49
50static inline void
51parisc_set_drvdata(struct parisc_device *d, void *p)
52{
53 dev_set_drvdata(&d->dev, p);
54}
55
56static inline void *
57parisc_get_drvdata(struct parisc_device *d)
58{
59 return dev_get_drvdata(&d->dev);
60}
61
62extern struct bus_type parisc_bus_type;
63
64#endif /*_ASM_PARISC_PARISC_DEVICE_H_*/
diff --git a/include/asm-parisc/parport.h b/include/asm-parisc/parport.h
deleted file mode 100644
index 00d9cc3e7b97..000000000000
--- a/include/asm-parisc/parport.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 *
3 * parport.h: ia32-compatible parport initialisation
4 *
5 * This file should only be included by drivers/parport/parport_pc.c.
6 */
7#ifndef _ASM_PARPORT_H
8#define _ASM_PARPORT_H 1
9
10
11static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
12{
13 /* nothing ! */
14 return 0;
15}
16
17
18#endif /* !(_ASM_PARPORT_H) */
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h
deleted file mode 100644
index 4ba868f44a5e..000000000000
--- a/include/asm-parisc/pci.h
+++ /dev/null
@@ -1,294 +0,0 @@
1#ifndef __ASM_PARISC_PCI_H
2#define __ASM_PARISC_PCI_H
3
4#include <asm/scatterlist.h>
5
6
7
8/*
9** HP PCI platforms generally support multiple bus adapters.
10** (workstations 1-~4, servers 2-~32)
11**
12** Newer platforms number the busses across PCI bus adapters *sparsely*.
13** E.g. 0, 8, 16, ...
14**
15** Under a PCI bus, most HP platforms support PPBs up to two or three
16** levels deep. See "Bit3" product line.
17*/
18#define PCI_MAX_BUSSES 256
19
20
21/* To be used as: mdelay(pci_post_reset_delay);
22 *
23 * post_reset is the time the kernel should stall to prevent anyone from
24 * accessing the PCI bus once #RESET is de-asserted.
25 * PCI spec somewhere says 1 second but with multi-PCI bus systems,
26 * this makes the boot time much longer than necessary.
27 * 20ms seems to work for all the HP PCI implementations to date.
28 */
29#define pci_post_reset_delay 50
30
31
32/*
33** pci_hba_data (aka H2P_OBJECT in HP/UX)
34**
35** This is the "common" or "base" data structure which HBA drivers
36** (eg Dino or LBA) are required to place at the top of their own
37** platform_data structure. I've heard this called "C inheritance" too.
38**
39** Data needed by pcibios layer belongs here.
40*/
41struct pci_hba_data {
42 void __iomem *base_addr; /* aka Host Physical Address */
43 const struct parisc_device *dev; /* device from PA bus walk */
44 struct pci_bus *hba_bus; /* primary PCI bus below HBA */
45 int hba_num; /* I/O port space access "key" */
46 struct resource bus_num; /* PCI bus numbers */
47 struct resource io_space; /* PIOP */
48 struct resource lmmio_space; /* bus addresses < 4Gb */
49 struct resource elmmio_space; /* additional bus addresses < 4Gb */
50 struct resource gmmio_space; /* bus addresses > 4Gb */
51
52 /* NOTE: Dino code assumes it can use *all* of the lmmio_space,
53 * elmmio_space and gmmio_space as a contiguous array of
54 * resources. This #define represents the array size */
55 #define DINO_MAX_LMMIO_RESOURCES 3
56
57 unsigned long lmmio_space_offset; /* CPU view - PCI view */
58 void * iommu; /* IOMMU this device is under */
59 /* REVISIT - spinlock to protect resources? */
60
61 #define HBA_NAME_SIZE 16
62 char io_name[HBA_NAME_SIZE];
63 char lmmio_name[HBA_NAME_SIZE];
64 char elmmio_name[HBA_NAME_SIZE];
65 char gmmio_name[HBA_NAME_SIZE];
66};
67
68#define HBA_DATA(d) ((struct pci_hba_data *) (d))
69
70/*
71** We support 2^16 I/O ports per HBA. These are set up in the form
72** 0xbbxxxx, where bb is the bus number and xxxx is the I/O port
73** space address.
74*/
75#define HBA_PORT_SPACE_BITS 16
76
77#define HBA_PORT_BASE(h) ((h) << HBA_PORT_SPACE_BITS)
78#define HBA_PORT_SPACE_SIZE (1UL << HBA_PORT_SPACE_BITS)
79
80#define PCI_PORT_HBA(a) ((a) >> HBA_PORT_SPACE_BITS)
81#define PCI_PORT_ADDR(a) ((a) & (HBA_PORT_SPACE_SIZE - 1))
82
83#ifdef CONFIG_64BIT
84#define PCI_F_EXTEND 0xffffffff00000000UL
85#define PCI_IS_LMMIO(hba,a) pci_is_lmmio(hba,a)
86
87/* We need to know if an address is LMMMIO or GMMIO.
88 * LMMIO requires mangling and GMMIO we must use as-is.
89 */
90static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a)
91{
92 return(((a) & PCI_F_EXTEND) == PCI_F_EXTEND);
93}
94
95/*
96** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
97** See pci.c for more conversions used by Generic PCI code.
98**
99** Platform characteristics/firmware guarantee that
100** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO
101** (2) PA_VIEW == IO_VIEW for GMMIO
102*/
103#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
104 ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
105 : (a)) /* GMMIO */
106#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \
107 ? (a) + hba->lmmio_space_offset \
108 : (a))
109
110#else /* !CONFIG_64BIT */
111
112#define PCI_BUS_ADDR(hba,a) (a)
113#define PCI_HOST_ADDR(hba,a) (a)
114#define PCI_F_EXTEND 0UL
115#define PCI_IS_LMMIO(hba,a) (1) /* 32-bit doesn't support GMMIO */
116
117#endif /* !CONFIG_64BIT */
118
119/*
120** KLUGE: linux/pci.h include asm/pci.h BEFORE declaring struct pci_bus
121** (This eliminates some of the warnings).
122*/
123struct pci_bus;
124struct pci_dev;
125
126/*
127 * If the PCI device's view of memory is the same as the CPU's view of memory,
128 * PCI_DMA_BUS_IS_PHYS is true. The networking and block device layers use
129 * this boolean for bounce buffer decisions.
130 */
131#ifdef CONFIG_PA20
132/* All PA-2.0 machines have an IOMMU. */
133#define PCI_DMA_BUS_IS_PHYS 0
134#define parisc_has_iommu() do { } while (0)
135#else
136
137#if defined(CONFIG_IOMMU_CCIO) || defined(CONFIG_IOMMU_SBA)
138extern int parisc_bus_is_phys; /* in arch/parisc/kernel/setup.c */
139#define PCI_DMA_BUS_IS_PHYS parisc_bus_is_phys
140#define parisc_has_iommu() do { parisc_bus_is_phys = 0; } while (0)
141#else
142#define PCI_DMA_BUS_IS_PHYS 1
143#define parisc_has_iommu() do { } while (0)
144#endif
145
146#endif /* !CONFIG_PA20 */
147
148
149/*
150** Most PCI devices (eg Tulip, NCR720) also export the same registers
151** to both MMIO and I/O port space. Due to poor performance of I/O Port
152** access under HP PCI bus adapters, strongly recommend the use of MMIO
153** address space.
154**
155** While I'm at it more PA programming notes:
156**
157** 1) MMIO stores (writes) are posted operations. This means the processor
158** gets an "ACK" before the write actually gets to the device. A read
159** to the same device (or typically the bus adapter above it) will
160** force in-flight write transaction(s) out to the targeted device
161** before the read can complete.
162**
163** 2) The Programmed I/O (PIO) data may not always be strongly ordered with
164** respect to DMA on all platforms. Ie PIO data can reach the processor
165** before in-flight DMA reaches memory. Since most SMP PA platforms
166** are I/O coherent, it generally doesn't matter...but sometimes
167** it does.
168**
169** I've helped device driver writers debug both types of problems.
170*/
171struct pci_port_ops {
172 u8 (*inb) (struct pci_hba_data *hba, u16 port);
173 u16 (*inw) (struct pci_hba_data *hba, u16 port);
174 u32 (*inl) (struct pci_hba_data *hba, u16 port);
175 void (*outb) (struct pci_hba_data *hba, u16 port, u8 data);
176 void (*outw) (struct pci_hba_data *hba, u16 port, u16 data);
177 void (*outl) (struct pci_hba_data *hba, u16 port, u32 data);
178};
179
180
181struct pci_bios_ops {
182 void (*init)(void);
183 void (*fixup_bus)(struct pci_bus *bus);
184};
185
186/* pci_unmap_{single,page} is not a nop, thus... */
187#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
188 dma_addr_t ADDR_NAME;
189#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
190 __u32 LEN_NAME;
191#define pci_unmap_addr(PTR, ADDR_NAME) \
192 ((PTR)->ADDR_NAME)
193#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
194 (((PTR)->ADDR_NAME) = (VAL))
195#define pci_unmap_len(PTR, LEN_NAME) \
196 ((PTR)->LEN_NAME)
197#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
198 (((PTR)->LEN_NAME) = (VAL))
199
200/*
201** Stuff declared in arch/parisc/kernel/pci.c
202*/
203extern struct pci_port_ops *pci_port;
204extern struct pci_bios_ops *pci_bios;
205
206#ifdef CONFIG_PCI
207extern void pcibios_register_hba(struct pci_hba_data *);
208extern void pcibios_set_master(struct pci_dev *);
209#else
210static inline void pcibios_register_hba(struct pci_hba_data *x)
211{
212}
213#endif
214
215/*
216 * pcibios_assign_all_busses() is used in drivers/pci/pci.c:pci_do_scan_bus()
217 * 0 == check if bridge is numbered before re-numbering.
218 * 1 == pci_do_scan_bus() should automatically number all PCI-PCI bridges.
219 *
220 * We *should* set this to zero for "legacy" platforms and one
221 * for PAT platforms.
222 *
223 * But legacy platforms also need to renumber the busses below a Host
224 * Bus controller. Adding a 4-port Tulip card on the first PCI root
225 * bus of a C200 resulted in the secondary bus being numbered as 1.
226 * The second PCI host bus controller's root bus had already been
227 * assigned bus number 1 by firmware and sysfs complained.
228 *
229 * Firmware isn't doing anything wrong here since each controller
230 * is its own PCI domain. It's simpler and easier for us to renumber
231 * the busses rather than treat each Dino as a separate PCI domain.
232 * Eventually, we may want to introduce PCI domains for Superdome or
233 * rp7420/8420 boxes and then revisit this issue.
234 */
235#define pcibios_assign_all_busses() (1)
236#define pcibios_scan_all_fns(a, b) (0)
237
238#define PCIBIOS_MIN_IO 0x10
239#define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */
240
241/* export the pci_ DMA API in terms of the dma_ one */
242#include <asm-generic/pci-dma-compat.h>
243
244#ifdef CONFIG_PCI
245static inline void pci_dma_burst_advice(struct pci_dev *pdev,
246 enum pci_dma_burst_strategy *strat,
247 unsigned long *strategy_parameter)
248{
249 unsigned long cacheline_size;
250 u8 byte;
251
252 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
253 if (byte == 0)
254 cacheline_size = 1024;
255 else
256 cacheline_size = (int) byte * 4;
257
258 *strat = PCI_DMA_BURST_MULTIPLE;
259 *strategy_parameter = cacheline_size;
260}
261#endif
262
263extern void
264pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
265 struct resource *res);
266
267extern void
268pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
269 struct pci_bus_region *region);
270
271static inline struct resource *
272pcibios_select_root(struct pci_dev *pdev, struct resource *res)
273{
274 struct resource *root = NULL;
275
276 if (res->flags & IORESOURCE_IO)
277 root = &ioport_resource;
278 if (res->flags & IORESOURCE_MEM)
279 root = &iomem_resource;
280
281 return root;
282}
283
284static inline void pcibios_penalize_isa_irq(int irq, int active)
285{
286 /* We don't need to penalize isa irq's */
287}
288
289static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
290{
291 return channel ? 15 : 14;
292}
293
294#endif /* __ASM_PARISC_PCI_H */
diff --git a/include/asm-parisc/pdc.h b/include/asm-parisc/pdc.h
deleted file mode 100644
index 9eaa794c3e4a..000000000000
--- a/include/asm-parisc/pdc.h
+++ /dev/null
@@ -1,757 +0,0 @@
1#ifndef _PARISC_PDC_H
2#define _PARISC_PDC_H
3
4/*
5 * PDC return values ...
6 * All PDC calls return a subset of these errors.
7 */
8
9#define PDC_WARN 3 /* Call completed with a warning */
10#define PDC_REQ_ERR_1 2 /* See above */
11#define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */
12#define PDC_OK 0 /* Call completed successfully */
13#define PDC_BAD_PROC -1 /* Called non-existent procedure*/
14#define PDC_BAD_OPTION -2 /* Called with non-existent option */
15#define PDC_ERROR -3 /* Call could not complete without an error */
16#define PDC_NE_MOD -5 /* Module not found */
17#define PDC_NE_CELL_MOD -7 /* Cell module not found */
18#define PDC_INVALID_ARG -10 /* Called with an invalid argument */
19#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
20#define PDC_NOT_NARROW -17 /* Narrow mode not supported */
21
22/*
23 * PDC entry points...
24 */
25
26#define PDC_POW_FAIL 1 /* perform a power-fail */
27#define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */
28
29#define PDC_CHASSIS 2 /* PDC-chassis functions */
30#define PDC_CHASSIS_DISP 0 /* update chassis display */
31#define PDC_CHASSIS_WARN 1 /* return chassis warnings */
32#define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */
33#define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */
34
35#define PDC_PIM 3 /* Get PIM data */
36#define PDC_PIM_HPMC 0 /* Transfer HPMC data */
37#define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/
38#define PDC_PIM_LPMC 2 /* Transfer HPMC data */
39#define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */
40#define PDC_PIM_TOC 4 /* Transfer TOC data */
41
42#define PDC_MODEL 4 /* PDC model information call */
43#define PDC_MODEL_INFO 0 /* returns information */
44#define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */
45#define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/
46#define PDC_MODEL_SYSMODEL 3 /* return system model info */
47#define PDC_MODEL_ENSPEC 4 /* enable specific option */
48#define PDC_MODEL_DISPEC 5 /* disable specific option */
49#define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */
50#define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */
51/* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */
52#define PDC_MODEL_IOPDIR_FDC (1 << 2)
53#define PDC_MODEL_NVA_MASK (3 << 4)
54#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
55#define PDC_MODEL_NVA_SLOW (1 << 4)
56#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
57#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
58#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
59
60#define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */
61#define PA90_INSTRUCTION_SET 0x8
62
63#define PDC_CACHE 5 /* return/set cache (& TLB) info*/
64#define PDC_CACHE_INFO 0 /* returns information */
65#define PDC_CACHE_SET_COH 1 /* set coherence state */
66#define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */
67
68#define PDC_HPA 6 /* return HPA of processor */
69#define PDC_HPA_PROCESSOR 0
70#define PDC_HPA_MODULES 1
71
72#define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */
73#define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */
74
75#define PDC_IODC 8 /* talk to IODC */
76#define PDC_IODC_READ 0 /* read IODC entry point */
77/* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */
78#define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */
79/* 1, 2 obsolete - HVERSION dependent*/
80#define PDC_IODC_RI_INIT 3 /* Initialize module */
81#define PDC_IODC_RI_IO 4 /* Module input/output */
82#define PDC_IODC_RI_SPA 5 /* Module input/output */
83#define PDC_IODC_RI_CONFIG 6 /* Module input/output */
84/* 7 obsolete - HVERSION dependent */
85#define PDC_IODC_RI_TEST 8 /* Module input/output */
86#define PDC_IODC_RI_TLB 9 /* Module input/output */
87#define PDC_IODC_NINIT 2 /* non-destructive init */
88#define PDC_IODC_DINIT 3 /* destructive init */
89#define PDC_IODC_MEMERR 4 /* check for memory errors */
90#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */
91#define PDC_IODC_BUS_ERROR -4 /* bus error return value */
92#define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */
93#define PDC_IODC_COUNT -6 /* count is too small */
94
95#define PDC_TOD 9 /* time-of-day clock (TOD) */
96#define PDC_TOD_READ 0 /* read TOD */
97#define PDC_TOD_WRITE 1 /* write TOD */
98
99
100#define PDC_STABLE 10 /* stable storage (sprockets) */
101#define PDC_STABLE_READ 0
102#define PDC_STABLE_WRITE 1
103#define PDC_STABLE_RETURN_SIZE 2
104#define PDC_STABLE_VERIFY_CONTENTS 3
105#define PDC_STABLE_INITIALIZE 4
106
107#define PDC_NVOLATILE 11 /* often not implemented */
108
109#define PDC_ADD_VALID 12 /* Memory validation PDC call */
110#define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */
111
112#define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */
113
114#define PDC_PROC 16 /* (sprockets) */
115
116#define PDC_CONFIG 16 /* (sprockets) */
117#define PDC_CONFIG_DECONFIG 0
118#define PDC_CONFIG_DRECONFIG 1
119#define PDC_CONFIG_DRETURN_CONFIG 2
120
121#define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */
122#define PDC_BTLB_INFO 0 /* returns parameter */
123#define PDC_BTLB_INSERT 1 /* insert BTLB entry */
124#define PDC_BTLB_PURGE 2 /* purge BTLB entries */
125#define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */
126
127#define PDC_TLB 19 /* manage hardware TLB miss handling */
128#define PDC_TLB_INFO 0 /* returns parameter */
129#define PDC_TLB_SETUP 1 /* set up miss handling */
130
131#define PDC_MEM 20 /* Manage memory */
132#define PDC_MEM_MEMINFO 0
133#define PDC_MEM_ADD_PAGE 1
134#define PDC_MEM_CLEAR_PDT 2
135#define PDC_MEM_READ_PDT 3
136#define PDC_MEM_RESET_CLEAR 4
137#define PDC_MEM_GOODMEM 5
138#define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */
139#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
140#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
141#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
142#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
143
144#define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */
145#define PDC_MEM_RET_DUPLICATE_ENTRY 4
146#define PDC_MEM_RET_BUF_SIZE_SMALL 1
147#define PDC_MEM_RET_PDT_FULL -11
148#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
149
150#define PDC_PSW 21 /* Get/Set default System Mask */
151#define PDC_PSW_MASK 0 /* Return mask */
152#define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */
153#define PDC_PSW_SET_DEFAULTS 2 /* Set default */
154#define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */
155#define PDC_PSW_WIDE_BIT 2 /* set for wide mode */
156
157#define PDC_SYSTEM_MAP 22 /* find system modules */
158#define PDC_FIND_MODULE 0
159#define PDC_FIND_ADDRESS 1
160#define PDC_TRANSLATE_PATH 2
161
162#define PDC_SOFT_POWER 23 /* soft power switch */
163#define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */
164#define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */
165
166
167/* HVERSION dependent */
168
169/* The PDC_MEM_MAP calls */
170#define PDC_MEM_MAP 128 /* on s700: return page info */
171#define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */
172
173#define PDC_EEPROM 129 /* EEPROM access */
174#define PDC_EEPROM_READ_WORD 0
175#define PDC_EEPROM_WRITE_WORD 1
176#define PDC_EEPROM_READ_BYTE 2
177#define PDC_EEPROM_WRITE_BYTE 3
178#define PDC_EEPROM_EEPROM_PASSWORD -1000
179
180#define PDC_NVM 130 /* NVM (non-volatile memory) access */
181#define PDC_NVM_READ_WORD 0
182#define PDC_NVM_WRITE_WORD 1
183#define PDC_NVM_READ_BYTE 2
184#define PDC_NVM_WRITE_BYTE 3
185
186#define PDC_SEED_ERROR 132 /* (sprockets) */
187
188#define PDC_IO 135 /* log error info, reset IO system */
189#define PDC_IO_READ_AND_CLEAR_ERRORS 0
190#define PDC_IO_RESET 1
191#define PDC_IO_RESET_DEVICES 2
192/* sets bits 6&7 (little endian) of the HcControl Register */
193#define PDC_IO_USB_SUSPEND 0xC000000000000000
194#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */
195#define PDC_IO_NO_SUSPEND -6 /* return value */
196
197#define PDC_BROADCAST_RESET 136 /* reset all processors */
198#define PDC_DO_RESET 0 /* option: perform a broadcast reset */
199#define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */
200#define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */
201#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */
202
203#define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */
204#define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */
205
206#define PDC_LAN_STATION_ID_SIZE 6
207
208#define PDC_CHECK_RANGES 139 /* (sprockets) */
209
210#define PDC_NV_SECTIONS 141 /* (sprockets) */
211
212#define PDC_PERFORMANCE 142 /* performance monitoring */
213
214#define PDC_SYSTEM_INFO 143 /* system information */
215#define PDC_SYSINFO_RETURN_INFO_SIZE 0
216#define PDC_SYSINFO_RRETURN_SYS_INFO 1
217#define PDC_SYSINFO_RRETURN_ERRORS 2
218#define PDC_SYSINFO_RRETURN_WARNINGS 3
219#define PDC_SYSINFO_RETURN_REVISIONS 4
220#define PDC_SYSINFO_RRETURN_DIAGNOSE 5
221#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
222
223#define PDC_RDR 144 /* (sprockets) */
224#define PDC_RDR_READ_BUFFER 0
225#define PDC_RDR_READ_SINGLE 1
226#define PDC_RDR_WRITE_SINGLE 2
227
228#define PDC_INTRIGUE 145 /* (sprockets) */
229#define PDC_INTRIGUE_WRITE_BUFFER 0
230#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
231#define PDC_INTRIGUE_START_CPU_COUNTERS 2
232#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
233
234#define PDC_STI 146 /* STI access */
235/* same as PDC_PCI_XXX values (see below) */
236
237/* Legacy PDC definitions for same stuff */
238#define PDC_PCI_INDEX 147
239#define PDC_PCI_INTERFACE_INFO 0
240#define PDC_PCI_SLOT_INFO 1
241#define PDC_PCI_INFLIGHT_BYTES 2
242#define PDC_PCI_READ_CONFIG 3
243#define PDC_PCI_WRITE_CONFIG 4
244#define PDC_PCI_READ_PCI_IO 5
245#define PDC_PCI_WRITE_PCI_IO 6
246#define PDC_PCI_READ_CONFIG_DELAY 7
247#define PDC_PCI_UPDATE_CONFIG_DELAY 8
248#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
249#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
250#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
251#define PDC_PCI_PCI_RESERVED 12
252#define PDC_PCI_PCI_INT_ROUTE_SIZE 13
253#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
254#define PDC_PCI_PCI_INT_ROUTE 14
255#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
256#define PDC_PCI_READ_MON_TYPE 15
257#define PDC_PCI_WRITE_MON_TYPE 16
258
259
260/* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */
261#define PDC_INITIATOR 163
262#define PDC_GET_INITIATOR 0
263#define PDC_SET_INITIATOR 1
264#define PDC_DELETE_INITIATOR 2
265#define PDC_RETURN_TABLE_SIZE 3
266#define PDC_RETURN_TABLE 4
267
268#define PDC_LINK 165 /* (sprockets) */
269#define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */
270#define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */
271
272/* cl_class
273 * page 3-33 of IO-Firmware ARS
274 * IODC ENTRY_INIT(Search first) RET[1]
275 */
276#define CL_NULL 0 /* invalid */
277#define CL_RANDOM 1 /* random access (as disk) */
278#define CL_SEQU 2 /* sequential access (as tape) */
279#define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */
280#define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */
281#define CL_DISPL 9 /* half-duplex console (display) */
282#define CL_FC 10 /* FiberChannel access media */
283
284/* IODC ENTRY_INIT() */
285#define ENTRY_INIT_SRCH_FRST 2
286#define ENTRY_INIT_SRCH_NEXT 3
287#define ENTRY_INIT_MOD_DEV 4
288#define ENTRY_INIT_DEV 5
289#define ENTRY_INIT_MOD 6
290#define ENTRY_INIT_MSG 9
291
292/* IODC ENTRY_IO() */
293#define ENTRY_IO_BOOTIN 0
294#define ENTRY_IO_BOOTOUT 1
295#define ENTRY_IO_CIN 2
296#define ENTRY_IO_COUT 3
297#define ENTRY_IO_CLOSE 4
298#define ENTRY_IO_GETMSG 9
299#define ENTRY_IO_BBLOCK_IN 16
300#define ENTRY_IO_BBLOCK_OUT 17
301
302/* IODC ENTRY_SPA() */
303
304/* IODC ENTRY_CONFIG() */
305
306/* IODC ENTRY_TEST() */
307
308/* IODC ENTRY_TLB() */
309
310/* constants for OS (NVM...) */
311#define OS_ID_NONE 0 /* Undefined OS ID */
312#define OS_ID_HPUX 1 /* HP-UX OS */
313#define OS_ID_MPEXL 2 /* MPE XL OS */
314#define OS_ID_OSF 3 /* OSF OS */
315#define OS_ID_HPRT 4 /* HP-RT OS */
316#define OS_ID_NOVEL 5 /* NOVELL OS */
317#define OS_ID_LINUX 6 /* Linux */
318
319
320/* constants for PDC_CHASSIS */
321#define OSTAT_OFF 0
322#define OSTAT_FLT 1
323#define OSTAT_TEST 2
324#define OSTAT_INIT 3
325#define OSTAT_SHUT 4
326#define OSTAT_WARN 5
327#define OSTAT_RUN 6
328#define OSTAT_ON 7
329
330/* Page Zero constant offsets used by the HPMC handler */
331#define BOOT_CONSOLE_HPA_OFFSET 0x3c0
332#define BOOT_CONSOLE_SPA_OFFSET 0x3c4
333#define BOOT_CONSOLE_PATH_OFFSET 0x3a8
334
335#if !defined(__ASSEMBLY__)
336#ifdef __KERNEL__
337
338#include <linux/types.h>
339
340extern int pdc_type;
341
342/* Values for pdc_type */
343#define PDC_TYPE_ILLEGAL -1
344#define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
345#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
346#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
347
348struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
349 unsigned long actcnt; /* actual number of bytes returned */
350 unsigned long maxcnt; /* maximum number of bytes that could be returned */
351};
352
353struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
354 unsigned long ccr_functional;
355 unsigned long ccr_present;
356 unsigned long revision;
357 unsigned long model;
358};
359
360struct pdc_model { /* for PDC_MODEL */
361 unsigned long hversion;
362 unsigned long sversion;
363 unsigned long hw_id;
364 unsigned long boot_id;
365 unsigned long sw_id;
366 unsigned long sw_cap;
367 unsigned long arch_rev;
368 unsigned long pot_key;
369 unsigned long curr_key;
370};
371
372struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
373 unsigned long
374#ifdef CONFIG_64BIT
375 cc_padW:32,
376#endif
377 cc_alias: 4, /* alias boundaries for virtual addresses */
378 cc_block: 4, /* to determine most efficient stride */
379 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
380 cc_shift: 2, /* how much to shift cc_block left */
381 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
382 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
383 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
384 cc_pad1 : 10, /* reserved */
385 cc_hv : 3; /* hversion dependent */
386};
387
388struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
389 unsigned long tc_pad0:12, /* reserved */
390#ifdef CONFIG_64BIT
391 tc_padW:32,
392#endif
393 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
394 tc_hv : 1, /* HV */
395 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
396 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
397 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
398 tc_pad1 : 8; /* ITLB: width of space-registers (encoded) */
399};
400
401struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
402 /* I-cache */
403 unsigned long ic_size; /* size in bytes */
404 struct pdc_cache_cf ic_conf; /* configuration */
405 unsigned long ic_base; /* base-addr */
406 unsigned long ic_stride;
407 unsigned long ic_count;
408 unsigned long ic_loop;
409 /* D-cache */
410 unsigned long dc_size; /* size in bytes */
411 struct pdc_cache_cf dc_conf; /* configuration */
412 unsigned long dc_base; /* base-addr */
413 unsigned long dc_stride;
414 unsigned long dc_count;
415 unsigned long dc_loop;
416 /* Instruction-TLB */
417 unsigned long it_size; /* number of entries in I-TLB */
418 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
419 unsigned long it_sp_base;
420 unsigned long it_sp_stride;
421 unsigned long it_sp_count;
422 unsigned long it_off_base;
423 unsigned long it_off_stride;
424 unsigned long it_off_count;
425 unsigned long it_loop;
426 /* data-TLB */
427 unsigned long dt_size; /* number of entries in D-TLB */
428 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
429 unsigned long dt_sp_base;
430 unsigned long dt_sp_stride;
431 unsigned long dt_sp_count;
432 unsigned long dt_off_base;
433 unsigned long dt_off_stride;
434 unsigned long dt_off_count;
435 unsigned long dt_loop;
436};
437
438#if 0
439/* If you start using the next struct, you'll have to adjust it to
440 * work with 64-bit firmware I think -PB
441 */
442struct pdc_iodc { /* PDC_IODC */
443 unsigned char hversion_model;
444 unsigned char hversion;
445 unsigned char spa;
446 unsigned char type;
447 unsigned int sversion_rev:4;
448 unsigned int sversion_model:19;
449 unsigned int sversion_opt:8;
450 unsigned char rev;
451 unsigned char dep;
452 unsigned char features;
453 unsigned char pad1;
454 unsigned int checksum:16;
455 unsigned int length:16;
456 unsigned int pad[15];
457} __attribute__((aligned(8))) ;
458#endif
459
460#ifndef CONFIG_PA20
461/* no BLTBs in pa2.0 processors */
462struct pdc_btlb_info_range {
463 __u8 res00;
464 __u8 num_i;
465 __u8 num_d;
466 __u8 num_comb;
467};
468
469struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
470 unsigned int min_size; /* minimum size of BTLB in pages */
471 unsigned int max_size; /* maximum size of BTLB in pages */
472 struct pdc_btlb_info_range fixed_range_info;
473 struct pdc_btlb_info_range variable_range_info;
474};
475
476#endif /* !CONFIG_PA20 */
477
478#ifdef CONFIG_64BIT
479struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
480 unsigned long entries_returned;
481 unsigned long entries_total;
482};
483
484struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
485 unsigned long paddr;
486 unsigned int pages;
487 unsigned int reserved;
488};
489#endif /* CONFIG_64BIT */
490
491struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
492 unsigned long mod_addr;
493 unsigned long mod_pgs;
494 unsigned long add_addrs;
495};
496
497struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
498 unsigned long mod_addr;
499 unsigned long mod_pgs;
500};
501
502struct pdc_initiator { /* PDC_INITIATOR */
503 int host_id;
504 int factor;
505 int width;
506 int mode;
507};
508
509struct hardware_path {
510 char flags; /* see bit definitions below */
511 char bc[6]; /* Bus Converter routing info to a specific */
512 /* I/O adaptor (< 0 means none, > 63 resvd) */
513 char mod; /* fixed field of specified module */
514};
515
516/*
517 * Device path specifications used by PDC.
518 */
519struct pdc_module_path {
520 struct hardware_path path;
521 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
522};
523
524#ifndef CONFIG_PA20
525/* Only used on some pre-PA2.0 boxes */
526struct pdc_memory_map { /* PDC_MEMORY_MAP */
527 unsigned long hpa; /* mod's register set address */
528 unsigned long more_pgs; /* number of additional I/O pgs */
529};
530#endif
531
532struct pdc_tod {
533 unsigned long tod_sec;
534 unsigned long tod_usec;
535};
536
537/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
538
539struct pdc_hpmc_pim_11 { /* PDC_PIM */
540 __u32 gr[32];
541 __u32 cr[32];
542 __u32 sr[8];
543 __u32 iasq_back;
544 __u32 iaoq_back;
545 __u32 check_type;
546 __u32 cpu_state;
547 __u32 rsvd1;
548 __u32 cache_check;
549 __u32 tlb_check;
550 __u32 bus_check;
551 __u32 assists_check;
552 __u32 rsvd2;
553 __u32 assist_state;
554 __u32 responder_addr;
555 __u32 requestor_addr;
556 __u32 path_info;
557 __u64 fr[32];
558};
559
560/*
561 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
562 *
563 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
564 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
565 *
566 * Note also that there are unarchitected results available, which
567 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
568 * the firmware is probably the best way of printing hversion dependent
569 * data.
570 */
571
572struct pdc_hpmc_pim_20 { /* PDC_PIM */
573 __u64 gr[32];
574 __u64 cr[32];
575 __u64 sr[8];
576 __u64 iasq_back;
577 __u64 iaoq_back;
578 __u32 check_type;
579 __u32 cpu_state;
580 __u32 cache_check;
581 __u32 tlb_check;
582 __u32 bus_check;
583 __u32 assists_check;
584 __u32 assist_state;
585 __u32 path_info;
586 __u64 responder_addr;
587 __u64 requestor_addr;
588 __u64 fr[32];
589};
590
591void pdc_console_init(void); /* in pdc_console.c */
592void pdc_console_restart(void);
593
594void setup_pdc(void); /* in inventory.c */
595
596/* wrapper-functions from pdc.c */
597
598int pdc_add_valid(unsigned long address);
599int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
600int pdc_chassis_disp(unsigned long disp);
601int pdc_chassis_warn(unsigned long *warn);
602int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
603int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
604 void *iodc_data, unsigned int iodc_data_size);
605int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
606 struct pdc_module_path *mod_path, long mod_index);
607int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
608 long mod_index, long addr_index);
609int pdc_model_info(struct pdc_model *model);
610int pdc_model_sysmodel(char *name);
611int pdc_model_cpuid(unsigned long *cpu_id);
612int pdc_model_versions(unsigned long *versions, int id);
613int pdc_model_capabilities(unsigned long *capabilities);
614int pdc_cache_info(struct pdc_cache_info *cache);
615int pdc_spaceid_bits(unsigned long *space_bits);
616#ifndef CONFIG_PA20
617int pdc_btlb_info(struct pdc_btlb_info *btlb);
618int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
619#endif /* !CONFIG_PA20 */
620int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
621
622int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
623int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
624int pdc_stable_get_size(unsigned long *size);
625int pdc_stable_verify_contents(void);
626int pdc_stable_initialize(void);
627
628int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
629int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
630
631int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
632int pdc_tod_read(struct pdc_tod *tod);
633int pdc_tod_set(unsigned long sec, unsigned long usec);
634
635#ifdef CONFIG_64BIT
636int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
637 struct pdc_memory_table *tbl, unsigned long entries);
638#endif
639
640void set_firmware_width(void);
641int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
642int pdc_do_reset(void);
643int pdc_soft_power_info(unsigned long *power_reg);
644int pdc_soft_power_button(int sw_control);
645void pdc_io_reset(void);
646void pdc_io_reset_devices(void);
647int pdc_iodc_getc(void);
648int pdc_iodc_print(const unsigned char *str, unsigned count);
649
650void pdc_emergency_unlock(void);
651int pdc_sti_call(unsigned long func, unsigned long flags,
652 unsigned long inptr, unsigned long outputr,
653 unsigned long glob_cfg);
654
655static inline char * os_id_to_string(u16 os_id) {
656 switch(os_id) {
657 case OS_ID_NONE: return "No OS";
658 case OS_ID_HPUX: return "HP-UX";
659 case OS_ID_MPEXL: return "MPE-iX";
660 case OS_ID_OSF: return "OSF";
661 case OS_ID_HPRT: return "HP-RT";
662 case OS_ID_NOVEL: return "Novell Netware";
663 case OS_ID_LINUX: return "Linux";
664 default: return "Unknown";
665 }
666}
667
668#endif /* __KERNEL__ */
669
670#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
671
672/* DEFINITION OF THE ZERO-PAGE (PAG0) */
673/* based on work by Jason Eckhardt (jason@equator.com) */
674
675/* flags of the device_path */
676#define PF_AUTOBOOT 0x80
677#define PF_AUTOSEARCH 0x40
678#define PF_TIMER 0x0F
679
680struct device_path { /* page 1-69 */
681 unsigned char flags; /* flags see above! */
682 unsigned char bc[6]; /* bus converter routing info */
683 unsigned char mod;
684 unsigned int layers[6];/* device-specific layer-info */
685} __attribute__((aligned(8))) ;
686
687struct pz_device {
688 struct device_path dp; /* see above */
689 /* struct iomod *hpa; */
690 unsigned int hpa; /* HPA base address */
691 /* char *spa; */
692 unsigned int spa; /* SPA base address */
693 /* int (*iodc_io)(struct iomod*, ...); */
694 unsigned int iodc_io; /* device entry point */
695 short pad; /* reserved */
696 unsigned short cl_class;/* see below */
697} __attribute__((aligned(8))) ;
698
699struct zeropage {
700 /* [0x000] initialize vectors (VEC) */
701 unsigned int vec_special; /* must be zero */
702 /* int (*vec_pow_fail)(void);*/
703 unsigned int vec_pow_fail; /* power failure handler */
704 /* int (*vec_toc)(void); */
705 unsigned int vec_toc;
706 unsigned int vec_toclen;
707 /* int (*vec_rendz)(void); */
708 unsigned int vec_rendz;
709 int vec_pow_fail_flen;
710 int vec_pad[10];
711
712 /* [0x040] reserved processor dependent */
713 int pad0[112];
714
715 /* [0x200] reserved */
716 int pad1[84];
717
718 /* [0x350] memory configuration (MC) */
719 int memc_cont; /* contiguous mem size (bytes) */
720 int memc_phsize; /* physical memory size */
721 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
722 unsigned int mem_pdc_hi; /* used for 64-bit */
723
724 /* [0x360] various parameters for the boot-CPU */
725 /* unsigned int *mem_booterr[8]; */
726 unsigned int mem_booterr[8]; /* ptr to boot errors */
727 unsigned int mem_free; /* first location, where OS can be loaded */
728 /* struct iomod *mem_hpa; */
729 unsigned int mem_hpa; /* HPA of the boot-CPU */
730 /* int (*mem_pdc)(int, ...); */
731 unsigned int mem_pdc; /* PDC entry point */
732 unsigned int mem_10msec; /* number of clock ticks in 10msec */
733
734 /* [0x390] initial memory module (IMM) */
735 /* struct iomod *imm_hpa; */
736 unsigned int imm_hpa; /* HPA of the IMM */
737 int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */
738 unsigned int imm_spa_size; /* SPA size of the IMM in bytes */
739 unsigned int imm_max_mem; /* bytes of mem in IMM */
740
741 /* [0x3A0] boot console, display device and keyboard */
742 struct pz_device mem_cons; /* description of console device */
743 struct pz_device mem_boot; /* description of boot device */
744 struct pz_device mem_kbd; /* description of keyboard device */
745
746 /* [0x430] reserved */
747 int pad430[116];
748
749 /* [0x600] processor dependent */
750 __u32 pad600[1];
751 __u32 proc_sti; /* pointer to STI ROM */
752 __u32 pad608[126];
753};
754
755#endif /* !defined(__ASSEMBLY__) */
756
757#endif /* _PARISC_PDC_H */
diff --git a/include/asm-parisc/pdc_chassis.h b/include/asm-parisc/pdc_chassis.h
deleted file mode 100644
index a609273dc6bf..000000000000
--- a/include/asm-parisc/pdc_chassis.h
+++ /dev/null
@@ -1,381 +0,0 @@
1/*
2 * include/asm-parisc/pdc_chassis.h
3 *
4 * Copyright (C) 2002 Laurent Canet <canetl@esiee.fr>
5 * Copyright (C) 2002 Thibaut Varene <varenet@parisc-linux.org>
6 *
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License, version 2, as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * TODO: - handle processor number on SMP systems (Reporting Entity ID)
22 * - handle message ID
23 * - handle timestamps
24 */
25
26
27#ifndef _PARISC_PDC_CHASSIS_H
28#define _PARISC_PDC_CHASSIS_H
29
30/*
31 * ----------
32 * Prototypes
33 * ----------
34 */
35
36int pdc_chassis_send_status(int message);
37void parisc_pdc_chassis_init(void);
38
39
40/*
41 * -----------------
42 * Direct call names
43 * -----------------
44 * They setup everything for you, the Log message and the corresponding LED state
45 */
46
47#define PDC_CHASSIS_DIRECT_BSTART 0
48#define PDC_CHASSIS_DIRECT_BCOMPLETE 1
49#define PDC_CHASSIS_DIRECT_SHUTDOWN 2
50#define PDC_CHASSIS_DIRECT_PANIC 3
51#define PDC_CHASSIS_DIRECT_HPMC 4
52#define PDC_CHASSIS_DIRECT_LPMC 5
53#define PDC_CHASSIS_DIRECT_DUMP 6 /* not yet implemented */
54#define PDC_CHASSIS_DIRECT_OOPS 7 /* not yet implemented */
55
56
57/*
58 * ------------
59 * LEDs control
60 * ------------
61 * Set the three LEDs -- Run, Attn, and Fault.
62 */
63
64/* Old PDC LED control */
65#define PDC_CHASSIS_DISP_DATA(v) ((unsigned long)(v) << 17)
66
67/*
68 * Available PDC PAT LED states
69 */
70
71#define PDC_CHASSIS_LED_RUN_OFF (0ULL << 4)
72#define PDC_CHASSIS_LED_RUN_FLASH (1ULL << 4)
73#define PDC_CHASSIS_LED_RUN_ON (2ULL << 4)
74#define PDC_CHASSIS_LED_RUN_NC (3ULL << 4)
75#define PDC_CHASSIS_LED_ATTN_OFF (0ULL << 6)
76#define PDC_CHASSIS_LED_ATTN_FLASH (1ULL << 6)
77#define PDC_CHASSIS_LED_ATTN_NC (3ULL << 6) /* ATTN ON is invalid */
78#define PDC_CHASSIS_LED_FAULT_OFF (0ULL << 8)
79#define PDC_CHASSIS_LED_FAULT_FLASH (1ULL << 8)
80#define PDC_CHASSIS_LED_FAULT_ON (2ULL << 8)
81#define PDC_CHASSIS_LED_FAULT_NC (3ULL << 8)
82#define PDC_CHASSIS_LED_VALID (1ULL << 10)
83
84/*
85 * Valid PDC PAT LED states combinations
86 */
87
88/* System running normally */
89#define PDC_CHASSIS_LSTATE_RUN_NORMAL (PDC_CHASSIS_LED_RUN_ON | \
90 PDC_CHASSIS_LED_ATTN_OFF | \
91 PDC_CHASSIS_LED_FAULT_OFF | \
92 PDC_CHASSIS_LED_VALID )
93/* System crashed and rebooted itself successfully */
94#define PDC_CHASSIS_LSTATE_RUN_CRASHREC (PDC_CHASSIS_LED_RUN_ON | \
95 PDC_CHASSIS_LED_ATTN_OFF | \
96 PDC_CHASSIS_LED_FAULT_FLASH | \
97 PDC_CHASSIS_LED_VALID )
98/* There was a system interruption that did not take the system down */
99#define PDC_CHASSIS_LSTATE_RUN_SYSINT (PDC_CHASSIS_LED_RUN_ON | \
100 PDC_CHASSIS_LED_ATTN_FLASH | \
101 PDC_CHASSIS_LED_FAULT_OFF | \
102 PDC_CHASSIS_LED_VALID )
103/* System running and unexpected reboot or non-critical error detected */
104#define PDC_CHASSIS_LSTATE_RUN_NCRIT (PDC_CHASSIS_LED_RUN_ON | \
105 PDC_CHASSIS_LED_ATTN_FLASH | \
106 PDC_CHASSIS_LED_FAULT_FLASH | \
107 PDC_CHASSIS_LED_VALID )
108/* Executing non-OS code */
109#define PDC_CHASSIS_LSTATE_NONOS (PDC_CHASSIS_LED_RUN_FLASH | \
110 PDC_CHASSIS_LED_ATTN_OFF | \
111 PDC_CHASSIS_LED_FAULT_OFF | \
112 PDC_CHASSIS_LED_VALID )
113/* Boot failed - Executing non-OS code */
114#define PDC_CHASSIS_LSTATE_NONOS_BFAIL (PDC_CHASSIS_LED_RUN_FLASH | \
115 PDC_CHASSIS_LED_ATTN_OFF | \
116 PDC_CHASSIS_LED_FAULT_ON | \
117 PDC_CHASSIS_LED_VALID )
118/* Unexpected reboot occurred - Executing non-OS code */
119#define PDC_CHASSIS_LSTATE_NONOS_UNEXP (PDC_CHASSIS_LED_RUN_FLASH | \
120 PDC_CHASSIS_LED_ATTN_OFF | \
121 PDC_CHASSIS_LED_FAULT_FLASH | \
122 PDC_CHASSIS_LED_VALID )
123/* Executing non-OS code - Non-critical error detected */
124#define PDC_CHASSIS_LSTATE_NONOS_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
125 PDC_CHASSIS_LED_ATTN_FLASH | \
126 PDC_CHASSIS_LED_FAULT_OFF | \
127 PDC_CHASSIS_LED_VALID )
128/* Boot failed - Executing non-OS code - Non-critical error detected */
129#define PDC_CHASSIS_LSTATE_BFAIL_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
130 PDC_CHASSIS_LED_ATTN_FLASH | \
131 PDC_CHASSIS_LED_FAULT_ON | \
132 PDC_CHASSIS_LED_VALID )
133/* Unexpected reboot/recovering - Executing non-OS code - Non-critical error detected */
134#define PDC_CHASSIS_LSTATE_UNEXP_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
135 PDC_CHASSIS_LED_ATTN_FLASH | \
136 PDC_CHASSIS_LED_FAULT_FLASH | \
137 PDC_CHASSIS_LED_VALID )
138/* Cannot execute PDC */
139#define PDC_CHASSIS_LSTATE_CANNOT_PDC (PDC_CHASSIS_LED_RUN_OFF | \
140 PDC_CHASSIS_LED_ATTN_OFF | \
141 PDC_CHASSIS_LED_FAULT_OFF | \
142 PDC_CHASSIS_LED_VALID )
143/* Boot failed - OS not up - PDC has detected a failure that prevents boot */
144#define PDC_CHASSIS_LSTATE_FATAL_BFAIL (PDC_CHASSIS_LED_RUN_OFF | \
145 PDC_CHASSIS_LED_ATTN_OFF | \
146 PDC_CHASSIS_LED_FAULT_ON | \
147 PDC_CHASSIS_LED_VALID )
148/* No code running - Non-critical error detected (double fault situation) */
149#define PDC_CHASSIS_LSTATE_NOCODE_NCRIT (PDC_CHASSIS_LED_RUN_OFF | \
150 PDC_CHASSIS_LED_ATTN_FLASH | \
151 PDC_CHASSIS_LED_FAULT_OFF | \
152 PDC_CHASSIS_LED_VALID )
153/* Boot failed - OS not up - Fatal failure detected - Non-critical error detected */
154#define PDC_CHASSIS_LSTATE_FATAL_NCRIT (PDC_CHASSIS_LED_RUN_OFF | \
155 PDC_CHASSIS_LED_ATTN_FLASH | \
156 PDC_CHASSIS_LED_FAULT_ON | \
157 PDC_CHASSIS_LED_VALID )
158/* All other states are invalid */
159
160
161/*
162 * --------------
163 * PDC Log events
164 * --------------
165 * Here follows bits needed to fill up the log event sent to PDC_CHASSIS
166 * The log message contains: Alert level, Source, Source detail,
167 * Source ID, Problem detail, Caller activity, Activity status,
168 * Caller subactivity, Reporting entity type, Reporting entity ID,
169 * Data type, Unique message ID and EOM.
170 */
171
172/* Alert level */
173#define PDC_CHASSIS_ALERT_FORWARD (0ULL << 36) /* no failure detected */
174#define PDC_CHASSIS_ALERT_SERPROC (1ULL << 36) /* service proc - no failure */
175#define PDC_CHASSIS_ALERT_NURGENT (2ULL << 36) /* non-urgent operator attn */
176#define PDC_CHASSIS_ALERT_BLOCKED (3ULL << 36) /* system blocked */
177#define PDC_CHASSIS_ALERT_CONF_CHG (4ULL << 36) /* unexpected configuration change */
178#define PDC_CHASSIS_ALERT_ENV_PB (5ULL << 36) /* boot possible, environmental pb */
179#define PDC_CHASSIS_ALERT_PENDING (6ULL << 36) /* boot possible, pending failure */
180#define PDC_CHASSIS_ALERT_PERF_IMP (8ULL << 36) /* boot possible, performance impaired */
181#define PDC_CHASSIS_ALERT_FUNC_IMP (10ULL << 36) /* boot possible, functionality impaired */
182#define PDC_CHASSIS_ALERT_SOFT_FAIL (12ULL << 36) /* software failure */
183#define PDC_CHASSIS_ALERT_HANG (13ULL << 36) /* system hang */
184#define PDC_CHASSIS_ALERT_ENV_FATAL (14ULL << 36) /* fatal power or environmental pb */
185#define PDC_CHASSIS_ALERT_HW_FATAL (15ULL << 36) /* fatal hardware problem */
186
187/* Source */
188#define PDC_CHASSIS_SRC_NONE (0ULL << 28) /* unknown, no source stated */
189#define PDC_CHASSIS_SRC_PROC (1ULL << 28) /* processor */
190/* For later use ? */
191#define PDC_CHASSIS_SRC_PROC_CACHE (2ULL << 28) /* processor cache*/
192#define PDC_CHASSIS_SRC_PDH (3ULL << 28) /* processor dependent hardware */
193#define PDC_CHASSIS_SRC_PWR (4ULL << 28) /* power */
194#define PDC_CHASSIS_SRC_FAB (5ULL << 28) /* fabric connector */
195#define PDC_CHASSIS_SRC_PLATi (6ULL << 28) /* platform */
196#define PDC_CHASSIS_SRC_MEM (7ULL << 28) /* memory */
197#define PDC_CHASSIS_SRC_IO (8ULL << 28) /* I/O */
198#define PDC_CHASSIS_SRC_CELL (9ULL << 28) /* cell */
199#define PDC_CHASSIS_SRC_PD (10ULL << 28) /* protected domain */
200
201/* Source detail field */
202#define PDC_CHASSIS_SRC_D_PROC (1ULL << 24) /* processor general */
203
204/* Source ID - platform dependent */
205#define PDC_CHASSIS_SRC_ID_UNSPEC (0ULL << 16)
206
207/* Problem detail - problem source dependent */
208#define PDC_CHASSIS_PB_D_PROC_NONE (0ULL << 32) /* no problem detail */
209#define PDC_CHASSIS_PB_D_PROC_TIMEOUT (4ULL << 32) /* timeout */
210
211/* Caller activity */
212#define PDC_CHASSIS_CALL_ACT_HPUX_BL (7ULL << 12) /* Boot Loader */
213#define PDC_CHASSIS_CALL_ACT_HPUX_PD (8ULL << 12) /* SAL_PD activities */
214#define PDC_CHASSIS_CALL_ACT_HPUX_EVENT (9ULL << 12) /* SAL_EVENTS activities */
215#define PDC_CHASSIS_CALL_ACT_HPUX_IO (10ULL << 12) /* SAL_IO activities */
216#define PDC_CHASSIS_CALL_ACT_HPUX_PANIC (11ULL << 12) /* System panic */
217#define PDC_CHASSIS_CALL_ACT_HPUX_INIT (12ULL << 12) /* System initialization */
218#define PDC_CHASSIS_CALL_ACT_HPUX_SHUT (13ULL << 12) /* System shutdown */
219#define PDC_CHASSIS_CALL_ACT_HPUX_WARN (14ULL << 12) /* System warning */
220#define PDC_CHASSIS_CALL_ACT_HPUX_DU (15ULL << 12) /* Display_Activity() update */
221
222/* Activity status - implementation dependent */
223#define PDC_CHASSIS_ACT_STATUS_UNSPEC (0ULL << 0)
224
225/* Caller subactivity - implementation dependent */
226/* FIXME: other subactivities ? */
227#define PDC_CHASSIS_CALL_SACT_UNSPEC (0ULL << 4) /* implementation dependent */
228
229/* Reporting entity type */
230#define PDC_CHASSIS_RET_GENERICOS (12ULL << 52) /* generic OSes */
231#define PDC_CHASSIS_RET_IA64_NT (13ULL << 52) /* IA-64 NT */
232#define PDC_CHASSIS_RET_HPUX (14ULL << 52) /* HP-UX */
233#define PDC_CHASSIS_RET_DIAG (15ULL << 52) /* offline diagnostics & utilities */
234
235/* Reporting entity ID */
236#define PDC_CHASSIS_REID_UNSPEC (0ULL << 44)
237
238/* Data type */
239#define PDC_CHASSIS_DT_NONE (0ULL << 59) /* data field unused */
240/* For later use ? Do we need these ? */
241#define PDC_CHASSIS_DT_PHYS_ADDR (1ULL << 59) /* physical address */
242#define PDC_CHASSIS_DT_DATA_EXPECT (2ULL << 59) /* expected data */
243#define PDC_CHASSIS_DT_ACTUAL (3ULL << 59) /* actual data */
244#define PDC_CHASSIS_DT_PHYS_LOC (4ULL << 59) /* physical location */
245#define PDC_CHASSIS_DT_PHYS_LOC_EXT (5ULL << 59) /* physical location extension */
246#define PDC_CHASSIS_DT_TAG (6ULL << 59) /* tag */
247#define PDC_CHASSIS_DT_SYNDROME (7ULL << 59) /* syndrome */
248#define PDC_CHASSIS_DT_CODE_ADDR (8ULL << 59) /* code address */
249#define PDC_CHASSIS_DT_ASCII_MSG (9ULL << 59) /* ascii message */
250#define PDC_CHASSIS_DT_POST (10ULL << 59) /* POST code */
251#define PDC_CHASSIS_DT_TIMESTAMP (11ULL << 59) /* timestamp */
252#define PDC_CHASSIS_DT_DEV_STAT (12ULL << 59) /* device status */
253#define PDC_CHASSIS_DT_DEV_TYPE (13ULL << 59) /* device type */
254#define PDC_CHASSIS_DT_PB_DET (14ULL << 59) /* problem detail */
255#define PDC_CHASSIS_DT_ACT_LEV (15ULL << 59) /* activity level/timeout */
256#define PDC_CHASSIS_DT_SER_NUM (16ULL << 59) /* serial number */
257#define PDC_CHASSIS_DT_REV_NUM (17ULL << 59) /* revision number */
258#define PDC_CHASSIS_DT_INTERRUPT (18ULL << 59) /* interruption information */
259#define PDC_CHASSIS_DT_TEST_NUM (19ULL << 59) /* test number */
260#define PDC_CHASSIS_DT_STATE_CHG (20ULL << 59) /* major changes in system state */
261#define PDC_CHASSIS_DT_PROC_DEALLOC (21ULL << 59) /* processor deallocate */
262#define PDC_CHASSIS_DT_RESET (30ULL << 59) /* reset type and cause */
263#define PDC_CHASSIS_DT_PA_LEGACY (31ULL << 59) /* legacy PA hex chassis code */
264
265/* System states - part of major changes in system state data field */
266#define PDC_CHASSIS_SYSTATE_BSTART (0ULL << 0) /* boot start */
267#define PDC_CHASSIS_SYSTATE_BCOMP (1ULL << 0) /* boot complete */
268#define PDC_CHASSIS_SYSTATE_CHANGE (2ULL << 0) /* major change */
269#define PDC_CHASSIS_SYSTATE_LED (3ULL << 0) /* LED change */
270#define PDC_CHASSIS_SYSTATE_PANIC (9ULL << 0) /* OS Panic */
271#define PDC_CHASSIS_SYSTATE_DUMP (10ULL << 0) /* memory dump */
272#define PDC_CHASSIS_SYSTATE_HPMC (11ULL << 0) /* processing HPMC */
273#define PDC_CHASSIS_SYSTATE_HALT (15ULL << 0) /* system halted */
274
275/* Message ID */
276#define PDC_CHASSIS_MSG_ID (0ULL << 40) /* we do not handle msg IDs atm */
277
278/* EOM - separates log entries */
279#define PDC_CHASSIS_EOM_CLEAR (0ULL << 43)
280#define PDC_CHASSIS_EOM_SET (1ULL << 43)
281
282/*
283 * Preformated well known messages
284 */
285
286/* Boot started */
287#define PDC_CHASSIS_PMSG_BSTART (PDC_CHASSIS_ALERT_SERPROC | \
288 PDC_CHASSIS_SRC_PROC | \
289 PDC_CHASSIS_SRC_D_PROC | \
290 PDC_CHASSIS_SRC_ID_UNSPEC | \
291 PDC_CHASSIS_PB_D_PROC_NONE | \
292 PDC_CHASSIS_CALL_ACT_HPUX_INIT | \
293 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
294 PDC_CHASSIS_CALL_SACT_UNSPEC | \
295 PDC_CHASSIS_RET_HPUX | \
296 PDC_CHASSIS_REID_UNSPEC | \
297 PDC_CHASSIS_DT_STATE_CHG | \
298 PDC_CHASSIS_SYSTATE_BSTART | \
299 PDC_CHASSIS_MSG_ID | \
300 PDC_CHASSIS_EOM_SET )
301
302/* Boot complete */
303#define PDC_CHASSIS_PMSG_BCOMPLETE (PDC_CHASSIS_ALERT_SERPROC | \
304 PDC_CHASSIS_SRC_PROC | \
305 PDC_CHASSIS_SRC_D_PROC | \
306 PDC_CHASSIS_SRC_ID_UNSPEC | \
307 PDC_CHASSIS_PB_D_PROC_NONE | \
308 PDC_CHASSIS_CALL_ACT_HPUX_INIT | \
309 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
310 PDC_CHASSIS_CALL_SACT_UNSPEC | \
311 PDC_CHASSIS_RET_HPUX | \
312 PDC_CHASSIS_REID_UNSPEC | \
313 PDC_CHASSIS_DT_STATE_CHG | \
314 PDC_CHASSIS_SYSTATE_BCOMP | \
315 PDC_CHASSIS_MSG_ID | \
316 PDC_CHASSIS_EOM_SET )
317
318/* Shutdown */
319#define PDC_CHASSIS_PMSG_SHUTDOWN (PDC_CHASSIS_ALERT_SERPROC | \
320 PDC_CHASSIS_SRC_PROC | \
321 PDC_CHASSIS_SRC_D_PROC | \
322 PDC_CHASSIS_SRC_ID_UNSPEC | \
323 PDC_CHASSIS_PB_D_PROC_NONE | \
324 PDC_CHASSIS_CALL_ACT_HPUX_SHUT | \
325 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
326 PDC_CHASSIS_CALL_SACT_UNSPEC | \
327 PDC_CHASSIS_RET_HPUX | \
328 PDC_CHASSIS_REID_UNSPEC | \
329 PDC_CHASSIS_DT_STATE_CHG | \
330 PDC_CHASSIS_SYSTATE_HALT | \
331 PDC_CHASSIS_MSG_ID | \
332 PDC_CHASSIS_EOM_SET )
333
334/* Panic */
335#define PDC_CHASSIS_PMSG_PANIC (PDC_CHASSIS_ALERT_SOFT_FAIL | \
336 PDC_CHASSIS_SRC_PROC | \
337 PDC_CHASSIS_SRC_D_PROC | \
338 PDC_CHASSIS_SRC_ID_UNSPEC | \
339 PDC_CHASSIS_PB_D_PROC_NONE | \
340 PDC_CHASSIS_CALL_ACT_HPUX_PANIC| \
341 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
342 PDC_CHASSIS_CALL_SACT_UNSPEC | \
343 PDC_CHASSIS_RET_HPUX | \
344 PDC_CHASSIS_REID_UNSPEC | \
345 PDC_CHASSIS_DT_STATE_CHG | \
346 PDC_CHASSIS_SYSTATE_PANIC | \
347 PDC_CHASSIS_MSG_ID | \
348 PDC_CHASSIS_EOM_SET )
349
350// FIXME: extrapolated data
351/* HPMC */
352#define PDC_CHASSIS_PMSG_HPMC (PDC_CHASSIS_ALERT_CONF_CHG /*?*/ | \
353 PDC_CHASSIS_SRC_PROC | \
354 PDC_CHASSIS_SRC_D_PROC | \
355 PDC_CHASSIS_SRC_ID_UNSPEC | \
356 PDC_CHASSIS_PB_D_PROC_NONE | \
357 PDC_CHASSIS_CALL_ACT_HPUX_WARN | \
358 PDC_CHASSIS_RET_HPUX | \
359 PDC_CHASSIS_DT_STATE_CHG | \
360 PDC_CHASSIS_SYSTATE_HPMC | \
361 PDC_CHASSIS_MSG_ID | \
362 PDC_CHASSIS_EOM_SET )
363
364/* LPMC */
365#define PDC_CHASSIS_PMSG_LPMC (PDC_CHASSIS_ALERT_BLOCKED /*?*/| \
366 PDC_CHASSIS_SRC_PROC | \
367 PDC_CHASSIS_SRC_D_PROC | \
368 PDC_CHASSIS_SRC_ID_UNSPEC | \
369 PDC_CHASSIS_PB_D_PROC_NONE | \
370 PDC_CHASSIS_CALL_ACT_HPUX_WARN | \
371 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
372 PDC_CHASSIS_CALL_SACT_UNSPEC | \
373 PDC_CHASSIS_RET_HPUX | \
374 PDC_CHASSIS_REID_UNSPEC | \
375 PDC_CHASSIS_DT_STATE_CHG | \
376 PDC_CHASSIS_SYSTATE_CHANGE | \
377 PDC_CHASSIS_MSG_ID | \
378 PDC_CHASSIS_EOM_SET )
379
380#endif /* _PARISC_PDC_CHASSIS_H */
381/* vim: set ts=8 */
diff --git a/include/asm-parisc/pdcpat.h b/include/asm-parisc/pdcpat.h
deleted file mode 100644
index 47539f117958..000000000000
--- a/include/asm-parisc/pdcpat.h
+++ /dev/null
@@ -1,308 +0,0 @@
1#ifndef __PARISC_PATPDC_H
2#define __PARISC_PATPDC_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright 2000 (c) Hewlett Packard (Paul Bame <bame()spam.parisc-linux.org>)
10 * Copyright 2000,2004 (c) Grant Grundler <grundler()nahspam.parisc-linux.org>
11 */
12
13
14#define PDC_PAT_CELL 64L /* Interface for gaining and
15 * manipulatin g cell state within PD */
16#define PDC_PAT_CELL_GET_NUMBER 0L /* Return Cell number */
17#define PDC_PAT_CELL_GET_INFO 1L /* Returns info about Cell */
18#define PDC_PAT_CELL_MODULE 2L /* Returns info about Module */
19#define PDC_PAT_CELL_SET_ATTENTION 9L /* Set Cell Attention indicator */
20#define PDC_PAT_CELL_NUMBER_TO_LOC 10L /* Cell Number -> Location */
21#define PDC_PAT_CELL_WALK_FABRIC 11L /* Walk the Fabric */
22#define PDC_PAT_CELL_GET_RDT_SIZE 12L /* Return Route Distance Table Sizes */
23#define PDC_PAT_CELL_GET_RDT 13L /* Return Route Distance Tables */
24#define PDC_PAT_CELL_GET_LOCAL_PDH_SZ 14L /* Read Local PDH Buffer Size */
25#define PDC_PAT_CELL_SET_LOCAL_PDH 15L /* Write Local PDH Buffer */
26#define PDC_PAT_CELL_GET_REMOTE_PDH_SZ 16L /* Return Remote PDH Buffer Size */
27#define PDC_PAT_CELL_GET_REMOTE_PDH 17L /* Read Remote PDH Buffer */
28#define PDC_PAT_CELL_GET_DBG_INFO 128L /* Return DBG Buffer Info */
29#define PDC_PAT_CELL_CHANGE_ALIAS 129L /* Change Non-Equivalent Alias Chacking */
30
31
32/*
33** Arg to PDC_PAT_CELL_MODULE memaddr[4]
34**
35** Addresses on the Merced Bus != all Runway Bus addresses.
36** This is intended for programming SBA/LBA chips range registers.
37*/
38#define IO_VIEW 0UL
39#define PA_VIEW 1UL
40
41/* PDC_PAT_CELL_MODULE entity type values */
42#define PAT_ENTITY_CA 0 /* central agent */
43#define PAT_ENTITY_PROC 1 /* processor */
44#define PAT_ENTITY_MEM 2 /* memory controller */
45#define PAT_ENTITY_SBA 3 /* system bus adapter */
46#define PAT_ENTITY_LBA 4 /* local bus adapter */
47#define PAT_ENTITY_PBC 5 /* processor bus converter */
48#define PAT_ENTITY_XBC 6 /* crossbar fabric connect */
49#define PAT_ENTITY_RC 7 /* fabric interconnect */
50
51/* PDC_PAT_CELL_MODULE address range type values */
52#define PAT_PBNUM 0 /* PCI Bus Number */
53#define PAT_LMMIO 1 /* < 4G MMIO Space */
54#define PAT_GMMIO 2 /* > 4G MMIO Space */
55#define PAT_NPIOP 3 /* Non Postable I/O Port Space */
56#define PAT_PIOP 4 /* Postable I/O Port Space */
57#define PAT_AHPA 5 /* Addional HPA Space */
58#define PAT_UFO 6 /* HPA Space (UFO for Mariposa) */
59#define PAT_GNIP 7 /* GNI Reserved Space */
60
61
62
63/* PDC PAT CHASSIS LOG -- Platform logging & forward progress functions */
64
65#define PDC_PAT_CHASSIS_LOG 65L
66#define PDC_PAT_CHASSIS_WRITE_LOG 0L /* Write Log Entry */
67#define PDC_PAT_CHASSIS_READ_LOG 1L /* Read Log Entry */
68
69
70/* PDC PAT CPU -- CPU configuration within the protection domain */
71
72#define PDC_PAT_CPU 67L
73#define PDC_PAT_CPU_INFO 0L /* Return CPU config info */
74#define PDC_PAT_CPU_DELETE 1L /* Delete CPU */
75#define PDC_PAT_CPU_ADD 2L /* Add CPU */
76#define PDC_PAT_CPU_GET_NUMBER 3L /* Return CPU Number */
77#define PDC_PAT_CPU_GET_HPA 4L /* Return CPU HPA */
78#define PDC_PAT_CPU_STOP 5L /* Stop CPU */
79#define PDC_PAT_CPU_RENDEZVOUS 6L /* Rendezvous CPU */
80#define PDC_PAT_CPU_GET_CLOCK_INFO 7L /* Return CPU Clock info */
81#define PDC_PAT_CPU_GET_RENDEZVOUS_STATE 8L /* Return Rendezvous State */
82#define PDC_PAT_CPU_PLUNGE_FABRIC 128L /* Plunge Fabric */
83#define PDC_PAT_CPU_UPDATE_CACHE_CLEANSING 129L /* Manipulate Cache
84 * Cleansing Mode */
85/* PDC PAT EVENT -- Platform Events */
86
87#define PDC_PAT_EVENT 68L
88#define PDC_PAT_EVENT_GET_CAPS 0L /* Get Capabilities */
89#define PDC_PAT_EVENT_SET_MODE 1L /* Set Notification Mode */
90#define PDC_PAT_EVENT_SCAN 2L /* Scan Event */
91#define PDC_PAT_EVENT_HANDLE 3L /* Handle Event */
92#define PDC_PAT_EVENT_GET_NB_CALL 4L /* Get Non-Blocking call Args */
93
94/* PDC PAT HPMC -- Cause processor to go into spin loop, and wait
95 * for wake up from Monarch Processor.
96 */
97
98#define PDC_PAT_HPMC 70L
99#define PDC_PAT_HPMC_RENDEZ_CPU 0L /* go into spin loop */
100#define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
101 * will use to interrupt OS during
102 * machine check rendezvous */
103
104/* parameters for PDC_PAT_HPMC_SET_PARAMS: */
105#define HPMC_SET_PARAMS_INTR 1L /* Rendezvous Interrupt */
106#define HPMC_SET_PARAMS_WAKE 2L /* Wake up processor */
107
108
109/* PDC PAT IO -- On-line services for I/O modules */
110
111#define PDC_PAT_IO 71L
112#define PDC_PAT_IO_GET_SLOT_STATUS 5L /* Get Slot Status Info*/
113#define PDC_PAT_IO_GET_LOC_FROM_HARDWARE 6L /* Get Physical Location from */
114 /* Hardware Path */
115#define PDC_PAT_IO_GET_HARDWARE_FROM_LOC 7L /* Get Hardware Path from
116 * Physical Location */
117#define PDC_PAT_IO_GET_PCI_CONFIG_FROM_HW 11L /* Get PCI Configuration
118 * Address from Hardware Path */
119#define PDC_PAT_IO_GET_HW_FROM_PCI_CONFIG 12L /* Get Hardware Path
120 * from PCI Configuration Address */
121#define PDC_PAT_IO_READ_HOST_BRIDGE_INFO 13L /* Read Host Bridge State Info */
122#define PDC_PAT_IO_CLEAR_HOST_BRIDGE_INFO 14L /* Clear Host Bridge State Info*/
123#define PDC_PAT_IO_GET_PCI_ROUTING_TABLE_SIZE 15L /* Get PCI INT Routing Table
124 * Size */
125#define PDC_PAT_IO_GET_PCI_ROUTING_TABLE 16L /* Get PCI INT Routing Table */
126#define PDC_PAT_IO_GET_HINT_TABLE_SIZE 17L /* Get Hint Table Size */
127#define PDC_PAT_IO_GET_HINT_TABLE 18L /* Get Hint Table */
128#define PDC_PAT_IO_PCI_CONFIG_READ 19L /* PCI Config Read */
129#define PDC_PAT_IO_PCI_CONFIG_WRITE 20L /* PCI Config Write */
130#define PDC_PAT_IO_GET_NUM_IO_SLOTS 21L /* Get Number of I/O Bay Slots in
131 * Cabinet */
132#define PDC_PAT_IO_GET_LOC_IO_SLOTS 22L /* Get Physical Location of I/O */
133 /* Bay Slots in Cabinet */
134#define PDC_PAT_IO_BAY_STATUS_INFO 28L /* Get I/O Bay Slot Status Info */
135#define PDC_PAT_IO_GET_PROC_VIEW 29L /* Get Processor view of IO address */
136#define PDC_PAT_IO_PROG_SBA_DIR_RANGE 30L /* Program directed range */
137
138
139/* PDC PAT MEM -- Manage memory page deallocation */
140
141#define PDC_PAT_MEM 72L
142#define PDC_PAT_MEM_PD_INFO 0L /* Return PDT info for PD */
143#define PDC_PAT_MEM_PD_CLEAR 1L /* Clear PDT for PD */
144#define PDC_PAT_MEM_PD_READ 2L /* Read PDT entries for PD */
145#define PDC_PAT_MEM_PD_RESET 3L /* Reset clear bit for PD */
146#define PDC_PAT_MEM_CELL_INFO 5L /* Return PDT info For Cell */
147#define PDC_PAT_MEM_CELL_CLEAR 6L /* Clear PDT For Cell */
148#define PDC_PAT_MEM_CELL_READ 7L /* Read PDT entries For Cell */
149#define PDC_PAT_MEM_CELL_RESET 8L /* Reset clear bit For Cell */
150#define PDC_PAT_MEM_SETGM 9L /* Set Golden Memory value */
151#define PDC_PAT_MEM_ADD_PAGE 10L /* ADDs a page to the cell */
152#define PDC_PAT_MEM_ADDRESS 11L /* Get Physical Location From */
153 /* Memory Address */
154#define PDC_PAT_MEM_GET_TXT_SIZE 12L /* Get Formatted Text Size */
155#define PDC_PAT_MEM_GET_PD_TXT 13L /* Get PD Formatted Text */
156#define PDC_PAT_MEM_GET_CELL_TXT 14L /* Get Cell Formatted Text */
157#define PDC_PAT_MEM_RD_STATE_INFO 15L /* Read Mem Module State Info*/
158#define PDC_PAT_MEM_CLR_STATE_INFO 16L /*Clear Mem Module State Info*/
159#define PDC_PAT_MEM_CLEAN_RANGE 128L /*Clean Mem in specific range*/
160#define PDC_PAT_MEM_GET_TBL_SIZE 131L /* Get Memory Table Size */
161#define PDC_PAT_MEM_GET_TBL 132L /* Get Memory Table */
162
163
164/* PDC PAT NVOLATILE -- Access Non-Volatile Memory */
165
166#define PDC_PAT_NVOLATILE 73L
167#define PDC_PAT_NVOLATILE_READ 0L /* Read Non-Volatile Memory */
168#define PDC_PAT_NVOLATILE_WRITE 1L /* Write Non-Volatile Memory */
169#define PDC_PAT_NVOLATILE_GET_SIZE 2L /* Return size of NVM */
170#define PDC_PAT_NVOLATILE_VERIFY 3L /* Verify contents of NVM */
171#define PDC_PAT_NVOLATILE_INIT 4L /* Initialize NVM */
172
173/* PDC PAT PD */
174#define PDC_PAT_PD 74L /* Protection Domain Info */
175#define PDC_PAT_PD_GET_ADDR_MAP 0L /* Get Address Map */
176
177/* PDC_PAT_PD_GET_ADDR_MAP entry types */
178#define PAT_MEMORY_DESCRIPTOR 1
179
180/* PDC_PAT_PD_GET_ADDR_MAP memory types */
181#define PAT_MEMTYPE_MEMORY 0
182#define PAT_MEMTYPE_FIRMWARE 4
183
184/* PDC_PAT_PD_GET_ADDR_MAP memory usage */
185#define PAT_MEMUSE_GENERAL 0
186#define PAT_MEMUSE_GI 128
187#define PAT_MEMUSE_GNI 129
188
189
190#ifndef __ASSEMBLY__
191#include <linux/types.h>
192
193#ifdef CONFIG_64BIT
194#define is_pdc_pat() (PDC_TYPE_PAT == pdc_type)
195extern int pdc_pat_get_irt_size(unsigned long *num_entries, unsigned long cell_num);
196extern int pdc_pat_get_irt(void *r_addr, unsigned long cell_num);
197#else /* ! CONFIG_64BIT */
198/* No PAT support for 32-bit kernels...sorry */
199#define is_pdc_pat() (0)
200#define pdc_pat_get_irt_size(num_entries, cell_numn) PDC_BAD_PROC
201#define pdc_pat_get_irt(r_addr, cell_num) PDC_BAD_PROC
202#endif /* ! CONFIG_64BIT */
203
204
205struct pdc_pat_cell_num {
206 unsigned long cell_num;
207 unsigned long cell_loc;
208};
209
210struct pdc_pat_cpu_num {
211 unsigned long cpu_num;
212 unsigned long cpu_loc;
213};
214
215struct pdc_pat_pd_addr_map_entry {
216 unsigned char entry_type; /* 1 = Memory Descriptor Entry Type */
217 unsigned char reserve1[5];
218 unsigned char memory_type;
219 unsigned char memory_usage;
220 unsigned long paddr;
221 unsigned int pages; /* Length in 4K pages */
222 unsigned int reserve2;
223 unsigned long cell_map;
224};
225
226/********************************************************************
227* PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
228* ----------------------------------------------------------
229* Bit 0 to 51 - conf_base_addr
230* Bit 52 to 62 - reserved
231* Bit 63 - endianess bit
232********************************************************************/
233#define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
234
235/********************************************************************
236* PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
237* ----------------------------------------------------
238* Bit 0 to 7 - entity type
239* 0 = central agent, 1 = processor,
240* 2 = memory controller, 3 = system bus adapter,
241* 4 = local bus adapter, 5 = processor bus converter,
242* 6 = crossbar fabric connect, 7 = fabric interconnect,
243* 8 to 254 reserved, 255 = unknown.
244* Bit 8 to 15 - DVI
245* Bit 16 to 23 - IOC functions
246* Bit 24 to 39 - reserved
247* Bit 40 to 63 - mod_pages
248* number of 4K pages a module occupies starting at conf_base_addr
249********************************************************************/
250#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
251#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
252#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
253#define PAT_GET_MOD_PAGES(value) ((value) & 0xffffffUL)
254
255
256/*
257** PDC_PAT_CELL_GET_INFO return block
258*/
259typedef struct pdc_pat_cell_info_rtn_block {
260 unsigned long cpu_info;
261 unsigned long cell_info;
262 unsigned long cell_location;
263 unsigned long reo_location;
264 unsigned long mem_size;
265 unsigned long dimm_status;
266 unsigned long pdc_rev;
267 unsigned long fabric_info0;
268 unsigned long fabric_info1;
269 unsigned long fabric_info2;
270 unsigned long fabric_info3;
271 unsigned long reserved[21];
272} pdc_pat_cell_info_rtn_block_t;
273
274
275/* FIXME: mod[508] should really be a union of the various mod components */
276struct pdc_pat_cell_mod_maddr_block { /* PDC_PAT_CELL_MODULE */
277 unsigned long cba; /* func 0 cfg space address */
278 unsigned long mod_info; /* module information */
279 unsigned long mod_location; /* physical location of the module */
280 struct hardware_path mod_path; /* module path (device path - layers) */
281 unsigned long mod[508]; /* PAT cell module components */
282} __attribute__((aligned(8))) ;
283
284typedef struct pdc_pat_cell_mod_maddr_block pdc_pat_cell_mod_maddr_block_t;
285
286
287extern int pdc_pat_chassis_send_log(unsigned long status, unsigned long data);
288extern int pdc_pat_cell_get_number(struct pdc_pat_cell_num *cell_info);
289extern int pdc_pat_cell_module(unsigned long *actcnt, unsigned long ploc, unsigned long mod, unsigned long view_type, void *mem_addr);
290extern int pdc_pat_cell_num_to_loc(void *, unsigned long);
291
292extern int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa);
293
294extern int pdc_pat_pd_get_addr_map(unsigned long *actual_len, void *mem_addr, unsigned long count, unsigned long offset);
295
296
297extern int pdc_pat_io_pci_cfg_read(unsigned long pci_addr, int pci_size, u32 *val);
298extern int pdc_pat_io_pci_cfg_write(unsigned long pci_addr, int pci_size, u32 val);
299
300
301/* Flag to indicate this is a PAT box...don't use this unless you
302** really have to...it might go away some day.
303*/
304extern int pdc_pat; /* arch/parisc/kernel/inventory.c */
305
306#endif /* __ASSEMBLY__ */
307
308#endif /* ! __PARISC_PATPDC_H */
diff --git a/include/asm-parisc/percpu.h b/include/asm-parisc/percpu.h
deleted file mode 100644
index a0dcd1970128..000000000000
--- a/include/asm-parisc/percpu.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _PARISC_PERCPU_H
2#define _PARISC_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif
7
diff --git a/include/asm-parisc/perf.h b/include/asm-parisc/perf.h
deleted file mode 100644
index a18e11972c09..000000000000
--- a/include/asm-parisc/perf.h
+++ /dev/null
@@ -1,74 +0,0 @@
1#ifndef _ASM_PERF_H_
2#define _ASM_PERF_H_
3
4/* ioctls */
5#define PA_PERF_ON _IO('p', 1)
6#define PA_PERF_OFF _IOR('p', 2, unsigned int)
7#define PA_PERF_VERSION _IOR('p', 3, int)
8
9#define PA_PERF_DEV "perf"
10#define PA_PERF_MINOR 146
11
12/* Interface types */
13#define UNKNOWN_INTF 255
14#define ONYX_INTF 0
15#define CUDA_INTF 1
16
17/* Common Onyx and Cuda images */
18#define CPI 0
19#define BUSUTIL 1
20#define TLBMISS 2
21#define TLBHANDMISS 3
22#define PTKN 4
23#define PNTKN 5
24#define IMISS 6
25#define DMISS 7
26#define DMISS_ACCESS 8
27#define BIG_CPI 9
28#define BIG_LS 10
29#define BR_ABORT 11
30#define ISNT 12
31#define QUADRANT 13
32#define RW_PDFET 14
33#define RW_WDFET 15
34#define SHLIB_CPI 16
35
36/* Cuda only Images */
37#define FLOPS 17
38#define CACHEMISS 18
39#define BRANCHES 19
40#define CRSTACK 20
41#define I_CACHE_SPEC 21
42#define MAX_CUDA_IMAGES 22
43
44/* Onyx only Images */
45#define ADDR_INV_ABORT_ALU 17
46#define BRAD_STALL 18
47#define CNTL_IN_PIPEL 19
48#define DSNT_XFH 20
49#define FET_SIG1 21
50#define FET_SIG2 22
51#define G7_1 23
52#define G7_2 24
53#define G7_3 25
54#define G7_4 26
55#define MPB_LABORT 27
56#define PANIC 28
57#define RARE_INST 29
58#define RW_DFET 30
59#define RW_IFET 31
60#define RW_SDFET 32
61#define SPEC_IFET 33
62#define ST_COND0 34
63#define ST_COND1 35
64#define ST_COND2 36
65#define ST_COND3 37
66#define ST_COND4 38
67#define ST_UNPRED0 39
68#define ST_UNPRED1 40
69#define UNPRED 41
70#define GO_STORE 42
71#define SHLIB_CALL 43
72#define MAX_ONYX_IMAGES 44
73
74#endif
diff --git a/include/asm-parisc/pgalloc.h b/include/asm-parisc/pgalloc.h
deleted file mode 100644
index fc987a1c12a8..000000000000
--- a/include/asm-parisc/pgalloc.h
+++ /dev/null
@@ -1,149 +0,0 @@
1#ifndef _ASM_PGALLOC_H
2#define _ASM_PGALLOC_H
3
4#include <linux/gfp.h>
5#include <linux/mm.h>
6#include <linux/threads.h>
7#include <asm/processor.h>
8#include <asm/fixmap.h>
9
10#include <asm/cache.h>
11
12/* Allocate the top level pgd (page directory)
13 *
14 * Here (for 64 bit kernels) we implement a Hybrid L2/L3 scheme: we
15 * allocate the first pmd adjacent to the pgd. This means that we can
16 * subtract a constant offset to get to it. The pmd and pgd sizes are
17 * arranged so that a single pmd covers 4GB (giving a full 64-bit
18 * process access to 8TB) so our lookups are effectively L2 for the
19 * first 4GB of the kernel (i.e. for all ILP32 processes and all the
20 * kernel for machines with under 4GB of memory) */
21static inline pgd_t *pgd_alloc(struct mm_struct *mm)
22{
23 pgd_t *pgd = (pgd_t *)__get_free_pages(GFP_KERNEL,
24 PGD_ALLOC_ORDER);
25 pgd_t *actual_pgd = pgd;
26
27 if (likely(pgd != NULL)) {
28 memset(pgd, 0, PAGE_SIZE<<PGD_ALLOC_ORDER);
29#ifdef CONFIG_64BIT
30 actual_pgd += PTRS_PER_PGD;
31 /* Populate first pmd with allocated memory. We mark it
32 * with PxD_FLAG_ATTACHED as a signal to the system that this
33 * pmd entry may not be cleared. */
34 __pgd_val_set(*actual_pgd, (PxD_FLAG_PRESENT |
35 PxD_FLAG_VALID |
36 PxD_FLAG_ATTACHED)
37 + (__u32)(__pa((unsigned long)pgd) >> PxD_VALUE_SHIFT));
38 /* The first pmd entry also is marked with _PAGE_GATEWAY as
39 * a signal that this pmd may not be freed */
40 __pgd_val_set(*pgd, PxD_FLAG_ATTACHED);
41#endif
42 }
43 return actual_pgd;
44}
45
46static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
47{
48#ifdef CONFIG_64BIT
49 pgd -= PTRS_PER_PGD;
50#endif
51 free_pages((unsigned long)pgd, PGD_ALLOC_ORDER);
52}
53
54#if PT_NLEVELS == 3
55
56/* Three Level Page Table Support for pmd's */
57
58static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmd)
59{
60 __pgd_val_set(*pgd, (PxD_FLAG_PRESENT | PxD_FLAG_VALID) +
61 (__u32)(__pa((unsigned long)pmd) >> PxD_VALUE_SHIFT));
62}
63
64static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
65{
66 pmd_t *pmd = (pmd_t *)__get_free_pages(GFP_KERNEL|__GFP_REPEAT,
67 PMD_ORDER);
68 if (pmd)
69 memset(pmd, 0, PAGE_SIZE<<PMD_ORDER);
70 return pmd;
71}
72
73static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
74{
75#ifdef CONFIG_64BIT
76 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
77 /* This is the permanent pmd attached to the pgd;
78 * cannot free it */
79 return;
80#endif
81 free_pages((unsigned long)pmd, PMD_ORDER);
82}
83
84#else
85
86/* Two Level Page Table Support for pmd's */
87
88/*
89 * allocating and freeing a pmd is trivial: the 1-entry pmd is
90 * inside the pgd, so has no extra memory associated with it.
91 */
92
93#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
94#define pmd_free(mm, x) do { } while (0)
95#define pgd_populate(mm, pmd, pte) BUG()
96
97#endif
98
99static inline void
100pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
101{
102#ifdef CONFIG_64BIT
103 /* preserve the gateway marker if this is the beginning of
104 * the permanent pmd */
105 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
106 __pmd_val_set(*pmd, (PxD_FLAG_PRESENT |
107 PxD_FLAG_VALID |
108 PxD_FLAG_ATTACHED)
109 + (__u32)(__pa((unsigned long)pte) >> PxD_VALUE_SHIFT));
110 else
111#endif
112 __pmd_val_set(*pmd, (PxD_FLAG_PRESENT | PxD_FLAG_VALID)
113 + (__u32)(__pa((unsigned long)pte) >> PxD_VALUE_SHIFT));
114}
115
116#define pmd_populate(mm, pmd, pte_page) \
117 pmd_populate_kernel(mm, pmd, page_address(pte_page))
118#define pmd_pgtable(pmd) pmd_page(pmd)
119
120static inline pgtable_t
121pte_alloc_one(struct mm_struct *mm, unsigned long address)
122{
123 struct page *page = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
124 if (page)
125 pgtable_page_ctor(page);
126 return page;
127}
128
129static inline pte_t *
130pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
131{
132 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
133 return pte;
134}
135
136static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
137{
138 free_page((unsigned long)pte);
139}
140
141static inline void pte_free(struct mm_struct *mm, struct page *pte)
142{
143 pgtable_page_dtor(pte);
144 pte_free_kernel(mm, page_address(pte));
145}
146
147#define check_pgt_cache() do { } while (0)
148
149#endif
diff --git a/include/asm-parisc/pgtable.h b/include/asm-parisc/pgtable.h
deleted file mode 100644
index 470a4b88124d..000000000000
--- a/include/asm-parisc/pgtable.h
+++ /dev/null
@@ -1,508 +0,0 @@
1#ifndef _PARISC_PGTABLE_H
2#define _PARISC_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#include <asm/fixmap.h>
7
8#ifndef __ASSEMBLY__
9/*
10 * we simulate an x86-style page table for the linux mm code
11 */
12
13#include <linux/mm.h> /* for vm_area_struct */
14#include <linux/bitops.h>
15#include <asm/processor.h>
16#include <asm/cache.h>
17
18/*
19 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20 * memory. For the return value to be meaningful, ADDR must be >=
21 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
22 * require a hash-, or multi-level tree-lookup or something of that
23 * sort) but it guarantees to return TRUE only if accessing the page
24 * at that address does not cause an error. Note that there may be
25 * addresses for which kern_addr_valid() returns FALSE even though an
26 * access would not cause an error (e.g., this is typically true for
27 * memory mapped I/O regions.
28 *
29 * XXX Need to implement this for parisc.
30 */
31#define kern_addr_valid(addr) (1)
32
33/* Certain architectures need to do special things when PTEs
34 * within a page table are directly modified. Thus, the following
35 * hook is made available.
36 */
37#define set_pte(pteptr, pteval) \
38 do{ \
39 *(pteptr) = (pteval); \
40 } while(0)
41#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
42
43#endif /* !__ASSEMBLY__ */
44
45#define pte_ERROR(e) \
46 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
47#define pmd_ERROR(e) \
48 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
49#define pgd_ERROR(e) \
50 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
51
52/* This is the size of the initially mapped kernel memory */
53#ifdef CONFIG_64BIT
54#define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */
55#else
56#define KERNEL_INITIAL_ORDER 23 /* 0 to 1<<23 = 8MB */
57#endif
58#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
59
60#if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
61#define PT_NLEVELS 3
62#define PGD_ORDER 1 /* Number of pages per pgd */
63#define PMD_ORDER 1 /* Number of pages per pmd */
64#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
65#else
66#define PT_NLEVELS 2
67#define PGD_ORDER 1 /* Number of pages per pgd */
68#define PGD_ALLOC_ORDER PGD_ORDER
69#endif
70
71/* Definitions for 3rd level (we use PLD here for Page Lower directory
72 * because PTE_SHIFT is used lower down to mean shift that has to be
73 * done to get usable bits out of the PTE) */
74#define PLD_SHIFT PAGE_SHIFT
75#define PLD_SIZE PAGE_SIZE
76#define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
77#define PTRS_PER_PTE (1UL << BITS_PER_PTE)
78
79/* Definitions for 2nd level */
80#define pgtable_cache_init() do { } while (0)
81
82#define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
83#define PMD_SIZE (1UL << PMD_SHIFT)
84#define PMD_MASK (~(PMD_SIZE-1))
85#if PT_NLEVELS == 3
86#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
87#else
88#define BITS_PER_PMD 0
89#endif
90#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
91
92/* Definitions for 1st level */
93#define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD)
94#define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
95#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
96#define PGDIR_MASK (~(PGDIR_SIZE-1))
97#define PTRS_PER_PGD (1UL << BITS_PER_PGD)
98#define USER_PTRS_PER_PGD PTRS_PER_PGD
99
100#define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
101#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
102
103#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
104
105/* This calculates the number of initial pages we need for the initial
106 * page tables */
107#if (KERNEL_INITIAL_ORDER) >= (PMD_SHIFT)
108# define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
109#else
110# define PT_INITIAL (1) /* all initial PTEs fit into one page */
111#endif
112
113/*
114 * pgd entries used up by user/kernel:
115 */
116
117#define FIRST_USER_ADDRESS 0
118
119/* NB: The tlb miss handlers make certain assumptions about the order */
120/* of the following bits, so be careful (One example, bits 25-31 */
121/* are moved together in one instruction). */
122
123#define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
124#define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
125#define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
126#define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
127#define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
128#define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
129#define _PAGE_FILE_BIT _PAGE_DIRTY_BIT /* overload this bit */
130#define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
131#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
132#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
133#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
134#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
135 /* for cache flushing only */
136#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
137
138/* N.B. The bits are defined in terms of a 32 bit word above, so the */
139/* following macro is ok for both 32 and 64 bit. */
140
141#define xlate_pabit(x) (31 - x)
142
143/* this defines the shift to the usable bits in the PTE it is set so
144 * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
145 * to zero */
146#define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
147
148/* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */
149#define PFN_PTE_SHIFT 12
150
151
152/* this is how many bits may be used by the file functions */
153#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
154
155#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
156#define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
157
158#define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
159#define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
160#define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
161#define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
162#define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
163#define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
164#define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
165#define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
166#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
167#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
168#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
169#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
170#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
171#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
172
173#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
174#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
175#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
176
177/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
178 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
179 * for a few meta-information bits, so we shift the address to be
180 * able to effectively address 40/42/44-bits of physical address space
181 * depending on 4k/16k/64k PAGE_SIZE */
182#define _PxD_PRESENT_BIT 31
183#define _PxD_ATTACHED_BIT 30
184#define _PxD_VALID_BIT 29
185
186#define PxD_FLAG_PRESENT (1 << xlate_pabit(_PxD_PRESENT_BIT))
187#define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
188#define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
189#define PxD_FLAG_MASK (0xf)
190#define PxD_FLAG_SHIFT (4)
191#define PxD_VALUE_SHIFT (8) /* (PAGE_SHIFT-PxD_FLAG_SHIFT) */
192
193#ifndef __ASSEMBLY__
194
195#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
196#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
197/* Others seem to make this executable, I don't know if that's correct
198 or not. The stack is mapped this way though so this is necessary
199 in the short term - dhd@linuxcare.com, 2000-08-08 */
200#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
201#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
202#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
203#define PAGE_COPY PAGE_EXECREAD
204#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
205#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
206#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
207#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
208#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
209#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
210
211
212/*
213 * We could have an execute only page using "gateway - promote to priv
214 * level 3", but that is kind of silly. So, the way things are defined
215 * now, we must always have read permission for pages with execute
216 * permission. For the fun of it we'll go ahead and support write only
217 * pages.
218 */
219
220 /*xwr*/
221#define __P000 PAGE_NONE
222#define __P001 PAGE_READONLY
223#define __P010 __P000 /* copy on write */
224#define __P011 __P001 /* copy on write */
225#define __P100 PAGE_EXECREAD
226#define __P101 PAGE_EXECREAD
227#define __P110 __P100 /* copy on write */
228#define __P111 __P101 /* copy on write */
229
230#define __S000 PAGE_NONE
231#define __S001 PAGE_READONLY
232#define __S010 PAGE_WRITEONLY
233#define __S011 PAGE_SHARED
234#define __S100 PAGE_EXECREAD
235#define __S101 PAGE_EXECREAD
236#define __S110 PAGE_RWX
237#define __S111 PAGE_RWX
238
239
240extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
241
242/* initial page tables for 0-8MB for kernel */
243
244extern pte_t pg0[];
245
246/* zero page used for uninitialized stuff */
247
248extern unsigned long *empty_zero_page;
249
250/*
251 * ZERO_PAGE is a global shared page that is always zero: used
252 * for zero-mapped memory areas etc..
253 */
254
255#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
256
257#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
258#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
259#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
260
261#define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK)
262#define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
263#define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
264#define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
265
266#if PT_NLEVELS == 3
267/* The first entry of the permanent pmd is not there if it contains
268 * the gateway marker */
269#define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
270#else
271#define pmd_none(x) (!pmd_val(x))
272#endif
273#define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
274#define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
275static inline void pmd_clear(pmd_t *pmd) {
276#if PT_NLEVELS == 3
277 if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
278 /* This is the entry pointing to the permanent pmd
279 * attached to the pgd; cannot clear it */
280 __pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
281 else
282#endif
283 __pmd_val_set(*pmd, 0);
284}
285
286
287
288#if PT_NLEVELS == 3
289#define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_address(pgd)))
290#define pgd_page(pgd) virt_to_page((void *)pgd_page_vaddr(pgd))
291
292/* For 64 bit we have three level tables */
293
294#define pgd_none(x) (!pgd_val(x))
295#define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
296#define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
297static inline void pgd_clear(pgd_t *pgd) {
298#if PT_NLEVELS == 3
299 if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
300 /* This is the permanent pmd attached to the pgd; cannot
301 * free it */
302 return;
303#endif
304 __pgd_val_set(*pgd, 0);
305}
306#else
307/*
308 * The "pgd_xxx()" functions here are trivial for a folded two-level
309 * setup: the pgd is never bad, and a pmd always exists (as it's folded
310 * into the pgd entry)
311 */
312static inline int pgd_none(pgd_t pgd) { return 0; }
313static inline int pgd_bad(pgd_t pgd) { return 0; }
314static inline int pgd_present(pgd_t pgd) { return 1; }
315static inline void pgd_clear(pgd_t * pgdp) { }
316#endif
317
318/*
319 * The following only work if pte_present() is true.
320 * Undefined behaviour if not..
321 */
322static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
323static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
324static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
325static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
326static inline int pte_special(pte_t pte) { return 0; }
327
328static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
329static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
330static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
331static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
332static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
333static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
334static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
335
336/*
337 * Conversion functions: convert a page and protection to a page entry,
338 * and a page entry and page directory to the page they refer to.
339 */
340#define __mk_pte(addr,pgprot) \
341({ \
342 pte_t __pte; \
343 \
344 pte_val(__pte) = ((((addr)>>PAGE_SHIFT)<<PFN_PTE_SHIFT) + pgprot_val(pgprot)); \
345 \
346 __pte; \
347})
348
349#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
350
351static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
352{
353 pte_t pte;
354 pte_val(pte) = (pfn << PFN_PTE_SHIFT) | pgprot_val(pgprot);
355 return pte;
356}
357
358static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
359{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
360
361/* Permanent address of a page. On parisc we don't have highmem. */
362
363#define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT)
364
365#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
366
367#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_address(pmd)))
368
369#define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
370#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
371
372#define pgd_index(address) ((address) >> PGDIR_SHIFT)
373
374/* to find an entry in a page-table-directory */
375#define pgd_offset(mm, address) \
376((mm)->pgd + ((address) >> PGDIR_SHIFT))
377
378/* to find an entry in a kernel page-table-directory */
379#define pgd_offset_k(address) pgd_offset(&init_mm, address)
380
381/* Find an entry in the second-level page table.. */
382
383#if PT_NLEVELS == 3
384#define pmd_offset(dir,address) \
385((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
386#else
387#define pmd_offset(dir,addr) ((pmd_t *) dir)
388#endif
389
390/* Find an entry in the third-level page table.. */
391#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
392#define pte_offset_kernel(pmd, address) \
393 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
394#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
395#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
396#define pte_unmap(pte) do { } while (0)
397#define pte_unmap_nested(pte) do { } while (0)
398
399#define pte_unmap(pte) do { } while (0)
400#define pte_unmap_nested(pte) do { } while (0)
401
402extern void paging_init (void);
403
404/* Used for deferring calls to flush_dcache_page() */
405
406#define PG_dcache_dirty PG_arch_1
407
408extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
409
410/* Encode and de-code a swap entry */
411
412#define __swp_type(x) ((x).val & 0x1f)
413#define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \
414 (((x).val >> 8) & ~0x7) )
415#define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
416 ((offset & 0x7) << 6) | \
417 ((offset & ~0x7) << 8) })
418#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
419#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
420
421static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
422{
423#ifdef CONFIG_SMP
424 if (!pte_young(*ptep))
425 return 0;
426 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
427#else
428 pte_t pte = *ptep;
429 if (!pte_young(pte))
430 return 0;
431 set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
432 return 1;
433#endif
434}
435
436extern spinlock_t pa_dbit_lock;
437
438struct mm_struct;
439static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
440{
441 pte_t old_pte;
442 pte_t pte;
443
444 spin_lock(&pa_dbit_lock);
445 pte = old_pte = *ptep;
446 pte_val(pte) &= ~_PAGE_PRESENT;
447 pte_val(pte) |= _PAGE_FLUSH;
448 set_pte_at(mm,addr,ptep,pte);
449 spin_unlock(&pa_dbit_lock);
450
451 return old_pte;
452}
453
454static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
455{
456#ifdef CONFIG_SMP
457 unsigned long new, old;
458
459 do {
460 old = pte_val(*ptep);
461 new = pte_val(pte_wrprotect(__pte (old)));
462 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
463#else
464 pte_t old_pte = *ptep;
465 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
466#endif
467}
468
469#define pte_same(A,B) (pte_val(A) == pte_val(B))
470
471#endif /* !__ASSEMBLY__ */
472
473
474/* TLB page size encoding - see table 3-1 in parisc20.pdf */
475#define _PAGE_SIZE_ENCODING_4K 0
476#define _PAGE_SIZE_ENCODING_16K 1
477#define _PAGE_SIZE_ENCODING_64K 2
478#define _PAGE_SIZE_ENCODING_256K 3
479#define _PAGE_SIZE_ENCODING_1M 4
480#define _PAGE_SIZE_ENCODING_4M 5
481#define _PAGE_SIZE_ENCODING_16M 6
482#define _PAGE_SIZE_ENCODING_64M 7
483
484#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
485# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K
486#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
487# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16K
488#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
489# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_64K
490#endif
491
492
493#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
494 remap_pfn_range(vma, vaddr, pfn, size, prot)
495
496#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE)
497
498/* We provide our own get_unmapped_area to provide cache coherency */
499
500#define HAVE_ARCH_UNMAPPED_AREA
501
502#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
503#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
504#define __HAVE_ARCH_PTEP_SET_WRPROTECT
505#define __HAVE_ARCH_PTE_SAME
506#include <asm-generic/pgtable.h>
507
508#endif /* _PARISC_PGTABLE_H */
diff --git a/include/asm-parisc/poll.h b/include/asm-parisc/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/include/asm-parisc/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/include/asm-parisc/posix_types.h b/include/asm-parisc/posix_types.h
deleted file mode 100644
index bb725a6630bb..000000000000
--- a/include/asm-parisc/posix_types.h
+++ /dev/null
@@ -1,129 +0,0 @@
1#ifndef __ARCH_PARISC_POSIX_TYPES_H
2#define __ARCH_PARISC_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9typedef unsigned long __kernel_ino_t;
10typedef unsigned short __kernel_mode_t;
11typedef unsigned short __kernel_nlink_t;
12typedef long __kernel_off_t;
13typedef int __kernel_pid_t;
14typedef unsigned short __kernel_ipc_pid_t;
15typedef unsigned int __kernel_uid_t;
16typedef unsigned int __kernel_gid_t;
17typedef int __kernel_suseconds_t;
18typedef long __kernel_clock_t;
19typedef int __kernel_timer_t;
20typedef int __kernel_clockid_t;
21typedef int __kernel_daddr_t;
22/* Note these change from narrow to wide kernels */
23#ifdef CONFIG_64BIT
24typedef unsigned long __kernel_size_t;
25typedef long __kernel_ssize_t;
26typedef long __kernel_ptrdiff_t;
27typedef long __kernel_time_t;
28#else
29typedef unsigned int __kernel_size_t;
30typedef int __kernel_ssize_t;
31typedef int __kernel_ptrdiff_t;
32typedef long __kernel_time_t;
33#endif
34typedef char * __kernel_caddr_t;
35
36typedef unsigned short __kernel_uid16_t;
37typedef unsigned short __kernel_gid16_t;
38typedef unsigned int __kernel_uid32_t;
39typedef unsigned int __kernel_gid32_t;
40
41#ifdef __GNUC__
42typedef long long __kernel_loff_t;
43typedef long long __kernel_off64_t;
44typedef unsigned long long __kernel_ino64_t;
45#endif
46
47typedef unsigned int __kernel_old_dev_t;
48
49typedef struct {
50 int val[2];
51} __kernel_fsid_t;
52
53/* compatibility stuff */
54typedef __kernel_uid_t __kernel_old_uid_t;
55typedef __kernel_gid_t __kernel_old_gid_t;
56
57#if defined(__KERNEL__)
58
59#undef __FD_SET
60static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
61{
62 unsigned long __tmp = __fd / __NFDBITS;
63 unsigned long __rem = __fd % __NFDBITS;
64 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
65}
66
67#undef __FD_CLR
68static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
69{
70 unsigned long __tmp = __fd / __NFDBITS;
71 unsigned long __rem = __fd % __NFDBITS;
72 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
73}
74
75#undef __FD_ISSET
76static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
77{
78 unsigned long __tmp = __fd / __NFDBITS;
79 unsigned long __rem = __fd % __NFDBITS;
80 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
81}
82
83/*
84 * This will unroll the loop for the normal constant case (8 ints,
85 * for a 256-bit fd_set)
86 */
87#undef __FD_ZERO
88static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
89{
90 unsigned long *__tmp = __p->fds_bits;
91 int __i;
92
93 if (__builtin_constant_p(__FDSET_LONGS)) {
94 switch (__FDSET_LONGS) {
95 case 16:
96 __tmp[ 0] = 0; __tmp[ 1] = 0;
97 __tmp[ 2] = 0; __tmp[ 3] = 0;
98 __tmp[ 4] = 0; __tmp[ 5] = 0;
99 __tmp[ 6] = 0; __tmp[ 7] = 0;
100 __tmp[ 8] = 0; __tmp[ 9] = 0;
101 __tmp[10] = 0; __tmp[11] = 0;
102 __tmp[12] = 0; __tmp[13] = 0;
103 __tmp[14] = 0; __tmp[15] = 0;
104 return;
105
106 case 8:
107 __tmp[ 0] = 0; __tmp[ 1] = 0;
108 __tmp[ 2] = 0; __tmp[ 3] = 0;
109 __tmp[ 4] = 0; __tmp[ 5] = 0;
110 __tmp[ 6] = 0; __tmp[ 7] = 0;
111 return;
112
113 case 4:
114 __tmp[ 0] = 0; __tmp[ 1] = 0;
115 __tmp[ 2] = 0; __tmp[ 3] = 0;
116 return;
117 }
118 }
119 __i = __FDSET_LONGS;
120 while (__i) {
121 __i--;
122 *__tmp = 0;
123 __tmp++;
124 }
125}
126
127#endif /* defined(__KERNEL__) */
128
129#endif
diff --git a/include/asm-parisc/prefetch.h b/include/asm-parisc/prefetch.h
deleted file mode 100644
index c5edc60c059f..000000000000
--- a/include/asm-parisc/prefetch.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * include/asm-parisc/prefetch.h
3 *
4 * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
5 * In addition, many implementations do hardware prefetching of both
6 * instructions and data.
7 *
8 * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
9 * to gr0 but not in a way that Linux can use. If the load would cause an
10 * interruption (eg due to prefetching 0), it is suppressed on PA2.0
11 * processors, but not on 7300LC.
12 *
13 */
14
15#ifndef __ASM_PARISC_PREFETCH_H
16#define __ASM_PARISC_PREFETCH_H
17
18#ifndef __ASSEMBLY__
19#ifdef CONFIG_PREFETCH
20
21#define ARCH_HAS_PREFETCH
22static inline void prefetch(const void *addr)
23{
24 __asm__("ldw 0(%0), %%r0" : : "r" (addr));
25}
26
27/* LDD is a PA2.0 addition. */
28#ifdef CONFIG_PA20
29#define ARCH_HAS_PREFETCHW
30static inline void prefetchw(const void *addr)
31{
32 __asm__("ldd 0(%0), %%r0" : : "r" (addr));
33}
34#endif /* CONFIG_PA20 */
35
36#endif /* CONFIG_PREFETCH */
37#endif /* __ASSEMBLY__ */
38
39#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
deleted file mode 100644
index 3c9d34844c83..000000000000
--- a/include/asm-parisc/processor.h
+++ /dev/null
@@ -1,357 +0,0 @@
1/*
2 * include/asm-parisc/processor.h
3 *
4 * Copyright (C) 1994 Linus Torvalds
5 * Copyright (C) 2001 Grant Grundler
6 */
7
8#ifndef __ASM_PARISC_PROCESSOR_H
9#define __ASM_PARISC_PROCESSOR_H
10
11#ifndef __ASSEMBLY__
12#include <linux/threads.h>
13
14#include <asm/prefetch.h>
15#include <asm/hardware.h>
16#include <asm/pdc.h>
17#include <asm/ptrace.h>
18#include <asm/types.h>
19#include <asm/system.h>
20#endif /* __ASSEMBLY__ */
21
22#define KERNEL_STACK_SIZE (4*PAGE_SIZE)
23
24/*
25 * Default implementation of macro that returns current
26 * instruction pointer ("program counter").
27 */
28#ifdef CONFIG_PA20
29#define current_ia(x) __asm__("mfia %0" : "=r"(x))
30#else /* mfia added in pa2.0 */
31#define current_ia(x) __asm__("blr 0,%0\n\tnop" : "=r"(x))
32#endif
33#define current_text_addr() ({ void *pc; current_ia(pc); pc; })
34
35#define TASK_SIZE_OF(tsk) ((tsk)->thread.task_size)
36#define TASK_SIZE TASK_SIZE_OF(current)
37#define TASK_UNMAPPED_BASE (current->thread.map_base)
38
39#define DEFAULT_TASK_SIZE32 (0xFFF00000UL)
40#define DEFAULT_MAP_BASE32 (0x40000000UL)
41
42#ifdef CONFIG_64BIT
43#define DEFAULT_TASK_SIZE (MAX_ADDRESS-0xf000000)
44#define DEFAULT_MAP_BASE (0x200000000UL)
45#else
46#define DEFAULT_TASK_SIZE DEFAULT_TASK_SIZE32
47#define DEFAULT_MAP_BASE DEFAULT_MAP_BASE32
48#endif
49
50#ifdef __KERNEL__
51
52/* XXX: STACK_TOP actually should be STACK_BOTTOM for parisc.
53 * prumpf */
54
55#define STACK_TOP TASK_SIZE
56#define STACK_TOP_MAX DEFAULT_TASK_SIZE
57
58#endif
59
60#ifndef __ASSEMBLY__
61
62/*
63 * Data detected about CPUs at boot time which is the same for all CPU's.
64 * HP boxes are SMP - ie identical processors.
65 *
66 * FIXME: some CPU rev info may be processor specific...
67 */
68struct system_cpuinfo_parisc {
69 unsigned int cpu_count;
70 unsigned int cpu_hz;
71 unsigned int hversion;
72 unsigned int sversion;
73 enum cpu_type cpu_type;
74
75 struct {
76 struct pdc_model model;
77 unsigned long versions;
78 unsigned long cpuid;
79 unsigned long capabilities;
80 char sys_model_name[81]; /* PDC-ROM returnes this model name */
81 } pdc;
82
83 const char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */
84 const char *family_name; /* e.g. "1.1e" */
85};
86
87
88/* Per CPU data structure - ie varies per CPU. */
89struct cpuinfo_parisc {
90 unsigned long it_value; /* Interval Timer at last timer Intr */
91 unsigned long it_delta; /* Interval delta (tic_10ms / HZ * 100) */
92 unsigned long irq_count; /* number of IRQ's since boot */
93 unsigned long irq_max_cr16; /* longest time to handle a single IRQ */
94 unsigned long cpuid; /* aka slot_number or set to NO_PROC_ID */
95 unsigned long hpa; /* Host Physical address */
96 unsigned long txn_addr; /* MMIO addr of EIR or id_eid */
97#ifdef CONFIG_SMP
98 unsigned long pending_ipi; /* bitmap of type ipi_message_type */
99 unsigned long ipi_count; /* number ipi Interrupts */
100#endif
101 unsigned long bh_count; /* number of times bh was invoked */
102 unsigned long prof_counter; /* per CPU profiling support */
103 unsigned long prof_multiplier; /* per CPU profiling support */
104 unsigned long fp_rev;
105 unsigned long fp_model;
106 unsigned int state;
107 struct parisc_device *dev;
108 unsigned long loops_per_jiffy;
109};
110
111extern struct system_cpuinfo_parisc boot_cpu_data;
112extern struct cpuinfo_parisc cpu_data[NR_CPUS];
113#define current_cpu_data cpu_data[smp_processor_id()]
114
115#define CPU_HVERSION ((boot_cpu_data.hversion >> 4) & 0x0FFF)
116
117typedef struct {
118 int seg;
119} mm_segment_t;
120
121#define ARCH_MIN_TASKALIGN 8
122
123struct thread_struct {
124 struct pt_regs regs;
125 unsigned long task_size;
126 unsigned long map_base;
127 unsigned long flags;
128};
129
130/* Thread struct flags. */
131#define PARISC_UAC_NOPRINT (1UL << 0) /* see prctl and unaligned.c */
132#define PARISC_UAC_SIGBUS (1UL << 1)
133#define PARISC_KERNEL_DEATH (1UL << 31) /* see die_if_kernel()... */
134
135#define PARISC_UAC_SHIFT 0
136#define PARISC_UAC_MASK (PARISC_UAC_NOPRINT|PARISC_UAC_SIGBUS)
137
138#define SET_UNALIGN_CTL(task,value) \
139 ({ \
140 (task)->thread.flags = (((task)->thread.flags & ~PARISC_UAC_MASK) \
141 | (((value) << PARISC_UAC_SHIFT) & \
142 PARISC_UAC_MASK)); \
143 0; \
144 })
145
146#define GET_UNALIGN_CTL(task,addr) \
147 ({ \
148 put_user(((task)->thread.flags & PARISC_UAC_MASK) \
149 >> PARISC_UAC_SHIFT, (int __user *) (addr)); \
150 })
151
152#define INIT_THREAD { \
153 .regs = { .gr = { 0, }, \
154 .fr = { 0, }, \
155 .sr = { 0, }, \
156 .iasq = { 0, }, \
157 .iaoq = { 0, }, \
158 .cr27 = 0, \
159 }, \
160 .task_size = DEFAULT_TASK_SIZE, \
161 .map_base = DEFAULT_MAP_BASE, \
162 .flags = 0 \
163 }
164
165/*
166 * Return saved PC of a blocked thread. This is used by ps mostly.
167 */
168
169unsigned long thread_saved_pc(struct task_struct *t);
170void show_trace(struct task_struct *task, unsigned long *stack);
171
172/*
173 * Start user thread in another space.
174 *
175 * Note that we set both the iaoq and r31 to the new pc. When
176 * the kernel initially calls execve it will return through an
177 * rfi path that will use the values in the iaoq. The execve
178 * syscall path will return through the gateway page, and
179 * that uses r31 to branch to.
180 *
181 * For ELF we clear r23, because the dynamic linker uses it to pass
182 * the address of the finalizer function.
183 *
184 * We also initialize sr3 to an illegal value (illegal for our
185 * implementation, not for the architecture).
186 */
187typedef unsigned int elf_caddr_t;
188
189#define start_thread_som(regs, new_pc, new_sp) do { \
190 unsigned long *sp = (unsigned long *)new_sp; \
191 __u32 spaceid = (__u32)current->mm->context; \
192 unsigned long pc = (unsigned long)new_pc; \
193 /* offset pc for priv. level */ \
194 pc |= 3; \
195 \
196 set_fs(USER_DS); \
197 regs->iasq[0] = spaceid; \
198 regs->iasq[1] = spaceid; \
199 regs->iaoq[0] = pc; \
200 regs->iaoq[1] = pc + 4; \
201 regs->sr[2] = LINUX_GATEWAY_SPACE; \
202 regs->sr[3] = 0xffff; \
203 regs->sr[4] = spaceid; \
204 regs->sr[5] = spaceid; \
205 regs->sr[6] = spaceid; \
206 regs->sr[7] = spaceid; \
207 regs->gr[ 0] = USER_PSW; \
208 regs->gr[30] = ((new_sp)+63)&~63; \
209 regs->gr[31] = pc; \
210 \
211 get_user(regs->gr[26],&sp[0]); \
212 get_user(regs->gr[25],&sp[-1]); \
213 get_user(regs->gr[24],&sp[-2]); \
214 get_user(regs->gr[23],&sp[-3]); \
215} while(0)
216
217/* The ELF abi wants things done a "wee bit" differently than
218 * som does. Supporting this behavior here avoids
219 * having our own version of create_elf_tables.
220 *
221 * Oh, and yes, that is not a typo, we are really passing argc in r25
222 * and argv in r24 (rather than r26 and r25). This is because that's
223 * where __libc_start_main wants them.
224 *
225 * Duplicated from dl-machine.h for the benefit of readers:
226 *
227 * Our initial stack layout is rather different from everyone else's
228 * due to the unique PA-RISC ABI. As far as I know it looks like
229 * this:
230
231 ----------------------------------- (user startup code creates this frame)
232 | 32 bytes of magic |
233 |---------------------------------|
234 | 32 bytes argument/sp save area |
235 |---------------------------------| (bprm->p)
236 | ELF auxiliary info |
237 | (up to 28 words) |
238 |---------------------------------|
239 | NULL |
240 |---------------------------------|
241 | Environment pointers |
242 |---------------------------------|
243 | NULL |
244 |---------------------------------|
245 | Argument pointers |
246 |---------------------------------| <- argv
247 | argc (1 word) |
248 |---------------------------------| <- bprm->exec (HACK!)
249 | N bytes of slack |
250 |---------------------------------|
251 | filename passed to execve |
252 |---------------------------------| (mm->env_end)
253 | env strings |
254 |---------------------------------| (mm->env_start, mm->arg_end)
255 | arg strings |
256 |---------------------------------|
257 | additional faked arg strings if |
258 | we're invoked via binfmt_script |
259 |---------------------------------| (mm->arg_start)
260 stack base is at TASK_SIZE - rlim_max.
261
262on downward growing arches, it looks like this:
263 stack base at TASK_SIZE
264 | filename passed to execve
265 | env strings
266 | arg strings
267 | faked arg strings
268 | slack
269 | ELF
270 | envps
271 | argvs
272 | argc
273
274 * The pleasant part of this is that if we need to skip arguments we
275 * can just decrement argc and move argv, because the stack pointer
276 * is utterly unrelated to the location of the environment and
277 * argument vectors.
278 *
279 * Note that the S/390 people took the easy way out and hacked their
280 * GCC to make the stack grow downwards.
281 *
282 * Final Note: For entry from syscall, the W (wide) bit of the PSW
283 * is stuffed into the lowest bit of the user sp (%r30), so we fill
284 * it in here from the current->personality
285 */
286
287#ifdef CONFIG_64BIT
288#define USER_WIDE_MODE (!test_thread_flag(TIF_32BIT))
289#else
290#define USER_WIDE_MODE 0
291#endif
292
293#define start_thread(regs, new_pc, new_sp) do { \
294 elf_addr_t *sp = (elf_addr_t *)new_sp; \
295 __u32 spaceid = (__u32)current->mm->context; \
296 elf_addr_t pc = (elf_addr_t)new_pc | 3; \
297 elf_caddr_t *argv = (elf_caddr_t *)bprm->exec + 1; \
298 \
299 set_fs(USER_DS); \
300 regs->iasq[0] = spaceid; \
301 regs->iasq[1] = spaceid; \
302 regs->iaoq[0] = pc; \
303 regs->iaoq[1] = pc + 4; \
304 regs->sr[2] = LINUX_GATEWAY_SPACE; \
305 regs->sr[3] = 0xffff; \
306 regs->sr[4] = spaceid; \
307 regs->sr[5] = spaceid; \
308 regs->sr[6] = spaceid; \
309 regs->sr[7] = spaceid; \
310 regs->gr[ 0] = USER_PSW | (USER_WIDE_MODE ? PSW_W : 0); \
311 regs->fr[ 0] = 0LL; \
312 regs->fr[ 1] = 0LL; \
313 regs->fr[ 2] = 0LL; \
314 regs->fr[ 3] = 0LL; \
315 regs->gr[30] = (((unsigned long)sp + 63) &~ 63) | (USER_WIDE_MODE ? 1 : 0); \
316 regs->gr[31] = pc; \
317 \
318 get_user(regs->gr[25], (argv - 1)); \
319 regs->gr[24] = (long) argv; \
320 regs->gr[23] = 0; \
321} while(0)
322
323struct task_struct;
324struct mm_struct;
325
326/* Free all resources held by a thread. */
327extern void release_thread(struct task_struct *);
328extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
329
330/* Prepare to copy thread state - unlazy all lazy status */
331#define prepare_to_copy(tsk) do { } while (0)
332
333extern void map_hpux_gateway_page(struct task_struct *tsk, struct mm_struct *mm);
334
335extern unsigned long get_wchan(struct task_struct *p);
336
337#define KSTK_EIP(tsk) ((tsk)->thread.regs.iaoq[0])
338#define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30])
339
340#define cpu_relax() barrier()
341
342/* Used as a macro to identify the combined VIPT/PIPT cached
343 * CPUs which require a guarantee of coherency (no inequivalent
344 * aliases with different data, whether clean or not) to operate */
345static inline int parisc_requires_coherency(void)
346{
347#ifdef CONFIG_PA8X00
348 return (boot_cpu_data.cpu_type == mako) ||
349 (boot_cpu_data.cpu_type == mako2);
350#else
351 return 0;
352#endif
353}
354
355#endif /* __ASSEMBLY__ */
356
357#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/include/asm-parisc/psw.h b/include/asm-parisc/psw.h
deleted file mode 100644
index 5a3e23c9ce63..000000000000
--- a/include/asm-parisc/psw.h
+++ /dev/null
@@ -1,62 +0,0 @@
1#ifndef _PARISC_PSW_H
2
3
4#define PSW_I 0x00000001
5#define PSW_D 0x00000002
6#define PSW_P 0x00000004
7#define PSW_Q 0x00000008
8
9#define PSW_R 0x00000010
10#define PSW_F 0x00000020
11#define PSW_G 0x00000040 /* PA1.x only */
12#define PSW_O 0x00000080 /* PA2.0 only */
13
14/* ssm/rsm instructions number PSW_W and PSW_E differently */
15#define PSW_SM_I PSW_I /* Enable External Interrupts */
16#define PSW_SM_D PSW_D
17#define PSW_SM_P PSW_P
18#define PSW_SM_Q PSW_Q /* Enable Interrupt State Collection */
19#define PSW_SM_R PSW_R /* Enable Recover Counter Trap */
20#define PSW_SM_W 0x200 /* PA2.0 only : Enable Wide Mode */
21
22#define PSW_SM_QUIET PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I
23
24#define PSW_CB 0x0000ff00
25
26#define PSW_M 0x00010000
27#define PSW_V 0x00020000
28#define PSW_C 0x00040000
29#define PSW_B 0x00080000
30
31#define PSW_X 0x00100000
32#define PSW_N 0x00200000
33#define PSW_L 0x00400000
34#define PSW_H 0x00800000
35
36#define PSW_T 0x01000000
37#define PSW_S 0x02000000
38#define PSW_E 0x04000000
39#define PSW_W 0x08000000 /* PA2.0 only */
40#define PSW_W_BIT 36 /* PA2.0 only */
41
42#define PSW_Z 0x40000000 /* PA1.x only */
43#define PSW_Y 0x80000000 /* PA1.x only */
44
45#ifdef CONFIG_64BIT
46# define PSW_HI_CB 0x000000ff /* PA2.0 only */
47#endif
48
49#ifdef CONFIG_64BIT
50# define USER_PSW_HI_MASK PSW_HI_CB
51# define WIDE_PSW PSW_W
52#else
53# define WIDE_PSW 0
54#endif
55
56/* Used when setting up for rfi */
57#define KERNEL_PSW (WIDE_PSW | PSW_C | PSW_Q | PSW_P | PSW_D)
58#define REAL_MODE_PSW (WIDE_PSW | PSW_Q)
59#define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
60#define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
61
62#endif
diff --git a/include/asm-parisc/ptrace.h b/include/asm-parisc/ptrace.h
deleted file mode 100644
index 3e94c5d85ff5..000000000000
--- a/include/asm-parisc/ptrace.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef _PARISC_PTRACE_H
2#define _PARISC_PTRACE_H
3
4/* written by Philipp Rumpf, Copyright (C) 1999 SuSE GmbH Nuernberg
5** Copyright (C) 2000 Grant Grundler, Hewlett-Packard
6*/
7
8#include <linux/types.h>
9
10/* This struct defines the way the registers are stored on the
11 * stack during a system call.
12 *
13 * N.B. gdb/strace care about the size and offsets within this
14 * structure. If you change things, you may break object compatibility
15 * for those applications.
16 */
17
18struct pt_regs {
19 unsigned long gr[32]; /* PSW is in gr[0] */
20 __u64 fr[32];
21 unsigned long sr[ 8];
22 unsigned long iasq[2];
23 unsigned long iaoq[2];
24 unsigned long cr27;
25 unsigned long pad0; /* available for other uses */
26 unsigned long orig_r28;
27 unsigned long ksp;
28 unsigned long kpc;
29 unsigned long sar; /* CR11 */
30 unsigned long iir; /* CR19 */
31 unsigned long isr; /* CR20 */
32 unsigned long ior; /* CR21 */
33 unsigned long ipsw; /* CR22 */
34};
35
36/*
37 * The numbers chosen here are somewhat arbitrary but absolutely MUST
38 * not overlap with any of the number assigned in <linux/ptrace.h>.
39 *
40 * These ones are taken from IA-64 on the assumption that theirs are
41 * the most correct (and we also want to support PTRACE_SINGLEBLOCK
42 * since we have taken branch traps too)
43 */
44#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
45
46#ifdef __KERNEL__
47
48#define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS))
49
50/* XXX should we use iaoq[1] or iaoq[0] ? */
51#define user_mode(regs) (((regs)->iaoq[0] & 3) ? 1 : 0)
52#define user_space(regs) (((regs)->iasq[1] != 0) ? 1 : 0)
53#define instruction_pointer(regs) ((regs)->iaoq[0] & ~3)
54unsigned long profile_pc(struct pt_regs *);
55extern void show_regs(struct pt_regs *);
56#endif
57
58#endif
diff --git a/include/asm-parisc/real.h b/include/asm-parisc/real.h
deleted file mode 100644
index 82acb25db395..000000000000
--- a/include/asm-parisc/real.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifndef _PARISC_REAL_H
2#define _PARISC_REAL_H
3
4
5#endif
diff --git a/include/asm-parisc/resource.h b/include/asm-parisc/resource.h
deleted file mode 100644
index 8b06343b62ed..000000000000
--- a/include/asm-parisc/resource.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_PARISC_RESOURCE_H
2#define _ASM_PARISC_RESOURCE_H
3
4#define _STK_LIM_MAX 10 * _STK_LIM
5#include <asm-generic/resource.h>
6
7#endif
diff --git a/include/asm-parisc/ropes.h b/include/asm-parisc/ropes.h
deleted file mode 100644
index 007a880615eb..000000000000
--- a/include/asm-parisc/ropes.h
+++ /dev/null
@@ -1,322 +0,0 @@
1#ifndef _ASM_PARISC_ROPES_H_
2#define _ASM_PARISC_ROPES_H_
3
4#include <asm-parisc/parisc-device.h>
5
6#ifdef CONFIG_64BIT
7/* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
8#define ZX1_SUPPORT
9#endif
10
11#ifdef CONFIG_PROC_FS
12/* depends on proc fs support. But costs CPU performance */
13#undef SBA_COLLECT_STATS
14#endif
15
16/*
17** The number of pdir entries to "free" before issuing
18** a read to PCOM register to flush out PCOM writes.
19** Interacts with allocation granularity (ie 4 or 8 entries
20** allocated and free'd/purged at a time might make this
21** less interesting).
22*/
23#define DELAYED_RESOURCE_CNT 16
24
25#define MAX_IOC 2 /* per Ike. Pluto/Astro only have 1. */
26#define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */
27
28struct ioc {
29 void __iomem *ioc_hpa; /* I/O MMU base address */
30 char *res_map; /* resource map, bit == pdir entry */
31 u64 *pdir_base; /* physical base address */
32 unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
33 unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
34#ifdef ZX1_SUPPORT
35 unsigned long iovp_mask; /* help convert IOVA to IOVP */
36#endif
37 unsigned long *res_hint; /* next avail IOVP - circular search */
38 spinlock_t res_lock;
39 unsigned int res_bitshift; /* from the LEFT! */
40 unsigned int res_size; /* size of resource map in bytes */
41#ifdef SBA_HINT_SUPPORT
42/* FIXME : DMA HINTs not used */
43 unsigned long hint_mask_pdir; /* bits used for DMA hints */
44 unsigned int hint_shift_pdir;
45#endif
46#if DELAYED_RESOURCE_CNT > 0
47 int saved_cnt;
48 struct sba_dma_pair {
49 dma_addr_t iova;
50 size_t size;
51 } saved[DELAYED_RESOURCE_CNT];
52#endif
53
54#ifdef SBA_COLLECT_STATS
55#define SBA_SEARCH_SAMPLE 0x100
56 unsigned long avg_search[SBA_SEARCH_SAMPLE];
57 unsigned long avg_idx; /* current index into avg_search */
58 unsigned long used_pages;
59 unsigned long msingle_calls;
60 unsigned long msingle_pages;
61 unsigned long msg_calls;
62 unsigned long msg_pages;
63 unsigned long usingle_calls;
64 unsigned long usingle_pages;
65 unsigned long usg_calls;
66 unsigned long usg_pages;
67#endif
68 /* STUFF We don't need in performance path */
69 unsigned int pdir_size; /* in bytes, determined by IOV Space size */
70};
71
72struct sba_device {
73 struct sba_device *next; /* list of SBA's in system */
74 struct parisc_device *dev; /* dev found in bus walk */
75 const char *name;
76 void __iomem *sba_hpa; /* base address */
77 spinlock_t sba_lock;
78 unsigned int flags; /* state/functionality enabled */
79 unsigned int hw_rev; /* HW revision of chip */
80
81 struct resource chip_resv; /* MMIO reserved for chip */
82 struct resource iommu_resv; /* MMIO reserved for iommu */
83
84 unsigned int num_ioc; /* number of on-board IOC's */
85 struct ioc ioc[MAX_IOC];
86};
87
88#define ASTRO_RUNWAY_PORT 0x582
89#define IKE_MERCED_PORT 0x803
90#define REO_MERCED_PORT 0x804
91#define REOG_MERCED_PORT 0x805
92#define PLUTO_MCKINLEY_PORT 0x880
93
94static inline int IS_ASTRO(struct parisc_device *d) {
95 return d->id.hversion == ASTRO_RUNWAY_PORT;
96}
97
98static inline int IS_IKE(struct parisc_device *d) {
99 return d->id.hversion == IKE_MERCED_PORT;
100}
101
102static inline int IS_PLUTO(struct parisc_device *d) {
103 return d->id.hversion == PLUTO_MCKINLEY_PORT;
104}
105
106#define PLUTO_IOVA_BASE (1UL*1024*1024*1024) /* 1GB */
107#define PLUTO_IOVA_SIZE (1UL*1024*1024*1024) /* 1GB */
108#define PLUTO_GART_SIZE (PLUTO_IOVA_SIZE / 2)
109
110#define SBA_PDIR_VALID_BIT 0x8000000000000000ULL
111
112#define SBA_AGPGART_COOKIE 0x0000badbadc0ffeeULL
113
114#define SBA_FUNC_ID 0x0000 /* function id */
115#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */
116
117#define SBA_FUNC_SIZE 4096 /* SBA configuration function reg set */
118
119#define ASTRO_IOC_OFFSET (32 * SBA_FUNC_SIZE)
120#define PLUTO_IOC_OFFSET (1 * SBA_FUNC_SIZE)
121/* Ike's IOC's occupy functions 2 and 3 */
122#define IKE_IOC_OFFSET(p) ((p+2) * SBA_FUNC_SIZE)
123
124#define IOC_CTRL 0x8 /* IOC_CTRL offset */
125#define IOC_CTRL_TC (1 << 0) /* TOC Enable */
126#define IOC_CTRL_CE (1 << 1) /* Coalesce Enable */
127#define IOC_CTRL_DE (1 << 2) /* Dillon Enable */
128#define IOC_CTRL_RM (1 << 8) /* Real Mode */
129#define IOC_CTRL_NC (1 << 9) /* Non Coherent Mode */
130#define IOC_CTRL_D4 (1 << 11) /* Disable 4-byte coalescing */
131#define IOC_CTRL_DD (1 << 13) /* Disable distr. LMMIO range coalescing */
132
133/*
134** Offsets into MBIB (Function 0 on Ike and hopefully Astro)
135** Firmware programs this stuff. Don't touch it.
136*/
137#define LMMIO_DIRECT0_BASE 0x300
138#define LMMIO_DIRECT0_MASK 0x308
139#define LMMIO_DIRECT0_ROUTE 0x310
140
141#define LMMIO_DIST_BASE 0x360
142#define LMMIO_DIST_MASK 0x368
143#define LMMIO_DIST_ROUTE 0x370
144
145#define IOS_DIST_BASE 0x390
146#define IOS_DIST_MASK 0x398
147#define IOS_DIST_ROUTE 0x3A0
148
149#define IOS_DIRECT_BASE 0x3C0
150#define IOS_DIRECT_MASK 0x3C8
151#define IOS_DIRECT_ROUTE 0x3D0
152
153/*
154** Offsets into I/O TLB (Function 2 and 3 on Ike)
155*/
156#define ROPE0_CTL 0x200 /* "regbus pci0" */
157#define ROPE1_CTL 0x208
158#define ROPE2_CTL 0x210
159#define ROPE3_CTL 0x218
160#define ROPE4_CTL 0x220
161#define ROPE5_CTL 0x228
162#define ROPE6_CTL 0x230
163#define ROPE7_CTL 0x238
164
165#define IOC_ROPE0_CFG 0x500 /* pluto only */
166#define IOC_ROPE_AO 0x10 /* Allow "Relaxed Ordering" */
167
168#define HF_ENABLE 0x40
169
170#define IOC_IBASE 0x300 /* IO TLB */
171#define IOC_IMASK 0x308
172#define IOC_PCOM 0x310
173#define IOC_TCNFG 0x318
174#define IOC_PDIR_BASE 0x320
175
176/*
177** IOC supports 4/8/16/64KB page sizes (see TCNFG register)
178** It's safer (avoid memory corruption) to keep DMA page mappings
179** equivalently sized to VM PAGE_SIZE.
180**
181** We really can't avoid generating a new mapping for each
182** page since the Virtual Coherence Index has to be generated
183** and updated for each page.
184**
185** PAGE_SIZE could be greater than IOVP_SIZE. But not the inverse.
186*/
187#define IOVP_SIZE PAGE_SIZE
188#define IOVP_SHIFT PAGE_SHIFT
189#define IOVP_MASK PAGE_MASK
190
191#define SBA_PERF_CFG 0x708 /* Performance Counter stuff */
192#define SBA_PERF_MASK1 0x718
193#define SBA_PERF_MASK2 0x730
194
195/*
196** Offsets into PCI Performance Counters (functions 12 and 13)
197** Controlled by PERF registers in function 2 & 3 respectively.
198*/
199#define SBA_PERF_CNT1 0x200
200#define SBA_PERF_CNT2 0x208
201#define SBA_PERF_CNT3 0x210
202
203/*
204** lba_device: Per instance Elroy data structure
205*/
206struct lba_device {
207 struct pci_hba_data hba;
208
209 spinlock_t lba_lock;
210 void *iosapic_obj;
211
212#ifdef CONFIG_64BIT
213 void __iomem *iop_base; /* PA_VIEW - for IO port accessor funcs */
214#endif
215
216 int flags; /* state/functionality enabled */
217 int hw_rev; /* HW revision of chip */
218};
219
220#define ELROY_HVERS 0x782
221#define MERCURY_HVERS 0x783
222#define QUICKSILVER_HVERS 0x784
223
224static inline int IS_ELROY(struct parisc_device *d) {
225 return (d->id.hversion == ELROY_HVERS);
226}
227
228static inline int IS_MERCURY(struct parisc_device *d) {
229 return (d->id.hversion == MERCURY_HVERS);
230}
231
232static inline int IS_QUICKSILVER(struct parisc_device *d) {
233 return (d->id.hversion == QUICKSILVER_HVERS);
234}
235
236static inline int agp_mode_mercury(void __iomem *hpa) {
237 u64 bus_mode;
238
239 bus_mode = readl(hpa + 0x0620);
240 if (bus_mode & 1)
241 return 1;
242
243 return 0;
244}
245
246/*
247** I/O SAPIC init function
248** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
249** Call setup as part of per instance initialization.
250** (ie *not* init_module() function unless only one is present.)
251** fixup_irq is to initialize PCI IRQ line support and
252** virtualize pcidev->irq value. To be called by pci_fixup_bus().
253*/
254extern void *iosapic_register(unsigned long hpa);
255extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
256
257#define LBA_FUNC_ID 0x0000 /* function id */
258#define LBA_FCLASS 0x0008 /* function class, bist, header, rev... */
259#define LBA_CAPABLE 0x0030 /* capabilities register */
260
261#define LBA_PCI_CFG_ADDR 0x0040 /* poke CFG address here */
262#define LBA_PCI_CFG_DATA 0x0048 /* read or write data here */
263
264#define LBA_PMC_MTLT 0x0050 /* Firmware sets this - read only. */
265#define LBA_FW_SCRATCH 0x0058 /* Firmware writes the PCI bus number here. */
266#define LBA_ERROR_ADDR 0x0070 /* On error, address gets logged here */
267
268#define LBA_ARB_MASK 0x0080 /* bit 0 enable arbitration. PAT/PDC enables */
269#define LBA_ARB_PRI 0x0088 /* firmware sets this. */
270#define LBA_ARB_MODE 0x0090 /* firmware sets this. */
271#define LBA_ARB_MTLT 0x0098 /* firmware sets this. */
272
273#define LBA_MOD_ID 0x0100 /* Module ID. PDC_PAT_CELL reports 4 */
274
275#define LBA_STAT_CTL 0x0108 /* Status & Control */
276#define LBA_BUS_RESET 0x01 /* Deassert PCI Bus Reset Signal */
277#define CLEAR_ERRLOG 0x10 /* "Clear Error Log" cmd */
278#define CLEAR_ERRLOG_ENABLE 0x20 /* "Clear Error Log" Enable */
279#define HF_ENABLE 0x40 /* enable HF mode (default is -1 mode) */
280
281#define LBA_LMMIO_BASE 0x0200 /* < 4GB I/O address range */
282#define LBA_LMMIO_MASK 0x0208
283
284#define LBA_GMMIO_BASE 0x0210 /* > 4GB I/O address range */
285#define LBA_GMMIO_MASK 0x0218
286
287#define LBA_WLMMIO_BASE 0x0220 /* All < 4GB ranges under the same *SBA* */
288#define LBA_WLMMIO_MASK 0x0228
289
290#define LBA_WGMMIO_BASE 0x0230 /* All > 4GB ranges under the same *SBA* */
291#define LBA_WGMMIO_MASK 0x0238
292
293#define LBA_IOS_BASE 0x0240 /* I/O port space for this LBA */
294#define LBA_IOS_MASK 0x0248
295
296#define LBA_ELMMIO_BASE 0x0250 /* Extra LMMIO range */
297#define LBA_ELMMIO_MASK 0x0258
298
299#define LBA_EIOS_BASE 0x0260 /* Extra I/O port space */
300#define LBA_EIOS_MASK 0x0268
301
302#define LBA_GLOBAL_MASK 0x0270 /* Mercury only: Global Address Mask */
303#define LBA_DMA_CTL 0x0278 /* firmware sets this */
304
305#define LBA_IBASE 0x0300 /* SBA DMA support */
306#define LBA_IMASK 0x0308
307
308/* FIXME: ignore DMA Hint stuff until we can measure performance */
309#define LBA_HINT_CFG 0x0310
310#define LBA_HINT_BASE 0x0380 /* 14 registers at every 8 bytes. */
311
312#define LBA_BUS_MODE 0x0620
313
314/* ERROR regs are needed for config cycle kluges */
315#define LBA_ERROR_CONFIG 0x0680
316#define LBA_SMART_MODE 0x20
317#define LBA_ERROR_STATUS 0x0688
318#define LBA_ROPE_CTL 0x06A0
319
320#define LBA_IOSAPIC_BASE 0x800 /* Offset of IRQ logic */
321
322#endif /*_ASM_PARISC_ROPES_H_*/
diff --git a/include/asm-parisc/rt_sigframe.h b/include/asm-parisc/rt_sigframe.h
deleted file mode 100644
index f0dd3b30f6c4..000000000000
--- a/include/asm-parisc/rt_sigframe.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef _ASM_PARISC_RT_SIGFRAME_H
2#define _ASM_PARISC_RT_SIGFRAME_H
3
4#define SIGRETURN_TRAMP 4
5#define SIGRESTARTBLOCK_TRAMP 5
6#define TRAMP_SIZE (SIGRETURN_TRAMP + SIGRESTARTBLOCK_TRAMP)
7
8struct rt_sigframe {
9 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
10 Secondary to that it must protect the ERESTART_RESTARTBLOCK
11 trampoline we left on the stack (we were bad and didn't
12 change sp so we could run really fast.) */
13 unsigned int tramp[TRAMP_SIZE];
14 struct siginfo info;
15 struct ucontext uc;
16};
17
18#define SIGFRAME 128
19#define FUNCTIONCALLFRAME 96
20#define PARISC_RT_SIGFRAME_SIZE \
21 (((sizeof(struct rt_sigframe) + FUNCTIONCALLFRAME) + SIGFRAME) & -SIGFRAME)
22
23#endif
diff --git a/include/asm-parisc/rtc.h b/include/asm-parisc/rtc.h
deleted file mode 100644
index 099d641a42c2..000000000000
--- a/include/asm-parisc/rtc.h
+++ /dev/null
@@ -1,131 +0,0 @@
1/*
2 * include/asm-parisc/rtc.h
3 *
4 * Copyright 2002 Randolph CHung <tausq@debian.org>
5 *
6 * Based on: include/asm-ppc/rtc.h and the genrtc driver in the
7 * 2.4 parisc linux tree
8 */
9
10#ifndef __ASM_RTC_H__
11#define __ASM_RTC_H__
12
13#ifdef __KERNEL__
14
15#include <linux/rtc.h>
16
17#include <asm/pdc.h>
18
19#define SECS_PER_HOUR (60 * 60)
20#define SECS_PER_DAY (SECS_PER_HOUR * 24)
21
22
23#define RTC_PIE 0x40 /* periodic interrupt enable */
24#define RTC_AIE 0x20 /* alarm interrupt enable */
25#define RTC_UIE 0x10 /* update-finished interrupt enable */
26
27#define RTC_BATT_BAD 0x100 /* battery bad */
28
29/* some dummy definitions */
30#define RTC_SQWE 0x08 /* enable square-wave output */
31#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
32#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
33#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
34
35# define __isleap(year) \
36 ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
37
38/* How many days come before each month (0-12). */
39static const unsigned short int __mon_yday[2][13] =
40{
41 /* Normal years. */
42 { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
43 /* Leap years. */
44 { 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
45};
46
47static inline unsigned int get_rtc_time(struct rtc_time *wtime)
48{
49 struct pdc_tod tod_data;
50 long int days, rem, y;
51 const unsigned short int *ip;
52
53 memset(wtime, 0, sizeof(*wtime));
54 if (pdc_tod_read(&tod_data) < 0)
55 return RTC_24H | RTC_BATT_BAD;
56
57 // most of the remainder of this function is:
58// Copyright (C) 1991, 1993, 1997, 1998 Free Software Foundation, Inc.
59// This was originally a part of the GNU C Library.
60// It is distributed under the GPL, and was swiped from offtime.c
61
62
63 days = tod_data.tod_sec / SECS_PER_DAY;
64 rem = tod_data.tod_sec % SECS_PER_DAY;
65
66 wtime->tm_hour = rem / SECS_PER_HOUR;
67 rem %= SECS_PER_HOUR;
68 wtime->tm_min = rem / 60;
69 wtime->tm_sec = rem % 60;
70
71 y = 1970;
72
73#define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
74#define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
75
76 while (days < 0 || days >= (__isleap (y) ? 366 : 365))
77 {
78 /* Guess a corrected year, assuming 365 days per year. */
79 long int yg = y + days / 365 - (days % 365 < 0);
80
81 /* Adjust DAYS and Y to match the guessed year. */
82 days -= ((yg - y) * 365
83 + LEAPS_THRU_END_OF (yg - 1)
84 - LEAPS_THRU_END_OF (y - 1));
85 y = yg;
86 }
87 wtime->tm_year = y - 1900;
88
89 ip = __mon_yday[__isleap(y)];
90 for (y = 11; days < (long int) ip[y]; --y)
91 continue;
92 days -= ip[y];
93 wtime->tm_mon = y;
94 wtime->tm_mday = days + 1;
95
96 return RTC_24H;
97}
98
99static int set_rtc_time(struct rtc_time *wtime)
100{
101 u_int32_t secs;
102
103 secs = mktime(wtime->tm_year + 1900, wtime->tm_mon + 1, wtime->tm_mday,
104 wtime->tm_hour, wtime->tm_min, wtime->tm_sec);
105
106 if(pdc_tod_set(secs, 0) < 0)
107 return -1;
108 else
109 return 0;
110
111}
112
113static inline unsigned int get_rtc_ss(void)
114{
115 struct rtc_time h;
116
117 get_rtc_time(&h);
118 return h.tm_sec;
119}
120
121static inline int get_rtc_pll(struct rtc_pll_info *pll)
122{
123 return -EINVAL;
124}
125static inline int set_rtc_pll(struct rtc_pll_info *pll)
126{
127 return -EINVAL;
128}
129
130#endif /* __KERNEL__ */
131#endif /* __ASM_RTC_H__ */
diff --git a/include/asm-parisc/runway.h b/include/asm-parisc/runway.h
deleted file mode 100644
index 5bea02da7e22..000000000000
--- a/include/asm-parisc/runway.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef ASM_PARISC_RUNWAY_H
2#define ASM_PARISC_RUNWAY_H
3#ifdef __KERNEL__
4
5/* declared in arch/parisc/kernel/setup.c */
6extern struct proc_dir_entry * proc_runway_root;
7
8#define RUNWAY_STATUS 0x10
9#define RUNWAY_DEBUG 0x40
10
11#endif /* __KERNEL__ */
12#endif /* ASM_PARISC_RUNWAY_H */
diff --git a/include/asm-parisc/scatterlist.h b/include/asm-parisc/scatterlist.h
deleted file mode 100644
index 62269b31ebf4..000000000000
--- a/include/asm-parisc/scatterlist.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _ASM_PARISC_SCATTERLIST_H
2#define _ASM_PARISC_SCATTERLIST_H
3
4#include <asm/page.h>
5#include <asm/types.h>
6
7struct scatterlist {
8#ifdef CONFIG_DEBUG_SG
9 unsigned long sg_magic;
10#endif
11 unsigned long page_link;
12 unsigned int offset;
13
14 unsigned int length;
15
16 /* an IOVA can be 64-bits on some PA-Risc platforms. */
17 dma_addr_t iova; /* I/O Virtual Address */
18 __u32 iova_length; /* bytes mapped */
19};
20
21#define sg_virt_addr(sg) ((unsigned long)sg_virt(sg))
22#define sg_dma_address(sg) ((sg)->iova)
23#define sg_dma_len(sg) ((sg)->iova_length)
24
25#define ISA_DMA_THRESHOLD (~0UL)
26
27#endif /* _ASM_PARISC_SCATTERLIST_H */
diff --git a/include/asm-parisc/sections.h b/include/asm-parisc/sections.h
deleted file mode 100644
index 9d13c3507ad6..000000000000
--- a/include/asm-parisc/sections.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _PARISC_SECTIONS_H
2#define _PARISC_SECTIONS_H
3
4/* nothing to see, move along */
5#include <asm-generic/sections.h>
6
7#ifdef CONFIG_64BIT
8#undef dereference_function_descriptor
9void *dereference_function_descriptor(void *);
10#endif
11
12#endif
diff --git a/include/asm-parisc/segment.h b/include/asm-parisc/segment.h
deleted file mode 100644
index 26794ddb6524..000000000000
--- a/include/asm-parisc/segment.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __PARISC_SEGMENT_H
2#define __PARISC_SEGMENT_H
3
4/* Only here because we have some old header files that expect it.. */
5
6#endif
diff --git a/include/asm-parisc/sembuf.h b/include/asm-parisc/sembuf.h
deleted file mode 100644
index 1e59ffd3bd1e..000000000000
--- a/include/asm-parisc/sembuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef _PARISC_SEMBUF_H
2#define _PARISC_SEMBUF_H
3
4/*
5 * The semid64_ds structure for parisc architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t sem_otime; /* last semop time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t sem_ctime; /* last change time */
24 unsigned int sem_nsems; /* no. of semaphores in array */
25 unsigned int __unused1;
26 unsigned int __unused2;
27};
28
29#endif /* _PARISC_SEMBUF_H */
diff --git a/include/asm-parisc/serial.h b/include/asm-parisc/serial.h
deleted file mode 100644
index d7e3cc60dbc3..000000000000
--- a/include/asm-parisc/serial.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * include/asm-parisc/serial.h
3 */
4
5/*
6 * This is used for 16550-compatible UARTs
7 */
8#define BASE_BAUD ( 1843200 / 16 )
9
10#define SERIAL_PORT_DFNS
diff --git a/include/asm-parisc/setup.h b/include/asm-parisc/setup.h
deleted file mode 100644
index 7da2e5b8747e..000000000000
--- a/include/asm-parisc/setup.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _PARISC_SETUP_H
2#define _PARISC_SETUP_H
3
4#define COMMAND_LINE_SIZE 1024
5
6#endif /* _PARISC_SETUP_H */
diff --git a/include/asm-parisc/shmbuf.h b/include/asm-parisc/shmbuf.h
deleted file mode 100644
index 0a3eada1863b..000000000000
--- a/include/asm-parisc/shmbuf.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef _PARISC_SHMBUF_H
2#define _PARISC_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for parisc architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t shm_atime; /* last attach time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t shm_dtime; /* last detach time */
24#ifndef CONFIG_64BIT
25 unsigned int __pad3;
26#endif
27 __kernel_time_t shm_ctime; /* last change time */
28#ifndef CONFIG_64BIT
29 unsigned int __pad4;
30#endif
31 size_t shm_segsz; /* size of segment (bytes) */
32 __kernel_pid_t shm_cpid; /* pid of creator */
33 __kernel_pid_t shm_lpid; /* pid of last operator */
34 unsigned int shm_nattch; /* no. of current attaches */
35 unsigned int __unused1;
36 unsigned int __unused2;
37};
38
39#ifdef CONFIG_64BIT
40/* The 'unsigned int' (formerly 'unsigned long') data types below will
41 * ensure that a 32-bit app calling shmctl(*,IPC_INFO,*) will work on
42 * a wide kernel, but if some of these values are meant to contain pointers
43 * they may need to be 'long long' instead. -PB XXX FIXME
44 */
45#endif
46struct shminfo64 {
47 unsigned int shmmax;
48 unsigned int shmmin;
49 unsigned int shmmni;
50 unsigned int shmseg;
51 unsigned int shmall;
52 unsigned int __unused1;
53 unsigned int __unused2;
54 unsigned int __unused3;
55 unsigned int __unused4;
56};
57
58#endif /* _PARISC_SHMBUF_H */
diff --git a/include/asm-parisc/shmparam.h b/include/asm-parisc/shmparam.h
deleted file mode 100644
index 628ddc22faa8..000000000000
--- a/include/asm-parisc/shmparam.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASMPARISC_SHMPARAM_H
2#define _ASMPARISC_SHMPARAM_H
3
4#define __ARCH_FORCE_SHMLBA 1
5
6#define SHMLBA 0x00400000 /* attach addr needs to be 4 Mb aligned */
7
8#endif /* _ASMPARISC_SHMPARAM_H */
diff --git a/include/asm-parisc/sigcontext.h b/include/asm-parisc/sigcontext.h
deleted file mode 100644
index 27ef31bb3b6e..000000000000
--- a/include/asm-parisc/sigcontext.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef _ASMPARISC_SIGCONTEXT_H
2#define _ASMPARISC_SIGCONTEXT_H
3
4#define PARISC_SC_FLAG_ONSTACK 1<<0
5#define PARISC_SC_FLAG_IN_SYSCALL 1<<1
6
7/* We will add more stuff here as it becomes necessary, until we know
8 it works. */
9struct sigcontext {
10 unsigned long sc_flags;
11
12 unsigned long sc_gr[32]; /* PSW in sc_gr[0] */
13 unsigned long long sc_fr[32]; /* FIXME, do we need other state info? */
14 unsigned long sc_iasq[2];
15 unsigned long sc_iaoq[2];
16 unsigned long sc_sar; /* cr11 */
17};
18
19
20#endif
diff --git a/include/asm-parisc/siginfo.h b/include/asm-parisc/siginfo.h
deleted file mode 100644
index d7034728f377..000000000000
--- a/include/asm-parisc/siginfo.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef _PARISC_SIGINFO_H
2#define _PARISC_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#undef NSIGTRAP
7#define NSIGTRAP 4
8
9#endif
diff --git a/include/asm-parisc/signal.h b/include/asm-parisc/signal.h
deleted file mode 100644
index c20356375d1d..000000000000
--- a/include/asm-parisc/signal.h
+++ /dev/null
@@ -1,153 +0,0 @@
1#ifndef _ASM_PARISC_SIGNAL_H
2#define _ASM_PARISC_SIGNAL_H
3
4#define SIGHUP 1
5#define SIGINT 2
6#define SIGQUIT 3
7#define SIGILL 4
8#define SIGTRAP 5
9#define SIGABRT 6
10#define SIGIOT 6
11#define SIGEMT 7
12#define SIGFPE 8
13#define SIGKILL 9
14#define SIGBUS 10
15#define SIGSEGV 11
16#define SIGSYS 12 /* Linux doesn't use this */
17#define SIGPIPE 13
18#define SIGALRM 14
19#define SIGTERM 15
20#define SIGUSR1 16
21#define SIGUSR2 17
22#define SIGCHLD 18
23#define SIGPWR 19
24#define SIGVTALRM 20
25#define SIGPROF 21
26#define SIGIO 22
27#define SIGPOLL SIGIO
28#define SIGWINCH 23
29#define SIGSTOP 24
30#define SIGTSTP 25
31#define SIGCONT 26
32#define SIGTTIN 27
33#define SIGTTOU 28
34#define SIGURG 29
35#define SIGLOST 30 /* Linux doesn't use this either */
36#define SIGUNUSED 31
37#define SIGRESERVE SIGUNUSED
38
39#define SIGXCPU 33
40#define SIGXFSZ 34
41#define SIGSTKFLT 36
42
43/* These should not be considered constants from userland. */
44#define SIGRTMIN 37
45#define SIGRTMAX _NSIG /* it's 44 under HP/UX */
46
47/*
48 * SA_FLAGS values:
49 *
50 * SA_ONSTACK indicates that a registered stack_t will be used.
51 * SA_RESTART flag to get restarting signals (which were the default long ago)
52 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
53 * SA_RESETHAND clears the handler when the signal is delivered.
54 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
55 * SA_NODEFER prevents the current signal from being masked in the handler.
56 *
57 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
58 * Unix names RESETHAND and NODEFER respectively.
59 */
60#define SA_ONSTACK 0x00000001
61#define SA_RESETHAND 0x00000004
62#define SA_NOCLDSTOP 0x00000008
63#define SA_SIGINFO 0x00000010
64#define SA_NODEFER 0x00000020
65#define SA_RESTART 0x00000040
66#define SA_NOCLDWAIT 0x00000080
67#define _SA_SIGGFAULT 0x00000100 /* HPUX */
68
69#define SA_NOMASK SA_NODEFER
70#define SA_ONESHOT SA_RESETHAND
71
72#define SA_RESTORER 0x04000000 /* obsolete -- ignored */
73
74/*
75 * sigaltstack controls
76 */
77#define SS_ONSTACK 1
78#define SS_DISABLE 2
79
80#define MINSIGSTKSZ 2048
81#define SIGSTKSZ 8192
82
83#ifdef __KERNEL__
84
85#define _NSIG 64
86/* bits-per-word, where word apparently means 'long' not 'int' */
87#define _NSIG_BPW BITS_PER_LONG
88#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
89
90#endif /* __KERNEL__ */
91
92#define SIG_BLOCK 0 /* for blocking signals */
93#define SIG_UNBLOCK 1 /* for unblocking signals */
94#define SIG_SETMASK 2 /* for setting the signal mask */
95
96#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
97#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
98#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
99
100# ifndef __ASSEMBLY__
101
102# include <linux/types.h>
103
104/* Avoid too many header ordering problems. */
105struct siginfo;
106
107/* Type of a signal handler. */
108#ifdef CONFIG_64BIT
109/* function pointers on 64-bit parisc are pointers to little structs and the
110 * compiler doesn't support code which changes or tests the address of
111 * the function in the little struct. This is really ugly -PB
112 */
113typedef char __user *__sighandler_t;
114#else
115typedef void __signalfn_t(int);
116typedef __signalfn_t __user *__sighandler_t;
117#endif
118
119typedef struct sigaltstack {
120 void __user *ss_sp;
121 int ss_flags;
122 size_t ss_size;
123} stack_t;
124
125#ifdef __KERNEL__
126
127/* Most things should be clean enough to redefine this at will, if care
128 is taken to make libc match. */
129
130typedef unsigned long old_sigset_t; /* at least 32 bits */
131
132typedef struct {
133 /* next_signal() assumes this is a long - no choice */
134 unsigned long sig[_NSIG_WORDS];
135} sigset_t;
136
137struct sigaction {
138 __sighandler_t sa_handler;
139 unsigned long sa_flags;
140 sigset_t sa_mask; /* mask last for extensibility */
141};
142
143struct k_sigaction {
144 struct sigaction sa;
145};
146
147#define ptrace_signal_deliver(regs, cookie) do { } while (0)
148
149#include <asm/sigcontext.h>
150
151#endif /* __KERNEL__ */
152#endif /* !__ASSEMBLY */
153#endif /* _ASM_PARISC_SIGNAL_H */
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
deleted file mode 100644
index 398cdbaf4e54..000000000000
--- a/include/asm-parisc/smp.h
+++ /dev/null
@@ -1,68 +0,0 @@
1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H
3
4
5#if defined(CONFIG_SMP)
6
7/* Page Zero Location PDC will look for the address to branch to when we poke
8** slave CPUs still in "Icache loop".
9*/
10#define PDC_OS_BOOT_RENDEZVOUS 0x10
11#define PDC_OS_BOOT_RENDEZVOUS_HI 0x28
12
13#ifndef ASSEMBLY
14#include <linux/bitops.h>
15#include <linux/threads.h> /* for NR_CPUS */
16#include <linux/cpumask.h>
17typedef unsigned long address_t;
18
19extern cpumask_t cpu_online_map;
20
21
22/*
23 * Private routines/data
24 *
25 * physical and logical are equivalent until we support CPU hotplug.
26 */
27#define cpu_number_map(cpu) (cpu)
28#define cpu_logical_map(cpu) (cpu)
29
30extern void smp_send_reschedule(int cpu);
31extern void smp_send_all_nop(void);
32
33extern void arch_send_call_function_single_ipi(int cpu);
34extern void arch_send_call_function_ipi(cpumask_t mask);
35
36#endif /* !ASSEMBLY */
37
38/*
39 * This magic constant controls our willingness to transfer
40 * a process across CPUs. Such a transfer incurs cache and tlb
41 * misses. The current value is inherited from i386. Still needs
42 * to be tuned for parisc.
43 */
44
45#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
46
47extern unsigned long cpu_present_mask;
48
49#define raw_smp_processor_id() (current_thread_info()->cpu)
50
51#else /* CONFIG_SMP */
52
53static inline void smp_send_all_nop(void) { return; }
54
55#endif
56
57#define NO_PROC_ID 0xFF /* No processor magic marker */
58#define ANY_PROC_ID 0xFF /* Any processor magic marker */
59static inline int __cpu_disable (void) {
60 return 0;
61}
62static inline void __cpu_die (unsigned int cpu) {
63 while(1)
64 ;
65}
66extern int __cpu_up (unsigned int cpu);
67
68#endif /* __ASM_SMP_H */
diff --git a/include/asm-parisc/socket.h b/include/asm-parisc/socket.h
deleted file mode 100644
index fba402c95ac2..000000000000
--- a/include/asm-parisc/socket.h
+++ /dev/null
@@ -1,62 +0,0 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 0xffff
8
9#define SO_DEBUG 0x0001
10#define SO_REUSEADDR 0x0004
11#define SO_KEEPALIVE 0x0008
12#define SO_DONTROUTE 0x0010
13#define SO_BROADCAST 0x0020
14#define SO_LINGER 0x0080
15#define SO_OOBINLINE 0x0100
16/* To add :#define SO_REUSEPORT 0x0200 */
17#define SO_SNDBUF 0x1001
18#define SO_RCVBUF 0x1002
19#define SO_SNDBUFFORCE 0x100a
20#define SO_RCVBUFFORCE 0x100b
21#define SO_SNDLOWAT 0x1003
22#define SO_RCVLOWAT 0x1004
23#define SO_SNDTIMEO 0x1005
24#define SO_RCVTIMEO 0x1006
25#define SO_ERROR 0x1007
26#define SO_TYPE 0x1008
27#define SO_PEERNAME 0x2000
28
29#define SO_NO_CHECK 0x400b
30#define SO_PRIORITY 0x400c
31#define SO_BSDCOMPAT 0x400e
32#define SO_PASSCRED 0x4010
33#define SO_PEERCRED 0x4011
34#define SO_TIMESTAMP 0x4012
35#define SCM_TIMESTAMP SO_TIMESTAMP
36#define SO_TIMESTAMPNS 0x4013
37#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
38
39/* Security levels - as per NRL IPv6 - don't actually do anything */
40#define SO_SECURITY_AUTHENTICATION 0x4016
41#define SO_SECURITY_ENCRYPTION_TRANSPORT 0x4017
42#define SO_SECURITY_ENCRYPTION_NETWORK 0x4018
43
44#define SO_BINDTODEVICE 0x4019
45
46/* Socket filtering */
47#define SO_ATTACH_FILTER 0x401a
48#define SO_DETACH_FILTER 0x401b
49
50#define SO_ACCEPTCONN 0x401c
51
52#define SO_PEERSEC 0x401d
53#define SO_PASSSEC 0x401e
54
55#define SO_MARK 0x401f
56
57/* O_NONBLOCK clashes with the bits used for socket types. Therefore we
58 * have to define SOCK_NONBLOCK to a different value here.
59 */
60#define SOCK_NONBLOCK 0x40000000
61
62#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-parisc/sockios.h b/include/asm-parisc/sockios.h
deleted file mode 100644
index dabfbc7483f6..000000000000
--- a/include/asm-parisc/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ARCH_PARISC_SOCKIOS__
2#define __ARCH_PARISC_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h
deleted file mode 100644
index f3d2090a18dc..000000000000
--- a/include/asm-parisc/spinlock.h
+++ /dev/null
@@ -1,194 +0,0 @@
1#ifndef __ASM_SPINLOCK_H
2#define __ASM_SPINLOCK_H
3
4#include <asm/system.h>
5#include <asm/processor.h>
6#include <asm/spinlock_types.h>
7
8static inline int __raw_spin_is_locked(raw_spinlock_t *x)
9{
10 volatile unsigned int *a = __ldcw_align(x);
11 return *a == 0;
12}
13
14#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0)
15#define __raw_spin_unlock_wait(x) \
16 do { cpu_relax(); } while (__raw_spin_is_locked(x))
17
18static inline void __raw_spin_lock_flags(raw_spinlock_t *x,
19 unsigned long flags)
20{
21 volatile unsigned int *a;
22
23 mb();
24 a = __ldcw_align(x);
25 while (__ldcw(a) == 0)
26 while (*a == 0)
27 if (flags & PSW_SM_I) {
28 local_irq_enable();
29 cpu_relax();
30 local_irq_disable();
31 } else
32 cpu_relax();
33 mb();
34}
35
36static inline void __raw_spin_unlock(raw_spinlock_t *x)
37{
38 volatile unsigned int *a;
39 mb();
40 a = __ldcw_align(x);
41 *a = 1;
42 mb();
43}
44
45static inline int __raw_spin_trylock(raw_spinlock_t *x)
46{
47 volatile unsigned int *a;
48 int ret;
49
50 mb();
51 a = __ldcw_align(x);
52 ret = __ldcw(a) != 0;
53 mb();
54
55 return ret;
56}
57
58/*
59 * Read-write spinlocks, allowing multiple readers but only one writer.
60 * Linux rwlocks are unfair to writers; they can be starved for an indefinite
61 * time by readers. With care, they can also be taken in interrupt context.
62 *
63 * In the PA-RISC implementation, we have a spinlock and a counter.
64 * Readers use the lock to serialise their access to the counter (which
65 * records how many readers currently hold the lock).
66 * Writers hold the spinlock, preventing any readers or other writers from
67 * grabbing the rwlock.
68 */
69
70/* Note that we have to ensure interrupts are disabled in case we're
71 * interrupted by some other code that wants to grab the same read lock */
72static __inline__ void __raw_read_lock(raw_rwlock_t *rw)
73{
74 unsigned long flags;
75 local_irq_save(flags);
76 __raw_spin_lock_flags(&rw->lock, flags);
77 rw->counter++;
78 __raw_spin_unlock(&rw->lock);
79 local_irq_restore(flags);
80}
81
82/* Note that we have to ensure interrupts are disabled in case we're
83 * interrupted by some other code that wants to grab the same read lock */
84static __inline__ void __raw_read_unlock(raw_rwlock_t *rw)
85{
86 unsigned long flags;
87 local_irq_save(flags);
88 __raw_spin_lock_flags(&rw->lock, flags);
89 rw->counter--;
90 __raw_spin_unlock(&rw->lock);
91 local_irq_restore(flags);
92}
93
94/* Note that we have to ensure interrupts are disabled in case we're
95 * interrupted by some other code that wants to grab the same read lock */
96static __inline__ int __raw_read_trylock(raw_rwlock_t *rw)
97{
98 unsigned long flags;
99 retry:
100 local_irq_save(flags);
101 if (__raw_spin_trylock(&rw->lock)) {
102 rw->counter++;
103 __raw_spin_unlock(&rw->lock);
104 local_irq_restore(flags);
105 return 1;
106 }
107
108 local_irq_restore(flags);
109 /* If write-locked, we fail to acquire the lock */
110 if (rw->counter < 0)
111 return 0;
112
113 /* Wait until we have a realistic chance at the lock */
114 while (__raw_spin_is_locked(&rw->lock) && rw->counter >= 0)
115 cpu_relax();
116
117 goto retry;
118}
119
120/* Note that we have to ensure interrupts are disabled in case we're
121 * interrupted by some other code that wants to read_trylock() this lock */
122static __inline__ void __raw_write_lock(raw_rwlock_t *rw)
123{
124 unsigned long flags;
125retry:
126 local_irq_save(flags);
127 __raw_spin_lock_flags(&rw->lock, flags);
128
129 if (rw->counter != 0) {
130 __raw_spin_unlock(&rw->lock);
131 local_irq_restore(flags);
132
133 while (rw->counter != 0)
134 cpu_relax();
135
136 goto retry;
137 }
138
139 rw->counter = -1; /* mark as write-locked */
140 mb();
141 local_irq_restore(flags);
142}
143
144static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
145{
146 rw->counter = 0;
147 __raw_spin_unlock(&rw->lock);
148}
149
150/* Note that we have to ensure interrupts are disabled in case we're
151 * interrupted by some other code that wants to read_trylock() this lock */
152static __inline__ int __raw_write_trylock(raw_rwlock_t *rw)
153{
154 unsigned long flags;
155 int result = 0;
156
157 local_irq_save(flags);
158 if (__raw_spin_trylock(&rw->lock)) {
159 if (rw->counter == 0) {
160 rw->counter = -1;
161 result = 1;
162 } else {
163 /* Read-locked. Oh well. */
164 __raw_spin_unlock(&rw->lock);
165 }
166 }
167 local_irq_restore(flags);
168
169 return result;
170}
171
172/*
173 * read_can_lock - would read_trylock() succeed?
174 * @lock: the rwlock in question.
175 */
176static __inline__ int __raw_read_can_lock(raw_rwlock_t *rw)
177{
178 return rw->counter >= 0;
179}
180
181/*
182 * write_can_lock - would write_trylock() succeed?
183 * @lock: the rwlock in question.
184 */
185static __inline__ int __raw_write_can_lock(raw_rwlock_t *rw)
186{
187 return !rw->counter;
188}
189
190#define _raw_spin_relax(lock) cpu_relax()
191#define _raw_read_relax(lock) cpu_relax()
192#define _raw_write_relax(lock) cpu_relax()
193
194#endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-parisc/spinlock_types.h b/include/asm-parisc/spinlock_types.h
deleted file mode 100644
index 3f72f47cf4b2..000000000000
--- a/include/asm-parisc/spinlock_types.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H
3
4typedef struct {
5#ifdef CONFIG_PA20
6 volatile unsigned int slock;
7# define __RAW_SPIN_LOCK_UNLOCKED { 1 }
8#else
9 volatile unsigned int lock[4];
10# define __RAW_SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } }
11#endif
12} raw_spinlock_t;
13
14typedef struct {
15 raw_spinlock_t lock;
16 volatile int counter;
17} raw_rwlock_t;
18
19#define __RAW_RW_LOCK_UNLOCKED { __RAW_SPIN_LOCK_UNLOCKED, 0 }
20
21#endif
diff --git a/include/asm-parisc/stat.h b/include/asm-parisc/stat.h
deleted file mode 100644
index 9d5fbbc5c31f..000000000000
--- a/include/asm-parisc/stat.h
+++ /dev/null
@@ -1,100 +0,0 @@
1#ifndef _PARISC_STAT_H
2#define _PARISC_STAT_H
3
4#include <linux/types.h>
5
6struct stat {
7 unsigned int st_dev; /* dev_t is 32 bits on parisc */
8 ino_t st_ino; /* 32 bits */
9 mode_t st_mode; /* 16 bits */
10 nlink_t st_nlink; /* 16 bits */
11 unsigned short st_reserved1; /* old st_uid */
12 unsigned short st_reserved2; /* old st_gid */
13 unsigned int st_rdev;
14 off_t st_size;
15 time_t st_atime;
16 unsigned int st_atime_nsec;
17 time_t st_mtime;
18 unsigned int st_mtime_nsec;
19 time_t st_ctime;
20 unsigned int st_ctime_nsec;
21 int st_blksize;
22 int st_blocks;
23 unsigned int __unused1; /* ACL stuff */
24 unsigned int __unused2; /* network */
25 ino_t __unused3; /* network */
26 unsigned int __unused4; /* cnodes */
27 unsigned short __unused5; /* netsite */
28 short st_fstype;
29 unsigned int st_realdev;
30 unsigned short st_basemode;
31 unsigned short st_spareshort;
32 uid_t st_uid;
33 gid_t st_gid;
34 unsigned int st_spare4[3];
35};
36
37#define STAT_HAVE_NSEC
38
39typedef __kernel_off64_t off64_t;
40
41struct hpux_stat64 {
42 unsigned int st_dev; /* dev_t is 32 bits on parisc */
43 ino_t st_ino; /* 32 bits */
44 mode_t st_mode; /* 16 bits */
45 nlink_t st_nlink; /* 16 bits */
46 unsigned short st_reserved1; /* old st_uid */
47 unsigned short st_reserved2; /* old st_gid */
48 unsigned int st_rdev;
49 off64_t st_size;
50 time_t st_atime;
51 unsigned int st_spare1;
52 time_t st_mtime;
53 unsigned int st_spare2;
54 time_t st_ctime;
55 unsigned int st_spare3;
56 int st_blksize;
57 __u64 st_blocks;
58 unsigned int __unused1; /* ACL stuff */
59 unsigned int __unused2; /* network */
60 ino_t __unused3; /* network */
61 unsigned int __unused4; /* cnodes */
62 unsigned short __unused5; /* netsite */
63 short st_fstype;
64 unsigned int st_realdev;
65 unsigned short st_basemode;
66 unsigned short st_spareshort;
67 uid_t st_uid;
68 gid_t st_gid;
69 unsigned int st_spare4[3];
70};
71
72/* This is the struct that 32-bit userspace applications are expecting.
73 * How 64-bit apps are going to be compiled, I have no idea. But at least
74 * this way, we don't have a wrapper in the kernel.
75 */
76struct stat64 {
77 unsigned long long st_dev;
78 unsigned int __pad1;
79
80 unsigned int __st_ino; /* Not actually filled in */
81 unsigned int st_mode;
82 unsigned int st_nlink;
83 unsigned int st_uid;
84 unsigned int st_gid;
85 unsigned long long st_rdev;
86 unsigned int __pad2;
87 signed long long st_size;
88 signed int st_blksize;
89
90 signed long long st_blocks;
91 signed int st_atime;
92 unsigned int st_atime_nsec;
93 signed int st_mtime;
94 unsigned int st_mtime_nsec;
95 signed int st_ctime;
96 unsigned int st_ctime_nsec;
97 unsigned long long st_ino;
98};
99
100#endif
diff --git a/include/asm-parisc/statfs.h b/include/asm-parisc/statfs.h
deleted file mode 100644
index 324bea905dc6..000000000000
--- a/include/asm-parisc/statfs.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _PARISC_STATFS_H
2#define _PARISC_STATFS_H
3
4#define __statfs_word long
5#include <asm-generic/statfs.h>
6
7#endif
diff --git a/include/asm-parisc/string.h b/include/asm-parisc/string.h
deleted file mode 100644
index eda01be65e35..000000000000
--- a/include/asm-parisc/string.h
+++ /dev/null
@@ -1,10 +0,0 @@
1#ifndef _PA_STRING_H_
2#define _PA_STRING_H_
3
4#define __HAVE_ARCH_MEMSET
5extern void * memset(void *, int, size_t);
6
7#define __HAVE_ARCH_MEMCPY
8void * memcpy(void * dest,const void *src,size_t count);
9
10#endif
diff --git a/include/asm-parisc/superio.h b/include/asm-parisc/superio.h
deleted file mode 100644
index 6598acb4d46d..000000000000
--- a/include/asm-parisc/superio.h
+++ /dev/null
@@ -1,85 +0,0 @@
1#ifndef _PARISC_SUPERIO_H
2#define _PARISC_SUPERIO_H
3
4#define IC_PIC1 0x20 /* PCI I/O address of master 8259 */
5#define IC_PIC2 0xA0 /* PCI I/O address of slave */
6
7/* Config Space Offsets to configuration and base address registers */
8#define SIO_CR 0x5A /* Configuration Register */
9#define SIO_ACPIBAR 0x88 /* ACPI BAR */
10#define SIO_FDCBAR 0x90 /* Floppy Disk Controller BAR */
11#define SIO_SP1BAR 0x94 /* Serial 1 BAR */
12#define SIO_SP2BAR 0x98 /* Serial 2 BAR */
13#define SIO_PPBAR 0x9C /* Parallel BAR */
14
15#define TRIGGER_1 0x67 /* Edge/level trigger register 1 */
16#define TRIGGER_2 0x68 /* Edge/level trigger register 2 */
17
18/* Interrupt Routing Control registers */
19#define CFG_IR_SER 0x69 /* Serial 1 [0:3] and Serial 2 [4:7] */
20#define CFG_IR_PFD 0x6a /* Parallel [0:3] and Floppy [4:7] */
21#define CFG_IR_IDE 0x6b /* IDE1 [0:3] and IDE2 [4:7] */
22#define CFG_IR_INTAB 0x6c /* PCI INTA [0:3] and INT B [4:7] */
23#define CFG_IR_INTCD 0x6d /* PCI INTC [0:3] and INT D [4:7] */
24#define CFG_IR_PS2 0x6e /* PS/2 KBINT [0:3] and Mouse [4:7] */
25#define CFG_IR_FXBUS 0x6f /* FXIRQ[0] [0:3] and FXIRQ[1] [4:7] */
26#define CFG_IR_USB 0x70 /* FXIRQ[2] [0:3] and USB [4:7] */
27#define CFG_IR_ACPI 0x71 /* ACPI SCI [0:3] and reserved [4:7] */
28
29#define CFG_IR_LOW CFG_IR_SER /* Lowest interrupt routing reg */
30#define CFG_IR_HIGH CFG_IR_ACPI /* Highest interrupt routing reg */
31
32/* 8259 operational control words */
33#define OCW2_EOI 0x20 /* Non-specific EOI */
34#define OCW2_SEOI 0x60 /* Specific EOI */
35#define OCW3_IIR 0x0A /* Read request register */
36#define OCW3_ISR 0x0B /* Read service register */
37#define OCW3_POLL 0x0C /* Poll the PIC for an interrupt vector */
38
39/* Interrupt lines. Only PIC1 is used */
40#define USB_IRQ 1 /* USB */
41#define SP1_IRQ 3 /* Serial port 1 */
42#define SP2_IRQ 4 /* Serial port 2 */
43#define PAR_IRQ 5 /* Parallel port */
44#define FDC_IRQ 6 /* Floppy controller */
45#define IDE_IRQ 7 /* IDE (pri+sec) */
46
47/* ACPI registers */
48#define USB_REG_CR 0x1f /* USB Regulator Control Register */
49
50#define SUPERIO_NIRQS 8
51
52struct superio_device {
53 u32 fdc_base;
54 u32 sp1_base;
55 u32 sp2_base;
56 u32 pp_base;
57 u32 acpi_base;
58 int suckyio_irq_enabled;
59 struct pci_dev *lio_pdev; /* pci device for legacy IO (fn 1) */
60 struct pci_dev *usb_pdev; /* pci device for USB (fn 2) */
61};
62
63/*
64 * Does NS make a 87415 based plug in PCI card? If so, because of this
65 * macro we currently don't support it being plugged into a machine
66 * that contains a SuperIO chip AND has CONFIG_SUPERIO enabled.
67 *
68 * This could be fixed by checking to see if function 1 exists, and
69 * if it is SuperIO Legacy IO; but really now, is this combination
70 * going to EVER happen?
71 */
72
73#define SUPERIO_IDE_FN 0 /* Function number of IDE controller */
74#define SUPERIO_LIO_FN 1 /* Function number of Legacy IO controller */
75#define SUPERIO_USB_FN 2 /* Function number of USB controller */
76
77#define is_superio_device(x) \
78 (((x)->vendor == PCI_VENDOR_ID_NS) && \
79 ( ((x)->device == PCI_DEVICE_ID_NS_87415) \
80 || ((x)->device == PCI_DEVICE_ID_NS_87560_LIO) \
81 || ((x)->device == PCI_DEVICE_ID_NS_87560_USB) ) )
82
83extern int superio_fixup_irq(struct pci_dev *pcidev); /* called by iosapic */
84
85#endif /* _PARISC_SUPERIO_H */
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
deleted file mode 100644
index ee80c920b464..000000000000
--- a/include/asm-parisc/system.h
+++ /dev/null
@@ -1,182 +0,0 @@
1#ifndef __PARISC_SYSTEM_H
2#define __PARISC_SYSTEM_H
3
4#include <asm/psw.h>
5
6/* The program status word as bitfields. */
7struct pa_psw {
8 unsigned int y:1;
9 unsigned int z:1;
10 unsigned int rv:2;
11 unsigned int w:1;
12 unsigned int e:1;
13 unsigned int s:1;
14 unsigned int t:1;
15
16 unsigned int h:1;
17 unsigned int l:1;
18 unsigned int n:1;
19 unsigned int x:1;
20 unsigned int b:1;
21 unsigned int c:1;
22 unsigned int v:1;
23 unsigned int m:1;
24
25 unsigned int cb:8;
26
27 unsigned int o:1;
28 unsigned int g:1;
29 unsigned int f:1;
30 unsigned int r:1;
31 unsigned int q:1;
32 unsigned int p:1;
33 unsigned int d:1;
34 unsigned int i:1;
35};
36
37#ifdef CONFIG_64BIT
38#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
39#else
40#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
41#endif
42
43struct task_struct;
44
45extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *);
46
47#define switch_to(prev, next, last) do { \
48 (last) = _switch_to(prev, next); \
49} while(0)
50
51/* interrupt control */
52#define local_save_flags(x) __asm__ __volatile__("ssm 0, %0" : "=r" (x) : : "memory")
53#define local_irq_disable() __asm__ __volatile__("rsm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
54#define local_irq_enable() __asm__ __volatile__("ssm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
55
56#define local_irq_save(x) \
57 __asm__ __volatile__("rsm %1,%0" : "=r" (x) :"i" (PSW_I) : "memory" )
58#define local_irq_restore(x) \
59 __asm__ __volatile__("mtsm %0" : : "r" (x) : "memory" )
60
61#define irqs_disabled() \
62({ \
63 unsigned long flags; \
64 local_save_flags(flags); \
65 (flags & PSW_I) == 0; \
66})
67
68#define mfctl(reg) ({ \
69 unsigned long cr; \
70 __asm__ __volatile__( \
71 "mfctl " #reg ",%0" : \
72 "=r" (cr) \
73 ); \
74 cr; \
75})
76
77#define mtctl(gr, cr) \
78 __asm__ __volatile__("mtctl %0,%1" \
79 : /* no outputs */ \
80 : "r" (gr), "i" (cr) : "memory")
81
82/* these are here to de-mystefy the calling code, and to provide hooks */
83/* which I needed for debugging EIEM problems -PB */
84#define get_eiem() mfctl(15)
85static inline void set_eiem(unsigned long val)
86{
87 mtctl(val, 15);
88}
89
90#define mfsp(reg) ({ \
91 unsigned long cr; \
92 __asm__ __volatile__( \
93 "mfsp " #reg ",%0" : \
94 "=r" (cr) \
95 ); \
96 cr; \
97})
98
99#define mtsp(gr, cr) \
100 __asm__ __volatile__("mtsp %0,%1" \
101 : /* no outputs */ \
102 : "r" (gr), "i" (cr) : "memory")
103
104
105/*
106** This is simply the barrier() macro from linux/kernel.h but when serial.c
107** uses tqueue.h uses smp_mb() defined using barrier(), linux/kernel.h
108** hasn't yet been included yet so it fails, thus repeating the macro here.
109**
110** PA-RISC architecture allows for weakly ordered memory accesses although
111** none of the processors use it. There is a strong ordered bit that is
112** set in the O-bit of the page directory entry. Operating systems that
113** can not tolerate out of order accesses should set this bit when mapping
114** pages. The O-bit of the PSW should also be set to 1 (I don't believe any
115** of the processor implemented the PSW O-bit). The PCX-W ERS states that
116** the TLB O-bit is not implemented so the page directory does not need to
117** have the O-bit set when mapping pages (section 3.1). This section also
118** states that the PSW Y, Z, G, and O bits are not implemented.
119** So it looks like nothing needs to be done for parisc-linux (yet).
120** (thanks to chada for the above comment -ggg)
121**
122** The __asm__ op below simple prevents gcc/ld from reordering
123** instructions across the mb() "call".
124*/
125#define mb() __asm__ __volatile__("":::"memory") /* barrier() */
126#define rmb() mb()
127#define wmb() mb()
128#define smp_mb() mb()
129#define smp_rmb() mb()
130#define smp_wmb() mb()
131#define smp_read_barrier_depends() do { } while(0)
132#define read_barrier_depends() do { } while(0)
133
134#define set_mb(var, value) do { var = value; mb(); } while (0)
135
136#ifndef CONFIG_PA20
137/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
138 and GCC only guarantees 8-byte alignment for stack locals, we can't
139 be assured of 16-byte alignment for atomic lock data even if we
140 specify "__attribute ((aligned(16)))" in the type declaration. So,
141 we use a struct containing an array of four ints for the atomic lock
142 type and dynamically select the 16-byte aligned int from the array
143 for the semaphore. */
144
145#define __PA_LDCW_ALIGNMENT 16
146#define __ldcw_align(a) ({ \
147 unsigned long __ret = (unsigned long) &(a)->lock[0]; \
148 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
149 & ~(__PA_LDCW_ALIGNMENT - 1); \
150 (volatile unsigned int *) __ret; \
151})
152#define __LDCW "ldcw"
153
154#else /*CONFIG_PA20*/
155/* From: "Jim Hull" <jim.hull of hp.com>
156 I've attached a summary of the change, but basically, for PA 2.0, as
157 long as the ",CO" (coherent operation) completer is specified, then the
158 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
159 they only require "natural" alignment (4-byte for ldcw, 8-byte for
160 ldcd). */
161
162#define __PA_LDCW_ALIGNMENT 4
163#define __ldcw_align(a) ((volatile unsigned int *)a)
164#define __LDCW "ldcw,co"
165
166#endif /*!CONFIG_PA20*/
167
168/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
169#define __ldcw(a) ({ \
170 unsigned __ret; \
171 __asm__ __volatile__(__LDCW " 0(%1),%0" \
172 : "=r" (__ret) : "r" (a)); \
173 __ret; \
174})
175
176#ifdef CONFIG_SMP
177# define __lock_aligned __attribute__((__section__(".data.lock_aligned")))
178#endif
179
180#define arch_align_stack(x) (x)
181
182#endif
diff --git a/include/asm-parisc/termbits.h b/include/asm-parisc/termbits.h
deleted file mode 100644
index d8bbc73b16b7..000000000000
--- a/include/asm-parisc/termbits.h
+++ /dev/null
@@ -1,200 +0,0 @@
1#ifndef __ARCH_PARISC_TERMBITS_H__
2#define __ARCH_PARISC_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0040000
77#define IUTF8 0100000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate */
161#define CMSPAR 010000000000 /* mark or space (stick) parity */
162#define CRTSCTS 020000000000 /* flow control */
163
164#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
165
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184/* tcflow() and TCXONC use these */
185#define TCOOFF 0
186#define TCOON 1
187#define TCIOFF 2
188#define TCION 3
189
190/* tcflush() and TCFLSH use these */
191#define TCIFLUSH 0
192#define TCOFLUSH 1
193#define TCIOFLUSH 2
194
195/* tcsetattr uses these */
196#define TCSANOW 0
197#define TCSADRAIN 1
198#define TCSAFLUSH 2
199
200#endif
diff --git a/include/asm-parisc/termios.h b/include/asm-parisc/termios.h
deleted file mode 100644
index a2a57a4548af..000000000000
--- a/include/asm-parisc/termios.h
+++ /dev/null
@@ -1,90 +0,0 @@
1#ifndef _PARISC_TERMIOS_H
2#define _PARISC_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43
44/* intr=^C quit=^\ erase=del kill=^U
45 eof=^D vtime=\0 vmin=\1 sxtc=\0
46 start=^Q stop=^S susp=^Z eol=\0
47 reprint=^R discard=^U werase=^W lnext=^V
48 eol2=\0
49*/
50#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp,&(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
84#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
85#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
86#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
87
88#endif /* __KERNEL__ */
89
90#endif /* _PARISC_TERMIOS_H */
diff --git a/include/asm-parisc/thread_info.h b/include/asm-parisc/thread_info.h
deleted file mode 100644
index 9f812741c355..000000000000
--- a/include/asm-parisc/thread_info.h
+++ /dev/null
@@ -1,74 +0,0 @@
1#ifndef _ASM_PARISC_THREAD_INFO_H
2#define _ASM_PARISC_THREAD_INFO_H
3
4#ifdef __KERNEL__
5
6#ifndef __ASSEMBLY__
7#include <asm/processor.h>
8
9struct thread_info {
10 struct task_struct *task; /* main task structure */
11 struct exec_domain *exec_domain;/* execution domain */
12 unsigned long flags; /* thread_info flags (see TIF_*) */
13 mm_segment_t addr_limit; /* user-level address space limit */
14 __u32 cpu; /* current CPU */
15 int preempt_count; /* 0=premptable, <0=BUG; will also serve as bh-counter */
16 struct restart_block restart_block;
17};
18
19#define INIT_THREAD_INFO(tsk) \
20{ \
21 .task = &tsk, \
22 .exec_domain = &default_exec_domain, \
23 .flags = 0, \
24 .cpu = 0, \
25 .addr_limit = KERNEL_DS, \
26 .preempt_count = 1, \
27 .restart_block = { \
28 .fn = do_no_restart_syscall \
29 } \
30}
31
32#define init_thread_info (init_thread_union.thread_info)
33#define init_stack (init_thread_union.stack)
34
35/* thread information allocation */
36
37#define THREAD_SIZE_ORDER 2
38/* Be sure to hunt all references to this down when you change the size of
39 * the kernel stack */
40#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
41#define THREAD_SHIFT (PAGE_SHIFT + THREAD_SIZE_ORDER)
42
43/* how to get the thread information struct from C */
44#define current_thread_info() ((struct thread_info *)mfctl(30))
45
46#endif /* !__ASSEMBLY */
47
48#define PREEMPT_ACTIVE_BIT 28
49#define PREEMPT_ACTIVE (1 << PREEMPT_ACTIVE_BIT)
50
51/*
52 * thread information flags
53 */
54#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
55#define TIF_SIGPENDING 1 /* signal pending */
56#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
57#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling TIF_NEED_RESCHED */
58#define TIF_32BIT 4 /* 32 bit binary */
59#define TIF_MEMDIE 5
60#define TIF_RESTORE_SIGMASK 6 /* restore saved signal mask */
61
62#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
63#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
64#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
65#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
66#define _TIF_32BIT (1 << TIF_32BIT)
67#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
68
69#define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | \
70 _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK)
71
72#endif /* __KERNEL__ */
73
74#endif /* _ASM_PARISC_THREAD_INFO_H */
diff --git a/include/asm-parisc/timex.h b/include/asm-parisc/timex.h
deleted file mode 100644
index 3b68d77273d9..000000000000
--- a/include/asm-parisc/timex.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * linux/include/asm-parisc/timex.h
3 *
4 * PARISC architecture timex specifications
5 */
6#ifndef _ASMPARISC_TIMEX_H
7#define _ASMPARISC_TIMEX_H
8
9#include <asm/system.h>
10
11#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
12
13typedef unsigned long cycles_t;
14
15static inline cycles_t get_cycles (void)
16{
17 return mfctl(16);
18}
19
20#endif
diff --git a/include/asm-parisc/tlb.h b/include/asm-parisc/tlb.h
deleted file mode 100644
index 383b1db310ee..000000000000
--- a/include/asm-parisc/tlb.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _PARISC_TLB_H
2#define _PARISC_TLB_H
3
4#define tlb_flush(tlb) \
5do { if ((tlb)->fullmm) \
6 flush_tlb_mm((tlb)->mm);\
7} while (0)
8
9#define tlb_start_vma(tlb, vma) \
10do { if (!(tlb)->fullmm) \
11 flush_cache_range(vma, vma->vm_start, vma->vm_end); \
12} while (0)
13
14#define tlb_end_vma(tlb, vma) \
15do { if (!(tlb)->fullmm) \
16 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
17} while (0)
18
19#define __tlb_remove_tlb_entry(tlb, pte, address) \
20 do { } while (0)
21
22#include <asm-generic/tlb.h>
23
24#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd)
25#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte)
26
27#endif
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
deleted file mode 100644
index b72ec66db699..000000000000
--- a/include/asm-parisc/tlbflush.h
+++ /dev/null
@@ -1,80 +0,0 @@
1#ifndef _PARISC_TLBFLUSH_H
2#define _PARISC_TLBFLUSH_H
3
4/* TLB flushing routines.... */
5
6#include <linux/mm.h>
7#include <linux/sched.h>
8#include <asm/mmu_context.h>
9
10
11/* This is for the serialisation of PxTLB broadcasts. At least on the
12 * N class systems, only one PxTLB inter processor broadcast can be
13 * active at any one time on the Merced bus. This tlb purge
14 * synchronisation is fairly lightweight and harmless so we activate
15 * it on all SMP systems not just the N class. We also need to have
16 * preemption disabled on uniprocessor machines, and spin_lock does that
17 * nicely.
18 */
19extern spinlock_t pa_tlb_lock;
20
21#define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
22#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
23
24extern void flush_tlb_all(void);
25extern void flush_tlb_all_local(void *);
26
27/*
28 * flush_tlb_mm()
29 *
30 * XXX This code is NOT valid for HP-UX compatibility processes,
31 * (although it will probably work 99% of the time). HP-UX
32 * processes are free to play with the space id's and save them
33 * over long periods of time, etc. so we have to preserve the
34 * space and just flush the entire tlb. We need to check the
35 * personality in order to do that, but the personality is not
36 * currently being set correctly.
37 *
38 * Of course, Linux processes could do the same thing, but
39 * we don't support that (and the compilers, dynamic linker,
40 * etc. do not do that).
41 */
42
43static inline void flush_tlb_mm(struct mm_struct *mm)
44{
45 BUG_ON(mm == &init_mm); /* Should never happen */
46
47#ifdef CONFIG_SMP
48 flush_tlb_all();
49#else
50 if (mm) {
51 if (mm->context != 0)
52 free_sid(mm->context);
53 mm->context = alloc_sid();
54 if (mm == current->active_mm)
55 load_context(mm->context);
56 }
57#endif
58}
59
60static inline void flush_tlb_page(struct vm_area_struct *vma,
61 unsigned long addr)
62{
63 /* For one page, it's not worth testing the split_tlb variable */
64
65 mb();
66 mtsp(vma->vm_mm->context,1);
67 purge_tlb_start();
68 pdtlb(addr);
69 pitlb(addr);
70 purge_tlb_end();
71}
72
73void __flush_tlb_range(unsigned long sid,
74 unsigned long start, unsigned long end);
75
76#define flush_tlb_range(vma,start,end) __flush_tlb_range((vma)->vm_mm->context,start,end)
77
78#define flush_tlb_kernel_range(start, end) __flush_tlb_range(0,start,end)
79
80#endif
diff --git a/include/asm-parisc/topology.h b/include/asm-parisc/topology.h
deleted file mode 100644
index d8133eb0b1e7..000000000000
--- a/include/asm-parisc/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_PARISC_TOPOLOGY_H
2#define _ASM_PARISC_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_PARISC_TOPOLOGY_H */
diff --git a/include/asm-parisc/traps.h b/include/asm-parisc/traps.h
deleted file mode 100644
index 1945f995f2df..000000000000
--- a/include/asm-parisc/traps.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef __ASM_TRAPS_H
2#define __ASM_TRAPS_H
3
4#ifdef __KERNEL__
5struct pt_regs;
6
7/* traps.c */
8void parisc_terminate(char *msg, struct pt_regs *regs,
9 int code, unsigned long offset);
10
11/* mm/fault.c */
12void do_page_fault(struct pt_regs *regs, unsigned long code,
13 unsigned long address);
14#endif
15
16#endif
diff --git a/include/asm-parisc/types.h b/include/asm-parisc/types.h
deleted file mode 100644
index 7f5a39bfb4ce..000000000000
--- a/include/asm-parisc/types.h
+++ /dev/null
@@ -1,36 +0,0 @@
1#ifndef _PARISC_TYPES_H
2#define _PARISC_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#ifdef CONFIG_64BIT
18#define BITS_PER_LONG 64
19#define SHIFT_PER_LONG 6
20#else
21#define BITS_PER_LONG 32
22#define SHIFT_PER_LONG 5
23#endif
24
25#ifndef __ASSEMBLY__
26
27/* Dma addresses are 32-bits wide. */
28
29typedef u32 dma_addr_t;
30typedef u64 dma64_addr_t;
31
32#endif /* __ASSEMBLY__ */
33
34#endif /* __KERNEL__ */
35
36#endif
diff --git a/include/asm-parisc/uaccess.h b/include/asm-parisc/uaccess.h
deleted file mode 100644
index 4878b9501f24..000000000000
--- a/include/asm-parisc/uaccess.h
+++ /dev/null
@@ -1,244 +0,0 @@
1#ifndef __PARISC_UACCESS_H
2#define __PARISC_UACCESS_H
3
4/*
5 * User space memory access functions
6 */
7#include <asm/page.h>
8#include <asm/system.h>
9#include <asm/cache.h>
10#include <asm-generic/uaccess.h>
11
12#define VERIFY_READ 0
13#define VERIFY_WRITE 1
14
15#define KERNEL_DS ((mm_segment_t){0})
16#define USER_DS ((mm_segment_t){1})
17
18#define segment_eq(a,b) ((a).seg == (b).seg)
19
20#define get_ds() (KERNEL_DS)
21#define get_fs() (current_thread_info()->addr_limit)
22#define set_fs(x) (current_thread_info()->addr_limit = (x))
23
24/*
25 * Note that since kernel addresses are in a separate address space on
26 * parisc, we don't need to do anything for access_ok().
27 * We just let the page fault handler do the right thing. This also means
28 * that put_user is the same as __put_user, etc.
29 */
30
31extern int __get_kernel_bad(void);
32extern int __get_user_bad(void);
33extern int __put_kernel_bad(void);
34extern int __put_user_bad(void);
35
36static inline long access_ok(int type, const void __user * addr,
37 unsigned long size)
38{
39 return 1;
40}
41
42#define put_user __put_user
43#define get_user __get_user
44
45#if !defined(CONFIG_64BIT)
46#define LDD_KERNEL(ptr) __get_kernel_bad();
47#define LDD_USER(ptr) __get_user_bad();
48#define STD_KERNEL(x, ptr) __put_kernel_asm64(x,ptr)
49#define STD_USER(x, ptr) __put_user_asm64(x,ptr)
50#define ASM_WORD_INSN ".word\t"
51#else
52#define LDD_KERNEL(ptr) __get_kernel_asm("ldd",ptr)
53#define LDD_USER(ptr) __get_user_asm("ldd",ptr)
54#define STD_KERNEL(x, ptr) __put_kernel_asm("std",x,ptr)
55#define STD_USER(x, ptr) __put_user_asm("std",x,ptr)
56#define ASM_WORD_INSN ".dword\t"
57#endif
58
59/*
60 * The exception table contains two values: the first is an address
61 * for an instruction that is allowed to fault, and the second is
62 * the address to the fixup routine.
63 */
64
65struct exception_table_entry {
66 unsigned long insn; /* address of insn that is allowed to fault. */
67 long fixup; /* fixup routine */
68};
69
70#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\
71 ".section __ex_table,\"aw\"\n" \
72 ASM_WORD_INSN #fault_addr ", " #except_addr "\n\t" \
73 ".previous\n"
74
75/*
76 * The page fault handler stores, in a per-cpu area, the following information
77 * if a fixup routine is available.
78 */
79struct exception_data {
80 unsigned long fault_ip;
81 unsigned long fault_space;
82 unsigned long fault_addr;
83};
84
85#define __get_user(x,ptr) \
86({ \
87 register long __gu_err __asm__ ("r8") = 0; \
88 register long __gu_val __asm__ ("r9") = 0; \
89 \
90 if (segment_eq(get_fs(),KERNEL_DS)) { \
91 switch (sizeof(*(ptr))) { \
92 case 1: __get_kernel_asm("ldb",ptr); break; \
93 case 2: __get_kernel_asm("ldh",ptr); break; \
94 case 4: __get_kernel_asm("ldw",ptr); break; \
95 case 8: LDD_KERNEL(ptr); break; \
96 default: __get_kernel_bad(); break; \
97 } \
98 } \
99 else { \
100 switch (sizeof(*(ptr))) { \
101 case 1: __get_user_asm("ldb",ptr); break; \
102 case 2: __get_user_asm("ldh",ptr); break; \
103 case 4: __get_user_asm("ldw",ptr); break; \
104 case 8: LDD_USER(ptr); break; \
105 default: __get_user_bad(); break; \
106 } \
107 } \
108 \
109 (x) = (__typeof__(*(ptr))) __gu_val; \
110 __gu_err; \
111})
112
113#define __get_kernel_asm(ldx,ptr) \
114 __asm__("\n1:\t" ldx "\t0(%2),%0\n\t" \
115 ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_get_user_skip_1)\
116 : "=r"(__gu_val), "=r"(__gu_err) \
117 : "r"(ptr), "1"(__gu_err) \
118 : "r1");
119
120#define __get_user_asm(ldx,ptr) \
121 __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n\t" \
122 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_get_user_skip_1)\
123 : "=r"(__gu_val), "=r"(__gu_err) \
124 : "r"(ptr), "1"(__gu_err) \
125 : "r1");
126
127#define __put_user(x,ptr) \
128({ \
129 register long __pu_err __asm__ ("r8") = 0; \
130 __typeof__(*(ptr)) __x = (__typeof__(*(ptr)))(x); \
131 \
132 if (segment_eq(get_fs(),KERNEL_DS)) { \
133 switch (sizeof(*(ptr))) { \
134 case 1: __put_kernel_asm("stb",__x,ptr); break; \
135 case 2: __put_kernel_asm("sth",__x,ptr); break; \
136 case 4: __put_kernel_asm("stw",__x,ptr); break; \
137 case 8: STD_KERNEL(__x,ptr); break; \
138 default: __put_kernel_bad(); break; \
139 } \
140 } \
141 else { \
142 switch (sizeof(*(ptr))) { \
143 case 1: __put_user_asm("stb",__x,ptr); break; \
144 case 2: __put_user_asm("sth",__x,ptr); break; \
145 case 4: __put_user_asm("stw",__x,ptr); break; \
146 case 8: STD_USER(__x,ptr); break; \
147 default: __put_user_bad(); break; \
148 } \
149 } \
150 \
151 __pu_err; \
152})
153
154/*
155 * The "__put_user/kernel_asm()" macros tell gcc they read from memory
156 * instead of writing. This is because they do not write to any memory
157 * gcc knows about, so there are no aliasing issues. These macros must
158 * also be aware that "fixup_put_user_skip_[12]" are executed in the
159 * context of the fault, and any registers used there must be listed
160 * as clobbers. In this case only "r1" is used by the current routines.
161 * r8/r9 are already listed as err/val.
162 */
163
164#define __put_kernel_asm(stx,x,ptr) \
165 __asm__ __volatile__ ( \
166 "\n1:\t" stx "\t%2,0(%1)\n\t" \
167 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
168 : "=r"(__pu_err) \
169 : "r"(ptr), "r"(x), "0"(__pu_err) \
170 : "r1")
171
172#define __put_user_asm(stx,x,ptr) \
173 __asm__ __volatile__ ( \
174 "\n1:\t" stx "\t%2,0(%%sr3,%1)\n\t" \
175 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
176 : "=r"(__pu_err) \
177 : "r"(ptr), "r"(x), "0"(__pu_err) \
178 : "r1")
179
180
181#if !defined(CONFIG_64BIT)
182
183#define __put_kernel_asm64(__val,ptr) do { \
184 u64 __val64 = (u64)(__val); \
185 u32 hi = (__val64) >> 32; \
186 u32 lo = (__val64) & 0xffffffff; \
187 __asm__ __volatile__ ( \
188 "\n1:\tstw %2,0(%1)" \
189 "\n2:\tstw %3,4(%1)\n\t" \
190 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
191 ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
192 : "=r"(__pu_err) \
193 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
194 : "r1"); \
195} while (0)
196
197#define __put_user_asm64(__val,ptr) do { \
198 u64 __val64 = (u64)(__val); \
199 u32 hi = (__val64) >> 32; \
200 u32 lo = (__val64) & 0xffffffff; \
201 __asm__ __volatile__ ( \
202 "\n1:\tstw %2,0(%%sr3,%1)" \
203 "\n2:\tstw %3,4(%%sr3,%1)\n\t" \
204 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
205 ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
206 : "=r"(__pu_err) \
207 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
208 : "r1"); \
209} while (0)
210
211#endif /* !defined(CONFIG_64BIT) */
212
213
214/*
215 * Complex access routines -- external declarations
216 */
217
218extern unsigned long lcopy_to_user(void __user *, const void *, unsigned long);
219extern unsigned long lcopy_from_user(void *, const void __user *, unsigned long);
220extern unsigned long lcopy_in_user(void __user *, const void __user *, unsigned long);
221extern long lstrncpy_from_user(char *, const char __user *, long);
222extern unsigned lclear_user(void __user *,unsigned long);
223extern long lstrnlen_user(const char __user *,long);
224
225/*
226 * Complex access routines -- macros
227 */
228
229#define strncpy_from_user lstrncpy_from_user
230#define strnlen_user lstrnlen_user
231#define strlen_user(str) lstrnlen_user(str, 0x7fffffffL)
232#define clear_user lclear_user
233#define __clear_user lclear_user
234
235unsigned long copy_to_user(void __user *dst, const void *src, unsigned long len);
236#define __copy_to_user copy_to_user
237unsigned long copy_from_user(void *dst, const void __user *src, unsigned long len);
238#define __copy_from_user copy_from_user
239unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned long len);
240#define __copy_in_user copy_in_user
241#define __copy_to_user_inatomic __copy_to_user
242#define __copy_from_user_inatomic __copy_from_user
243
244#endif /* __PARISC_UACCESS_H */
diff --git a/include/asm-parisc/ucontext.h b/include/asm-parisc/ucontext.h
deleted file mode 100644
index 6c8883e4b0bd..000000000000
--- a/include/asm-parisc/ucontext.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef _ASM_PARISC_UCONTEXT_H
2#define _ASM_PARISC_UCONTEXT_H
3
4struct ucontext {
5 unsigned int uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif /* !_ASM_PARISC_UCONTEXT_H */
diff --git a/include/asm-parisc/unaligned.h b/include/asm-parisc/unaligned.h
deleted file mode 100644
index dfc5d3321a54..000000000000
--- a/include/asm-parisc/unaligned.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _ASM_PARISC_UNALIGNED_H
2#define _ASM_PARISC_UNALIGNED_H
3
4#include <linux/unaligned/be_struct.h>
5#include <linux/unaligned/le_byteshift.h>
6#include <linux/unaligned/generic.h>
7#define get_unaligned __get_unaligned_be
8#define put_unaligned __put_unaligned_be
9
10#ifdef __KERNEL__
11struct pt_regs;
12void handle_unaligned(struct pt_regs *regs);
13int check_unaligned(struct pt_regs *regs);
14#endif
15
16#endif /* _ASM_PARISC_UNALIGNED_H */
diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h
deleted file mode 100644
index a7d857f0e4f4..000000000000
--- a/include/asm-parisc/unistd.h
+++ /dev/null
@@ -1,991 +0,0 @@
1#ifndef _ASM_PARISC_UNISTD_H_
2#define _ASM_PARISC_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 */
7
8/*
9 * HP-UX system calls get their native numbers for binary compatibility.
10 */
11
12#define __NR_HPUX_exit 1
13#define __NR_HPUX_fork 2
14#define __NR_HPUX_read 3
15#define __NR_HPUX_write 4
16#define __NR_HPUX_open 5
17#define __NR_HPUX_close 6
18#define __NR_HPUX_wait 7
19#define __NR_HPUX_creat 8
20#define __NR_HPUX_link 9
21#define __NR_HPUX_unlink 10
22#define __NR_HPUX_execv 11
23#define __NR_HPUX_chdir 12
24#define __NR_HPUX_time 13
25#define __NR_HPUX_mknod 14
26#define __NR_HPUX_chmod 15
27#define __NR_HPUX_chown 16
28#define __NR_HPUX_break 17
29#define __NR_HPUX_lchmod 18
30#define __NR_HPUX_lseek 19
31#define __NR_HPUX_getpid 20
32#define __NR_HPUX_mount 21
33#define __NR_HPUX_umount 22
34#define __NR_HPUX_setuid 23
35#define __NR_HPUX_getuid 24
36#define __NR_HPUX_stime 25
37#define __NR_HPUX_ptrace 26
38#define __NR_HPUX_alarm 27
39#define __NR_HPUX_oldfstat 28
40#define __NR_HPUX_pause 29
41#define __NR_HPUX_utime 30
42#define __NR_HPUX_stty 31
43#define __NR_HPUX_gtty 32
44#define __NR_HPUX_access 33
45#define __NR_HPUX_nice 34
46#define __NR_HPUX_ftime 35
47#define __NR_HPUX_sync 36
48#define __NR_HPUX_kill 37
49#define __NR_HPUX_stat 38
50#define __NR_HPUX_setpgrp3 39
51#define __NR_HPUX_lstat 40
52#define __NR_HPUX_dup 41
53#define __NR_HPUX_pipe 42
54#define __NR_HPUX_times 43
55#define __NR_HPUX_profil 44
56#define __NR_HPUX_ki_call 45
57#define __NR_HPUX_setgid 46
58#define __NR_HPUX_getgid 47
59#define __NR_HPUX_sigsys 48
60#define __NR_HPUX_reserved1 49
61#define __NR_HPUX_reserved2 50
62#define __NR_HPUX_acct 51
63#define __NR_HPUX_set_userthreadid 52
64#define __NR_HPUX_oldlock 53
65#define __NR_HPUX_ioctl 54
66#define __NR_HPUX_reboot 55
67#define __NR_HPUX_symlink 56
68#define __NR_HPUX_utssys 57
69#define __NR_HPUX_readlink 58
70#define __NR_HPUX_execve 59
71#define __NR_HPUX_umask 60
72#define __NR_HPUX_chroot 61
73#define __NR_HPUX_fcntl 62
74#define __NR_HPUX_ulimit 63
75#define __NR_HPUX_getpagesize 64
76#define __NR_HPUX_mremap 65
77#define __NR_HPUX_vfork 66
78#define __NR_HPUX_vread 67
79#define __NR_HPUX_vwrite 68
80#define __NR_HPUX_sbrk 69
81#define __NR_HPUX_sstk 70
82#define __NR_HPUX_mmap 71
83#define __NR_HPUX_vadvise 72
84#define __NR_HPUX_munmap 73
85#define __NR_HPUX_mprotect 74
86#define __NR_HPUX_madvise 75
87#define __NR_HPUX_vhangup 76
88#define __NR_HPUX_swapoff 77
89#define __NR_HPUX_mincore 78
90#define __NR_HPUX_getgroups 79
91#define __NR_HPUX_setgroups 80
92#define __NR_HPUX_getpgrp2 81
93#define __NR_HPUX_setpgrp2 82
94#define __NR_HPUX_setitimer 83
95#define __NR_HPUX_wait3 84
96#define __NR_HPUX_swapon 85
97#define __NR_HPUX_getitimer 86
98#define __NR_HPUX_gethostname42 87
99#define __NR_HPUX_sethostname42 88
100#define __NR_HPUX_getdtablesize 89
101#define __NR_HPUX_dup2 90
102#define __NR_HPUX_getdopt 91
103#define __NR_HPUX_fstat 92
104#define __NR_HPUX_select 93
105#define __NR_HPUX_setdopt 94
106#define __NR_HPUX_fsync 95
107#define __NR_HPUX_setpriority 96
108#define __NR_HPUX_socket_old 97
109#define __NR_HPUX_connect_old 98
110#define __NR_HPUX_accept_old 99
111#define __NR_HPUX_getpriority 100
112#define __NR_HPUX_send_old 101
113#define __NR_HPUX_recv_old 102
114#define __NR_HPUX_socketaddr_old 103
115#define __NR_HPUX_bind_old 104
116#define __NR_HPUX_setsockopt_old 105
117#define __NR_HPUX_listen_old 106
118#define __NR_HPUX_vtimes_old 107
119#define __NR_HPUX_sigvector 108
120#define __NR_HPUX_sigblock 109
121#define __NR_HPUX_siggetmask 110
122#define __NR_HPUX_sigpause 111
123#define __NR_HPUX_sigstack 112
124#define __NR_HPUX_recvmsg_old 113
125#define __NR_HPUX_sendmsg_old 114
126#define __NR_HPUX_vtrace_old 115
127#define __NR_HPUX_gettimeofday 116
128#define __NR_HPUX_getrusage 117
129#define __NR_HPUX_getsockopt_old 118
130#define __NR_HPUX_resuba_old 119
131#define __NR_HPUX_readv 120
132#define __NR_HPUX_writev 121
133#define __NR_HPUX_settimeofday 122
134#define __NR_HPUX_fchown 123
135#define __NR_HPUX_fchmod 124
136#define __NR_HPUX_recvfrom_old 125
137#define __NR_HPUX_setresuid 126
138#define __NR_HPUX_setresgid 127
139#define __NR_HPUX_rename 128
140#define __NR_HPUX_truncate 129
141#define __NR_HPUX_ftruncate 130
142#define __NR_HPUX_flock_old 131
143#define __NR_HPUX_sysconf 132
144#define __NR_HPUX_sendto_old 133
145#define __NR_HPUX_shutdown_old 134
146#define __NR_HPUX_socketpair_old 135
147#define __NR_HPUX_mkdir 136
148#define __NR_HPUX_rmdir 137
149#define __NR_HPUX_utimes_old 138
150#define __NR_HPUX_sigcleanup_old 139
151#define __NR_HPUX_setcore 140
152#define __NR_HPUX_getpeername_old 141
153#define __NR_HPUX_gethostid 142
154#define __NR_HPUX_sethostid 143
155#define __NR_HPUX_getrlimit 144
156#define __NR_HPUX_setrlimit 145
157#define __NR_HPUX_killpg_old 146
158#define __NR_HPUX_cachectl 147
159#define __NR_HPUX_quotactl 148
160#define __NR_HPUX_get_sysinfo 149
161#define __NR_HPUX_getsockname_old 150
162#define __NR_HPUX_privgrp 151
163#define __NR_HPUX_rtprio 152
164#define __NR_HPUX_plock 153
165#define __NR_HPUX_reserved3 154
166#define __NR_HPUX_lockf 155
167#define __NR_HPUX_semget 156
168#define __NR_HPUX_osemctl 157
169#define __NR_HPUX_semop 158
170#define __NR_HPUX_msgget 159
171#define __NR_HPUX_omsgctl 160
172#define __NR_HPUX_msgsnd 161
173#define __NR_HPUX_msgrecv 162
174#define __NR_HPUX_shmget 163
175#define __NR_HPUX_oshmctl 164
176#define __NR_HPUX_shmat 165
177#define __NR_HPUX_shmdt 166
178#define __NR_HPUX_m68020_advise 167
179/* [168,189] are for Discless/DUX */
180#define __NR_HPUX_csp 168
181#define __NR_HPUX_cluster 169
182#define __NR_HPUX_mkrnod 170
183#define __NR_HPUX_test 171
184#define __NR_HPUX_unsp_open 172
185#define __NR_HPUX_reserved4 173
186#define __NR_HPUX_getcontext_old 174
187#define __NR_HPUX_osetcontext 175
188#define __NR_HPUX_bigio 176
189#define __NR_HPUX_pipenode 177
190#define __NR_HPUX_lsync 178
191#define __NR_HPUX_getmachineid 179
192#define __NR_HPUX_cnodeid 180
193#define __NR_HPUX_cnodes 181
194#define __NR_HPUX_swapclients 182
195#define __NR_HPUX_rmt_process 183
196#define __NR_HPUX_dskless_stats 184
197#define __NR_HPUX_sigprocmask 185
198#define __NR_HPUX_sigpending 186
199#define __NR_HPUX_sigsuspend 187
200#define __NR_HPUX_sigaction 188
201#define __NR_HPUX_reserved5 189
202#define __NR_HPUX_nfssvc 190
203#define __NR_HPUX_getfh 191
204#define __NR_HPUX_getdomainname 192
205#define __NR_HPUX_setdomainname 193
206#define __NR_HPUX_async_daemon 194
207#define __NR_HPUX_getdirentries 195
208#define __NR_HPUX_statfs 196
209#define __NR_HPUX_fstatfs 197
210#define __NR_HPUX_vfsmount 198
211#define __NR_HPUX_reserved6 199
212#define __NR_HPUX_waitpid 200
213/* 201 - 223 missing */
214#define __NR_HPUX_sigsetreturn 224
215#define __NR_HPUX_sigsetstatemask 225
216/* 226 missing */
217#define __NR_HPUX_cs 227
218#define __NR_HPUX_cds 228
219#define __NR_HPUX_set_no_trunc 229
220#define __NR_HPUX_pathconf 230
221#define __NR_HPUX_fpathconf 231
222/* 232, 233 missing */
223#define __NR_HPUX_nfs_fcntl 234
224#define __NR_HPUX_ogetacl 235
225#define __NR_HPUX_ofgetacl 236
226#define __NR_HPUX_osetacl 237
227#define __NR_HPUX_ofsetacl 238
228#define __NR_HPUX_pstat 239
229#define __NR_HPUX_getaudid 240
230#define __NR_HPUX_setaudid 241
231#define __NR_HPUX_getaudproc 242
232#define __NR_HPUX_setaudproc 243
233#define __NR_HPUX_getevent 244
234#define __NR_HPUX_setevent 245
235#define __NR_HPUX_audwrite 246
236#define __NR_HPUX_audswitch 247
237#define __NR_HPUX_audctl 248
238#define __NR_HPUX_ogetaccess 249
239#define __NR_HPUX_fsctl 250
240/* 251 - 258 missing */
241#define __NR_HPUX_swapfs 259
242#define __NR_HPUX_fss 260
243/* 261 - 266 missing */
244#define __NR_HPUX_tsync 267
245#define __NR_HPUX_getnumfds 268
246#define __NR_HPUX_poll 269
247#define __NR_HPUX_getmsg 270
248#define __NR_HPUX_putmsg 271
249#define __NR_HPUX_fchdir 272
250#define __NR_HPUX_getmount_cnt 273
251#define __NR_HPUX_getmount_entry 274
252#define __NR_HPUX_accept 275
253#define __NR_HPUX_bind 276
254#define __NR_HPUX_connect 277
255#define __NR_HPUX_getpeername 278
256#define __NR_HPUX_getsockname 279
257#define __NR_HPUX_getsockopt 280
258#define __NR_HPUX_listen 281
259#define __NR_HPUX_recv 282
260#define __NR_HPUX_recvfrom 283
261#define __NR_HPUX_recvmsg 284
262#define __NR_HPUX_send 285
263#define __NR_HPUX_sendmsg 286
264#define __NR_HPUX_sendto 287
265#define __NR_HPUX_setsockopt 288
266#define __NR_HPUX_shutdown 289
267#define __NR_HPUX_socket 290
268#define __NR_HPUX_socketpair 291
269#define __NR_HPUX_proc_open 292
270#define __NR_HPUX_proc_close 293
271#define __NR_HPUX_proc_send 294
272#define __NR_HPUX_proc_recv 295
273#define __NR_HPUX_proc_sendrecv 296
274#define __NR_HPUX_proc_syscall 297
275/* 298 - 311 missing */
276#define __NR_HPUX_semctl 312
277#define __NR_HPUX_msgctl 313
278#define __NR_HPUX_shmctl 314
279#define __NR_HPUX_mpctl 315
280#define __NR_HPUX_exportfs 316
281#define __NR_HPUX_getpmsg 317
282#define __NR_HPUX_putpmsg 318
283/* 319 missing */
284#define __NR_HPUX_msync 320
285#define __NR_HPUX_msleep 321
286#define __NR_HPUX_mwakeup 322
287#define __NR_HPUX_msem_init 323
288#define __NR_HPUX_msem_remove 324
289#define __NR_HPUX_adjtime 325
290#define __NR_HPUX_kload 326
291#define __NR_HPUX_fattach 327
292#define __NR_HPUX_fdetach 328
293#define __NR_HPUX_serialize 329
294#define __NR_HPUX_statvfs 330
295#define __NR_HPUX_fstatvfs 331
296#define __NR_HPUX_lchown 332
297#define __NR_HPUX_getsid 333
298#define __NR_HPUX_sysfs 334
299/* 335, 336 missing */
300#define __NR_HPUX_sched_setparam 337
301#define __NR_HPUX_sched_getparam 338
302#define __NR_HPUX_sched_setscheduler 339
303#define __NR_HPUX_sched_getscheduler 340
304#define __NR_HPUX_sched_yield 341
305#define __NR_HPUX_sched_get_priority_max 342
306#define __NR_HPUX_sched_get_priority_min 343
307#define __NR_HPUX_sched_rr_get_interval 344
308#define __NR_HPUX_clock_settime 345
309#define __NR_HPUX_clock_gettime 346
310#define __NR_HPUX_clock_getres 347
311#define __NR_HPUX_timer_create 348
312#define __NR_HPUX_timer_delete 349
313#define __NR_HPUX_timer_settime 350
314#define __NR_HPUX_timer_gettime 351
315#define __NR_HPUX_timer_getoverrun 352
316#define __NR_HPUX_nanosleep 353
317#define __NR_HPUX_toolbox 354
318/* 355 missing */
319#define __NR_HPUX_getdents 356
320#define __NR_HPUX_getcontext 357
321#define __NR_HPUX_sysinfo 358
322#define __NR_HPUX_fcntl64 359
323#define __NR_HPUX_ftruncate64 360
324#define __NR_HPUX_fstat64 361
325#define __NR_HPUX_getdirentries64 362
326#define __NR_HPUX_getrlimit64 363
327#define __NR_HPUX_lockf64 364
328#define __NR_HPUX_lseek64 365
329#define __NR_HPUX_lstat64 366
330#define __NR_HPUX_mmap64 367
331#define __NR_HPUX_setrlimit64 368
332#define __NR_HPUX_stat64 369
333#define __NR_HPUX_truncate64 370
334#define __NR_HPUX_ulimit64 371
335#define __NR_HPUX_pread 372
336#define __NR_HPUX_preadv 373
337#define __NR_HPUX_pwrite 374
338#define __NR_HPUX_pwritev 375
339#define __NR_HPUX_pread64 376
340#define __NR_HPUX_preadv64 377
341#define __NR_HPUX_pwrite64 378
342#define __NR_HPUX_pwritev64 379
343#define __NR_HPUX_setcontext 380
344#define __NR_HPUX_sigaltstack 381
345#define __NR_HPUX_waitid 382
346#define __NR_HPUX_setpgrp 383
347#define __NR_HPUX_recvmsg2 384
348#define __NR_HPUX_sendmsg2 385
349#define __NR_HPUX_socket2 386
350#define __NR_HPUX_socketpair2 387
351#define __NR_HPUX_setregid 388
352#define __NR_HPUX_lwp_create 389
353#define __NR_HPUX_lwp_terminate 390
354#define __NR_HPUX_lwp_wait 391
355#define __NR_HPUX_lwp_suspend 392
356#define __NR_HPUX_lwp_resume 393
357/* 394 missing */
358#define __NR_HPUX_lwp_abort_syscall 395
359#define __NR_HPUX_lwp_info 396
360#define __NR_HPUX_lwp_kill 397
361#define __NR_HPUX_ksleep 398
362#define __NR_HPUX_kwakeup 399
363/* 400 missing */
364#define __NR_HPUX_pstat_getlwp 401
365#define __NR_HPUX_lwp_exit 402
366#define __NR_HPUX_lwp_continue 403
367#define __NR_HPUX_getacl 404
368#define __NR_HPUX_fgetacl 405
369#define __NR_HPUX_setacl 406
370#define __NR_HPUX_fsetacl 407
371#define __NR_HPUX_getaccess 408
372#define __NR_HPUX_lwp_mutex_init 409
373#define __NR_HPUX_lwp_mutex_lock_sys 410
374#define __NR_HPUX_lwp_mutex_unlock 411
375#define __NR_HPUX_lwp_cond_init 412
376#define __NR_HPUX_lwp_cond_signal 413
377#define __NR_HPUX_lwp_cond_broadcast 414
378#define __NR_HPUX_lwp_cond_wait_sys 415
379#define __NR_HPUX_lwp_getscheduler 416
380#define __NR_HPUX_lwp_setscheduler 417
381#define __NR_HPUX_lwp_getstate 418
382#define __NR_HPUX_lwp_setstate 419
383#define __NR_HPUX_lwp_detach 420
384#define __NR_HPUX_mlock 421
385#define __NR_HPUX_munlock 422
386#define __NR_HPUX_mlockall 423
387#define __NR_HPUX_munlockall 424
388#define __NR_HPUX_shm_open 425
389#define __NR_HPUX_shm_unlink 426
390#define __NR_HPUX_sigqueue 427
391#define __NR_HPUX_sigwaitinfo 428
392#define __NR_HPUX_sigtimedwait 429
393#define __NR_HPUX_sigwait 430
394#define __NR_HPUX_aio_read 431
395#define __NR_HPUX_aio_write 432
396#define __NR_HPUX_lio_listio 433
397#define __NR_HPUX_aio_error 434
398#define __NR_HPUX_aio_return 435
399#define __NR_HPUX_aio_cancel 436
400#define __NR_HPUX_aio_suspend 437
401#define __NR_HPUX_aio_fsync 438
402#define __NR_HPUX_mq_open 439
403#define __NR_HPUX_mq_close 440
404#define __NR_HPUX_mq_unlink 441
405#define __NR_HPUX_mq_send 442
406#define __NR_HPUX_mq_receive 443
407#define __NR_HPUX_mq_notify 444
408#define __NR_HPUX_mq_setattr 445
409#define __NR_HPUX_mq_getattr 446
410#define __NR_HPUX_ksem_open 447
411#define __NR_HPUX_ksem_unlink 448
412#define __NR_HPUX_ksem_close 449
413#define __NR_HPUX_ksem_post 450
414#define __NR_HPUX_ksem_wait 451
415#define __NR_HPUX_ksem_read 452
416#define __NR_HPUX_ksem_trywait 453
417#define __NR_HPUX_lwp_rwlock_init 454
418#define __NR_HPUX_lwp_rwlock_destroy 455
419#define __NR_HPUX_lwp_rwlock_rdlock_sys 456
420#define __NR_HPUX_lwp_rwlock_wrlock_sys 457
421#define __NR_HPUX_lwp_rwlock_tryrdlock 458
422#define __NR_HPUX_lwp_rwlock_trywrlock 459
423#define __NR_HPUX_lwp_rwlock_unlock 460
424#define __NR_HPUX_ttrace 461
425#define __NR_HPUX_ttrace_wait 462
426#define __NR_HPUX_lf_wire_mem 463
427#define __NR_HPUX_lf_unwire_mem 464
428#define __NR_HPUX_lf_send_pin_map 465
429#define __NR_HPUX_lf_free_buf 466
430#define __NR_HPUX_lf_wait_nq 467
431#define __NR_HPUX_lf_wakeup_conn_q 468
432#define __NR_HPUX_lf_unused 469
433#define __NR_HPUX_lwp_sema_init 470
434#define __NR_HPUX_lwp_sema_post 471
435#define __NR_HPUX_lwp_sema_wait 472
436#define __NR_HPUX_lwp_sema_trywait 473
437#define __NR_HPUX_lwp_sema_destroy 474
438#define __NR_HPUX_statvfs64 475
439#define __NR_HPUX_fstatvfs64 476
440#define __NR_HPUX_msh_register 477
441#define __NR_HPUX_ptrace64 478
442#define __NR_HPUX_sendfile 479
443#define __NR_HPUX_sendpath 480
444#define __NR_HPUX_sendfile64 481
445#define __NR_HPUX_sendpath64 482
446#define __NR_HPUX_modload 483
447#define __NR_HPUX_moduload 484
448#define __NR_HPUX_modpath 485
449#define __NR_HPUX_getksym 486
450#define __NR_HPUX_modadm 487
451#define __NR_HPUX_modstat 488
452#define __NR_HPUX_lwp_detached_exit 489
453#define __NR_HPUX_crashconf 490
454#define __NR_HPUX_siginhibit 491
455#define __NR_HPUX_sigenable 492
456#define __NR_HPUX_spuctl 493
457#define __NR_HPUX_zerokernelsum 494
458#define __NR_HPUX_nfs_kstat 495
459#define __NR_HPUX_aio_read64 496
460#define __NR_HPUX_aio_write64 497
461#define __NR_HPUX_aio_error64 498
462#define __NR_HPUX_aio_return64 499
463#define __NR_HPUX_aio_cancel64 500
464#define __NR_HPUX_aio_suspend64 501
465#define __NR_HPUX_aio_fsync64 502
466#define __NR_HPUX_lio_listio64 503
467#define __NR_HPUX_recv2 504
468#define __NR_HPUX_recvfrom2 505
469#define __NR_HPUX_send2 506
470#define __NR_HPUX_sendto2 507
471#define __NR_HPUX_acl 508
472#define __NR_HPUX___cnx_p2p_ctl 509
473#define __NR_HPUX___cnx_gsched_ctl 510
474#define __NR_HPUX___cnx_pmon_ctl 511
475
476#define __NR_HPUX_syscalls 512
477
478/*
479 * Linux system call numbers.
480 *
481 * Cary Coutant says that we should just use another syscall gateway
482 * page to avoid clashing with the HPUX space, and I think he's right:
483 * it will would keep a branch out of our syscall entry path, at the
484 * very least. If we decide to change it later, we can ``just'' tweak
485 * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
486 * 1024 or something. Oh, and recompile libc. =)
487 *
488 * 64-bit HPUX binaries get the syscall gateway address passed in a register
489 * from the kernel at startup, which seems a sane strategy.
490 */
491
492#define __NR_Linux 0
493#define __NR_restart_syscall (__NR_Linux + 0)
494#define __NR_exit (__NR_Linux + 1)
495#define __NR_fork (__NR_Linux + 2)
496#define __NR_read (__NR_Linux + 3)
497#define __NR_write (__NR_Linux + 4)
498#define __NR_open (__NR_Linux + 5)
499#define __NR_close (__NR_Linux + 6)
500#define __NR_waitpid (__NR_Linux + 7)
501#define __NR_creat (__NR_Linux + 8)
502#define __NR_link (__NR_Linux + 9)
503#define __NR_unlink (__NR_Linux + 10)
504#define __NR_execve (__NR_Linux + 11)
505#define __NR_chdir (__NR_Linux + 12)
506#define __NR_time (__NR_Linux + 13)
507#define __NR_mknod (__NR_Linux + 14)
508#define __NR_chmod (__NR_Linux + 15)
509#define __NR_lchown (__NR_Linux + 16)
510#define __NR_socket (__NR_Linux + 17)
511#define __NR_stat (__NR_Linux + 18)
512#define __NR_lseek (__NR_Linux + 19)
513#define __NR_getpid (__NR_Linux + 20)
514#define __NR_mount (__NR_Linux + 21)
515#define __NR_bind (__NR_Linux + 22)
516#define __NR_setuid (__NR_Linux + 23)
517#define __NR_getuid (__NR_Linux + 24)
518#define __NR_stime (__NR_Linux + 25)
519#define __NR_ptrace (__NR_Linux + 26)
520#define __NR_alarm (__NR_Linux + 27)
521#define __NR_fstat (__NR_Linux + 28)
522#define __NR_pause (__NR_Linux + 29)
523#define __NR_utime (__NR_Linux + 30)
524#define __NR_connect (__NR_Linux + 31)
525#define __NR_listen (__NR_Linux + 32)
526#define __NR_access (__NR_Linux + 33)
527#define __NR_nice (__NR_Linux + 34)
528#define __NR_accept (__NR_Linux + 35)
529#define __NR_sync (__NR_Linux + 36)
530#define __NR_kill (__NR_Linux + 37)
531#define __NR_rename (__NR_Linux + 38)
532#define __NR_mkdir (__NR_Linux + 39)
533#define __NR_rmdir (__NR_Linux + 40)
534#define __NR_dup (__NR_Linux + 41)
535#define __NR_pipe (__NR_Linux + 42)
536#define __NR_times (__NR_Linux + 43)
537#define __NR_getsockname (__NR_Linux + 44)
538#define __NR_brk (__NR_Linux + 45)
539#define __NR_setgid (__NR_Linux + 46)
540#define __NR_getgid (__NR_Linux + 47)
541#define __NR_signal (__NR_Linux + 48)
542#define __NR_geteuid (__NR_Linux + 49)
543#define __NR_getegid (__NR_Linux + 50)
544#define __NR_acct (__NR_Linux + 51)
545#define __NR_umount2 (__NR_Linux + 52)
546#define __NR_getpeername (__NR_Linux + 53)
547#define __NR_ioctl (__NR_Linux + 54)
548#define __NR_fcntl (__NR_Linux + 55)
549#define __NR_socketpair (__NR_Linux + 56)
550#define __NR_setpgid (__NR_Linux + 57)
551#define __NR_send (__NR_Linux + 58)
552#define __NR_uname (__NR_Linux + 59)
553#define __NR_umask (__NR_Linux + 60)
554#define __NR_chroot (__NR_Linux + 61)
555#define __NR_ustat (__NR_Linux + 62)
556#define __NR_dup2 (__NR_Linux + 63)
557#define __NR_getppid (__NR_Linux + 64)
558#define __NR_getpgrp (__NR_Linux + 65)
559#define __NR_setsid (__NR_Linux + 66)
560#define __NR_pivot_root (__NR_Linux + 67)
561#define __NR_sgetmask (__NR_Linux + 68)
562#define __NR_ssetmask (__NR_Linux + 69)
563#define __NR_setreuid (__NR_Linux + 70)
564#define __NR_setregid (__NR_Linux + 71)
565#define __NR_mincore (__NR_Linux + 72)
566#define __NR_sigpending (__NR_Linux + 73)
567#define __NR_sethostname (__NR_Linux + 74)
568#define __NR_setrlimit (__NR_Linux + 75)
569#define __NR_getrlimit (__NR_Linux + 76)
570#define __NR_getrusage (__NR_Linux + 77)
571#define __NR_gettimeofday (__NR_Linux + 78)
572#define __NR_settimeofday (__NR_Linux + 79)
573#define __NR_getgroups (__NR_Linux + 80)
574#define __NR_setgroups (__NR_Linux + 81)
575#define __NR_sendto (__NR_Linux + 82)
576#define __NR_symlink (__NR_Linux + 83)
577#define __NR_lstat (__NR_Linux + 84)
578#define __NR_readlink (__NR_Linux + 85)
579#define __NR_uselib (__NR_Linux + 86)
580#define __NR_swapon (__NR_Linux + 87)
581#define __NR_reboot (__NR_Linux + 88)
582#define __NR_mmap2 (__NR_Linux + 89)
583#define __NR_mmap (__NR_Linux + 90)
584#define __NR_munmap (__NR_Linux + 91)
585#define __NR_truncate (__NR_Linux + 92)
586#define __NR_ftruncate (__NR_Linux + 93)
587#define __NR_fchmod (__NR_Linux + 94)
588#define __NR_fchown (__NR_Linux + 95)
589#define __NR_getpriority (__NR_Linux + 96)
590#define __NR_setpriority (__NR_Linux + 97)
591#define __NR_recv (__NR_Linux + 98)
592#define __NR_statfs (__NR_Linux + 99)
593#define __NR_fstatfs (__NR_Linux + 100)
594#define __NR_stat64 (__NR_Linux + 101)
595/* #define __NR_socketcall (__NR_Linux + 102) */
596#define __NR_syslog (__NR_Linux + 103)
597#define __NR_setitimer (__NR_Linux + 104)
598#define __NR_getitimer (__NR_Linux + 105)
599#define __NR_capget (__NR_Linux + 106)
600#define __NR_capset (__NR_Linux + 107)
601#define __NR_pread64 (__NR_Linux + 108)
602#define __NR_pwrite64 (__NR_Linux + 109)
603#define __NR_getcwd (__NR_Linux + 110)
604#define __NR_vhangup (__NR_Linux + 111)
605#define __NR_fstat64 (__NR_Linux + 112)
606#define __NR_vfork (__NR_Linux + 113)
607#define __NR_wait4 (__NR_Linux + 114)
608#define __NR_swapoff (__NR_Linux + 115)
609#define __NR_sysinfo (__NR_Linux + 116)
610#define __NR_shutdown (__NR_Linux + 117)
611#define __NR_fsync (__NR_Linux + 118)
612#define __NR_madvise (__NR_Linux + 119)
613#define __NR_clone (__NR_Linux + 120)
614#define __NR_setdomainname (__NR_Linux + 121)
615#define __NR_sendfile (__NR_Linux + 122)
616#define __NR_recvfrom (__NR_Linux + 123)
617#define __NR_adjtimex (__NR_Linux + 124)
618#define __NR_mprotect (__NR_Linux + 125)
619#define __NR_sigprocmask (__NR_Linux + 126)
620#define __NR_create_module (__NR_Linux + 127)
621#define __NR_init_module (__NR_Linux + 128)
622#define __NR_delete_module (__NR_Linux + 129)
623#define __NR_get_kernel_syms (__NR_Linux + 130)
624#define __NR_quotactl (__NR_Linux + 131)
625#define __NR_getpgid (__NR_Linux + 132)
626#define __NR_fchdir (__NR_Linux + 133)
627#define __NR_bdflush (__NR_Linux + 134)
628#define __NR_sysfs (__NR_Linux + 135)
629#define __NR_personality (__NR_Linux + 136)
630#define __NR_afs_syscall (__NR_Linux + 137) /* Syscall for Andrew File System */
631#define __NR_setfsuid (__NR_Linux + 138)
632#define __NR_setfsgid (__NR_Linux + 139)
633#define __NR__llseek (__NR_Linux + 140)
634#define __NR_getdents (__NR_Linux + 141)
635#define __NR__newselect (__NR_Linux + 142)
636#define __NR_flock (__NR_Linux + 143)
637#define __NR_msync (__NR_Linux + 144)
638#define __NR_readv (__NR_Linux + 145)
639#define __NR_writev (__NR_Linux + 146)
640#define __NR_getsid (__NR_Linux + 147)
641#define __NR_fdatasync (__NR_Linux + 148)
642#define __NR__sysctl (__NR_Linux + 149)
643#define __NR_mlock (__NR_Linux + 150)
644#define __NR_munlock (__NR_Linux + 151)
645#define __NR_mlockall (__NR_Linux + 152)
646#define __NR_munlockall (__NR_Linux + 153)
647#define __NR_sched_setparam (__NR_Linux + 154)
648#define __NR_sched_getparam (__NR_Linux + 155)
649#define __NR_sched_setscheduler (__NR_Linux + 156)
650#define __NR_sched_getscheduler (__NR_Linux + 157)
651#define __NR_sched_yield (__NR_Linux + 158)
652#define __NR_sched_get_priority_max (__NR_Linux + 159)
653#define __NR_sched_get_priority_min (__NR_Linux + 160)
654#define __NR_sched_rr_get_interval (__NR_Linux + 161)
655#define __NR_nanosleep (__NR_Linux + 162)
656#define __NR_mremap (__NR_Linux + 163)
657#define __NR_setresuid (__NR_Linux + 164)
658#define __NR_getresuid (__NR_Linux + 165)
659#define __NR_sigaltstack (__NR_Linux + 166)
660#define __NR_query_module (__NR_Linux + 167)
661#define __NR_poll (__NR_Linux + 168)
662#define __NR_nfsservctl (__NR_Linux + 169)
663#define __NR_setresgid (__NR_Linux + 170)
664#define __NR_getresgid (__NR_Linux + 171)
665#define __NR_prctl (__NR_Linux + 172)
666#define __NR_rt_sigreturn (__NR_Linux + 173)
667#define __NR_rt_sigaction (__NR_Linux + 174)
668#define __NR_rt_sigprocmask (__NR_Linux + 175)
669#define __NR_rt_sigpending (__NR_Linux + 176)
670#define __NR_rt_sigtimedwait (__NR_Linux + 177)
671#define __NR_rt_sigqueueinfo (__NR_Linux + 178)
672#define __NR_rt_sigsuspend (__NR_Linux + 179)
673#define __NR_chown (__NR_Linux + 180)
674#define __NR_setsockopt (__NR_Linux + 181)
675#define __NR_getsockopt (__NR_Linux + 182)
676#define __NR_sendmsg (__NR_Linux + 183)
677#define __NR_recvmsg (__NR_Linux + 184)
678#define __NR_semop (__NR_Linux + 185)
679#define __NR_semget (__NR_Linux + 186)
680#define __NR_semctl (__NR_Linux + 187)
681#define __NR_msgsnd (__NR_Linux + 188)
682#define __NR_msgrcv (__NR_Linux + 189)
683#define __NR_msgget (__NR_Linux + 190)
684#define __NR_msgctl (__NR_Linux + 191)
685#define __NR_shmat (__NR_Linux + 192)
686#define __NR_shmdt (__NR_Linux + 193)
687#define __NR_shmget (__NR_Linux + 194)
688#define __NR_shmctl (__NR_Linux + 195)
689
690#define __NR_getpmsg (__NR_Linux + 196) /* Somebody *wants* streams? */
691#define __NR_putpmsg (__NR_Linux + 197)
692
693#define __NR_lstat64 (__NR_Linux + 198)
694#define __NR_truncate64 (__NR_Linux + 199)
695#define __NR_ftruncate64 (__NR_Linux + 200)
696#define __NR_getdents64 (__NR_Linux + 201)
697#define __NR_fcntl64 (__NR_Linux + 202)
698#define __NR_attrctl (__NR_Linux + 203)
699#define __NR_acl_get (__NR_Linux + 204)
700#define __NR_acl_set (__NR_Linux + 205)
701#define __NR_gettid (__NR_Linux + 206)
702#define __NR_readahead (__NR_Linux + 207)
703#define __NR_tkill (__NR_Linux + 208)
704#define __NR_sendfile64 (__NR_Linux + 209)
705#define __NR_futex (__NR_Linux + 210)
706#define __NR_sched_setaffinity (__NR_Linux + 211)
707#define __NR_sched_getaffinity (__NR_Linux + 212)
708#define __NR_set_thread_area (__NR_Linux + 213)
709#define __NR_get_thread_area (__NR_Linux + 214)
710#define __NR_io_setup (__NR_Linux + 215)
711#define __NR_io_destroy (__NR_Linux + 216)
712#define __NR_io_getevents (__NR_Linux + 217)
713#define __NR_io_submit (__NR_Linux + 218)
714#define __NR_io_cancel (__NR_Linux + 219)
715#define __NR_alloc_hugepages (__NR_Linux + 220)
716#define __NR_free_hugepages (__NR_Linux + 221)
717#define __NR_exit_group (__NR_Linux + 222)
718#define __NR_lookup_dcookie (__NR_Linux + 223)
719#define __NR_epoll_create (__NR_Linux + 224)
720#define __NR_epoll_ctl (__NR_Linux + 225)
721#define __NR_epoll_wait (__NR_Linux + 226)
722#define __NR_remap_file_pages (__NR_Linux + 227)
723#define __NR_semtimedop (__NR_Linux + 228)
724#define __NR_mq_open (__NR_Linux + 229)
725#define __NR_mq_unlink (__NR_Linux + 230)
726#define __NR_mq_timedsend (__NR_Linux + 231)
727#define __NR_mq_timedreceive (__NR_Linux + 232)
728#define __NR_mq_notify (__NR_Linux + 233)
729#define __NR_mq_getsetattr (__NR_Linux + 234)
730#define __NR_waitid (__NR_Linux + 235)
731#define __NR_fadvise64_64 (__NR_Linux + 236)
732#define __NR_set_tid_address (__NR_Linux + 237)
733#define __NR_setxattr (__NR_Linux + 238)
734#define __NR_lsetxattr (__NR_Linux + 239)
735#define __NR_fsetxattr (__NR_Linux + 240)
736#define __NR_getxattr (__NR_Linux + 241)
737#define __NR_lgetxattr (__NR_Linux + 242)
738#define __NR_fgetxattr (__NR_Linux + 243)
739#define __NR_listxattr (__NR_Linux + 244)
740#define __NR_llistxattr (__NR_Linux + 245)
741#define __NR_flistxattr (__NR_Linux + 246)
742#define __NR_removexattr (__NR_Linux + 247)
743#define __NR_lremovexattr (__NR_Linux + 248)
744#define __NR_fremovexattr (__NR_Linux + 249)
745#define __NR_timer_create (__NR_Linux + 250)
746#define __NR_timer_settime (__NR_Linux + 251)
747#define __NR_timer_gettime (__NR_Linux + 252)
748#define __NR_timer_getoverrun (__NR_Linux + 253)
749#define __NR_timer_delete (__NR_Linux + 254)
750#define __NR_clock_settime (__NR_Linux + 255)
751#define __NR_clock_gettime (__NR_Linux + 256)
752#define __NR_clock_getres (__NR_Linux + 257)
753#define __NR_clock_nanosleep (__NR_Linux + 258)
754#define __NR_tgkill (__NR_Linux + 259)
755#define __NR_mbind (__NR_Linux + 260)
756#define __NR_get_mempolicy (__NR_Linux + 261)
757#define __NR_set_mempolicy (__NR_Linux + 262)
758#define __NR_vserver (__NR_Linux + 263)
759#define __NR_add_key (__NR_Linux + 264)
760#define __NR_request_key (__NR_Linux + 265)
761#define __NR_keyctl (__NR_Linux + 266)
762#define __NR_ioprio_set (__NR_Linux + 267)
763#define __NR_ioprio_get (__NR_Linux + 268)
764#define __NR_inotify_init (__NR_Linux + 269)
765#define __NR_inotify_add_watch (__NR_Linux + 270)
766#define __NR_inotify_rm_watch (__NR_Linux + 271)
767#define __NR_migrate_pages (__NR_Linux + 272)
768#define __NR_pselect6 (__NR_Linux + 273)
769#define __NR_ppoll (__NR_Linux + 274)
770#define __NR_openat (__NR_Linux + 275)
771#define __NR_mkdirat (__NR_Linux + 276)
772#define __NR_mknodat (__NR_Linux + 277)
773#define __NR_fchownat (__NR_Linux + 278)
774#define __NR_futimesat (__NR_Linux + 279)
775#define __NR_fstatat64 (__NR_Linux + 280)
776#define __NR_unlinkat (__NR_Linux + 281)
777#define __NR_renameat (__NR_Linux + 282)
778#define __NR_linkat (__NR_Linux + 283)
779#define __NR_symlinkat (__NR_Linux + 284)
780#define __NR_readlinkat (__NR_Linux + 285)
781#define __NR_fchmodat (__NR_Linux + 286)
782#define __NR_faccessat (__NR_Linux + 287)
783#define __NR_unshare (__NR_Linux + 288)
784#define __NR_set_robust_list (__NR_Linux + 289)
785#define __NR_get_robust_list (__NR_Linux + 290)
786#define __NR_splice (__NR_Linux + 291)
787#define __NR_sync_file_range (__NR_Linux + 292)
788#define __NR_tee (__NR_Linux + 293)
789#define __NR_vmsplice (__NR_Linux + 294)
790#define __NR_move_pages (__NR_Linux + 295)
791#define __NR_getcpu (__NR_Linux + 296)
792#define __NR_epoll_pwait (__NR_Linux + 297)
793#define __NR_statfs64 (__NR_Linux + 298)
794#define __NR_fstatfs64 (__NR_Linux + 299)
795#define __NR_kexec_load (__NR_Linux + 300)
796#define __NR_utimensat (__NR_Linux + 301)
797#define __NR_signalfd (__NR_Linux + 302)
798#define __NR_timerfd (__NR_Linux + 303)
799#define __NR_eventfd (__NR_Linux + 304)
800#define __NR_fallocate (__NR_Linux + 305)
801#define __NR_timerfd_create (__NR_Linux + 306)
802#define __NR_timerfd_settime (__NR_Linux + 307)
803#define __NR_timerfd_gettime (__NR_Linux + 308)
804
805#define __NR_Linux_syscalls (__NR_timerfd_gettime + 1)
806
807
808#define __IGNORE_select /* newselect */
809#define __IGNORE_fadvise64 /* fadvise64_64 */
810#define __IGNORE_utimes /* utime */
811
812
813#define HPUX_GATEWAY_ADDR 0xC0000004
814#define LINUX_GATEWAY_ADDR 0x100
815
816#ifdef __KERNEL__
817#ifndef __ASSEMBLY__
818
819#define SYS_ify(syscall_name) __NR_##syscall_name
820
821#ifndef ASM_LINE_SEP
822# define ASM_LINE_SEP ;
823#endif
824
825/* Definition taken from glibc 2.3.3
826 * sysdeps/unix/sysv/linux/hppa/sysdep.h
827 */
828
829#ifdef PIC
830/* WARNING: CANNOT BE USED IN A NOP! */
831# define K_STW_ASM_PIC " copy %%r19, %%r4\n"
832# define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
833# define K_USING_GR4 "%r4",
834#else
835# define K_STW_ASM_PIC " \n"
836# define K_LDW_ASM_PIC " \n"
837# define K_USING_GR4
838#endif
839
840/* GCC has to be warned that a syscall may clobber all the ABI
841 registers listed as "caller-saves", see page 8, Table 2
842 in section 2.2.6 of the PA-RISC RUN-TIME architecture
843 document. However! r28 is the result and will conflict with
844 the clobber list so it is left out. Also the input arguments
845 registers r20 -> r26 will conflict with the list so they
846 are treated specially. Although r19 is clobbered by the syscall
847 we cannot say this because it would violate ABI, thus we say
848 r4 is clobbered and use that register to save/restore r19
849 across the syscall. */
850
851#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
852 "%r20", "%r29", "%r31"
853
854#undef K_INLINE_SYSCALL
855#define K_INLINE_SYSCALL(name, nr, args...) ({ \
856 long __sys_res; \
857 { \
858 register unsigned long __res __asm__("r28"); \
859 K_LOAD_ARGS_##nr(args) \
860 /* FIXME: HACK stw/ldw r19 around syscall */ \
861 __asm__ volatile( \
862 K_STW_ASM_PIC \
863 " ble 0x100(%%sr2, %%r0)\n" \
864 " ldi %1, %%r20\n" \
865 K_LDW_ASM_PIC \
866 : "=r" (__res) \
867 : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \
868 : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \
869 ); \
870 __sys_res = (long)__res; \
871 } \
872 if ( (unsigned long)__sys_res >= (unsigned long)-4095 ){ \
873 errno = -__sys_res; \
874 __sys_res = -1; \
875 } \
876 __sys_res; \
877})
878
879#define K_LOAD_ARGS_0()
880#define K_LOAD_ARGS_1(r26) \
881 register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \
882 K_LOAD_ARGS_0()
883#define K_LOAD_ARGS_2(r26,r25) \
884 register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
885 K_LOAD_ARGS_1(r26)
886#define K_LOAD_ARGS_3(r26,r25,r24) \
887 register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
888 K_LOAD_ARGS_2(r26,r25)
889#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
890 register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \
891 K_LOAD_ARGS_3(r26,r25,r24)
892#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
893 register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \
894 K_LOAD_ARGS_4(r26,r25,r24,r23)
895#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
896 register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
897 K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
898
899/* Even with zero args we use r20 for the syscall number */
900#define K_ASM_ARGS_0
901#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
902#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
903#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
904#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
905#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
906#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
907
908/* The registers not listed as inputs but clobbered */
909#define K_CLOB_ARGS_6
910#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
911#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
912#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
913#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
914#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
915#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
916
917#define _syscall0(type,name) \
918type name(void) \
919{ \
920 return K_INLINE_SYSCALL(name, 0); \
921}
922
923#define _syscall1(type,name,type1,arg1) \
924type name(type1 arg1) \
925{ \
926 return K_INLINE_SYSCALL(name, 1, arg1); \
927}
928
929#define _syscall2(type,name,type1,arg1,type2,arg2) \
930type name(type1 arg1, type2 arg2) \
931{ \
932 return K_INLINE_SYSCALL(name, 2, arg1, arg2); \
933}
934
935#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
936type name(type1 arg1, type2 arg2, type3 arg3) \
937{ \
938 return K_INLINE_SYSCALL(name, 3, arg1, arg2, arg3); \
939}
940
941#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
942type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
943{ \
944 return K_INLINE_SYSCALL(name, 4, arg1, arg2, arg3, arg4); \
945}
946
947/* select takes 5 arguments */
948#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
949type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
950{ \
951 return K_INLINE_SYSCALL(name, 5, arg1, arg2, arg3, arg4, arg5); \
952}
953
954#define __ARCH_WANT_OLD_READDIR
955#define __ARCH_WANT_STAT64
956#define __ARCH_WANT_SYS_ALARM
957#define __ARCH_WANT_SYS_GETHOSTNAME
958#define __ARCH_WANT_SYS_PAUSE
959#define __ARCH_WANT_SYS_SGETMASK
960#define __ARCH_WANT_SYS_SIGNAL
961#define __ARCH_WANT_SYS_TIME
962#define __ARCH_WANT_COMPAT_SYS_TIME
963#define __ARCH_WANT_SYS_UTIME
964#define __ARCH_WANT_SYS_WAITPID
965#define __ARCH_WANT_SYS_SOCKETCALL
966#define __ARCH_WANT_SYS_FADVISE64
967#define __ARCH_WANT_SYS_GETPGRP
968#define __ARCH_WANT_SYS_LLSEEK
969#define __ARCH_WANT_SYS_NICE
970#define __ARCH_WANT_SYS_OLD_GETRLIMIT
971#define __ARCH_WANT_SYS_OLDUMOUNT
972#define __ARCH_WANT_SYS_SIGPENDING
973#define __ARCH_WANT_SYS_SIGPROCMASK
974#define __ARCH_WANT_SYS_RT_SIGACTION
975#define __ARCH_WANT_SYS_RT_SIGSUSPEND
976#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
977
978#endif /* __ASSEMBLY__ */
979
980#undef STR
981
982/*
983 * "Conditional" syscalls
984 *
985 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
986 * but it doesn't work on all toolchains, so we just do it by hand
987 */
988#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
989
990#endif /* __KERNEL__ */
991#endif /* _ASM_PARISC_UNISTD_H_ */
diff --git a/include/asm-parisc/unwind.h b/include/asm-parisc/unwind.h
deleted file mode 100644
index 2f7e6e50a158..000000000000
--- a/include/asm-parisc/unwind.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#ifndef _UNWIND_H_
2#define _UNWIND_H_
3
4#include <linux/list.h>
5
6/* From ABI specifications */
7struct unwind_table_entry {
8 unsigned int region_start;
9 unsigned int region_end;
10 unsigned int Cannot_unwind:1; /* 0 */
11 unsigned int Millicode:1; /* 1 */
12 unsigned int Millicode_save_sr0:1; /* 2 */
13 unsigned int Region_description:2; /* 3..4 */
14 unsigned int reserved1:1; /* 5 */
15 unsigned int Entry_SR:1; /* 6 */
16 unsigned int Entry_FR:4; /* number saved *//* 7..10 */
17 unsigned int Entry_GR:5; /* number saved *//* 11..15 */
18 unsigned int Args_stored:1; /* 16 */
19 unsigned int Variable_Frame:1; /* 17 */
20 unsigned int Separate_Package_Body:1; /* 18 */
21 unsigned int Frame_Extension_Millicode:1; /* 19 */
22 unsigned int Stack_Overflow_Check:1; /* 20 */
23 unsigned int Two_Instruction_SP_Increment:1; /* 21 */
24 unsigned int Ada_Region:1; /* 22 */
25 unsigned int cxx_info:1; /* 23 */
26 unsigned int cxx_try_catch:1; /* 24 */
27 unsigned int sched_entry_seq:1; /* 25 */
28 unsigned int reserved2:1; /* 26 */
29 unsigned int Save_SP:1; /* 27 */
30 unsigned int Save_RP:1; /* 28 */
31 unsigned int Save_MRP_in_frame:1; /* 29 */
32 unsigned int extn_ptr_defined:1; /* 30 */
33 unsigned int Cleanup_defined:1; /* 31 */
34
35 unsigned int MPE_XL_interrupt_marker:1; /* 0 */
36 unsigned int HP_UX_interrupt_marker:1; /* 1 */
37 unsigned int Large_frame:1; /* 2 */
38 unsigned int Pseudo_SP_Set:1; /* 3 */
39 unsigned int reserved4:1; /* 4 */
40 unsigned int Total_frame_size:27; /* 5..31 */
41};
42
43struct unwind_table {
44 struct list_head list;
45 const char *name;
46 unsigned long gp;
47 unsigned long base_addr;
48 unsigned long start;
49 unsigned long end;
50 const struct unwind_table_entry *table;
51 unsigned long length;
52};
53
54struct unwind_frame_info {
55 struct task_struct *t;
56 /* Eventually we would like to be able to get at any of the registers
57 available; but for now we only try to get the sp and ip for each
58 frame */
59 /* struct pt_regs regs; */
60 unsigned long sp, ip, rp, r31;
61 unsigned long prev_sp, prev_ip;
62};
63
64struct unwind_table *
65unwind_table_add(const char *name, unsigned long base_addr,
66 unsigned long gp, void *start, void *end);
67void
68unwind_table_remove(struct unwind_table *table);
69
70void unwind_frame_init(struct unwind_frame_info *info, struct task_struct *t,
71 struct pt_regs *regs);
72void unwind_frame_init_from_blocked_task(struct unwind_frame_info *info, struct task_struct *t);
73void unwind_frame_init_running(struct unwind_frame_info *info, struct pt_regs *regs);
74int unwind_once(struct unwind_frame_info *info);
75int unwind_to_user(struct unwind_frame_info *info);
76
77#endif
diff --git a/include/asm-parisc/user.h b/include/asm-parisc/user.h
deleted file mode 100644
index 80224753e508..000000000000
--- a/include/asm-parisc/user.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/* This file should not exist, but lots of generic code still includes
2 it. It's a hangover from old a.out days and the traditional core
3 dump format. We are ELF-only, and so are our core dumps. If we
4 need to support HP/UX core format then we'll do it here
5 eventually. */
diff --git a/include/asm-parisc/vga.h b/include/asm-parisc/vga.h
deleted file mode 100644
index 171399a88ca6..000000000000
--- a/include/asm-parisc/vga.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_PARISC_VGA_H__
2#define __ASM_PARISC_VGA_H__
3
4/* nothing */
5
6#endif /* __ASM_PARISC_VGA_H__ */
diff --git a/include/asm-parisc/xor.h b/include/asm-parisc/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/include/asm-parisc/xor.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/xor.h>
diff --git a/include/asm-um/elf-i386.h b/include/asm-um/elf-i386.h
index 23d6893e8617..d0da9d7c5371 100644
--- a/include/asm-um/elf-i386.h
+++ b/include/asm-um/elf-i386.h
@@ -86,7 +86,7 @@ extern long elf_aux_hwcap;
86extern char * elf_aux_platform; 86extern char * elf_aux_platform;
87#define ELF_PLATFORM (elf_aux_platform) 87#define ELF_PLATFORM (elf_aux_platform)
88 88
89#define SET_PERSONALITY(ex, ibcs2) do { } while (0) 89#define SET_PERSONALITY(ex) do { } while (0)
90 90
91extern unsigned long vsyscall_ehdr; 91extern unsigned long vsyscall_ehdr;
92extern unsigned long vsyscall_end; 92extern unsigned long vsyscall_end;
diff --git a/include/asm-um/elf-ppc.h b/include/asm-um/elf-ppc.h
index d3b90b7ac3e9..af9463cd8ce5 100644
--- a/include/asm-um/elf-ppc.h
+++ b/include/asm-um/elf-ppc.h
@@ -5,7 +5,7 @@
5extern long elf_aux_hwcap; 5extern long elf_aux_hwcap;
6#define ELF_HWCAP (elf_aux_hwcap) 6#define ELF_HWCAP (elf_aux_hwcap)
7 7
8#define SET_PERSONALITY(ex, ibcs2) do ; while(0) 8#define SET_PERSONALITY(ex) do ; while(0)
9 9
10#define ELF_EXEC_PAGESIZE 4096 10#define ELF_EXEC_PAGESIZE 4096
11 11
diff --git a/include/asm-um/elf-x86_64.h b/include/asm-um/elf-x86_64.h
index 3b2d5224a7e1..6e8a9195e952 100644
--- a/include/asm-um/elf-x86_64.h
+++ b/include/asm-um/elf-x86_64.h
@@ -114,6 +114,6 @@ extern long elf_aux_hwcap;
114 114
115#define ELF_PLATFORM "x86_64" 115#define ELF_PLATFORM "x86_64"
116 116
117#define SET_PERSONALITY(ex, ibcs2) do ; while(0) 117#define SET_PERSONALITY(ex) do ; while(0)
118 118
119#endif 119#endif
diff --git a/include/asm-um/thread_info.h b/include/asm-um/thread_info.h
index e07e72846c7a..62274ab9471f 100644
--- a/include/asm-um/thread_info.h
+++ b/include/asm-um/thread_info.h
@@ -69,6 +69,7 @@ static inline struct thread_info *current_thread_info(void)
69#define TIF_MEMDIE 5 69#define TIF_MEMDIE 5
70#define TIF_SYSCALL_AUDIT 6 70#define TIF_SYSCALL_AUDIT 6
71#define TIF_RESTORE_SIGMASK 7 71#define TIF_RESTORE_SIGMASK 7
72#define TIF_FREEZE 16 /* is freezing for suspend */
72 73
73#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 74#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
74#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) 75#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
@@ -77,5 +78,6 @@ static inline struct thread_info *current_thread_info(void)
77#define _TIF_MEMDIE (1 << TIF_MEMDIE) 78#define _TIF_MEMDIE (1 << TIF_MEMDIE)
78#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) 79#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
79#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) 80#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
81#define _TIF_FREEZE (1 << TIF_FREEZE)
80 82
81#endif 83#endif
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index d76a0839abe9..ef1d72dbdfe0 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -40,8 +40,6 @@ extern void generic_apic_probe(void);
40extern unsigned int apic_verbosity; 40extern unsigned int apic_verbosity;
41extern int local_apic_timer_c2_ok; 41extern int local_apic_timer_c2_ok;
42 42
43extern int ioapic_force;
44
45extern int disable_apic; 43extern int disable_apic;
46/* 44/*
47 * Basic functions accessing APICs. 45 * Basic functions accessing APICs.
@@ -100,6 +98,20 @@ extern void check_x2apic(void);
100extern void enable_x2apic(void); 98extern void enable_x2apic(void);
101extern void enable_IR_x2apic(void); 99extern void enable_IR_x2apic(void);
102extern void x2apic_icr_write(u32 low, u32 id); 100extern void x2apic_icr_write(u32 low, u32 id);
101static inline int x2apic_enabled(void)
102{
103 int msr, msr2;
104
105 if (!cpu_has_x2apic)
106 return 0;
107
108 rdmsr(MSR_IA32_APICBASE, msr, msr2);
109 if (msr & X2APIC_ENABLE)
110 return 1;
111 return 0;
112}
113#else
114#define x2apic_enabled() 0
103#endif 115#endif
104 116
105struct apic_ops { 117struct apic_ops {
diff --git a/include/asm-x86/bigsmp/apic.h b/include/asm-x86/bigsmp/apic.h
index 0a9cd7c5ca0c..1d9543b9d358 100644
--- a/include/asm-x86/bigsmp/apic.h
+++ b/include/asm-x86/bigsmp/apic.h
@@ -9,22 +9,17 @@ static inline int apic_id_registered(void)
9 return (1); 9 return (1);
10} 10}
11 11
12/* Round robin the irqs amoung the online cpus */
13static inline cpumask_t target_cpus(void) 12static inline cpumask_t target_cpus(void)
14{ 13{
15 static unsigned long cpu = NR_CPUS; 14#ifdef CONFIG_SMP
16 do { 15 return cpu_online_map;
17 if (cpu >= NR_CPUS) 16#else
18 cpu = first_cpu(cpu_online_map); 17 return cpumask_of_cpu(0);
19 else 18#endif
20 cpu = next_cpu(cpu, cpu_online_map);
21 } while (cpu >= NR_CPUS);
22 return cpumask_of_cpu(cpu);
23} 19}
24 20
25#undef APIC_DEST_LOGICAL 21#undef APIC_DEST_LOGICAL
26#define APIC_DEST_LOGICAL 0 22#define APIC_DEST_LOGICAL 0
27#define TARGET_CPUS (target_cpus())
28#define APIC_DFR_VALUE (APIC_DFR_FLAT) 23#define APIC_DFR_VALUE (APIC_DFR_FLAT)
29#define INT_DELIVERY_MODE (dest_Fixed) 24#define INT_DELIVERY_MODE (dest_Fixed)
30#define INT_DEST_MODE (0) /* phys delivery to target proc */ 25#define INT_DEST_MODE (0) /* phys delivery to target proc */
diff --git a/include/asm-x86/efi.h b/include/asm-x86/efi.h
index ed2de22e8705..313438e63348 100644
--- a/include/asm-x86/efi.h
+++ b/include/asm-x86/efi.h
@@ -94,4 +94,17 @@ extern void efi_reserve_early(void);
94extern void efi_call_phys_prelog(void); 94extern void efi_call_phys_prelog(void);
95extern void efi_call_phys_epilog(void); 95extern void efi_call_phys_epilog(void);
96 96
97#ifndef CONFIG_EFI
98/*
99 * IF EFI is not configured, have the EFI calls return -ENOSYS.
100 */
101#define efi_call0(_f) (-ENOSYS)
102#define efi_call1(_f, _a1) (-ENOSYS)
103#define efi_call2(_f, _a1, _a2) (-ENOSYS)
104#define efi_call3(_f, _a1, _a2, _a3) (-ENOSYS)
105#define efi_call4(_f, _a1, _a2, _a3, _a4) (-ENOSYS)
106#define efi_call5(_f, _a1, _a2, _a3, _a4, _a5) (-ENOSYS)
107#define efi_call6(_f, _a1, _a2, _a3, _a4, _a5, _a6) (-ENOSYS)
108#endif /* CONFIG_EFI */
109
97#endif /* ASM_X86__EFI_H */ 110#endif /* ASM_X86__EFI_H */
diff --git a/include/asm-x86/elf.h b/include/asm-x86/elf.h
index 5c4745bec906..26bc15f01e78 100644
--- a/include/asm-x86/elf.h
+++ b/include/asm-x86/elf.h
@@ -186,7 +186,7 @@ do { \
186 set_fs(USER_DS); \ 186 set_fs(USER_DS); \
187} while (0) 187} while (0)
188 188
189#define COMPAT_SET_PERSONALITY(ex, ibcs2) \ 189#define COMPAT_SET_PERSONALITY(ex) \
190do { \ 190do { \
191 if (test_thread_flag(TIF_IA32)) \ 191 if (test_thread_flag(TIF_IA32)) \
192 clear_thread_flag(TIF_ABI_PENDING); \ 192 clear_thread_flag(TIF_ABI_PENDING); \
@@ -267,7 +267,7 @@ extern int force_personality32;
267 For the moment, we have only optimizations for the Intel generations, 267 For the moment, we have only optimizations for the Intel generations,
268 but that could change... */ 268 but that could change... */
269 269
270#define SET_PERSONALITY(ex, ibcs2) set_personality_64bit() 270#define SET_PERSONALITY(ex) set_personality_64bit()
271 271
272/* 272/*
273 * An executable for which elf_read_implies_exec() returns TRUE will 273 * An executable for which elf_read_implies_exec() returns TRUE will
diff --git a/include/asm-x86/es7000/apic.h b/include/asm-x86/es7000/apic.h
index bd2c44d1f7ac..380f0b4f17ed 100644
--- a/include/asm-x86/es7000/apic.h
+++ b/include/asm-x86/es7000/apic.h
@@ -17,7 +17,6 @@ static inline cpumask_t target_cpus(void)
17 return cpumask_of_cpu(smp_processor_id()); 17 return cpumask_of_cpu(smp_processor_id());
18#endif 18#endif
19} 19}
20#define TARGET_CPUS (target_cpus())
21 20
22#if defined CONFIG_ES7000_CLUSTERED_APIC 21#if defined CONFIG_ES7000_CLUSTERED_APIC
23#define APIC_DFR_VALUE (APIC_DFR_CLUSTER) 22#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
@@ -81,7 +80,7 @@ static inline void setup_apic_routing(void)
81 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); 80 int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
82 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", 81 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
83 (apic_version[apic] == 0x14) ? 82 (apic_version[apic] == 0x14) ?
84 "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]); 83 "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(target_cpus())[0]);
85} 84}
86 85
87static inline int multi_timer_check(int apic, int irq) 86static inline int multi_timer_check(int apic, int irq)
@@ -171,7 +170,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
171 int new_apicid = cpu_to_logical_apicid(cpu); 170 int new_apicid = cpu_to_logical_apicid(cpu);
172 if (apicid_cluster(apicid) != 171 if (apicid_cluster(apicid) !=
173 apicid_cluster(new_apicid)){ 172 apicid_cluster(new_apicid)){
174 printk ("%s: Not a valid mask!\n",__FUNCTION__); 173 printk ("%s: Not a valid mask!\n", __func__);
175#if defined CONFIG_ES7000_CLUSTERED_APIC 174#if defined CONFIG_ES7000_CLUSTERED_APIC
176 return 0xFF; 175 return 0xFF;
177#else 176#else
diff --git a/include/asm-x86/ftrace.h b/include/asm-x86/ftrace.h
index be0e004ad148..1bb6f9bbe1ab 100644
--- a/include/asm-x86/ftrace.h
+++ b/include/asm-x86/ftrace.h
@@ -7,6 +7,16 @@
7 7
8#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
9extern void mcount(void); 9extern void mcount(void);
10
11static inline unsigned long ftrace_call_adjust(unsigned long addr)
12{
13 /*
14 * call mcount is "e8 <4 byte offset>"
15 * The addr points to the 4 byte offset and the caller of this
16 * function wants the pointer to e8. Simply subtract one.
17 */
18 return addr - 1;
19}
10#endif 20#endif
11 21
12#endif /* CONFIG_FTRACE */ 22#endif /* CONFIG_FTRACE */
diff --git a/include/asm-x86/genapic_32.h b/include/asm-x86/genapic_32.h
index 34280f027664..6fe4f81bfcf9 100644
--- a/include/asm-x86/genapic_32.h
+++ b/include/asm-x86/genapic_32.h
@@ -57,6 +57,7 @@ struct genapic {
57 unsigned (*get_apic_id)(unsigned long x); 57 unsigned (*get_apic_id)(unsigned long x);
58 unsigned long apic_id_mask; 58 unsigned long apic_id_mask;
59 unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask); 59 unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
60 cpumask_t (*vector_allocation_domain)(int cpu);
60 61
61#ifdef CONFIG_SMP 62#ifdef CONFIG_SMP
62 /* ipi */ 63 /* ipi */
@@ -104,6 +105,7 @@ struct genapic {
104 APICFUNC(get_apic_id) \ 105 APICFUNC(get_apic_id) \
105 .apic_id_mask = APIC_ID_MASK, \ 106 .apic_id_mask = APIC_ID_MASK, \
106 APICFUNC(cpu_mask_to_apicid) \ 107 APICFUNC(cpu_mask_to_apicid) \
108 APICFUNC(vector_allocation_domain) \
107 APICFUNC(acpi_madt_oem_check) \ 109 APICFUNC(acpi_madt_oem_check) \
108 IPIFUNC(send_IPI_mask) \ 110 IPIFUNC(send_IPI_mask) \
109 IPIFUNC(send_IPI_allbutself) \ 111 IPIFUNC(send_IPI_allbutself) \
diff --git a/include/asm-x86/hpet.h b/include/asm-x86/hpet.h
index cbbbb6d4dd32..58b273f6ef07 100644
--- a/include/asm-x86/hpet.h
+++ b/include/asm-x86/hpet.h
@@ -1,6 +1,8 @@
1#ifndef ASM_X86__HPET_H 1#ifndef ASM_X86__HPET_H
2#define ASM_X86__HPET_H 2#define ASM_X86__HPET_H
3 3
4#include <linux/msi.h>
5
4#ifdef CONFIG_HPET_TIMER 6#ifdef CONFIG_HPET_TIMER
5 7
6#define HPET_MMAP_SIZE 1024 8#define HPET_MMAP_SIZE 1024
@@ -10,6 +12,11 @@
10#define HPET_CFG 0x010 12#define HPET_CFG 0x010
11#define HPET_STATUS 0x020 13#define HPET_STATUS 0x020
12#define HPET_COUNTER 0x0f0 14#define HPET_COUNTER 0x0f0
15
16#define HPET_Tn_CFG(n) (0x100 + 0x20 * n)
17#define HPET_Tn_CMP(n) (0x108 + 0x20 * n)
18#define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n)
19
13#define HPET_T0_CFG 0x100 20#define HPET_T0_CFG 0x100
14#define HPET_T0_CMP 0x108 21#define HPET_T0_CMP 0x108
15#define HPET_T0_ROUTE 0x110 22#define HPET_T0_ROUTE 0x110
@@ -65,6 +72,20 @@ extern void hpet_disable(void);
65extern unsigned long hpet_readl(unsigned long a); 72extern unsigned long hpet_readl(unsigned long a);
66extern void force_hpet_resume(void); 73extern void force_hpet_resume(void);
67 74
75extern void hpet_msi_unmask(unsigned int irq);
76extern void hpet_msi_mask(unsigned int irq);
77extern void hpet_msi_write(unsigned int irq, struct msi_msg *msg);
78extern void hpet_msi_read(unsigned int irq, struct msi_msg *msg);
79
80#ifdef CONFIG_PCI_MSI
81extern int arch_setup_hpet_msi(unsigned int irq);
82#else
83static inline int arch_setup_hpet_msi(unsigned int irq)
84{
85 return -EINVAL;
86}
87#endif
88
68#ifdef CONFIG_HPET_EMULATE_RTC 89#ifdef CONFIG_HPET_EMULATE_RTC
69 90
70#include <linux/interrupt.h> 91#include <linux/interrupt.h>
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h
index 50f6e0316b50..749d042f0556 100644
--- a/include/asm-x86/hw_irq.h
+++ b/include/asm-x86/hw_irq.h
@@ -96,13 +96,8 @@ extern asmlinkage void qic_call_function_interrupt(void);
96 96
97/* SMP */ 97/* SMP */
98extern void smp_apic_timer_interrupt(struct pt_regs *); 98extern void smp_apic_timer_interrupt(struct pt_regs *);
99#ifdef CONFIG_X86_32
100extern void smp_spurious_interrupt(struct pt_regs *); 99extern void smp_spurious_interrupt(struct pt_regs *);
101extern void smp_error_interrupt(struct pt_regs *); 100extern void smp_error_interrupt(struct pt_regs *);
102#else
103extern asmlinkage void smp_spurious_interrupt(void);
104extern asmlinkage void smp_error_interrupt(void);
105#endif
106#ifdef CONFIG_X86_SMP 101#ifdef CONFIG_X86_SMP
107extern void smp_reschedule_interrupt(struct pt_regs *); 102extern void smp_reschedule_interrupt(struct pt_regs *);
108extern void smp_call_function_interrupt(struct pt_regs *); 103extern void smp_call_function_interrupt(struct pt_regs *);
@@ -115,13 +110,13 @@ extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *);
115#endif 110#endif
116 111
117#ifdef CONFIG_X86_32 112#ifdef CONFIG_X86_32
118extern void (*const interrupt[NR_IRQS])(void); 113extern void (*const interrupt[NR_VECTORS])(void);
119#else 114#endif
115
120typedef int vector_irq_t[NR_VECTORS]; 116typedef int vector_irq_t[NR_VECTORS];
121DECLARE_PER_CPU(vector_irq_t, vector_irq); 117DECLARE_PER_CPU(vector_irq_t, vector_irq);
122#endif
123 118
124#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_X86_64) 119#ifdef CONFIG_X86_IO_APIC
125extern void lock_vector_lock(void); 120extern void lock_vector_lock(void);
126extern void unlock_vector_lock(void); 121extern void unlock_vector_lock(void);
127extern void __setup_vector_irq(int cpu); 122extern void __setup_vector_irq(int cpu);
diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h
index 8ec68a50cf10..d35cbd7aa587 100644
--- a/include/asm-x86/io_apic.h
+++ b/include/asm-x86/io_apic.h
@@ -4,6 +4,7 @@
4#include <linux/types.h> 4#include <linux/types.h>
5#include <asm/mpspec.h> 5#include <asm/mpspec.h>
6#include <asm/apicdef.h> 6#include <asm/apicdef.h>
7#include <asm/irq_vectors.h>
7 8
8/* 9/*
9 * Intel IO-APIC support for SMP and UP systems. 10 * Intel IO-APIC support for SMP and UP systems.
@@ -87,24 +88,8 @@ struct IO_APIC_route_entry {
87 mask : 1, /* 0: enabled, 1: disabled */ 88 mask : 1, /* 0: enabled, 1: disabled */
88 __reserved_2 : 15; 89 __reserved_2 : 15;
89 90
90#ifdef CONFIG_X86_32
91 union {
92 struct {
93 __u32 __reserved_1 : 24,
94 physical_dest : 4,
95 __reserved_2 : 4;
96 } physical;
97
98 struct {
99 __u32 __reserved_1 : 24,
100 logical_dest : 8;
101 } logical;
102 } dest;
103#else
104 __u32 __reserved_3 : 24, 91 __u32 __reserved_3 : 24,
105 dest : 8; 92 dest : 8;
106#endif
107
108} __attribute__ ((packed)); 93} __attribute__ ((packed));
109 94
110struct IR_IO_APIC_route_entry { 95struct IR_IO_APIC_route_entry {
@@ -203,10 +188,17 @@ extern void restore_IO_APIC_setup(void);
203extern void reinit_intr_remapped_IO_APIC(int); 188extern void reinit_intr_remapped_IO_APIC(int);
204#endif 189#endif
205 190
191extern int probe_nr_irqs(void);
192
206#else /* !CONFIG_X86_IO_APIC */ 193#else /* !CONFIG_X86_IO_APIC */
207#define io_apic_assign_pci_irqs 0 194#define io_apic_assign_pci_irqs 0
208static const int timer_through_8259 = 0; 195static const int timer_through_8259 = 0;
209static inline void ioapic_init_mappings(void) { } 196static inline void ioapic_init_mappings(void) { }
197
198static inline int probe_nr_irqs(void)
199{
200 return NR_IRQS;
201}
210#endif 202#endif
211 203
212#endif /* ASM_X86__IO_APIC_H */ 204#endif /* ASM_X86__IO_APIC_H */
diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h
index 546ad3110fea..961e746da977 100644
--- a/include/asm-x86/iommu.h
+++ b/include/asm-x86/iommu.h
@@ -8,7 +8,7 @@ extern int force_iommu, no_iommu;
8extern int iommu_detected; 8extern int iommu_detected;
9extern int dmar_disabled; 9extern int dmar_disabled;
10 10
11extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len); 11extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len);
12 12
13#ifdef CONFIG_GART_IOMMU 13#ifdef CONFIG_GART_IOMMU
14extern int gart_iommu_aperture; 14extern int gart_iommu_aperture;
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
index c5d2d767a1f3..a8d065d85f57 100644
--- a/include/asm-x86/irq_vectors.h
+++ b/include/asm-x86/irq_vectors.h
@@ -19,19 +19,14 @@
19 19
20/* 20/*
21 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering 21 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
22 * cleanup after irq migration on 64 bit. 22 * cleanup after irq migration.
23 */ 23 */
24#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR 24#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
25 25
26/* 26/*
27 * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit. 27 * Vectors 0x30-0x3f are used for ISA interrupts.
28 * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit.
29 */ 28 */
30#ifdef CONFIG_X86_32
31#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR)
32#else
33#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) 29#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
34#endif
35#define IRQ1_VECTOR (IRQ0_VECTOR + 1) 30#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
36#define IRQ2_VECTOR (IRQ0_VECTOR + 2) 31#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
37#define IRQ3_VECTOR (IRQ0_VECTOR + 3) 32#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
@@ -96,11 +91,7 @@
96 * start at 0x31(0x41) to spread out vectors evenly between priority 91 * start at 0x31(0x41) to spread out vectors evenly between priority
97 * levels. (0x80 is the syscall vector) 92 * levels. (0x80 is the syscall vector)
98 */ 93 */
99#ifdef CONFIG_X86_32 94#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
100# define FIRST_DEVICE_VECTOR 0x31
101#else
102# define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
103#endif
104 95
105#define NR_VECTORS 256 96#define NR_VECTORS 256
106 97
@@ -116,7 +107,6 @@
116# else 107# else
117# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS)) 108# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
118# endif 109# endif
119# define NR_IRQ_VECTORS NR_IRQS
120 110
121#elif !defined(CONFIG_X86_VOYAGER) 111#elif !defined(CONFIG_X86_VOYAGER)
122 112
@@ -124,23 +114,15 @@
124 114
125# define NR_IRQS 224 115# define NR_IRQS 224
126 116
127# if (224 >= 32 * NR_CPUS)
128# define NR_IRQ_VECTORS NR_IRQS
129# else
130# define NR_IRQ_VECTORS (32 * NR_CPUS)
131# endif
132
133# else /* IO_APIC || PARAVIRT */ 117# else /* IO_APIC || PARAVIRT */
134 118
135# define NR_IRQS 16 119# define NR_IRQS 16
136# define NR_IRQ_VECTORS NR_IRQS
137 120
138# endif 121# endif
139 122
140#else /* !VISWS && !VOYAGER */ 123#else /* !VISWS && !VOYAGER */
141 124
142# define NR_IRQS 224 125# define NR_IRQS 224
143# define NR_IRQ_VECTORS NR_IRQS
144 126
145#endif /* VISWS */ 127#endif /* VISWS */
146 128
diff --git a/include/asm-x86/kvm.h b/include/asm-x86/kvm.h
index 78e954db1e7f..ba0dd791fadf 100644
--- a/include/asm-x86/kvm.h
+++ b/include/asm-x86/kvm.h
@@ -208,26 +208,4 @@ struct kvm_pit_channel_state {
208struct kvm_pit_state { 208struct kvm_pit_state {
209 struct kvm_pit_channel_state channels[3]; 209 struct kvm_pit_channel_state channels[3];
210}; 210};
211
212#define KVM_TRC_INJ_VIRQ (KVM_TRC_HANDLER + 0x02)
213#define KVM_TRC_REDELIVER_EVT (KVM_TRC_HANDLER + 0x03)
214#define KVM_TRC_PEND_INTR (KVM_TRC_HANDLER + 0x04)
215#define KVM_TRC_IO_READ (KVM_TRC_HANDLER + 0x05)
216#define KVM_TRC_IO_WRITE (KVM_TRC_HANDLER + 0x06)
217#define KVM_TRC_CR_READ (KVM_TRC_HANDLER + 0x07)
218#define KVM_TRC_CR_WRITE (KVM_TRC_HANDLER + 0x08)
219#define KVM_TRC_DR_READ (KVM_TRC_HANDLER + 0x09)
220#define KVM_TRC_DR_WRITE (KVM_TRC_HANDLER + 0x0A)
221#define KVM_TRC_MSR_READ (KVM_TRC_HANDLER + 0x0B)
222#define KVM_TRC_MSR_WRITE (KVM_TRC_HANDLER + 0x0C)
223#define KVM_TRC_CPUID (KVM_TRC_HANDLER + 0x0D)
224#define KVM_TRC_INTR (KVM_TRC_HANDLER + 0x0E)
225#define KVM_TRC_NMI (KVM_TRC_HANDLER + 0x0F)
226#define KVM_TRC_VMMCALL (KVM_TRC_HANDLER + 0x10)
227#define KVM_TRC_HLT (KVM_TRC_HANDLER + 0x11)
228#define KVM_TRC_CLTS (KVM_TRC_HANDLER + 0x12)
229#define KVM_TRC_LMSW (KVM_TRC_HANDLER + 0x13)
230#define KVM_TRC_APIC_ACCESS (KVM_TRC_HANDLER + 0x14)
231#define KVM_TRC_TDP_FAULT (KVM_TRC_HANDLER + 0x15)
232
233#endif /* ASM_X86__KVM_H */ 211#endif /* ASM_X86__KVM_H */
diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h
index 69794547f514..411fb8cfb24e 100644
--- a/include/asm-x86/kvm_host.h
+++ b/include/asm-x86/kvm_host.h
@@ -57,6 +57,10 @@
57#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE) 57#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
58 58
59#define DE_VECTOR 0 59#define DE_VECTOR 0
60#define DB_VECTOR 1
61#define BP_VECTOR 3
62#define OF_VECTOR 4
63#define BR_VECTOR 5
60#define UD_VECTOR 6 64#define UD_VECTOR 6
61#define NM_VECTOR 7 65#define NM_VECTOR 7
62#define DF_VECTOR 8 66#define DF_VECTOR 8
@@ -65,6 +69,7 @@
65#define SS_VECTOR 12 69#define SS_VECTOR 12
66#define GP_VECTOR 13 70#define GP_VECTOR 13
67#define PF_VECTOR 14 71#define PF_VECTOR 14
72#define MF_VECTOR 16
68#define MC_VECTOR 18 73#define MC_VECTOR 18
69 74
70#define SELECTOR_TI_MASK (1 << 2) 75#define SELECTOR_TI_MASK (1 << 2)
@@ -89,7 +94,7 @@ extern struct list_head vm_list;
89struct kvm_vcpu; 94struct kvm_vcpu;
90struct kvm; 95struct kvm;
91 96
92enum { 97enum kvm_reg {
93 VCPU_REGS_RAX = 0, 98 VCPU_REGS_RAX = 0,
94 VCPU_REGS_RCX = 1, 99 VCPU_REGS_RCX = 1,
95 VCPU_REGS_RDX = 2, 100 VCPU_REGS_RDX = 2,
@@ -108,6 +113,7 @@ enum {
108 VCPU_REGS_R14 = 14, 113 VCPU_REGS_R14 = 14,
109 VCPU_REGS_R15 = 15, 114 VCPU_REGS_R15 = 15,
110#endif 115#endif
116 VCPU_REGS_RIP,
111 NR_VCPU_REGS 117 NR_VCPU_REGS
112}; 118};
113 119
@@ -189,10 +195,20 @@ struct kvm_mmu_page {
189 */ 195 */
190 int multimapped; /* More than one parent_pte? */ 196 int multimapped; /* More than one parent_pte? */
191 int root_count; /* Currently serving as active root */ 197 int root_count; /* Currently serving as active root */
198 bool unsync;
199 bool unsync_children;
192 union { 200 union {
193 u64 *parent_pte; /* !multimapped */ 201 u64 *parent_pte; /* !multimapped */
194 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ 202 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
195 }; 203 };
204 DECLARE_BITMAP(unsync_child_bitmap, 512);
205};
206
207struct kvm_pv_mmu_op_buffer {
208 void *ptr;
209 unsigned len;
210 unsigned processed;
211 char buf[512] __aligned(sizeof(long));
196}; 212};
197 213
198/* 214/*
@@ -207,6 +223,9 @@ struct kvm_mmu {
207 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); 223 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
208 void (*prefetch_page)(struct kvm_vcpu *vcpu, 224 void (*prefetch_page)(struct kvm_vcpu *vcpu,
209 struct kvm_mmu_page *page); 225 struct kvm_mmu_page *page);
226 int (*sync_page)(struct kvm_vcpu *vcpu,
227 struct kvm_mmu_page *sp);
228 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
210 hpa_t root_hpa; 229 hpa_t root_hpa;
211 int root_level; 230 int root_level;
212 int shadow_root_level; 231 int shadow_root_level;
@@ -219,8 +238,13 @@ struct kvm_vcpu_arch {
219 int interrupt_window_open; 238 int interrupt_window_open;
220 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ 239 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
221 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS); 240 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
222 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */ 241 /*
223 unsigned long rip; /* needs vcpu_load_rsp_rip() */ 242 * rip and regs accesses must go through
243 * kvm_{register,rip}_{read,write} functions.
244 */
245 unsigned long regs[NR_VCPU_REGS];
246 u32 regs_avail;
247 u32 regs_dirty;
224 248
225 unsigned long cr0; 249 unsigned long cr0;
226 unsigned long cr2; 250 unsigned long cr2;
@@ -237,6 +261,9 @@ struct kvm_vcpu_arch {
237 bool tpr_access_reporting; 261 bool tpr_access_reporting;
238 262
239 struct kvm_mmu mmu; 263 struct kvm_mmu mmu;
264 /* only needed in kvm_pv_mmu_op() path, but it's hot so
265 * put it here to avoid allocation */
266 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
240 267
241 struct kvm_mmu_memory_cache mmu_pte_chain_cache; 268 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
242 struct kvm_mmu_memory_cache mmu_rmap_desc_cache; 269 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
@@ -269,6 +296,11 @@ struct kvm_vcpu_arch {
269 u32 error_code; 296 u32 error_code;
270 } exception; 297 } exception;
271 298
299 struct kvm_queued_interrupt {
300 bool pending;
301 u8 nr;
302 } interrupt;
303
272 struct { 304 struct {
273 int active; 305 int active;
274 u8 save_iopl; 306 u8 save_iopl;
@@ -294,6 +326,7 @@ struct kvm_vcpu_arch {
294 struct page *time_page; 326 struct page *time_page;
295 327
296 bool nmi_pending; 328 bool nmi_pending;
329 bool nmi_injected;
297 330
298 u64 mtrr[0x100]; 331 u64 mtrr[0x100];
299}; 332};
@@ -316,9 +349,12 @@ struct kvm_arch{
316 * Hash table of struct kvm_mmu_page. 349 * Hash table of struct kvm_mmu_page.
317 */ 350 */
318 struct list_head active_mmu_pages; 351 struct list_head active_mmu_pages;
352 struct list_head assigned_dev_head;
353 struct dmar_domain *intel_iommu_domain;
319 struct kvm_pic *vpic; 354 struct kvm_pic *vpic;
320 struct kvm_ioapic *vioapic; 355 struct kvm_ioapic *vioapic;
321 struct kvm_pit *vpit; 356 struct kvm_pit *vpit;
357 struct hlist_head irq_ack_notifier_list;
322 358
323 int round_robin_prev_vcpu; 359 int round_robin_prev_vcpu;
324 unsigned int tss_addr; 360 unsigned int tss_addr;
@@ -338,6 +374,7 @@ struct kvm_vm_stat {
338 u32 mmu_flooded; 374 u32 mmu_flooded;
339 u32 mmu_recycled; 375 u32 mmu_recycled;
340 u32 mmu_cache_miss; 376 u32 mmu_cache_miss;
377 u32 mmu_unsync;
341 u32 remote_tlb_flush; 378 u32 remote_tlb_flush;
342 u32 lpages; 379 u32 lpages;
343}; 380};
@@ -364,6 +401,7 @@ struct kvm_vcpu_stat {
364 u32 insn_emulation; 401 u32 insn_emulation;
365 u32 insn_emulation_fail; 402 u32 insn_emulation_fail;
366 u32 hypercalls; 403 u32 hypercalls;
404 u32 irq_injections;
367}; 405};
368 406
369struct descriptor_table { 407struct descriptor_table {
@@ -414,8 +452,7 @@ struct kvm_x86_ops {
414 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); 452 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
415 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, 453 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
416 int *exception); 454 int *exception);
417 void (*cache_regs)(struct kvm_vcpu *vcpu); 455 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
418 void (*decache_regs)(struct kvm_vcpu *vcpu);
419 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 456 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
420 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 457 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
421 458
@@ -528,6 +565,8 @@ void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
528void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, 565void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
529 u32 error_code); 566 u32 error_code);
530 567
568void kvm_pic_set_irq(void *opaque, int irq, int level);
569
531void kvm_inject_nmi(struct kvm_vcpu *vcpu); 570void kvm_inject_nmi(struct kvm_vcpu *vcpu);
532 571
533void fx_init(struct kvm_vcpu *vcpu); 572void fx_init(struct kvm_vcpu *vcpu);
@@ -550,12 +589,14 @@ int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
550void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 589void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
551int kvm_mmu_load(struct kvm_vcpu *vcpu); 590int kvm_mmu_load(struct kvm_vcpu *vcpu);
552void kvm_mmu_unload(struct kvm_vcpu *vcpu); 591void kvm_mmu_unload(struct kvm_vcpu *vcpu);
592void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
553 593
554int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 594int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
555 595
556int kvm_fix_hypercall(struct kvm_vcpu *vcpu); 596int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
557 597
558int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); 598int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
599void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
559 600
560void kvm_enable_tdp(void); 601void kvm_enable_tdp(void);
561void kvm_disable_tdp(void); 602void kvm_disable_tdp(void);
@@ -686,33 +727,6 @@ enum {
686 TASK_SWITCH_GATE = 3, 727 TASK_SWITCH_GATE = 3,
687}; 728};
688 729
689#define KVMTRACE_5D(evt, vcpu, d1, d2, d3, d4, d5, name) \
690 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
691 vcpu, 5, d1, d2, d3, d4, d5)
692#define KVMTRACE_4D(evt, vcpu, d1, d2, d3, d4, name) \
693 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
694 vcpu, 4, d1, d2, d3, d4, 0)
695#define KVMTRACE_3D(evt, vcpu, d1, d2, d3, name) \
696 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
697 vcpu, 3, d1, d2, d3, 0, 0)
698#define KVMTRACE_2D(evt, vcpu, d1, d2, name) \
699 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
700 vcpu, 2, d1, d2, 0, 0, 0)
701#define KVMTRACE_1D(evt, vcpu, d1, name) \
702 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
703 vcpu, 1, d1, 0, 0, 0, 0)
704#define KVMTRACE_0D(evt, vcpu, name) \
705 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
706 vcpu, 0, 0, 0, 0, 0, 0)
707
708#ifdef CONFIG_64BIT
709# define KVM_EX_ENTRY ".quad"
710# define KVM_EX_PUSH "pushq"
711#else
712# define KVM_EX_ENTRY ".long"
713# define KVM_EX_PUSH "pushl"
714#endif
715
716/* 730/*
717 * Hardware virtualization extension instructions may fault if a 731 * Hardware virtualization extension instructions may fault if a
718 * reboot turns off virtualization while processes are running. 732 * reboot turns off virtualization while processes are running.
@@ -724,11 +738,11 @@ asmlinkage void kvm_handle_fault_on_reboot(void);
724 "666: " insn "\n\t" \ 738 "666: " insn "\n\t" \
725 ".pushsection .fixup, \"ax\" \n" \ 739 ".pushsection .fixup, \"ax\" \n" \
726 "667: \n\t" \ 740 "667: \n\t" \
727 KVM_EX_PUSH " $666b \n\t" \ 741 __ASM_SIZE(push) " $666b \n\t" \
728 "jmp kvm_handle_fault_on_reboot \n\t" \ 742 "jmp kvm_handle_fault_on_reboot \n\t" \
729 ".popsection \n\t" \ 743 ".popsection \n\t" \
730 ".pushsection __ex_table, \"a\" \n\t" \ 744 ".pushsection __ex_table, \"a\" \n\t" \
731 KVM_EX_ENTRY " 666b, 667b \n\t" \ 745 _ASM_PTR " 666b, 667b \n\t" \
732 ".popsection" 746 ".popsection"
733 747
734#define KVM_ARCH_WANT_MMU_NOTIFIER 748#define KVM_ARCH_WANT_MMU_NOTIFIER
diff --git a/include/asm-x86/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h
index 9283b60a1dd2..6b1add8e31dd 100644
--- a/include/asm-x86/mach-default/entry_arch.h
+++ b/include/asm-x86/mach-default/entry_arch.h
@@ -14,6 +14,7 @@ BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) 14BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) 15BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
16BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR) 16BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR)
17BUILD_INTERRUPT(irq_move_cleanup_interrupt,IRQ_MOVE_CLEANUP_VECTOR)
17#endif 18#endif
18 19
19/* 20/*
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h
index 2a330a41b3dd..3c66f2cdaec1 100644
--- a/include/asm-x86/mach-default/mach_apic.h
+++ b/include/asm-x86/mach-default/mach_apic.h
@@ -85,6 +85,20 @@ static inline int apicid_to_node(int logical_apicid)
85 return 0; 85 return 0;
86#endif 86#endif
87} 87}
88
89static inline cpumask_t vector_allocation_domain(int cpu)
90{
91 /* Careful. Some cpus do not strictly honor the set of cpus
92 * specified in the interrupt destination when using lowest
93 * priority interrupt delivery mode.
94 *
95 * In particular there was a hyperthreading cpu observed to
96 * deliver interrupts to the wrong hyperthread when only one
97 * hyperthread was specified in the interrupt desitination.
98 */
99 cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
100 return domain;
101}
88#endif 102#endif
89 103
90static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) 104static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
@@ -138,6 +152,5 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
138static inline void enable_apic_mode(void) 152static inline void enable_apic_mode(void)
139{ 153{
140} 154}
141
142#endif /* CONFIG_X86_LOCAL_APIC */ 155#endif /* CONFIG_X86_LOCAL_APIC */
143#endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */ 156#endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */
diff --git a/include/asm-x86/mach-generic/irq_vectors_limits.h b/include/asm-x86/mach-generic/irq_vectors_limits.h
deleted file mode 100644
index f7870e1a220d..000000000000
--- a/include/asm-x86/mach-generic/irq_vectors_limits.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H
2#define ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H
3
4/*
5 * For Summit or generic (i.e. installer) kernels, we have lots of I/O APICs,
6 * even with uni-proc kernels, so use a big array.
7 *
8 * This value should be the same in both the generic and summit subarches.
9 * Change one, change 'em both.
10 */
11#define NR_IRQS 224
12#define NR_IRQ_VECTORS 1024
13
14#endif /* ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H */
diff --git a/include/asm-x86/mach-generic/mach_apic.h b/include/asm-x86/mach-generic/mach_apic.h
index 5d010c6881dd..5085b52da301 100644
--- a/include/asm-x86/mach-generic/mach_apic.h
+++ b/include/asm-x86/mach-generic/mach_apic.h
@@ -24,6 +24,7 @@
24#define check_phys_apicid_present (genapic->check_phys_apicid_present) 24#define check_phys_apicid_present (genapic->check_phys_apicid_present)
25#define check_apicid_used (genapic->check_apicid_used) 25#define check_apicid_used (genapic->check_apicid_used)
26#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid) 26#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
27#define vector_allocation_domain (genapic->vector_allocation_domain)
27#define enable_apic_mode (genapic->enable_apic_mode) 28#define enable_apic_mode (genapic->enable_apic_mode)
28#define phys_pkg_id (genapic->phys_pkg_id) 29#define phys_pkg_id (genapic->phys_pkg_id)
29 30
diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h
index 0bb43301a202..dabd10f0bbee 100644
--- a/include/asm-x86/msr-index.h
+++ b/include/asm-x86/msr-index.h
@@ -178,6 +178,9 @@
178#define MSR_IA32_EBL_CR_POWERON 0x0000002a 178#define MSR_IA32_EBL_CR_POWERON 0x0000002a
179#define MSR_IA32_FEATURE_CONTROL 0x0000003a 179#define MSR_IA32_FEATURE_CONTROL 0x0000003a
180 180
181#define FEATURE_CONTROL_LOCKED (1<<0)
182#define FEATURE_CONTROL_VMXON_ENABLED (1<<2)
183
181#define MSR_IA32_APICBASE 0x0000001b 184#define MSR_IA32_APICBASE 0x0000001b
182#define MSR_IA32_APICBASE_BSP (1<<8) 185#define MSR_IA32_APICBASE_BSP (1<<8)
183#define MSR_IA32_APICBASE_ENABLE (1<<11) 186#define MSR_IA32_APICBASE_ENABLE (1<<11)
diff --git a/include/asm-x86/numaq/apic.h b/include/asm-x86/numaq/apic.h
index a8344ba6ea15..0bf2a06b7a4e 100644
--- a/include/asm-x86/numaq/apic.h
+++ b/include/asm-x86/numaq/apic.h
@@ -12,8 +12,6 @@ static inline cpumask_t target_cpus(void)
12 return CPU_MASK_ALL; 12 return CPU_MASK_ALL;
13} 13}
14 14
15#define TARGET_CPUS (target_cpus())
16
17#define NO_BALANCE_IRQ (1) 15#define NO_BALANCE_IRQ (1)
18#define esr_disable (1) 16#define esr_disable (1)
19 17
diff --git a/include/asm-x86/page_32.h b/include/asm-x86/page_32.h
index e8d80d1de237..bdf5dba4cfb0 100644
--- a/include/asm-x86/page_32.h
+++ b/include/asm-x86/page_32.h
@@ -39,7 +39,6 @@ typedef u64 pmdval_t;
39typedef u64 pudval_t; 39typedef u64 pudval_t;
40typedef u64 pgdval_t; 40typedef u64 pgdval_t;
41typedef u64 pgprotval_t; 41typedef u64 pgprotval_t;
42typedef u64 phys_addr_t;
43 42
44typedef union { 43typedef union {
45 struct { 44 struct {
@@ -60,7 +59,6 @@ typedef unsigned long pmdval_t;
60typedef unsigned long pudval_t; 59typedef unsigned long pudval_t;
61typedef unsigned long pgdval_t; 60typedef unsigned long pgdval_t;
62typedef unsigned long pgprotval_t; 61typedef unsigned long pgprotval_t;
63typedef unsigned long phys_addr_t;
64 62
65typedef union { 63typedef union {
66 pteval_t pte; 64 pteval_t pte;
diff --git a/include/asm-x86/page_64.h b/include/asm-x86/page_64.h
index 5e64acfed0a4..49380b8c7e25 100644
--- a/include/asm-x86/page_64.h
+++ b/include/asm-x86/page_64.h
@@ -79,7 +79,6 @@ typedef unsigned long pmdval_t;
79typedef unsigned long pudval_t; 79typedef unsigned long pudval_t;
80typedef unsigned long pgdval_t; 80typedef unsigned long pgdval_t;
81typedef unsigned long pgprotval_t; 81typedef unsigned long pgprotval_t;
82typedef unsigned long phys_addr_t;
83 82
84typedef struct page *pgtable_t; 83typedef struct page *pgtable_t;
85 84
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index 182f9d4c570f..88a53b1a17f0 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -148,8 +148,13 @@
148#ifdef CONFIG_X86_64 148#ifdef CONFIG_X86_64
149#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC 149#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
150#else 150#else
151/*
152 * For PDE_IDENT_ATTR include USER bit. As the PDE and PTE protection
153 * bits are combined, this will alow user to access the high address mapped
154 * VDSO in the presence of CONFIG_COMPAT_VDSO
155 */
151#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */ 156#define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
152#define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */ 157#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
153#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ 158#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
154#endif 159#endif
155 160
diff --git a/include/asm-x86/pvclock.h b/include/asm-x86/pvclock.h
index 1a38f6834800..ad29e277fd6d 100644
--- a/include/asm-x86/pvclock.h
+++ b/include/asm-x86/pvclock.h
@@ -6,6 +6,7 @@
6 6
7/* some helper functions for xen and kvm pv clock sources */ 7/* some helper functions for xen and kvm pv clock sources */
8cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src); 8cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src);
9unsigned long pvclock_tsc_khz(struct pvclock_vcpu_time_info *src);
9void pvclock_read_wallclock(struct pvclock_wall_clock *wall, 10void pvclock_read_wallclock(struct pvclock_wall_clock *wall,
10 struct pvclock_vcpu_time_info *vcpu, 11 struct pvclock_vcpu_time_info *vcpu,
11 struct timespec *ts); 12 struct timespec *ts);
diff --git a/include/asm-x86/summit/apic.h b/include/asm-x86/summit/apic.h
index c5b2e4b10358..9b3070f1c2ac 100644
--- a/include/asm-x86/summit/apic.h
+++ b/include/asm-x86/summit/apic.h
@@ -22,7 +22,6 @@ static inline cpumask_t target_cpus(void)
22 */ 22 */
23 return cpumask_of_cpu(0); 23 return cpumask_of_cpu(0);
24} 24}
25#define TARGET_CPUS (target_cpus())
26 25
27#define INT_DELIVERY_MODE (dest_LowestPrio) 26#define INT_DELIVERY_MODE (dest_LowestPrio)
28#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ 27#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
@@ -160,7 +159,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
160 int new_apicid = cpu_to_logical_apicid(cpu); 159 int new_apicid = cpu_to_logical_apicid(cpu);
161 if (apicid_cluster(apicid) != 160 if (apicid_cluster(apicid) !=
162 apicid_cluster(new_apicid)){ 161 apicid_cluster(new_apicid)){
163 printk ("%s: Not a valid mask!\n",__FUNCTION__); 162 printk ("%s: Not a valid mask!\n", __func__);
164 return 0xFF; 163 return 0xFF;
165 } 164 }
166 apicid = apicid | new_apicid; 165 apicid = apicid | new_apicid;
diff --git a/include/asm-x86/summit/irq_vectors_limits.h b/include/asm-x86/summit/irq_vectors_limits.h
deleted file mode 100644
index 890ce3f5e09a..000000000000
--- a/include/asm-x86/summit/irq_vectors_limits.h
+++ /dev/null
@@ -1,14 +0,0 @@
1#ifndef _ASM_IRQ_VECTORS_LIMITS_H
2#define _ASM_IRQ_VECTORS_LIMITS_H
3
4/*
5 * For Summit or generic (i.e. installer) kernels, we have lots of I/O APICs,
6 * even with uni-proc kernels, so use a big array.
7 *
8 * This value should be the same in both the generic and summit subarches.
9 * Change one, change 'em both.
10 */
11#define NR_IRQS 224
12#define NR_IRQ_VECTORS 1024
13
14#endif /* _ASM_IRQ_VECTORS_LIMITS_H */
diff --git a/include/asm-x86/uv/bios.h b/include/asm-x86/uv/bios.h
index 7cd6d7ec1308..215f1969c266 100644
--- a/include/asm-x86/uv/bios.h
+++ b/include/asm-x86/uv/bios.h
@@ -2,9 +2,7 @@
2#define ASM_X86__UV__BIOS_H 2#define ASM_X86__UV__BIOS_H
3 3
4/* 4/*
5 * BIOS layer definitions. 5 * UV BIOS layer definitions.
6 *
7 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
8 * 6 *
9 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
@@ -19,50 +17,78 @@
19 * You should have received a copy of the GNU General Public License 17 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
22 * Copyright (c) Russ Anderson
22 */ 23 */
23 24
24#include <linux/rtc.h> 25#include <linux/rtc.h>
25 26
26#define BIOS_FREQ_BASE 0x01000001 27/*
28 * Values for the BIOS calls. It is passed as the first * argument in the
29 * BIOS call. Passing any other value in the first argument will result
30 * in a BIOS_STATUS_UNIMPLEMENTED return status.
31 */
32enum uv_bios_cmd {
33 UV_BIOS_COMMON,
34 UV_BIOS_GET_SN_INFO,
35 UV_BIOS_FREQ_BASE
36};
27 37
38/*
39 * Status values returned from a BIOS call.
40 */
28enum { 41enum {
29 BIOS_FREQ_BASE_PLATFORM = 0, 42 BIOS_STATUS_SUCCESS = 0,
30 BIOS_FREQ_BASE_INTERVAL_TIMER = 1, 43 BIOS_STATUS_UNIMPLEMENTED = -ENOSYS,
31 BIOS_FREQ_BASE_REALTIME_CLOCK = 2 44 BIOS_STATUS_EINVAL = -EINVAL,
45 BIOS_STATUS_UNAVAIL = -EBUSY
32}; 46};
33 47
34# define BIOS_CALL(result, a0, a1, a2, a3, a4, a5, a6, a7) \ 48/*
35 do { \ 49 * The UV system table describes specific firmware
36 /* XXX - the real call goes here */ \ 50 * capabilities available to the Linux kernel at runtime.
37 result.status = BIOS_STATUS_UNIMPLEMENTED; \ 51 */
38 isrv.v0 = 0; \ 52struct uv_systab {
39 isrv.v1 = 0; \ 53 char signature[4]; /* must be "UVST" */
40 } while (0) 54 u32 revision; /* distinguish different firmware revs */
55 u64 function; /* BIOS runtime callback function ptr */
56};
41 57
42enum { 58enum {
43 BIOS_STATUS_SUCCESS = 0, 59 BIOS_FREQ_BASE_PLATFORM = 0,
44 BIOS_STATUS_UNIMPLEMENTED = -1, 60 BIOS_FREQ_BASE_INTERVAL_TIMER = 1,
45 BIOS_STATUS_EINVAL = -2, 61 BIOS_FREQ_BASE_REALTIME_CLOCK = 2
46 BIOS_STATUS_ERROR = -3
47}; 62};
48 63
49struct uv_bios_retval { 64union partition_info_u {
50 /* 65 u64 val;
51 * A zero status value indicates call completed without error. 66 struct {
52 * A negative status value indicates reason of call failure. 67 u64 hub_version : 8,
53 * A positive status value indicates success but an 68 partition_id : 16,
54 * informational value should be printed (e.g., "reboot for 69 coherence_id : 16,
55 * change to take effect"). 70 region_size : 24;
56 */ 71 };
57 s64 status;
58 u64 v0;
59 u64 v1;
60 u64 v2;
61}; 72};
62 73
63extern long 74/*
64x86_bios_freq_base(unsigned long which, unsigned long *ticks_per_second, 75 * bios calls have 6 parameters
65 unsigned long *drift_info); 76 */
66extern const char *x86_bios_strerror(long status); 77extern s64 uv_bios_call(enum uv_bios_cmd, u64, u64, u64, u64, u64);
78extern s64 uv_bios_call_irqsave(enum uv_bios_cmd, u64, u64, u64, u64, u64);
79extern s64 uv_bios_call_reentrant(enum uv_bios_cmd, u64, u64, u64, u64, u64);
80
81extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *);
82extern s64 uv_bios_freq_base(u64, u64 *);
83
84extern void uv_bios_init(void);
85
86extern int uv_type;
87extern long sn_partition_id;
88extern long uv_coherency_id;
89extern long uv_region_size;
90#define partition_coherence_id() (uv_coherency_id)
91
92extern struct kobject *sgi_uv_kobj; /* /sys/firmware/sgi_uv */
67 93
68#endif /* ASM_X86__UV__BIOS_H */ 94#endif /* ASM_X86__UV__BIOS_H */
diff --git a/include/asm-x86/uv/uv_irq.h b/include/asm-x86/uv/uv_irq.h
new file mode 100644
index 000000000000..8bf5f32da9c6
--- /dev/null
+++ b/include/asm-x86/uv/uv_irq.h
@@ -0,0 +1,36 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * SGI UV IRQ definitions
7 *
8 * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
9 */
10
11#ifndef ASM_X86__UV__UV_IRQ_H
12#define ASM_X86__UV__UV_IRQ_H
13
14/* If a generic version of this structure gets defined, eliminate this one. */
15struct uv_IO_APIC_route_entry {
16 __u64 vector : 8,
17 delivery_mode : 3,
18 dest_mode : 1,
19 delivery_status : 1,
20 polarity : 1,
21 __reserved_1 : 1,
22 trigger : 1,
23 mask : 1,
24 __reserved_2 : 15,
25 dest : 32;
26};
27
28extern struct irq_chip uv_irq_chip;
29
30extern int arch_enable_uv_irq(char *, unsigned int, int, int, unsigned long);
31extern void arch_disable_uv_irq(int, unsigned long);
32
33extern int uv_setup_irq(char *, int, int, unsigned long);
34extern void uv_teardown_irq(unsigned int, int, unsigned long);
35
36#endif /* ASM_X86__UV__UV_IRQ_H */
diff --git a/include/asm-x86/xen/page.h b/include/asm-x86/xen/page.h
index c50185dccec1..d5eada0a48d9 100644
--- a/include/asm-x86/xen/page.h
+++ b/include/asm-x86/xen/page.h
@@ -76,13 +76,13 @@ static inline unsigned long mfn_to_pfn(unsigned long mfn)
76static inline xmaddr_t phys_to_machine(xpaddr_t phys) 76static inline xmaddr_t phys_to_machine(xpaddr_t phys)
77{ 77{
78 unsigned offset = phys.paddr & ~PAGE_MASK; 78 unsigned offset = phys.paddr & ~PAGE_MASK;
79 return XMADDR(PFN_PHYS((u64)pfn_to_mfn(PFN_DOWN(phys.paddr))) | offset); 79 return XMADDR(PFN_PHYS(pfn_to_mfn(PFN_DOWN(phys.paddr))) | offset);
80} 80}
81 81
82static inline xpaddr_t machine_to_phys(xmaddr_t machine) 82static inline xpaddr_t machine_to_phys(xmaddr_t machine)
83{ 83{
84 unsigned offset = machine.maddr & ~PAGE_MASK; 84 unsigned offset = machine.maddr & ~PAGE_MASK;
85 return XPADDR(PFN_PHYS((u64)mfn_to_pfn(PFN_DOWN(machine.maddr))) | offset); 85 return XPADDR(PFN_PHYS(mfn_to_pfn(PFN_DOWN(machine.maddr))) | offset);
86} 86}
87 87
88/* 88/*
diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h
index ca6e5101a2cb..c3f53e755ca5 100644
--- a/include/asm-xtensa/elf.h
+++ b/include/asm-xtensa/elf.h
@@ -189,7 +189,7 @@ typedef struct {
189#endif 189#endif
190} elf_xtregs_t; 190} elf_xtregs_t;
191 191
192#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) 192#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT)
193 193
194struct task_struct; 194struct task_struct;
195 195
diff --git a/include/asm-xtensa/thread_info.h b/include/asm-xtensa/thread_info.h
index 7e4131dd546c..0f4fe1faf9ba 100644
--- a/include/asm-xtensa/thread_info.h
+++ b/include/asm-xtensa/thread_info.h
@@ -134,6 +134,7 @@ static inline struct thread_info *current_thread_info(void)
134#define TIF_MEMDIE 5 134#define TIF_MEMDIE 5
135#define TIF_RESTORE_SIGMASK 6 /* restore signal mask in do_signal() */ 135#define TIF_RESTORE_SIGMASK 6 /* restore signal mask in do_signal() */
136#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 136#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
137#define TIF_FREEZE 17 /* is freezing for suspend */
137 138
138#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 139#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
139#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 140#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
@@ -142,6 +143,7 @@ static inline struct thread_info *current_thread_info(void)
142#define _TIF_IRET (1<<TIF_IRET) 143#define _TIF_IRET (1<<TIF_IRET)
143#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 144#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
144#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 145#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
146#define _TIF_FREEZE (1<<TIF_FREEZE)
145 147
146#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 148#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
147#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */ 149#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 38d3c6b8276a..f46ba4b57da4 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -36,7 +36,6 @@
36#ifndef _DRM_H_ 36#ifndef _DRM_H_
37#define _DRM_H_ 37#define _DRM_H_
38 38
39#if defined(__linux__)
40#if defined(__KERNEL__) 39#if defined(__KERNEL__)
41#endif 40#endif
42#include <asm/ioctl.h> /* For _IO* macros */ 41#include <asm/ioctl.h> /* For _IO* macros */
@@ -46,22 +45,6 @@
46#define DRM_IOC_WRITE _IOC_WRITE 45#define DRM_IOC_WRITE _IOC_WRITE
47#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 46#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
48#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 47#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
49#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)
50#if defined(__FreeBSD__) && defined(IN_MODULE)
51/* Prevent name collision when including sys/ioccom.h */
52#undef ioctl
53#include <sys/ioccom.h>
54#define ioctl(a,b,c) xf86ioctl(a,b,c)
55#else
56#include <sys/ioccom.h>
57#endif /* __FreeBSD__ && xf86ioctl */
58#define DRM_IOCTL_NR(n) ((n) & 0xff)
59#define DRM_IOC_VOID IOC_VOID
60#define DRM_IOC_READ IOC_OUT
61#define DRM_IOC_WRITE IOC_IN
62#define DRM_IOC_READWRITE IOC_INOUT
63#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
64#endif
65 48
66#define DRM_MAJOR 226 49#define DRM_MAJOR 226
67#define DRM_MAX_MINOR 15 50#define DRM_MAX_MINOR 15
@@ -471,6 +454,7 @@ struct drm_irq_busid {
471enum drm_vblank_seq_type { 454enum drm_vblank_seq_type {
472 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 455 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
473 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 456 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
457 _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
474 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 458 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
475 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 459 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
476 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */ 460 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
@@ -503,6 +487,19 @@ union drm_wait_vblank {
503 struct drm_wait_vblank_reply reply; 487 struct drm_wait_vblank_reply reply;
504}; 488};
505 489
490#define _DRM_PRE_MODESET 1
491#define _DRM_POST_MODESET 2
492
493/**
494 * DRM_IOCTL_MODESET_CTL ioctl argument type
495 *
496 * \sa drmModesetCtl().
497 */
498struct drm_modeset_ctl {
499 uint32_t crtc;
500 uint32_t cmd;
501};
502
506/** 503/**
507 * DRM_IOCTL_AGP_ENABLE ioctl argument type. 504 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
508 * 505 *
@@ -573,6 +570,34 @@ struct drm_set_version {
573 int drm_dd_minor; 570 int drm_dd_minor;
574}; 571};
575 572
573/** DRM_IOCTL_GEM_CLOSE ioctl argument type */
574struct drm_gem_close {
575 /** Handle of the object to be closed. */
576 uint32_t handle;
577 uint32_t pad;
578};
579
580/** DRM_IOCTL_GEM_FLINK ioctl argument type */
581struct drm_gem_flink {
582 /** Handle for the object being named */
583 uint32_t handle;
584
585 /** Returned global name */
586 uint32_t name;
587};
588
589/** DRM_IOCTL_GEM_OPEN ioctl argument type */
590struct drm_gem_open {
591 /** Name of object being opened */
592 uint32_t name;
593
594 /** Returned handle for the object */
595 uint32_t handle;
596
597 /** Returned size of the object */
598 uint64_t size;
599};
600
576#define DRM_IOCTL_BASE 'd' 601#define DRM_IOCTL_BASE 'd'
577#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 602#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
578#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 603#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
@@ -587,6 +612,10 @@ struct drm_set_version {
587#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) 612#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
588#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) 613#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
589#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) 614#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
615#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
616#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
617#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
618#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
590 619
591#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) 620#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
592#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) 621#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 1c1b13e29223..59c796b46ee7 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -104,6 +104,7 @@ struct drm_device;
104#define DRIVER_DMA_QUEUE 0x200 104#define DRIVER_DMA_QUEUE 0x200
105#define DRIVER_FB_DMA 0x400 105#define DRIVER_FB_DMA 0x400
106#define DRIVER_IRQ_VBL2 0x800 106#define DRIVER_IRQ_VBL2 0x800
107#define DRIVER_GEM 0x1000
107 108
108/***********************************************************************/ 109/***********************************************************************/
109/** \name Begin the DRM... */ 110/** \name Begin the DRM... */
@@ -387,6 +388,10 @@ struct drm_file {
387 struct drm_minor *minor; 388 struct drm_minor *minor;
388 int remove_auth_on_close; 389 int remove_auth_on_close;
389 unsigned long lock_count; 390 unsigned long lock_count;
391 /** Mapping of mm object handles to object pointers. */
392 struct idr object_idr;
393 /** Lock for synchronization of access to object_idr. */
394 spinlock_t table_lock;
390 struct file *filp; 395 struct file *filp;
391 void *driver_priv; 396 void *driver_priv;
392}; 397};
@@ -558,6 +563,56 @@ struct drm_ati_pcigart_info {
558}; 563};
559 564
560/** 565/**
566 * This structure defines the drm_mm memory object, which will be used by the
567 * DRM for its buffer objects.
568 */
569struct drm_gem_object {
570 /** Reference count of this object */
571 struct kref refcount;
572
573 /** Handle count of this object. Each handle also holds a reference */
574 struct kref handlecount;
575
576 /** Related drm device */
577 struct drm_device *dev;
578
579 /** File representing the shmem storage */
580 struct file *filp;
581
582 /**
583 * Size of the object, in bytes. Immutable over the object's
584 * lifetime.
585 */
586 size_t size;
587
588 /**
589 * Global name for this object, starts at 1. 0 means unnamed.
590 * Access is covered by the object_name_lock in the related drm_device
591 */
592 int name;
593
594 /**
595 * Memory domains. These monitor which caches contain read/write data
596 * related to the object. When transitioning from one set of domains
597 * to another, the driver is called to ensure that caches are suitably
598 * flushed and invalidated
599 */
600 uint32_t read_domains;
601 uint32_t write_domain;
602
603 /**
604 * While validating an exec operation, the
605 * new read/write domain values are computed here.
606 * They will be transferred to the above values
607 * at the point that any cache flushing occurs
608 */
609 uint32_t pending_read_domains;
610 uint32_t pending_write_domain;
611
612 void *driver_private;
613};
614
615/**
561 * DRM driver structure. This structure represent the common code for 616 * DRM driver structure. This structure represent the common code for
562 * a family of cards. There will one drm_device for each card present 617 * a family of cards. There will one drm_device for each card present
563 * in this family 618 * in this family
@@ -580,11 +635,54 @@ struct drm_driver {
580 int (*kernel_context_switch) (struct drm_device *dev, int old, 635 int (*kernel_context_switch) (struct drm_device *dev, int old,
581 int new); 636 int new);
582 void (*kernel_context_switch_unlock) (struct drm_device *dev); 637 void (*kernel_context_switch_unlock) (struct drm_device *dev);
583 int (*vblank_wait) (struct drm_device *dev, unsigned int *sequence);
584 int (*vblank_wait2) (struct drm_device *dev, unsigned int *sequence);
585 int (*dri_library_name) (struct drm_device *dev, char *buf); 638 int (*dri_library_name) (struct drm_device *dev, char *buf);
586 639
587 /** 640 /**
641 * get_vblank_counter - get raw hardware vblank counter
642 * @dev: DRM device
643 * @crtc: counter to fetch
644 *
645 * Driver callback for fetching a raw hardware vblank counter
646 * for @crtc. If a device doesn't have a hardware counter, the
647 * driver can simply return the value of drm_vblank_count and
648 * make the enable_vblank() and disable_vblank() hooks into no-ops,
649 * leaving interrupts enabled at all times.
650 *
651 * Wraparound handling and loss of events due to modesetting is dealt
652 * with in the DRM core code.
653 *
654 * RETURNS
655 * Raw vblank counter value.
656 */
657 u32 (*get_vblank_counter) (struct drm_device *dev, int crtc);
658
659 /**
660 * enable_vblank - enable vblank interrupt events
661 * @dev: DRM device
662 * @crtc: which irq to enable
663 *
664 * Enable vblank interrupts for @crtc. If the device doesn't have
665 * a hardware vblank counter, this routine should be a no-op, since
666 * interrupts will have to stay on to keep the count accurate.
667 *
668 * RETURNS
669 * Zero on success, appropriate errno if the given @crtc's vblank
670 * interrupt cannot be enabled.
671 */
672 int (*enable_vblank) (struct drm_device *dev, int crtc);
673
674 /**
675 * disable_vblank - disable vblank interrupt events
676 * @dev: DRM device
677 * @crtc: which irq to enable
678 *
679 * Disable vblank interrupts for @crtc. If the device doesn't have
680 * a hardware vblank counter, this routine should be a no-op, since
681 * interrupts will have to stay on to keep the count accurate.
682 */
683 void (*disable_vblank) (struct drm_device *dev, int crtc);
684
685 /**
588 * Called by \c drm_device_is_agp. Typically used to determine if a 686 * Called by \c drm_device_is_agp. Typically used to determine if a
589 * card is really attached to AGP or not. 687 * card is really attached to AGP or not.
590 * 688 *
@@ -601,7 +699,7 @@ struct drm_driver {
601 699
602 irqreturn_t(*irq_handler) (DRM_IRQ_ARGS); 700 irqreturn_t(*irq_handler) (DRM_IRQ_ARGS);
603 void (*irq_preinstall) (struct drm_device *dev); 701 void (*irq_preinstall) (struct drm_device *dev);
604 void (*irq_postinstall) (struct drm_device *dev); 702 int (*irq_postinstall) (struct drm_device *dev);
605 void (*irq_uninstall) (struct drm_device *dev); 703 void (*irq_uninstall) (struct drm_device *dev);
606 void (*reclaim_buffers) (struct drm_device *dev, 704 void (*reclaim_buffers) (struct drm_device *dev,
607 struct drm_file * file_priv); 705 struct drm_file * file_priv);
@@ -614,6 +712,18 @@ struct drm_driver {
614 void (*set_version) (struct drm_device *dev, 712 void (*set_version) (struct drm_device *dev,
615 struct drm_set_version *sv); 713 struct drm_set_version *sv);
616 714
715 int (*proc_init)(struct drm_minor *minor);
716 void (*proc_cleanup)(struct drm_minor *minor);
717
718 /**
719 * Driver-specific constructor for drm_gem_objects, to set up
720 * obj->driver_private.
721 *
722 * Returns 0 on success.
723 */
724 int (*gem_init_object) (struct drm_gem_object *obj);
725 void (*gem_free_object) (struct drm_gem_object *obj);
726
617 int major; 727 int major;
618 int minor; 728 int minor;
619 int patchlevel; 729 int patchlevel;
@@ -714,7 +824,6 @@ struct drm_device {
714 824
715 /** \name Context support */ 825 /** \name Context support */
716 /*@{ */ 826 /*@{ */
717 int irq; /**< Interrupt used by board */
718 int irq_enabled; /**< True if irq handler is enabled */ 827 int irq_enabled; /**< True if irq handler is enabled */
719 __volatile__ long context_flag; /**< Context swapping flag */ 828 __volatile__ long context_flag; /**< Context swapping flag */
720 __volatile__ long interrupt_flag; /**< Interruption handler flag */ 829 __volatile__ long interrupt_flag; /**< Interruption handler flag */
@@ -730,13 +839,28 @@ struct drm_device {
730 /** \name VBLANK IRQ support */ 839 /** \name VBLANK IRQ support */
731 /*@{ */ 840 /*@{ */
732 841
733 wait_queue_head_t vbl_queue; /**< VBLANK wait queue */ 842 /*
734 atomic_t vbl_received; 843 * At load time, disabling the vblank interrupt won't be allowed since
735 atomic_t vbl_received2; /**< number of secondary VBLANK interrupts */ 844 * old clients may not call the modeset ioctl and therefore misbehave.
845 * Once the modeset ioctl *has* been called though, we can safely
846 * disable them when unused.
847 */
848 int vblank_disable_allowed;
849
850 wait_queue_head_t *vbl_queue; /**< VBLANK wait queue */
851 atomic_t *_vblank_count; /**< number of VBLANK interrupts (driver must alloc the right number of counters) */
736 spinlock_t vbl_lock; 852 spinlock_t vbl_lock;
737 struct list_head vbl_sigs; /**< signal list to send on VBLANK */ 853 struct list_head *vbl_sigs; /**< signal list to send on VBLANK */
738 struct list_head vbl_sigs2; /**< signals to send on secondary VBLANK */ 854 atomic_t vbl_signal_pending; /* number of signals pending on all crtcs*/
739 unsigned int vbl_pending; 855 atomic_t *vblank_refcount; /* number of users of vblank interruptsper crtc */
856 u32 *last_vblank; /* protected by dev->vbl_lock, used */
857 /* for wraparound handling */
858 int *vblank_enabled; /* so we don't call enable more than
859 once per disable */
860 int *vblank_inmodeset; /* Display driver is setting mode */
861 struct timer_list vblank_disable_timer;
862
863 u32 max_vblank_count; /**< size of vblank counter register */
740 spinlock_t tasklet_lock; /**< For drm_locked_tasklet */ 864 spinlock_t tasklet_lock; /**< For drm_locked_tasklet */
741 void (*locked_tasklet_func)(struct drm_device *dev); 865 void (*locked_tasklet_func)(struct drm_device *dev);
742 866
@@ -757,6 +881,7 @@ struct drm_device {
757 struct pci_controller *hose; 881 struct pci_controller *hose;
758#endif 882#endif
759 struct drm_sg_mem *sg; /**< Scatter gather memory */ 883 struct drm_sg_mem *sg; /**< Scatter gather memory */
884 int num_crtcs; /**< Number of CRTCs on this device */
760 void *dev_private; /**< device private data */ 885 void *dev_private; /**< device private data */
761 struct drm_sigdata sigdata; /**< For block_all_signals */ 886 struct drm_sigdata sigdata; /**< For block_all_signals */
762 sigset_t sigmask; 887 sigset_t sigmask;
@@ -771,8 +896,29 @@ struct drm_device {
771 spinlock_t drw_lock; 896 spinlock_t drw_lock;
772 struct idr drw_idr; 897 struct idr drw_idr;
773 /*@} */ 898 /*@} */
899
900 /** \name GEM information */
901 /*@{ */
902 spinlock_t object_name_lock;
903 struct idr object_name_idr;
904 atomic_t object_count;
905 atomic_t object_memory;
906 atomic_t pin_count;
907 atomic_t pin_memory;
908 atomic_t gtt_count;
909 atomic_t gtt_memory;
910 uint32_t gtt_total;
911 uint32_t invalidate_domains; /* domains pending invalidation */
912 uint32_t flush_domains; /* domains pending flush */
913 /*@} */
914
774}; 915};
775 916
917static inline int drm_dev_to_irq(struct drm_device *dev)
918{
919 return dev->pdev->irq;
920}
921
776static __inline__ int drm_core_check_feature(struct drm_device *dev, 922static __inline__ int drm_core_check_feature(struct drm_device *dev,
777 int feature) 923 int feature)
778{ 924{
@@ -867,6 +1013,11 @@ extern void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area);
867extern DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type); 1013extern DRM_AGP_MEM *drm_alloc_agp(struct drm_device *dev, int pages, u32 type);
868extern int drm_free_agp(DRM_AGP_MEM * handle, int pages); 1014extern int drm_free_agp(DRM_AGP_MEM * handle, int pages);
869extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start); 1015extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start);
1016extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
1017 struct page **pages,
1018 unsigned long num_pages,
1019 uint32_t gtt_offset,
1020 uint32_t type);
870extern int drm_unbind_agp(DRM_AGP_MEM * handle); 1021extern int drm_unbind_agp(DRM_AGP_MEM * handle);
871 1022
872 /* Misc. IOCTL support (drm_ioctl.h) */ 1023 /* Misc. IOCTL support (drm_ioctl.h) */
@@ -929,6 +1080,9 @@ extern int drm_getmagic(struct drm_device *dev, void *data,
929extern int drm_authmagic(struct drm_device *dev, void *data, 1080extern int drm_authmagic(struct drm_device *dev, void *data,
930 struct drm_file *file_priv); 1081 struct drm_file *file_priv);
931 1082
1083/* Cache management (drm_cache.c) */
1084void drm_clflush_pages(struct page *pages[], unsigned long num_pages);
1085
932 /* Locking IOCTL support (drm_lock.h) */ 1086 /* Locking IOCTL support (drm_lock.h) */
933extern int drm_lock(struct drm_device *dev, void *data, 1087extern int drm_lock(struct drm_device *dev, void *data,
934 struct drm_file *file_priv); 1088 struct drm_file *file_priv);
@@ -985,15 +1139,25 @@ extern void drm_core_reclaim_buffers(struct drm_device *dev,
985extern int drm_control(struct drm_device *dev, void *data, 1139extern int drm_control(struct drm_device *dev, void *data,
986 struct drm_file *file_priv); 1140 struct drm_file *file_priv);
987extern irqreturn_t drm_irq_handler(DRM_IRQ_ARGS); 1141extern irqreturn_t drm_irq_handler(DRM_IRQ_ARGS);
1142extern int drm_irq_install(struct drm_device *dev);
988extern int drm_irq_uninstall(struct drm_device *dev); 1143extern int drm_irq_uninstall(struct drm_device *dev);
989extern void drm_driver_irq_preinstall(struct drm_device *dev); 1144extern void drm_driver_irq_preinstall(struct drm_device *dev);
990extern void drm_driver_irq_postinstall(struct drm_device *dev); 1145extern void drm_driver_irq_postinstall(struct drm_device *dev);
991extern void drm_driver_irq_uninstall(struct drm_device *dev); 1146extern void drm_driver_irq_uninstall(struct drm_device *dev);
992 1147
1148extern int drm_vblank_init(struct drm_device *dev, int num_crtcs);
993extern int drm_wait_vblank(struct drm_device *dev, void *data, 1149extern int drm_wait_vblank(struct drm_device *dev, void *data,
994 struct drm_file *file_priv); 1150 struct drm_file *filp);
995extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq); 1151extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq);
996extern void drm_vbl_send_signals(struct drm_device *dev); 1152extern void drm_locked_tasklet(struct drm_device *dev,
1153 void(*func)(struct drm_device *));
1154extern u32 drm_vblank_count(struct drm_device *dev, int crtc);
1155extern void drm_handle_vblank(struct drm_device *dev, int crtc);
1156extern int drm_vblank_get(struct drm_device *dev, int crtc);
1157extern void drm_vblank_put(struct drm_device *dev, int crtc);
1158/* Modesetting support */
1159extern int drm_modeset_ctl(struct drm_device *dev, void *data,
1160 struct drm_file *file_priv);
997extern void drm_locked_tasklet(struct drm_device *dev, void(*func)(struct drm_device*)); 1161extern void drm_locked_tasklet(struct drm_device *dev, void(*func)(struct drm_device*));
998 1162
999 /* AGP/GART support (drm_agpsupport.h) */ 1163 /* AGP/GART support (drm_agpsupport.h) */
@@ -1026,6 +1190,7 @@ extern DRM_AGP_MEM *drm_agp_allocate_memory(struct agp_bridge_data *bridge, size
1026extern int drm_agp_free_memory(DRM_AGP_MEM * handle); 1190extern int drm_agp_free_memory(DRM_AGP_MEM * handle);
1027extern int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start); 1191extern int drm_agp_bind_memory(DRM_AGP_MEM * handle, off_t start);
1028extern int drm_agp_unbind_memory(DRM_AGP_MEM * handle); 1192extern int drm_agp_unbind_memory(DRM_AGP_MEM * handle);
1193extern void drm_agp_chipset_flush(struct drm_device *dev);
1029 1194
1030 /* Stub support (drm_stub.h) */ 1195 /* Stub support (drm_stub.h) */
1031extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent, 1196extern int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
@@ -1088,6 +1253,66 @@ extern unsigned long drm_mm_tail_space(struct drm_mm *mm);
1088extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size); 1253extern int drm_mm_remove_space_from_tail(struct drm_mm *mm, unsigned long size);
1089extern int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size); 1254extern int drm_mm_add_space_to_tail(struct drm_mm *mm, unsigned long size);
1090 1255
1256/* Graphics Execution Manager library functions (drm_gem.c) */
1257int drm_gem_init(struct drm_device *dev);
1258void drm_gem_object_free(struct kref *kref);
1259struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev,
1260 size_t size);
1261void drm_gem_object_handle_free(struct kref *kref);
1262
1263static inline void
1264drm_gem_object_reference(struct drm_gem_object *obj)
1265{
1266 kref_get(&obj->refcount);
1267}
1268
1269static inline void
1270drm_gem_object_unreference(struct drm_gem_object *obj)
1271{
1272 if (obj == NULL)
1273 return;
1274
1275 kref_put(&obj->refcount, drm_gem_object_free);
1276}
1277
1278int drm_gem_handle_create(struct drm_file *file_priv,
1279 struct drm_gem_object *obj,
1280 int *handlep);
1281
1282static inline void
1283drm_gem_object_handle_reference(struct drm_gem_object *obj)
1284{
1285 drm_gem_object_reference(obj);
1286 kref_get(&obj->handlecount);
1287}
1288
1289static inline void
1290drm_gem_object_handle_unreference(struct drm_gem_object *obj)
1291{
1292 if (obj == NULL)
1293 return;
1294
1295 /*
1296 * Must bump handle count first as this may be the last
1297 * ref, in which case the object would disappear before we
1298 * checked for a name
1299 */
1300 kref_put(&obj->handlecount, drm_gem_object_handle_free);
1301 drm_gem_object_unreference(obj);
1302}
1303
1304struct drm_gem_object *drm_gem_object_lookup(struct drm_device *dev,
1305 struct drm_file *filp,
1306 int handle);
1307int drm_gem_close_ioctl(struct drm_device *dev, void *data,
1308 struct drm_file *file_priv);
1309int drm_gem_flink_ioctl(struct drm_device *dev, void *data,
1310 struct drm_file *file_priv);
1311int drm_gem_open_ioctl(struct drm_device *dev, void *data,
1312 struct drm_file *file_priv);
1313void drm_gem_open(struct drm_device *dev, struct drm_file *file_private);
1314void drm_gem_release(struct drm_device *dev, struct drm_file *file_private);
1315
1091extern void drm_core_ioremap(struct drm_map *map, struct drm_device *dev); 1316extern void drm_core_ioremap(struct drm_map *map, struct drm_device *dev);
1092extern void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev); 1317extern void drm_core_ioremap_wc(struct drm_map *map, struct drm_device *dev);
1093extern void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev); 1318extern void drm_core_ioremapfree(struct drm_map *map, struct drm_device *dev);
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index 135bd19499fc..da04109741e8 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -84,18 +84,18 @@
84 {0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ 84 {0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
85 {0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ 85 {0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
86 {0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 86 {0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
87 {0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 87 {0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
88 {0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 88 {0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
89 {0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 89 {0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
90 {0x1002, 0x554B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 90 {0x1002, 0x554B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
91 {0x1002, 0x554C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 91 {0x1002, 0x554C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
92 {0x1002, 0x554D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 92 {0x1002, 0x554D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
93 {0x1002, 0x554E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 93 {0x1002, 0x554E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
94 {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 94 {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
95 {0x1002, 0x5550, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 95 {0x1002, 0x5550, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
96 {0x1002, 0x5551, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 96 {0x1002, 0x5551, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
97 {0x1002, 0x5552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 97 {0x1002, 0x5552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
98 {0x1002, 0x5554, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 98 {0x1002, 0x5554, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
99 {0x1002, 0x564A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 99 {0x1002, 0x564A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
100 {0x1002, 0x564B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 100 {0x1002, 0x564B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
101 {0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 101 {0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
@@ -113,8 +113,10 @@
113 {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 113 {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
114 {0x1002, 0x5965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ 114 {0x1002, 0x5965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
115 {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ 115 {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \
116 {0x1002, 0x5a61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ 116 {0x1002, 0x5a41, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART}, \
117 {0x1002, 0x5a62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ 117 {0x1002, 0x5a42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
118 {0x1002, 0x5a61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART}, \
119 {0x1002, 0x5a62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
118 {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 120 {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
119 {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 121 {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
120 {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 122 {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
@@ -122,16 +124,16 @@
122 {0x1002, 0x5b65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ 124 {0x1002, 0x5b65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
123 {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ 125 {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \
124 {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ 126 {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \
125 {0x1002, 0x5d48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 127 {0x1002, 0x5d48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
126 {0x1002, 0x5d49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 128 {0x1002, 0x5d49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
127 {0x1002, 0x5d4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 129 {0x1002, 0x5d4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
128 {0x1002, 0x5d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 130 {0x1002, 0x5d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
129 {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 131 {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
130 {0x1002, 0x5d4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 132 {0x1002, 0x5d4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
131 {0x1002, 0x5d4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 133 {0x1002, 0x5d4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
132 {0x1002, 0x5d50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 134 {0x1002, 0x5d50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
133 {0x1002, 0x5d52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 135 {0x1002, 0x5d52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
134 {0x1002, 0x5d57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ 136 {0x1002, 0x5d57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \
135 {0x1002, 0x5e48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 137 {0x1002, 0x5e48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
136 {0x1002, 0x5e4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 138 {0x1002, 0x5e4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
137 {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ 139 {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
@@ -237,6 +239,10 @@
237 {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ 239 {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
238 {0x1002, 0x791e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ 240 {0x1002, 0x791e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
239 {0x1002, 0x791f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ 241 {0x1002, 0x791f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
242 {0x1002, 0x796c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
243 {0x1002, 0x796d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
244 {0x1002, 0x796e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
245 {0x1002, 0x796f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
240 {0, 0, 0} 246 {0, 0, 0}
241 247
242#define r128_PCI_IDS \ 248#define r128_PCI_IDS \
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 05c66cf03a9e..eb4b35031a55 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -143,6 +143,22 @@ typedef struct _drm_i915_sarea {
143#define DRM_I915_GET_VBLANK_PIPE 0x0e 143#define DRM_I915_GET_VBLANK_PIPE 0x0e
144#define DRM_I915_VBLANK_SWAP 0x0f 144#define DRM_I915_VBLANK_SWAP 0x0f
145#define DRM_I915_HWS_ADDR 0x11 145#define DRM_I915_HWS_ADDR 0x11
146#define DRM_I915_GEM_INIT 0x13
147#define DRM_I915_GEM_EXECBUFFER 0x14
148#define DRM_I915_GEM_PIN 0x15
149#define DRM_I915_GEM_UNPIN 0x16
150#define DRM_I915_GEM_BUSY 0x17
151#define DRM_I915_GEM_THROTTLE 0x18
152#define DRM_I915_GEM_ENTERVT 0x19
153#define DRM_I915_GEM_LEAVEVT 0x1a
154#define DRM_I915_GEM_CREATE 0x1b
155#define DRM_I915_GEM_PREAD 0x1c
156#define DRM_I915_GEM_PWRITE 0x1d
157#define DRM_I915_GEM_MMAP 0x1e
158#define DRM_I915_GEM_SET_DOMAIN 0x1f
159#define DRM_I915_GEM_SW_FINISH 0x20
160#define DRM_I915_GEM_SET_TILING 0x21
161#define DRM_I915_GEM_GET_TILING 0x22
146 162
147#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 163#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
148#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 164#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -160,6 +176,20 @@ typedef struct _drm_i915_sarea {
160#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t) 176#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
161#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t) 177#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t)
162#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) 178#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t)
179#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin)
180#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin)
181#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy)
182#define DRM_IOCTL_I915_GEM_THROTTLE DRM_IO ( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE)
183#define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
184#define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
185#define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
186#define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
187#define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
188#define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
189#define DRM_IOCTL_I915_GEM_SET_DOMAIN DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SET_DOMAIN, struct drm_i915_gem_set_domain)
190#define DRM_IOCTL_I915_GEM_SW_FINISH DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SW_FINISH, struct drm_i915_gem_sw_finish)
191#define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling)
192#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling)
163 193
164/* Allow drivers to submit batchbuffers directly to hardware, relying 194/* Allow drivers to submit batchbuffers directly to hardware, relying
165 * on the security mechanisms provided by hardware. 195 * on the security mechanisms provided by hardware.
@@ -200,6 +230,8 @@ typedef struct drm_i915_irq_wait {
200#define I915_PARAM_IRQ_ACTIVE 1 230#define I915_PARAM_IRQ_ACTIVE 1
201#define I915_PARAM_ALLOW_BATCHBUFFER 2 231#define I915_PARAM_ALLOW_BATCHBUFFER 2
202#define I915_PARAM_LAST_DISPATCH 3 232#define I915_PARAM_LAST_DISPATCH 3
233#define I915_PARAM_CHIPSET_ID 4
234#define I915_PARAM_HAS_GEM 5
203 235
204typedef struct drm_i915_getparam { 236typedef struct drm_i915_getparam {
205 int param; 237 int param;
@@ -267,4 +299,305 @@ typedef struct drm_i915_hws_addr {
267 uint64_t addr; 299 uint64_t addr;
268} drm_i915_hws_addr_t; 300} drm_i915_hws_addr_t;
269 301
302struct drm_i915_gem_init {
303 /**
304 * Beginning offset in the GTT to be managed by the DRM memory
305 * manager.
306 */
307 uint64_t gtt_start;
308 /**
309 * Ending offset in the GTT to be managed by the DRM memory
310 * manager.
311 */
312 uint64_t gtt_end;
313};
314
315struct drm_i915_gem_create {
316 /**
317 * Requested size for the object.
318 *
319 * The (page-aligned) allocated size for the object will be returned.
320 */
321 uint64_t size;
322 /**
323 * Returned handle for the object.
324 *
325 * Object handles are nonzero.
326 */
327 uint32_t handle;
328 uint32_t pad;
329};
330
331struct drm_i915_gem_pread {
332 /** Handle for the object being read. */
333 uint32_t handle;
334 uint32_t pad;
335 /** Offset into the object to read from */
336 uint64_t offset;
337 /** Length of data to read */
338 uint64_t size;
339 /**
340 * Pointer to write the data into.
341 *
342 * This is a fixed-size type for 32/64 compatibility.
343 */
344 uint64_t data_ptr;
345};
346
347struct drm_i915_gem_pwrite {
348 /** Handle for the object being written to. */
349 uint32_t handle;
350 uint32_t pad;
351 /** Offset into the object to write to */
352 uint64_t offset;
353 /** Length of data to write */
354 uint64_t size;
355 /**
356 * Pointer to read the data from.
357 *
358 * This is a fixed-size type for 32/64 compatibility.
359 */
360 uint64_t data_ptr;
361};
362
363struct drm_i915_gem_mmap {
364 /** Handle for the object being mapped. */
365 uint32_t handle;
366 uint32_t pad;
367 /** Offset in the object to map. */
368 uint64_t offset;
369 /**
370 * Length of data to map.
371 *
372 * The value will be page-aligned.
373 */
374 uint64_t size;
375 /**
376 * Returned pointer the data was mapped at.
377 *
378 * This is a fixed-size type for 32/64 compatibility.
379 */
380 uint64_t addr_ptr;
381};
382
383struct drm_i915_gem_set_domain {
384 /** Handle for the object */
385 uint32_t handle;
386
387 /** New read domains */
388 uint32_t read_domains;
389
390 /** New write domain */
391 uint32_t write_domain;
392};
393
394struct drm_i915_gem_sw_finish {
395 /** Handle for the object */
396 uint32_t handle;
397};
398
399struct drm_i915_gem_relocation_entry {
400 /**
401 * Handle of the buffer being pointed to by this relocation entry.
402 *
403 * It's appealing to make this be an index into the mm_validate_entry
404 * list to refer to the buffer, but this allows the driver to create
405 * a relocation list for state buffers and not re-write it per
406 * exec using the buffer.
407 */
408 uint32_t target_handle;
409
410 /**
411 * Value to be added to the offset of the target buffer to make up
412 * the relocation entry.
413 */
414 uint32_t delta;
415
416 /** Offset in the buffer the relocation entry will be written into */
417 uint64_t offset;
418
419 /**
420 * Offset value of the target buffer that the relocation entry was last
421 * written as.
422 *
423 * If the buffer has the same offset as last time, we can skip syncing
424 * and writing the relocation. This value is written back out by
425 * the execbuffer ioctl when the relocation is written.
426 */
427 uint64_t presumed_offset;
428
429 /**
430 * Target memory domains read by this operation.
431 */
432 uint32_t read_domains;
433
434 /**
435 * Target memory domains written by this operation.
436 *
437 * Note that only one domain may be written by the whole
438 * execbuffer operation, so that where there are conflicts,
439 * the application will get -EINVAL back.
440 */
441 uint32_t write_domain;
442};
443
444/** @{
445 * Intel memory domains
446 *
447 * Most of these just align with the various caches in
448 * the system and are used to flush and invalidate as
449 * objects end up cached in different domains.
450 */
451/** CPU cache */
452#define I915_GEM_DOMAIN_CPU 0x00000001
453/** Render cache, used by 2D and 3D drawing */
454#define I915_GEM_DOMAIN_RENDER 0x00000002
455/** Sampler cache, used by texture engine */
456#define I915_GEM_DOMAIN_SAMPLER 0x00000004
457/** Command queue, used to load batch buffers */
458#define I915_GEM_DOMAIN_COMMAND 0x00000008
459/** Instruction cache, used by shader programs */
460#define I915_GEM_DOMAIN_INSTRUCTION 0x00000010
461/** Vertex address cache */
462#define I915_GEM_DOMAIN_VERTEX 0x00000020
463/** GTT domain - aperture and scanout */
464#define I915_GEM_DOMAIN_GTT 0x00000040
465/** @} */
466
467struct drm_i915_gem_exec_object {
468 /**
469 * User's handle for a buffer to be bound into the GTT for this
470 * operation.
471 */
472 uint32_t handle;
473
474 /** Number of relocations to be performed on this buffer */
475 uint32_t relocation_count;
476 /**
477 * Pointer to array of struct drm_i915_gem_relocation_entry containing
478 * the relocations to be performed in this buffer.
479 */
480 uint64_t relocs_ptr;
481
482 /** Required alignment in graphics aperture */
483 uint64_t alignment;
484
485 /**
486 * Returned value of the updated offset of the object, for future
487 * presumed_offset writes.
488 */
489 uint64_t offset;
490};
491
492struct drm_i915_gem_execbuffer {
493 /**
494 * List of buffers to be validated with their relocations to be
495 * performend on them.
496 *
497 * This is a pointer to an array of struct drm_i915_gem_validate_entry.
498 *
499 * These buffers must be listed in an order such that all relocations
500 * a buffer is performing refer to buffers that have already appeared
501 * in the validate list.
502 */
503 uint64_t buffers_ptr;
504 uint32_t buffer_count;
505
506 /** Offset in the batchbuffer to start execution from. */
507 uint32_t batch_start_offset;
508 /** Bytes used in batchbuffer from batch_start_offset */
509 uint32_t batch_len;
510 uint32_t DR1;
511 uint32_t DR4;
512 uint32_t num_cliprects;
513 /** This is a struct drm_clip_rect *cliprects */
514 uint64_t cliprects_ptr;
515};
516
517struct drm_i915_gem_pin {
518 /** Handle of the buffer to be pinned. */
519 uint32_t handle;
520 uint32_t pad;
521
522 /** alignment required within the aperture */
523 uint64_t alignment;
524
525 /** Returned GTT offset of the buffer. */
526 uint64_t offset;
527};
528
529struct drm_i915_gem_unpin {
530 /** Handle of the buffer to be unpinned. */
531 uint32_t handle;
532 uint32_t pad;
533};
534
535struct drm_i915_gem_busy {
536 /** Handle of the buffer to check for busy */
537 uint32_t handle;
538
539 /** Return busy status (1 if busy, 0 if idle) */
540 uint32_t busy;
541};
542
543#define I915_TILING_NONE 0
544#define I915_TILING_X 1
545#define I915_TILING_Y 2
546
547#define I915_BIT_6_SWIZZLE_NONE 0
548#define I915_BIT_6_SWIZZLE_9 1
549#define I915_BIT_6_SWIZZLE_9_10 2
550#define I915_BIT_6_SWIZZLE_9_11 3
551#define I915_BIT_6_SWIZZLE_9_10_11 4
552/* Not seen by userland */
553#define I915_BIT_6_SWIZZLE_UNKNOWN 5
554
555struct drm_i915_gem_set_tiling {
556 /** Handle of the buffer to have its tiling state updated */
557 uint32_t handle;
558
559 /**
560 * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
561 * I915_TILING_Y).
562 *
563 * This value is to be set on request, and will be updated by the
564 * kernel on successful return with the actual chosen tiling layout.
565 *
566 * The tiling mode may be demoted to I915_TILING_NONE when the system
567 * has bit 6 swizzling that can't be managed correctly by GEM.
568 *
569 * Buffer contents become undefined when changing tiling_mode.
570 */
571 uint32_t tiling_mode;
572
573 /**
574 * Stride in bytes for the object when in I915_TILING_X or
575 * I915_TILING_Y.
576 */
577 uint32_t stride;
578
579 /**
580 * Returned address bit 6 swizzling required for CPU access through
581 * mmap mapping.
582 */
583 uint32_t swizzle_mode;
584};
585
586struct drm_i915_gem_get_tiling {
587 /** Handle of the buffer to get tiling state for. */
588 uint32_t handle;
589
590 /**
591 * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
592 * I915_TILING_Y).
593 */
594 uint32_t tiling_mode;
595
596 /**
597 * Returned address bit 6 swizzling required for CPU access through
598 * mmap mapping.
599 */
600 uint32_t swizzle_mode;
601};
602
270#endif /* _I915_DRM_H_ */ 603#endif /* _I915_DRM_H_ */
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index 282a504bd1db..e531783e5d78 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -107,6 +107,7 @@ header-y += keyctl.h
107header-y += limits.h 107header-y += limits.h
108header-y += magic.h 108header-y += magic.h
109header-y += major.h 109header-y += major.h
110header-y += map_to_7segment.h
110header-y += matroxfb.h 111header-y += matroxfb.h
111header-y += meye.h 112header-y += meye.h
112header-y += minix_fs.h 113header-y += minix_fs.h
@@ -182,6 +183,7 @@ unifdef-y += auto_fs.h
182unifdef-y += auxvec.h 183unifdef-y += auxvec.h
183unifdef-y += binfmts.h 184unifdef-y += binfmts.h
184unifdef-y += blktrace_api.h 185unifdef-y += blktrace_api.h
186unifdef-y += byteorder.h
185unifdef-y += capability.h 187unifdef-y += capability.h
186unifdef-y += capi.h 188unifdef-y += capi.h
187unifdef-y += cciss_ioctl.h 189unifdef-y += cciss_ioctl.h
@@ -339,6 +341,7 @@ unifdef-y += soundcard.h
339unifdef-y += stat.h 341unifdef-y += stat.h
340unifdef-y += stddef.h 342unifdef-y += stddef.h
341unifdef-y += string.h 343unifdef-y += string.h
344unifdef-y += swab.h
342unifdef-y += synclink.h 345unifdef-y += synclink.h
343unifdef-y += sysctl.h 346unifdef-y += sysctl.h
344unifdef-y += tcp.h 347unifdef-y += tcp.h
diff --git a/include/linux/aer.h b/include/linux/aer.h
index f2518141de88..f7df1eefc107 100644
--- a/include/linux/aer.h
+++ b/include/linux/aer.h
@@ -10,7 +10,6 @@
10#if defined(CONFIG_PCIEAER) 10#if defined(CONFIG_PCIEAER)
11/* pci-e port driver needs this function to enable aer */ 11/* pci-e port driver needs this function to enable aer */
12extern int pci_enable_pcie_error_reporting(struct pci_dev *dev); 12extern int pci_enable_pcie_error_reporting(struct pci_dev *dev);
13extern int pci_find_aer_capability(struct pci_dev *dev);
14extern int pci_disable_pcie_error_reporting(struct pci_dev *dev); 13extern int pci_disable_pcie_error_reporting(struct pci_dev *dev);
15extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); 14extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
16#else 15#else
@@ -18,10 +17,6 @@ static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
18{ 17{
19 return -EINVAL; 18 return -EINVAL;
20} 19}
21static inline int pci_find_aer_capability(struct pci_dev *dev)
22{
23 return 0;
24}
25static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev) 20static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev)
26{ 21{
27 return -EINVAL; 22 return -EINVAL;
diff --git a/include/linux/aio.h b/include/linux/aio.h
index 09b276c35227..f6b8cf99b596 100644
--- a/include/linux/aio.h
+++ b/include/linux/aio.h
@@ -204,12 +204,21 @@ struct kioctx {
204/* prototypes */ 204/* prototypes */
205extern unsigned aio_max_size; 205extern unsigned aio_max_size;
206 206
207#ifdef CONFIG_AIO
207extern ssize_t wait_on_sync_kiocb(struct kiocb *iocb); 208extern ssize_t wait_on_sync_kiocb(struct kiocb *iocb);
208extern int aio_put_req(struct kiocb *iocb); 209extern int aio_put_req(struct kiocb *iocb);
209extern void kick_iocb(struct kiocb *iocb); 210extern void kick_iocb(struct kiocb *iocb);
210extern int aio_complete(struct kiocb *iocb, long res, long res2); 211extern int aio_complete(struct kiocb *iocb, long res, long res2);
211struct mm_struct; 212struct mm_struct;
212extern void exit_aio(struct mm_struct *mm); 213extern void exit_aio(struct mm_struct *mm);
214#else
215static inline ssize_t wait_on_sync_kiocb(struct kiocb *iocb) { return 0; }
216static inline int aio_put_req(struct kiocb *iocb) { return 0; }
217static inline void kick_iocb(struct kiocb *iocb) { }
218static inline int aio_complete(struct kiocb *iocb, long res, long res2) { return 0; }
219struct mm_struct;
220static inline void exit_aio(struct mm_struct *mm) { }
221#endif /* CONFIG_AIO */
213 222
214#define io_wait_to_kiocb(wait) container_of(wait, struct kiocb, ki_wait) 223#define io_wait_to_kiocb(wait) container_of(wait, struct kiocb, ki_wait)
215 224
diff --git a/include/linux/auto_dev-ioctl.h b/include/linux/auto_dev-ioctl.h
new file mode 100644
index 000000000000..f4d05ccd731f
--- /dev/null
+++ b/include/linux/auto_dev-ioctl.h
@@ -0,0 +1,157 @@
1/*
2 * Copyright 2008 Red Hat, Inc. All rights reserved.
3 * Copyright 2008 Ian Kent <raven@themaw.net>
4 *
5 * This file is part of the Linux kernel and is made available under
6 * the terms of the GNU General Public License, version 2, or at your
7 * option, any later version, incorporated herein by reference.
8 */
9
10#ifndef _LINUX_AUTO_DEV_IOCTL_H
11#define _LINUX_AUTO_DEV_IOCTL_H
12
13#include <linux/types.h>
14
15#define AUTOFS_DEVICE_NAME "autofs"
16
17#define AUTOFS_DEV_IOCTL_VERSION_MAJOR 1
18#define AUTOFS_DEV_IOCTL_VERSION_MINOR 0
19
20#define AUTOFS_DEVID_LEN 16
21
22#define AUTOFS_DEV_IOCTL_SIZE sizeof(struct autofs_dev_ioctl)
23
24/*
25 * An ioctl interface for autofs mount point control.
26 */
27
28/*
29 * All the ioctls use this structure.
30 * When sending a path size must account for the total length
31 * of the chunk of memory otherwise is is the size of the
32 * structure.
33 */
34
35struct autofs_dev_ioctl {
36 __u32 ver_major;
37 __u32 ver_minor;
38 __u32 size; /* total size of data passed in
39 * including this struct */
40 __s32 ioctlfd; /* automount command fd */
41
42 __u32 arg1; /* Command parameters */
43 __u32 arg2;
44
45 char path[0];
46};
47
48static inline void init_autofs_dev_ioctl(struct autofs_dev_ioctl *in)
49{
50 in->ver_major = AUTOFS_DEV_IOCTL_VERSION_MAJOR;
51 in->ver_minor = AUTOFS_DEV_IOCTL_VERSION_MINOR;
52 in->size = sizeof(struct autofs_dev_ioctl);
53 in->ioctlfd = -1;
54 in->arg1 = 0;
55 in->arg2 = 0;
56 return;
57}
58
59/*
60 * If you change this make sure you make the corresponding change
61 * to autofs-dev-ioctl.c:lookup_ioctl()
62 */
63enum {
64 /* Get various version info */
65 AUTOFS_DEV_IOCTL_VERSION_CMD = 0x71,
66 AUTOFS_DEV_IOCTL_PROTOVER_CMD,
67 AUTOFS_DEV_IOCTL_PROTOSUBVER_CMD,
68
69 /* Open mount ioctl fd */
70 AUTOFS_DEV_IOCTL_OPENMOUNT_CMD,
71
72 /* Close mount ioctl fd */
73 AUTOFS_DEV_IOCTL_CLOSEMOUNT_CMD,
74
75 /* Mount/expire status returns */
76 AUTOFS_DEV_IOCTL_READY_CMD,
77 AUTOFS_DEV_IOCTL_FAIL_CMD,
78
79 /* Activate/deactivate autofs mount */
80 AUTOFS_DEV_IOCTL_SETPIPEFD_CMD,
81 AUTOFS_DEV_IOCTL_CATATONIC_CMD,
82
83 /* Expiry timeout */
84 AUTOFS_DEV_IOCTL_TIMEOUT_CMD,
85
86 /* Get mount last requesting uid and gid */
87 AUTOFS_DEV_IOCTL_REQUESTER_CMD,
88
89 /* Check for eligible expire candidates */
90 AUTOFS_DEV_IOCTL_EXPIRE_CMD,
91
92 /* Request busy status */
93 AUTOFS_DEV_IOCTL_ASKUMOUNT_CMD,
94
95 /* Check if path is a mountpoint */
96 AUTOFS_DEV_IOCTL_ISMOUNTPOINT_CMD,
97};
98
99#define AUTOFS_IOCTL 0x93
100
101#define AUTOFS_DEV_IOCTL_VERSION \
102 _IOWR(AUTOFS_IOCTL, \
103 AUTOFS_DEV_IOCTL_VERSION_CMD, struct autofs_dev_ioctl)
104
105#define AUTOFS_DEV_IOCTL_PROTOVER \
106 _IOWR(AUTOFS_IOCTL, \
107 AUTOFS_DEV_IOCTL_PROTOVER_CMD, struct autofs_dev_ioctl)
108
109#define AUTOFS_DEV_IOCTL_PROTOSUBVER \
110 _IOWR(AUTOFS_IOCTL, \
111 AUTOFS_DEV_IOCTL_PROTOSUBVER_CMD, struct autofs_dev_ioctl)
112
113#define AUTOFS_DEV_IOCTL_OPENMOUNT \
114 _IOWR(AUTOFS_IOCTL, \
115 AUTOFS_DEV_IOCTL_OPENMOUNT_CMD, struct autofs_dev_ioctl)
116
117#define AUTOFS_DEV_IOCTL_CLOSEMOUNT \
118 _IOWR(AUTOFS_IOCTL, \
119 AUTOFS_DEV_IOCTL_CLOSEMOUNT_CMD, struct autofs_dev_ioctl)
120
121#define AUTOFS_DEV_IOCTL_READY \
122 _IOWR(AUTOFS_IOCTL, \
123 AUTOFS_DEV_IOCTL_READY_CMD, struct autofs_dev_ioctl)
124
125#define AUTOFS_DEV_IOCTL_FAIL \
126 _IOWR(AUTOFS_IOCTL, \
127 AUTOFS_DEV_IOCTL_FAIL_CMD, struct autofs_dev_ioctl)
128
129#define AUTOFS_DEV_IOCTL_SETPIPEFD \
130 _IOWR(AUTOFS_IOCTL, \
131 AUTOFS_DEV_IOCTL_SETPIPEFD_CMD, struct autofs_dev_ioctl)
132
133#define AUTOFS_DEV_IOCTL_CATATONIC \
134 _IOWR(AUTOFS_IOCTL, \
135 AUTOFS_DEV_IOCTL_CATATONIC_CMD, struct autofs_dev_ioctl)
136
137#define AUTOFS_DEV_IOCTL_TIMEOUT \
138 _IOWR(AUTOFS_IOCTL, \
139 AUTOFS_DEV_IOCTL_TIMEOUT_CMD, struct autofs_dev_ioctl)
140
141#define AUTOFS_DEV_IOCTL_REQUESTER \
142 _IOWR(AUTOFS_IOCTL, \
143 AUTOFS_DEV_IOCTL_REQUESTER_CMD, struct autofs_dev_ioctl)
144
145#define AUTOFS_DEV_IOCTL_EXPIRE \
146 _IOWR(AUTOFS_IOCTL, \
147 AUTOFS_DEV_IOCTL_EXPIRE_CMD, struct autofs_dev_ioctl)
148
149#define AUTOFS_DEV_IOCTL_ASKUMOUNT \
150 _IOWR(AUTOFS_IOCTL, \
151 AUTOFS_DEV_IOCTL_ASKUMOUNT_CMD, struct autofs_dev_ioctl)
152
153#define AUTOFS_DEV_IOCTL_ISMOUNTPOINT \
154 _IOWR(AUTOFS_IOCTL, \
155 AUTOFS_DEV_IOCTL_ISMOUNTPOINT_CMD, struct autofs_dev_ioctl)
156
157#endif /* _LINUX_AUTO_DEV_IOCTL_H */
diff --git a/include/linux/auto_fs4.h b/include/linux/auto_fs4.h
index b785c6f8644d..2253716d4b92 100644
--- a/include/linux/auto_fs4.h
+++ b/include/linux/auto_fs4.h
@@ -23,12 +23,17 @@
23#define AUTOFS_MIN_PROTO_VERSION 3 23#define AUTOFS_MIN_PROTO_VERSION 3
24#define AUTOFS_MAX_PROTO_VERSION 5 24#define AUTOFS_MAX_PROTO_VERSION 5
25 25
26#define AUTOFS_PROTO_SUBVERSION 0 26#define AUTOFS_PROTO_SUBVERSION 1
27 27
28/* Mask for expire behaviour */ 28/* Mask for expire behaviour */
29#define AUTOFS_EXP_IMMEDIATE 1 29#define AUTOFS_EXP_IMMEDIATE 1
30#define AUTOFS_EXP_LEAVES 2 30#define AUTOFS_EXP_LEAVES 2
31 31
32#define AUTOFS_TYPE_ANY 0x0000
33#define AUTOFS_TYPE_INDIRECT 0x0001
34#define AUTOFS_TYPE_DIRECT 0x0002
35#define AUTOFS_TYPE_OFFSET 0x0004
36
32/* Daemon notification packet types */ 37/* Daemon notification packet types */
33enum autofs_notify { 38enum autofs_notify {
34 NFY_NONE, 39 NFY_NONE,
diff --git a/include/linux/backing-dev.h b/include/linux/backing-dev.h
index 0a24d5550eb3..bee52abb8a4d 100644
--- a/include/linux/backing-dev.h
+++ b/include/linux/backing-dev.h
@@ -175,6 +175,8 @@ int bdi_set_max_ratio(struct backing_dev_info *bdi, unsigned int max_ratio);
175 * BDI_CAP_READ_MAP: Can be mapped for reading 175 * BDI_CAP_READ_MAP: Can be mapped for reading
176 * BDI_CAP_WRITE_MAP: Can be mapped for writing 176 * BDI_CAP_WRITE_MAP: Can be mapped for writing
177 * BDI_CAP_EXEC_MAP: Can be mapped for execution 177 * BDI_CAP_EXEC_MAP: Can be mapped for execution
178 *
179 * BDI_CAP_SWAP_BACKED: Count shmem/tmpfs objects as swap-backed.
178 */ 180 */
179#define BDI_CAP_NO_ACCT_DIRTY 0x00000001 181#define BDI_CAP_NO_ACCT_DIRTY 0x00000001
180#define BDI_CAP_NO_WRITEBACK 0x00000002 182#define BDI_CAP_NO_WRITEBACK 0x00000002
@@ -184,6 +186,7 @@ int bdi_set_max_ratio(struct backing_dev_info *bdi, unsigned int max_ratio);
184#define BDI_CAP_WRITE_MAP 0x00000020 186#define BDI_CAP_WRITE_MAP 0x00000020
185#define BDI_CAP_EXEC_MAP 0x00000040 187#define BDI_CAP_EXEC_MAP 0x00000040
186#define BDI_CAP_NO_ACCT_WB 0x00000080 188#define BDI_CAP_NO_ACCT_WB 0x00000080
189#define BDI_CAP_SWAP_BACKED 0x00000100
187 190
188#define BDI_CAP_VMFLAGS \ 191#define BDI_CAP_VMFLAGS \
189 (BDI_CAP_READ_MAP | BDI_CAP_WRITE_MAP | BDI_CAP_EXEC_MAP) 192 (BDI_CAP_READ_MAP | BDI_CAP_WRITE_MAP | BDI_CAP_EXEC_MAP)
@@ -248,6 +251,11 @@ static inline bool bdi_cap_account_writeback(struct backing_dev_info *bdi)
248 BDI_CAP_NO_WRITEBACK)); 251 BDI_CAP_NO_WRITEBACK));
249} 252}
250 253
254static inline bool bdi_cap_swap_backed(struct backing_dev_info *bdi)
255{
256 return bdi->capabilities & BDI_CAP_SWAP_BACKED;
257}
258
251static inline bool mapping_cap_writeback_dirty(struct address_space *mapping) 259static inline bool mapping_cap_writeback_dirty(struct address_space *mapping)
252{ 260{
253 return bdi_cap_writeback_dirty(mapping->backing_dev_info); 261 return bdi_cap_writeback_dirty(mapping->backing_dev_info);
@@ -258,4 +266,9 @@ static inline bool mapping_cap_account_dirty(struct address_space *mapping)
258 return bdi_cap_account_dirty(mapping->backing_dev_info); 266 return bdi_cap_account_dirty(mapping->backing_dev_info);
259} 267}
260 268
269static inline bool mapping_cap_swap_backed(struct address_space *mapping)
270{
271 return bdi_cap_swap_backed(mapping->backing_dev_info);
272}
273
261#endif /* _LINUX_BACKING_DEV_H */ 274#endif /* _LINUX_BACKING_DEV_H */
diff --git a/include/linux/bcd.h b/include/linux/bcd.h
index 7ac518e3c152..22ea563ba3eb 100644
--- a/include/linux/bcd.h
+++ b/include/linux/bcd.h
@@ -1,12 +1,3 @@
1/* Permission is hereby granted to copy, modify and redistribute this code
2 * in terms of the GNU Library General Public License, Version 2 or later,
3 * at your option.
4 */
5
6/* macros to translate to/from binary and binary-coded decimal (frequently
7 * found in RTC chips).
8 */
9
10#ifndef _BCD_H 1#ifndef _BCD_H
11#define _BCD_H 2#define _BCD_H
12 3
@@ -15,11 +6,4 @@
15unsigned bcd2bin(unsigned char val) __attribute_const__; 6unsigned bcd2bin(unsigned char val) __attribute_const__;
16unsigned char bin2bcd(unsigned val) __attribute_const__; 7unsigned char bin2bcd(unsigned val) __attribute_const__;
17 8
18#define BCD2BIN(val) bcd2bin(val)
19#define BIN2BCD(val) bin2bcd(val)
20
21/* backwards compat */
22#define BCD_TO_BIN(val) ((val)=BCD2BIN(val))
23#define BIN_TO_BCD(val) ((val)=BIN2BCD(val))
24
25#endif /* _BCD_H */ 9#endif /* _BCD_H */
diff --git a/include/linux/binfmts.h b/include/linux/binfmts.h
index 826f62350805..7394b5b349ff 100644
--- a/include/linux/binfmts.h
+++ b/include/linux/binfmts.h
@@ -36,6 +36,10 @@ struct linux_binprm{
36 unsigned long p; /* current top of mem */ 36 unsigned long p; /* current top of mem */
37 unsigned int sh_bang:1, 37 unsigned int sh_bang:1,
38 misc_bang:1; 38 misc_bang:1;
39#ifdef __alpha__
40 unsigned int taso:1;
41#endif
42 unsigned int recursion_depth;
39 struct file * file; 43 struct file * file;
40 int e_uid, e_gid; 44 int e_uid, e_gid;
41 kernel_cap_t cap_post_exec_permitted; 45 kernel_cap_t cap_post_exec_permitted;
@@ -58,6 +62,7 @@ struct linux_binprm{
58#define BINPRM_FLAGS_EXECFD_BIT 1 62#define BINPRM_FLAGS_EXECFD_BIT 1
59#define BINPRM_FLAGS_EXECFD (1 << BINPRM_FLAGS_EXECFD_BIT) 63#define BINPRM_FLAGS_EXECFD (1 << BINPRM_FLAGS_EXECFD_BIT)
60 64
65#define BINPRM_MAX_RECURSION 4
61 66
62/* 67/*
63 * This structure defines the functions that are used to load the binary formats that 68 * This structure defines the functions that are used to load the binary formats that
diff --git a/include/linux/bio.h b/include/linux/bio.h
index ff5b4cf9e2da..1c91a176b9ae 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -79,6 +79,13 @@ struct bio {
79 79
80 unsigned int bi_size; /* residual I/O count */ 80 unsigned int bi_size; /* residual I/O count */
81 81
82 /*
83 * To keep track of the max segment size, we account for the
84 * sizes of the first and last mergeable segments in this bio.
85 */
86 unsigned int bi_seg_front_size;
87 unsigned int bi_seg_back_size;
88
82 unsigned int bi_max_vecs; /* max bvl_vecs we can hold */ 89 unsigned int bi_max_vecs; /* max bvl_vecs we can hold */
83 90
84 unsigned int bi_comp_cpu; /* completion CPU */ 91 unsigned int bi_comp_cpu; /* completion CPU */
@@ -129,25 +136,30 @@ struct bio {
129 * bit 2 -- barrier 136 * bit 2 -- barrier
130 * Insert a serialization point in the IO queue, forcing previously 137 * Insert a serialization point in the IO queue, forcing previously
131 * submitted IO to be completed before this oen is issued. 138 * submitted IO to be completed before this oen is issued.
132 * bit 3 -- fail fast, don't want low level driver retries 139 * bit 3 -- synchronous I/O hint: the block layer will unplug immediately
133 * bit 4 -- synchronous I/O hint: the block layer will unplug immediately
134 * Note that this does NOT indicate that the IO itself is sync, just 140 * Note that this does NOT indicate that the IO itself is sync, just
135 * that the block layer will not postpone issue of this IO by plugging. 141 * that the block layer will not postpone issue of this IO by plugging.
136 * bit 5 -- metadata request 142 * bit 4 -- metadata request
137 * Used for tracing to differentiate metadata and data IO. May also 143 * Used for tracing to differentiate metadata and data IO. May also
138 * get some preferential treatment in the IO scheduler 144 * get some preferential treatment in the IO scheduler
139 * bit 6 -- discard sectors 145 * bit 5 -- discard sectors
140 * Informs the lower level device that this range of sectors is no longer 146 * Informs the lower level device that this range of sectors is no longer
141 * used by the file system and may thus be freed by the device. Used 147 * used by the file system and may thus be freed by the device. Used
142 * for flash based storage. 148 * for flash based storage.
149 * bit 6 -- fail fast device errors
150 * bit 7 -- fail fast transport errors
151 * bit 8 -- fail fast driver errors
152 * Don't want driver retries for any fast fail whatever the reason.
143 */ 153 */
144#define BIO_RW 0 /* Must match RW in req flags (blkdev.h) */ 154#define BIO_RW 0 /* Must match RW in req flags (blkdev.h) */
145#define BIO_RW_AHEAD 1 /* Must match FAILFAST in req flags */ 155#define BIO_RW_AHEAD 1 /* Must match FAILFAST in req flags */
146#define BIO_RW_BARRIER 2 156#define BIO_RW_BARRIER 2
147#define BIO_RW_FAILFAST 3 157#define BIO_RW_SYNC 3
148#define BIO_RW_SYNC 4 158#define BIO_RW_META 4
149#define BIO_RW_META 5 159#define BIO_RW_DISCARD 5
150#define BIO_RW_DISCARD 6 160#define BIO_RW_FAILFAST_DEV 6
161#define BIO_RW_FAILFAST_TRANSPORT 7
162#define BIO_RW_FAILFAST_DRIVER 8
151 163
152/* 164/*
153 * upper 16 bits of bi_rw define the io priority of this bio 165 * upper 16 bits of bi_rw define the io priority of this bio
@@ -174,7 +186,10 @@ struct bio {
174#define bio_sectors(bio) ((bio)->bi_size >> 9) 186#define bio_sectors(bio) ((bio)->bi_size >> 9)
175#define bio_barrier(bio) ((bio)->bi_rw & (1 << BIO_RW_BARRIER)) 187#define bio_barrier(bio) ((bio)->bi_rw & (1 << BIO_RW_BARRIER))
176#define bio_sync(bio) ((bio)->bi_rw & (1 << BIO_RW_SYNC)) 188#define bio_sync(bio) ((bio)->bi_rw & (1 << BIO_RW_SYNC))
177#define bio_failfast(bio) ((bio)->bi_rw & (1 << BIO_RW_FAILFAST)) 189#define bio_failfast_dev(bio) ((bio)->bi_rw & (1 << BIO_RW_FAILFAST_DEV))
190#define bio_failfast_transport(bio) \
191 ((bio)->bi_rw & (1 << BIO_RW_FAILFAST_TRANSPORT))
192#define bio_failfast_driver(bio) ((bio)->bi_rw & (1 << BIO_RW_FAILFAST_DRIVER))
178#define bio_rw_ahead(bio) ((bio)->bi_rw & (1 << BIO_RW_AHEAD)) 193#define bio_rw_ahead(bio) ((bio)->bi_rw & (1 << BIO_RW_AHEAD))
179#define bio_rw_meta(bio) ((bio)->bi_rw & (1 << BIO_RW_META)) 194#define bio_rw_meta(bio) ((bio)->bi_rw & (1 << BIO_RW_META))
180#define bio_discard(bio) ((bio)->bi_rw & (1 << BIO_RW_DISCARD)) 195#define bio_discard(bio) ((bio)->bi_rw & (1 << BIO_RW_DISCARD))
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index 89781fd48859..a08c33a26ca9 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -110,7 +110,6 @@ extern int __bitmap_weight(const unsigned long *bitmap, int bits);
110 110
111extern int bitmap_scnprintf(char *buf, unsigned int len, 111extern int bitmap_scnprintf(char *buf, unsigned int len,
112 const unsigned long *src, int nbits); 112 const unsigned long *src, int nbits);
113extern int bitmap_scnprintf_len(unsigned int nr_bits);
114extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user, 113extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user,
115 unsigned long *dst, int nbits); 114 unsigned long *dst, int nbits);
116extern int bitmap_parse_user(const char __user *ubuf, unsigned int ulen, 115extern int bitmap_parse_user(const char __user *ubuf, unsigned int ulen,
@@ -130,6 +129,7 @@ extern void bitmap_fold(unsigned long *dst, const unsigned long *orig,
130extern int bitmap_find_free_region(unsigned long *bitmap, int bits, int order); 129extern int bitmap_find_free_region(unsigned long *bitmap, int bits, int order);
131extern void bitmap_release_region(unsigned long *bitmap, int pos, int order); 130extern void bitmap_release_region(unsigned long *bitmap, int pos, int order);
132extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order); 131extern int bitmap_allocate_region(unsigned long *bitmap, int pos, int order);
132extern void bitmap_copy_le(void *dst, const unsigned long *src, int nbits);
133 133
134#define BITMAP_LAST_WORD_MASK(nbits) \ 134#define BITMAP_LAST_WORD_MASK(nbits) \
135( \ 135( \
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index a92d9e4ea96e..b4fe68fe3a57 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -87,7 +87,9 @@ enum {
87 */ 87 */
88enum rq_flag_bits { 88enum rq_flag_bits {
89 __REQ_RW, /* not set, read. set, write */ 89 __REQ_RW, /* not set, read. set, write */
90 __REQ_FAILFAST, /* no low level driver retries */ 90 __REQ_FAILFAST_DEV, /* no driver retries of device errors */
91 __REQ_FAILFAST_TRANSPORT, /* no driver retries of transport errors */
92 __REQ_FAILFAST_DRIVER, /* no driver retries of driver errors */
91 __REQ_DISCARD, /* request to discard sectors */ 93 __REQ_DISCARD, /* request to discard sectors */
92 __REQ_SORTED, /* elevator knows about this request */ 94 __REQ_SORTED, /* elevator knows about this request */
93 __REQ_SOFTBARRIER, /* may not be passed by ioscheduler */ 95 __REQ_SOFTBARRIER, /* may not be passed by ioscheduler */
@@ -111,8 +113,10 @@ enum rq_flag_bits {
111}; 113};
112 114
113#define REQ_RW (1 << __REQ_RW) 115#define REQ_RW (1 << __REQ_RW)
116#define REQ_FAILFAST_DEV (1 << __REQ_FAILFAST_DEV)
117#define REQ_FAILFAST_TRANSPORT (1 << __REQ_FAILFAST_TRANSPORT)
118#define REQ_FAILFAST_DRIVER (1 << __REQ_FAILFAST_DRIVER)
114#define REQ_DISCARD (1 << __REQ_DISCARD) 119#define REQ_DISCARD (1 << __REQ_DISCARD)
115#define REQ_FAILFAST (1 << __REQ_FAILFAST)
116#define REQ_SORTED (1 << __REQ_SORTED) 120#define REQ_SORTED (1 << __REQ_SORTED)
117#define REQ_SOFTBARRIER (1 << __REQ_SOFTBARRIER) 121#define REQ_SOFTBARRIER (1 << __REQ_SOFTBARRIER)
118#define REQ_HARDBARRIER (1 << __REQ_HARDBARRIER) 122#define REQ_HARDBARRIER (1 << __REQ_HARDBARRIER)
@@ -560,7 +564,12 @@ enum {
560#define blk_special_request(rq) ((rq)->cmd_type == REQ_TYPE_SPECIAL) 564#define blk_special_request(rq) ((rq)->cmd_type == REQ_TYPE_SPECIAL)
561#define blk_sense_request(rq) ((rq)->cmd_type == REQ_TYPE_SENSE) 565#define blk_sense_request(rq) ((rq)->cmd_type == REQ_TYPE_SENSE)
562 566
563#define blk_noretry_request(rq) ((rq)->cmd_flags & REQ_FAILFAST) 567#define blk_failfast_dev(rq) ((rq)->cmd_flags & REQ_FAILFAST_DEV)
568#define blk_failfast_transport(rq) ((rq)->cmd_flags & REQ_FAILFAST_TRANSPORT)
569#define blk_failfast_driver(rq) ((rq)->cmd_flags & REQ_FAILFAST_DRIVER)
570#define blk_noretry_request(rq) (blk_failfast_dev(rq) || \
571 blk_failfast_transport(rq) || \
572 blk_failfast_driver(rq))
564#define blk_rq_started(rq) ((rq)->cmd_flags & REQ_STARTED) 573#define blk_rq_started(rq) ((rq)->cmd_flags & REQ_STARTED)
565 574
566#define blk_account_rq(rq) (blk_rq_started(rq) && (blk_fs_request(rq) || blk_discard_rq(rq))) 575#define blk_account_rq(rq) (blk_rq_started(rq) && (blk_fs_request(rq) || blk_discard_rq(rq)))
@@ -856,7 +865,6 @@ extern void blk_ordered_complete_seq(struct request_queue *, unsigned, int);
856extern int blk_rq_map_sg(struct request_queue *, struct request *, struct scatterlist *); 865extern int blk_rq_map_sg(struct request_queue *, struct request *, struct scatterlist *);
857extern void blk_dump_rq_flags(struct request *, char *); 866extern void blk_dump_rq_flags(struct request *, char *);
858extern void generic_unplug_device(struct request_queue *); 867extern void generic_unplug_device(struct request_queue *);
859extern void __generic_unplug_device(struct request_queue *);
860extern long nr_blockdev_pages(void); 868extern long nr_blockdev_pages(void);
861 869
862int blk_get_queue(struct request_queue *); 870int blk_get_queue(struct request_queue *);
diff --git a/include/linux/blktrace_api.h b/include/linux/blktrace_api.h
index 3a31eb506164..bdf505d33e77 100644
--- a/include/linux/blktrace_api.h
+++ b/include/linux/blktrace_api.h
@@ -24,6 +24,7 @@ enum blktrace_cat {
24 BLK_TC_AHEAD = 1 << 11, /* readahead */ 24 BLK_TC_AHEAD = 1 << 11, /* readahead */
25 BLK_TC_META = 1 << 12, /* metadata */ 25 BLK_TC_META = 1 << 12, /* metadata */
26 BLK_TC_DISCARD = 1 << 13, /* discard requests */ 26 BLK_TC_DISCARD = 1 << 13, /* discard requests */
27 BLK_TC_DRV_DATA = 1 << 14, /* binary per-driver data */
27 28
28 BLK_TC_END = 1 << 15, /* only 16-bits, reminder */ 29 BLK_TC_END = 1 << 15, /* only 16-bits, reminder */
29}; 30};
@@ -51,6 +52,7 @@ enum blktrace_act {
51 __BLK_TA_BOUNCE, /* bio was bounced */ 52 __BLK_TA_BOUNCE, /* bio was bounced */
52 __BLK_TA_REMAP, /* bio was remapped */ 53 __BLK_TA_REMAP, /* bio was remapped */
53 __BLK_TA_ABORT, /* request aborted */ 54 __BLK_TA_ABORT, /* request aborted */
55 __BLK_TA_DRV_DATA, /* driver-specific binary data */
54}; 56};
55 57
56/* 58/*
@@ -82,6 +84,7 @@ enum blktrace_notify {
82#define BLK_TA_BOUNCE (__BLK_TA_BOUNCE) 84#define BLK_TA_BOUNCE (__BLK_TA_BOUNCE)
83#define BLK_TA_REMAP (__BLK_TA_REMAP | BLK_TC_ACT(BLK_TC_QUEUE)) 85#define BLK_TA_REMAP (__BLK_TA_REMAP | BLK_TC_ACT(BLK_TC_QUEUE))
84#define BLK_TA_ABORT (__BLK_TA_ABORT | BLK_TC_ACT(BLK_TC_QUEUE)) 86#define BLK_TA_ABORT (__BLK_TA_ABORT | BLK_TC_ACT(BLK_TC_QUEUE))
87#define BLK_TA_DRV_DATA (__BLK_TA_DRV_DATA | BLK_TC_ACT(BLK_TC_DRV_DATA))
85 88
86#define BLK_TN_PROCESS (__BLK_TN_PROCESS | BLK_TC_ACT(BLK_TC_NOTIFY)) 89#define BLK_TN_PROCESS (__BLK_TN_PROCESS | BLK_TC_ACT(BLK_TC_NOTIFY))
87#define BLK_TN_TIMESTAMP (__BLK_TN_TIMESTAMP | BLK_TC_ACT(BLK_TC_NOTIFY)) 90#define BLK_TN_TIMESTAMP (__BLK_TN_TIMESTAMP | BLK_TC_ACT(BLK_TC_NOTIFY))
@@ -317,6 +320,34 @@ static inline void blk_add_trace_remap(struct request_queue *q, struct bio *bio,
317 __blk_add_trace(bt, from, bio->bi_size, bio->bi_rw, BLK_TA_REMAP, !bio_flagged(bio, BIO_UPTODATE), sizeof(r), &r); 320 __blk_add_trace(bt, from, bio->bi_size, bio->bi_rw, BLK_TA_REMAP, !bio_flagged(bio, BIO_UPTODATE), sizeof(r), &r);
318} 321}
319 322
323/**
324 * blk_add_driver_data - Add binary message with driver-specific data
325 * @q: queue the io is for
326 * @rq: io request
327 * @data: driver-specific data
328 * @len: length of driver-specific data
329 *
330 * Description:
331 * Some drivers might want to write driver-specific data per request.
332 *
333 **/
334static inline void blk_add_driver_data(struct request_queue *q,
335 struct request *rq,
336 void *data, size_t len)
337{
338 struct blk_trace *bt = q->blk_trace;
339
340 if (likely(!bt))
341 return;
342
343 if (blk_pc_request(rq))
344 __blk_add_trace(bt, 0, rq->data_len, 0, BLK_TA_DRV_DATA,
345 rq->errors, len, data);
346 else
347 __blk_add_trace(bt, rq->hard_sector, rq->hard_nr_sectors << 9,
348 0, BLK_TA_DRV_DATA, rq->errors, len, data);
349}
350
320extern int blk_trace_setup(struct request_queue *q, char *name, dev_t dev, 351extern int blk_trace_setup(struct request_queue *q, char *name, dev_t dev,
321 char __user *arg); 352 char __user *arg);
322extern int blk_trace_startstop(struct request_queue *q, int start); 353extern int blk_trace_startstop(struct request_queue *q, int start);
@@ -330,6 +361,7 @@ extern int blk_trace_remove(struct request_queue *q);
330#define blk_add_trace_generic(q, rq, rw, what) do { } while (0) 361#define blk_add_trace_generic(q, rq, rw, what) do { } while (0)
331#define blk_add_trace_pdu_int(q, what, bio, pdu) do { } while (0) 362#define blk_add_trace_pdu_int(q, what, bio, pdu) do { } while (0)
332#define blk_add_trace_remap(q, bio, dev, f, t) do {} while (0) 363#define blk_add_trace_remap(q, bio, dev, f, t) do {} while (0)
364#define blk_add_driver_data(q, rq, data, len) do {} while (0)
333#define do_blk_trace_setup(q, name, dev, buts) (-ENOTTY) 365#define do_blk_trace_setup(q, name, dev, buts) (-ENOTTY)
334#define blk_trace_setup(q, name, dev, arg) (-ENOTTY) 366#define blk_trace_setup(q, name, dev, arg) (-ENOTTY)
335#define blk_trace_startstop(q, start) (-ENOTTY) 367#define blk_trace_startstop(q, start) (-ENOTTY)
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index eadaab44015f..3ce64b90118c 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -322,7 +322,7 @@ static inline void wait_on_buffer(struct buffer_head *bh)
322 322
323static inline int trylock_buffer(struct buffer_head *bh) 323static inline int trylock_buffer(struct buffer_head *bh)
324{ 324{
325 return likely(!test_and_set_bit(BH_Lock, &bh->b_state)); 325 return likely(!test_and_set_bit_lock(BH_Lock, &bh->b_state));
326} 326}
327 327
328static inline void lock_buffer(struct buffer_head *bh) 328static inline void lock_buffer(struct buffer_head *bh)
diff --git a/include/linux/byteorder/Kbuild b/include/linux/byteorder/Kbuild
index 1133d5f9d818..fbaa7f9cee32 100644
--- a/include/linux/byteorder/Kbuild
+++ b/include/linux/byteorder/Kbuild
@@ -1,3 +1,4 @@
1unifdef-y += big_endian.h 1unifdef-y += big_endian.h
2unifdef-y += little_endian.h 2unifdef-y += little_endian.h
3unifdef-y += swab.h 3unifdef-y += swab.h
4unifdef-y += swabb.h
diff --git a/include/linux/byteorder/big_endian.h b/include/linux/byteorder/big_endian.h
index 44f95b92393b..1cba3f3efe5f 100644
--- a/include/linux/byteorder/big_endian.h
+++ b/include/linux/byteorder/big_endian.h
@@ -10,6 +10,7 @@
10 10
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/byteorder/swab.h> 12#include <linux/byteorder/swab.h>
13#include <linux/byteorder/swabb.h>
13 14
14#define __constant_htonl(x) ((__force __be32)(__u32)(x)) 15#define __constant_htonl(x) ((__force __be32)(__u32)(x))
15#define __constant_ntohl(x) ((__force __u32)(__be32)(x)) 16#define __constant_ntohl(x) ((__force __u32)(__be32)(x))
diff --git a/include/linux/byteorder/little_endian.h b/include/linux/byteorder/little_endian.h
index 4cc170a31762..cedc1b5a289c 100644
--- a/include/linux/byteorder/little_endian.h
+++ b/include/linux/byteorder/little_endian.h
@@ -10,6 +10,7 @@
10 10
11#include <linux/types.h> 11#include <linux/types.h>
12#include <linux/byteorder/swab.h> 12#include <linux/byteorder/swab.h>
13#include <linux/byteorder/swabb.h>
13 14
14#define __constant_htonl(x) ((__force __be32)___constant_swab32((x))) 15#define __constant_htonl(x) ((__force __be32)___constant_swab32((x)))
15#define __constant_ntohl(x) ___constant_swab32((__force __be32)(x)) 16#define __constant_ntohl(x) ___constant_swab32((__force __be32)(x))
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index c98dd7cb7076..8b00f6643e93 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -9,12 +9,12 @@
9 */ 9 */
10 10
11#include <linux/sched.h> 11#include <linux/sched.h>
12#include <linux/kref.h>
13#include <linux/cpumask.h> 12#include <linux/cpumask.h>
14#include <linux/nodemask.h> 13#include <linux/nodemask.h>
15#include <linux/rcupdate.h> 14#include <linux/rcupdate.h>
16#include <linux/cgroupstats.h> 15#include <linux/cgroupstats.h>
17#include <linux/prio_heap.h> 16#include <linux/prio_heap.h>
17#include <linux/rwsem.h>
18 18
19#ifdef CONFIG_CGROUPS 19#ifdef CONFIG_CGROUPS
20 20
@@ -137,6 +137,15 @@ struct cgroup {
137 * release_list_lock 137 * release_list_lock
138 */ 138 */
139 struct list_head release_list; 139 struct list_head release_list;
140
141 /* pids_mutex protects the fields below */
142 struct rw_semaphore pids_mutex;
143 /* Array of process ids in the cgroup */
144 pid_t *tasks_pids;
145 /* How many files are using the current tasks_pids array */
146 int pids_use_count;
147 /* Length of the current tasks_pids array */
148 int pids_length;
140}; 149};
141 150
142/* A css_set is a structure holding pointers to a set of 151/* A css_set is a structure holding pointers to a set of
@@ -149,7 +158,7 @@ struct cgroup {
149struct css_set { 158struct css_set {
150 159
151 /* Reference count */ 160 /* Reference count */
152 struct kref ref; 161 atomic_t refcount;
153 162
154 /* 163 /*
155 * List running through all cgroup groups in the same hash 164 * List running through all cgroup groups in the same hash
@@ -326,7 +335,8 @@ struct cgroup_subsys {
326 */ 335 */
327 void (*mm_owner_changed)(struct cgroup_subsys *ss, 336 void (*mm_owner_changed)(struct cgroup_subsys *ss,
328 struct cgroup *old, 337 struct cgroup *old,
329 struct cgroup *new); 338 struct cgroup *new,
339 struct task_struct *p);
330 int subsys_id; 340 int subsys_id;
331 int active; 341 int active;
332 int disabled; 342 int disabled;
@@ -393,6 +403,9 @@ void cgroup_iter_end(struct cgroup *cgrp, struct cgroup_iter *it);
393int cgroup_scan_tasks(struct cgroup_scanner *scan); 403int cgroup_scan_tasks(struct cgroup_scanner *scan);
394int cgroup_attach_task(struct cgroup *, struct task_struct *); 404int cgroup_attach_task(struct cgroup *, struct task_struct *);
395 405
406void cgroup_mm_owner_callbacks(struct task_struct *old,
407 struct task_struct *new);
408
396#else /* !CONFIG_CGROUPS */ 409#else /* !CONFIG_CGROUPS */
397 410
398static inline int cgroup_init_early(void) { return 0; } 411static inline int cgroup_init_early(void) { return 0; }
@@ -411,15 +424,9 @@ static inline int cgroupstats_build(struct cgroupstats *stats,
411 return -EINVAL; 424 return -EINVAL;
412} 425}
413 426
427static inline void cgroup_mm_owner_callbacks(struct task_struct *old,
428 struct task_struct *new) {}
429
414#endif /* !CONFIG_CGROUPS */ 430#endif /* !CONFIG_CGROUPS */
415 431
416#ifdef CONFIG_MM_OWNER
417extern void
418cgroup_mm_owner_callbacks(struct task_struct *old, struct task_struct *new);
419#else /* !CONFIG_MM_OWNER */
420static inline void
421cgroup_mm_owner_callbacks(struct task_struct *old, struct task_struct *new)
422{
423}
424#endif /* CONFIG_MM_OWNER */
425#endif /* _LINUX_CGROUP_H */ 432#endif /* _LINUX_CGROUP_H */
diff --git a/include/linux/cgroup_subsys.h b/include/linux/cgroup_subsys.h
index e2877454ec82..9c22396e8b50 100644
--- a/include/linux/cgroup_subsys.h
+++ b/include/linux/cgroup_subsys.h
@@ -48,3 +48,9 @@ SUBSYS(devices)
48#endif 48#endif
49 49
50/* */ 50/* */
51
52#ifdef CONFIG_CGROUP_FREEZER
53SUBSYS(freezer)
54#endif
55
56/* */
diff --git a/include/linux/clk.h b/include/linux/clk.h
index 5ca8c6fddb56..778777316ea4 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -35,6 +35,8 @@ struct clk;
35 * clk_get may return different clock producers depending on @dev.) 35 * clk_get may return different clock producers depending on @dev.)
36 * 36 *
37 * Drivers must assume that the clock source is not enabled. 37 * Drivers must assume that the clock source is not enabled.
38 *
39 * clk_get should not be called from within interrupt context.
38 */ 40 */
39struct clk *clk_get(struct device *dev, const char *id); 41struct clk *clk_get(struct device *dev, const char *id);
40 42
@@ -76,6 +78,8 @@ unsigned long clk_get_rate(struct clk *clk);
76 * Note: drivers must ensure that all clk_enable calls made on this 78 * Note: drivers must ensure that all clk_enable calls made on this
77 * clock source are balanced by clk_disable calls prior to calling 79 * clock source are balanced by clk_disable calls prior to calling
78 * this function. 80 * this function.
81 *
82 * clk_put should not be called from within interrupt context.
79 */ 83 */
80void clk_put(struct clk *clk); 84void clk_put(struct clk *clk);
81 85
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 55e434feec99..f88d32f8ff7c 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -45,7 +45,8 @@ struct clocksource;
45 * @read: returns a cycle value 45 * @read: returns a cycle value
46 * @mask: bitmask for two's complement 46 * @mask: bitmask for two's complement
47 * subtraction of non 64 bit counters 47 * subtraction of non 64 bit counters
48 * @mult: cycle to nanosecond multiplier 48 * @mult: cycle to nanosecond multiplier (adjusted by NTP)
49 * @mult_orig: cycle to nanosecond multiplier (unadjusted by NTP)
49 * @shift: cycle to nanosecond divisor (power of two) 50 * @shift: cycle to nanosecond divisor (power of two)
50 * @flags: flags describing special properties 51 * @flags: flags describing special properties
51 * @vread: vsyscall based read 52 * @vread: vsyscall based read
@@ -63,6 +64,7 @@ struct clocksource {
63 cycle_t (*read)(void); 64 cycle_t (*read)(void);
64 cycle_t mask; 65 cycle_t mask;
65 u32 mult; 66 u32 mult;
67 u32 mult_orig;
66 u32 shift; 68 u32 shift;
67 unsigned long flags; 69 unsigned long flags;
68 cycle_t (*vread)(void); 70 cycle_t (*vread)(void);
@@ -77,6 +79,7 @@ struct clocksource {
77 /* timekeeping specific data, ignore */ 79 /* timekeeping specific data, ignore */
78 cycle_t cycle_interval; 80 cycle_t cycle_interval;
79 u64 xtime_interval; 81 u64 xtime_interval;
82 u32 raw_interval;
80 /* 83 /*
81 * Second part is written at each timer interrupt 84 * Second part is written at each timer interrupt
82 * Keep it in a different cache line to dirty no 85 * Keep it in a different cache line to dirty no
@@ -85,6 +88,7 @@ struct clocksource {
85 cycle_t cycle_last ____cacheline_aligned_in_smp; 88 cycle_t cycle_last ____cacheline_aligned_in_smp;
86 u64 xtime_nsec; 89 u64 xtime_nsec;
87 s64 error; 90 s64 error;
91 struct timespec raw_time;
88 92
89#ifdef CONFIG_CLOCKSOURCE_WATCHDOG 93#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
90 /* Watchdog related data, used by the framework */ 94 /* Watchdog related data, used by the framework */
@@ -201,17 +205,19 @@ static inline void clocksource_calculate_interval(struct clocksource *c,
201{ 205{
202 u64 tmp; 206 u64 tmp;
203 207
204 /* XXX - All of this could use a whole lot of optimization */ 208 /* Do the ns -> cycle conversion first, using original mult */
205 tmp = length_nsec; 209 tmp = length_nsec;
206 tmp <<= c->shift; 210 tmp <<= c->shift;
207 tmp += c->mult/2; 211 tmp += c->mult_orig/2;
208 do_div(tmp, c->mult); 212 do_div(tmp, c->mult_orig);
209 213
210 c->cycle_interval = (cycle_t)tmp; 214 c->cycle_interval = (cycle_t)tmp;
211 if (c->cycle_interval == 0) 215 if (c->cycle_interval == 0)
212 c->cycle_interval = 1; 216 c->cycle_interval = 1;
213 217
218 /* Go back from cycles -> shifted ns, this time use ntp adjused mult */
214 c->xtime_interval = (u64)c->cycle_interval * c->mult; 219 c->xtime_interval = (u64)c->cycle_interval * c->mult;
220 c->raw_interval = ((u64)c->cycle_interval * c->mult_orig) >> c->shift;
215} 221}
216 222
217 223
diff --git a/include/linux/compat.h b/include/linux/compat.h
index cf8d11cad5ae..f061a1ea1b74 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -78,7 +78,6 @@ typedef struct {
78 compat_sigset_word sig[_COMPAT_NSIG_WORDS]; 78 compat_sigset_word sig[_COMPAT_NSIG_WORDS];
79} compat_sigset_t; 79} compat_sigset_t;
80 80
81extern int cp_compat_stat(struct kstat *, struct compat_stat __user *);
82extern int get_compat_timespec(struct timespec *, const struct compat_timespec __user *); 81extern int get_compat_timespec(struct timespec *, const struct compat_timespec __user *);
83extern int put_compat_timespec(const struct timespec *, struct compat_timespec __user *); 82extern int put_compat_timespec(const struct timespec *, struct compat_timespec __user *);
84 83
@@ -235,6 +234,11 @@ extern int get_compat_itimerspec(struct itimerspec *dst,
235extern int put_compat_itimerspec(struct compat_itimerspec __user *dst, 234extern int put_compat_itimerspec(struct compat_itimerspec __user *dst,
236 const struct itimerspec *src); 235 const struct itimerspec *src);
237 236
237asmlinkage long compat_sys_gettimeofday(struct compat_timeval __user *tv,
238 struct timezone __user *tz);
239asmlinkage long compat_sys_settimeofday(struct compat_timeval __user *tv,
240 struct timezone __user *tz);
241
238asmlinkage long compat_sys_adjtimex(struct compat_timex __user *utp); 242asmlinkage long compat_sys_adjtimex(struct compat_timex __user *utp);
239 243
240extern int compat_printk(const char *fmt, ...); 244extern int compat_printk(const char *fmt, ...);
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index 8322141ee480..98115d9d04da 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -44,6 +44,8 @@ extern void __chk_io_ptr(const volatile void __iomem *);
44# error Sorry, your compiler is too old/not recognized. 44# error Sorry, your compiler is too old/not recognized.
45#endif 45#endif
46 46
47#define notrace __attribute__((no_instrument_function))
48
47/* Intel compiler defines __GNUC__. So we will overwrite implementations 49/* Intel compiler defines __GNUC__. So we will overwrite implementations
48 * coming from above header files here 50 * coming from above header files here
49 */ 51 */
diff --git a/include/linux/console_struct.h b/include/linux/console_struct.h
index b03f80a078be..d71f7c0f931b 100644
--- a/include/linux/console_struct.h
+++ b/include/linux/console_struct.h
@@ -53,7 +53,6 @@ struct vc_data {
53 unsigned short vc_hi_font_mask; /* [#] Attribute set for upper 256 chars of font or 0 if not supported */ 53 unsigned short vc_hi_font_mask; /* [#] Attribute set for upper 256 chars of font or 0 if not supported */
54 struct console_font vc_font; /* Current VC font set */ 54 struct console_font vc_font; /* Current VC font set */
55 unsigned short vc_video_erase_char; /* Background erase character */ 55 unsigned short vc_video_erase_char; /* Background erase character */
56 unsigned short vc_scrl_erase_char; /* Erase character for scroll */
57 /* VT terminal data */ 56 /* VT terminal data */
58 unsigned int vc_state; /* Escape sequence parser state */ 57 unsigned int vc_state; /* Escape sequence parser state */
59 unsigned int vc_npar,vc_par[NPAR]; /* Parameters of current escape sequence */ 58 unsigned int vc_npar,vc_par[NPAR]; /* Parameters of current escape sequence */
diff --git a/include/linux/crash_dump.h b/include/linux/crash_dump.h
index 025e4f575103..0acf3b737e2e 100644
--- a/include/linux/crash_dump.h
+++ b/include/linux/crash_dump.h
@@ -8,12 +8,9 @@
8#include <linux/proc_fs.h> 8#include <linux/proc_fs.h>
9 9
10#define ELFCORE_ADDR_MAX (-1ULL) 10#define ELFCORE_ADDR_MAX (-1ULL)
11#define ELFCORE_ADDR_ERR (-2ULL)
11 12
12#ifdef CONFIG_PROC_VMCORE
13extern unsigned long long elfcorehdr_addr; 13extern unsigned long long elfcorehdr_addr;
14#else
15static const unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
16#endif
17 14
18extern ssize_t copy_oldmem_page(unsigned long, char *, size_t, 15extern ssize_t copy_oldmem_page(unsigned long, char *, size_t,
19 unsigned long, int); 16 unsigned long, int);
@@ -28,10 +25,43 @@ extern struct proc_dir_entry *proc_vmcore;
28 25
29#define vmcore_elf_check_arch(x) (elf_check_arch(x) || vmcore_elf_check_arch_cross(x)) 26#define vmcore_elf_check_arch(x) (elf_check_arch(x) || vmcore_elf_check_arch_cross(x))
30 27
28/*
29 * is_kdump_kernel() checks whether this kernel is booting after a panic of
30 * previous kernel or not. This is determined by checking if previous kernel
31 * has passed the elf core header address on command line.
32 *
33 * This is not just a test if CONFIG_CRASH_DUMP is enabled or not. It will
34 * return 1 if CONFIG_CRASH_DUMP=y and if kernel is booting after a panic of
35 * previous kernel.
36 */
37
31static inline int is_kdump_kernel(void) 38static inline int is_kdump_kernel(void)
32{ 39{
33 return (elfcorehdr_addr != ELFCORE_ADDR_MAX) ? 1 : 0; 40 return (elfcorehdr_addr != ELFCORE_ADDR_MAX) ? 1 : 0;
34} 41}
42
43/* is_vmcore_usable() checks if the kernel is booting after a panic and
44 * the vmcore region is usable.
45 *
46 * This makes use of the fact that due to alignment -2ULL is not
47 * a valid pointer, much in the vain of IS_ERR(), except
48 * dealing directly with an unsigned long long rather than a pointer.
49 */
50
51static inline int is_vmcore_usable(void)
52{
53 return is_kdump_kernel() && elfcorehdr_addr != ELFCORE_ADDR_ERR ? 1 : 0;
54}
55
56/* vmcore_unusable() marks the vmcore as unusable,
57 * without disturbing the logic of is_kdump_kernel()
58 */
59
60static inline void vmcore_unusable(void)
61{
62 if (is_kdump_kernel())
63 elfcorehdr_addr = ELFCORE_ADDR_ERR;
64}
35#else /* !CONFIG_CRASH_DUMP */ 65#else /* !CONFIG_CRASH_DUMP */
36static inline int is_kdump_kernel(void) { return 0; } 66static inline int is_kdump_kernel(void) { return 0; }
37#endif /* CONFIG_CRASH_DUMP */ 67#endif /* CONFIG_CRASH_DUMP */
diff --git a/include/linux/device.h b/include/linux/device.h
index 246937c9cbc7..987f5912720a 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -90,6 +90,9 @@ int __must_check bus_for_each_drv(struct bus_type *bus,
90 struct device_driver *start, void *data, 90 struct device_driver *start, void *data,
91 int (*fn)(struct device_driver *, void *)); 91 int (*fn)(struct device_driver *, void *));
92 92
93void bus_sort_breadthfirst(struct bus_type *bus,
94 int (*compare)(const struct device *a,
95 const struct device *b));
93/* 96/*
94 * Bus notifiers: Get notified of addition/removal of devices 97 * Bus notifiers: Get notified of addition/removal of devices
95 * and binding/unbinding of drivers to devices. 98 * and binding/unbinding of drivers to devices.
@@ -502,7 +505,6 @@ extern struct device *device_create(struct class *cls, struct device *parent,
502 dev_t devt, void *drvdata, 505 dev_t devt, void *drvdata,
503 const char *fmt, ...) 506 const char *fmt, ...)
504 __attribute__((format(printf, 5, 6))); 507 __attribute__((format(printf, 5, 6)));
505#define device_create_drvdata device_create
506extern void device_destroy(struct class *cls, dev_t devt); 508extern void device_destroy(struct class *cls, dev_t devt);
507 509
508/* 510/*
@@ -551,7 +553,11 @@ extern const char *dev_driver_string(const struct device *dev);
551#define dev_info(dev, format, arg...) \ 553#define dev_info(dev, format, arg...) \
552 dev_printk(KERN_INFO , dev , format , ## arg) 554 dev_printk(KERN_INFO , dev , format , ## arg)
553 555
554#ifdef DEBUG 556#if defined(CONFIG_DYNAMIC_PRINTK_DEBUG)
557#define dev_dbg(dev, format, ...) do { \
558 dynamic_dev_dbg(dev, format, ##__VA_ARGS__); \
559 } while (0)
560#elif defined(DEBUG)
555#define dev_dbg(dev, format, arg...) \ 561#define dev_dbg(dev, format, arg...) \
556 dev_printk(KERN_DEBUG , dev , format , ## arg) 562 dev_printk(KERN_DEBUG , dev , format , ## arg)
557#else 563#else
@@ -567,6 +573,14 @@ extern const char *dev_driver_string(const struct device *dev);
567 ({ if (0) dev_printk(KERN_DEBUG, dev, format, ##arg); 0; }) 573 ({ if (0) dev_printk(KERN_DEBUG, dev, format, ##arg); 0; })
568#endif 574#endif
569 575
576/*
577 * dev_WARN() acts like dev_printk(), but with the key difference
578 * of using a WARN/WARN_ON to get the message out, including the
579 * file/line information and a backtrace.
580 */
581#define dev_WARN(dev, format, arg...) \
582 WARN(1, "Device: %s\n" format, dev_driver_string(dev), ## arg);
583
570/* Create alias, so I can be autoloaded. */ 584/* Create alias, so I can be autoloaded. */
571#define MODULE_ALIAS_CHARDEV(major,minor) \ 585#define MODULE_ALIAS_CHARDEV(major,minor) \
572 MODULE_ALIAS("char-major-" __stringify(major) "-" __stringify(minor)) 586 MODULE_ALIAS("char-major-" __stringify(major) "-" __stringify(minor))
diff --git a/include/linux/dma_remapping.h b/include/linux/dma_remapping.h
new file mode 100644
index 000000000000..bff5c65f81dc
--- /dev/null
+++ b/include/linux/dma_remapping.h
@@ -0,0 +1,157 @@
1#ifndef _DMA_REMAPPING_H
2#define _DMA_REMAPPING_H
3
4/*
5 * We need a fixed PAGE_SIZE of 4K irrespective of
6 * arch PAGE_SIZE for IOMMU page tables.
7 */
8#define PAGE_SHIFT_4K (12)
9#define PAGE_SIZE_4K (1UL << PAGE_SHIFT_4K)
10#define PAGE_MASK_4K (((u64)-1) << PAGE_SHIFT_4K)
11#define PAGE_ALIGN_4K(addr) (((addr) + PAGE_SIZE_4K - 1) & PAGE_MASK_4K)
12
13#define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT_4K)
14#define DMA_32BIT_PFN IOVA_PFN(DMA_32BIT_MASK)
15#define DMA_64BIT_PFN IOVA_PFN(DMA_64BIT_MASK)
16
17
18/*
19 * 0: Present
20 * 1-11: Reserved
21 * 12-63: Context Ptr (12 - (haw-1))
22 * 64-127: Reserved
23 */
24struct root_entry {
25 u64 val;
26 u64 rsvd1;
27};
28#define ROOT_ENTRY_NR (PAGE_SIZE_4K/sizeof(struct root_entry))
29static inline bool root_present(struct root_entry *root)
30{
31 return (root->val & 1);
32}
33static inline void set_root_present(struct root_entry *root)
34{
35 root->val |= 1;
36}
37static inline void set_root_value(struct root_entry *root, unsigned long value)
38{
39 root->val |= value & PAGE_MASK_4K;
40}
41
42struct context_entry;
43static inline struct context_entry *
44get_context_addr_from_root(struct root_entry *root)
45{
46 return (struct context_entry *)
47 (root_present(root)?phys_to_virt(
48 root->val & PAGE_MASK_4K):
49 NULL);
50}
51
52/*
53 * low 64 bits:
54 * 0: present
55 * 1: fault processing disable
56 * 2-3: translation type
57 * 12-63: address space root
58 * high 64 bits:
59 * 0-2: address width
60 * 3-6: aval
61 * 8-23: domain id
62 */
63struct context_entry {
64 u64 lo;
65 u64 hi;
66};
67#define context_present(c) ((c).lo & 1)
68#define context_fault_disable(c) (((c).lo >> 1) & 1)
69#define context_translation_type(c) (((c).lo >> 2) & 3)
70#define context_address_root(c) ((c).lo & PAGE_MASK_4K)
71#define context_address_width(c) ((c).hi & 7)
72#define context_domain_id(c) (((c).hi >> 8) & ((1 << 16) - 1))
73
74#define context_set_present(c) do {(c).lo |= 1;} while (0)
75#define context_set_fault_enable(c) \
76 do {(c).lo &= (((u64)-1) << 2) | 1;} while (0)
77#define context_set_translation_type(c, val) \
78 do { \
79 (c).lo &= (((u64)-1) << 4) | 3; \
80 (c).lo |= ((val) & 3) << 2; \
81 } while (0)
82#define CONTEXT_TT_MULTI_LEVEL 0
83#define context_set_address_root(c, val) \
84 do {(c).lo |= (val) & PAGE_MASK_4K;} while (0)
85#define context_set_address_width(c, val) do {(c).hi |= (val) & 7;} while (0)
86#define context_set_domain_id(c, val) \
87 do {(c).hi |= ((val) & ((1 << 16) - 1)) << 8;} while (0)
88#define context_clear_entry(c) do {(c).lo = 0; (c).hi = 0;} while (0)
89
90/*
91 * 0: readable
92 * 1: writable
93 * 2-6: reserved
94 * 7: super page
95 * 8-11: available
96 * 12-63: Host physcial address
97 */
98struct dma_pte {
99 u64 val;
100};
101#define dma_clear_pte(p) do {(p).val = 0;} while (0)
102
103#define DMA_PTE_READ (1)
104#define DMA_PTE_WRITE (2)
105
106#define dma_set_pte_readable(p) do {(p).val |= DMA_PTE_READ;} while (0)
107#define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while (0)
108#define dma_set_pte_prot(p, prot) \
109 do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0)
110#define dma_pte_addr(p) ((p).val & PAGE_MASK_4K)
111#define dma_set_pte_addr(p, addr) do {\
112 (p).val |= ((addr) & PAGE_MASK_4K); } while (0)
113#define dma_pte_present(p) (((p).val & 3) != 0)
114
115struct intel_iommu;
116
117struct dmar_domain {
118 int id; /* domain id */
119 struct intel_iommu *iommu; /* back pointer to owning iommu */
120
121 struct list_head devices; /* all devices' list */
122 struct iova_domain iovad; /* iova's that belong to this domain */
123
124 struct dma_pte *pgd; /* virtual address */
125 spinlock_t mapping_lock; /* page table lock */
126 int gaw; /* max guest address width */
127
128 /* adjusted guest address width, 0 is level 2 30-bit */
129 int agaw;
130
131#define DOMAIN_FLAG_MULTIPLE_DEVICES 1
132 int flags;
133};
134
135/* PCI domain-device relationship */
136struct device_domain_info {
137 struct list_head link; /* link to domain siblings */
138 struct list_head global; /* link to global list */
139 u8 bus; /* PCI bus numer */
140 u8 devfn; /* PCI devfn number */
141 struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */
142 struct dmar_domain *domain; /* pointer to domain */
143};
144
145extern int init_dmars(void);
146extern void free_dmar_iommu(struct intel_iommu *iommu);
147
148extern int dmar_disabled;
149
150#ifndef CONFIG_DMAR_GFX_WA
151static inline void iommu_prepare_gfx_mapping(void)
152{
153 return;
154}
155#endif /* !CONFIG_DMAR_GFX_WA */
156
157#endif
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index c360c558e59e..f1984fc3e06d 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -45,7 +45,6 @@ extern struct list_head dmar_drhd_units;
45 list_for_each_entry(drhd, &dmar_drhd_units, list) 45 list_for_each_entry(drhd, &dmar_drhd_units, list)
46 46
47extern int dmar_table_init(void); 47extern int dmar_table_init(void);
48extern int early_dmar_detect(void);
49extern int dmar_dev_scope_init(void); 48extern int dmar_dev_scope_init(void);
50 49
51/* Intel IOMMU detection */ 50/* Intel IOMMU detection */
diff --git a/include/linux/ds1286.h b/include/linux/ds1286.h
index d8989860e4ce..45ea0aa0aeb9 100644
--- a/include/linux/ds1286.h
+++ b/include/linux/ds1286.h
@@ -8,8 +8,6 @@
8#ifndef __LINUX_DS1286_H 8#ifndef __LINUX_DS1286_H
9#define __LINUX_DS1286_H 9#define __LINUX_DS1286_H
10 10
11#include <asm/ds1286.h>
12
13/********************************************************************** 11/**********************************************************************
14 * register summary 12 * register summary
15 **********************************************************************/ 13 **********************************************************************/
diff --git a/include/linux/dvb/frontend.h b/include/linux/dvb/frontend.h
index 6e4ace270276..79a8ed8e6a7d 100644
--- a/include/linux/dvb/frontend.h
+++ b/include/linux/dvb/frontend.h
@@ -166,6 +166,7 @@ typedef enum fe_modulation {
166 VSB_16, 166 VSB_16,
167 PSK_8, 167 PSK_8,
168 APSK_16, 168 APSK_16,
169 APSK_32,
169 DQPSK, 170 DQPSK,
170} fe_modulation_t; 171} fe_modulation_t;
171 172
@@ -295,6 +296,7 @@ typedef enum fe_delivery_system {
295 SYS_DVBC_ANNEX_AC, 296 SYS_DVBC_ANNEX_AC,
296 SYS_DVBC_ANNEX_B, 297 SYS_DVBC_ANNEX_B,
297 SYS_DVBT, 298 SYS_DVBT,
299 SYS_DSS,
298 SYS_DVBS, 300 SYS_DVBS,
299 SYS_DVBS2, 301 SYS_DVBS2,
300 SYS_DVBH, 302 SYS_DVBH,
diff --git a/include/linux/dynamic_printk.h b/include/linux/dynamic_printk.h
new file mode 100644
index 000000000000..2d528d009074
--- /dev/null
+++ b/include/linux/dynamic_printk.h
@@ -0,0 +1,93 @@
1#ifndef _DYNAMIC_PRINTK_H
2#define _DYNAMIC_PRINTK_H
3
4#define DYNAMIC_DEBUG_HASH_BITS 6
5#define DEBUG_HASH_TABLE_SIZE (1 << DYNAMIC_DEBUG_HASH_BITS)
6
7#define TYPE_BOOLEAN 1
8
9#define DYNAMIC_ENABLED_ALL 0
10#define DYNAMIC_ENABLED_NONE 1
11#define DYNAMIC_ENABLED_SOME 2
12
13extern int dynamic_enabled;
14
15/* dynamic_printk_enabled, and dynamic_printk_enabled2 are bitmasks in which
16 * bit n is set to 1 if any modname hashes into the bucket n, 0 otherwise. They
17 * use independent hash functions, to reduce the chance of false positives.
18 */
19extern long long dynamic_printk_enabled;
20extern long long dynamic_printk_enabled2;
21
22struct mod_debug {
23 char *modname;
24 char *logical_modname;
25 char *flag_names;
26 int type;
27 int hash;
28 int hash2;
29} __attribute__((aligned(8)));
30
31int register_dynamic_debug_module(char *mod_name, int type, char *share_name,
32 char *flags, int hash, int hash2);
33
34#if defined(CONFIG_DYNAMIC_PRINTK_DEBUG)
35extern int unregister_dynamic_debug_module(char *mod_name);
36extern int __dynamic_dbg_enabled_helper(char *modname, int type,
37 int value, int hash);
38
39#define __dynamic_dbg_enabled(module, type, value, level, hash) ({ \
40 int __ret = 0; \
41 if (unlikely((dynamic_printk_enabled & (1LL << DEBUG_HASH)) && \
42 (dynamic_printk_enabled2 & (1LL << DEBUG_HASH2)))) \
43 __ret = __dynamic_dbg_enabled_helper(module, type, \
44 value, hash);\
45 __ret; })
46
47#define dynamic_pr_debug(fmt, ...) do { \
48 static char mod_name[] \
49 __attribute__((section("__verbose_strings"))) \
50 = KBUILD_MODNAME; \
51 static struct mod_debug descriptor \
52 __used \
53 __attribute__((section("__verbose"), aligned(8))) = \
54 { mod_name, mod_name, NULL, TYPE_BOOLEAN, DEBUG_HASH, DEBUG_HASH2 };\
55 if (__dynamic_dbg_enabled(KBUILD_MODNAME, TYPE_BOOLEAN, \
56 0, 0, DEBUG_HASH)) \
57 printk(KERN_DEBUG KBUILD_MODNAME ":" fmt, \
58 ##__VA_ARGS__); \
59 } while (0)
60
61#define dynamic_dev_dbg(dev, format, ...) do { \
62 static char mod_name[] \
63 __attribute__((section("__verbose_strings"))) \
64 = KBUILD_MODNAME; \
65 static struct mod_debug descriptor \
66 __used \
67 __attribute__((section("__verbose"), aligned(8))) = \
68 { mod_name, mod_name, NULL, TYPE_BOOLEAN, DEBUG_HASH, DEBUG_HASH2 };\
69 if (__dynamic_dbg_enabled(KBUILD_MODNAME, TYPE_BOOLEAN, \
70 0, 0, DEBUG_HASH)) \
71 dev_printk(KERN_DEBUG, dev, \
72 KBUILD_MODNAME ": " format, \
73 ##__VA_ARGS__); \
74 } while (0)
75
76#else
77
78static inline int unregister_dynamic_debug_module(const char *mod_name)
79{
80 return 0;
81}
82static inline int __dynamic_dbg_enabled_helper(char *modname, int type,
83 int value, int hash)
84{
85 return 0;
86}
87
88#define __dynamic_dbg_enabled(module, type, value, level, hash) ({ 0; })
89#define dynamic_pr_debug(fmt, ...) do { } while (0)
90#define dynamic_dev_dbg(dev, format, ...) do { } while (0)
91#endif
92
93#endif
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 807373d467f7..bb66feb164bd 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -208,6 +208,9 @@ typedef efi_status_t efi_set_virtual_address_map_t (unsigned long memory_map_siz
208#define EFI_GLOBAL_VARIABLE_GUID \ 208#define EFI_GLOBAL_VARIABLE_GUID \
209 EFI_GUID( 0x8be4df61, 0x93ca, 0x11d2, 0xaa, 0x0d, 0x00, 0xe0, 0x98, 0x03, 0x2b, 0x8c ) 209 EFI_GUID( 0x8be4df61, 0x93ca, 0x11d2, 0xaa, 0x0d, 0x00, 0xe0, 0x98, 0x03, 0x2b, 0x8c )
210 210
211#define UV_SYSTEM_TABLE_GUID \
212 EFI_GUID( 0x3b13a7d4, 0x633e, 0x11dd, 0x93, 0xec, 0xda, 0x25, 0x56, 0xd8, 0x95, 0x93 )
213
211typedef struct { 214typedef struct {
212 efi_guid_t guid; 215 efi_guid_t guid;
213 unsigned long table; 216 unsigned long table;
@@ -255,6 +258,7 @@ extern struct efi {
255 unsigned long boot_info; /* boot info table */ 258 unsigned long boot_info; /* boot info table */
256 unsigned long hcdp; /* HCDP table */ 259 unsigned long hcdp; /* HCDP table */
257 unsigned long uga; /* UGA table */ 260 unsigned long uga; /* UGA table */
261 unsigned long uv_systab; /* UV system table */
258 efi_get_time_t *get_time; 262 efi_get_time_t *get_time;
259 efi_set_time_t *set_time; 263 efi_set_time_t *set_time;
260 efi_get_wakeup_time_t *get_wakeup_time; 264 efi_get_wakeup_time_t *get_wakeup_time;
diff --git a/include/linux/ext2_fs.h b/include/linux/ext2_fs.h
index 2efe7b863cff..78c775a83f7c 100644
--- a/include/linux/ext2_fs.h
+++ b/include/linux/ext2_fs.h
@@ -47,7 +47,7 @@
47#ifdef EXT2FS_DEBUG 47#ifdef EXT2FS_DEBUG
48# define ext2_debug(f, a...) { \ 48# define ext2_debug(f, a...) { \
49 printk ("EXT2-fs DEBUG (%s, %d): %s:", \ 49 printk ("EXT2-fs DEBUG (%s, %d): %s:", \
50 __FILE__, __LINE__, __FUNCTION__); \ 50 __FILE__, __LINE__, __func__); \
51 printk (f, ## a); \ 51 printk (f, ## a); \
52 } 52 }
53#else 53#else
diff --git a/include/linux/ext3_fs.h b/include/linux/ext3_fs.h
index 8120fa1bc235..d14f02918483 100644
--- a/include/linux/ext3_fs.h
+++ b/include/linux/ext3_fs.h
@@ -43,7 +43,7 @@
43#define ext3_debug(f, a...) \ 43#define ext3_debug(f, a...) \
44 do { \ 44 do { \
45 printk (KERN_DEBUG "EXT3-fs DEBUG (%s, %d): %s:", \ 45 printk (KERN_DEBUG "EXT3-fs DEBUG (%s, %d): %s:", \
46 __FILE__, __LINE__, __FUNCTION__); \ 46 __FILE__, __LINE__, __func__); \
47 printk (KERN_DEBUG f, ## a); \ 47 printk (KERN_DEBUG f, ## a); \
48 } while (0) 48 } while (0)
49#else 49#else
@@ -380,6 +380,8 @@ struct ext3_inode {
380#define EXT3_MOUNT_QUOTA 0x80000 /* Some quota option set */ 380#define EXT3_MOUNT_QUOTA 0x80000 /* Some quota option set */
381#define EXT3_MOUNT_USRQUOTA 0x100000 /* "old" user quota */ 381#define EXT3_MOUNT_USRQUOTA 0x100000 /* "old" user quota */
382#define EXT3_MOUNT_GRPQUOTA 0x200000 /* "old" group quota */ 382#define EXT3_MOUNT_GRPQUOTA 0x200000 /* "old" group quota */
383#define EXT3_MOUNT_DATA_ERR_ABORT 0x400000 /* Abort on file data write
384 * error in ordered mode */
383 385
384/* Compatibility, for having both ext2_fs.h and ext3_fs.h included at once */ 386/* Compatibility, for having both ext2_fs.h and ext3_fs.h included at once */
385#ifndef _LINUX_EXT2_FS_H 387#ifndef _LINUX_EXT2_FS_H
@@ -871,7 +873,7 @@ extern void ext3_update_dynamic_rev (struct super_block *sb);
871#define ext3_std_error(sb, errno) \ 873#define ext3_std_error(sb, errno) \
872do { \ 874do { \
873 if ((errno)) \ 875 if ((errno)) \
874 __ext3_std_error((sb), __FUNCTION__, (errno)); \ 876 __ext3_std_error((sb), __func__, (errno)); \
875} while (0) 877} while (0)
876 878
877/* 879/*
diff --git a/include/linux/ext3_jbd.h b/include/linux/ext3_jbd.h
index 8c43b13a02fe..cf82d519be40 100644
--- a/include/linux/ext3_jbd.h
+++ b/include/linux/ext3_jbd.h
@@ -137,17 +137,17 @@ int __ext3_journal_dirty_metadata(const char *where,
137 handle_t *handle, struct buffer_head *bh); 137 handle_t *handle, struct buffer_head *bh);
138 138
139#define ext3_journal_get_undo_access(handle, bh) \ 139#define ext3_journal_get_undo_access(handle, bh) \
140 __ext3_journal_get_undo_access(__FUNCTION__, (handle), (bh)) 140 __ext3_journal_get_undo_access(__func__, (handle), (bh))
141#define ext3_journal_get_write_access(handle, bh) \ 141#define ext3_journal_get_write_access(handle, bh) \
142 __ext3_journal_get_write_access(__FUNCTION__, (handle), (bh)) 142 __ext3_journal_get_write_access(__func__, (handle), (bh))
143#define ext3_journal_revoke(handle, blocknr, bh) \ 143#define ext3_journal_revoke(handle, blocknr, bh) \
144 __ext3_journal_revoke(__FUNCTION__, (handle), (blocknr), (bh)) 144 __ext3_journal_revoke(__func__, (handle), (blocknr), (bh))
145#define ext3_journal_get_create_access(handle, bh) \ 145#define ext3_journal_get_create_access(handle, bh) \
146 __ext3_journal_get_create_access(__FUNCTION__, (handle), (bh)) 146 __ext3_journal_get_create_access(__func__, (handle), (bh))
147#define ext3_journal_dirty_metadata(handle, bh) \ 147#define ext3_journal_dirty_metadata(handle, bh) \
148 __ext3_journal_dirty_metadata(__FUNCTION__, (handle), (bh)) 148 __ext3_journal_dirty_metadata(__func__, (handle), (bh))
149#define ext3_journal_forget(handle, bh) \ 149#define ext3_journal_forget(handle, bh) \
150 __ext3_journal_forget(__FUNCTION__, (handle), (bh)) 150 __ext3_journal_forget(__func__, (handle), (bh))
151 151
152int ext3_journal_dirty_data(handle_t *handle, struct buffer_head *bh); 152int ext3_journal_dirty_data(handle_t *handle, struct buffer_head *bh);
153 153
@@ -160,7 +160,7 @@ static inline handle_t *ext3_journal_start(struct inode *inode, int nblocks)
160} 160}
161 161
162#define ext3_journal_stop(handle) \ 162#define ext3_journal_stop(handle) \
163 __ext3_journal_stop(__FUNCTION__, (handle)) 163 __ext3_journal_stop(__func__, (handle))
164 164
165static inline handle_t *ext3_journal_current_handle(void) 165static inline handle_t *ext3_journal_current_handle(void)
166{ 166{
diff --git a/include/linux/fb.h b/include/linux/fb.h
index 531ccd5f5960..75a81eaf3430 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -808,6 +808,7 @@ struct fb_tile_ops {
808struct fb_info { 808struct fb_info {
809 int node; 809 int node;
810 int flags; 810 int flags;
811 struct mutex lock; /* Lock for open/release/ioctl funcs */
811 struct fb_var_screeninfo var; /* Current var */ 812 struct fb_var_screeninfo var; /* Current var */
812 struct fb_fix_screeninfo fix; /* Current fix */ 813 struct fb_fix_screeninfo fix; /* Current fix */
813 struct fb_monspecs monspecs; /* Current Monitor specs */ 814 struct fb_monspecs monspecs; /* Current Monitor specs */
diff --git a/include/linux/firewire-cdev.h b/include/linux/firewire-cdev.h
index 0f0e271f97fa..4d078e99c017 100644
--- a/include/linux/firewire-cdev.h
+++ b/include/linux/firewire-cdev.h
@@ -154,8 +154,13 @@ struct fw_cdev_event_iso_interrupt {
154 * @request: Valid if @common.type == %FW_CDEV_EVENT_REQUEST 154 * @request: Valid if @common.type == %FW_CDEV_EVENT_REQUEST
155 * @iso_interrupt: Valid if @common.type == %FW_CDEV_EVENT_ISO_INTERRUPT 155 * @iso_interrupt: Valid if @common.type == %FW_CDEV_EVENT_ISO_INTERRUPT
156 * 156 *
157 * Convenience union for userspace use. Events could be read(2) into a char 157 * Convenience union for userspace use. Events could be read(2) into an
158 * buffer and then cast to this union for further processing. 158 * appropriately aligned char buffer and then cast to this union for further
159 * processing. Note that for a request, response or iso_interrupt event,
160 * the data[] or header[] may make the size of the full event larger than
161 * sizeof(union fw_cdev_event). Also note that if you attempt to read(2)
162 * an event into a buffer that is not large enough for it, the data that does
163 * not fit will be discarded so that the next read(2) will return a new event.
159 */ 164 */
160union fw_cdev_event { 165union fw_cdev_event {
161 struct fw_cdev_event_common common; 166 struct fw_cdev_event_common common;
diff --git a/include/linux/freezer.h b/include/linux/freezer.h
index deddeedf3257..8f225339eee9 100644
--- a/include/linux/freezer.h
+++ b/include/linux/freezer.h
@@ -6,7 +6,7 @@
6#include <linux/sched.h> 6#include <linux/sched.h>
7#include <linux/wait.h> 7#include <linux/wait.h>
8 8
9#ifdef CONFIG_PM_SLEEP 9#ifdef CONFIG_FREEZER
10/* 10/*
11 * Check if a process has been frozen 11 * Check if a process has been frozen
12 */ 12 */
@@ -39,28 +39,18 @@ static inline void clear_freeze_flag(struct task_struct *p)
39 clear_tsk_thread_flag(p, TIF_FREEZE); 39 clear_tsk_thread_flag(p, TIF_FREEZE);
40} 40}
41 41
42static inline bool should_send_signal(struct task_struct *p)
43{
44 return !(p->flags & PF_FREEZER_NOSIG);
45}
46
42/* 47/*
43 * Wake up a frozen process 48 * Wake up a frozen process
44 *
45 * task_lock() is taken to prevent the race with refrigerator() which may
46 * occur if the freezing of tasks fails. Namely, without the lock, if the
47 * freezing of tasks failed, thaw_tasks() might have run before a task in
48 * refrigerator() could call frozen_process(), in which case the task would be
49 * frozen and no one would thaw it.
50 */ 49 */
51static inline int thaw_process(struct task_struct *p) 50extern int __thaw_process(struct task_struct *p);
52{ 51
53 task_lock(p); 52/* Takes and releases task alloc lock using task_lock() */
54 if (frozen(p)) { 53extern int thaw_process(struct task_struct *p);
55 p->flags &= ~PF_FROZEN;
56 task_unlock(p);
57 wake_up_process(p);
58 return 1;
59 }
60 clear_freeze_flag(p);
61 task_unlock(p);
62 return 0;
63}
64 54
65extern void refrigerator(void); 55extern void refrigerator(void);
66extern int freeze_processes(void); 56extern int freeze_processes(void);
@@ -75,6 +65,15 @@ static inline int try_to_freeze(void)
75 return 0; 65 return 0;
76} 66}
77 67
68extern bool freeze_task(struct task_struct *p, bool sig_only);
69extern void cancel_freezing(struct task_struct *p);
70
71#ifdef CONFIG_CGROUP_FREEZER
72extern int cgroup_frozen(struct task_struct *task);
73#else /* !CONFIG_CGROUP_FREEZER */
74static inline int cgroup_frozen(struct task_struct *task) { return 0; }
75#endif /* !CONFIG_CGROUP_FREEZER */
76
78/* 77/*
79 * The PF_FREEZER_SKIP flag should be set by a vfork parent right before it 78 * The PF_FREEZER_SKIP flag should be set by a vfork parent right before it
80 * calls wait_for_completion(&vfork) and reset right after it returns from this 79 * calls wait_for_completion(&vfork) and reset right after it returns from this
@@ -166,7 +165,7 @@ static inline void set_freezable_with_signal(void)
166 } while (try_to_freeze()); \ 165 } while (try_to_freeze()); \
167 __retval; \ 166 __retval; \
168}) 167})
169#else /* !CONFIG_PM_SLEEP */ 168#else /* !CONFIG_FREEZER */
170static inline int frozen(struct task_struct *p) { return 0; } 169static inline int frozen(struct task_struct *p) { return 0; }
171static inline int freezing(struct task_struct *p) { return 0; } 170static inline int freezing(struct task_struct *p) { return 0; }
172static inline void set_freeze_flag(struct task_struct *p) {} 171static inline void set_freeze_flag(struct task_struct *p) {}
@@ -191,6 +190,6 @@ static inline void set_freezable_with_signal(void) {}
191#define wait_event_freezable_timeout(wq, condition, timeout) \ 190#define wait_event_freezable_timeout(wq, condition, timeout) \
192 wait_event_interruptible_timeout(wq, condition, timeout) 191 wait_event_interruptible_timeout(wq, condition, timeout)
193 192
194#endif /* !CONFIG_PM_SLEEP */ 193#endif /* !CONFIG_FREEZER */
195 194
196#endif /* FREEZER_H_INCLUDED */ 195#endif /* FREEZER_H_INCLUDED */
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 44e3cb2f1966..a6a625be13fc 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -947,6 +947,14 @@ struct lock_manager_operations {
947 int (*fl_change)(struct file_lock **, int); 947 int (*fl_change)(struct file_lock **, int);
948}; 948};
949 949
950struct lock_manager {
951 struct list_head list;
952};
953
954void locks_start_grace(struct lock_manager *);
955void locks_end_grace(struct lock_manager *);
956int locks_in_grace(void);
957
950/* that will die - we need it for nfs_lock_info */ 958/* that will die - we need it for nfs_lock_info */
951#include <linux/nfs_fs_i.h> 959#include <linux/nfs_fs_i.h>
952 960
@@ -988,6 +996,13 @@ struct file_lock {
988 996
989#include <linux/fcntl.h> 997#include <linux/fcntl.h>
990 998
999extern void send_sigio(struct fown_struct *fown, int fd, int band);
1000
1001/* fs/sync.c */
1002extern int do_sync_mapping_range(struct address_space *mapping, loff_t offset,
1003 loff_t endbyte, unsigned int flags);
1004
1005#ifdef CONFIG_FILE_LOCKING
991extern int fcntl_getlk(struct file *, struct flock __user *); 1006extern int fcntl_getlk(struct file *, struct flock __user *);
992extern int fcntl_setlk(unsigned int, struct file *, unsigned int, 1007extern int fcntl_setlk(unsigned int, struct file *, unsigned int,
993 struct flock __user *); 1008 struct flock __user *);
@@ -998,14 +1013,9 @@ extern int fcntl_setlk64(unsigned int, struct file *, unsigned int,
998 struct flock64 __user *); 1013 struct flock64 __user *);
999#endif 1014#endif
1000 1015
1001extern void send_sigio(struct fown_struct *fown, int fd, int band);
1002extern int fcntl_setlease(unsigned int fd, struct file *filp, long arg); 1016extern int fcntl_setlease(unsigned int fd, struct file *filp, long arg);
1003extern int fcntl_getlease(struct file *filp); 1017extern int fcntl_getlease(struct file *filp);
1004 1018
1005/* fs/sync.c */
1006extern int do_sync_mapping_range(struct address_space *mapping, loff_t offset,
1007 loff_t endbyte, unsigned int flags);
1008
1009/* fs/locks.c */ 1019/* fs/locks.c */
1010extern void locks_init_lock(struct file_lock *); 1020extern void locks_init_lock(struct file_lock *);
1011extern void locks_copy_lock(struct file_lock *, struct file_lock *); 1021extern void locks_copy_lock(struct file_lock *, struct file_lock *);
@@ -1028,6 +1038,37 @@ extern int lease_modify(struct file_lock **, int);
1028extern int lock_may_read(struct inode *, loff_t start, unsigned long count); 1038extern int lock_may_read(struct inode *, loff_t start, unsigned long count);
1029extern int lock_may_write(struct inode *, loff_t start, unsigned long count); 1039extern int lock_may_write(struct inode *, loff_t start, unsigned long count);
1030extern struct seq_operations locks_seq_operations; 1040extern struct seq_operations locks_seq_operations;
1041#else /* !CONFIG_FILE_LOCKING */
1042#define fcntl_getlk(a, b) ({ -EINVAL; })
1043#define fcntl_setlk(a, b, c, d) ({ -EACCES; })
1044#if BITS_PER_LONG == 32
1045#define fcntl_getlk64(a, b) ({ -EINVAL; })
1046#define fcntl_setlk64(a, b, c, d) ({ -EACCES; })
1047#endif
1048#define fcntl_setlease(a, b, c) ({ 0; })
1049#define fcntl_getlease(a) ({ 0; })
1050#define locks_init_lock(a) ({ })
1051#define __locks_copy_lock(a, b) ({ })
1052#define locks_copy_lock(a, b) ({ })
1053#define locks_remove_posix(a, b) ({ })
1054#define locks_remove_flock(a) ({ })
1055#define posix_test_lock(a, b) ({ 0; })
1056#define posix_lock_file(a, b, c) ({ -ENOLCK; })
1057#define posix_lock_file_wait(a, b) ({ -ENOLCK; })
1058#define posix_unblock_lock(a, b) (-ENOENT)
1059#define vfs_test_lock(a, b) ({ 0; })
1060#define vfs_lock_file(a, b, c, d) (-ENOLCK)
1061#define vfs_cancel_lock(a, b) ({ 0; })
1062#define flock_lock_file_wait(a, b) ({ -ENOLCK; })
1063#define __break_lease(a, b) ({ 0; })
1064#define lease_get_mtime(a, b) ({ })
1065#define generic_setlease(a, b, c) ({ -EINVAL; })
1066#define vfs_setlease(a, b, c) ({ -EINVAL; })
1067#define lease_modify(a, b) ({ -EINVAL; })
1068#define lock_may_read(a, b, c) ({ 1; })
1069#define lock_may_write(a, b, c) ({ 1; })
1070#endif /* !CONFIG_FILE_LOCKING */
1071
1031 1072
1032struct fasync_struct { 1073struct fasync_struct {
1033 int magic; 1074 int magic;
@@ -1575,9 +1616,12 @@ extern int vfs_statfs(struct dentry *, struct kstatfs *);
1575/* /sys/fs */ 1616/* /sys/fs */
1576extern struct kobject *fs_kobj; 1617extern struct kobject *fs_kobj;
1577 1618
1619extern int rw_verify_area(int, struct file *, loff_t *, size_t);
1620
1578#define FLOCK_VERIFY_READ 1 1621#define FLOCK_VERIFY_READ 1
1579#define FLOCK_VERIFY_WRITE 2 1622#define FLOCK_VERIFY_WRITE 2
1580 1623
1624#ifdef CONFIG_FILE_LOCKING
1581extern int locks_mandatory_locked(struct inode *); 1625extern int locks_mandatory_locked(struct inode *);
1582extern int locks_mandatory_area(int, struct inode *, struct file *, loff_t, size_t); 1626extern int locks_mandatory_area(int, struct inode *, struct file *, loff_t, size_t);
1583 1627
@@ -1608,8 +1652,6 @@ static inline int locks_verify_locked(struct inode *inode)
1608 return 0; 1652 return 0;
1609} 1653}
1610 1654
1611extern int rw_verify_area(int, struct file *, loff_t *, size_t);
1612
1613static inline int locks_verify_truncate(struct inode *inode, 1655static inline int locks_verify_truncate(struct inode *inode,
1614 struct file *filp, 1656 struct file *filp,
1615 loff_t size) 1657 loff_t size)
@@ -1630,6 +1672,15 @@ static inline int break_lease(struct inode *inode, unsigned int mode)
1630 return __break_lease(inode, mode); 1672 return __break_lease(inode, mode);
1631 return 0; 1673 return 0;
1632} 1674}
1675#else /* !CONFIG_FILE_LOCKING */
1676#define locks_mandatory_locked(a) ({ 0; })
1677#define locks_mandatory_area(a, b, c, d, e) ({ 0; })
1678#define __mandatory_lock(a) ({ 0; })
1679#define mandatory_lock(a) ({ 0; })
1680#define locks_verify_locked(a) ({ 0; })
1681#define locks_verify_truncate(a, b, c) ({ 0; })
1682#define break_lease(a, b) ({ 0; })
1683#endif /* CONFIG_FILE_LOCKING */
1633 1684
1634/* fs/open.c */ 1685/* fs/open.c */
1635 1686
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index bb384068272e..a3d46151be19 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -1,10 +1,14 @@
1#ifndef _LINUX_FTRACE_H 1#ifndef _LINUX_FTRACE_H
2#define _LINUX_FTRACE_H 2#define _LINUX_FTRACE_H
3 3
4#ifdef CONFIG_FTRACE
5
6#include <linux/linkage.h> 4#include <linux/linkage.h>
7#include <linux/fs.h> 5#include <linux/fs.h>
6#include <linux/ktime.h>
7#include <linux/init.h>
8#include <linux/types.h>
9#include <linux/kallsyms.h>
10
11#ifdef CONFIG_FTRACE
8 12
9extern int ftrace_enabled; 13extern int ftrace_enabled;
10extern int 14extern int
@@ -36,6 +40,7 @@ extern void ftrace_stub(unsigned long a0, unsigned long a1);
36# define register_ftrace_function(ops) do { } while (0) 40# define register_ftrace_function(ops) do { } while (0)
37# define unregister_ftrace_function(ops) do { } while (0) 41# define unregister_ftrace_function(ops) do { } while (0)
38# define clear_ftrace_function(ops) do { } while (0) 42# define clear_ftrace_function(ops) do { } while (0)
43static inline void ftrace_kill_atomic(void) { }
39#endif /* CONFIG_FTRACE */ 44#endif /* CONFIG_FTRACE */
40 45
41#ifdef CONFIG_DYNAMIC_FTRACE 46#ifdef CONFIG_DYNAMIC_FTRACE
@@ -76,8 +81,10 @@ extern void mcount_call(void);
76 81
77extern int skip_trace(unsigned long ip); 82extern int skip_trace(unsigned long ip);
78 83
79void ftrace_disable_daemon(void); 84extern void ftrace_release(void *start, unsigned long size);
80void ftrace_enable_daemon(void); 85
86extern void ftrace_disable_daemon(void);
87extern void ftrace_enable_daemon(void);
81 88
82#else 89#else
83# define skip_trace(ip) ({ 0; }) 90# define skip_trace(ip) ({ 0; })
@@ -85,6 +92,7 @@ void ftrace_enable_daemon(void);
85# define ftrace_set_filter(buf, len, reset) do { } while (0) 92# define ftrace_set_filter(buf, len, reset) do { } while (0)
86# define ftrace_disable_daemon() do { } while (0) 93# define ftrace_disable_daemon() do { } while (0)
87# define ftrace_enable_daemon() do { } while (0) 94# define ftrace_enable_daemon() do { } while (0)
95static inline void ftrace_release(void *start, unsigned long size) { }
88#endif /* CONFIG_DYNAMIC_FTRACE */ 96#endif /* CONFIG_DYNAMIC_FTRACE */
89 97
90/* totally disable ftrace - can not re-enable after this */ 98/* totally disable ftrace - can not re-enable after this */
@@ -98,9 +106,11 @@ static inline void tracer_disable(void)
98#endif 106#endif
99} 107}
100 108
101/* Ftrace disable/restore without lock. Some synchronization mechanism 109/*
110 * Ftrace disable/restore without lock. Some synchronization mechanism
102 * must be used to prevent ftrace_enabled to be changed between 111 * must be used to prevent ftrace_enabled to be changed between
103 * disable/restore. */ 112 * disable/restore.
113 */
104static inline int __ftrace_enabled_save(void) 114static inline int __ftrace_enabled_save(void)
105{ 115{
106#ifdef CONFIG_FTRACE 116#ifdef CONFIG_FTRACE
@@ -157,9 +167,71 @@ static inline void __ftrace_enabled_restore(int enabled)
157#ifdef CONFIG_TRACING 167#ifdef CONFIG_TRACING
158extern void 168extern void
159ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3); 169ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3);
170
171/**
172 * ftrace_printk - printf formatting in the ftrace buffer
173 * @fmt: the printf format for printing
174 *
175 * Note: __ftrace_printk is an internal function for ftrace_printk and
176 * the @ip is passed in via the ftrace_printk macro.
177 *
178 * This function allows a kernel developer to debug fast path sections
179 * that printk is not appropriate for. By scattering in various
180 * printk like tracing in the code, a developer can quickly see
181 * where problems are occurring.
182 *
183 * This is intended as a debugging tool for the developer only.
184 * Please refrain from leaving ftrace_printks scattered around in
185 * your code.
186 */
187# define ftrace_printk(fmt...) __ftrace_printk(_THIS_IP_, fmt)
188extern int
189__ftrace_printk(unsigned long ip, const char *fmt, ...)
190 __attribute__ ((format (printf, 2, 3)));
191extern void ftrace_dump(void);
160#else 192#else
161static inline void 193static inline void
162ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3) { } 194ftrace_special(unsigned long arg1, unsigned long arg2, unsigned long arg3) { }
195static inline int
196ftrace_printk(const char *fmt, ...) __attribute__ ((format (printf, 1, 0)));
197
198static inline int
199ftrace_printk(const char *fmt, ...)
200{
201 return 0;
202}
203static inline void ftrace_dump(void) { }
163#endif 204#endif
164 205
206#ifdef CONFIG_FTRACE_MCOUNT_RECORD
207extern void ftrace_init(void);
208extern void ftrace_init_module(unsigned long *start, unsigned long *end);
209#else
210static inline void ftrace_init(void) { }
211static inline void
212ftrace_init_module(unsigned long *start, unsigned long *end) { }
213#endif
214
215
216struct boot_trace {
217 pid_t caller;
218 char func[KSYM_NAME_LEN];
219 int result;
220 unsigned long long duration; /* usecs */
221 ktime_t calltime;
222 ktime_t rettime;
223};
224
225#ifdef CONFIG_BOOT_TRACER
226extern void trace_boot(struct boot_trace *it, initcall_t fn);
227extern void start_boot_trace(void);
228extern void stop_boot_trace(void);
229#else
230static inline void trace_boot(struct boot_trace *it, initcall_t fn) { }
231static inline void start_boot_trace(void) { }
232static inline void stop_boot_trace(void) { }
233#endif
234
235
236
165#endif /* _LINUX_FTRACE_H */ 237#endif /* _LINUX_FTRACE_H */
diff --git a/include/linux/fuse.h b/include/linux/fuse.h
index 265635dc9908..350fe9767bbc 100644
--- a/include/linux/fuse.h
+++ b/include/linux/fuse.h
@@ -17,8 +17,14 @@
17 * - add lock_owner field to fuse_setattr_in, fuse_read_in and fuse_write_in 17 * - add lock_owner field to fuse_setattr_in, fuse_read_in and fuse_write_in
18 * - add blksize field to fuse_attr 18 * - add blksize field to fuse_attr
19 * - add file flags field to fuse_read_in and fuse_write_in 19 * - add file flags field to fuse_read_in and fuse_write_in
20 *
21 * 7.10
22 * - add nonseekable open flag
20 */ 23 */
21 24
25#ifndef _LINUX_FUSE_H
26#define _LINUX_FUSE_H
27
22#include <asm/types.h> 28#include <asm/types.h>
23#include <linux/major.h> 29#include <linux/major.h>
24 30
@@ -26,7 +32,7 @@
26#define FUSE_KERNEL_VERSION 7 32#define FUSE_KERNEL_VERSION 7
27 33
28/** Minor version number of this interface */ 34/** Minor version number of this interface */
29#define FUSE_KERNEL_MINOR_VERSION 9 35#define FUSE_KERNEL_MINOR_VERSION 10
30 36
31/** The node ID of the root inode */ 37/** The node ID of the root inode */
32#define FUSE_ROOT_ID 1 38#define FUSE_ROOT_ID 1
@@ -98,9 +104,11 @@ struct fuse_file_lock {
98 * 104 *
99 * FOPEN_DIRECT_IO: bypass page cache for this open file 105 * FOPEN_DIRECT_IO: bypass page cache for this open file
100 * FOPEN_KEEP_CACHE: don't invalidate the data cache on open 106 * FOPEN_KEEP_CACHE: don't invalidate the data cache on open
107 * FOPEN_NONSEEKABLE: the file is not seekable
101 */ 108 */
102#define FOPEN_DIRECT_IO (1 << 0) 109#define FOPEN_DIRECT_IO (1 << 0)
103#define FOPEN_KEEP_CACHE (1 << 1) 110#define FOPEN_KEEP_CACHE (1 << 1)
111#define FOPEN_NONSEEKABLE (1 << 2)
104 112
105/** 113/**
106 * INIT request/reply flags 114 * INIT request/reply flags
@@ -409,3 +417,5 @@ struct fuse_dirent {
409#define FUSE_DIRENT_ALIGN(x) (((x) + sizeof(__u64) - 1) & ~(sizeof(__u64) - 1)) 417#define FUSE_DIRENT_ALIGN(x) (((x) + sizeof(__u64) - 1) & ~(sizeof(__u64) - 1))
410#define FUSE_DIRENT_SIZE(d) \ 418#define FUSE_DIRENT_SIZE(d) \
411 FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET + (d)->namelen) 419 FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET + (d)->namelen)
420
421#endif /* _LINUX_FUSE_H */
diff --git a/include/linux/gameport.h b/include/linux/gameport.h
index f64e29c0ef3f..0cd825f7363a 100644
--- a/include/linux/gameport.h
+++ b/include/linux/gameport.h
@@ -146,10 +146,11 @@ static inline void gameport_unpin_driver(struct gameport *gameport)
146 mutex_unlock(&gameport->drv_mutex); 146 mutex_unlock(&gameport->drv_mutex);
147} 147}
148 148
149void __gameport_register_driver(struct gameport_driver *drv, struct module *owner); 149int __gameport_register_driver(struct gameport_driver *drv,
150static inline void gameport_register_driver(struct gameport_driver *drv) 150 struct module *owner, const char *mod_name);
151static inline int __must_check gameport_register_driver(struct gameport_driver *drv)
151{ 152{
152 __gameport_register_driver(drv, THIS_MODULE); 153 return __gameport_register_driver(drv, THIS_MODULE, KBUILD_MODNAME);
153} 154}
154 155
155void gameport_unregister_driver(struct gameport_driver *drv); 156void gameport_unregister_driver(struct gameport_driver *drv);
diff --git a/include/linux/gpio.h b/include/linux/gpio.h
index 730a20b83576..e10c49a5b96e 100644
--- a/include/linux/gpio.h
+++ b/include/linux/gpio.h
@@ -8,6 +8,7 @@
8 8
9#else 9#else
10 10
11#include <linux/kernel.h>
11#include <linux/types.h> 12#include <linux/types.h>
12#include <linux/errno.h> 13#include <linux/errno.h>
13 14
@@ -32,6 +33,8 @@ static inline int gpio_request(unsigned gpio, const char *label)
32 33
33static inline void gpio_free(unsigned gpio) 34static inline void gpio_free(unsigned gpio)
34{ 35{
36 might_sleep();
37
35 /* GPIO can never have been requested */ 38 /* GPIO can never have been requested */
36 WARN_ON(1); 39 WARN_ON(1);
37} 40}
diff --git a/include/linux/hid.h b/include/linux/hid.h
index ac4e678a04ed..f13bca2dd53b 100644
--- a/include/linux/hid.h
+++ b/include/linux/hid.h
@@ -67,6 +67,7 @@
67#include <linux/types.h> 67#include <linux/types.h>
68#include <linux/slab.h> 68#include <linux/slab.h>
69#include <linux/list.h> 69#include <linux/list.h>
70#include <linux/mod_devicetable.h> /* hid_device_id */
70#include <linux/timer.h> 71#include <linux/timer.h>
71#include <linux/workqueue.h> 72#include <linux/workqueue.h>
72#include <linux/input.h> 73#include <linux/input.h>
@@ -246,6 +247,19 @@ struct hid_item {
246#define HID_FEATURE_REPORT 2 247#define HID_FEATURE_REPORT 2
247 248
248/* 249/*
250 * HID connect requests
251 */
252
253#define HID_CONNECT_HIDINPUT 0x01
254#define HID_CONNECT_HIDINPUT_FORCE 0x02
255#define HID_CONNECT_HIDRAW 0x04
256#define HID_CONNECT_HIDDEV 0x08
257#define HID_CONNECT_HIDDEV_FORCE 0x10
258#define HID_CONNECT_FF 0x20
259#define HID_CONNECT_DEFAULT (HID_CONNECT_HIDINPUT|HID_CONNECT_HIDRAW| \
260 HID_CONNECT_HIDDEV|HID_CONNECT_FF)
261
262/*
249 * HID device quirks. 263 * HID device quirks.
250 */ 264 */
251 265
@@ -256,48 +270,11 @@ struct hid_item {
256 270
257#define HID_QUIRK_INVERT 0x00000001 271#define HID_QUIRK_INVERT 0x00000001
258#define HID_QUIRK_NOTOUCH 0x00000002 272#define HID_QUIRK_NOTOUCH 0x00000002
259#define HID_QUIRK_IGNORE 0x00000004
260#define HID_QUIRK_NOGET 0x00000008 273#define HID_QUIRK_NOGET 0x00000008
261#define HID_QUIRK_HIDDEV 0x00000010
262#define HID_QUIRK_BADPAD 0x00000020 274#define HID_QUIRK_BADPAD 0x00000020
263#define HID_QUIRK_MULTI_INPUT 0x00000040 275#define HID_QUIRK_MULTI_INPUT 0x00000040
264#define HID_QUIRK_2WHEEL_MOUSE_HACK_7 0x00000080
265#define HID_QUIRK_2WHEEL_MOUSE_HACK_5 0x00000100
266#define HID_QUIRK_2WHEEL_MOUSE_HACK_ON 0x00000200
267#define HID_QUIRK_MIGHTYMOUSE 0x00000400
268#define HID_QUIRK_APPLE_HAS_FN 0x00000800
269#define HID_QUIRK_APPLE_FN_ON 0x00001000
270#define HID_QUIRK_INVERT_HWHEEL 0x00002000
271#define HID_QUIRK_APPLE_ISO_KEYBOARD 0x00004000
272#define HID_QUIRK_BAD_RELATIVE_KEYS 0x00008000
273#define HID_QUIRK_SKIP_OUTPUT_REPORTS 0x00010000 276#define HID_QUIRK_SKIP_OUTPUT_REPORTS 0x00010000
274#define HID_QUIRK_IGNORE_MOUSE 0x00020000
275#define HID_QUIRK_SONY_PS3_CONTROLLER 0x00040000
276#define HID_QUIRK_DUPLICATE_USAGES 0x00080000
277#define HID_QUIRK_RESET_LEDS 0x00100000
278#define HID_QUIRK_HIDINPUT 0x00200000
279#define HID_QUIRK_LOGITECH_IGNORE_DOUBLED_WHEEL 0x00400000
280#define HID_QUIRK_LOGITECH_EXPANDED_KEYMAP 0x00800000
281#define HID_QUIRK_IGNORE_HIDINPUT 0x01000000
282#define HID_QUIRK_2WHEEL_MOUSE_HACK_B8 0x02000000
283#define HID_QUIRK_HWHEEL_WHEEL_INVERT 0x04000000
284#define HID_QUIRK_MICROSOFT_KEYS 0x08000000
285#define HID_QUIRK_FULLSPEED_INTERVAL 0x10000000 277#define HID_QUIRK_FULLSPEED_INTERVAL 0x10000000
286#define HID_QUIRK_APPLE_NUMLOCK_EMULATION 0x20000000
287
288/*
289 * Separate quirks for runtime report descriptor fixup
290 */
291
292#define HID_QUIRK_RDESC_CYMOTION 0x00000001
293#define HID_QUIRK_RDESC_LOGITECH 0x00000002
294#define HID_QUIRK_RDESC_SWAPPED_MIN_MAX 0x00000004
295#define HID_QUIRK_RDESC_PETALYNX 0x00000008
296#define HID_QUIRK_RDESC_MACBOOK_JIS 0x00000010
297#define HID_QUIRK_RDESC_BUTTON_CONSUMER 0x00000020
298#define HID_QUIRK_RDESC_SAMSUNG_REMOTE 0x00000040
299#define HID_QUIRK_RDESC_MICROSOFT_RECV_1028 0x00000080
300#define HID_QUIRK_RDESC_SUNPLUS_WDESKTOP 0x00000100
301 278
302/* 279/*
303 * This is the global environment of the parser. This information is 280 * This is the global environment of the parser. This information is
@@ -411,12 +388,21 @@ struct hid_report_enum {
411struct hid_control_fifo { 388struct hid_control_fifo {
412 unsigned char dir; 389 unsigned char dir;
413 struct hid_report *report; 390 struct hid_report *report;
391 char *raw_report;
392};
393
394struct hid_output_fifo {
395 struct hid_report *report;
396 char *raw_report;
414}; 397};
415 398
416#define HID_CLAIMED_INPUT 1 399#define HID_CLAIMED_INPUT 1
417#define HID_CLAIMED_HIDDEV 2 400#define HID_CLAIMED_HIDDEV 2
418#define HID_CLAIMED_HIDRAW 4 401#define HID_CLAIMED_HIDRAW 4
419 402
403#define HID_STAT_ADDED 1
404#define HID_STAT_PARSED 2
405
420#define HID_CTRL_RUNNING 1 406#define HID_CTRL_RUNNING 1
421#define HID_OUT_RUNNING 2 407#define HID_OUT_RUNNING 2
422#define HID_IN_RUNNING 3 408#define HID_IN_RUNNING 3
@@ -431,22 +417,28 @@ struct hid_input {
431 struct input_dev *input; 417 struct input_dev *input;
432}; 418};
433 419
420struct hid_driver;
421struct hid_ll_driver;
422
434struct hid_device { /* device report descriptor */ 423struct hid_device { /* device report descriptor */
435 __u8 *rdesc; 424 __u8 *rdesc;
436 unsigned rsize; 425 unsigned rsize;
437 struct hid_collection *collection; /* List of HID collections */ 426 struct hid_collection *collection; /* List of HID collections */
438 unsigned collection_size; /* Number of allocated hid_collections */ 427 unsigned collection_size; /* Number of allocated hid_collections */
439 unsigned maxcollection; /* Number of parsed collections */ 428 unsigned maxcollection; /* Number of parsed collections */
440 unsigned maxapplication; /* Number of applications */ 429 unsigned maxapplication; /* Number of applications */
441 unsigned short bus; /* BUS ID */ 430 __u16 bus; /* BUS ID */
442 unsigned short vendor; /* Vendor ID */ 431 __u32 vendor; /* Vendor ID */
443 unsigned short product; /* Product ID */ 432 __u32 product; /* Product ID */
444 unsigned version; /* HID version */ 433 __u32 version; /* HID version */
445 unsigned country; /* HID country */ 434 unsigned country; /* HID country */
446 struct hid_report_enum report_enum[HID_REPORT_TYPES]; 435 struct hid_report_enum report_enum[HID_REPORT_TYPES];
447 436
448 struct device *dev; /* device */ 437 struct device dev; /* device */
438 struct hid_driver *driver;
439 struct hid_ll_driver *ll_driver;
449 440
441 unsigned int status; /* see STAT flags above */
450 unsigned claimed; /* Claimed by hidinput, hiddev? */ 442 unsigned claimed; /* Claimed by hidinput, hiddev? */
451 unsigned quirks; /* Various quirks the device can pull on us */ 443 unsigned quirks; /* Various quirks the device can pull on us */
452 444
@@ -462,26 +454,29 @@ struct hid_device { /* device report descriptor */
462 454
463 void *driver_data; 455 void *driver_data;
464 456
465 __s32 delayed_value; /* For A4 Tech mice hwheel quirk */ 457 /* temporary hid_ff handling (until moved to the drivers) */
466 458 int (*ff_init)(struct hid_device *);
467 /* device-specific function pointers */
468 int (*hidinput_input_event) (struct input_dev *, unsigned int, unsigned int, int);
469 int (*hid_open) (struct hid_device *);
470 void (*hid_close) (struct hid_device *);
471 459
472 /* hiddev event handler */ 460 /* hiddev event handler */
461 int (*hiddev_connect)(struct hid_device *, unsigned int);
473 void (*hiddev_hid_event) (struct hid_device *, struct hid_field *field, 462 void (*hiddev_hid_event) (struct hid_device *, struct hid_field *field,
474 struct hid_usage *, __s32); 463 struct hid_usage *, __s32);
475 void (*hiddev_report_event) (struct hid_device *, struct hid_report *); 464 void (*hiddev_report_event) (struct hid_device *, struct hid_report *);
476 465
477 /* handler for raw output data, used by hidraw */ 466 /* handler for raw output data, used by hidraw */
478 int (*hid_output_raw_report) (struct hid_device *, __u8 *, size_t); 467 int (*hid_output_raw_report) (struct hid_device *, __u8 *, size_t);
479#ifdef CONFIG_USB_HIDINPUT_POWERBOOK
480 unsigned long apple_pressed_fn[BITS_TO_LONGS(KEY_CNT)];
481 unsigned long pb_pressed_numlock[BITS_TO_LONGS(KEY_CNT)];
482#endif
483}; 468};
484 469
470static inline void *hid_get_drvdata(struct hid_device *hdev)
471{
472 return dev_get_drvdata(&hdev->dev);
473}
474
475static inline void hid_set_drvdata(struct hid_device *hdev, void *data)
476{
477 dev_set_drvdata(&hdev->dev, data);
478}
479
485#define HID_GLOBAL_STACK_SIZE 4 480#define HID_GLOBAL_STACK_SIZE 4
486#define HID_COLLECTION_STACK_SIZE 4 481#define HID_COLLECTION_STACK_SIZE 4
487 482
@@ -510,6 +505,107 @@ struct hid_descriptor {
510 struct hid_class_descriptor desc[1]; 505 struct hid_class_descriptor desc[1];
511} __attribute__ ((packed)); 506} __attribute__ ((packed));
512 507
508#define HID_DEVICE(b, ven, prod) \
509 .bus = (b), \
510 .vendor = (ven), .product = (prod)
511
512#define HID_USB_DEVICE(ven, prod) HID_DEVICE(BUS_USB, ven, prod)
513#define HID_BLUETOOTH_DEVICE(ven, prod) HID_DEVICE(BUS_BLUETOOTH, ven, prod)
514
515#define HID_REPORT_ID(rep) \
516 .report_type = (rep)
517#define HID_USAGE_ID(uhid, utype, ucode) \
518 .usage_hid = (uhid), .usage_type = (utype), .usage_code = (ucode)
519/* we don't want to catch types and codes equal to 0 */
520#define HID_TERMINATOR (HID_ANY_ID - 1)
521
522struct hid_report_id {
523 __u32 report_type;
524};
525struct hid_usage_id {
526 __u32 usage_hid;
527 __u32 usage_type;
528 __u32 usage_code;
529};
530
531/**
532 * struct hid_driver
533 * @name: driver name (e.g. "Footech_bar-wheel")
534 * @id_table: which devices is this driver for (must be non-NULL for probe
535 * to be called)
536 * @probe: new device inserted
537 * @remove: device removed (NULL if not a hot-plug capable driver)
538 * @report_table: on which reports to call raw_event (NULL means all)
539 * @raw_event: if report in report_table, this hook is called (NULL means nop)
540 * @usage_table: on which events to call event (NULL means all)
541 * @event: if usage in usage_table, this hook is called (NULL means nop)
542 * @report_fixup: called before report descriptor parsing (NULL means nop)
543 * @input_mapping: invoked on input registering before mapping an usage
544 * @input_mapped: invoked on input registering after mapping an usage
545 *
546 * raw_event and event should return 0 on no action performed, 1 when no
547 * further processing should be done and negative on error
548 *
549 * input_mapping shall return a negative value to completely ignore this usage
550 * (e.g. doubled or invalid usage), zero to continue with parsing of this
551 * usage by generic code (no special handling needed) or positive to skip
552 * generic parsing (needed special handling which was done in the hook already)
553 * input_mapped shall return negative to inform the layer that this usage
554 * should not be considered for further processing or zero to notify that
555 * no processing was performed and should be done in a generic manner
556 * Both these functions may be NULL which means the same behavior as returning
557 * zero from them.
558 */
559struct hid_driver {
560 char *name;
561 const struct hid_device_id *id_table;
562
563 int (*probe)(struct hid_device *dev, const struct hid_device_id *id);
564 void (*remove)(struct hid_device *dev);
565
566 const struct hid_report_id *report_table;
567 int (*raw_event)(struct hid_device *hdev, struct hid_report *report,
568 u8 *data, int size);
569 const struct hid_usage_id *usage_table;
570 int (*event)(struct hid_device *hdev, struct hid_field *field,
571 struct hid_usage *usage, __s32 value);
572
573 void (*report_fixup)(struct hid_device *hdev, __u8 *buf,
574 unsigned int size);
575
576 int (*input_mapping)(struct hid_device *hdev,
577 struct hid_input *hidinput, struct hid_field *field,
578 struct hid_usage *usage, unsigned long **bit, int *max);
579 int (*input_mapped)(struct hid_device *hdev,
580 struct hid_input *hidinput, struct hid_field *field,
581 struct hid_usage *usage, unsigned long **bit, int *max);
582/* private: */
583 struct device_driver driver;
584};
585
586/**
587 * hid_ll_driver - low level driver callbacks
588 * @start: called on probe to start the device
589 * @stop: called on remove
590 * @open: called by input layer on open
591 * @close: called by input layer on close
592 * @hidinput_input_event: event input event (e.g. ff or leds)
593 * @parse: this method is called only once to parse the device data,
594 * shouldn't allocate anything to not leak memory
595 */
596struct hid_ll_driver {
597 int (*start)(struct hid_device *hdev);
598 void (*stop)(struct hid_device *hdev);
599
600 int (*open)(struct hid_device *hdev);
601 void (*close)(struct hid_device *hdev);
602
603 int (*hidinput_input_event) (struct input_dev *idev, unsigned int type,
604 unsigned int code, int value);
605
606 int (*parse)(struct hid_device *hdev);
607};
608
513/* Applications from HID Usage Tables 4/8/99 Version 1.1 */ 609/* Applications from HID Usage Tables 4/8/99 Version 1.1 */
514/* We ignore a few input applications that are not widely used */ 610/* We ignore a few input applications that are not widely used */
515#define IS_INPUT_APPLICATION(a) (((a >= 0x00010000) && (a <= 0x00010008)) || (a == 0x00010080) || (a == 0x000c0001) || (a == 0x000d0002)) 611#define IS_INPUT_APPLICATION(a) (((a >= 0x00010000) && (a <= 0x00010008)) || (a == 0x00010080) || (a == 0x000c0001) || (a == 0x000d0002))
@@ -520,43 +616,157 @@ struct hid_descriptor {
520extern int hid_debug; 616extern int hid_debug;
521#endif 617#endif
522 618
619extern int hid_add_device(struct hid_device *);
620extern void hid_destroy_device(struct hid_device *);
621
622extern int __must_check __hid_register_driver(struct hid_driver *,
623 struct module *, const char *mod_name);
624static inline int __must_check hid_register_driver(struct hid_driver *driver)
625{
626 return __hid_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
627}
628extern void hid_unregister_driver(struct hid_driver *);
629
523extern void hidinput_hid_event(struct hid_device *, struct hid_field *, struct hid_usage *, __s32); 630extern void hidinput_hid_event(struct hid_device *, struct hid_field *, struct hid_usage *, __s32);
524extern void hidinput_report_event(struct hid_device *hid, struct hid_report *report); 631extern void hidinput_report_event(struct hid_device *hid, struct hid_report *report);
525extern int hidinput_connect(struct hid_device *); 632extern int hidinput_connect(struct hid_device *hid, unsigned int force);
526extern void hidinput_disconnect(struct hid_device *); 633extern void hidinput_disconnect(struct hid_device *);
527 634
528int hid_set_field(struct hid_field *, unsigned, __s32); 635int hid_set_field(struct hid_field *, unsigned, __s32);
529int hid_input_report(struct hid_device *, int type, u8 *, int, int); 636int hid_input_report(struct hid_device *, int type, u8 *, int, int);
530int hidinput_find_field(struct hid_device *hid, unsigned int type, unsigned int code, struct hid_field **field); 637int hidinput_find_field(struct hid_device *hid, unsigned int type, unsigned int code, struct hid_field **field);
531int hidinput_mapping_quirks(struct hid_usage *, struct input_dev *, unsigned long **, int *);
532int hidinput_event_quirks(struct hid_device *, struct hid_field *, struct hid_usage *, __s32);
533int hidinput_apple_event(struct hid_device *, struct input_dev *, struct hid_usage *, __s32);
534void hid_output_report(struct hid_report *report, __u8 *data); 638void hid_output_report(struct hid_report *report, __u8 *data);
535void hid_free_device(struct hid_device *device); 639struct hid_device *hid_allocate_device(void);
536struct hid_device *hid_parse_report(__u8 *start, unsigned size); 640int hid_parse_report(struct hid_device *hid, __u8 *start, unsigned size);
641int hid_connect(struct hid_device *hid, unsigned int connect_mask);
642
643/**
644 * hid_map_usage - map usage input bits
645 *
646 * @hidinput: hidinput which we are interested in
647 * @usage: usage to fill in
648 * @bit: pointer to input->{}bit (out parameter)
649 * @max: maximal valid usage->code to consider later (out parameter)
650 * @type: input event type (EV_KEY, EV_REL, ...)
651 * @c: code which corresponds to this usage and type
652 */
653static inline void hid_map_usage(struct hid_input *hidinput,
654 struct hid_usage *usage, unsigned long **bit, int *max,
655 __u8 type, __u16 c)
656{
657 struct input_dev *input = hidinput->input;
658
659 usage->type = type;
660 usage->code = c;
661
662 switch (type) {
663 case EV_ABS:
664 *bit = input->absbit;
665 *max = ABS_MAX;
666 break;
667 case EV_REL:
668 *bit = input->relbit;
669 *max = REL_MAX;
670 break;
671 case EV_KEY:
672 *bit = input->keybit;
673 *max = KEY_MAX;
674 break;
675 case EV_LED:
676 *bit = input->ledbit;
677 *max = LED_MAX;
678 break;
679 }
680}
681
682/**
683 * hid_map_usage_clear - map usage input bits and clear the input bit
684 *
685 * The same as hid_map_usage, except the @c bit is also cleared in supported
686 * bits (@bit).
687 */
688static inline void hid_map_usage_clear(struct hid_input *hidinput,
689 struct hid_usage *usage, unsigned long **bit, int *max,
690 __u8 type, __u16 c)
691{
692 hid_map_usage(hidinput, usage, bit, max, type, c);
693 clear_bit(c, *bit);
694}
695
696/**
697 * hid_parse - parse HW reports
698 *
699 * @hdev: hid device
700 *
701 * Call this from probe after you set up the device (if needed). Your
702 * report_fixup will be called (if non-NULL) after reading raw report from
703 * device before passing it to hid layer for real parsing.
704 */
705static inline int __must_check hid_parse(struct hid_device *hdev)
706{
707 int ret;
708
709 if (hdev->status & HID_STAT_PARSED)
710 return 0;
711
712 ret = hdev->ll_driver->parse(hdev);
713 if (!ret)
714 hdev->status |= HID_STAT_PARSED;
715
716 return ret;
717}
718
719/**
720 * hid_hw_start - start underlaying HW
721 *
722 * @hdev: hid device
723 * @connect_mask: which outputs to connect, see HID_CONNECT_*
724 *
725 * Call this in probe function *after* hid_parse. This will setup HW buffers
726 * and start the device (if not deffered to device open). hid_hw_stop must be
727 * called if this was successfull.
728 */
729static inline int __must_check hid_hw_start(struct hid_device *hdev,
730 unsigned int connect_mask)
731{
732 int ret = hdev->ll_driver->start(hdev);
733 if (ret || !connect_mask)
734 return ret;
735 ret = hid_connect(hdev, connect_mask);
736 if (ret)
737 hdev->ll_driver->stop(hdev);
738 return ret;
739}
740
741/**
742 * hid_hw_stop - stop underlaying HW
743 *
744 * @hdev: hid device
745 *
746 * This is usually called from remove function or from probe when something
747 * failed and hid_hw_start was called already.
748 */
749static inline void hid_hw_stop(struct hid_device *hdev)
750{
751 hdev->ll_driver->stop(hdev);
752}
753
754void hid_report_raw_event(struct hid_device *hid, int type, u8 *data, int size,
755 int interrupt);
756
757extern int hid_generic_init(void);
758extern void hid_generic_exit(void);
537 759
538/* HID quirks API */ 760/* HID quirks API */
539u32 usbhid_lookup_quirk(const u16 idVendor, const u16 idProduct); 761u32 usbhid_lookup_quirk(const u16 idVendor, const u16 idProduct);
540int usbhid_quirks_init(char **quirks_param); 762int usbhid_quirks_init(char **quirks_param);
541void usbhid_quirks_exit(void); 763void usbhid_quirks_exit(void);
542void usbhid_fixup_report_descriptor(const u16, const u16, char *, unsigned, char **); 764void usbhid_set_leds(struct hid_device *hid);
543
544#ifdef CONFIG_HID_FF
545int hid_ff_init(struct hid_device *hid);
546 765
547int hid_lgff_init(struct hid_device *hid);
548int hid_lg2ff_init(struct hid_device *hid);
549int hid_plff_init(struct hid_device *hid);
550int hid_tmff_init(struct hid_device *hid);
551int hid_zpff_init(struct hid_device *hid);
552#ifdef CONFIG_HID_PID 766#ifdef CONFIG_HID_PID
553int hid_pidff_init(struct hid_device *hid); 767int hid_pidff_init(struct hid_device *hid);
554#else 768#else
555static inline int hid_pidff_init(struct hid_device *hid) { return -ENODEV; } 769#define hid_pidff_init NULL
556#endif
557
558#else
559static inline int hid_ff_init(struct hid_device *hid) { return -1; }
560#endif 770#endif
561 771
562#ifdef CONFIG_HID_DEBUG 772#ifdef CONFIG_HID_DEBUG
@@ -572,10 +782,23 @@ dbg_hid(const char *fmt, ...)
572 return 0; 782 return 0;
573} 783}
574#define dbg_hid_line dbg_hid 784#define dbg_hid_line dbg_hid
575#endif 785#endif /* HID_DEBUG */
576 786
577#define err_hid(format, arg...) printk(KERN_ERR "%s: " format "\n" , \ 787#define err_hid(format, arg...) printk(KERN_ERR "%s: " format "\n" , \
578 __FILE__ , ## arg) 788 __FILE__ , ## arg)
579#endif 789#endif /* HID_FF */
790
791#ifdef CONFIG_HID_COMPAT
792#define HID_COMPAT_LOAD_DRIVER(name) \
793void hid_compat_##name(void) { } \
794EXPORT_SYMBOL(hid_compat_##name)
795#else
796#define HID_COMPAT_LOAD_DRIVER(name)
797#endif /* HID_COMPAT */
798#define HID_COMPAT_CALL_DRIVER(name) do { \
799 extern void hid_compat_##name(void); \
800 hid_compat_##name(); \
801} while (0)
802
580#endif 803#endif
581 804
diff --git a/include/linux/hiddev.h b/include/linux/hiddev.h
index a416b904ba90..c760ae0eb6a1 100644
--- a/include/linux/hiddev.h
+++ b/include/linux/hiddev.h
@@ -182,26 +182,28 @@ struct hiddev_usage_ref_multi {
182/* To traverse the input report descriptor info for a HID device, perform the 182/* To traverse the input report descriptor info for a HID device, perform the
183 * following: 183 * following:
184 * 184 *
185 * rinfo.report_type = HID_REPORT_TYPE_INPUT; 185 * rinfo.report_type = HID_REPORT_TYPE_INPUT;
186 * rinfo.report_id = HID_REPORT_ID_FIRST; 186 * rinfo.report_id = HID_REPORT_ID_FIRST;
187 * ret = ioctl(fd, HIDIOCGREPORTINFO, &rinfo); 187 * ret = ioctl(fd, HIDIOCGREPORTINFO, &rinfo);
188 * 188 *
189 * while (ret >= 0) { 189 * while (ret >= 0) {
190 * for (i = 0; i < rinfo.num_fields; i++) { 190 * for (i = 0; i < rinfo.num_fields; i++) {
191 * finfo.report_type = rinfo.report_type; 191 * finfo.report_type = rinfo.report_type;
192 * finfo.report_id = rinfo.report_id; 192 * finfo.report_id = rinfo.report_id;
193 * finfo.field_index = i; 193 * finfo.field_index = i;
194 * ioctl(fd, HIDIOCGFIELDINFO, &finfo); 194 * ioctl(fd, HIDIOCGFIELDINFO, &finfo);
195 * for (j = 0; j < finfo.maxusage; j++) { 195 * for (j = 0; j < finfo.maxusage; j++) {
196 * uref.field_index = i; 196 * uref.report_type = rinfo.report_type;
197 * uref.usage_index = j; 197 * uref.report_id = rinfo.report_id;
198 * ioctl(fd, HIDIOCGUCODE, &uref); 198 * uref.field_index = i;
199 * ioctl(fd, HIDIOCGUSAGE, &uref); 199 * uref.usage_index = j;
200 * } 200 * ioctl(fd, HIDIOCGUCODE, &uref);
201 * } 201 * ioctl(fd, HIDIOCGUSAGE, &uref);
202 * rinfo.report_id |= HID_REPORT_ID_NEXT; 202 * }
203 * ret = ioctl(fd, HIDIOCGREPORTINFO, &rinfo); 203 * }
204 * } 204 * rinfo.report_id |= HID_REPORT_ID_NEXT;
205 * ret = ioctl(fd, HIDIOCGREPORTINFO, &rinfo);
206 * }
205 */ 207 */
206 208
207 209
@@ -217,7 +219,7 @@ struct hid_field;
217struct hid_report; 219struct hid_report;
218 220
219#ifdef CONFIG_USB_HIDDEV 221#ifdef CONFIG_USB_HIDDEV
220int hiddev_connect(struct hid_device *); 222int hiddev_connect(struct hid_device *hid, unsigned int force);
221void hiddev_disconnect(struct hid_device *); 223void hiddev_disconnect(struct hid_device *);
222void hiddev_hid_event(struct hid_device *hid, struct hid_field *field, 224void hiddev_hid_event(struct hid_device *hid, struct hid_field *field,
223 struct hid_usage *usage, __s32 value); 225 struct hid_usage *usage, __s32 value);
@@ -225,7 +227,9 @@ void hiddev_report_event(struct hid_device *hid, struct hid_report *report);
225int __init hiddev_init(void); 227int __init hiddev_init(void);
226void hiddev_exit(void); 228void hiddev_exit(void);
227#else 229#else
228static inline int hiddev_connect(struct hid_device *hid) { return -1; } 230static inline int hiddev_connect(struct hid_device *hid,
231 unsigned int force)
232{ return -1; }
229static inline void hiddev_disconnect(struct hid_device *hid) { } 233static inline void hiddev_disconnect(struct hid_device *hid) { }
230static inline void hiddev_hid_event(struct hid_device *hid, struct hid_field *field, 234static inline void hiddev_hid_event(struct hid_device *hid, struct hid_field *field,
231 struct hid_usage *usage, __s32 value) { } 235 struct hid_usage *usage, __s32 value) { }
diff --git a/include/linux/hrtimer.h b/include/linux/hrtimer.h
index 2f245fe63bda..9a4e35cd5f79 100644
--- a/include/linux/hrtimer.h
+++ b/include/linux/hrtimer.h
@@ -125,12 +125,12 @@ struct hrtimer {
125 enum hrtimer_restart (*function)(struct hrtimer *); 125 enum hrtimer_restart (*function)(struct hrtimer *);
126 struct hrtimer_clock_base *base; 126 struct hrtimer_clock_base *base;
127 unsigned long state; 127 unsigned long state;
128 enum hrtimer_cb_mode cb_mode;
129 struct list_head cb_entry; 128 struct list_head cb_entry;
129 enum hrtimer_cb_mode cb_mode;
130#ifdef CONFIG_TIMER_STATS 130#ifdef CONFIG_TIMER_STATS
131 int start_pid;
131 void *start_site; 132 void *start_site;
132 char start_comm[16]; 133 char start_comm[16];
133 int start_pid;
134#endif 134#endif
135}; 135};
136 136
@@ -155,10 +155,8 @@ struct hrtimer_sleeper {
155 * @first: pointer to the timer node which expires first 155 * @first: pointer to the timer node which expires first
156 * @resolution: the resolution of the clock, in nanoseconds 156 * @resolution: the resolution of the clock, in nanoseconds
157 * @get_time: function to retrieve the current time of the clock 157 * @get_time: function to retrieve the current time of the clock
158 * @get_softirq_time: function to retrieve the current time from the softirq
159 * @softirq_time: the time when running the hrtimer queue in the softirq 158 * @softirq_time: the time when running the hrtimer queue in the softirq
160 * @offset: offset of this clock to the monotonic base 159 * @offset: offset of this clock to the monotonic base
161 * @reprogram: function to reprogram the timer event
162 */ 160 */
163struct hrtimer_clock_base { 161struct hrtimer_clock_base {
164 struct hrtimer_cpu_base *cpu_base; 162 struct hrtimer_cpu_base *cpu_base;
@@ -167,13 +165,9 @@ struct hrtimer_clock_base {
167 struct rb_node *first; 165 struct rb_node *first;
168 ktime_t resolution; 166 ktime_t resolution;
169 ktime_t (*get_time)(void); 167 ktime_t (*get_time)(void);
170 ktime_t (*get_softirq_time)(void);
171 ktime_t softirq_time; 168 ktime_t softirq_time;
172#ifdef CONFIG_HIGH_RES_TIMERS 169#ifdef CONFIG_HIGH_RES_TIMERS
173 ktime_t offset; 170 ktime_t offset;
174 int (*reprogram)(struct hrtimer *t,
175 struct hrtimer_clock_base *b,
176 ktime_t n);
177#endif 171#endif
178}; 172};
179 173
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 493435bcdbe5..01d67ba9e985 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -60,7 +60,7 @@
60#define I2C_DRIVERID_WM8775 69 /* wm8775 audio processor */ 60#define I2C_DRIVERID_WM8775 69 /* wm8775 audio processor */
61#define I2C_DRIVERID_CS53L32A 70 /* cs53l32a audio processor */ 61#define I2C_DRIVERID_CS53L32A 70 /* cs53l32a audio processor */
62#define I2C_DRIVERID_CX25840 71 /* cx2584x video encoder */ 62#define I2C_DRIVERID_CX25840 71 /* cx2584x video encoder */
63#define I2C_DRIVERID_SAA7127 72 /* saa7124 video encoder */ 63#define I2C_DRIVERID_SAA7127 72 /* saa7127 video encoder */
64#define I2C_DRIVERID_SAA711X 73 /* saa711x video encoders */ 64#define I2C_DRIVERID_SAA711X 73 /* saa711x video encoders */
65#define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */ 65#define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */
66#define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */ 66#define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
new file mode 100644
index 000000000000..fb604dcd38f1
--- /dev/null
+++ b/include/linux/i2c/twl4030.h
@@ -0,0 +1,343 @@
1/*
2 * twl4030.h - header for TWL4030 PM and audio CODEC device
3 *
4 * Copyright (C) 2005-2006 Texas Instruments, Inc.
5 *
6 * Based on tlv320aic23.c:
7 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25#ifndef __TWL4030_H_
26#define __TWL4030_H_
27
28/*
29 * Using the twl4030 core we address registers using a pair
30 * { module id, relative register offset }
31 * which that core then maps to the relevant
32 * { i2c slave, absolute register address }
33 *
34 * The module IDs are meaningful only to the twl4030 core code,
35 * which uses them as array indices to look up the first register
36 * address each module uses within a given i2c slave.
37 */
38
39/* Slave 0 (i2c address 0x48) */
40#define TWL4030_MODULE_USB 0x00
41
42/* Slave 1 (i2c address 0x49) */
43#define TWL4030_MODULE_AUDIO_VOICE 0x01
44#define TWL4030_MODULE_GPIO 0x02
45#define TWL4030_MODULE_INTBR 0x03
46#define TWL4030_MODULE_PIH 0x04
47#define TWL4030_MODULE_TEST 0x05
48
49/* Slave 2 (i2c address 0x4a) */
50#define TWL4030_MODULE_KEYPAD 0x06
51#define TWL4030_MODULE_MADC 0x07
52#define TWL4030_MODULE_INTERRUPTS 0x08
53#define TWL4030_MODULE_LED 0x09
54#define TWL4030_MODULE_MAIN_CHARGE 0x0A
55#define TWL4030_MODULE_PRECHARGE 0x0B
56#define TWL4030_MODULE_PWM0 0x0C
57#define TWL4030_MODULE_PWM1 0x0D
58#define TWL4030_MODULE_PWMA 0x0E
59#define TWL4030_MODULE_PWMB 0x0F
60
61/* Slave 3 (i2c address 0x4b) */
62#define TWL4030_MODULE_BACKUP 0x10
63#define TWL4030_MODULE_INT 0x11
64#define TWL4030_MODULE_PM_MASTER 0x12
65#define TWL4030_MODULE_PM_RECEIVER 0x13
66#define TWL4030_MODULE_RTC 0x14
67#define TWL4030_MODULE_SECURED_REG 0x15
68
69/*
70 * Read and write single 8-bit registers
71 */
72int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg);
73int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg);
74
75/*
76 * Read and write several 8-bit registers at once.
77 *
78 * IMPORTANT: For twl4030_i2c_write(), allocate num_bytes + 1
79 * for the value, and populate your data starting at offset 1.
80 */
81int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, u8 num_bytes);
82int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, u8 num_bytes);
83
84/*----------------------------------------------------------------------*/
85
86/*
87 * NOTE: at up to 1024 registers, this is a big chip.
88 *
89 * Avoid putting register declarations in this file, instead of into
90 * a driver-private file, unless some of the registers in a block
91 * need to be shared with other drivers. One example is blocks that
92 * have Secondary IRQ Handler (SIH) registers.
93 */
94
95#define TWL4030_SIH_CTRL_EXCLEN_MASK BIT(0)
96#define TWL4030_SIH_CTRL_PENDDIS_MASK BIT(1)
97#define TWL4030_SIH_CTRL_COR_MASK BIT(2)
98
99/*----------------------------------------------------------------------*/
100
101/*
102 * GPIO Block Register offsets (use TWL4030_MODULE_GPIO)
103 */
104
105#define REG_GPIODATAIN1 0x0
106#define REG_GPIODATAIN2 0x1
107#define REG_GPIODATAIN3 0x2
108#define REG_GPIODATADIR1 0x3
109#define REG_GPIODATADIR2 0x4
110#define REG_GPIODATADIR3 0x5
111#define REG_GPIODATAOUT1 0x6
112#define REG_GPIODATAOUT2 0x7
113#define REG_GPIODATAOUT3 0x8
114#define REG_CLEARGPIODATAOUT1 0x9
115#define REG_CLEARGPIODATAOUT2 0xA
116#define REG_CLEARGPIODATAOUT3 0xB
117#define REG_SETGPIODATAOUT1 0xC
118#define REG_SETGPIODATAOUT2 0xD
119#define REG_SETGPIODATAOUT3 0xE
120#define REG_GPIO_DEBEN1 0xF
121#define REG_GPIO_DEBEN2 0x10
122#define REG_GPIO_DEBEN3 0x11
123#define REG_GPIO_CTRL 0x12
124#define REG_GPIOPUPDCTR1 0x13
125#define REG_GPIOPUPDCTR2 0x14
126#define REG_GPIOPUPDCTR3 0x15
127#define REG_GPIOPUPDCTR4 0x16
128#define REG_GPIOPUPDCTR5 0x17
129#define REG_GPIO_ISR1A 0x19
130#define REG_GPIO_ISR2A 0x1A
131#define REG_GPIO_ISR3A 0x1B
132#define REG_GPIO_IMR1A 0x1C
133#define REG_GPIO_IMR2A 0x1D
134#define REG_GPIO_IMR3A 0x1E
135#define REG_GPIO_ISR1B 0x1F
136#define REG_GPIO_ISR2B 0x20
137#define REG_GPIO_ISR3B 0x21
138#define REG_GPIO_IMR1B 0x22
139#define REG_GPIO_IMR2B 0x23
140#define REG_GPIO_IMR3B 0x24
141#define REG_GPIO_EDR1 0x28
142#define REG_GPIO_EDR2 0x29
143#define REG_GPIO_EDR3 0x2A
144#define REG_GPIO_EDR4 0x2B
145#define REG_GPIO_EDR5 0x2C
146#define REG_GPIO_SIH_CTRL 0x2D
147
148/* Up to 18 signals are available as GPIOs, when their
149 * pins are not assigned to another use (such as ULPI/USB).
150 */
151#define TWL4030_GPIO_MAX 18
152
153/*----------------------------------------------------------------------*/
154
155/*
156 * Keypad register offsets (use TWL4030_MODULE_KEYPAD)
157 * ... SIH/interrupt only
158 */
159
160#define TWL4030_KEYPAD_KEYP_ISR1 0x11
161#define TWL4030_KEYPAD_KEYP_IMR1 0x12
162#define TWL4030_KEYPAD_KEYP_ISR2 0x13
163#define TWL4030_KEYPAD_KEYP_IMR2 0x14
164#define TWL4030_KEYPAD_KEYP_SIR 0x15 /* test register */
165#define TWL4030_KEYPAD_KEYP_EDR 0x16
166#define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17
167
168/*----------------------------------------------------------------------*/
169
170/*
171 * Multichannel ADC register offsets (use TWL4030_MODULE_MADC)
172 * ... SIH/interrupt only
173 */
174
175#define TWL4030_MADC_ISR1 0x61
176#define TWL4030_MADC_IMR1 0x62
177#define TWL4030_MADC_ISR2 0x63
178#define TWL4030_MADC_IMR2 0x64
179#define TWL4030_MADC_SIR 0x65 /* test register */
180#define TWL4030_MADC_EDR 0x66
181#define TWL4030_MADC_SIH_CTRL 0x67
182
183/*----------------------------------------------------------------------*/
184
185/*
186 * Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS)
187 */
188
189#define TWL4030_INTERRUPTS_BCIISR1A 0x0
190#define TWL4030_INTERRUPTS_BCIISR2A 0x1
191#define TWL4030_INTERRUPTS_BCIIMR1A 0x2
192#define TWL4030_INTERRUPTS_BCIIMR2A 0x3
193#define TWL4030_INTERRUPTS_BCIISR1B 0x4
194#define TWL4030_INTERRUPTS_BCIISR2B 0x5
195#define TWL4030_INTERRUPTS_BCIIMR1B 0x6
196#define TWL4030_INTERRUPTS_BCIIMR2B 0x7
197#define TWL4030_INTERRUPTS_BCISIR1 0x8 /* test register */
198#define TWL4030_INTERRUPTS_BCISIR2 0x9 /* test register */
199#define TWL4030_INTERRUPTS_BCIEDR1 0xa
200#define TWL4030_INTERRUPTS_BCIEDR2 0xb
201#define TWL4030_INTERRUPTS_BCIEDR3 0xc
202#define TWL4030_INTERRUPTS_BCISIHCTRL 0xd
203
204/*----------------------------------------------------------------------*/
205
206/*
207 * Power Interrupt block register offsets (use TWL4030_MODULE_INT)
208 */
209
210#define TWL4030_INT_PWR_ISR1 0x0
211#define TWL4030_INT_PWR_IMR1 0x1
212#define TWL4030_INT_PWR_ISR2 0x2
213#define TWL4030_INT_PWR_IMR2 0x3
214#define TWL4030_INT_PWR_SIR 0x4 /* test register */
215#define TWL4030_INT_PWR_EDR1 0x5
216#define TWL4030_INT_PWR_EDR2 0x6
217#define TWL4030_INT_PWR_SIH_CTRL 0x7
218
219/*----------------------------------------------------------------------*/
220
221struct twl4030_bci_platform_data {
222 int *battery_tmp_tbl;
223 unsigned int tblsize;
224};
225
226/* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */
227struct twl4030_gpio_platform_data {
228 int gpio_base;
229 unsigned irq_base, irq_end;
230
231 /* package the two LED signals as output-only GPIOs? */
232 bool use_leds;
233
234 /* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */
235 u8 mmc_cd;
236
237 /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup
238 * should be enabled. Else, if that bit is set in "pulldowns",
239 * that pulldown is enabled. Don't waste power by letting any
240 * digital inputs float...
241 */
242 u32 pullups;
243 u32 pulldowns;
244
245 int (*setup)(struct device *dev,
246 unsigned gpio, unsigned ngpio);
247 int (*teardown)(struct device *dev,
248 unsigned gpio, unsigned ngpio);
249};
250
251struct twl4030_madc_platform_data {
252 int irq_line;
253};
254
255struct twl4030_keypad_data {
256 int rows;
257 int cols;
258 int *keymap;
259 int irq;
260 unsigned int keymapsize;
261 unsigned int rep:1;
262};
263
264enum twl4030_usb_mode {
265 T2_USB_MODE_ULPI = 1,
266 T2_USB_MODE_CEA2011_3PIN = 2,
267};
268
269struct twl4030_usb_data {
270 enum twl4030_usb_mode usb_mode;
271};
272
273struct twl4030_platform_data {
274 unsigned irq_base, irq_end;
275 struct twl4030_bci_platform_data *bci;
276 struct twl4030_gpio_platform_data *gpio;
277 struct twl4030_madc_platform_data *madc;
278 struct twl4030_keypad_data *keypad;
279 struct twl4030_usb_data *usb;
280
281 /* REVISIT more to come ... _nothing_ should be hard-wired */
282};
283
284/*----------------------------------------------------------------------*/
285
286int twl4030_sih_setup(int module);
287
288/*
289 * FIXME completely stop using TWL4030_IRQ_BASE ... instead, pass the
290 * IRQ data to subsidiary devices using platform device resources.
291 */
292
293/* IRQ information-need base */
294#include <mach/irqs.h>
295/* TWL4030 interrupts */
296
297/* #define TWL4030_MODIRQ_GPIO (TWL4030_IRQ_BASE + 0) */
298#define TWL4030_MODIRQ_KEYPAD (TWL4030_IRQ_BASE + 1)
299#define TWL4030_MODIRQ_BCI (TWL4030_IRQ_BASE + 2)
300#define TWL4030_MODIRQ_MADC (TWL4030_IRQ_BASE + 3)
301/* #define TWL4030_MODIRQ_USB (TWL4030_IRQ_BASE + 4) */
302/* #define TWL4030_MODIRQ_PWR (TWL4030_IRQ_BASE + 5) */
303
304#define TWL4030_PWRIRQ_PWRBTN (TWL4030_PWR_IRQ_BASE + 0)
305/* #define TWL4030_PWRIRQ_CHG_PRES (TWL4030_PWR_IRQ_BASE + 1) */
306/* #define TWL4030_PWRIRQ_USB_PRES (TWL4030_PWR_IRQ_BASE + 2) */
307/* #define TWL4030_PWRIRQ_RTC (TWL4030_PWR_IRQ_BASE + 3) */
308/* #define TWL4030_PWRIRQ_HOT_DIE (TWL4030_PWR_IRQ_BASE + 4) */
309/* #define TWL4030_PWRIRQ_PWROK_TIMEOUT (TWL4030_PWR_IRQ_BASE + 5) */
310/* #define TWL4030_PWRIRQ_MBCHG (TWL4030_PWR_IRQ_BASE + 6) */
311/* #define TWL4030_PWRIRQ_SC_DETECT (TWL4030_PWR_IRQ_BASE + 7) */
312
313/* Rest are unsued currently*/
314
315/* Offsets to Power Registers */
316#define TWL4030_VDAC_DEV_GRP 0x3B
317#define TWL4030_VDAC_DEDICATED 0x3E
318#define TWL4030_VAUX1_DEV_GRP 0x17
319#define TWL4030_VAUX1_DEDICATED 0x1A
320#define TWL4030_VAUX2_DEV_GRP 0x1B
321#define TWL4030_VAUX2_DEDICATED 0x1E
322#define TWL4030_VAUX3_DEV_GRP 0x1F
323#define TWL4030_VAUX3_DEDICATED 0x22
324
325/* TWL4030 GPIO interrupt definitions */
326
327#define TWL4030_GPIO_IRQ_NO(n) (TWL4030_GPIO_IRQ_BASE + (n))
328
329/*
330 * Exported TWL4030 GPIO APIs
331 *
332 * WARNING -- use standard GPIO and IRQ calls instead; these will vanish.
333 */
334int twl4030_set_gpio_debounce(int gpio, int enable);
335
336#if defined(CONFIG_TWL4030_BCI_BATTERY) || \
337 defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
338 extern int twl4030charger_usb_en(int enable);
339#else
340 static inline int twl4030charger_usb_en(int enable) { return 0; }
341#endif
342
343#endif /* End of __TWL4030_H */
diff --git a/include/linux/i2o.h b/include/linux/i2o.h
index 75ae6d8aba4f..4c4e57d1f19d 100644
--- a/include/linux/i2o.h
+++ b/include/linux/i2o.h
@@ -570,7 +570,6 @@ struct i2o_controller {
570#endif 570#endif
571 spinlock_t lock; /* lock for controller 571 spinlock_t lock; /* lock for controller
572 configuration */ 572 configuration */
573
574 void *driver_data[I2O_MAX_DRIVERS]; /* storage for drivers */ 573 void *driver_data[I2O_MAX_DRIVERS]; /* storage for drivers */
575}; 574};
576 575
@@ -691,289 +690,22 @@ static inline u32 i2o_dma_high(dma_addr_t dma_addr)
691}; 690};
692#endif 691#endif
693 692
694/** 693extern u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size);
695 * i2o_sg_tablesize - Calculate the maximum number of elements in a SGL 694extern dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
696 * @c: I2O controller for which the calculation should be done
697 * @body_size: maximum body size used for message in 32-bit words.
698 *
699 * Return the maximum number of SG elements in a SG list.
700 */
701static inline u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size)
702{
703 i2o_status_block *sb = c->status_block.virt;
704 u16 sg_count =
705 (sb->inbound_frame_size - sizeof(struct i2o_message) / 4) -
706 body_size;
707
708 if (c->pae_support) {
709 /*
710 * for 64-bit a SG attribute element must be added and each
711 * SG element needs 12 bytes instead of 8.
712 */
713 sg_count -= 2;
714 sg_count /= 3;
715 } else
716 sg_count /= 2;
717
718 if (c->short_req && (sg_count > 8))
719 sg_count = 8;
720
721 return sg_count;
722};
723
724/**
725 * i2o_dma_map_single - Map pointer to controller and fill in I2O message.
726 * @c: I2O controller
727 * @ptr: pointer to the data which should be mapped
728 * @size: size of data in bytes
729 * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
730 * @sg_ptr: pointer to the SG list inside the I2O message
731 *
732 * This function does all necessary DMA handling and also writes the I2O
733 * SGL elements into the I2O message. For details on DMA handling see also
734 * dma_map_single(). The pointer sg_ptr will only be set to the end of the
735 * SG list if the allocation was successful.
736 *
737 * Returns DMA address which must be checked for failures using
738 * dma_mapping_error().
739 */
740static inline dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr,
741 size_t size, 695 size_t size,
742 enum dma_data_direction direction, 696 enum dma_data_direction direction,
743 u32 ** sg_ptr) 697 u32 ** sg_ptr);
744{ 698extern int i2o_dma_map_sg(struct i2o_controller *c,
745 u32 sg_flags;
746 u32 *mptr = *sg_ptr;
747 dma_addr_t dma_addr;
748
749 switch (direction) {
750 case DMA_TO_DEVICE:
751 sg_flags = 0xd4000000;
752 break;
753 case DMA_FROM_DEVICE:
754 sg_flags = 0xd0000000;
755 break;
756 default:
757 return 0;
758 }
759
760 dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction);
761 if (!dma_mapping_error(&c->pdev->dev, dma_addr)) {
762#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
763 if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
764 *mptr++ = cpu_to_le32(0x7C020002);
765 *mptr++ = cpu_to_le32(PAGE_SIZE);
766 }
767#endif
768
769 *mptr++ = cpu_to_le32(sg_flags | size);
770 *mptr++ = cpu_to_le32(i2o_dma_low(dma_addr));
771#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
772 if ((sizeof(dma_addr_t) > 4) && c->pae_support)
773 *mptr++ = cpu_to_le32(i2o_dma_high(dma_addr));
774#endif
775 *sg_ptr = mptr;
776 }
777 return dma_addr;
778};
779
780/**
781 * i2o_dma_map_sg - Map a SG List to controller and fill in I2O message.
782 * @c: I2O controller
783 * @sg: SG list to be mapped
784 * @sg_count: number of elements in the SG list
785 * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE
786 * @sg_ptr: pointer to the SG list inside the I2O message
787 *
788 * This function does all necessary DMA handling and also writes the I2O
789 * SGL elements into the I2O message. For details on DMA handling see also
790 * dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG
791 * list if the allocation was successful.
792 *
793 * Returns 0 on failure or 1 on success.
794 */
795static inline int i2o_dma_map_sg(struct i2o_controller *c,
796 struct scatterlist *sg, int sg_count, 699 struct scatterlist *sg, int sg_count,
797 enum dma_data_direction direction, 700 enum dma_data_direction direction,
798 u32 ** sg_ptr) 701 u32 ** sg_ptr);
799{ 702extern int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len);
800 u32 sg_flags; 703extern void i2o_dma_free(struct device *dev, struct i2o_dma *addr);
801 u32 *mptr = *sg_ptr; 704extern int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr,
802 705 size_t len);
803 switch (direction) { 706extern int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
804 case DMA_TO_DEVICE: 707 size_t size, int min_nr);
805 sg_flags = 0x14000000; 708extern void i2o_pool_free(struct i2o_pool *pool);
806 break;
807 case DMA_FROM_DEVICE:
808 sg_flags = 0x10000000;
809 break;
810 default:
811 return 0;
812 }
813
814 sg_count = dma_map_sg(&c->pdev->dev, sg, sg_count, direction);
815 if (!sg_count)
816 return 0;
817
818#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
819 if ((sizeof(dma_addr_t) > 4) && c->pae_support) {
820 *mptr++ = cpu_to_le32(0x7C020002);
821 *mptr++ = cpu_to_le32(PAGE_SIZE);
822 }
823#endif
824
825 while (sg_count-- > 0) {
826 if (!sg_count)
827 sg_flags |= 0xC0000000;
828 *mptr++ = cpu_to_le32(sg_flags | sg_dma_len(sg));
829 *mptr++ = cpu_to_le32(i2o_dma_low(sg_dma_address(sg)));
830#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
831 if ((sizeof(dma_addr_t) > 4) && c->pae_support)
832 *mptr++ = cpu_to_le32(i2o_dma_high(sg_dma_address(sg)));
833#endif
834 sg = sg_next(sg);
835 }
836 *sg_ptr = mptr;
837
838 return 1;
839};
840
841/**
842 * i2o_dma_alloc - Allocate DMA memory
843 * @dev: struct device pointer to the PCI device of the I2O controller
844 * @addr: i2o_dma struct which should get the DMA buffer
845 * @len: length of the new DMA memory
846 * @gfp_mask: GFP mask
847 *
848 * Allocate a coherent DMA memory and write the pointers into addr.
849 *
850 * Returns 0 on success or -ENOMEM on failure.
851 */
852static inline int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr,
853 size_t len, gfp_t gfp_mask)
854{
855 struct pci_dev *pdev = to_pci_dev(dev);
856 int dma_64 = 0;
857
858 if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_64BIT_MASK)) {
859 dma_64 = 1;
860 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK))
861 return -ENOMEM;
862 }
863
864 addr->virt = dma_alloc_coherent(dev, len, &addr->phys, gfp_mask);
865
866 if ((sizeof(dma_addr_t) > 4) && dma_64)
867 if (pci_set_dma_mask(pdev, DMA_64BIT_MASK))
868 printk(KERN_WARNING "i2o: unable to set 64-bit DMA");
869
870 if (!addr->virt)
871 return -ENOMEM;
872
873 memset(addr->virt, 0, len);
874 addr->len = len;
875
876 return 0;
877};
878
879/**
880 * i2o_dma_free - Free DMA memory
881 * @dev: struct device pointer to the PCI device of the I2O controller
882 * @addr: i2o_dma struct which contains the DMA buffer
883 *
884 * Free a coherent DMA memory and set virtual address of addr to NULL.
885 */
886static inline void i2o_dma_free(struct device *dev, struct i2o_dma *addr)
887{
888 if (addr->virt) {
889 if (addr->phys)
890 dma_free_coherent(dev, addr->len, addr->virt,
891 addr->phys);
892 else
893 kfree(addr->virt);
894 addr->virt = NULL;
895 }
896};
897
898/**
899 * i2o_dma_realloc - Realloc DMA memory
900 * @dev: struct device pointer to the PCI device of the I2O controller
901 * @addr: pointer to a i2o_dma struct DMA buffer
902 * @len: new length of memory
903 * @gfp_mask: GFP mask
904 *
905 * If there was something allocated in the addr, free it first. If len > 0
906 * than try to allocate it and write the addresses back to the addr
907 * structure. If len == 0 set the virtual address to NULL.
908 *
909 * Returns the 0 on success or negative error code on failure.
910 */
911static inline int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr,
912 size_t len, gfp_t gfp_mask)
913{
914 i2o_dma_free(dev, addr);
915
916 if (len)
917 return i2o_dma_alloc(dev, addr, len, gfp_mask);
918
919 return 0;
920};
921
922/*
923 * i2o_pool_alloc - Allocate an slab cache and mempool
924 * @mempool: pointer to struct i2o_pool to write data into.
925 * @name: name which is used to identify cache
926 * @size: size of each object
927 * @min_nr: minimum number of objects
928 *
929 * First allocates a slab cache with name and size. Then allocates a
930 * mempool which uses the slab cache for allocation and freeing.
931 *
932 * Returns 0 on success or negative error code on failure.
933 */
934static inline int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
935 size_t size, int min_nr)
936{
937 pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL);
938 if (!pool->name)
939 goto exit;
940 strcpy(pool->name, name);
941
942 pool->slab =
943 kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL);
944 if (!pool->slab)
945 goto free_name;
946
947 pool->mempool = mempool_create_slab_pool(min_nr, pool->slab);
948 if (!pool->mempool)
949 goto free_slab;
950
951 return 0;
952
953 free_slab:
954 kmem_cache_destroy(pool->slab);
955
956 free_name:
957 kfree(pool->name);
958
959 exit:
960 return -ENOMEM;
961};
962
963/*
964 * i2o_pool_free - Free slab cache and mempool again
965 * @mempool: pointer to struct i2o_pool which should be freed
966 *
967 * Note that you have to return all objects to the mempool again before
968 * calling i2o_pool_free().
969 */
970static inline void i2o_pool_free(struct i2o_pool *pool)
971{
972 mempool_destroy(pool->mempool);
973 kmem_cache_destroy(pool->slab);
974 kfree(pool->name);
975};
976
977/* I2O driver (OSM) functions */ 709/* I2O driver (OSM) functions */
978extern int i2o_driver_register(struct i2o_driver *); 710extern int i2o_driver_register(struct i2o_driver *);
979extern void i2o_driver_unregister(struct i2o_driver *); 711extern void i2o_driver_unregister(struct i2o_driver *);
diff --git a/include/linux/icmpv6.h b/include/linux/icmpv6.h
index 03067443198a..a93a8dd33118 100644
--- a/include/linux/icmpv6.h
+++ b/include/linux/icmpv6.h
@@ -40,16 +40,18 @@ struct icmp6hdr {
40 struct icmpv6_nd_ra { 40 struct icmpv6_nd_ra {
41 __u8 hop_limit; 41 __u8 hop_limit;
42#if defined(__LITTLE_ENDIAN_BITFIELD) 42#if defined(__LITTLE_ENDIAN_BITFIELD)
43 __u8 reserved:4, 43 __u8 reserved:3,
44 router_pref:2, 44 router_pref:2,
45 home_agent:1,
45 other:1, 46 other:1,
46 managed:1; 47 managed:1;
47 48
48#elif defined(__BIG_ENDIAN_BITFIELD) 49#elif defined(__BIG_ENDIAN_BITFIELD)
49 __u8 managed:1, 50 __u8 managed:1,
50 other:1, 51 other:1,
52 home_agent:1,
51 router_pref:2, 53 router_pref:2,
52 reserved:4; 54 reserved:3;
53#else 55#else
54#error "Please fix <asm/byteorder.h>" 56#error "Please fix <asm/byteorder.h>"
55#endif 57#endif
diff --git a/include/linux/ide.h b/include/linux/ide.h
index c47e371554c1..89e53cfbc787 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -461,12 +461,26 @@ struct ide_acpi_drive_link;
461struct ide_acpi_hwif_link; 461struct ide_acpi_hwif_link;
462#endif 462#endif
463 463
464struct ide_drive_s;
465
466struct ide_disk_ops {
467 int (*check)(struct ide_drive_s *, const char *);
468 int (*get_capacity)(struct ide_drive_s *);
469 void (*setup)(struct ide_drive_s *);
470 void (*flush)(struct ide_drive_s *);
471 int (*init_media)(struct ide_drive_s *, struct gendisk *);
472 int (*set_doorlock)(struct ide_drive_s *, struct gendisk *,
473 int);
474 ide_startstop_t (*do_request)(struct ide_drive_s *, struct request *,
475 sector_t);
476 int (*end_request)(struct ide_drive_s *, int, int);
477 int (*ioctl)(struct ide_drive_s *, struct inode *,
478 struct file *, unsigned int, unsigned long);
479};
480
464/* ATAPI device flags */ 481/* ATAPI device flags */
465enum { 482enum {
466 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0), 483 IDE_AFLAG_DRQ_INTERRUPT = (1 << 0),
467 IDE_AFLAG_MEDIA_CHANGED = (1 << 1),
468 /* Drive cannot lock the door. */
469 IDE_AFLAG_NO_DOORLOCK = (1 << 2),
470 484
471 /* ide-cd */ 485 /* ide-cd */
472 /* Drive cannot eject the disc. */ 486 /* Drive cannot eject the disc. */
@@ -498,14 +512,10 @@ enum {
498 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 17), 512 IDE_AFLAG_LE_SPEED_FIELDS = (1 << 17),
499 513
500 /* ide-floppy */ 514 /* ide-floppy */
501 /* Format in progress */
502 IDE_AFLAG_FORMAT_IN_PROGRESS = (1 << 18),
503 /* Avoid commands not supported in Clik drive */ 515 /* Avoid commands not supported in Clik drive */
504 IDE_AFLAG_CLIK_DRIVE = (1 << 19), 516 IDE_AFLAG_CLIK_DRIVE = (1 << 19),
505 /* Requires BH algorithm for packets */ 517 /* Requires BH algorithm for packets */
506 IDE_AFLAG_ZIP_DRIVE = (1 << 20), 518 IDE_AFLAG_ZIP_DRIVE = (1 << 20),
507 /* Write protect */
508 IDE_AFLAG_WP = (1 << 21),
509 /* Supports format progress report */ 519 /* Supports format progress report */
510 IDE_AFLAG_SRFP = (1 << 22), 520 IDE_AFLAG_SRFP = (1 << 22),
511 521
@@ -578,7 +588,11 @@ enum {
578 /* don't unload heads */ 588 /* don't unload heads */
579 IDE_DFLAG_NO_UNLOAD = (1 << 27), 589 IDE_DFLAG_NO_UNLOAD = (1 << 27),
580 /* heads unloaded, please don't reset port */ 590 /* heads unloaded, please don't reset port */
581 IDE_DFLAG_PARKED = (1 << 28) 591 IDE_DFLAG_PARKED = (1 << 28),
592 IDE_DFLAG_MEDIA_CHANGED = (1 << 29),
593 /* write protect */
594 IDE_DFLAG_WP = (1 << 30),
595 IDE_DFLAG_FORMAT_IN_PROGRESS = (1 << 31),
582}; 596};
583 597
584struct ide_drive_s { 598struct ide_drive_s {
@@ -597,6 +611,8 @@ struct ide_drive_s {
597#endif 611#endif
598 struct hwif_s *hwif; /* actually (ide_hwif_t *) */ 612 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
599 613
614 const struct ide_disk_ops *disk_ops;
615
600 unsigned long dev_flags; 616 unsigned long dev_flags;
601 617
602 unsigned long sleep; /* sleep until this time */ 618 unsigned long sleep; /* sleep until this time */
@@ -1123,8 +1139,8 @@ struct ide_driver_s {
1123 void (*resume)(ide_drive_t *); 1139 void (*resume)(ide_drive_t *);
1124 void (*shutdown)(ide_drive_t *); 1140 void (*shutdown)(ide_drive_t *);
1125#ifdef CONFIG_IDE_PROC_FS 1141#ifdef CONFIG_IDE_PROC_FS
1126 ide_proc_entry_t *proc; 1142 ide_proc_entry_t * (*proc_entries)(ide_drive_t *);
1127 const struct ide_proc_devset *settings; 1143 const struct ide_proc_devset * (*proc_devsets)(ide_drive_t *);
1128#endif 1144#endif
1129}; 1145};
1130 1146
diff --git a/include/linux/init.h b/include/linux/init.h
index 93538b696e3d..0c1264668be0 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -40,7 +40,7 @@
40 40
41/* These are for everybody (although not all archs will actually 41/* These are for everybody (although not all archs will actually
42 discard it in modules) */ 42 discard it in modules) */
43#define __init __section(.init.text) __cold 43#define __init __section(.init.text) __cold notrace
44#define __initdata __section(.init.data) 44#define __initdata __section(.init.data)
45#define __initconst __section(.init.rodata) 45#define __initconst __section(.init.rodata)
46#define __exitdata __section(.exit.data) 46#define __exitdata __section(.exit.data)
@@ -233,9 +233,6 @@ struct obs_kernel_param {
233 __attribute__((aligned((sizeof(long))))) \ 233 __attribute__((aligned((sizeof(long))))) \
234 = { __setup_str_##unique_id, fn, early } 234 = { __setup_str_##unique_id, fn, early }
235 235
236#define __setup_null_param(str, unique_id) \
237 __setup_param(str, unique_id, NULL, 0)
238
239#define __setup(str, fn) \ 236#define __setup(str, fn) \
240 __setup_param(str, fn, fn, 0) 237 __setup_param(str, fn, fn, 0)
241 238
@@ -296,7 +293,6 @@ void __init parse_early_param(void);
296 void cleanup_module(void) __attribute__((alias(#exitfn))); 293 void cleanup_module(void) __attribute__((alias(#exitfn)));
297 294
298#define __setup_param(str, unique_id, fn) /* nothing */ 295#define __setup_param(str, unique_id, fn) /* nothing */
299#define __setup_null_param(str, unique_id) /* nothing */
300#define __setup(str, func) /* nothing */ 296#define __setup(str, func) /* nothing */
301#endif 297#endif
302 298
diff --git a/include/linux/input.h b/include/linux/input.h
index a5802c9c81a4..b86fb5581ce6 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -577,9 +577,22 @@ struct input_absinfo {
577#define KEY_BRL_DOT9 0x1f9 577#define KEY_BRL_DOT9 0x1f9
578#define KEY_BRL_DOT10 0x1fa 578#define KEY_BRL_DOT10 0x1fa
579 579
580#define KEY_NUMERIC_0 0x200 /* used by phones, remote controls, */
581#define KEY_NUMERIC_1 0x201 /* and other keypads */
582#define KEY_NUMERIC_2 0x202
583#define KEY_NUMERIC_3 0x203
584#define KEY_NUMERIC_4 0x204
585#define KEY_NUMERIC_5 0x205
586#define KEY_NUMERIC_6 0x206
587#define KEY_NUMERIC_7 0x207
588#define KEY_NUMERIC_8 0x208
589#define KEY_NUMERIC_9 0x209
590#define KEY_NUMERIC_STAR 0x20a
591#define KEY_NUMERIC_POUND 0x20b
592
580/* We avoid low common keys in module aliases so they don't get huge. */ 593/* We avoid low common keys in module aliases so they don't get huge. */
581#define KEY_MIN_INTERESTING KEY_MUTE 594#define KEY_MIN_INTERESTING KEY_MUTE
582#define KEY_MAX 0x1ff 595#define KEY_MAX 0x2ff
583#define KEY_CNT (KEY_MAX+1) 596#define KEY_CNT (KEY_MAX+1)
584 597
585/* 598/*
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
new file mode 100644
index 000000000000..2e117f30a76c
--- /dev/null
+++ b/include/linux/intel-iommu.h
@@ -0,0 +1,327 @@
1/*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Copyright (C) 2006-2008 Intel Corporation
18 * Author: Ashok Raj <ashok.raj@intel.com>
19 * Author: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
20 */
21
22#ifndef _INTEL_IOMMU_H_
23#define _INTEL_IOMMU_H_
24
25#include <linux/types.h>
26#include <linux/msi.h>
27#include <linux/sysdev.h>
28#include <linux/iova.h>
29#include <linux/io.h>
30#include <linux/dma_remapping.h>
31#include <asm/cacheflush.h>
32
33/*
34 * Intel IOMMU register specification per version 1.0 public spec.
35 */
36
37#define DMAR_VER_REG 0x0 /* Arch version supported by this IOMMU */
38#define DMAR_CAP_REG 0x8 /* Hardware supported capabilities */
39#define DMAR_ECAP_REG 0x10 /* Extended capabilities supported */
40#define DMAR_GCMD_REG 0x18 /* Global command register */
41#define DMAR_GSTS_REG 0x1c /* Global status register */
42#define DMAR_RTADDR_REG 0x20 /* Root entry table */
43#define DMAR_CCMD_REG 0x28 /* Context command reg */
44#define DMAR_FSTS_REG 0x34 /* Fault Status register */
45#define DMAR_FECTL_REG 0x38 /* Fault control register */
46#define DMAR_FEDATA_REG 0x3c /* Fault event interrupt data register */
47#define DMAR_FEADDR_REG 0x40 /* Fault event interrupt addr register */
48#define DMAR_FEUADDR_REG 0x44 /* Upper address register */
49#define DMAR_AFLOG_REG 0x58 /* Advanced Fault control */
50#define DMAR_PMEN_REG 0x64 /* Enable Protected Memory Region */
51#define DMAR_PLMBASE_REG 0x68 /* PMRR Low addr */
52#define DMAR_PLMLIMIT_REG 0x6c /* PMRR low limit */
53#define DMAR_PHMBASE_REG 0x70 /* pmrr high base addr */
54#define DMAR_PHMLIMIT_REG 0x78 /* pmrr high limit */
55#define DMAR_IQH_REG 0x80 /* Invalidation queue head register */
56#define DMAR_IQT_REG 0x88 /* Invalidation queue tail register */
57#define DMAR_IQA_REG 0x90 /* Invalidation queue addr register */
58#define DMAR_ICS_REG 0x98 /* Invalidation complete status register */
59#define DMAR_IRTA_REG 0xb8 /* Interrupt remapping table addr register */
60
61#define OFFSET_STRIDE (9)
62/*
63#define dmar_readl(dmar, reg) readl(dmar + reg)
64#define dmar_readq(dmar, reg) ({ \
65 u32 lo, hi; \
66 lo = readl(dmar + reg); \
67 hi = readl(dmar + reg + 4); \
68 (((u64) hi) << 32) + lo; })
69*/
70static inline u64 dmar_readq(void __iomem *addr)
71{
72 u32 lo, hi;
73 lo = readl(addr);
74 hi = readl(addr + 4);
75 return (((u64) hi) << 32) + lo;
76}
77
78static inline void dmar_writeq(void __iomem *addr, u64 val)
79{
80 writel((u32)val, addr);
81 writel((u32)(val >> 32), addr + 4);
82}
83
84#define DMAR_VER_MAJOR(v) (((v) & 0xf0) >> 4)
85#define DMAR_VER_MINOR(v) ((v) & 0x0f)
86
87/*
88 * Decoding Capability Register
89 */
90#define cap_read_drain(c) (((c) >> 55) & 1)
91#define cap_write_drain(c) (((c) >> 54) & 1)
92#define cap_max_amask_val(c) (((c) >> 48) & 0x3f)
93#define cap_num_fault_regs(c) ((((c) >> 40) & 0xff) + 1)
94#define cap_pgsel_inv(c) (((c) >> 39) & 1)
95
96#define cap_super_page_val(c) (((c) >> 34) & 0xf)
97#define cap_super_offset(c) (((find_first_bit(&cap_super_page_val(c), 4)) \
98 * OFFSET_STRIDE) + 21)
99
100#define cap_fault_reg_offset(c) ((((c) >> 24) & 0x3ff) * 16)
101#define cap_max_fault_reg_offset(c) \
102 (cap_fault_reg_offset(c) + cap_num_fault_regs(c) * 16)
103
104#define cap_zlr(c) (((c) >> 22) & 1)
105#define cap_isoch(c) (((c) >> 23) & 1)
106#define cap_mgaw(c) ((((c) >> 16) & 0x3f) + 1)
107#define cap_sagaw(c) (((c) >> 8) & 0x1f)
108#define cap_caching_mode(c) (((c) >> 7) & 1)
109#define cap_phmr(c) (((c) >> 6) & 1)
110#define cap_plmr(c) (((c) >> 5) & 1)
111#define cap_rwbf(c) (((c) >> 4) & 1)
112#define cap_afl(c) (((c) >> 3) & 1)
113#define cap_ndoms(c) (((unsigned long)1) << (4 + 2 * ((c) & 0x7)))
114/*
115 * Extended Capability Register
116 */
117
118#define ecap_niotlb_iunits(e) ((((e) >> 24) & 0xff) + 1)
119#define ecap_iotlb_offset(e) ((((e) >> 8) & 0x3ff) * 16)
120#define ecap_max_iotlb_offset(e) \
121 (ecap_iotlb_offset(e) + ecap_niotlb_iunits(e) * 16)
122#define ecap_coherent(e) ((e) & 0x1)
123#define ecap_qis(e) ((e) & 0x2)
124#define ecap_eim_support(e) ((e >> 4) & 0x1)
125#define ecap_ir_support(e) ((e >> 3) & 0x1)
126#define ecap_max_handle_mask(e) ((e >> 20) & 0xf)
127
128
129/* IOTLB_REG */
130#define DMA_TLB_GLOBAL_FLUSH (((u64)1) << 60)
131#define DMA_TLB_DSI_FLUSH (((u64)2) << 60)
132#define DMA_TLB_PSI_FLUSH (((u64)3) << 60)
133#define DMA_TLB_IIRG(type) ((type >> 60) & 7)
134#define DMA_TLB_IAIG(val) (((val) >> 57) & 7)
135#define DMA_TLB_READ_DRAIN (((u64)1) << 49)
136#define DMA_TLB_WRITE_DRAIN (((u64)1) << 48)
137#define DMA_TLB_DID(id) (((u64)((id) & 0xffff)) << 32)
138#define DMA_TLB_IVT (((u64)1) << 63)
139#define DMA_TLB_IH_NONLEAF (((u64)1) << 6)
140#define DMA_TLB_MAX_SIZE (0x3f)
141
142/* INVALID_DESC */
143#define DMA_ID_TLB_GLOBAL_FLUSH (((u64)1) << 3)
144#define DMA_ID_TLB_DSI_FLUSH (((u64)2) << 3)
145#define DMA_ID_TLB_PSI_FLUSH (((u64)3) << 3)
146#define DMA_ID_TLB_READ_DRAIN (((u64)1) << 7)
147#define DMA_ID_TLB_WRITE_DRAIN (((u64)1) << 6)
148#define DMA_ID_TLB_DID(id) (((u64)((id & 0xffff) << 16)))
149#define DMA_ID_TLB_IH_NONLEAF (((u64)1) << 6)
150#define DMA_ID_TLB_ADDR(addr) (addr)
151#define DMA_ID_TLB_ADDR_MASK(mask) (mask)
152
153/* PMEN_REG */
154#define DMA_PMEN_EPM (((u32)1)<<31)
155#define DMA_PMEN_PRS (((u32)1)<<0)
156
157/* GCMD_REG */
158#define DMA_GCMD_TE (((u32)1) << 31)
159#define DMA_GCMD_SRTP (((u32)1) << 30)
160#define DMA_GCMD_SFL (((u32)1) << 29)
161#define DMA_GCMD_EAFL (((u32)1) << 28)
162#define DMA_GCMD_WBF (((u32)1) << 27)
163#define DMA_GCMD_QIE (((u32)1) << 26)
164#define DMA_GCMD_SIRTP (((u32)1) << 24)
165#define DMA_GCMD_IRE (((u32) 1) << 25)
166
167/* GSTS_REG */
168#define DMA_GSTS_TES (((u32)1) << 31)
169#define DMA_GSTS_RTPS (((u32)1) << 30)
170#define DMA_GSTS_FLS (((u32)1) << 29)
171#define DMA_GSTS_AFLS (((u32)1) << 28)
172#define DMA_GSTS_WBFS (((u32)1) << 27)
173#define DMA_GSTS_QIES (((u32)1) << 26)
174#define DMA_GSTS_IRTPS (((u32)1) << 24)
175#define DMA_GSTS_IRES (((u32)1) << 25)
176
177/* CCMD_REG */
178#define DMA_CCMD_ICC (((u64)1) << 63)
179#define DMA_CCMD_GLOBAL_INVL (((u64)1) << 61)
180#define DMA_CCMD_DOMAIN_INVL (((u64)2) << 61)
181#define DMA_CCMD_DEVICE_INVL (((u64)3) << 61)
182#define DMA_CCMD_FM(m) (((u64)((m) & 0x3)) << 32)
183#define DMA_CCMD_MASK_NOBIT 0
184#define DMA_CCMD_MASK_1BIT 1
185#define DMA_CCMD_MASK_2BIT 2
186#define DMA_CCMD_MASK_3BIT 3
187#define DMA_CCMD_SID(s) (((u64)((s) & 0xffff)) << 16)
188#define DMA_CCMD_DID(d) ((u64)((d) & 0xffff))
189
190/* FECTL_REG */
191#define DMA_FECTL_IM (((u32)1) << 31)
192
193/* FSTS_REG */
194#define DMA_FSTS_PPF ((u32)2)
195#define DMA_FSTS_PFO ((u32)1)
196#define dma_fsts_fault_record_index(s) (((s) >> 8) & 0xff)
197
198/* FRCD_REG, 32 bits access */
199#define DMA_FRCD_F (((u32)1) << 31)
200#define dma_frcd_type(d) ((d >> 30) & 1)
201#define dma_frcd_fault_reason(c) (c & 0xff)
202#define dma_frcd_source_id(c) (c & 0xffff)
203#define dma_frcd_page_addr(d) (d & (((u64)-1) << 12)) /* low 64 bit */
204
205#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) /* 10sec */
206
207#define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \
208{\
209 cycles_t start_time = get_cycles();\
210 while (1) {\
211 sts = op (iommu->reg + offset);\
212 if (cond)\
213 break;\
214 if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\
215 panic("DMAR hardware is malfunctioning\n");\
216 cpu_relax();\
217 }\
218}
219
220#define QI_LENGTH 256 /* queue length */
221
222enum {
223 QI_FREE,
224 QI_IN_USE,
225 QI_DONE
226};
227
228#define QI_CC_TYPE 0x1
229#define QI_IOTLB_TYPE 0x2
230#define QI_DIOTLB_TYPE 0x3
231#define QI_IEC_TYPE 0x4
232#define QI_IWD_TYPE 0x5
233
234#define QI_IEC_SELECTIVE (((u64)1) << 4)
235#define QI_IEC_IIDEX(idx) (((u64)(idx & 0xffff) << 32))
236#define QI_IEC_IM(m) (((u64)(m & 0x1f) << 27))
237
238#define QI_IWD_STATUS_DATA(d) (((u64)d) << 32)
239#define QI_IWD_STATUS_WRITE (((u64)1) << 5)
240
241struct qi_desc {
242 u64 low, high;
243};
244
245struct q_inval {
246 spinlock_t q_lock;
247 struct qi_desc *desc; /* invalidation queue */
248 int *desc_status; /* desc status */
249 int free_head; /* first free entry */
250 int free_tail; /* last free entry */
251 int free_cnt;
252};
253
254#ifdef CONFIG_INTR_REMAP
255/* 1MB - maximum possible interrupt remapping table size */
256#define INTR_REMAP_PAGE_ORDER 8
257#define INTR_REMAP_TABLE_REG_SIZE 0xf
258
259#define INTR_REMAP_TABLE_ENTRIES 65536
260
261struct ir_table {
262 struct irte *base;
263};
264#endif
265
266struct intel_iommu {
267 void __iomem *reg; /* Pointer to hardware regs, virtual addr */
268 u64 cap;
269 u64 ecap;
270 int seg;
271 u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */
272 spinlock_t register_lock; /* protect register handling */
273 int seq_id; /* sequence id of the iommu */
274
275#ifdef CONFIG_DMAR
276 unsigned long *domain_ids; /* bitmap of domains */
277 struct dmar_domain **domains; /* ptr to domains */
278 spinlock_t lock; /* protect context, domain ids */
279 struct root_entry *root_entry; /* virtual address */
280
281 unsigned int irq;
282 unsigned char name[7]; /* Device Name */
283 struct msi_msg saved_msg;
284 struct sys_device sysdev;
285#endif
286 struct q_inval *qi; /* Queued invalidation info */
287#ifdef CONFIG_INTR_REMAP
288 struct ir_table *ir_table; /* Interrupt remapping info */
289#endif
290};
291
292static inline void __iommu_flush_cache(
293 struct intel_iommu *iommu, void *addr, int size)
294{
295 if (!ecap_coherent(iommu->ecap))
296 clflush_cache_range(addr, size);
297}
298
299extern struct dmar_drhd_unit * dmar_find_matched_drhd_unit(struct pci_dev *dev);
300
301extern int alloc_iommu(struct dmar_drhd_unit *drhd);
302extern void free_iommu(struct intel_iommu *iommu);
303extern int dmar_enable_qi(struct intel_iommu *iommu);
304extern void qi_global_iec(struct intel_iommu *iommu);
305
306extern void qi_submit_sync(struct qi_desc *desc, struct intel_iommu *iommu);
307
308void intel_iommu_domain_exit(struct dmar_domain *domain);
309struct dmar_domain *intel_iommu_domain_alloc(struct pci_dev *pdev);
310int intel_iommu_context_mapping(struct dmar_domain *domain,
311 struct pci_dev *pdev);
312int intel_iommu_page_mapping(struct dmar_domain *domain, dma_addr_t iova,
313 u64 hpa, size_t size, int prot);
314void intel_iommu_detach_dev(struct dmar_domain *domain, u8 bus, u8 devfn);
315struct dmar_domain *intel_iommu_find_domain(struct pci_dev *pdev);
316u64 intel_iommu_iova_to_pfn(struct dmar_domain *domain, u64 iova);
317
318#ifdef CONFIG_DMAR
319int intel_iommu_found(void);
320#else /* CONFIG_DMAR */
321static inline int intel_iommu_found(void)
322{
323 return 0;
324}
325#endif /* CONFIG_DMAR */
326
327#endif
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 58ff4e74b2f3..f58a0cf8929a 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -8,9 +8,12 @@
8#include <linux/preempt.h> 8#include <linux/preempt.h>
9#include <linux/cpumask.h> 9#include <linux/cpumask.h>
10#include <linux/irqreturn.h> 10#include <linux/irqreturn.h>
11#include <linux/irqnr.h>
11#include <linux/hardirq.h> 12#include <linux/hardirq.h>
12#include <linux/sched.h> 13#include <linux/sched.h>
13#include <linux/irqflags.h> 14#include <linux/irqflags.h>
15#include <linux/smp.h>
16#include <linux/percpu.h>
14#include <asm/atomic.h> 17#include <asm/atomic.h>
15#include <asm/ptrace.h> 18#include <asm/ptrace.h>
16#include <asm/system.h> 19#include <asm/system.h>
@@ -252,6 +255,8 @@ enum
252 HRTIMER_SOFTIRQ, 255 HRTIMER_SOFTIRQ,
253#endif 256#endif
254 RCU_SOFTIRQ, /* Preferable RCU should always be the last softirq */ 257 RCU_SOFTIRQ, /* Preferable RCU should always be the last softirq */
258
259 NR_SOFTIRQS
255}; 260};
256 261
257/* softirq mask and active fields moved to irq_cpustat_t in 262/* softirq mask and active fields moved to irq_cpustat_t in
@@ -271,6 +276,25 @@ extern void softirq_init(void);
271extern void raise_softirq_irqoff(unsigned int nr); 276extern void raise_softirq_irqoff(unsigned int nr);
272extern void raise_softirq(unsigned int nr); 277extern void raise_softirq(unsigned int nr);
273 278
279/* This is the worklist that queues up per-cpu softirq work.
280 *
281 * send_remote_sendirq() adds work to these lists, and
282 * the softirq handler itself dequeues from them. The queues
283 * are protected by disabling local cpu interrupts and they must
284 * only be accessed by the local cpu that they are for.
285 */
286DECLARE_PER_CPU(struct list_head [NR_SOFTIRQS], softirq_work_list);
287
288/* Try to send a softirq to a remote cpu. If this cannot be done, the
289 * work will be queued to the local cpu.
290 */
291extern void send_remote_softirq(struct call_single_data *cp, int cpu, int softirq);
292
293/* Like send_remote_softirq(), but the caller must disable local cpu interrupts
294 * and compute the current cpu, passed in as 'this_cpu'.
295 */
296extern void __send_remote_softirq(struct call_single_data *cp, int cpu,
297 int this_cpu, int softirq);
274 298
275/* Tasklets --- multithreaded analogue of BHs. 299/* Tasklets --- multithreaded analogue of BHs.
276 300
diff --git a/include/linux/iommu-helper.h b/include/linux/iommu-helper.h
index a6d0586e2bf7..3b068e5b5671 100644
--- a/include/linux/iommu-helper.h
+++ b/include/linux/iommu-helper.h
@@ -23,4 +23,7 @@ extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size,
23extern void iommu_area_free(unsigned long *map, unsigned long start, 23extern void iommu_area_free(unsigned long *map, unsigned long start,
24 unsigned int nr); 24 unsigned int nr);
25 25
26extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len,
27 unsigned long io_page_size);
28
26#endif 29#endif
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index ee9bcc6f32b6..041e95aac2bf 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -34,7 +34,8 @@ struct resource_list {
34 */ 34 */
35#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */ 35#define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */
36 36
37#define IORESOURCE_IO 0x00000100 /* Resource type */ 37#define IORESOURCE_TYPE_BITS 0x00000f00 /* Resource type */
38#define IORESOURCE_IO 0x00000100
38#define IORESOURCE_MEM 0x00000200 39#define IORESOURCE_MEM 0x00000200
39#define IORESOURCE_IRQ 0x00000400 40#define IORESOURCE_IRQ 0x00000400
40#define IORESOURCE_DMA 0x00000800 41#define IORESOURCE_DMA 0x00000800
@@ -126,6 +127,10 @@ static inline resource_size_t resource_size(struct resource *res)
126{ 127{
127 return res->end - res->start + 1; 128 return res->end - res->start + 1;
128} 129}
130static inline unsigned long resource_type(struct resource *res)
131{
132 return res->flags & IORESOURCE_TYPE_BITS;
133}
129 134
130/* Convenience shorthand with allocation */ 135/* Convenience shorthand with allocation */
131#define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name)) 136#define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name))
@@ -169,6 +174,7 @@ extern struct resource * __devm_request_region(struct device *dev,
169 174
170extern void __devm_release_region(struct device *dev, struct resource *parent, 175extern void __devm_release_region(struct device *dev, struct resource *parent,
171 resource_size_t start, resource_size_t n); 176 resource_size_t start, resource_size_t n);
177extern int iomem_map_sanity_check(resource_size_t addr, unsigned long size);
172 178
173#endif /* __ASSEMBLY__ */ 179#endif /* __ASSEMBLY__ */
174#endif /* _LINUX_IOPORT_H */ 180#endif /* _LINUX_IOPORT_H */
diff --git a/include/linux/iova.h b/include/linux/iova.h
new file mode 100644
index 000000000000..228f6c94b69c
--- /dev/null
+++ b/include/linux/iova.h
@@ -0,0 +1,52 @@
1/*
2 * Copyright (c) 2006, Intel Corporation.
3 *
4 * This file is released under the GPLv2.
5 *
6 * Copyright (C) 2006-2008 Intel Corporation
7 * Author: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 *
9 */
10
11#ifndef _IOVA_H_
12#define _IOVA_H_
13
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/rbtree.h>
17#include <linux/dma-mapping.h>
18
19/* IO virtual address start page frame number */
20#define IOVA_START_PFN (1)
21
22/* iova structure */
23struct iova {
24 struct rb_node node;
25 unsigned long pfn_hi; /* IOMMU dish out addr hi */
26 unsigned long pfn_lo; /* IOMMU dish out addr lo */
27};
28
29/* holds all the iova translations for a domain */
30struct iova_domain {
31 spinlock_t iova_alloc_lock;/* Lock to protect iova allocation */
32 spinlock_t iova_rbtree_lock; /* Lock to protect update of rbtree */
33 struct rb_root rbroot; /* iova domain rbtree root */
34 struct rb_node *cached32_node; /* Save last alloced node */
35 unsigned long dma_32bit_pfn;
36};
37
38struct iova *alloc_iova_mem(void);
39void free_iova_mem(struct iova *iova);
40void free_iova(struct iova_domain *iovad, unsigned long pfn);
41void __free_iova(struct iova_domain *iovad, struct iova *iova);
42struct iova *alloc_iova(struct iova_domain *iovad, unsigned long size,
43 unsigned long limit_pfn,
44 bool size_aligned);
45struct iova *reserve_iova(struct iova_domain *iovad, unsigned long pfn_lo,
46 unsigned long pfn_hi);
47void copy_reserved_iova(struct iova_domain *from, struct iova_domain *to);
48void init_iova_domain(struct iova_domain *iovad, unsigned long pfn_32bit);
49struct iova *find_iova(struct iova_domain *iovad, unsigned long pfn);
50void put_iova_domain(struct iova_domain *iovad);
51
52#endif
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 8d9411bc60f6..d058c57be02d 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -18,6 +18,7 @@
18#include <linux/spinlock.h> 18#include <linux/spinlock.h>
19#include <linux/cpumask.h> 19#include <linux/cpumask.h>
20#include <linux/irqreturn.h> 20#include <linux/irqreturn.h>
21#include <linux/irqnr.h>
21#include <linux/errno.h> 22#include <linux/errno.h>
22 23
23#include <asm/irq.h> 24#include <asm/irq.h>
@@ -152,6 +153,7 @@ struct irq_chip {
152 * @name: flow handler name for /proc/interrupts output 153 * @name: flow handler name for /proc/interrupts output
153 */ 154 */
154struct irq_desc { 155struct irq_desc {
156 unsigned int irq;
155 irq_flow_handler_t handle_irq; 157 irq_flow_handler_t handle_irq;
156 struct irq_chip *chip; 158 struct irq_chip *chip;
157 struct msi_desc *msi_desc; 159 struct msi_desc *msi_desc;
@@ -170,7 +172,7 @@ struct irq_desc {
170 cpumask_t affinity; 172 cpumask_t affinity;
171 unsigned int cpu; 173 unsigned int cpu;
172#endif 174#endif
173#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) 175#ifdef CONFIG_GENERIC_PENDING_IRQ
174 cpumask_t pending_mask; 176 cpumask_t pending_mask;
175#endif 177#endif
176#ifdef CONFIG_PROC_FS 178#ifdef CONFIG_PROC_FS
@@ -179,8 +181,14 @@ struct irq_desc {
179 const char *name; 181 const char *name;
180} ____cacheline_internodealigned_in_smp; 182} ____cacheline_internodealigned_in_smp;
181 183
184
182extern struct irq_desc irq_desc[NR_IRQS]; 185extern struct irq_desc irq_desc[NR_IRQS];
183 186
187static inline struct irq_desc *irq_to_desc(unsigned int irq)
188{
189 return (irq < nr_irqs) ? irq_desc + irq : NULL;
190}
191
184/* 192/*
185 * Migration helpers for obsolete names, they will go away: 193 * Migration helpers for obsolete names, they will go away:
186 */ 194 */
@@ -198,19 +206,15 @@ extern int setup_irq(unsigned int irq, struct irqaction *new);
198 206
199#ifdef CONFIG_GENERIC_HARDIRQS 207#ifdef CONFIG_GENERIC_HARDIRQS
200 208
201#ifndef handle_dynamic_tick
202# define handle_dynamic_tick(a) do { } while (0)
203#endif
204
205#ifdef CONFIG_SMP 209#ifdef CONFIG_SMP
206 210
207#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) 211#ifdef CONFIG_GENERIC_PENDING_IRQ
208 212
209void set_pending_irq(unsigned int irq, cpumask_t mask); 213void set_pending_irq(unsigned int irq, cpumask_t mask);
210void move_native_irq(int irq); 214void move_native_irq(int irq);
211void move_masked_irq(int irq); 215void move_masked_irq(int irq);
212 216
213#else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */ 217#else /* CONFIG_GENERIC_PENDING_IRQ */
214 218
215static inline void move_irq(int irq) 219static inline void move_irq(int irq)
216{ 220{
@@ -237,19 +241,14 @@ static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
237 241
238#endif /* CONFIG_SMP */ 242#endif /* CONFIG_SMP */
239 243
240#ifdef CONFIG_IRQBALANCE
241extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
242#else
243static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
244{
245}
246#endif
247
248extern int no_irq_affinity; 244extern int no_irq_affinity;
249 245
250static inline int irq_balancing_disabled(unsigned int irq) 246static inline int irq_balancing_disabled(unsigned int irq)
251{ 247{
252 return irq_desc[irq].status & IRQ_NO_BALANCING_MASK; 248 struct irq_desc *desc;
249
250 desc = irq_to_desc(irq);
251 return desc->status & IRQ_NO_BALANCING_MASK;
253} 252}
254 253
255/* Handle irq action chains: */ 254/* Handle irq action chains: */
@@ -279,10 +278,8 @@ extern unsigned int __do_IRQ(unsigned int irq);
279 * irqchip-style controller then we call the ->handle_irq() handler, 278 * irqchip-style controller then we call the ->handle_irq() handler,
280 * and it calls __do_IRQ() if it's attached to an irqtype-style controller. 279 * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
281 */ 280 */
282static inline void generic_handle_irq(unsigned int irq) 281static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc)
283{ 282{
284 struct irq_desc *desc = irq_desc + irq;
285
286#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 283#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
287 desc->handle_irq(irq, desc); 284 desc->handle_irq(irq, desc);
288#else 285#else
@@ -293,6 +290,11 @@ static inline void generic_handle_irq(unsigned int irq)
293#endif 290#endif
294} 291}
295 292
293static inline void generic_handle_irq(unsigned int irq)
294{
295 generic_handle_irq_desc(irq, irq_to_desc(irq));
296}
297
296/* Handling of unhandled and spurious interrupts: */ 298/* Handling of unhandled and spurious interrupts: */
297extern void note_interrupt(unsigned int irq, struct irq_desc *desc, 299extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
298 int action_ret); 300 int action_ret);
@@ -325,7 +327,10 @@ __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
325static inline void __set_irq_handler_unlocked(int irq, 327static inline void __set_irq_handler_unlocked(int irq,
326 irq_flow_handler_t handler) 328 irq_flow_handler_t handler)
327{ 329{
328 irq_desc[irq].handle_irq = handler; 330 struct irq_desc *desc;
331
332 desc = irq_to_desc(irq);
333 desc->handle_irq = handler;
329} 334}
330 335
331/* 336/*
@@ -353,13 +358,14 @@ extern void set_irq_noprobe(unsigned int irq);
353extern void set_irq_probe(unsigned int irq); 358extern void set_irq_probe(unsigned int irq);
354 359
355/* Handle dynamic irq creation and destruction */ 360/* Handle dynamic irq creation and destruction */
361extern unsigned int create_irq_nr(unsigned int irq_want);
356extern int create_irq(void); 362extern int create_irq(void);
357extern void destroy_irq(unsigned int irq); 363extern void destroy_irq(unsigned int irq);
358 364
359/* Test to see if a driver has successfully requested an irq */ 365/* Test to see if a driver has successfully requested an irq */
360static inline int irq_has_action(unsigned int irq) 366static inline int irq_has_action(unsigned int irq)
361{ 367{
362 struct irq_desc *desc = irq_desc + irq; 368 struct irq_desc *desc = irq_to_desc(irq);
363 return desc->action != NULL; 369 return desc->action != NULL;
364} 370}
365 371
@@ -374,10 +380,10 @@ extern int set_irq_chip_data(unsigned int irq, void *data);
374extern int set_irq_type(unsigned int irq, unsigned int type); 380extern int set_irq_type(unsigned int irq, unsigned int type);
375extern int set_irq_msi(unsigned int irq, struct msi_desc *entry); 381extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
376 382
377#define get_irq_chip(irq) (irq_desc[irq].chip) 383#define get_irq_chip(irq) (irq_to_desc(irq)->chip)
378#define get_irq_chip_data(irq) (irq_desc[irq].chip_data) 384#define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
379#define get_irq_data(irq) (irq_desc[irq].handler_data) 385#define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
380#define get_irq_msi(irq) (irq_desc[irq].msi_desc) 386#define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
381 387
382#endif /* CONFIG_GENERIC_HARDIRQS */ 388#endif /* CONFIG_GENERIC_HARDIRQS */
383 389
diff --git a/include/linux/irqnr.h b/include/linux/irqnr.h
new file mode 100644
index 000000000000..3171ddc3b39d
--- /dev/null
+++ b/include/linux/irqnr.h
@@ -0,0 +1,24 @@
1#ifndef _LINUX_IRQNR_H
2#define _LINUX_IRQNR_H
3
4#ifndef CONFIG_GENERIC_HARDIRQS
5#include <asm/irq.h>
6# define nr_irqs NR_IRQS
7
8# define for_each_irq_desc(irq, desc) \
9 for (irq = 0; irq < nr_irqs; irq++)
10#else
11extern int nr_irqs;
12
13# define for_each_irq_desc(irq, desc) \
14 for (irq = 0, desc = irq_desc; irq < nr_irqs; irq++, desc++)
15
16# define for_each_irq_desc_reverse(irq, desc) \
17 for (irq = nr_irqs -1, desc = irq_desc + (nr_irqs -1 ); \
18 irq > 0; irq--, desc--)
19#endif
20
21#define for_each_irq_nr(irq) \
22 for (irq = 0; irq < nr_irqs; irq++)
23
24#endif
diff --git a/include/linux/jbd.h b/include/linux/jbd.h
index 07a9b52a2654..346e2b80be7d 100644
--- a/include/linux/jbd.h
+++ b/include/linux/jbd.h
@@ -61,7 +61,7 @@ extern u8 journal_enable_debug;
61 do { \ 61 do { \
62 if ((n) <= journal_enable_debug) { \ 62 if ((n) <= journal_enable_debug) { \
63 printk (KERN_DEBUG "(%s, %d): %s: ", \ 63 printk (KERN_DEBUG "(%s, %d): %s: ", \
64 __FILE__, __LINE__, __FUNCTION__); \ 64 __FILE__, __LINE__, __func__); \
65 printk (f, ## a); \ 65 printk (f, ## a); \
66 } \ 66 } \
67 } while (0) 67 } while (0)
@@ -816,6 +816,9 @@ struct journal_s
816#define JFS_FLUSHED 0x008 /* The journal superblock has been flushed */ 816#define JFS_FLUSHED 0x008 /* The journal superblock has been flushed */
817#define JFS_LOADED 0x010 /* The journal superblock has been loaded */ 817#define JFS_LOADED 0x010 /* The journal superblock has been loaded */
818#define JFS_BARRIER 0x020 /* Use IDE barriers */ 818#define JFS_BARRIER 0x020 /* Use IDE barriers */
819#define JFS_ABORT_ON_SYNCDATA_ERR 0x040 /* Abort the journal on file
820 * data write error in ordered
821 * mode */
819 822
820/* 823/*
821 * Function declarations for the journaling transaction and buffer 824 * Function declarations for the journaling transaction and buffer
@@ -908,7 +911,7 @@ extern int journal_set_features
908 (journal_t *, unsigned long, unsigned long, unsigned long); 911 (journal_t *, unsigned long, unsigned long, unsigned long);
909extern int journal_create (journal_t *); 912extern int journal_create (journal_t *);
910extern int journal_load (journal_t *journal); 913extern int journal_load (journal_t *journal);
911extern void journal_destroy (journal_t *); 914extern int journal_destroy (journal_t *);
912extern int journal_recover (journal_t *journal); 915extern int journal_recover (journal_t *journal);
913extern int journal_wipe (journal_t *, int); 916extern int journal_wipe (journal_t *, int);
914extern int journal_skip_recovery (journal_t *); 917extern int journal_skip_recovery (journal_t *);
@@ -984,7 +987,7 @@ extern int cleanup_journal_tail(journal_t *);
984 987
985#define jbd_ENOSYS() \ 988#define jbd_ENOSYS() \
986do { \ 989do { \
987 printk (KERN_ERR "JBD unimplemented function %s\n", __FUNCTION__); \ 990 printk (KERN_ERR "JBD unimplemented function %s\n", __func__); \
988 current->state = TASK_UNINTERRUPTIBLE; \ 991 current->state = TASK_UNINTERRUPTIBLE; \
989 schedule(); \ 992 schedule(); \
990} while (1) 993} while (1)
diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h
index d2e91ea998fd..c7d106ef22e2 100644
--- a/include/linux/jbd2.h
+++ b/include/linux/jbd2.h
@@ -61,7 +61,7 @@ extern u8 jbd2_journal_enable_debug;
61 do { \ 61 do { \
62 if ((n) <= jbd2_journal_enable_debug) { \ 62 if ((n) <= jbd2_journal_enable_debug) { \
63 printk (KERN_DEBUG "(%s, %d): %s: ", \ 63 printk (KERN_DEBUG "(%s, %d): %s: ", \
64 __FILE__, __LINE__, __FUNCTION__); \ 64 __FILE__, __LINE__, __func__); \
65 printk (f, ## a); \ 65 printk (f, ## a); \
66 } \ 66 } \
67 } while (0) 67 } while (0)
@@ -641,6 +641,11 @@ struct transaction_s
641 */ 641 */
642 int t_handle_count; 642 int t_handle_count;
643 643
644 /*
645 * For use by the filesystem to store fs-specific data
646 * structures associated with the transaction
647 */
648 struct list_head t_private_list;
644}; 649};
645 650
646struct transaction_run_stats_s { 651struct transaction_run_stats_s {
@@ -935,6 +940,10 @@ struct journal_s
935 940
936 pid_t j_last_sync_writer; 941 pid_t j_last_sync_writer;
937 942
943 /* This function is called when a transaction is closed */
944 void (*j_commit_callback)(journal_t *,
945 transaction_t *);
946
938 /* 947 /*
939 * Journal statistics 948 * Journal statistics
940 */ 949 */
@@ -1143,7 +1152,7 @@ extern int jbd2_cleanup_journal_tail(journal_t *);
1143 1152
1144#define jbd_ENOSYS() \ 1153#define jbd_ENOSYS() \
1145do { \ 1154do { \
1146 printk (KERN_ERR "JBD unimplemented function %s\n", __FUNCTION__); \ 1155 printk (KERN_ERR "JBD unimplemented function %s\n", __func__); \
1147 current->state = TASK_UNINTERRUPTIBLE; \ 1156 current->state = TASK_UNINTERRUPTIBLE; \
1148 schedule(); \ 1157 schedule(); \
1149} while (1) 1158} while (1)
diff --git a/include/linux/journal-head.h b/include/linux/journal-head.h
index 8a62d1e84b9b..bb70ebb6a2d5 100644
--- a/include/linux/journal-head.h
+++ b/include/linux/journal-head.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * buffer_head fields for JBD 4 * buffer_head fields for JBD
5 * 5 *
6 * 27 May 2001 Andrew Morton <akpm@digeo.com> 6 * 27 May 2001 Andrew Morton
7 * Created - pulled out of fs.h 7 * Created - pulled out of fs.h
8 */ 8 */
9 9
diff --git a/include/linux/kallsyms.h b/include/linux/kallsyms.h
index b96144887444..f3fe34391d8e 100644
--- a/include/linux/kallsyms.h
+++ b/include/linux/kallsyms.h
@@ -93,12 +93,10 @@ static inline void print_symbol(const char *fmt, unsigned long addr)
93} 93}
94 94
95/* 95/*
96 * Pretty-print a function pointer. 96 * Pretty-print a function pointer. This function is deprecated.
97 * 97 * Please use the "%pF" vsprintf format instead.
98 * ia64 and ppc64 function pointers are really function descriptors,
99 * which contain a pointer the real address.
100 */ 98 */
101static inline void print_fn_descriptor_symbol(const char *fmt, void *addr) 99static inline void __deprecated print_fn_descriptor_symbol(const char *fmt, void *addr)
102{ 100{
103#if defined(CONFIG_IA64) || defined(CONFIG_PPC64) 101#if defined(CONFIG_IA64) || defined(CONFIG_PPC64)
104 addr = *(void **)addr; 102 addr = *(void **)addr;
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 75d81f157d2e..94d17ff64c5a 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -16,6 +16,7 @@
16#include <linux/log2.h> 16#include <linux/log2.h>
17#include <linux/typecheck.h> 17#include <linux/typecheck.h>
18#include <linux/ratelimit.h> 18#include <linux/ratelimit.h>
19#include <linux/dynamic_printk.h>
19#include <asm/byteorder.h> 20#include <asm/byteorder.h>
20#include <asm/bug.h> 21#include <asm/bug.h>
21 22
@@ -213,6 +214,9 @@ static inline bool printk_timed_ratelimit(unsigned long *caller_jiffies, \
213 { return false; } 214 { return false; }
214#endif 215#endif
215 216
217extern int printk_needs_cpu(int cpu);
218extern void printk_tick(void);
219
216extern void asmlinkage __attribute__((format(printf, 1, 2))) 220extern void asmlinkage __attribute__((format(printf, 1, 2)))
217 early_printk(const char *fmt, ...); 221 early_printk(const char *fmt, ...);
218 222
@@ -235,9 +239,10 @@ extern int oops_in_progress; /* If set, an oops, panic(), BUG() or die() is in
235extern int panic_timeout; 239extern int panic_timeout;
236extern int panic_on_oops; 240extern int panic_on_oops;
237extern int panic_on_unrecovered_nmi; 241extern int panic_on_unrecovered_nmi;
238extern int tainted;
239extern const char *print_tainted(void); 242extern const char *print_tainted(void);
240extern void add_taint(unsigned); 243extern void add_taint(unsigned flag);
244extern int test_taint(unsigned flag);
245extern unsigned long get_taint(void);
241extern int root_mountflags; 246extern int root_mountflags;
242 247
243/* Values used for system_state */ 248/* Values used for system_state */
@@ -250,16 +255,17 @@ extern enum system_states {
250 SYSTEM_SUSPEND_DISK, 255 SYSTEM_SUSPEND_DISK,
251} system_state; 256} system_state;
252 257
253#define TAINT_PROPRIETARY_MODULE (1<<0) 258#define TAINT_PROPRIETARY_MODULE 0
254#define TAINT_FORCED_MODULE (1<<1) 259#define TAINT_FORCED_MODULE 1
255#define TAINT_UNSAFE_SMP (1<<2) 260#define TAINT_UNSAFE_SMP 2
256#define TAINT_FORCED_RMMOD (1<<3) 261#define TAINT_FORCED_RMMOD 3
257#define TAINT_MACHINE_CHECK (1<<4) 262#define TAINT_MACHINE_CHECK 4
258#define TAINT_BAD_PAGE (1<<5) 263#define TAINT_BAD_PAGE 5
259#define TAINT_USER (1<<6) 264#define TAINT_USER 6
260#define TAINT_DIE (1<<7) 265#define TAINT_DIE 7
261#define TAINT_OVERRIDDEN_ACPI_TABLE (1<<8) 266#define TAINT_OVERRIDDEN_ACPI_TABLE 8
262#define TAINT_WARN (1<<9) 267#define TAINT_WARN 9
268#define TAINT_CRAP 10
263 269
264extern void dump_stack(void) __cold; 270extern void dump_stack(void) __cold;
265 271
@@ -303,8 +309,12 @@ static inline char *pack_hex_byte(char *buf, u8 byte)
303#define pr_info(fmt, arg...) \ 309#define pr_info(fmt, arg...) \
304 printk(KERN_INFO fmt, ##arg) 310 printk(KERN_INFO fmt, ##arg)
305 311
306#ifdef DEBUG
307/* If you are writing a driver, please use dev_dbg instead */ 312/* If you are writing a driver, please use dev_dbg instead */
313#if defined(CONFIG_DYNAMIC_PRINTK_DEBUG)
314#define pr_debug(fmt, ...) do { \
315 dynamic_pr_debug(fmt, ##__VA_ARGS__); \
316 } while (0)
317#elif defined(DEBUG)
308#define pr_debug(fmt, arg...) \ 318#define pr_debug(fmt, arg...) \
309 printk(KERN_DEBUG fmt, ##arg) 319 printk(KERN_DEBUG fmt, ##arg)
310#else 320#else
@@ -486,4 +496,9 @@ struct sysinfo {
486#define NUMA_BUILD 0 496#define NUMA_BUILD 0
487#endif 497#endif
488 498
499/* Rebuild everything on CONFIG_FTRACE_MCOUNT_RECORD */
500#ifdef CONFIG_FTRACE_MCOUNT_RECORD
501# define REBUILD_DUE_TO_FTRACE_MCOUNT_RECORD
502#endif
503
489#endif 504#endif
diff --git a/include/linux/kernel_stat.h b/include/linux/kernel_stat.h
index cf9f40a91c9c..4a145caeee07 100644
--- a/include/linux/kernel_stat.h
+++ b/include/linux/kernel_stat.h
@@ -39,19 +39,34 @@ DECLARE_PER_CPU(struct kernel_stat, kstat);
39 39
40extern unsigned long long nr_context_switches(void); 40extern unsigned long long nr_context_switches(void);
41 41
42struct irq_desc;
43
44static inline void kstat_incr_irqs_this_cpu(unsigned int irq,
45 struct irq_desc *desc)
46{
47 kstat_this_cpu.irqs[irq]++;
48}
49
50static inline unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
51{
52 return kstat_cpu(cpu).irqs[irq];
53}
54
42/* 55/*
43 * Number of interrupts per specific IRQ source, since bootup 56 * Number of interrupts per specific IRQ source, since bootup
44 */ 57 */
45static inline int kstat_irqs(int irq) 58static inline unsigned int kstat_irqs(unsigned int irq)
46{ 59{
47 int cpu, sum = 0; 60 unsigned int sum = 0;
61 int cpu;
48 62
49 for_each_possible_cpu(cpu) 63 for_each_possible_cpu(cpu)
50 sum += kstat_cpu(cpu).irqs[irq]; 64 sum += kstat_irqs_cpu(irq, cpu);
51 65
52 return sum; 66 return sum;
53} 67}
54 68
69extern unsigned long long task_delta_exec(struct task_struct *);
55extern void account_user_time(struct task_struct *, cputime_t); 70extern void account_user_time(struct task_struct *, cputime_t);
56extern void account_user_time_scaled(struct task_struct *, cputime_t); 71extern void account_user_time_scaled(struct task_struct *, cputime_t);
57extern void account_system_time(struct task_struct *, int, cputime_t); 72extern void account_system_time(struct task_struct *, int, cputime_t);
diff --git a/include/linux/kmod.h b/include/linux/kmod.h
index a1a91577813c..92213a9194e1 100644
--- a/include/linux/kmod.h
+++ b/include/linux/kmod.h
@@ -99,4 +99,7 @@ struct file;
99extern int call_usermodehelper_pipe(char *path, char *argv[], char *envp[], 99extern int call_usermodehelper_pipe(char *path, char *argv[], char *envp[],
100 struct file **filp); 100 struct file **filp);
101 101
102extern int usermodehelper_disable(void);
103extern void usermodehelper_enable(void);
104
102#endif /* __LINUX_KMOD_H__ */ 105#endif /* __LINUX_KMOD_H__ */
diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h
index 0be7795655fa..497b1d1f7a05 100644
--- a/include/linux/kprobes.h
+++ b/include/linux/kprobes.h
@@ -29,6 +29,7 @@
29 * <jkenisto@us.ibm.com> and Prasanna S Panchamukhi 29 * <jkenisto@us.ibm.com> and Prasanna S Panchamukhi
30 * <prasanna@in.ibm.com> added function-return probes. 30 * <prasanna@in.ibm.com> added function-return probes.
31 */ 31 */
32#include <linux/linkage.h>
32#include <linux/list.h> 33#include <linux/list.h>
33#include <linux/notifier.h> 34#include <linux/notifier.h>
34#include <linux/smp.h> 35#include <linux/smp.h>
@@ -47,7 +48,7 @@
47#define KPROBE_HIT_SSDONE 0x00000008 48#define KPROBE_HIT_SSDONE 0x00000008
48 49
49/* Attach to insert probes on any functions which should be ignored*/ 50/* Attach to insert probes on any functions which should be ignored*/
50#define __kprobes __attribute__((__section__(".kprobes.text"))) 51#define __kprobes __attribute__((__section__(".kprobes.text"))) notrace
51 52
52struct kprobe; 53struct kprobe;
53struct pt_regs; 54struct pt_regs;
@@ -256,7 +257,7 @@ void recycle_rp_inst(struct kretprobe_instance *ri, struct hlist_head *head);
256 257
257#else /* CONFIG_KPROBES */ 258#else /* CONFIG_KPROBES */
258 259
259#define __kprobes /**/ 260#define __kprobes notrace
260struct jprobe; 261struct jprobe;
261struct kretprobe; 262struct kretprobe;
262 263
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index 70a30651cd12..797fcd781242 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -311,22 +311,33 @@ struct kvm_s390_interrupt {
311 311
312/* This structure represents a single trace buffer record. */ 312/* This structure represents a single trace buffer record. */
313struct kvm_trace_rec { 313struct kvm_trace_rec {
314 __u32 event:28; 314 /* variable rec_val
315 __u32 extra_u32:3; 315 * is split into:
316 __u32 cycle_in:1; 316 * bits 0 - 27 -> event id
317 * bits 28 -30 -> number of extra data args of size u32
318 * bits 31 -> binary indicator for if tsc is in record
319 */
320 __u32 rec_val;
317 __u32 pid; 321 __u32 pid;
318 __u32 vcpu_id; 322 __u32 vcpu_id;
319 union { 323 union {
320 struct { 324 struct {
321 __u64 cycle_u64; 325 __u64 timestamp;
322 __u32 extra_u32[KVM_TRC_EXTRA_MAX]; 326 __u32 extra_u32[KVM_TRC_EXTRA_MAX];
323 } __attribute__((packed)) cycle; 327 } __attribute__((packed)) timestamp;
324 struct { 328 struct {
325 __u32 extra_u32[KVM_TRC_EXTRA_MAX]; 329 __u32 extra_u32[KVM_TRC_EXTRA_MAX];
326 } nocycle; 330 } notimestamp;
327 } u; 331 } u;
328}; 332};
329 333
334#define TRACE_REC_EVENT_ID(val) \
335 (0x0fffffff & (val))
336#define TRACE_REC_NUM_DATA_ARGS(val) \
337 (0x70000000 & ((val) << 28))
338#define TRACE_REC_TCS(val) \
339 (0x80000000 & ((val) << 31))
340
330#define KVMIO 0xAE 341#define KVMIO 0xAE
331 342
332/* 343/*
@@ -372,6 +383,10 @@ struct kvm_trace_rec {
372#define KVM_CAP_MP_STATE 14 383#define KVM_CAP_MP_STATE 14
373#define KVM_CAP_COALESCED_MMIO 15 384#define KVM_CAP_COALESCED_MMIO 15
374#define KVM_CAP_SYNC_MMU 16 /* Changes to host mmap are reflected in guest */ 385#define KVM_CAP_SYNC_MMU 16 /* Changes to host mmap are reflected in guest */
386#if defined(CONFIG_X86)||defined(CONFIG_IA64)
387#define KVM_CAP_DEVICE_ASSIGNMENT 17
388#endif
389#define KVM_CAP_IOMMU 18
375 390
376/* 391/*
377 * ioctls for VM fds 392 * ioctls for VM fds
@@ -401,6 +416,10 @@ struct kvm_trace_rec {
401 _IOW(KVMIO, 0x67, struct kvm_coalesced_mmio_zone) 416 _IOW(KVMIO, 0x67, struct kvm_coalesced_mmio_zone)
402#define KVM_UNREGISTER_COALESCED_MMIO \ 417#define KVM_UNREGISTER_COALESCED_MMIO \
403 _IOW(KVMIO, 0x68, struct kvm_coalesced_mmio_zone) 418 _IOW(KVMIO, 0x68, struct kvm_coalesced_mmio_zone)
419#define KVM_ASSIGN_PCI_DEVICE _IOR(KVMIO, 0x69, \
420 struct kvm_assigned_pci_dev)
421#define KVM_ASSIGN_IRQ _IOR(KVMIO, 0x70, \
422 struct kvm_assigned_irq)
404 423
405/* 424/*
406 * ioctls for vcpu fds 425 * ioctls for vcpu fds
@@ -440,4 +459,45 @@ struct kvm_trace_rec {
440#define KVM_GET_MP_STATE _IOR(KVMIO, 0x98, struct kvm_mp_state) 459#define KVM_GET_MP_STATE _IOR(KVMIO, 0x98, struct kvm_mp_state)
441#define KVM_SET_MP_STATE _IOW(KVMIO, 0x99, struct kvm_mp_state) 460#define KVM_SET_MP_STATE _IOW(KVMIO, 0x99, struct kvm_mp_state)
442 461
462#define KVM_TRC_INJ_VIRQ (KVM_TRC_HANDLER + 0x02)
463#define KVM_TRC_REDELIVER_EVT (KVM_TRC_HANDLER + 0x03)
464#define KVM_TRC_PEND_INTR (KVM_TRC_HANDLER + 0x04)
465#define KVM_TRC_IO_READ (KVM_TRC_HANDLER + 0x05)
466#define KVM_TRC_IO_WRITE (KVM_TRC_HANDLER + 0x06)
467#define KVM_TRC_CR_READ (KVM_TRC_HANDLER + 0x07)
468#define KVM_TRC_CR_WRITE (KVM_TRC_HANDLER + 0x08)
469#define KVM_TRC_DR_READ (KVM_TRC_HANDLER + 0x09)
470#define KVM_TRC_DR_WRITE (KVM_TRC_HANDLER + 0x0A)
471#define KVM_TRC_MSR_READ (KVM_TRC_HANDLER + 0x0B)
472#define KVM_TRC_MSR_WRITE (KVM_TRC_HANDLER + 0x0C)
473#define KVM_TRC_CPUID (KVM_TRC_HANDLER + 0x0D)
474#define KVM_TRC_INTR (KVM_TRC_HANDLER + 0x0E)
475#define KVM_TRC_NMI (KVM_TRC_HANDLER + 0x0F)
476#define KVM_TRC_VMMCALL (KVM_TRC_HANDLER + 0x10)
477#define KVM_TRC_HLT (KVM_TRC_HANDLER + 0x11)
478#define KVM_TRC_CLTS (KVM_TRC_HANDLER + 0x12)
479#define KVM_TRC_LMSW (KVM_TRC_HANDLER + 0x13)
480#define KVM_TRC_APIC_ACCESS (KVM_TRC_HANDLER + 0x14)
481#define KVM_TRC_TDP_FAULT (KVM_TRC_HANDLER + 0x15)
482#define KVM_TRC_GTLB_WRITE (KVM_TRC_HANDLER + 0x16)
483#define KVM_TRC_STLB_WRITE (KVM_TRC_HANDLER + 0x17)
484#define KVM_TRC_STLB_INVAL (KVM_TRC_HANDLER + 0x18)
485#define KVM_TRC_PPC_INSTR (KVM_TRC_HANDLER + 0x19)
486
487struct kvm_assigned_pci_dev {
488 __u32 assigned_dev_id;
489 __u32 busnr;
490 __u32 devfn;
491 __u32 flags;
492};
493
494struct kvm_assigned_irq {
495 __u32 assigned_dev_id;
496 __u32 host_irq;
497 __u32 guest_irq;
498 __u32 flags;
499};
500
501#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
502
443#endif 503#endif
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 8525afc53107..3833c48fae3a 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -34,6 +34,8 @@
34#define KVM_REQ_MMU_RELOAD 3 34#define KVM_REQ_MMU_RELOAD 3
35#define KVM_REQ_TRIPLE_FAULT 4 35#define KVM_REQ_TRIPLE_FAULT 4
36#define KVM_REQ_PENDING_TIMER 5 36#define KVM_REQ_PENDING_TIMER 5
37#define KVM_REQ_UNHALT 6
38#define KVM_REQ_MMU_SYNC 7
37 39
38struct kvm_vcpu; 40struct kvm_vcpu;
39extern struct kmem_cache *kvm_vcpu_cache; 41extern struct kmem_cache *kvm_vcpu_cache;
@@ -279,12 +281,68 @@ void kvm_free_physmem(struct kvm *kvm);
279 281
280struct kvm *kvm_arch_create_vm(void); 282struct kvm *kvm_arch_create_vm(void);
281void kvm_arch_destroy_vm(struct kvm *kvm); 283void kvm_arch_destroy_vm(struct kvm *kvm);
284void kvm_free_all_assigned_devices(struct kvm *kvm);
282 285
283int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 286int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
284int kvm_cpu_has_interrupt(struct kvm_vcpu *v); 287int kvm_cpu_has_interrupt(struct kvm_vcpu *v);
285int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu); 288int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu);
286void kvm_vcpu_kick(struct kvm_vcpu *vcpu); 289void kvm_vcpu_kick(struct kvm_vcpu *vcpu);
287 290
291int kvm_is_mmio_pfn(pfn_t pfn);
292
293struct kvm_irq_ack_notifier {
294 struct hlist_node link;
295 unsigned gsi;
296 void (*irq_acked)(struct kvm_irq_ack_notifier *kian);
297};
298
299struct kvm_assigned_dev_kernel {
300 struct kvm_irq_ack_notifier ack_notifier;
301 struct work_struct interrupt_work;
302 struct list_head list;
303 int assigned_dev_id;
304 int host_busnr;
305 int host_devfn;
306 int host_irq;
307 int guest_irq;
308 int irq_requested;
309 struct pci_dev *dev;
310 struct kvm *kvm;
311};
312void kvm_set_irq(struct kvm *kvm, int irq, int level);
313void kvm_notify_acked_irq(struct kvm *kvm, unsigned gsi);
314void kvm_register_irq_ack_notifier(struct kvm *kvm,
315 struct kvm_irq_ack_notifier *kian);
316void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
317 struct kvm_irq_ack_notifier *kian);
318
319#ifdef CONFIG_DMAR
320int kvm_iommu_map_pages(struct kvm *kvm, gfn_t base_gfn,
321 unsigned long npages);
322int kvm_iommu_map_guest(struct kvm *kvm,
323 struct kvm_assigned_dev_kernel *assigned_dev);
324int kvm_iommu_unmap_guest(struct kvm *kvm);
325#else /* CONFIG_DMAR */
326static inline int kvm_iommu_map_pages(struct kvm *kvm,
327 gfn_t base_gfn,
328 unsigned long npages)
329{
330 return 0;
331}
332
333static inline int kvm_iommu_map_guest(struct kvm *kvm,
334 struct kvm_assigned_dev_kernel
335 *assigned_dev)
336{
337 return -ENODEV;
338}
339
340static inline int kvm_iommu_unmap_guest(struct kvm *kvm)
341{
342 return 0;
343}
344#endif /* CONFIG_DMAR */
345
288static inline void kvm_guest_enter(void) 346static inline void kvm_guest_enter(void)
289{ 347{
290 account_system_vtime(current); 348 account_system_vtime(current);
@@ -307,6 +365,11 @@ static inline gpa_t gfn_to_gpa(gfn_t gfn)
307 return (gpa_t)gfn << PAGE_SHIFT; 365 return (gpa_t)gfn << PAGE_SHIFT;
308} 366}
309 367
368static inline hpa_t pfn_to_hpa(pfn_t pfn)
369{
370 return (hpa_t)pfn << PAGE_SHIFT;
371}
372
310static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu) 373static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
311{ 374{
312 set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests); 375 set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
@@ -326,6 +389,25 @@ struct kvm_stats_debugfs_item {
326extern struct kvm_stats_debugfs_item debugfs_entries[]; 389extern struct kvm_stats_debugfs_item debugfs_entries[];
327extern struct dentry *kvm_debugfs_dir; 390extern struct dentry *kvm_debugfs_dir;
328 391
392#define KVMTRACE_5D(evt, vcpu, d1, d2, d3, d4, d5, name) \
393 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
394 vcpu, 5, d1, d2, d3, d4, d5)
395#define KVMTRACE_4D(evt, vcpu, d1, d2, d3, d4, name) \
396 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
397 vcpu, 4, d1, d2, d3, d4, 0)
398#define KVMTRACE_3D(evt, vcpu, d1, d2, d3, name) \
399 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
400 vcpu, 3, d1, d2, d3, 0, 0)
401#define KVMTRACE_2D(evt, vcpu, d1, d2, name) \
402 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
403 vcpu, 2, d1, d2, 0, 0, 0)
404#define KVMTRACE_1D(evt, vcpu, d1, name) \
405 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
406 vcpu, 1, d1, 0, 0, 0, 0)
407#define KVMTRACE_0D(evt, vcpu, name) \
408 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
409 vcpu, 0, 0, 0, 0, 0, 0)
410
329#ifdef CONFIG_KVM_TRACE 411#ifdef CONFIG_KVM_TRACE
330int kvm_trace_ioctl(unsigned int ioctl, unsigned long arg); 412int kvm_trace_ioctl(unsigned int ioctl, unsigned long arg);
331void kvm_trace_cleanup(void); 413void kvm_trace_cleanup(void);
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 947cf84e555d..c261aa0584b1 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -340,6 +340,9 @@ enum {
340 340
341 ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET, 341 ATA_EHI_DID_RESET = ATA_EHI_DID_SOFTRESET | ATA_EHI_DID_HARDRESET,
342 342
343 /* mask of flags to transfer *to* the slave link */
344 ATA_EHI_TO_SLAVE_MASK = ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET,
345
343 /* max tries if error condition is still set after ->error_handler */ 346 /* max tries if error condition is still set after ->error_handler */
344 ATA_EH_MAX_TRIES = 5, 347 ATA_EH_MAX_TRIES = 5,
345 348
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index 56ba37394656..9fd1f859021b 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -4,8 +4,6 @@
4#include <linux/compiler.h> 4#include <linux/compiler.h>
5#include <asm/linkage.h> 5#include <asm/linkage.h>
6 6
7#define notrace __attribute__((no_instrument_function))
8
9#ifdef __cplusplus 7#ifdef __cplusplus
10#define CPP_ASMLINKAGE extern "C" 8#define CPP_ASMLINKAGE extern "C"
11#else 9#else
diff --git a/include/linux/lockd/bind.h b/include/linux/lockd/bind.h
index 3d25bcd139d1..e5872dc994c0 100644
--- a/include/linux/lockd/bind.h
+++ b/include/linux/lockd/bind.h
@@ -27,7 +27,6 @@ struct nlmsvc_binding {
27 struct nfs_fh *, 27 struct nfs_fh *,
28 struct file **); 28 struct file **);
29 void (*fclose)(struct file *); 29 void (*fclose)(struct file *);
30 unsigned long (*get_grace_period)(void);
31}; 30};
32 31
33extern struct nlmsvc_binding * nlmsvc_ops; 32extern struct nlmsvc_binding * nlmsvc_ops;
@@ -53,15 +52,7 @@ extern void nlmclnt_done(struct nlm_host *host);
53 52
54extern int nlmclnt_proc(struct nlm_host *host, int cmd, 53extern int nlmclnt_proc(struct nlm_host *host, int cmd,
55 struct file_lock *fl); 54 struct file_lock *fl);
56extern int lockd_up(int proto); 55extern int lockd_up(void);
57extern void lockd_down(void); 56extern void lockd_down(void);
58 57
59unsigned long get_nfs_grace_period(void);
60
61#ifdef CONFIG_NFSD_V4
62unsigned long get_nfs4_grace_period(void);
63#else
64static inline unsigned long get_nfs4_grace_period(void) {return 0;}
65#endif
66
67#endif /* LINUX_LOCKD_BIND_H */ 58#endif /* LINUX_LOCKD_BIND_H */
diff --git a/include/linux/lockd/lockd.h b/include/linux/lockd/lockd.h
index dbb87ab282e8..b56d5aa9b194 100644
--- a/include/linux/lockd/lockd.h
+++ b/include/linux/lockd/lockd.h
@@ -12,6 +12,8 @@
12#ifdef __KERNEL__ 12#ifdef __KERNEL__
13 13
14#include <linux/in.h> 14#include <linux/in.h>
15#include <linux/in6.h>
16#include <net/ipv6.h>
15#include <linux/fs.h> 17#include <linux/fs.h>
16#include <linux/kref.h> 18#include <linux/kref.h>
17#include <linux/utsname.h> 19#include <linux/utsname.h>
@@ -38,8 +40,9 @@
38 */ 40 */
39struct nlm_host { 41struct nlm_host {
40 struct hlist_node h_hash; /* doubly linked list */ 42 struct hlist_node h_hash; /* doubly linked list */
41 struct sockaddr_in h_addr; /* peer address */ 43 struct sockaddr_storage h_addr; /* peer address */
42 struct sockaddr_in h_saddr; /* our address (optional) */ 44 size_t h_addrlen;
45 struct sockaddr_storage h_srcaddr; /* our address (optional) */
43 struct rpc_clnt * h_rpcclnt; /* RPC client to talk to peer */ 46 struct rpc_clnt * h_rpcclnt; /* RPC client to talk to peer */
44 char * h_name; /* remote hostname */ 47 char * h_name; /* remote hostname */
45 u32 h_version; /* interface version */ 48 u32 h_version; /* interface version */
@@ -61,18 +64,56 @@ struct nlm_host {
61 struct list_head h_granted; /* Locks in GRANTED state */ 64 struct list_head h_granted; /* Locks in GRANTED state */
62 struct list_head h_reclaim; /* Locks in RECLAIM state */ 65 struct list_head h_reclaim; /* Locks in RECLAIM state */
63 struct nsm_handle * h_nsmhandle; /* NSM status handle */ 66 struct nsm_handle * h_nsmhandle; /* NSM status handle */
67
68 char h_addrbuf[48], /* address eyecatchers */
69 h_srcaddrbuf[48];
64}; 70};
65 71
66struct nsm_handle { 72struct nsm_handle {
67 struct list_head sm_link; 73 struct list_head sm_link;
68 atomic_t sm_count; 74 atomic_t sm_count;
69 char * sm_name; 75 char * sm_name;
70 struct sockaddr_in sm_addr; 76 struct sockaddr_storage sm_addr;
77 size_t sm_addrlen;
71 unsigned int sm_monitored : 1, 78 unsigned int sm_monitored : 1,
72 sm_sticky : 1; /* don't unmonitor */ 79 sm_sticky : 1; /* don't unmonitor */
80 char sm_addrbuf[48]; /* address eyecatcher */
73}; 81};
74 82
75/* 83/*
84 * Rigorous type checking on sockaddr type conversions
85 */
86static inline struct sockaddr_in *nlm_addr_in(const struct nlm_host *host)
87{
88 return (struct sockaddr_in *)&host->h_addr;
89}
90
91static inline struct sockaddr *nlm_addr(const struct nlm_host *host)
92{
93 return (struct sockaddr *)&host->h_addr;
94}
95
96static inline struct sockaddr_in *nlm_srcaddr_in(const struct nlm_host *host)
97{
98 return (struct sockaddr_in *)&host->h_srcaddr;
99}
100
101static inline struct sockaddr *nlm_srcaddr(const struct nlm_host *host)
102{
103 return (struct sockaddr *)&host->h_srcaddr;
104}
105
106static inline struct sockaddr_in *nsm_addr_in(const struct nsm_handle *handle)
107{
108 return (struct sockaddr_in *)&handle->sm_addr;
109}
110
111static inline struct sockaddr *nsm_addr(const struct nsm_handle *handle)
112{
113 return (struct sockaddr *)&handle->sm_addr;
114}
115
116/*
76 * Map an fl_owner_t into a unique 32-bit "pid" 117 * Map an fl_owner_t into a unique 32-bit "pid"
77 */ 118 */
78struct nlm_lockowner { 119struct nlm_lockowner {
@@ -166,7 +207,8 @@ int nlm_async_reply(struct nlm_rqst *, u32, const struct rpc_call_ops *);
166struct nlm_wait * nlmclnt_prepare_block(struct nlm_host *host, struct file_lock *fl); 207struct nlm_wait * nlmclnt_prepare_block(struct nlm_host *host, struct file_lock *fl);
167void nlmclnt_finish_block(struct nlm_wait *block); 208void nlmclnt_finish_block(struct nlm_wait *block);
168int nlmclnt_block(struct nlm_wait *block, struct nlm_rqst *req, long timeout); 209int nlmclnt_block(struct nlm_wait *block, struct nlm_rqst *req, long timeout);
169__be32 nlmclnt_grant(const struct sockaddr_in *addr, const struct nlm_lock *); 210__be32 nlmclnt_grant(const struct sockaddr *addr,
211 const struct nlm_lock *lock);
170void nlmclnt_recovery(struct nlm_host *); 212void nlmclnt_recovery(struct nlm_host *);
171int nlmclnt_reclaim(struct nlm_host *, struct file_lock *); 213int nlmclnt_reclaim(struct nlm_host *, struct file_lock *);
172void nlmclnt_next_cookie(struct nlm_cookie *); 214void nlmclnt_next_cookie(struct nlm_cookie *);
@@ -174,12 +216,14 @@ void nlmclnt_next_cookie(struct nlm_cookie *);
174/* 216/*
175 * Host cache 217 * Host cache
176 */ 218 */
177struct nlm_host *nlmclnt_lookup_host(const struct sockaddr_in *sin, 219struct nlm_host *nlmclnt_lookup_host(const struct sockaddr *sap,
178 int proto, u32 version, 220 const size_t salen,
221 const unsigned short protocol,
222 const u32 version,
223 const char *hostname);
224struct nlm_host *nlmsvc_lookup_host(const struct svc_rqst *rqstp,
179 const char *hostname, 225 const char *hostname,
180 unsigned int hostname_len); 226 const size_t hostname_len);
181struct nlm_host *nlmsvc_lookup_host(struct svc_rqst *, const char *,
182 unsigned int);
183struct rpc_clnt * nlm_bind_host(struct nlm_host *); 227struct rpc_clnt * nlm_bind_host(struct nlm_host *);
184void nlm_rebind_host(struct nlm_host *); 228void nlm_rebind_host(struct nlm_host *);
185struct nlm_host * nlm_get_host(struct nlm_host *); 229struct nlm_host * nlm_get_host(struct nlm_host *);
@@ -201,7 +245,7 @@ typedef int (*nlm_host_match_fn_t)(void *cur, struct nlm_host *ref);
201 */ 245 */
202__be32 nlmsvc_lock(struct svc_rqst *, struct nlm_file *, 246__be32 nlmsvc_lock(struct svc_rqst *, struct nlm_file *,
203 struct nlm_host *, struct nlm_lock *, int, 247 struct nlm_host *, struct nlm_lock *, int,
204 struct nlm_cookie *); 248 struct nlm_cookie *, int);
205__be32 nlmsvc_unlock(struct nlm_file *, struct nlm_lock *); 249__be32 nlmsvc_unlock(struct nlm_file *, struct nlm_lock *);
206__be32 nlmsvc_testlock(struct svc_rqst *, struct nlm_file *, 250__be32 nlmsvc_testlock(struct svc_rqst *, struct nlm_file *,
207 struct nlm_host *, struct nlm_lock *, 251 struct nlm_host *, struct nlm_lock *,
@@ -233,15 +277,82 @@ static inline struct inode *nlmsvc_file_inode(struct nlm_file *file)
233 return file->f_file->f_path.dentry->d_inode; 277 return file->f_file->f_path.dentry->d_inode;
234} 278}
235 279
280static inline int __nlm_privileged_request4(const struct sockaddr *sap)
281{
282 const struct sockaddr_in *sin = (struct sockaddr_in *)sap;
283 return (sin->sin_addr.s_addr == htonl(INADDR_LOOPBACK)) &&
284 (ntohs(sin->sin_port) < 1024);
285}
286
287#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
288static inline int __nlm_privileged_request6(const struct sockaddr *sap)
289{
290 const struct sockaddr_in6 *sin6 = (struct sockaddr_in6 *)sap;
291 return (ipv6_addr_type(&sin6->sin6_addr) & IPV6_ADDR_LOOPBACK) &&
292 (ntohs(sin6->sin6_port) < 1024);
293}
294#else /* defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) */
295static inline int __nlm_privileged_request6(const struct sockaddr *sap)
296{
297 return 0;
298}
299#endif /* defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) */
300
236/* 301/*
237 * Compare two host addresses (needs modifying for ipv6) 302 * Ensure incoming requests are from local privileged callers.
303 *
304 * Return TRUE if sender is local and is connecting via a privileged port;
305 * otherwise return FALSE.
238 */ 306 */
239static inline int nlm_cmp_addr(const struct sockaddr_in *sin1, 307static inline int nlm_privileged_requester(const struct svc_rqst *rqstp)
240 const struct sockaddr_in *sin2)
241{ 308{
309 const struct sockaddr *sap = svc_addr(rqstp);
310
311 switch (sap->sa_family) {
312 case AF_INET:
313 return __nlm_privileged_request4(sap);
314 case AF_INET6:
315 return __nlm_privileged_request6(sap);
316 default:
317 return 0;
318 }
319}
320
321static inline int __nlm_cmp_addr4(const struct sockaddr *sap1,
322 const struct sockaddr *sap2)
323{
324 const struct sockaddr_in *sin1 = (const struct sockaddr_in *)sap1;
325 const struct sockaddr_in *sin2 = (const struct sockaddr_in *)sap2;
242 return sin1->sin_addr.s_addr == sin2->sin_addr.s_addr; 326 return sin1->sin_addr.s_addr == sin2->sin_addr.s_addr;
243} 327}
244 328
329static inline int __nlm_cmp_addr6(const struct sockaddr *sap1,
330 const struct sockaddr *sap2)
331{
332 const struct sockaddr_in6 *sin1 = (const struct sockaddr_in6 *)sap1;
333 const struct sockaddr_in6 *sin2 = (const struct sockaddr_in6 *)sap2;
334 return ipv6_addr_equal(&sin1->sin6_addr, &sin2->sin6_addr);
335}
336
337/*
338 * Compare two host addresses
339 *
340 * Return TRUE if the addresses are the same; otherwise FALSE.
341 */
342static inline int nlm_cmp_addr(const struct sockaddr *sap1,
343 const struct sockaddr *sap2)
344{
345 if (sap1->sa_family == sap2->sa_family) {
346 switch (sap1->sa_family) {
347 case AF_INET:
348 return __nlm_cmp_addr4(sap1, sap2);
349 case AF_INET6:
350 return __nlm_cmp_addr6(sap1, sap2);
351 }
352 }
353 return 0;
354}
355
245/* 356/*
246 * Compare two NLM locks. 357 * Compare two NLM locks.
247 * When the second lock is of type F_UNLCK, this acts like a wildcard. 358 * When the second lock is of type F_UNLCK, this acts like a wildcard.
diff --git a/include/linux/lockd/xdr.h b/include/linux/lockd/xdr.h
index df18fa053bcd..d6b3a802c046 100644
--- a/include/linux/lockd/xdr.h
+++ b/include/linux/lockd/xdr.h
@@ -81,8 +81,6 @@ struct nlm_reboot {
81 unsigned int len; 81 unsigned int len;
82 u32 state; 82 u32 state;
83 __be32 addr; 83 __be32 addr;
84 __be32 vers;
85 __be32 proto;
86}; 84};
87 85
88/* 86/*
diff --git a/include/linux/map_to_7segment.h b/include/linux/map_to_7segment.h
new file mode 100644
index 000000000000..7df8432c4402
--- /dev/null
+++ b/include/linux/map_to_7segment.h
@@ -0,0 +1,187 @@
1/*
2 * Copyright (c) 2005 Henk Vergonet <Henk.Vergonet@gmail.com>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef MAP_TO_7SEGMENT_H
20#define MAP_TO_7SEGMENT_H
21
22/* This file provides translation primitives and tables for the conversion
23 * of (ASCII) characters to a 7-segments notation.
24 *
25 * The 7 segment's wikipedia notation below is used as standard.
26 * See: http://en.wikipedia.org/wiki/Seven_segment_display
27 *
28 * Notation: +-a-+
29 * f b
30 * +-g-+
31 * e c
32 * +-d-+
33 *
34 * Usage:
35 *
36 * Register a map variable, and fill it with a character set:
37 * static SEG7_DEFAULT_MAP(map_seg7);
38 *
39 *
40 * Then use for conversion:
41 * seg7 = map_to_seg7(&map_seg7, some_char);
42 * ...
43 *
44 * In device drivers it is recommended, if required, to make the char map
45 * accessible via the sysfs interface using the following scheme:
46 *
47 * static ssize_t show_map(struct device *dev, char *buf) {
48 * memcpy(buf, &map_seg7, sizeof(map_seg7));
49 * return sizeof(map_seg7);
50 * }
51 * static ssize_t store_map(struct device *dev, const char *buf, size_t cnt) {
52 * if(cnt != sizeof(map_seg7))
53 * return -EINVAL;
54 * memcpy(&map_seg7, buf, cnt);
55 * return cnt;
56 * }
57 * static DEVICE_ATTR(map_seg7, PERMS_RW, show_map, store_map);
58 *
59 * History:
60 * 2005-05-31 RFC linux-kernel@vger.kernel.org
61 */
62#include <linux/errno.h>
63
64
65#define BIT_SEG7_A 0
66#define BIT_SEG7_B 1
67#define BIT_SEG7_C 2
68#define BIT_SEG7_D 3
69#define BIT_SEG7_E 4
70#define BIT_SEG7_F 5
71#define BIT_SEG7_G 6
72#define BIT_SEG7_RESERVED 7
73
74struct seg7_conversion_map {
75 unsigned char table[128];
76};
77
78static inline int map_to_seg7(struct seg7_conversion_map *map, int c)
79{
80 return c >= 0 && c < sizeof(map->table) ? map->table[c] : -EINVAL;
81}
82
83#define SEG7_CONVERSION_MAP(_name, _map) \
84 struct seg7_conversion_map _name = { .table = { _map } }
85
86/*
87 * It is recommended to use a facility that allows user space to redefine
88 * custom character sets for LCD devices. Please use a sysfs interface
89 * as described above.
90 */
91#define MAP_TO_SEG7_SYSFS_FILE "map_seg7"
92
93/*******************************************************************************
94 * ASCII conversion table
95 ******************************************************************************/
96
97#define _SEG7(l,a,b,c,d,e,f,g) \
98 ( a<<BIT_SEG7_A | b<<BIT_SEG7_B | c<<BIT_SEG7_C | d<<BIT_SEG7_D | \
99 e<<BIT_SEG7_E | f<<BIT_SEG7_F | g<<BIT_SEG7_G )
100
101#define _MAP_0_32_ASCII_SEG7_NON_PRINTABLE \
102 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
103
104#define _MAP_33_47_ASCII_SEG7_SYMBOL \
105 _SEG7('!',0,0,0,0,1,1,0), _SEG7('"',0,1,0,0,0,1,0), _SEG7('#',0,1,1,0,1,1,0),\
106 _SEG7('$',1,0,1,1,0,1,1), _SEG7('%',0,0,1,0,0,1,0), _SEG7('&',1,0,1,1,1,1,1),\
107 _SEG7('\'',0,0,0,0,0,1,0),_SEG7('(',1,0,0,1,1,1,0), _SEG7(')',1,1,1,1,0,0,0),\
108 _SEG7('*',0,1,1,0,1,1,1), _SEG7('+',0,1,1,0,0,0,1), _SEG7(',',0,0,0,0,1,0,0),\
109 _SEG7('-',0,0,0,0,0,0,1), _SEG7('.',0,0,0,0,1,0,0), _SEG7('/',0,1,0,0,1,0,1),
110
111#define _MAP_48_57_ASCII_SEG7_NUMERIC \
112 _SEG7('0',1,1,1,1,1,1,0), _SEG7('1',0,1,1,0,0,0,0), _SEG7('2',1,1,0,1,1,0,1),\
113 _SEG7('3',1,1,1,1,0,0,1), _SEG7('4',0,1,1,0,0,1,1), _SEG7('5',1,0,1,1,0,1,1),\
114 _SEG7('6',1,0,1,1,1,1,1), _SEG7('7',1,1,1,0,0,0,0), _SEG7('8',1,1,1,1,1,1,1),\
115 _SEG7('9',1,1,1,1,0,1,1),
116
117#define _MAP_58_64_ASCII_SEG7_SYMBOL \
118 _SEG7(':',0,0,0,1,0,0,1), _SEG7(';',0,0,0,1,0,0,1), _SEG7('<',1,0,0,0,0,1,1),\
119 _SEG7('=',0,0,0,1,0,0,1), _SEG7('>',1,1,0,0,0,0,1), _SEG7('?',1,1,1,0,0,1,0),\
120 _SEG7('@',1,1,0,1,1,1,1),
121
122#define _MAP_65_90_ASCII_SEG7_ALPHA_UPPR \
123 _SEG7('A',1,1,1,0,1,1,1), _SEG7('B',1,1,1,1,1,1,1), _SEG7('C',1,0,0,1,1,1,0),\
124 _SEG7('D',1,1,1,1,1,1,0), _SEG7('E',1,0,0,1,1,1,1), _SEG7('F',1,0,0,0,1,1,1),\
125 _SEG7('G',1,1,1,1,0,1,1), _SEG7('H',0,1,1,0,1,1,1), _SEG7('I',0,1,1,0,0,0,0),\
126 _SEG7('J',0,1,1,1,0,0,0), _SEG7('K',0,1,1,0,1,1,1), _SEG7('L',0,0,0,1,1,1,0),\
127 _SEG7('M',1,1,1,0,1,1,0), _SEG7('N',1,1,1,0,1,1,0), _SEG7('O',1,1,1,1,1,1,0),\
128 _SEG7('P',1,1,0,0,1,1,1), _SEG7('Q',1,1,1,1,1,1,0), _SEG7('R',1,1,1,0,1,1,1),\
129 _SEG7('S',1,0,1,1,0,1,1), _SEG7('T',0,0,0,1,1,1,1), _SEG7('U',0,1,1,1,1,1,0),\
130 _SEG7('V',0,1,1,1,1,1,0), _SEG7('W',0,1,1,1,1,1,1), _SEG7('X',0,1,1,0,1,1,1),\
131 _SEG7('Y',0,1,1,0,0,1,1), _SEG7('Z',1,1,0,1,1,0,1),
132
133#define _MAP_91_96_ASCII_SEG7_SYMBOL \
134 _SEG7('[',1,0,0,1,1,1,0), _SEG7('\\',0,0,1,0,0,1,1),_SEG7(']',1,1,1,1,0,0,0),\
135 _SEG7('^',1,1,0,0,0,1,0), _SEG7('_',0,0,0,1,0,0,0), _SEG7('`',0,1,0,0,0,0,0),
136
137#define _MAP_97_122_ASCII_SEG7_ALPHA_LOWER \
138 _SEG7('A',1,1,1,0,1,1,1), _SEG7('b',0,0,1,1,1,1,1), _SEG7('c',0,0,0,1,1,0,1),\
139 _SEG7('d',0,1,1,1,1,0,1), _SEG7('E',1,0,0,1,1,1,1), _SEG7('F',1,0,0,0,1,1,1),\
140 _SEG7('G',1,1,1,1,0,1,1), _SEG7('h',0,0,1,0,1,1,1), _SEG7('i',0,0,1,0,0,0,0),\
141 _SEG7('j',0,0,1,1,0,0,0), _SEG7('k',0,0,1,0,1,1,1), _SEG7('L',0,0,0,1,1,1,0),\
142 _SEG7('M',1,1,1,0,1,1,0), _SEG7('n',0,0,1,0,1,0,1), _SEG7('o',0,0,1,1,1,0,1),\
143 _SEG7('P',1,1,0,0,1,1,1), _SEG7('q',1,1,1,0,0,1,1), _SEG7('r',0,0,0,0,1,0,1),\
144 _SEG7('S',1,0,1,1,0,1,1), _SEG7('T',0,0,0,1,1,1,1), _SEG7('u',0,0,1,1,1,0,0),\
145 _SEG7('v',0,0,1,1,1,0,0), _SEG7('W',0,1,1,1,1,1,1), _SEG7('X',0,1,1,0,1,1,1),\
146 _SEG7('y',0,1,1,1,0,1,1), _SEG7('Z',1,1,0,1,1,0,1),
147
148#define _MAP_123_126_ASCII_SEG7_SYMBOL \
149 _SEG7('{',1,0,0,1,1,1,0), _SEG7('|',0,0,0,0,1,1,0), _SEG7('}',1,1,1,1,0,0,0),\
150 _SEG7('~',1,0,0,0,0,0,0),
151
152/* Maps */
153
154/* This set tries to map as close as possible to the visible characteristics
155 * of the ASCII symbol, lowercase and uppercase letters may differ in
156 * presentation on the display.
157 */
158#define MAP_ASCII7SEG_ALPHANUM \
159 _MAP_0_32_ASCII_SEG7_NON_PRINTABLE \
160 _MAP_33_47_ASCII_SEG7_SYMBOL \
161 _MAP_48_57_ASCII_SEG7_NUMERIC \
162 _MAP_58_64_ASCII_SEG7_SYMBOL \
163 _MAP_65_90_ASCII_SEG7_ALPHA_UPPR \
164 _MAP_91_96_ASCII_SEG7_SYMBOL \
165 _MAP_97_122_ASCII_SEG7_ALPHA_LOWER \
166 _MAP_123_126_ASCII_SEG7_SYMBOL
167
168/* This set tries to map as close as possible to the symbolic characteristics
169 * of the ASCII character for maximum discrimination.
170 * For now this means all alpha chars are in lower case representations.
171 * (This for example facilitates the use of hex numbers with uppercase input.)
172 */
173#define MAP_ASCII7SEG_ALPHANUM_LC \
174 _MAP_0_32_ASCII_SEG7_NON_PRINTABLE \
175 _MAP_33_47_ASCII_SEG7_SYMBOL \
176 _MAP_48_57_ASCII_SEG7_NUMERIC \
177 _MAP_58_64_ASCII_SEG7_SYMBOL \
178 _MAP_97_122_ASCII_SEG7_ALPHA_LOWER \
179 _MAP_91_96_ASCII_SEG7_SYMBOL \
180 _MAP_97_122_ASCII_SEG7_ALPHA_LOWER \
181 _MAP_123_126_ASCII_SEG7_SYMBOL
182
183#define SEG7_DEFAULT_MAP(_name) \
184 SEG7_CONVERSION_MAP(_name,MAP_ASCII7SEG_ALPHANUM)
185
186#endif /* MAP_TO_7SEGMENT_H */
187
diff --git a/include/linux/marker.h b/include/linux/marker.h
index 1290653f9241..889196c7fbb1 100644
--- a/include/linux/marker.h
+++ b/include/linux/marker.h
@@ -160,4 +160,11 @@ extern int marker_probe_unregister_private_data(marker_probe_func *probe,
160extern void *marker_get_private_data(const char *name, marker_probe_func *probe, 160extern void *marker_get_private_data(const char *name, marker_probe_func *probe,
161 int num); 161 int num);
162 162
163/*
164 * marker_synchronize_unregister must be called between the last marker probe
165 * unregistration and the end of module exit to make sure there is no caller
166 * executing a probe when it is freed.
167 */
168#define marker_synchronize_unregister() synchronize_sched()
169
163#endif 170#endif
diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h
index fdf3967e1397..1fbe14d39521 100644
--- a/include/linux/memcontrol.h
+++ b/include/linux/memcontrol.h
@@ -27,16 +27,13 @@ struct mm_struct;
27 27
28#ifdef CONFIG_CGROUP_MEM_RES_CTLR 28#ifdef CONFIG_CGROUP_MEM_RES_CTLR
29 29
30#define page_reset_bad_cgroup(page) ((page)->page_cgroup = 0)
31
32extern struct page_cgroup *page_get_page_cgroup(struct page *page);
33extern int mem_cgroup_charge(struct page *page, struct mm_struct *mm, 30extern int mem_cgroup_charge(struct page *page, struct mm_struct *mm,
34 gfp_t gfp_mask); 31 gfp_t gfp_mask);
35extern int mem_cgroup_cache_charge(struct page *page, struct mm_struct *mm, 32extern int mem_cgroup_cache_charge(struct page *page, struct mm_struct *mm,
36 gfp_t gfp_mask); 33 gfp_t gfp_mask);
34extern void mem_cgroup_move_lists(struct page *page, enum lru_list lru);
37extern void mem_cgroup_uncharge_page(struct page *page); 35extern void mem_cgroup_uncharge_page(struct page *page);
38extern void mem_cgroup_uncharge_cache_page(struct page *page); 36extern void mem_cgroup_uncharge_cache_page(struct page *page);
39extern void mem_cgroup_move_lists(struct page *page, bool active);
40extern int mem_cgroup_shrink_usage(struct mm_struct *mm, gfp_t gfp_mask); 37extern int mem_cgroup_shrink_usage(struct mm_struct *mm, gfp_t gfp_mask);
41 38
42extern unsigned long mem_cgroup_isolate_pages(unsigned long nr_to_scan, 39extern unsigned long mem_cgroup_isolate_pages(unsigned long nr_to_scan,
@@ -44,7 +41,7 @@ extern unsigned long mem_cgroup_isolate_pages(unsigned long nr_to_scan,
44 unsigned long *scanned, int order, 41 unsigned long *scanned, int order,
45 int mode, struct zone *z, 42 int mode, struct zone *z,
46 struct mem_cgroup *mem_cont, 43 struct mem_cgroup *mem_cont,
47 int active); 44 int active, int file);
48extern void mem_cgroup_out_of_memory(struct mem_cgroup *mem, gfp_t gfp_mask); 45extern void mem_cgroup_out_of_memory(struct mem_cgroup *mem, gfp_t gfp_mask);
49int task_in_mem_cgroup(struct task_struct *task, const struct mem_cgroup *mem); 46int task_in_mem_cgroup(struct task_struct *task, const struct mem_cgroup *mem);
50 47
@@ -69,21 +66,11 @@ extern void mem_cgroup_note_reclaim_priority(struct mem_cgroup *mem,
69extern void mem_cgroup_record_reclaim_priority(struct mem_cgroup *mem, 66extern void mem_cgroup_record_reclaim_priority(struct mem_cgroup *mem,
70 int priority); 67 int priority);
71 68
72extern long mem_cgroup_calc_reclaim_active(struct mem_cgroup *mem, 69extern long mem_cgroup_calc_reclaim(struct mem_cgroup *mem, struct zone *zone,
73 struct zone *zone, int priority); 70 int priority, enum lru_list lru);
74extern long mem_cgroup_calc_reclaim_inactive(struct mem_cgroup *mem,
75 struct zone *zone, int priority);
76
77#else /* CONFIG_CGROUP_MEM_RES_CTLR */
78static inline void page_reset_bad_cgroup(struct page *page)
79{
80}
81 71
82static inline struct page_cgroup *page_get_page_cgroup(struct page *page)
83{
84 return NULL;
85}
86 72
73#else /* CONFIG_CGROUP_MEM_RES_CTLR */
87static inline int mem_cgroup_charge(struct page *page, 74static inline int mem_cgroup_charge(struct page *page,
88 struct mm_struct *mm, gfp_t gfp_mask) 75 struct mm_struct *mm, gfp_t gfp_mask)
89{ 76{
@@ -159,14 +146,9 @@ static inline void mem_cgroup_record_reclaim_priority(struct mem_cgroup *mem,
159{ 146{
160} 147}
161 148
162static inline long mem_cgroup_calc_reclaim_active(struct mem_cgroup *mem, 149static inline long mem_cgroup_calc_reclaim(struct mem_cgroup *mem,
163 struct zone *zone, int priority) 150 struct zone *zone, int priority,
164{ 151 enum lru_list lru)
165 return 0;
166}
167
168static inline long mem_cgroup_calc_reclaim_inactive(struct mem_cgroup *mem,
169 struct zone *zone, int priority)
170{ 152{
171 return 0; 153 return 0;
172} 154}
diff --git a/include/linux/mfd/da903x.h b/include/linux/mfd/da903x.h
new file mode 100644
index 000000000000..cad314c12439
--- /dev/null
+++ b/include/linux/mfd/da903x.h
@@ -0,0 +1,201 @@
1#ifndef __LINUX_PMIC_DA903X_H
2#define __LINUX_PMIC_DA903X_H
3
4/* Unified sub device IDs for DA9030/DA9034 */
5enum {
6 DA9030_ID_LED_1,
7 DA9030_ID_LED_2,
8 DA9030_ID_LED_3,
9 DA9030_ID_LED_4,
10 DA9030_ID_LED_PC,
11 DA9030_ID_VIBRA,
12 DA9030_ID_WLED,
13 DA9030_ID_BUCK1,
14 DA9030_ID_BUCK2,
15 DA9030_ID_LDO1,
16 DA9030_ID_LDO2,
17 DA9030_ID_LDO3,
18 DA9030_ID_LDO4,
19 DA9030_ID_LDO5,
20 DA9030_ID_LDO6,
21 DA9030_ID_LDO7,
22 DA9030_ID_LDO8,
23 DA9030_ID_LDO9,
24 DA9030_ID_LDO10,
25 DA9030_ID_LDO11,
26 DA9030_ID_LDO12,
27 DA9030_ID_LDO13,
28 DA9030_ID_LDO14,
29 DA9030_ID_LDO15,
30 DA9030_ID_LDO16,
31 DA9030_ID_LDO17,
32 DA9030_ID_LDO18,
33 DA9030_ID_LDO19,
34 DA9030_ID_LDO_INT, /* LDO Internal */
35
36 DA9034_ID_LED_1,
37 DA9034_ID_LED_2,
38 DA9034_ID_VIBRA,
39 DA9034_ID_WLED,
40 DA9034_ID_TOUCH,
41
42 DA9034_ID_BUCK1,
43 DA9034_ID_BUCK2,
44 DA9034_ID_LDO1,
45 DA9034_ID_LDO2,
46 DA9034_ID_LDO3,
47 DA9034_ID_LDO4,
48 DA9034_ID_LDO5,
49 DA9034_ID_LDO6,
50 DA9034_ID_LDO7,
51 DA9034_ID_LDO8,
52 DA9034_ID_LDO9,
53 DA9034_ID_LDO10,
54 DA9034_ID_LDO11,
55 DA9034_ID_LDO12,
56 DA9034_ID_LDO13,
57 DA9034_ID_LDO14,
58 DA9034_ID_LDO15,
59};
60
61/*
62 * DA9030/DA9034 LEDs sub-devices uses generic "struct led_info"
63 * as the platform_data
64 */
65
66/* DA9030 flags for "struct led_info"
67 */
68#define DA9030_LED_RATE_ON (0 << 5)
69#define DA9030_LED_RATE_052S (1 << 5)
70#define DA9030_LED_DUTY_1_16 (0 << 3)
71#define DA9030_LED_DUTY_1_8 (1 << 3)
72#define DA9030_LED_DUTY_1_4 (2 << 3)
73#define DA9030_LED_DUTY_1_2 (3 << 3)
74
75#define DA9030_VIBRA_MODE_1P3V (0 << 1)
76#define DA9030_VIBRA_MODE_2P7V (1 << 1)
77#define DA9030_VIBRA_FREQ_1HZ (0 << 2)
78#define DA9030_VIBRA_FREQ_2HZ (1 << 2)
79#define DA9030_VIBRA_FREQ_4HZ (2 << 2)
80#define DA9030_VIBRA_FREQ_8HZ (3 << 2)
81#define DA9030_VIBRA_DUTY_ON (0 << 4)
82#define DA9030_VIBRA_DUTY_75P (1 << 4)
83#define DA9030_VIBRA_DUTY_50P (2 << 4)
84#define DA9030_VIBRA_DUTY_25P (3 << 4)
85
86/* DA9034 flags for "struct led_info" */
87#define DA9034_LED_RAMP (1 << 7)
88
89/* DA9034 touch screen platform data */
90struct da9034_touch_pdata {
91 int interval_ms; /* sampling interval while pen down */
92 int x_inverted;
93 int y_inverted;
94};
95
96struct da903x_subdev_info {
97 int id;
98 const char *name;
99 void *platform_data;
100};
101
102struct da903x_platform_data {
103 int num_subdevs;
104 struct da903x_subdev_info *subdevs;
105};
106
107/* bit definitions for DA9030 events */
108#define DA9030_EVENT_ONKEY (1 << 0)
109#define DA9030_EVENT_PWREN (1 << 1)
110#define DA9030_EVENT_EXTON (1 << 2)
111#define DA9030_EVENT_CHDET (1 << 3)
112#define DA9030_EVENT_TBAT (1 << 4)
113#define DA9030_EVENT_VBATMON (1 << 5)
114#define DA9030_EVENT_VBATMON_TXON (1 << 6)
115#define DA9030_EVENT_CHIOVER (1 << 7)
116#define DA9030_EVENT_TCTO (1 << 8)
117#define DA9030_EVENT_CCTO (1 << 9)
118#define DA9030_EVENT_ADC_READY (1 << 10)
119#define DA9030_EVENT_VBUS_4P4 (1 << 11)
120#define DA9030_EVENT_VBUS_4P0 (1 << 12)
121#define DA9030_EVENT_SESS_VALID (1 << 13)
122#define DA9030_EVENT_SRP_DETECT (1 << 14)
123#define DA9030_EVENT_WATCHDOG (1 << 15)
124#define DA9030_EVENT_LDO15 (1 << 16)
125#define DA9030_EVENT_LDO16 (1 << 17)
126#define DA9030_EVENT_LDO17 (1 << 18)
127#define DA9030_EVENT_LDO18 (1 << 19)
128#define DA9030_EVENT_LDO19 (1 << 20)
129#define DA9030_EVENT_BUCK2 (1 << 21)
130
131/* bit definitions for DA9034 events */
132#define DA9034_EVENT_ONKEY (1 << 0)
133#define DA9034_EVENT_EXTON (1 << 2)
134#define DA9034_EVENT_CHDET (1 << 3)
135#define DA9034_EVENT_TBAT (1 << 4)
136#define DA9034_EVENT_VBATMON (1 << 5)
137#define DA9034_EVENT_REV_IOVER (1 << 6)
138#define DA9034_EVENT_CH_IOVER (1 << 7)
139#define DA9034_EVENT_CH_TCTO (1 << 8)
140#define DA9034_EVENT_CH_CCTO (1 << 9)
141#define DA9034_EVENT_USB_DEV (1 << 10)
142#define DA9034_EVENT_OTGCP_IOVER (1 << 11)
143#define DA9034_EVENT_VBUS_4P55 (1 << 12)
144#define DA9034_EVENT_VBUS_3P8 (1 << 13)
145#define DA9034_EVENT_SESS_1P8 (1 << 14)
146#define DA9034_EVENT_SRP_READY (1 << 15)
147#define DA9034_EVENT_ADC_MAN (1 << 16)
148#define DA9034_EVENT_ADC_AUTO4 (1 << 17)
149#define DA9034_EVENT_ADC_AUTO5 (1 << 18)
150#define DA9034_EVENT_ADC_AUTO6 (1 << 19)
151#define DA9034_EVENT_PEN_DOWN (1 << 20)
152#define DA9034_EVENT_TSI_READY (1 << 21)
153#define DA9034_EVENT_UART_TX (1 << 22)
154#define DA9034_EVENT_UART_RX (1 << 23)
155#define DA9034_EVENT_HEADSET (1 << 25)
156#define DA9034_EVENT_HOOKSWITCH (1 << 26)
157#define DA9034_EVENT_WATCHDOG (1 << 27)
158
159extern int da903x_register_notifier(struct device *dev,
160 struct notifier_block *nb, unsigned int events);
161extern int da903x_unregister_notifier(struct device *dev,
162 struct notifier_block *nb, unsigned int events);
163
164/* Status Query Interface */
165#define DA9030_STATUS_ONKEY (1 << 0)
166#define DA9030_STATUS_PWREN1 (1 << 1)
167#define DA9030_STATUS_EXTON (1 << 2)
168#define DA9030_STATUS_CHDET (1 << 3)
169#define DA9030_STATUS_TBAT (1 << 4)
170#define DA9030_STATUS_VBATMON (1 << 5)
171#define DA9030_STATUS_VBATMON_TXON (1 << 6)
172#define DA9030_STATUS_MCLKDET (1 << 7)
173
174#define DA9034_STATUS_ONKEY (1 << 0)
175#define DA9034_STATUS_EXTON (1 << 2)
176#define DA9034_STATUS_CHDET (1 << 3)
177#define DA9034_STATUS_TBAT (1 << 4)
178#define DA9034_STATUS_VBATMON (1 << 5)
179#define DA9034_STATUS_PEN_DOWN (1 << 6)
180#define DA9034_STATUS_MCLKDET (1 << 7)
181#define DA9034_STATUS_USB_DEV (1 << 8)
182#define DA9034_STATUS_HEADSET (1 << 9)
183#define DA9034_STATUS_HOOKSWITCH (1 << 10)
184#define DA9034_STATUS_REMCON (1 << 11)
185#define DA9034_STATUS_VBUS_VALID_4P55 (1 << 12)
186#define DA9034_STATUS_VBUS_VALID_3P8 (1 << 13)
187#define DA9034_STATUS_SESS_VALID_1P8 (1 << 14)
188#define DA9034_STATUS_SRP_READY (1 << 15)
189
190extern int da903x_query_status(struct device *dev, unsigned int status);
191
192
193/* NOTE: the two functions below are not intended for use outside
194 * of the DA9034 sub-device drivers
195 */
196extern int da903x_write(struct device *dev, int reg, uint8_t val);
197extern int da903x_read(struct device *dev, int reg, uint8_t *val);
198extern int da903x_update(struct device *dev, int reg, uint8_t val, uint8_t mask);
199extern int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
200extern int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
201#endif /* __LINUX_PMIC_DA903X_H */
diff --git a/include/linux/mfd/t7l66xb.h b/include/linux/mfd/t7l66xb.h
index e83c7f2036f9..b4629818aea5 100644
--- a/include/linux/mfd/t7l66xb.h
+++ b/include/linux/mfd/t7l66xb.h
@@ -15,8 +15,6 @@
15#include <linux/mfd/tmio.h> 15#include <linux/mfd/tmio.h>
16 16
17struct t7l66xb_platform_data { 17struct t7l66xb_platform_data {
18 int (*enable_clk32k)(struct platform_device *dev);
19 void (*disable_clk32k)(struct platform_device *dev);
20 int (*enable)(struct platform_device *dev); 18 int (*enable)(struct platform_device *dev);
21 int (*disable)(struct platform_device *dev); 19 int (*disable)(struct platform_device *dev);
22 int (*suspend)(struct platform_device *dev); 20 int (*suspend)(struct platform_device *dev);
diff --git a/include/linux/mfd/tc6387xb.h b/include/linux/mfd/tc6387xb.h
index fa06e0610b8e..b4888209494a 100644
--- a/include/linux/mfd/tc6387xb.h
+++ b/include/linux/mfd/tc6387xb.h
@@ -11,9 +11,6 @@
11#define MFD_TC6387XB_H 11#define MFD_TC6387XB_H
12 12
13struct tc6387xb_platform_data { 13struct tc6387xb_platform_data {
14 int (*enable_clk32k)(struct platform_device *dev);
15 void (*disable_clk32k)(struct platform_device *dev);
16
17 int (*enable)(struct platform_device *dev); 14 int (*enable)(struct platform_device *dev);
18 int (*disable)(struct platform_device *dev); 15 int (*disable)(struct platform_device *dev);
19 int (*suspend)(struct platform_device *dev); 16 int (*suspend)(struct platform_device *dev);
diff --git a/include/linux/mfd/tc6393xb.h b/include/linux/mfd/tc6393xb.h
index fec7b3f7a81f..626e448205c5 100644
--- a/include/linux/mfd/tc6393xb.h
+++ b/include/linux/mfd/tc6393xb.h
@@ -17,12 +17,12 @@
17#ifndef MFD_TC6393XB_H 17#ifndef MFD_TC6393XB_H
18#define MFD_TC6393XB_H 18#define MFD_TC6393XB_H
19 19
20#include <linux/fb.h>
21
20/* Also one should provide the CK3P6MI clock */ 22/* Also one should provide the CK3P6MI clock */
21struct tc6393xb_platform_data { 23struct tc6393xb_platform_data {
22 u16 scr_pll2cr; /* PLL2 Control */ 24 u16 scr_pll2cr; /* PLL2 Control */
23 u16 scr_gper; /* GP Enable */ 25 u16 scr_gper; /* GP Enable */
24 u32 scr_gpo_doecr; /* GPO Data OE Control */
25 u32 scr_gpo_dsr; /* GPO Data Set */
26 26
27 int (*enable)(struct platform_device *dev); 27 int (*enable)(struct platform_device *dev);
28 int (*disable)(struct platform_device *dev); 28 int (*disable)(struct platform_device *dev);
@@ -31,15 +31,28 @@ struct tc6393xb_platform_data {
31 31
32 int irq_base; /* base for subdevice irqs */ 32 int irq_base; /* base for subdevice irqs */
33 int gpio_base; 33 int gpio_base;
34 int (*setup)(struct platform_device *dev);
35 void (*teardown)(struct platform_device *dev);
34 36
35 struct tmio_nand_data *nand_data; 37 struct tmio_nand_data *nand_data;
38 struct tmio_fb_data *fb_data;
39
40 unsigned resume_restore : 1; /* make special actions
41 to preserve the state
42 on suspend/resume */
36}; 43};
37 44
45extern int tc6393xb_lcd_mode(struct platform_device *fb,
46 const struct fb_videomode *mode);
47extern int tc6393xb_lcd_set_power(struct platform_device *fb, bool on);
48
38/* 49/*
39 * Relative to irq_base 50 * Relative to irq_base
40 */ 51 */
41#define IRQ_TC6393_NAND 0 52#define IRQ_TC6393_NAND 0
42#define IRQ_TC6393_MMC 1 53#define IRQ_TC6393_MMC 1
54#define IRQ_TC6393_OHCI 2
55#define IRQ_TC6393_FB 4
43 56
44#define TC6393XB_NR_IRQS 8 57#define TC6393XB_NR_IRQS 8
45 58
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index ec612e66391c..516d955ab8a1 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -1,6 +1,8 @@
1#ifndef MFD_TMIO_H 1#ifndef MFD_TMIO_H
2#define MFD_TMIO_H 2#define MFD_TMIO_H
3 3
4#include <linux/fb.h>
5
4#define tmio_ioread8(addr) readb(addr) 6#define tmio_ioread8(addr) readb(addr)
5#define tmio_ioread16(addr) readw(addr) 7#define tmio_ioread16(addr) readw(addr)
6#define tmio_ioread16_rep(r, b, l) readsw(r, b, l) 8#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
@@ -25,4 +27,21 @@ struct tmio_nand_data {
25 unsigned int num_partitions; 27 unsigned int num_partitions;
26}; 28};
27 29
30#define FBIO_TMIO_ACC_WRITE 0x7C639300
31#define FBIO_TMIO_ACC_SYNC 0x7C639301
32
33struct tmio_fb_data {
34 int (*lcd_set_power)(struct platform_device *fb_dev,
35 bool on);
36 int (*lcd_mode)(struct platform_device *fb_dev,
37 const struct fb_videomode *mode);
38 int num_modes;
39 struct fb_videomode *modes;
40
41 /* in mm: size of screen */
42 int height;
43 int width;
44};
45
46
28#endif 47#endif
diff --git a/include/linux/mfd/wm8350/audio.h b/include/linux/mfd/wm8350/audio.h
new file mode 100644
index 000000000000..217bb22ebb8e
--- /dev/null
+++ b/include/linux/mfd/wm8350/audio.h
@@ -0,0 +1,598 @@
1/*
2 * audio.h -- Audio Driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#ifndef __LINUX_MFD_WM8350_AUDIO_H_
14#define __LINUX_MFD_WM8350_AUDIO_H_
15
16#include <linux/platform_device.h>
17
18#define WM8350_CLOCK_CONTROL_1 0x28
19#define WM8350_CLOCK_CONTROL_2 0x29
20#define WM8350_FLL_CONTROL_1 0x2A
21#define WM8350_FLL_CONTROL_2 0x2B
22#define WM8350_FLL_CONTROL_3 0x2C
23#define WM8350_FLL_CONTROL_4 0x2D
24#define WM8350_DAC_CONTROL 0x30
25#define WM8350_DAC_DIGITAL_VOLUME_L 0x32
26#define WM8350_DAC_DIGITAL_VOLUME_R 0x33
27#define WM8350_DAC_LR_RATE 0x35
28#define WM8350_DAC_CLOCK_CONTROL 0x36
29#define WM8350_DAC_MUTE 0x3A
30#define WM8350_DAC_MUTE_VOLUME 0x3B
31#define WM8350_DAC_SIDE 0x3C
32#define WM8350_ADC_CONTROL 0x40
33#define WM8350_ADC_DIGITAL_VOLUME_L 0x42
34#define WM8350_ADC_DIGITAL_VOLUME_R 0x43
35#define WM8350_ADC_DIVIDER 0x44
36#define WM8350_ADC_LR_RATE 0x46
37#define WM8350_INPUT_CONTROL 0x48
38#define WM8350_IN3_INPUT_CONTROL 0x49
39#define WM8350_MIC_BIAS_CONTROL 0x4A
40#define WM8350_OUTPUT_CONTROL 0x4C
41#define WM8350_JACK_DETECT 0x4D
42#define WM8350_ANTI_POP_CONTROL 0x4E
43#define WM8350_LEFT_INPUT_VOLUME 0x50
44#define WM8350_RIGHT_INPUT_VOLUME 0x51
45#define WM8350_LEFT_MIXER_CONTROL 0x58
46#define WM8350_RIGHT_MIXER_CONTROL 0x59
47#define WM8350_OUT3_MIXER_CONTROL 0x5C
48#define WM8350_OUT4_MIXER_CONTROL 0x5D
49#define WM8350_OUTPUT_LEFT_MIXER_VOLUME 0x60
50#define WM8350_OUTPUT_RIGHT_MIXER_VOLUME 0x61
51#define WM8350_INPUT_MIXER_VOLUME_L 0x62
52#define WM8350_INPUT_MIXER_VOLUME_R 0x63
53#define WM8350_INPUT_MIXER_VOLUME 0x64
54#define WM8350_LOUT1_VOLUME 0x68
55#define WM8350_ROUT1_VOLUME 0x69
56#define WM8350_LOUT2_VOLUME 0x6A
57#define WM8350_ROUT2_VOLUME 0x6B
58#define WM8350_BEEP_VOLUME 0x6F
59#define WM8350_AI_FORMATING 0x70
60#define WM8350_ADC_DAC_COMP 0x71
61#define WM8350_AI_ADC_CONTROL 0x72
62#define WM8350_AI_DAC_CONTROL 0x73
63#define WM8350_AIF_TEST 0x74
64#define WM8350_JACK_PIN_STATUS 0xE7
65
66/* Bit values for R08 (0x08) */
67#define WM8350_CODEC_ISEL_1_5 0 /* x1.5 */
68#define WM8350_CODEC_ISEL_1_0 1 /* x1.0 */
69#define WM8350_CODEC_ISEL_0_75 2 /* x0.75 */
70#define WM8350_CODEC_ISEL_0_5 3 /* x0.5 */
71
72#define WM8350_VMID_OFF 0
73#define WM8350_VMID_500K 1
74#define WM8350_VMID_100K 2
75#define WM8350_VMID_10K 3
76
77/*
78 * R40 (0x28) - Clock Control 1
79 */
80#define WM8350_TOCLK_RATE 0x4000
81#define WM8350_MCLK_SEL 0x0800
82#define WM8350_MCLK_DIV_MASK 0x0100
83#define WM8350_BCLK_DIV_MASK 0x00F0
84#define WM8350_OPCLK_DIV_MASK 0x0007
85
86/*
87 * R41 (0x29) - Clock Control 2
88 */
89#define WM8350_LRC_ADC_SEL 0x8000
90#define WM8350_MCLK_DIR 0x0001
91
92/*
93 * R42 (0x2A) - FLL Control 1
94 */
95#define WM8350_FLL_DITHER_WIDTH_MASK 0x3000
96#define WM8350_FLL_DITHER_HP 0x0800
97#define WM8350_FLL_OUTDIV_MASK 0x0700
98#define WM8350_FLL_RSP_RATE_MASK 0x00F0
99#define WM8350_FLL_RATE_MASK 0x0007
100
101/*
102 * R43 (0x2B) - FLL Control 2
103 */
104#define WM8350_FLL_RATIO_MASK 0xF800
105#define WM8350_FLL_N_MASK 0x03FF
106
107/*
108 * R44 (0x2C) - FLL Control 3
109 */
110#define WM8350_FLL_K_MASK 0xFFFF
111
112/*
113 * R45 (0x2D) - FLL Control 4
114 */
115#define WM8350_FLL_FRAC 0x0020
116#define WM8350_FLL_SLOW_LOCK_REF 0x0010
117#define WM8350_FLL_CLK_SRC_MASK 0x0003
118
119/*
120 * R48 (0x30) - DAC Control
121 */
122#define WM8350_DAC_MONO 0x2000
123#define WM8350_AIF_LRCLKRATE 0x1000
124#define WM8350_DEEMP_MASK 0x0030
125#define WM8350_DACL_DATINV 0x0002
126#define WM8350_DACR_DATINV 0x0001
127
128/*
129 * R50 (0x32) - DAC Digital Volume L
130 */
131#define WM8350_DAC_VU 0x0100
132#define WM8350_DACL_VOL_MASK 0x00FF
133
134/*
135 * R51 (0x33) - DAC Digital Volume R
136 */
137#define WM8350_DAC_VU 0x0100
138#define WM8350_DACR_VOL_MASK 0x00FF
139
140/*
141 * R53 (0x35) - DAC LR Rate
142 */
143#define WM8350_DACLRC_ENA 0x0800
144#define WM8350_DACLRC_RATE_MASK 0x07FF
145
146/*
147 * R54 (0x36) - DAC Clock Control
148 */
149#define WM8350_DACCLK_POL 0x0010
150#define WM8350_DAC_CLKDIV_MASK 0x0007
151
152/*
153 * R58 (0x3A) - DAC Mute
154 */
155#define WM8350_DAC_MUTE_ENA 0x4000
156
157/*
158 * R59 (0x3B) - DAC Mute Volume
159 */
160#define WM8350_DAC_MUTEMODE 0x4000
161#define WM8350_DAC_MUTERATE 0x2000
162#define WM8350_DAC_SB_FILT 0x1000
163
164/*
165 * R60 (0x3C) - DAC Side
166 */
167#define WM8350_ADC_TO_DACL_MASK 0x3000
168#define WM8350_ADC_TO_DACR_MASK 0x0C00
169
170/*
171 * R64 (0x40) - ADC Control
172 */
173#define WM8350_ADC_HPF_CUT_MASK 0x0300
174#define WM8350_ADCL_DATINV 0x0002
175#define WM8350_ADCR_DATINV 0x0001
176
177/*
178 * R66 (0x42) - ADC Digital Volume L
179 */
180#define WM8350_ADC_VU 0x0100
181#define WM8350_ADCL_VOL_MASK 0x00FF
182
183/*
184 * R67 (0x43) - ADC Digital Volume R
185 */
186#define WM8350_ADC_VU 0x0100
187#define WM8350_ADCR_VOL_MASK 0x00FF
188
189/*
190 * R68 (0x44) - ADC Divider
191 */
192#define WM8350_ADCL_DAC_SVOL_MASK 0x0F00
193#define WM8350_ADCR_DAC_SVOL_MASK 0x00F0
194#define WM8350_ADCCLK_POL 0x0008
195#define WM8350_ADC_CLKDIV_MASK 0x0007
196
197/*
198 * R70 (0x46) - ADC LR Rate
199 */
200#define WM8350_ADCLRC_ENA 0x0800
201#define WM8350_ADCLRC_RATE_MASK 0x07FF
202
203/*
204 * R72 (0x48) - Input Control
205 */
206#define WM8350_IN2R_ENA 0x0400
207#define WM8350_IN1RN_ENA 0x0200
208#define WM8350_IN1RP_ENA 0x0100
209#define WM8350_IN2L_ENA 0x0004
210#define WM8350_IN1LN_ENA 0x0002
211#define WM8350_IN1LP_ENA 0x0001
212
213/*
214 * R73 (0x49) - IN3 Input Control
215 */
216#define WM8350_IN3R_SHORT 0x4000
217#define WM8350_IN3L_SHORT 0x0040
218
219/*
220 * R74 (0x4A) - Mic Bias Control
221 */
222#define WM8350_MICBSEL 0x4000
223#define WM8350_MCDTHR_MASK 0x001C
224#define WM8350_MCDSCTHR_MASK 0x0003
225
226/*
227 * R76 (0x4C) - Output Control
228 */
229#define WM8350_OUT4_VROI 0x0800
230#define WM8350_OUT3_VROI 0x0400
231#define WM8350_OUT2_VROI 0x0200
232#define WM8350_OUT1_VROI 0x0100
233#define WM8350_OUT2_FB 0x0004
234#define WM8350_OUT1_FB 0x0001
235
236/*
237 * R77 (0x4D) - Jack Detect
238 */
239#define WM8350_JDL_ENA 0x8000
240#define WM8350_JDR_ENA 0x4000
241
242/*
243 * R78 (0x4E) - Anti Pop Control
244 */
245#define WM8350_ANTI_POP_MASK 0x0300
246#define WM8350_DIS_OP_LN4_MASK 0x00C0
247#define WM8350_DIS_OP_LN3_MASK 0x0030
248#define WM8350_DIS_OP_OUT2_MASK 0x000C
249#define WM8350_DIS_OP_OUT1_MASK 0x0003
250
251/*
252 * R80 (0x50) - Left Input Volume
253 */
254#define WM8350_INL_MUTE 0x4000
255#define WM8350_INL_ZC 0x2000
256#define WM8350_IN_VU 0x0100
257#define WM8350_INL_VOL_MASK 0x00FC
258
259/*
260 * R81 (0x51) - Right Input Volume
261 */
262#define WM8350_INR_MUTE 0x4000
263#define WM8350_INR_ZC 0x2000
264#define WM8350_IN_VU 0x0100
265#define WM8350_INR_VOL_MASK 0x00FC
266
267/*
268 * R88 (0x58) - Left Mixer Control
269 */
270#define WM8350_DACR_TO_MIXOUTL 0x1000
271#define WM8350_DACL_TO_MIXOUTL 0x0800
272#define WM8350_IN3L_TO_MIXOUTL 0x0004
273#define WM8350_INR_TO_MIXOUTL 0x0002
274#define WM8350_INL_TO_MIXOUTL 0x0001
275
276/*
277 * R89 (0x59) - Right Mixer Control
278 */
279#define WM8350_DACR_TO_MIXOUTR 0x1000
280#define WM8350_DACL_TO_MIXOUTR 0x0800
281#define WM8350_IN3R_TO_MIXOUTR 0x0008
282#define WM8350_INR_TO_MIXOUTR 0x0002
283#define WM8350_INL_TO_MIXOUTR 0x0001
284
285/*
286 * R92 (0x5C) - OUT3 Mixer Control
287 */
288#define WM8350_DACL_TO_OUT3 0x0800
289#define WM8350_MIXINL_TO_OUT3 0x0100
290#define WM8350_OUT4_TO_OUT3 0x0008
291#define WM8350_MIXOUTL_TO_OUT3 0x0001
292
293/*
294 * R93 (0x5D) - OUT4 Mixer Control
295 */
296#define WM8350_DACR_TO_OUT4 0x1000
297#define WM8350_DACL_TO_OUT4 0x0800
298#define WM8350_OUT4_ATTN 0x0400
299#define WM8350_MIXINR_TO_OUT4 0x0200
300#define WM8350_OUT3_TO_OUT4 0x0004
301#define WM8350_MIXOUTR_TO_OUT4 0x0002
302#define WM8350_MIXOUTL_TO_OUT4 0x0001
303
304/*
305 * R96 (0x60) - Output Left Mixer Volume
306 */
307#define WM8350_IN3L_MIXOUTL_VOL_MASK 0x0E00
308#define WM8350_IN3L_MIXOUTL_VOL_SHIFT 9
309#define WM8350_INR_MIXOUTL_VOL_MASK 0x00E0
310#define WM8350_INR_MIXOUTL_VOL_SHIFT 5
311#define WM8350_INL_MIXOUTL_VOL_MASK 0x000E
312#define WM8350_INL_MIXOUTL_VOL_SHIFT 1
313
314/* Bit values for R96 (0x60) */
315#define WM8350_IN3L_MIXOUTL_VOL_OFF 0
316#define WM8350_IN3L_MIXOUTL_VOL_M12DB 1
317#define WM8350_IN3L_MIXOUTL_VOL_M9DB 2
318#define WM8350_IN3L_MIXOUTL_VOL_M6DB 3
319#define WM8350_IN3L_MIXOUTL_VOL_M3DB 4
320#define WM8350_IN3L_MIXOUTL_VOL_0DB 5
321#define WM8350_IN3L_MIXOUTL_VOL_3DB 6
322#define WM8350_IN3L_MIXOUTL_VOL_6DB 7
323
324#define WM8350_INR_MIXOUTL_VOL_OFF 0
325#define WM8350_INR_MIXOUTL_VOL_M12DB 1
326#define WM8350_INR_MIXOUTL_VOL_M9DB 2
327#define WM8350_INR_MIXOUTL_VOL_M6DB 3
328#define WM8350_INR_MIXOUTL_VOL_M3DB 4
329#define WM8350_INR_MIXOUTL_VOL_0DB 5
330#define WM8350_INR_MIXOUTL_VOL_3DB 6
331#define WM8350_INR_MIXOUTL_VOL_6DB 7
332
333#define WM8350_INL_MIXOUTL_VOL_OFF 0
334#define WM8350_INL_MIXOUTL_VOL_M12DB 1
335#define WM8350_INL_MIXOUTL_VOL_M9DB 2
336#define WM8350_INL_MIXOUTL_VOL_M6DB 3
337#define WM8350_INL_MIXOUTL_VOL_M3DB 4
338#define WM8350_INL_MIXOUTL_VOL_0DB 5
339#define WM8350_INL_MIXOUTL_VOL_3DB 6
340#define WM8350_INL_MIXOUTL_VOL_6DB 7
341
342/*
343 * R97 (0x61) - Output Right Mixer Volume
344 */
345#define WM8350_IN3R_MIXOUTR_VOL_MASK 0xE000
346#define WM8350_IN3R_MIXOUTR_VOL_SHIFT 13
347#define WM8350_INR_MIXOUTR_VOL_MASK 0x00E0
348#define WM8350_INR_MIXOUTR_VOL_SHIFT 5
349#define WM8350_INL_MIXOUTR_VOL_MASK 0x000E
350#define WM8350_INL_MIXOUTR_VOL_SHIFT 1
351
352/* Bit values for R96 (0x60) */
353#define WM8350_IN3R_MIXOUTR_VOL_OFF 0
354#define WM8350_IN3R_MIXOUTR_VOL_M12DB 1
355#define WM8350_IN3R_MIXOUTR_VOL_M9DB 2
356#define WM8350_IN3R_MIXOUTR_VOL_M6DB 3
357#define WM8350_IN3R_MIXOUTR_VOL_M3DB 4
358#define WM8350_IN3R_MIXOUTR_VOL_0DB 5
359#define WM8350_IN3R_MIXOUTR_VOL_3DB 6
360#define WM8350_IN3R_MIXOUTR_VOL_6DB 7
361
362#define WM8350_INR_MIXOUTR_VOL_OFF 0
363#define WM8350_INR_MIXOUTR_VOL_M12DB 1
364#define WM8350_INR_MIXOUTR_VOL_M9DB 2
365#define WM8350_INR_MIXOUTR_VOL_M6DB 3
366#define WM8350_INR_MIXOUTR_VOL_M3DB 4
367#define WM8350_INR_MIXOUTR_VOL_0DB 5
368#define WM8350_INR_MIXOUTR_VOL_3DB 6
369#define WM8350_INR_MIXOUTR_VOL_6DB 7
370
371#define WM8350_INL_MIXOUTR_VOL_OFF 0
372#define WM8350_INL_MIXOUTR_VOL_M12DB 1
373#define WM8350_INL_MIXOUTR_VOL_M9DB 2
374#define WM8350_INL_MIXOUTR_VOL_M6DB 3
375#define WM8350_INL_MIXOUTR_VOL_M3DB 4
376#define WM8350_INL_MIXOUTR_VOL_0DB 5
377#define WM8350_INL_MIXOUTR_VOL_3DB 6
378#define WM8350_INL_MIXOUTR_VOL_6DB 7
379
380/*
381 * R98 (0x62) - Input Mixer Volume L
382 */
383#define WM8350_IN3L_MIXINL_VOL_MASK 0x0E00
384#define WM8350_IN2L_MIXINL_VOL_MASK 0x000E
385#define WM8350_INL_MIXINL_VOL 0x0001
386
387/*
388 * R99 (0x63) - Input Mixer Volume R
389 */
390#define WM8350_IN3R_MIXINR_VOL_MASK 0xE000
391#define WM8350_IN2R_MIXINR_VOL_MASK 0x00E0
392#define WM8350_INR_MIXINR_VOL 0x0001
393
394/*
395 * R100 (0x64) - Input Mixer Volume
396 */
397#define WM8350_OUT4_MIXIN_DST 0x8000
398#define WM8350_OUT4_MIXIN_VOL_MASK 0x000E
399
400/*
401 * R104 (0x68) - LOUT1 Volume
402 */
403#define WM8350_OUT1L_MUTE 0x4000
404#define WM8350_OUT1L_ZC 0x2000
405#define WM8350_OUT1_VU 0x0100
406#define WM8350_OUT1L_VOL_MASK 0x00FC
407#define WM8350_OUT1L_VOL_SHIFT 2
408
409/*
410 * R105 (0x69) - ROUT1 Volume
411 */
412#define WM8350_OUT1R_MUTE 0x4000
413#define WM8350_OUT1R_ZC 0x2000
414#define WM8350_OUT1_VU 0x0100
415#define WM8350_OUT1R_VOL_MASK 0x00FC
416#define WM8350_OUT1R_VOL_SHIFT 2
417
418/*
419 * R106 (0x6A) - LOUT2 Volume
420 */
421#define WM8350_OUT2L_MUTE 0x4000
422#define WM8350_OUT2L_ZC 0x2000
423#define WM8350_OUT2_VU 0x0100
424#define WM8350_OUT2L_VOL_MASK 0x00FC
425
426/*
427 * R107 (0x6B) - ROUT2 Volume
428 */
429#define WM8350_OUT2R_MUTE 0x4000
430#define WM8350_OUT2R_ZC 0x2000
431#define WM8350_OUT2R_INV 0x0400
432#define WM8350_OUT2R_INV_MUTE 0x0200
433#define WM8350_OUT2_VU 0x0100
434#define WM8350_OUT2R_VOL_MASK 0x00FC
435
436/*
437 * R111 (0x6F) - BEEP Volume
438 */
439#define WM8350_IN3R_OUT2R_VOL_MASK 0x00E0
440
441/*
442 * R112 (0x70) - AI Formating
443 */
444#define WM8350_AIF_BCLK_INV 0x8000
445#define WM8350_AIF_TRI 0x2000
446#define WM8350_AIF_LRCLK_INV 0x1000
447#define WM8350_AIF_WL_MASK 0x0C00
448#define WM8350_AIF_FMT_MASK 0x0300
449
450/*
451 * R113 (0x71) - ADC DAC COMP
452 */
453#define WM8350_DAC_COMP 0x0080
454#define WM8350_DAC_COMPMODE 0x0040
455#define WM8350_ADC_COMP 0x0020
456#define WM8350_ADC_COMPMODE 0x0010
457#define WM8350_LOOPBACK 0x0001
458
459/*
460 * R114 (0x72) - AI ADC Control
461 */
462#define WM8350_AIFADC_PD 0x0080
463#define WM8350_AIFADCL_SRC 0x0040
464#define WM8350_AIFADCR_SRC 0x0020
465#define WM8350_AIFADC_TDM_CHAN 0x0010
466#define WM8350_AIFADC_TDM 0x0008
467
468/*
469 * R115 (0x73) - AI DAC Control
470 */
471#define WM8350_BCLK_MSTR 0x4000
472#define WM8350_AIFDAC_PD 0x0080
473#define WM8350_DACL_SRC 0x0040
474#define WM8350_DACR_SRC 0x0020
475#define WM8350_AIFDAC_TDM_CHAN 0x0010
476#define WM8350_AIFDAC_TDM 0x0008
477#define WM8350_DAC_BOOST_MASK 0x0003
478
479/*
480 * R116 (0x74) - AIF Test
481 */
482#define WM8350_CODEC_BYP 0x4000
483#define WM8350_AIFADC_WR_TST 0x2000
484#define WM8350_AIFADC_RD_TST 0x1000
485#define WM8350_AIFDAC_WR_TST 0x0800
486#define WM8350_AIFDAC_RD_TST 0x0400
487#define WM8350_AIFADC_ASYN 0x0020
488#define WM8350_AIFDAC_ASYN 0x0010
489
490/*
491 * R231 (0xE7) - Jack Status
492 */
493#define WM8350_JACK_R_LVL 0x0400
494
495/*
496 * WM8350 Platform setup
497 */
498#define WM8350_S_CURVE_NONE 0x0
499#define WM8350_S_CURVE_FAST 0x1
500#define WM8350_S_CURVE_MEDIUM 0x2
501#define WM8350_S_CURVE_SLOW 0x3
502
503#define WM8350_DISCHARGE_OFF 0x0
504#define WM8350_DISCHARGE_FAST 0x1
505#define WM8350_DISCHARGE_MEDIUM 0x2
506#define WM8350_DISCHARGE_SLOW 0x3
507
508#define WM8350_TIE_OFF_500R 0x0
509#define WM8350_TIE_OFF_30K 0x1
510
511/*
512 * Clock sources & directions
513 */
514#define WM8350_SYSCLK 0
515
516#define WM8350_MCLK_SEL_PLL_MCLK 0
517#define WM8350_MCLK_SEL_PLL_DAC 1
518#define WM8350_MCLK_SEL_PLL_ADC 2
519#define WM8350_MCLK_SEL_PLL_32K 3
520#define WM8350_MCLK_SEL_MCLK 5
521
522#define WM8350_MCLK_DIR_OUT 0
523#define WM8350_MCLK_DIR_IN 1
524
525/* clock divider id's */
526#define WM8350_ADC_CLKDIV 0
527#define WM8350_DAC_CLKDIV 1
528#define WM8350_BCLK_CLKDIV 2
529#define WM8350_OPCLK_CLKDIV 3
530#define WM8350_TO_CLKDIV 4
531#define WM8350_SYS_CLKDIV 5
532#define WM8350_DACLR_CLKDIV 6
533#define WM8350_ADCLR_CLKDIV 7
534
535/* ADC clock dividers */
536#define WM8350_ADCDIV_1 0x0
537#define WM8350_ADCDIV_1_5 0x1
538#define WM8350_ADCDIV_2 0x2
539#define WM8350_ADCDIV_3 0x3
540#define WM8350_ADCDIV_4 0x4
541#define WM8350_ADCDIV_5_5 0x5
542#define WM8350_ADCDIV_6 0x6
543
544/* ADC clock dividers */
545#define WM8350_DACDIV_1 0x0
546#define WM8350_DACDIV_1_5 0x1
547#define WM8350_DACDIV_2 0x2
548#define WM8350_DACDIV_3 0x3
549#define WM8350_DACDIV_4 0x4
550#define WM8350_DACDIV_5_5 0x5
551#define WM8350_DACDIV_6 0x6
552
553/* BCLK clock dividers */
554#define WM8350_BCLK_DIV_1 (0x0 << 4)
555#define WM8350_BCLK_DIV_1_5 (0x1 << 4)
556#define WM8350_BCLK_DIV_2 (0x2 << 4)
557#define WM8350_BCLK_DIV_3 (0x3 << 4)
558#define WM8350_BCLK_DIV_4 (0x4 << 4)
559#define WM8350_BCLK_DIV_5_5 (0x5 << 4)
560#define WM8350_BCLK_DIV_6 (0x6 << 4)
561#define WM8350_BCLK_DIV_8 (0x7 << 4)
562#define WM8350_BCLK_DIV_11 (0x8 << 4)
563#define WM8350_BCLK_DIV_12 (0x9 << 4)
564#define WM8350_BCLK_DIV_16 (0xa << 4)
565#define WM8350_BCLK_DIV_22 (0xb << 4)
566#define WM8350_BCLK_DIV_24 (0xc << 4)
567#define WM8350_BCLK_DIV_32 (0xd << 4)
568#define WM8350_BCLK_DIV_44 (0xe << 4)
569#define WM8350_BCLK_DIV_48 (0xf << 4)
570
571/* Sys (MCLK) clock dividers */
572#define WM8350_MCLK_DIV_1 (0x0 << 8)
573#define WM8350_MCLK_DIV_2 (0x1 << 8)
574
575/* OP clock dividers */
576#define WM8350_OPCLK_DIV_1 0x0
577#define WM8350_OPCLK_DIV_2 0x1
578#define WM8350_OPCLK_DIV_3 0x2
579#define WM8350_OPCLK_DIV_4 0x3
580#define WM8350_OPCLK_DIV_5_5 0x4
581#define WM8350_OPCLK_DIV_6 0x5
582
583/* DAI ID */
584#define WM8350_HIFI_DAI 0
585
586/*
587 * Audio interrupts.
588 */
589#define WM8350_IRQ_CODEC_JCK_DET_L 39
590#define WM8350_IRQ_CODEC_JCK_DET_R 40
591#define WM8350_IRQ_CODEC_MICSCD 41
592#define WM8350_IRQ_CODEC_MICD 42
593
594struct wm8350_codec {
595 struct platform_device *pdev;
596};
597
598#endif
diff --git a/include/linux/mfd/wm8350/comparator.h b/include/linux/mfd/wm8350/comparator.h
new file mode 100644
index 000000000000..053788649452
--- /dev/null
+++ b/include/linux/mfd/wm8350/comparator.h
@@ -0,0 +1,167 @@
1/*
2 * comparator.h -- Comparator Aux ADC for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#ifndef __LINUX_MFD_WM8350_COMPARATOR_H_
13#define __LINUX_MFD_WM8350_COMPARATOR_H_
14
15/*
16 * Registers
17 */
18
19#define WM8350_DIGITISER_CONTROL_1 0x90
20#define WM8350_DIGITISER_CONTROL_2 0x91
21#define WM8350_AUX1_READBACK 0x98
22#define WM8350_AUX2_READBACK 0x99
23#define WM8350_AUX3_READBACK 0x9A
24#define WM8350_AUX4_READBACK 0x9B
25#define WM8350_CHIP_TEMP_READBACK 0x9F
26#define WM8350_GENERIC_COMPARATOR_CONTROL 0xA3
27#define WM8350_GENERIC_COMPARATOR_1 0xA4
28#define WM8350_GENERIC_COMPARATOR_2 0xA5
29#define WM8350_GENERIC_COMPARATOR_3 0xA6
30#define WM8350_GENERIC_COMPARATOR_4 0xA7
31
32/*
33 * R144 (0x90) - Digitiser Control (1)
34 */
35#define WM8350_AUXADC_CTC 0x4000
36#define WM8350_AUXADC_POLL 0x2000
37#define WM8350_AUXADC_HIB_MODE 0x1000
38#define WM8350_AUXADC_SEL8 0x0080
39#define WM8350_AUXADC_SEL7 0x0040
40#define WM8350_AUXADC_SEL6 0x0020
41#define WM8350_AUXADC_SEL5 0x0010
42#define WM8350_AUXADC_SEL4 0x0008
43#define WM8350_AUXADC_SEL3 0x0004
44#define WM8350_AUXADC_SEL2 0x0002
45#define WM8350_AUXADC_SEL1 0x0001
46
47/*
48 * R145 (0x91) - Digitiser Control (2)
49 */
50#define WM8350_AUXADC_MASKMODE_MASK 0x3000
51#define WM8350_AUXADC_CRATE_MASK 0x0700
52#define WM8350_AUXADC_CAL 0x0004
53#define WM8350_AUX_RBMODE 0x0002
54#define WM8350_AUXADC_WAIT 0x0001
55
56/*
57 * R152 (0x98) - AUX1 Readback
58 */
59#define WM8350_AUXADC_SCALE1_MASK 0x6000
60#define WM8350_AUXADC_REF1 0x1000
61#define WM8350_AUXADC_DATA1_MASK 0x0FFF
62
63/*
64 * R153 (0x99) - AUX2 Readback
65 */
66#define WM8350_AUXADC_SCALE2_MASK 0x6000
67#define WM8350_AUXADC_REF2 0x1000
68#define WM8350_AUXADC_DATA2_MASK 0x0FFF
69
70/*
71 * R154 (0x9A) - AUX3 Readback
72 */
73#define WM8350_AUXADC_SCALE3_MASK 0x6000
74#define WM8350_AUXADC_REF3 0x1000
75#define WM8350_AUXADC_DATA3_MASK 0x0FFF
76
77/*
78 * R155 (0x9B) - AUX4 Readback
79 */
80#define WM8350_AUXADC_SCALE4_MASK 0x6000
81#define WM8350_AUXADC_REF4 0x1000
82#define WM8350_AUXADC_DATA4_MASK 0x0FFF
83
84/*
85 * R156 (0x9C) - USB Voltage Readback
86 */
87#define WM8350_AUXADC_DATA_USB_MASK 0x0FFF
88
89/*
90 * R157 (0x9D) - LINE Voltage Readback
91 */
92#define WM8350_AUXADC_DATA_LINE_MASK 0x0FFF
93
94/*
95 * R158 (0x9E) - BATT Voltage Readback
96 */
97#define WM8350_AUXADC_DATA_BATT_MASK 0x0FFF
98
99/*
100 * R159 (0x9F) - Chip Temp Readback
101 */
102#define WM8350_AUXADC_DATA_CHIPTEMP_MASK 0x0FFF
103
104/*
105 * R163 (0xA3) - Generic Comparator Control
106 */
107#define WM8350_DCMP4_ENA 0x0008
108#define WM8350_DCMP3_ENA 0x0004
109#define WM8350_DCMP2_ENA 0x0002
110#define WM8350_DCMP1_ENA 0x0001
111
112/*
113 * R164 (0xA4) - Generic comparator 1
114 */
115#define WM8350_DCMP1_SRCSEL_MASK 0xE000
116#define WM8350_DCMP1_GT 0x1000
117#define WM8350_DCMP1_THR_MASK 0x0FFF
118
119/*
120 * R165 (0xA5) - Generic comparator 2
121 */
122#define WM8350_DCMP2_SRCSEL_MASK 0xE000
123#define WM8350_DCMP2_GT 0x1000
124#define WM8350_DCMP2_THR_MASK 0x0FFF
125
126/*
127 * R166 (0xA6) - Generic comparator 3
128 */
129#define WM8350_DCMP3_SRCSEL_MASK 0xE000
130#define WM8350_DCMP3_GT 0x1000
131#define WM8350_DCMP3_THR_MASK 0x0FFF
132
133/*
134 * R167 (0xA7) - Generic comparator 4
135 */
136#define WM8350_DCMP4_SRCSEL_MASK 0xE000
137#define WM8350_DCMP4_GT 0x1000
138#define WM8350_DCMP4_THR_MASK 0x0FFF
139
140/*
141 * Interrupts.
142 */
143#define WM8350_IRQ_AUXADC_DATARDY 16
144#define WM8350_IRQ_AUXADC_DCOMP4 17
145#define WM8350_IRQ_AUXADC_DCOMP3 18
146#define WM8350_IRQ_AUXADC_DCOMP2 19
147#define WM8350_IRQ_AUXADC_DCOMP1 20
148#define WM8350_IRQ_SYS_HYST_COMP_FAIL 21
149#define WM8350_IRQ_SYS_CHIP_GT115 22
150#define WM8350_IRQ_SYS_CHIP_GT140 23
151
152/*
153 * USB/2, LINE & BATT = ((VRTC * 2) / 4095)) * 10e6 uV
154 * Where VRTC = 2.7 V
155 */
156#define WM8350_AUX_COEFF 1319
157
158#define WM8350_AUXADC_AUX1 0
159#define WM8350_AUXADC_AUX2 1
160#define WM8350_AUXADC_AUX3 2
161#define WM8350_AUXADC_AUX4 3
162#define WM8350_AUXADC_USB 4
163#define WM8350_AUXADC_LINE 5
164#define WM8350_AUXADC_BATT 6
165#define WM8350_AUXADC_TEMP 7
166
167#endif
diff --git a/include/linux/mfd/wm8350/core.h b/include/linux/mfd/wm8350/core.h
new file mode 100644
index 000000000000..6ebf97f2a475
--- /dev/null
+++ b/include/linux/mfd/wm8350/core.h
@@ -0,0 +1,631 @@
1/*
2 * core.h -- Core Driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#ifndef __LINUX_MFD_WM8350_CORE_H_
14#define __LINUX_MFD_WM8350_CORE_H_
15
16#include <linux/kernel.h>
17#include <linux/mutex.h>
18#include <linux/workqueue.h>
19
20#include <linux/mfd/wm8350/audio.h>
21#include <linux/mfd/wm8350/gpio.h>
22#include <linux/mfd/wm8350/pmic.h>
23#include <linux/mfd/wm8350/rtc.h>
24#include <linux/mfd/wm8350/supply.h>
25#include <linux/mfd/wm8350/wdt.h>
26
27/*
28 * Register values.
29 */
30#define WM8350_RESET_ID 0x00
31#define WM8350_ID 0x01
32#define WM8350_SYSTEM_CONTROL_1 0x03
33#define WM8350_SYSTEM_CONTROL_2 0x04
34#define WM8350_SYSTEM_HIBERNATE 0x05
35#define WM8350_INTERFACE_CONTROL 0x06
36#define WM8350_POWER_MGMT_1 0x08
37#define WM8350_POWER_MGMT_2 0x09
38#define WM8350_POWER_MGMT_3 0x0A
39#define WM8350_POWER_MGMT_4 0x0B
40#define WM8350_POWER_MGMT_5 0x0C
41#define WM8350_POWER_MGMT_6 0x0D
42#define WM8350_POWER_MGMT_7 0x0E
43
44#define WM8350_SYSTEM_INTERRUPTS 0x18
45#define WM8350_INT_STATUS_1 0x19
46#define WM8350_INT_STATUS_2 0x1A
47#define WM8350_POWER_UP_INT_STATUS 0x1B
48#define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
49#define WM8350_OVER_CURRENT_INT_STATUS 0x1D
50#define WM8350_GPIO_INT_STATUS 0x1E
51#define WM8350_COMPARATOR_INT_STATUS 0x1F
52#define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
53#define WM8350_INT_STATUS_1_MASK 0x21
54#define WM8350_INT_STATUS_2_MASK 0x22
55#define WM8350_POWER_UP_INT_STATUS_MASK 0x23
56#define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
57#define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
58#define WM8350_GPIO_INT_STATUS_MASK 0x26
59#define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
60
61#define WM8350_MAX_REGISTER 0xFF
62
63/*
64 * Field Definitions.
65 */
66
67/*
68 * R0 (0x00) - Reset/ID
69 */
70#define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
71
72/*
73 * R1 (0x01) - ID
74 */
75#define WM8350_CHIP_REV_MASK 0x7000
76#define WM8350_CONF_STS_MASK 0x0C00
77#define WM8350_CUST_ID_MASK 0x00FF
78
79/*
80 * R3 (0x03) - System Control 1
81 */
82#define WM8350_CHIP_ON 0x8000
83#define WM8350_POWERCYCLE 0x2000
84#define WM8350_VCC_FAULT_OV 0x1000
85#define WM8350_REG_RSTB_TIME_MASK 0x0C00
86#define WM8350_BG_SLEEP 0x0200
87#define WM8350_MEM_VALID 0x0020
88#define WM8350_CHIP_SET_UP 0x0010
89#define WM8350_ON_DEB_T 0x0008
90#define WM8350_ON_POL 0x0002
91#define WM8350_IRQ_POL 0x0001
92
93/*
94 * R4 (0x04) - System Control 2
95 */
96#define WM8350_USB_SUSPEND_8MA 0x8000
97#define WM8350_USB_SUSPEND 0x4000
98#define WM8350_USB_MSTR 0x2000
99#define WM8350_USB_MSTR_SRC 0x1000
100#define WM8350_USB_500MA 0x0800
101#define WM8350_USB_NOLIM 0x0400
102
103/*
104 * R5 (0x05) - System Hibernate
105 */
106#define WM8350_HIBERNATE 0x8000
107#define WM8350_WDOG_HIB_MODE 0x0080
108#define WM8350_REG_HIB_STARTUP_SEQ 0x0040
109#define WM8350_REG_RESET_HIB_MODE 0x0020
110#define WM8350_RST_HIB_MODE 0x0010
111#define WM8350_IRQ_HIB_MODE 0x0008
112#define WM8350_MEMRST_HIB_MODE 0x0004
113#define WM8350_PCCOMP_HIB_MODE 0x0002
114#define WM8350_TEMPMON_HIB_MODE 0x0001
115
116/*
117 * R6 (0x06) - Interface Control
118 */
119#define WM8350_USE_DEV_PINS 0x8000
120#define WM8350_USE_DEV_PINS_MASK 0x8000
121#define WM8350_USE_DEV_PINS_SHIFT 15
122#define WM8350_DEV_ADDR_MASK 0x6000
123#define WM8350_DEV_ADDR_SHIFT 13
124#define WM8350_CONFIG_DONE 0x1000
125#define WM8350_CONFIG_DONE_MASK 0x1000
126#define WM8350_CONFIG_DONE_SHIFT 12
127#define WM8350_RECONFIG_AT_ON 0x0800
128#define WM8350_RECONFIG_AT_ON_MASK 0x0800
129#define WM8350_RECONFIG_AT_ON_SHIFT 11
130#define WM8350_AUTOINC 0x0200
131#define WM8350_AUTOINC_MASK 0x0200
132#define WM8350_AUTOINC_SHIFT 9
133#define WM8350_ARA 0x0100
134#define WM8350_ARA_MASK 0x0100
135#define WM8350_ARA_SHIFT 8
136#define WM8350_SPI_CFG 0x0008
137#define WM8350_SPI_CFG_MASK 0x0008
138#define WM8350_SPI_CFG_SHIFT 3
139#define WM8350_SPI_4WIRE 0x0004
140#define WM8350_SPI_4WIRE_MASK 0x0004
141#define WM8350_SPI_4WIRE_SHIFT 2
142#define WM8350_SPI_3WIRE 0x0002
143#define WM8350_SPI_3WIRE_MASK 0x0002
144#define WM8350_SPI_3WIRE_SHIFT 1
145
146/* Bit values for R06 (0x06) */
147#define WM8350_USE_DEV_PINS_PRIMARY 0
148#define WM8350_USE_DEV_PINS_DEV 1
149
150#define WM8350_DEV_ADDR_34 0
151#define WM8350_DEV_ADDR_36 1
152#define WM8350_DEV_ADDR_3C 2
153#define WM8350_DEV_ADDR_3E 3
154
155#define WM8350_CONFIG_DONE_OFF 0
156#define WM8350_CONFIG_DONE_DONE 1
157
158#define WM8350_RECONFIG_AT_ON_OFF 0
159#define WM8350_RECONFIG_AT_ON_ON 1
160
161#define WM8350_AUTOINC_OFF 0
162#define WM8350_AUTOINC_ON 1
163
164#define WM8350_ARA_OFF 0
165#define WM8350_ARA_ON 1
166
167#define WM8350_SPI_CFG_CMOS 0
168#define WM8350_SPI_CFG_OD 1
169
170#define WM8350_SPI_4WIRE_3WIRE 0
171#define WM8350_SPI_4WIRE_4WIRE 1
172
173#define WM8350_SPI_3WIRE_I2C 0
174#define WM8350_SPI_3WIRE_SPI 1
175
176/*
177 * R8 (0x08) - Power mgmt (1)
178 */
179#define WM8350_CODEC_ISEL_MASK 0xC000
180#define WM8350_VBUFEN 0x2000
181#define WM8350_OUTPUT_DRAIN_EN 0x0400
182#define WM8350_MIC_DET_ENA 0x0100
183#define WM8350_BIASEN 0x0020
184#define WM8350_MICBEN 0x0010
185#define WM8350_VMIDEN 0x0004
186#define WM8350_VMID_MASK 0x0003
187#define WM8350_VMID_SHIFT 0
188
189/*
190 * R9 (0x09) - Power mgmt (2)
191 */
192#define WM8350_IN3R_ENA 0x0800
193#define WM8350_IN3L_ENA 0x0400
194#define WM8350_INR_ENA 0x0200
195#define WM8350_INL_ENA 0x0100
196#define WM8350_MIXINR_ENA 0x0080
197#define WM8350_MIXINL_ENA 0x0040
198#define WM8350_OUT4_ENA 0x0020
199#define WM8350_OUT3_ENA 0x0010
200#define WM8350_MIXOUTR_ENA 0x0002
201#define WM8350_MIXOUTL_ENA 0x0001
202
203/*
204 * R10 (0x0A) - Power mgmt (3)
205 */
206#define WM8350_IN3R_TO_OUT2R 0x0080
207#define WM8350_OUT2R_ENA 0x0008
208#define WM8350_OUT2L_ENA 0x0004
209#define WM8350_OUT1R_ENA 0x0002
210#define WM8350_OUT1L_ENA 0x0001
211
212/*
213 * R11 (0x0B) - Power mgmt (4)
214 */
215#define WM8350_SYSCLK_ENA 0x4000
216#define WM8350_ADC_HPF_ENA 0x2000
217#define WM8350_FLL_ENA 0x0800
218#define WM8350_FLL_OSC_ENA 0x0400
219#define WM8350_TOCLK_ENA 0x0100
220#define WM8350_DACR_ENA 0x0020
221#define WM8350_DACL_ENA 0x0010
222#define WM8350_ADCR_ENA 0x0008
223#define WM8350_ADCL_ENA 0x0004
224
225/*
226 * R12 (0x0C) - Power mgmt (5)
227 */
228#define WM8350_CODEC_ENA 0x1000
229#define WM8350_RTC_TICK_ENA 0x0800
230#define WM8350_OSC32K_ENA 0x0400
231#define WM8350_CHG_ENA 0x0200
232#define WM8350_ACC_DET_ENA 0x0100
233#define WM8350_AUXADC_ENA 0x0080
234#define WM8350_DCMP4_ENA 0x0008
235#define WM8350_DCMP3_ENA 0x0004
236#define WM8350_DCMP2_ENA 0x0002
237#define WM8350_DCMP1_ENA 0x0001
238
239/*
240 * R13 (0x0D) - Power mgmt (6)
241 */
242#define WM8350_LS_ENA 0x8000
243#define WM8350_LDO4_ENA 0x0800
244#define WM8350_LDO3_ENA 0x0400
245#define WM8350_LDO2_ENA 0x0200
246#define WM8350_LDO1_ENA 0x0100
247#define WM8350_DC6_ENA 0x0020
248#define WM8350_DC5_ENA 0x0010
249#define WM8350_DC4_ENA 0x0008
250#define WM8350_DC3_ENA 0x0004
251#define WM8350_DC2_ENA 0x0002
252#define WM8350_DC1_ENA 0x0001
253
254/*
255 * R14 (0x0E) - Power mgmt (7)
256 */
257#define WM8350_CS2_ENA 0x0002
258#define WM8350_CS1_ENA 0x0001
259
260/*
261 * R24 (0x18) - System Interrupts
262 */
263#define WM8350_OC_INT 0x2000
264#define WM8350_UV_INT 0x1000
265#define WM8350_PUTO_INT 0x0800
266#define WM8350_CS_INT 0x0200
267#define WM8350_EXT_INT 0x0100
268#define WM8350_CODEC_INT 0x0080
269#define WM8350_GP_INT 0x0040
270#define WM8350_AUXADC_INT 0x0020
271#define WM8350_RTC_INT 0x0010
272#define WM8350_SYS_INT 0x0008
273#define WM8350_CHG_INT 0x0004
274#define WM8350_USB_INT 0x0002
275#define WM8350_WKUP_INT 0x0001
276
277/*
278 * R25 (0x19) - Interrupt Status 1
279 */
280#define WM8350_CHG_BAT_HOT_EINT 0x8000
281#define WM8350_CHG_BAT_COLD_EINT 0x4000
282#define WM8350_CHG_BAT_FAIL_EINT 0x2000
283#define WM8350_CHG_TO_EINT 0x1000
284#define WM8350_CHG_END_EINT 0x0800
285#define WM8350_CHG_START_EINT 0x0400
286#define WM8350_CHG_FAST_RDY_EINT 0x0200
287#define WM8350_RTC_PER_EINT 0x0080
288#define WM8350_RTC_SEC_EINT 0x0040
289#define WM8350_RTC_ALM_EINT 0x0020
290#define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
291#define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
292#define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
293
294/*
295 * R26 (0x1A) - Interrupt Status 2
296 */
297#define WM8350_CS1_EINT 0x2000
298#define WM8350_CS2_EINT 0x1000
299#define WM8350_USB_LIMIT_EINT 0x0400
300#define WM8350_AUXADC_DATARDY_EINT 0x0100
301#define WM8350_AUXADC_DCOMP4_EINT 0x0080
302#define WM8350_AUXADC_DCOMP3_EINT 0x0040
303#define WM8350_AUXADC_DCOMP2_EINT 0x0020
304#define WM8350_AUXADC_DCOMP1_EINT 0x0010
305#define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
306#define WM8350_SYS_CHIP_GT115_EINT 0x0004
307#define WM8350_SYS_CHIP_GT140_EINT 0x0002
308#define WM8350_SYS_WDOG_TO_EINT 0x0001
309
310/*
311 * R27 (0x1B) - Power Up Interrupt Status
312 */
313#define WM8350_PUTO_LDO4_EINT 0x0800
314#define WM8350_PUTO_LDO3_EINT 0x0400
315#define WM8350_PUTO_LDO2_EINT 0x0200
316#define WM8350_PUTO_LDO1_EINT 0x0100
317#define WM8350_PUTO_DC6_EINT 0x0020
318#define WM8350_PUTO_DC5_EINT 0x0010
319#define WM8350_PUTO_DC4_EINT 0x0008
320#define WM8350_PUTO_DC3_EINT 0x0004
321#define WM8350_PUTO_DC2_EINT 0x0002
322#define WM8350_PUTO_DC1_EINT 0x0001
323
324/*
325 * R28 (0x1C) - Under Voltage Interrupt status
326 */
327#define WM8350_UV_LDO4_EINT 0x0800
328#define WM8350_UV_LDO3_EINT 0x0400
329#define WM8350_UV_LDO2_EINT 0x0200
330#define WM8350_UV_LDO1_EINT 0x0100
331#define WM8350_UV_DC6_EINT 0x0020
332#define WM8350_UV_DC5_EINT 0x0010
333#define WM8350_UV_DC4_EINT 0x0008
334#define WM8350_UV_DC3_EINT 0x0004
335#define WM8350_UV_DC2_EINT 0x0002
336#define WM8350_UV_DC1_EINT 0x0001
337
338/*
339 * R29 (0x1D) - Over Current Interrupt status
340 */
341#define WM8350_OC_LS_EINT 0x8000
342
343/*
344 * R30 (0x1E) - GPIO Interrupt Status
345 */
346#define WM8350_GP12_EINT 0x1000
347#define WM8350_GP11_EINT 0x0800
348#define WM8350_GP10_EINT 0x0400
349#define WM8350_GP9_EINT 0x0200
350#define WM8350_GP8_EINT 0x0100
351#define WM8350_GP7_EINT 0x0080
352#define WM8350_GP6_EINT 0x0040
353#define WM8350_GP5_EINT 0x0020
354#define WM8350_GP4_EINT 0x0010
355#define WM8350_GP3_EINT 0x0008
356#define WM8350_GP2_EINT 0x0004
357#define WM8350_GP1_EINT 0x0002
358#define WM8350_GP0_EINT 0x0001
359
360/*
361 * R31 (0x1F) - Comparator Interrupt Status
362 */
363#define WM8350_EXT_USB_FB_EINT 0x8000
364#define WM8350_EXT_WALL_FB_EINT 0x4000
365#define WM8350_EXT_BAT_FB_EINT 0x2000
366#define WM8350_CODEC_JCK_DET_L_EINT 0x0800
367#define WM8350_CODEC_JCK_DET_R_EINT 0x0400
368#define WM8350_CODEC_MICSCD_EINT 0x0200
369#define WM8350_CODEC_MICD_EINT 0x0100
370#define WM8350_WKUP_OFF_STATE_EINT 0x0040
371#define WM8350_WKUP_HIB_STATE_EINT 0x0020
372#define WM8350_WKUP_CONV_FAULT_EINT 0x0010
373#define WM8350_WKUP_WDOG_RST_EINT 0x0008
374#define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
375#define WM8350_WKUP_ONKEY_EINT 0x0002
376#define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
377
378/*
379 * R32 (0x20) - System Interrupts Mask
380 */
381#define WM8350_IM_OC_INT 0x2000
382#define WM8350_IM_UV_INT 0x1000
383#define WM8350_IM_PUTO_INT 0x0800
384#define WM8350_IM_SPARE_INT 0x0400
385#define WM8350_IM_CS_INT 0x0200
386#define WM8350_IM_EXT_INT 0x0100
387#define WM8350_IM_CODEC_INT 0x0080
388#define WM8350_IM_GP_INT 0x0040
389#define WM8350_IM_AUXADC_INT 0x0020
390#define WM8350_IM_RTC_INT 0x0010
391#define WM8350_IM_SYS_INT 0x0008
392#define WM8350_IM_CHG_INT 0x0004
393#define WM8350_IM_USB_INT 0x0002
394#define WM8350_IM_WKUP_INT 0x0001
395
396/*
397 * R33 (0x21) - Interrupt Status 1 Mask
398 */
399#define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
400#define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
401#define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
402#define WM8350_IM_CHG_TO_EINT 0x1000
403#define WM8350_IM_CHG_END_EINT 0x0800
404#define WM8350_IM_CHG_START_EINT 0x0400
405#define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
406#define WM8350_IM_RTC_PER_EINT 0x0080
407#define WM8350_IM_RTC_SEC_EINT 0x0040
408#define WM8350_IM_RTC_ALM_EINT 0x0020
409#define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
410#define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
411#define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
412
413/*
414 * R34 (0x22) - Interrupt Status 2 Mask
415 */
416#define WM8350_IM_SPARE2_EINT 0x8000
417#define WM8350_IM_SPARE1_EINT 0x4000
418#define WM8350_IM_CS1_EINT 0x2000
419#define WM8350_IM_CS2_EINT 0x1000
420#define WM8350_IM_USB_LIMIT_EINT 0x0400
421#define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
422#define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
423#define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
424#define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
425#define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
426#define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
427#define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
428#define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
429#define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
430
431/*
432 * R35 (0x23) - Power Up Interrupt Status Mask
433 */
434#define WM8350_IM_PUTO_LDO4_EINT 0x0800
435#define WM8350_IM_PUTO_LDO3_EINT 0x0400
436#define WM8350_IM_PUTO_LDO2_EINT 0x0200
437#define WM8350_IM_PUTO_LDO1_EINT 0x0100
438#define WM8350_IM_PUTO_DC6_EINT 0x0020
439#define WM8350_IM_PUTO_DC5_EINT 0x0010
440#define WM8350_IM_PUTO_DC4_EINT 0x0008
441#define WM8350_IM_PUTO_DC3_EINT 0x0004
442#define WM8350_IM_PUTO_DC2_EINT 0x0002
443#define WM8350_IM_PUTO_DC1_EINT 0x0001
444
445/*
446 * R36 (0x24) - Under Voltage Interrupt status Mask
447 */
448#define WM8350_IM_UV_LDO4_EINT 0x0800
449#define WM8350_IM_UV_LDO3_EINT 0x0400
450#define WM8350_IM_UV_LDO2_EINT 0x0200
451#define WM8350_IM_UV_LDO1_EINT 0x0100
452#define WM8350_IM_UV_DC6_EINT 0x0020
453#define WM8350_IM_UV_DC5_EINT 0x0010
454#define WM8350_IM_UV_DC4_EINT 0x0008
455#define WM8350_IM_UV_DC3_EINT 0x0004
456#define WM8350_IM_UV_DC2_EINT 0x0002
457#define WM8350_IM_UV_DC1_EINT 0x0001
458
459/*
460 * R37 (0x25) - Over Current Interrupt status Mask
461 */
462#define WM8350_IM_OC_LS_EINT 0x8000
463
464/*
465 * R38 (0x26) - GPIO Interrupt Status Mask
466 */
467#define WM8350_IM_GP12_EINT 0x1000
468#define WM8350_IM_GP11_EINT 0x0800
469#define WM8350_IM_GP10_EINT 0x0400
470#define WM8350_IM_GP9_EINT 0x0200
471#define WM8350_IM_GP8_EINT 0x0100
472#define WM8350_IM_GP7_EINT 0x0080
473#define WM8350_IM_GP6_EINT 0x0040
474#define WM8350_IM_GP5_EINT 0x0020
475#define WM8350_IM_GP4_EINT 0x0010
476#define WM8350_IM_GP3_EINT 0x0008
477#define WM8350_IM_GP2_EINT 0x0004
478#define WM8350_IM_GP1_EINT 0x0002
479#define WM8350_IM_GP0_EINT 0x0001
480
481/*
482 * R39 (0x27) - Comparator Interrupt Status Mask
483 */
484#define WM8350_IM_EXT_USB_FB_EINT 0x8000
485#define WM8350_IM_EXT_WALL_FB_EINT 0x4000
486#define WM8350_IM_EXT_BAT_FB_EINT 0x2000
487#define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
488#define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
489#define WM8350_IM_CODEC_MICSCD_EINT 0x0200
490#define WM8350_IM_CODEC_MICD_EINT 0x0100
491#define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
492#define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
493#define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
494#define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
495#define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
496#define WM8350_IM_WKUP_ONKEY_EINT 0x0002
497#define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
498
499/*
500 * R220 (0xDC) - RAM BIST 1
501 */
502#define WM8350_READ_STATUS 0x0800
503#define WM8350_TSTRAM_CLK 0x0100
504#define WM8350_TSTRAM_CLK_ENA 0x0080
505#define WM8350_STARTSEQ 0x0040
506#define WM8350_READ_SRC 0x0020
507#define WM8350_COUNT_DIR 0x0010
508#define WM8350_TSTRAM_MODE_MASK 0x000E
509#define WM8350_TSTRAM_ENA 0x0001
510
511/*
512 * R225 (0xE1) - DCDC/LDO status
513 */
514#define WM8350_LS_STS 0x8000
515#define WM8350_LDO4_STS 0x0800
516#define WM8350_LDO3_STS 0x0400
517#define WM8350_LDO2_STS 0x0200
518#define WM8350_LDO1_STS 0x0100
519#define WM8350_DC6_STS 0x0020
520#define WM8350_DC5_STS 0x0010
521#define WM8350_DC4_STS 0x0008
522#define WM8350_DC3_STS 0x0004
523#define WM8350_DC2_STS 0x0002
524#define WM8350_DC1_STS 0x0001
525
526/* WM8350 wake up conditions */
527#define WM8350_IRQ_WKUP_OFF_STATE 43
528#define WM8350_IRQ_WKUP_HIB_STATE 44
529#define WM8350_IRQ_WKUP_CONV_FAULT 45
530#define WM8350_IRQ_WKUP_WDOG_RST 46
531#define WM8350_IRQ_WKUP_GP_PWR_ON 47
532#define WM8350_IRQ_WKUP_ONKEY 48
533#define WM8350_IRQ_WKUP_GP_WAKEUP 49
534
535/* wm8350 chip revisions */
536#define WM8350_REV_E 0x4
537#define WM8350_REV_F 0x5
538#define WM8350_REV_G 0x6
539
540#define WM8350_NUM_IRQ 63
541
542struct wm8350_reg_access {
543 u16 readable; /* Mask of readable bits */
544 u16 writable; /* Mask of writable bits */
545 u16 vol; /* Mask of volatile bits */
546};
547extern const struct wm8350_reg_access wm8350_reg_io_map[];
548extern const u16 wm8350_mode0_defaults[];
549extern const u16 wm8350_mode1_defaults[];
550extern const u16 wm8350_mode2_defaults[];
551extern const u16 wm8350_mode3_defaults[];
552
553struct wm8350;
554
555struct wm8350_irq {
556 void (*handler) (struct wm8350 *, int, void *);
557 void *data;
558};
559
560struct wm8350 {
561 int rev; /* chip revision */
562
563 struct device *dev;
564
565 /* device IO */
566 union {
567 struct i2c_client *i2c_client;
568 struct spi_device *spi_device;
569 };
570 int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
571 int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
572 void *src);
573 u16 *reg_cache;
574
575 /* Interrupt handling */
576 struct work_struct irq_work;
577 struct mutex irq_mutex; /* IRQ table mutex */
578 struct wm8350_irq irq[WM8350_NUM_IRQ];
579 int chip_irq;
580
581 /* Client devices */
582 struct wm8350_codec codec;
583 struct wm8350_gpio gpio;
584 struct wm8350_pmic pmic;
585 struct wm8350_power power;
586 struct wm8350_rtc rtc;
587 struct wm8350_wdt wdt;
588};
589
590/**
591 * Data to be supplied by the platform to initialise the WM8350.
592 *
593 * @init: Function called during driver initialisation. Should be
594 * used by the platform to configure GPIO functions and similar.
595 */
596struct wm8350_platform_data {
597 int (*init)(struct wm8350 *wm8350);
598};
599
600
601/*
602 * WM8350 device initialisation and exit.
603 */
604int wm8350_device_init(struct wm8350 *wm8350, int irq,
605 struct wm8350_platform_data *pdata);
606void wm8350_device_exit(struct wm8350 *wm8350);
607
608/*
609 * WM8350 device IO
610 */
611int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
612int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
613u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
614int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
615int wm8350_reg_lock(struct wm8350 *wm8350);
616int wm8350_reg_unlock(struct wm8350 *wm8350);
617int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
618int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
619
620/*
621 * WM8350 internal interrupts
622 */
623int wm8350_register_irq(struct wm8350 *wm8350, int irq,
624 void (*handler) (struct wm8350 *, int, void *),
625 void *data);
626int wm8350_free_irq(struct wm8350 *wm8350, int irq);
627int wm8350_mask_irq(struct wm8350 *wm8350, int irq);
628int wm8350_unmask_irq(struct wm8350 *wm8350, int irq);
629
630
631#endif
diff --git a/include/linux/mfd/wm8350/gpio.h b/include/linux/mfd/wm8350/gpio.h
new file mode 100644
index 000000000000..ed91e8f5d298
--- /dev/null
+++ b/include/linux/mfd/wm8350/gpio.h
@@ -0,0 +1,342 @@
1/*
2 * gpio.h -- GPIO Driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#ifndef __LINUX_MFD_WM8350_GPIO_H_
14#define __LINUX_MFD_WM8350_GPIO_H_
15
16#include <linux/platform_device.h>
17
18/*
19 * GPIO Registers.
20 */
21#define WM8350_GPIO_DEBOUNCE 0x80
22#define WM8350_GPIO_PIN_PULL_UP_CONTROL 0x81
23#define WM8350_GPIO_PULL_DOWN_CONTROL 0x82
24#define WM8350_GPIO_INT_MODE 0x83
25#define WM8350_GPIO_CONTROL 0x85
26#define WM8350_GPIO_CONFIGURATION_I_O 0x86
27#define WM8350_GPIO_PIN_POLARITY_TYPE 0x87
28#define WM8350_GPIO_FUNCTION_SELECT_1 0x8C
29#define WM8350_GPIO_FUNCTION_SELECT_2 0x8D
30#define WM8350_GPIO_FUNCTION_SELECT_3 0x8E
31#define WM8350_GPIO_FUNCTION_SELECT_4 0x8F
32
33/*
34 * GPIO Functions
35 */
36#define WM8350_GPIO0_GPIO_IN 0x0
37#define WM8350_GPIO0_GPIO_OUT 0x0
38#define WM8350_GPIO0_PWR_ON_IN 0x1
39#define WM8350_GPIO0_PWR_ON_OUT 0x1
40#define WM8350_GPIO0_LDO_EN_IN 0x2
41#define WM8350_GPIO0_VRTC_OUT 0x2
42#define WM8350_GPIO0_LPWR1_IN 0x3
43#define WM8350_GPIO0_POR_B_OUT 0x3
44
45#define WM8350_GPIO1_GPIO_IN 0x0
46#define WM8350_GPIO1_GPIO_OUT 0x0
47#define WM8350_GPIO1_PWR_ON_IN 0x1
48#define WM8350_GPIO1_DO_CONF_OUT 0x1
49#define WM8350_GPIO1_LDO_EN_IN 0x2
50#define WM8350_GPIO1_RESET_OUT 0x2
51#define WM8350_GPIO1_LPWR2_IN 0x3
52#define WM8350_GPIO1_MEMRST_OUT 0x3
53
54#define WM8350_GPIO2_GPIO_IN 0x0
55#define WM8350_GPIO2_GPIO_OUT 0x0
56#define WM8350_GPIO2_PWR_ON_IN 0x1
57#define WM8350_GPIO2_PWR_ON_OUT 0x1
58#define WM8350_GPIO2_WAKE_UP_IN 0x2
59#define WM8350_GPIO2_VRTC_OUT 0x2
60#define WM8350_GPIO2_32KHZ_IN 0x3
61#define WM8350_GPIO2_32KHZ_OUT 0x3
62
63#define WM8350_GPIO3_GPIO_IN 0x0
64#define WM8350_GPIO3_GPIO_OUT 0x0
65#define WM8350_GPIO3_PWR_ON_IN 0x1
66#define WM8350_GPIO3_P_CLK_OUT 0x1
67#define WM8350_GPIO3_LDO_EN_IN 0x2
68#define WM8350_GPIO3_VRTC_OUT 0x2
69#define WM8350_GPIO3_PWR_OFF_IN 0x3
70#define WM8350_GPIO3_32KHZ_OUT 0x3
71
72#define WM8350_GPIO4_GPIO_IN 0x0
73#define WM8350_GPIO4_GPIO_OUT 0x0
74#define WM8350_GPIO4_MR_IN 0x1
75#define WM8350_GPIO4_MEM_RST_OUT 0x1
76#define WM8350_GPIO4_FLASH_IN 0x2
77#define WM8350_GPIO4_ADA_OUT 0x2
78#define WM8350_GPIO4_HIBERNATE_IN 0x3
79#define WM8350_GPIO4_FLASH_OUT 0x3
80#define WM8350_GPIO4_MICDET_OUT 0x4
81#define WM8350_GPIO4_MICSHT_OUT 0x5
82
83#define WM8350_GPIO5_GPIO_IN 0x0
84#define WM8350_GPIO5_GPIO_OUT 0x0
85#define WM8350_GPIO5_LPWR1_IN 0x1
86#define WM8350_GPIO5_P_CLK_OUT 0x1
87#define WM8350_GPIO5_ADCLRCLK_IN 0x2
88#define WM8350_GPIO5_ADCLRCLK_OUT 0x2
89#define WM8350_GPIO5_HIBERNATE_IN 0x3
90#define WM8350_GPIO5_32KHZ_OUT 0x3
91#define WM8350_GPIO5_MICDET_OUT 0x4
92#define WM8350_GPIO5_MICSHT_OUT 0x5
93#define WM8350_GPIO5_ADA_OUT 0x6
94#define WM8350_GPIO5_OPCLK_OUT 0x7
95
96#define WM8350_GPIO6_GPIO_IN 0x0
97#define WM8350_GPIO6_GPIO_OUT 0x0
98#define WM8350_GPIO6_LPWR2_IN 0x1
99#define WM8350_GPIO6_MEMRST_OUT 0x1
100#define WM8350_GPIO6_FLASH_IN 0x2
101#define WM8350_GPIO6_ADA_OUT 0x2
102#define WM8350_GPIO6_HIBERNATE_IN 0x3
103#define WM8350_GPIO6_RTC_OUT 0x3
104#define WM8350_GPIO6_MICDET_OUT 0x4
105#define WM8350_GPIO6_MICSHT_OUT 0x5
106#define WM8350_GPIO6_ADCLRCLKB_OUT 0x6
107#define WM8350_GPIO6_SDOUT_OUT 0x7
108
109#define WM8350_GPIO7_GPIO_IN 0x0
110#define WM8350_GPIO7_GPIO_OUT 0x0
111#define WM8350_GPIO7_LPWR3_IN 0x1
112#define WM8350_GPIO7_P_CLK_OUT 0x1
113#define WM8350_GPIO7_MASK_IN 0x2
114#define WM8350_GPIO7_VCC_FAULT_OUT 0x2
115#define WM8350_GPIO7_HIBERNATE_IN 0x3
116#define WM8350_GPIO7_BATT_FAULT_OUT 0x3
117#define WM8350_GPIO7_MICDET_OUT 0x4
118#define WM8350_GPIO7_MICSHT_OUT 0x5
119#define WM8350_GPIO7_ADA_OUT 0x6
120#define WM8350_GPIO7_CSB_IN 0x7
121
122#define WM8350_GPIO8_GPIO_IN 0x0
123#define WM8350_GPIO8_GPIO_OUT 0x0
124#define WM8350_GPIO8_MR_IN 0x1
125#define WM8350_GPIO8_VCC_FAULT_OUT 0x1
126#define WM8350_GPIO8_ADCBCLK_IN 0x2
127#define WM8350_GPIO8_ADCBCLK_OUT 0x2
128#define WM8350_GPIO8_PWR_OFF_IN 0x3
129#define WM8350_GPIO8_BATT_FAULT_OUT 0x3
130#define WM8350_GPIO8_ALTSCL_IN 0xf
131
132#define WM8350_GPIO9_GPIO_IN 0x0
133#define WM8350_GPIO9_GPIO_OUT 0x0
134#define WM8350_GPIO9_HEARTBEAT_IN 0x1
135#define WM8350_GPIO9_VCC_FAULT_OUT 0x1
136#define WM8350_GPIO9_MASK_IN 0x2
137#define WM8350_GPIO9_LINE_GT_BATT_OUT 0x2
138#define WM8350_GPIO9_PWR_OFF_IN 0x3
139#define WM8350_GPIO9_BATT_FAULT_OUT 0x3
140#define WM8350_GPIO9_ALTSDA_OUT 0xf
141
142#define WM8350_GPIO10_GPIO_IN 0x0
143#define WM8350_GPIO10_GPIO_OUT 0x0
144#define WM8350_GPIO10_ISINKC_OUT 0x1
145#define WM8350_GPIO10_PWR_OFF_IN 0x2
146#define WM8350_GPIO10_LINE_GT_BATT_OUT 0x2
147#define WM8350_GPIO10_CHD_IND_IN 0x3
148
149#define WM8350_GPIO11_GPIO_IN 0x0
150#define WM8350_GPIO11_GPIO_OUT 0x0
151#define WM8350_GPIO11_ISINKD_OUT 0x1
152#define WM8350_GPIO11_WAKEUP_IN 0x2
153#define WM8350_GPIO11_LINE_GT_BATT_OUT 0x2
154#define WM8350_GPIO11_CHD_IND_IN 0x3
155
156#define WM8350_GPIO12_GPIO_IN 0x0
157#define WM8350_GPIO12_GPIO_OUT 0x0
158#define WM8350_GPIO12_ISINKE_OUT 0x1
159#define WM8350_GPIO12_LINE_GT_BATT_OUT 0x2
160#define WM8350_GPIO12_LINE_EN_OUT 0x3
161#define WM8350_GPIO12_32KHZ_OUT 0x4
162
163#define WM8350_GPIO_DIR_IN 0
164#define WM8350_GPIO_DIR_OUT 1
165#define WM8350_GPIO_ACTIVE_LOW 0
166#define WM8350_GPIO_ACTIVE_HIGH 1
167#define WM8350_GPIO_PULL_NONE 0
168#define WM8350_GPIO_PULL_UP 1
169#define WM8350_GPIO_PULL_DOWN 2
170#define WM8350_GPIO_INVERT_OFF 0
171#define WM8350_GPIO_INVERT_ON 1
172#define WM8350_GPIO_DEBOUNCE_OFF 0
173#define WM8350_GPIO_DEBOUNCE_ON 1
174
175/*
176 * R128 (0x80) - GPIO Debounce
177 */
178#define WM8350_GP12_DB 0x1000
179#define WM8350_GP11_DB 0x0800
180#define WM8350_GP10_DB 0x0400
181#define WM8350_GP9_DB 0x0200
182#define WM8350_GP8_DB 0x0100
183#define WM8350_GP7_DB 0x0080
184#define WM8350_GP6_DB 0x0040
185#define WM8350_GP5_DB 0x0020
186#define WM8350_GP4_DB 0x0010
187#define WM8350_GP3_DB 0x0008
188#define WM8350_GP2_DB 0x0004
189#define WM8350_GP1_DB 0x0002
190#define WM8350_GP0_DB 0x0001
191
192/*
193 * R129 (0x81) - GPIO Pin pull up Control
194 */
195#define WM8350_GP12_PU 0x1000
196#define WM8350_GP11_PU 0x0800
197#define WM8350_GP10_PU 0x0400
198#define WM8350_GP9_PU 0x0200
199#define WM8350_GP8_PU 0x0100
200#define WM8350_GP7_PU 0x0080
201#define WM8350_GP6_PU 0x0040
202#define WM8350_GP5_PU 0x0020
203#define WM8350_GP4_PU 0x0010
204#define WM8350_GP3_PU 0x0008
205#define WM8350_GP2_PU 0x0004
206#define WM8350_GP1_PU 0x0002
207#define WM8350_GP0_PU 0x0001
208
209/*
210 * R130 (0x82) - GPIO Pull down Control
211 */
212#define WM8350_GP12_PD 0x1000
213#define WM8350_GP11_PD 0x0800
214#define WM8350_GP10_PD 0x0400
215#define WM8350_GP9_PD 0x0200
216#define WM8350_GP8_PD 0x0100
217#define WM8350_GP7_PD 0x0080
218#define WM8350_GP6_PD 0x0040
219#define WM8350_GP5_PD 0x0020
220#define WM8350_GP4_PD 0x0010
221#define WM8350_GP3_PD 0x0008
222#define WM8350_GP2_PD 0x0004
223#define WM8350_GP1_PD 0x0002
224#define WM8350_GP0_PD 0x0001
225
226/*
227 * R131 (0x83) - GPIO Interrupt Mode
228 */
229#define WM8350_GP12_INTMODE 0x1000
230#define WM8350_GP11_INTMODE 0x0800
231#define WM8350_GP10_INTMODE 0x0400
232#define WM8350_GP9_INTMODE 0x0200
233#define WM8350_GP8_INTMODE 0x0100
234#define WM8350_GP7_INTMODE 0x0080
235#define WM8350_GP6_INTMODE 0x0040
236#define WM8350_GP5_INTMODE 0x0020
237#define WM8350_GP4_INTMODE 0x0010
238#define WM8350_GP3_INTMODE 0x0008
239#define WM8350_GP2_INTMODE 0x0004
240#define WM8350_GP1_INTMODE 0x0002
241#define WM8350_GP0_INTMODE 0x0001
242
243/*
244 * R133 (0x85) - GPIO Control
245 */
246#define WM8350_GP_DBTIME_MASK 0x00C0
247
248/*
249 * R134 (0x86) - GPIO Configuration (i/o)
250 */
251#define WM8350_GP12_DIR 0x1000
252#define WM8350_GP11_DIR 0x0800
253#define WM8350_GP10_DIR 0x0400
254#define WM8350_GP9_DIR 0x0200
255#define WM8350_GP8_DIR 0x0100
256#define WM8350_GP7_DIR 0x0080
257#define WM8350_GP6_DIR 0x0040
258#define WM8350_GP5_DIR 0x0020
259#define WM8350_GP4_DIR 0x0010
260#define WM8350_GP3_DIR 0x0008
261#define WM8350_GP2_DIR 0x0004
262#define WM8350_GP1_DIR 0x0002
263#define WM8350_GP0_DIR 0x0001
264
265/*
266 * R135 (0x87) - GPIO Pin Polarity / Type
267 */
268#define WM8350_GP12_CFG 0x1000
269#define WM8350_GP11_CFG 0x0800
270#define WM8350_GP10_CFG 0x0400
271#define WM8350_GP9_CFG 0x0200
272#define WM8350_GP8_CFG 0x0100
273#define WM8350_GP7_CFG 0x0080
274#define WM8350_GP6_CFG 0x0040
275#define WM8350_GP5_CFG 0x0020
276#define WM8350_GP4_CFG 0x0010
277#define WM8350_GP3_CFG 0x0008
278#define WM8350_GP2_CFG 0x0004
279#define WM8350_GP1_CFG 0x0002
280#define WM8350_GP0_CFG 0x0001
281
282/*
283 * R140 (0x8C) - GPIO Function Select 1
284 */
285#define WM8350_GP3_FN_MASK 0xF000
286#define WM8350_GP2_FN_MASK 0x0F00
287#define WM8350_GP1_FN_MASK 0x00F0
288#define WM8350_GP0_FN_MASK 0x000F
289
290/*
291 * R141 (0x8D) - GPIO Function Select 2
292 */
293#define WM8350_GP7_FN_MASK 0xF000
294#define WM8350_GP6_FN_MASK 0x0F00
295#define WM8350_GP5_FN_MASK 0x00F0
296#define WM8350_GP4_FN_MASK 0x000F
297
298/*
299 * R142 (0x8E) - GPIO Function Select 3
300 */
301#define WM8350_GP11_FN_MASK 0xF000
302#define WM8350_GP10_FN_MASK 0x0F00
303#define WM8350_GP9_FN_MASK 0x00F0
304#define WM8350_GP8_FN_MASK 0x000F
305
306/*
307 * R143 (0x8F) - GPIO Function Select 4
308 */
309#define WM8350_GP12_FN_MASK 0x000F
310
311/*
312 * R230 (0xE6) - GPIO Pin Status
313 */
314#define WM8350_GP12_LVL 0x1000
315#define WM8350_GP11_LVL 0x0800
316#define WM8350_GP10_LVL 0x0400
317#define WM8350_GP9_LVL 0x0200
318#define WM8350_GP8_LVL 0x0100
319#define WM8350_GP7_LVL 0x0080
320#define WM8350_GP6_LVL 0x0040
321#define WM8350_GP5_LVL 0x0020
322#define WM8350_GP4_LVL 0x0010
323#define WM8350_GP3_LVL 0x0008
324#define WM8350_GP2_LVL 0x0004
325#define WM8350_GP1_LVL 0x0002
326#define WM8350_GP0_LVL 0x0001
327
328struct wm8350;
329
330int wm8350_gpio_config(struct wm8350 *wm8350, int gpio, int dir, int func,
331 int pol, int pull, int invert, int debounce);
332
333struct wm8350_gpio {
334 struct platform_device *pdev;
335};
336
337/*
338 * GPIO Interrupts
339 */
340#define WM8350_IRQ_GPIO(x) (50 + x)
341
342#endif
diff --git a/include/linux/mfd/wm8350/pmic.h b/include/linux/mfd/wm8350/pmic.h
new file mode 100644
index 000000000000..69b69e07f62f
--- /dev/null
+++ b/include/linux/mfd/wm8350/pmic.h
@@ -0,0 +1,741 @@
1/*
2 * pmic.h -- Power Managment Driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#ifndef __LINUX_MFD_WM8350_PMIC_H
14#define __LINUX_MFD_WM8350_PMIC_H
15
16/*
17 * Register values.
18 */
19
20#define WM8350_CURRENT_SINK_DRIVER_A 0xAC
21#define WM8350_CSA_FLASH_CONTROL 0xAD
22#define WM8350_CURRENT_SINK_DRIVER_B 0xAE
23#define WM8350_CSB_FLASH_CONTROL 0xAF
24#define WM8350_DCDC_LDO_REQUESTED 0xB0
25#define WM8350_DCDC_ACTIVE_OPTIONS 0xB1
26#define WM8350_DCDC_SLEEP_OPTIONS 0xB2
27#define WM8350_POWER_CHECK_COMPARATOR 0xB3
28#define WM8350_DCDC1_CONTROL 0xB4
29#define WM8350_DCDC1_TIMEOUTS 0xB5
30#define WM8350_DCDC1_LOW_POWER 0xB6
31#define WM8350_DCDC2_CONTROL 0xB7
32#define WM8350_DCDC2_TIMEOUTS 0xB8
33#define WM8350_DCDC3_CONTROL 0xBA
34#define WM8350_DCDC3_TIMEOUTS 0xBB
35#define WM8350_DCDC3_LOW_POWER 0xBC
36#define WM8350_DCDC4_CONTROL 0xBD
37#define WM8350_DCDC4_TIMEOUTS 0xBE
38#define WM8350_DCDC4_LOW_POWER 0xBF
39#define WM8350_DCDC5_CONTROL 0xC0
40#define WM8350_DCDC5_TIMEOUTS 0xC1
41#define WM8350_DCDC6_CONTROL 0xC3
42#define WM8350_DCDC6_TIMEOUTS 0xC4
43#define WM8350_DCDC6_LOW_POWER 0xC5
44#define WM8350_LIMIT_SWITCH_CONTROL 0xC7
45#define WM8350_LDO1_CONTROL 0xC8
46#define WM8350_LDO1_TIMEOUTS 0xC9
47#define WM8350_LDO1_LOW_POWER 0xCA
48#define WM8350_LDO2_CONTROL 0xCB
49#define WM8350_LDO2_TIMEOUTS 0xCC
50#define WM8350_LDO2_LOW_POWER 0xCD
51#define WM8350_LDO3_CONTROL 0xCE
52#define WM8350_LDO3_TIMEOUTS 0xCF
53#define WM8350_LDO3_LOW_POWER 0xD0
54#define WM8350_LDO4_CONTROL 0xD1
55#define WM8350_LDO4_TIMEOUTS 0xD2
56#define WM8350_LDO4_LOW_POWER 0xD3
57#define WM8350_VCC_FAULT_MASKS 0xD7
58#define WM8350_MAIN_BANDGAP_CONTROL 0xD8
59#define WM8350_OSC_CONTROL 0xD9
60#define WM8350_RTC_TICK_CONTROL 0xDA
61#define WM8350_SECURITY 0xDB
62#define WM8350_RAM_BIST_1 0xDC
63#define WM8350_DCDC_LDO_STATUS 0xE1
64#define WM8350_GPIO_PIN_STATUS 0xE6
65
66#define WM8350_DCDC1_FORCE_PWM 0xF8
67#define WM8350_DCDC3_FORCE_PWM 0xFA
68#define WM8350_DCDC4_FORCE_PWM 0xFB
69#define WM8350_DCDC6_FORCE_PWM 0xFD
70
71/*
72 * R172 (0xAC) - Current Sink Driver A
73 */
74#define WM8350_CS1_HIB_MODE 0x1000
75#define WM8350_CS1_HIB_MODE_MASK 0x1000
76#define WM8350_CS1_HIB_MODE_SHIFT 12
77#define WM8350_CS1_ISEL_MASK 0x003F
78#define WM8350_CS1_ISEL_SHIFT 0
79
80/* Bit values for R172 (0xAC) */
81#define WM8350_CS1_HIB_MODE_DISABLE 0
82#define WM8350_CS1_HIB_MODE_LEAVE 1
83
84#define WM8350_CS1_ISEL_220M 0x3F
85
86/*
87 * R173 (0xAD) - CSA Flash control
88 */
89#define WM8350_CS1_FLASH_MODE 0x8000
90#define WM8350_CS1_TRIGSRC 0x4000
91#define WM8350_CS1_DRIVE 0x2000
92#define WM8350_CS1_FLASH_DUR_MASK 0x0300
93#define WM8350_CS1_OFF_RAMP_MASK 0x0030
94#define WM8350_CS1_ON_RAMP_MASK 0x0003
95
96/*
97 * R174 (0xAE) - Current Sink Driver B
98 */
99#define WM8350_CS2_HIB_MODE 0x1000
100#define WM8350_CS2_ISEL_MASK 0x003F
101
102/*
103 * R175 (0xAF) - CSB Flash control
104 */
105#define WM8350_CS2_FLASH_MODE 0x8000
106#define WM8350_CS2_TRIGSRC 0x4000
107#define WM8350_CS2_DRIVE 0x2000
108#define WM8350_CS2_FLASH_DUR_MASK 0x0300
109#define WM8350_CS2_OFF_RAMP_MASK 0x0030
110#define WM8350_CS2_ON_RAMP_MASK 0x0003
111
112/*
113 * R176 (0xB0) - DCDC/LDO requested
114 */
115#define WM8350_LS_ENA 0x8000
116#define WM8350_LDO4_ENA 0x0800
117#define WM8350_LDO3_ENA 0x0400
118#define WM8350_LDO2_ENA 0x0200
119#define WM8350_LDO1_ENA 0x0100
120#define WM8350_DC6_ENA 0x0020
121#define WM8350_DC5_ENA 0x0010
122#define WM8350_DC4_ENA 0x0008
123#define WM8350_DC3_ENA 0x0004
124#define WM8350_DC2_ENA 0x0002
125#define WM8350_DC1_ENA 0x0001
126
127/*
128 * R177 (0xB1) - DCDC Active options
129 */
130#define WM8350_PUTO_MASK 0x3000
131#define WM8350_PWRUP_DELAY_MASK 0x0300
132#define WM8350_DC6_ACTIVE 0x0020
133#define WM8350_DC4_ACTIVE 0x0008
134#define WM8350_DC3_ACTIVE 0x0004
135#define WM8350_DC1_ACTIVE 0x0001
136
137/*
138 * R178 (0xB2) - DCDC Sleep options
139 */
140#define WM8350_DC6_SLEEP 0x0020
141#define WM8350_DC4_SLEEP 0x0008
142#define WM8350_DC3_SLEEP 0x0004
143#define WM8350_DC1_SLEEP 0x0001
144
145/*
146 * R179 (0xB3) - Power-check comparator
147 */
148#define WM8350_PCCMP_ERRACT 0x4000
149#define WM8350_PCCMP_RAIL 0x0100
150#define WM8350_PCCMP_OFF_THR_MASK 0x0070
151#define WM8350_PCCMP_ON_THR_MASK 0x0007
152
153/*
154 * R180 (0xB4) - DCDC1 Control
155 */
156#define WM8350_DC1_OPFLT 0x0400
157#define WM8350_DC1_VSEL_MASK 0x007F
158#define WM8350_DC1_VSEL_SHIFT 0
159
160/*
161 * R181 (0xB5) - DCDC1 Timeouts
162 */
163#define WM8350_DC1_ERRACT_MASK 0xC000
164#define WM8350_DC1_ERRACT_SHIFT 14
165#define WM8350_DC1_ENSLOT_MASK 0x3C00
166#define WM8350_DC1_ENSLOT_SHIFT 10
167#define WM8350_DC1_SDSLOT_MASK 0x03C0
168#define WM8350_DC1_UVTO_MASK 0x0030
169#define WM8350_DC1_SDSLOT_SHIFT 6
170
171/* Bit values for R181 (0xB5) */
172#define WM8350_DC1_ERRACT_NONE 0
173#define WM8350_DC1_ERRACT_SHUTDOWN_CONV 1
174#define WM8350_DC1_ERRACT_SHUTDOWN_SYS 2
175
176/*
177 * R182 (0xB6) - DCDC1 Low Power
178 */
179#define WM8350_DC1_HIB_MODE_MASK 0x7000
180#define WM8350_DC1_HIB_TRIG_MASK 0x0300
181#define WM8350_DC1_VIMG_MASK 0x007F
182
183/*
184 * R183 (0xB7) - DCDC2 Control
185 */
186#define WM8350_DC2_MODE 0x4000
187#define WM8350_DC2_MODE_MASK 0x4000
188#define WM8350_DC2_MODE_SHIFT 14
189#define WM8350_DC2_HIB_MODE 0x1000
190#define WM8350_DC2_HIB_MODE_MASK 0x1000
191#define WM8350_DC2_HIB_MODE_SHIFT 12
192#define WM8350_DC2_HIB_TRIG_MASK 0x0300
193#define WM8350_DC2_HIB_TRIG_SHIFT 8
194#define WM8350_DC2_ILIM 0x0040
195#define WM8350_DC2_ILIM_MASK 0x0040
196#define WM8350_DC2_ILIM_SHIFT 6
197#define WM8350_DC2_RMP_MASK 0x0018
198#define WM8350_DC2_RMP_SHIFT 3
199#define WM8350_DC2_FBSRC_MASK 0x0003
200#define WM8350_DC2_FBSRC_SHIFT 0
201
202/* Bit values for R183 (0xB7) */
203#define WM8350_DC2_MODE_BOOST 0
204#define WM8350_DC2_MODE_SWITCH 1
205
206#define WM8350_DC2_HIB_MODE_ACTIVE 1
207#define WM8350_DC2_HIB_MODE_DISABLE 0
208
209#define WM8350_DC2_HIB_TRIG_NONE 0
210#define WM8350_DC2_HIB_TRIG_LPWR1 1
211#define WM8350_DC2_HIB_TRIG_LPWR2 2
212#define WM8350_DC2_HIB_TRIG_LPWR3 3
213
214#define WM8350_DC2_ILIM_HIGH 0
215#define WM8350_DC2_ILIM_LOW 1
216
217#define WM8350_DC2_RMP_30V 0
218#define WM8350_DC2_RMP_20V 1
219#define WM8350_DC2_RMP_10V 2
220#define WM8350_DC2_RMP_5V 3
221
222#define WM8350_DC2_FBSRC_FB2 0
223#define WM8350_DC2_FBSRC_ISINKA 1
224#define WM8350_DC2_FBSRC_ISINKB 2
225#define WM8350_DC2_FBSRC_USB 3
226
227/*
228 * R184 (0xB8) - DCDC2 Timeouts
229 */
230#define WM8350_DC2_ERRACT_MASK 0xC000
231#define WM8350_DC2_ERRACT_SHIFT 14
232#define WM8350_DC2_ENSLOT_MASK 0x3C00
233#define WM8350_DC2_ENSLOT_SHIFT 10
234#define WM8350_DC2_SDSLOT_MASK 0x03C0
235#define WM8350_DC2_UVTO_MASK 0x0030
236
237/* Bit values for R184 (0xB8) */
238#define WM8350_DC2_ERRACT_NONE 0
239#define WM8350_DC2_ERRACT_SHUTDOWN_CONV 1
240#define WM8350_DC2_ERRACT_SHUTDOWN_SYS 2
241
242/*
243 * R186 (0xBA) - DCDC3 Control
244 */
245#define WM8350_DC3_OPFLT 0x0400
246#define WM8350_DC3_VSEL_MASK 0x007F
247#define WM8350_DC3_VSEL_SHIFT 0
248
249/*
250 * R187 (0xBB) - DCDC3 Timeouts
251 */
252#define WM8350_DC3_ERRACT_MASK 0xC000
253#define WM8350_DC3_ERRACT_SHIFT 14
254#define WM8350_DC3_ENSLOT_MASK 0x3C00
255#define WM8350_DC3_ENSLOT_SHIFT 10
256#define WM8350_DC3_SDSLOT_MASK 0x03C0
257#define WM8350_DC3_UVTO_MASK 0x0030
258#define WM8350_DC3_SDSLOT_SHIFT 6
259
260/* Bit values for R187 (0xBB) */
261#define WM8350_DC3_ERRACT_NONE 0
262#define WM8350_DC3_ERRACT_SHUTDOWN_CONV 1
263#define WM8350_DC3_ERRACT_SHUTDOWN_SYS 2
264/*
265 * R188 (0xBC) - DCDC3 Low Power
266 */
267#define WM8350_DC3_HIB_MODE_MASK 0x7000
268#define WM8350_DC3_HIB_TRIG_MASK 0x0300
269#define WM8350_DC3_VIMG_MASK 0x007F
270
271/*
272 * R189 (0xBD) - DCDC4 Control
273 */
274#define WM8350_DC4_OPFLT 0x0400
275#define WM8350_DC4_VSEL_MASK 0x007F
276#define WM8350_DC4_VSEL_SHIFT 0
277
278/*
279 * R190 (0xBE) - DCDC4 Timeouts
280 */
281#define WM8350_DC4_ERRACT_MASK 0xC000
282#define WM8350_DC4_ERRACT_SHIFT 14
283#define WM8350_DC4_ENSLOT_MASK 0x3C00
284#define WM8350_DC4_ENSLOT_SHIFT 10
285#define WM8350_DC4_SDSLOT_MASK 0x03C0
286#define WM8350_DC4_UVTO_MASK 0x0030
287#define WM8350_DC4_SDSLOT_SHIFT 6
288
289/* Bit values for R190 (0xBE) */
290#define WM8350_DC4_ERRACT_NONE 0
291#define WM8350_DC4_ERRACT_SHUTDOWN_CONV 1
292#define WM8350_DC4_ERRACT_SHUTDOWN_SYS 2
293
294/*
295 * R191 (0xBF) - DCDC4 Low Power
296 */
297#define WM8350_DC4_HIB_MODE_MASK 0x7000
298#define WM8350_DC4_HIB_TRIG_MASK 0x0300
299#define WM8350_DC4_VIMG_MASK 0x007F
300
301/*
302 * R192 (0xC0) - DCDC5 Control
303 */
304#define WM8350_DC5_MODE 0x4000
305#define WM8350_DC5_MODE_MASK 0x4000
306#define WM8350_DC5_MODE_SHIFT 14
307#define WM8350_DC5_HIB_MODE 0x1000
308#define WM8350_DC5_HIB_MODE_MASK 0x1000
309#define WM8350_DC5_HIB_MODE_SHIFT 12
310#define WM8350_DC5_HIB_TRIG_MASK 0x0300
311#define WM8350_DC5_HIB_TRIG_SHIFT 8
312#define WM8350_DC5_ILIM 0x0040
313#define WM8350_DC5_ILIM_MASK 0x0040
314#define WM8350_DC5_ILIM_SHIFT 6
315#define WM8350_DC5_RMP_MASK 0x0018
316#define WM8350_DC5_RMP_SHIFT 3
317#define WM8350_DC5_FBSRC_MASK 0x0003
318#define WM8350_DC5_FBSRC_SHIFT 0
319
320/* Bit values for R192 (0xC0) */
321#define WM8350_DC5_MODE_BOOST 0
322#define WM8350_DC5_MODE_SWITCH 1
323
324#define WM8350_DC5_HIB_MODE_ACTIVE 1
325#define WM8350_DC5_HIB_MODE_DISABLE 0
326
327#define WM8350_DC5_HIB_TRIG_NONE 0
328#define WM8350_DC5_HIB_TRIG_LPWR1 1
329#define WM8350_DC5_HIB_TRIG_LPWR2 2
330#define WM8350_DC5_HIB_TRIG_LPWR3 3
331
332#define WM8350_DC5_ILIM_HIGH 0
333#define WM8350_DC5_ILIM_LOW 1
334
335#define WM8350_DC5_RMP_30V 0
336#define WM8350_DC5_RMP_20V 1
337#define WM8350_DC5_RMP_10V 2
338#define WM8350_DC5_RMP_5V 3
339
340#define WM8350_DC5_FBSRC_FB2 0
341#define WM8350_DC5_FBSRC_ISINKA 1
342#define WM8350_DC5_FBSRC_ISINKB 2
343#define WM8350_DC5_FBSRC_USB 3
344
345/*
346 * R193 (0xC1) - DCDC5 Timeouts
347 */
348#define WM8350_DC5_ERRACT_MASK 0xC000
349#define WM8350_DC5_ERRACT_SHIFT 14
350#define WM8350_DC5_ENSLOT_MASK 0x3C00
351#define WM8350_DC5_ENSLOT_SHIFT 10
352#define WM8350_DC5_SDSLOT_MASK 0x03C0
353#define WM8350_DC5_UVTO_MASK 0x0030
354#define WM8350_DC5_SDSLOT_SHIFT 6
355
356/* Bit values for R193 (0xC1) */
357#define WM8350_DC5_ERRACT_NONE 0
358#define WM8350_DC5_ERRACT_SHUTDOWN_CONV 1
359#define WM8350_DC5_ERRACT_SHUTDOWN_SYS 2
360
361/*
362 * R195 (0xC3) - DCDC6 Control
363 */
364#define WM8350_DC6_OPFLT 0x0400
365#define WM8350_DC6_VSEL_MASK 0x007F
366#define WM8350_DC6_VSEL_SHIFT 0
367
368/*
369 * R196 (0xC4) - DCDC6 Timeouts
370 */
371#define WM8350_DC6_ERRACT_MASK 0xC000
372#define WM8350_DC6_ERRACT_SHIFT 14
373#define WM8350_DC6_ENSLOT_MASK 0x3C00
374#define WM8350_DC6_ENSLOT_SHIFT 10
375#define WM8350_DC6_SDSLOT_MASK 0x03C0
376#define WM8350_DC6_UVTO_MASK 0x0030
377#define WM8350_DC6_SDSLOT_SHIFT 6
378
379/* Bit values for R196 (0xC4) */
380#define WM8350_DC6_ERRACT_NONE 0
381#define WM8350_DC6_ERRACT_SHUTDOWN_CONV 1
382#define WM8350_DC6_ERRACT_SHUTDOWN_SYS 2
383
384/*
385 * R197 (0xC5) - DCDC6 Low Power
386 */
387#define WM8350_DC6_HIB_MODE_MASK 0x7000
388#define WM8350_DC6_HIB_TRIG_MASK 0x0300
389#define WM8350_DC6_VIMG_MASK 0x007F
390
391/*
392 * R199 (0xC7) - Limit Switch Control
393 */
394#define WM8350_LS_ERRACT_MASK 0xC000
395#define WM8350_LS_ERRACT_SHIFT 14
396#define WM8350_LS_ENSLOT_MASK 0x3C00
397#define WM8350_LS_ENSLOT_SHIFT 10
398#define WM8350_LS_SDSLOT_MASK 0x03C0
399#define WM8350_LS_SDSLOT_SHIFT 6
400#define WM8350_LS_HIB_MODE 0x0010
401#define WM8350_LS_HIB_MODE_MASK 0x0010
402#define WM8350_LS_HIB_MODE_SHIFT 4
403#define WM8350_LS_HIB_PROT 0x0002
404#define WM8350_LS_HIB_PROT_MASK 0x0002
405#define WM8350_LS_HIB_PROT_SHIFT 1
406#define WM8350_LS_PROT 0x0001
407#define WM8350_LS_PROT_MASK 0x0001
408#define WM8350_LS_PROT_SHIFT 0
409
410/* Bit values for R199 (0xC7) */
411#define WM8350_LS_ERRACT_NONE 0
412#define WM8350_LS_ERRACT_SHUTDOWN_CONV 1
413#define WM8350_LS_ERRACT_SHUTDOWN_SYS 2
414
415/*
416 * R200 (0xC8) - LDO1 Control
417 */
418#define WM8350_LDO1_SWI 0x4000
419#define WM8350_LDO1_OPFLT 0x0400
420#define WM8350_LDO1_VSEL_MASK 0x001F
421#define WM8350_LDO1_VSEL_SHIFT 0
422
423/*
424 * R201 (0xC9) - LDO1 Timeouts
425 */
426#define WM8350_LDO1_ERRACT_MASK 0xC000
427#define WM8350_LDO1_ERRACT_SHIFT 14
428#define WM8350_LDO1_ENSLOT_MASK 0x3C00
429#define WM8350_LDO1_ENSLOT_SHIFT 10
430#define WM8350_LDO1_SDSLOT_MASK 0x03C0
431#define WM8350_LDO1_UVTO_MASK 0x0030
432#define WM8350_LDO1_SDSLOT_SHIFT 6
433
434/* Bit values for R201 (0xC9) */
435#define WM8350_LDO1_ERRACT_NONE 0
436#define WM8350_LDO1_ERRACT_SHUTDOWN_CONV 1
437#define WM8350_LDO1_ERRACT_SHUTDOWN_SYS 2
438
439/*
440 * R202 (0xCA) - LDO1 Low Power
441 */
442#define WM8350_LDO1_HIB_MODE_MASK 0x3000
443#define WM8350_LDO1_HIB_TRIG_MASK 0x0300
444#define WM8350_LDO1_VIMG_MASK 0x001F
445#define WM8350_LDO1_HIB_MODE_DIS (0x1 << 12)
446
447
448/*
449 * R203 (0xCB) - LDO2 Control
450 */
451#define WM8350_LDO2_SWI 0x4000
452#define WM8350_LDO2_OPFLT 0x0400
453#define WM8350_LDO2_VSEL_MASK 0x001F
454#define WM8350_LDO2_VSEL_SHIFT 0
455
456/*
457 * R204 (0xCC) - LDO2 Timeouts
458 */
459#define WM8350_LDO2_ERRACT_MASK 0xC000
460#define WM8350_LDO2_ERRACT_SHIFT 14
461#define WM8350_LDO2_ENSLOT_MASK 0x3C00
462#define WM8350_LDO2_ENSLOT_SHIFT 10
463#define WM8350_LDO2_SDSLOT_MASK 0x03C0
464#define WM8350_LDO2_SDSLOT_SHIFT 6
465
466/* Bit values for R204 (0xCC) */
467#define WM8350_LDO2_ERRACT_NONE 0
468#define WM8350_LDO2_ERRACT_SHUTDOWN_CONV 1
469#define WM8350_LDO2_ERRACT_SHUTDOWN_SYS 2
470
471/*
472 * R205 (0xCD) - LDO2 Low Power
473 */
474#define WM8350_LDO2_HIB_MODE_MASK 0x3000
475#define WM8350_LDO2_HIB_TRIG_MASK 0x0300
476#define WM8350_LDO2_VIMG_MASK 0x001F
477
478/*
479 * R206 (0xCE) - LDO3 Control
480 */
481#define WM8350_LDO3_SWI 0x4000
482#define WM8350_LDO3_OPFLT 0x0400
483#define WM8350_LDO3_VSEL_MASK 0x001F
484#define WM8350_LDO3_VSEL_SHIFT 0
485
486/*
487 * R207 (0xCF) - LDO3 Timeouts
488 */
489#define WM8350_LDO3_ERRACT_MASK 0xC000
490#define WM8350_LDO3_ERRACT_SHIFT 14
491#define WM8350_LDO3_ENSLOT_MASK 0x3C00
492#define WM8350_LDO3_ENSLOT_SHIFT 10
493#define WM8350_LDO3_SDSLOT_MASK 0x03C0
494#define WM8350_LDO3_UVTO_MASK 0x0030
495#define WM8350_LDO3_SDSLOT_SHIFT 6
496
497/* Bit values for R207 (0xCF) */
498#define WM8350_LDO3_ERRACT_NONE 0
499#define WM8350_LDO3_ERRACT_SHUTDOWN_CONV 1
500#define WM8350_LDO3_ERRACT_SHUTDOWN_SYS 2
501
502/*
503 * R208 (0xD0) - LDO3 Low Power
504 */
505#define WM8350_LDO3_HIB_MODE_MASK 0x3000
506#define WM8350_LDO3_HIB_TRIG_MASK 0x0300
507#define WM8350_LDO3_VIMG_MASK 0x001F
508
509/*
510 * R209 (0xD1) - LDO4 Control
511 */
512#define WM8350_LDO4_SWI 0x4000
513#define WM8350_LDO4_OPFLT 0x0400
514#define WM8350_LDO4_VSEL_MASK 0x001F
515#define WM8350_LDO4_VSEL_SHIFT 0
516
517/*
518 * R210 (0xD2) - LDO4 Timeouts
519 */
520#define WM8350_LDO4_ERRACT_MASK 0xC000
521#define WM8350_LDO4_ERRACT_SHIFT 14
522#define WM8350_LDO4_ENSLOT_MASK 0x3C00
523#define WM8350_LDO4_ENSLOT_SHIFT 10
524#define WM8350_LDO4_SDSLOT_MASK 0x03C0
525#define WM8350_LDO4_UVTO_MASK 0x0030
526#define WM8350_LDO4_SDSLOT_SHIFT 6
527
528/* Bit values for R210 (0xD2) */
529#define WM8350_LDO4_ERRACT_NONE 0
530#define WM8350_LDO4_ERRACT_SHUTDOWN_CONV 1
531#define WM8350_LDO4_ERRACT_SHUTDOWN_SYS 2
532
533/*
534 * R211 (0xD3) - LDO4 Low Power
535 */
536#define WM8350_LDO4_HIB_MODE_MASK 0x3000
537#define WM8350_LDO4_HIB_TRIG_MASK 0x0300
538#define WM8350_LDO4_VIMG_MASK 0x001F
539
540/*
541 * R215 (0xD7) - VCC_FAULT Masks
542 */
543#define WM8350_LS_FAULT 0x8000
544#define WM8350_LDO4_FAULT 0x0800
545#define WM8350_LDO3_FAULT 0x0400
546#define WM8350_LDO2_FAULT 0x0200
547#define WM8350_LDO1_FAULT 0x0100
548#define WM8350_DC6_FAULT 0x0020
549#define WM8350_DC5_FAULT 0x0010
550#define WM8350_DC4_FAULT 0x0008
551#define WM8350_DC3_FAULT 0x0004
552#define WM8350_DC2_FAULT 0x0002
553#define WM8350_DC1_FAULT 0x0001
554
555/*
556 * R216 (0xD8) - Main Bandgap Control
557 */
558#define WM8350_MBG_LOAD_FUSES 0x8000
559#define WM8350_MBG_FUSE_WPREP 0x4000
560#define WM8350_MBG_FUSE_WRITE 0x2000
561#define WM8350_MBG_FUSE_TRIM_MASK 0x1F00
562#define WM8350_MBG_TRIM_SRC 0x0020
563#define WM8350_MBG_USER_TRIM_MASK 0x001F
564
565/*
566 * R217 (0xD9) - OSC Control
567 */
568#define WM8350_OSC_LOAD_FUSES 0x8000
569#define WM8350_OSC_FUSE_WPREP 0x4000
570#define WM8350_OSC_FUSE_WRITE 0x2000
571#define WM8350_OSC_FUSE_TRIM_MASK 0x0F00
572#define WM8350_OSC_TRIM_SRC 0x0020
573#define WM8350_OSC_USER_TRIM_MASK 0x000F
574
575/*
576 * R248 (0xF8) - DCDC1 Force PWM
577 */
578#define WM8350_DCDC1_FORCE_PWM_ENA 0x0010
579
580/*
581 * R250 (0xFA) - DCDC3 Force PWM
582 */
583#define WM8350_DCDC3_FORCE_PWM_ENA 0x0010
584
585/*
586 * R251 (0xFB) - DCDC4 Force PWM
587 */
588#define WM8350_DCDC4_FORCE_PWM_ENA 0x0010
589
590/*
591 * R253 (0xFD) - DCDC1 Force PWM
592 */
593#define WM8350_DCDC6_FORCE_PWM_ENA 0x0010
594
595/*
596 * DCDC's
597 */
598#define WM8350_DCDC_1 0
599#define WM8350_DCDC_2 1
600#define WM8350_DCDC_3 2
601#define WM8350_DCDC_4 3
602#define WM8350_DCDC_5 4
603#define WM8350_DCDC_6 5
604
605/* DCDC modes */
606#define WM8350_DCDC_ACTIVE_STANDBY 0
607#define WM8350_DCDC_ACTIVE_PULSE 1
608#define WM8350_DCDC_SLEEP_NORMAL 0
609#define WM8350_DCDC_SLEEP_LOW 1
610
611/* DCDC Low power (Hibernate) mode */
612#define WM8350_DCDC_HIB_MODE_CUR (0 << 12)
613#define WM8350_DCDC_HIB_MODE_IMAGE (1 << 12)
614#define WM8350_DCDC_HIB_MODE_STANDBY (2 << 12)
615#define WM8350_DCDC_HIB_MODE_LDO (4 << 12)
616#define WM8350_DCDC_HIB_MODE_LDO_IM (5 << 12)
617#define WM8350_DCDC_HIB_MODE_DIS (7 << 12)
618#define WM8350_DCDC_HIB_MODE_MASK (7 << 12)
619
620/* DCDC Low Power (Hibernate) signal */
621#define WM8350_DCDC_HIB_SIG_REG (0 << 8)
622#define WM8350_DCDC_HIB_SIG_LPWR1 (1 << 8)
623#define WM8350_DCDC_HIB_SIG_LPWR2 (2 << 8)
624#define WM8350_DCDC_HIB_SIG_LPWR3 (3 << 8)
625
626/* LDO Low power (Hibernate) mode */
627#define WM8350_LDO_HIB_MODE_IMAGE (0 << 0)
628#define WM8350_LDO_HIB_MODE_DIS (1 << 0)
629
630/* LDO Low Power (Hibernate) signal */
631#define WM8350_LDO_HIB_SIG_REG (0 << 8)
632#define WM8350_LDO_HIB_SIG_LPWR1 (1 << 8)
633#define WM8350_LDO_HIB_SIG_LPWR2 (2 << 8)
634#define WM8350_LDO_HIB_SIG_LPWR3 (3 << 8)
635
636/*
637 * LDOs
638 */
639#define WM8350_LDO_1 6
640#define WM8350_LDO_2 7
641#define WM8350_LDO_3 8
642#define WM8350_LDO_4 9
643
644/*
645 * ISINKs
646 */
647#define WM8350_ISINK_A 10
648#define WM8350_ISINK_B 11
649
650#define WM8350_ISINK_MODE_BOOST 0
651#define WM8350_ISINK_MODE_SWITCH 1
652#define WM8350_ISINK_ILIM_NORMAL 0
653#define WM8350_ISINK_ILIM_LOW 1
654
655#define WM8350_ISINK_FLASH_DISABLE 0
656#define WM8350_ISINK_FLASH_ENABLE 1
657#define WM8350_ISINK_FLASH_TRIG_BIT 0
658#define WM8350_ISINK_FLASH_TRIG_GPIO 1
659#define WM8350_ISINK_FLASH_MODE_EN (1 << 13)
660#define WM8350_ISINK_FLASH_MODE_DIS (0 << 13)
661#define WM8350_ISINK_FLASH_DUR_32MS (0 << 8)
662#define WM8350_ISINK_FLASH_DUR_64MS (1 << 8)
663#define WM8350_ISINK_FLASH_DUR_96MS (2 << 8)
664#define WM8350_ISINK_FLASH_DUR_1024MS (3 << 8)
665#define WM8350_ISINK_FLASH_ON_INSTANT (0 << 4)
666#define WM8350_ISINK_FLASH_ON_0_25S (1 << 4)
667#define WM8350_ISINK_FLASH_ON_0_50S (2 << 4)
668#define WM8350_ISINK_FLASH_ON_1_00S (3 << 4)
669#define WM8350_ISINK_FLASH_ON_1_95S (1 << 4)
670#define WM8350_ISINK_FLASH_ON_3_91S (2 << 4)
671#define WM8350_ISINK_FLASH_ON_7_80S (3 << 4)
672#define WM8350_ISINK_FLASH_OFF_INSTANT (0 << 0)
673#define WM8350_ISINK_FLASH_OFF_0_25S (1 << 0)
674#define WM8350_ISINK_FLASH_OFF_0_50S (2 << 0)
675#define WM8350_ISINK_FLASH_OFF_1_00S (3 << 0)
676#define WM8350_ISINK_FLASH_OFF_1_95S (1 << 0)
677#define WM8350_ISINK_FLASH_OFF_3_91S (2 << 0)
678#define WM8350_ISINK_FLASH_OFF_7_80S (3 << 0)
679
680/*
681 * Regulator Interrupts.
682 */
683#define WM8350_IRQ_CS1 13
684#define WM8350_IRQ_CS2 14
685#define WM8350_IRQ_UV_LDO4 25
686#define WM8350_IRQ_UV_LDO3 26
687#define WM8350_IRQ_UV_LDO2 27
688#define WM8350_IRQ_UV_LDO1 28
689#define WM8350_IRQ_UV_DC6 29
690#define WM8350_IRQ_UV_DC5 30
691#define WM8350_IRQ_UV_DC4 31
692#define WM8350_IRQ_UV_DC3 32
693#define WM8350_IRQ_UV_DC2 33
694#define WM8350_IRQ_UV_DC1 34
695#define WM8350_IRQ_OC_LS 35
696
697#define NUM_WM8350_REGULATORS 12
698
699struct wm8350;
700struct platform_device;
701struct regulator_init_data;
702
703struct wm8350_pmic {
704 /* ISINK to DCDC mapping */
705 int isink_A_dcdc;
706 int isink_B_dcdc;
707
708 /* hibernate configs */
709 u16 dcdc1_hib_mode;
710 u16 dcdc3_hib_mode;
711 u16 dcdc4_hib_mode;
712 u16 dcdc6_hib_mode;
713
714 /* regulator devices */
715 struct platform_device *pdev[NUM_WM8350_REGULATORS];
716};
717
718int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
719 struct regulator_init_data *initdata);
720
721/*
722 * Additional DCDC control not supported via regulator API
723 */
724int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
725 u16 stop, u16 fault);
726int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
727 u16 ilim, u16 ramp, u16 feedback);
728
729/*
730 * Additional LDO control not supported via regulator API
731 */
732int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop);
733
734/*
735 * Additional ISINK control not supported via regulator API
736 */
737int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode,
738 u16 trigger, u16 duration, u16 on_ramp,
739 u16 off_ramp, u16 drive);
740
741#endif
diff --git a/include/linux/mfd/wm8350/rtc.h b/include/linux/mfd/wm8350/rtc.h
new file mode 100644
index 000000000000..dfda69e9f440
--- /dev/null
+++ b/include/linux/mfd/wm8350/rtc.h
@@ -0,0 +1,266 @@
1/*
2 * rtc.h -- RTC driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#ifndef __LINUX_MFD_WM8350_RTC_H
13#define __LINUX_MFD_WM8350_RTC_H
14
15#include <linux/platform_device.h>
16
17/*
18 * Register values.
19 */
20#define WM8350_RTC_SECONDS_MINUTES 0x10
21#define WM8350_RTC_HOURS_DAY 0x11
22#define WM8350_RTC_DATE_MONTH 0x12
23#define WM8350_RTC_YEAR 0x13
24#define WM8350_ALARM_SECONDS_MINUTES 0x14
25#define WM8350_ALARM_HOURS_DAY 0x15
26#define WM8350_ALARM_DATE_MONTH 0x16
27#define WM8350_RTC_TIME_CONTROL 0x17
28
29/*
30 * R16 (0x10) - RTC Seconds/Minutes
31 */
32#define WM8350_RTC_MINS_MASK 0x7F00
33#define WM8350_RTC_MINS_SHIFT 8
34#define WM8350_RTC_SECS_MASK 0x007F
35#define WM8350_RTC_SECS_SHIFT 0
36
37/*
38 * R17 (0x11) - RTC Hours/Day
39 */
40#define WM8350_RTC_DAY_MASK 0x0700
41#define WM8350_RTC_DAY_SHIFT 8
42#define WM8350_RTC_HPM_MASK 0x0020
43#define WM8350_RTC_HPM_SHIFT 5
44#define WM8350_RTC_HRS_MASK 0x001F
45#define WM8350_RTC_HRS_SHIFT 0
46
47/* Bit values for R21 (0x15) */
48#define WM8350_RTC_DAY_SUN 1
49#define WM8350_RTC_DAY_MON 2
50#define WM8350_RTC_DAY_TUE 3
51#define WM8350_RTC_DAY_WED 4
52#define WM8350_RTC_DAY_THU 5
53#define WM8350_RTC_DAY_FRI 6
54#define WM8350_RTC_DAY_SAT 7
55
56#define WM8350_RTC_HPM_AM 0
57#define WM8350_RTC_HPM_PM 1
58
59/*
60 * R18 (0x12) - RTC Date/Month
61 */
62#define WM8350_RTC_MTH_MASK 0x1F00
63#define WM8350_RTC_MTH_SHIFT 8
64#define WM8350_RTC_DATE_MASK 0x003F
65#define WM8350_RTC_DATE_SHIFT 0
66
67/* Bit values for R22 (0x16) */
68#define WM8350_RTC_MTH_JAN 1
69#define WM8350_RTC_MTH_FEB 2
70#define WM8350_RTC_MTH_MAR 3
71#define WM8350_RTC_MTH_APR 4
72#define WM8350_RTC_MTH_MAY 5
73#define WM8350_RTC_MTH_JUN 6
74#define WM8350_RTC_MTH_JUL 7
75#define WM8350_RTC_MTH_AUG 8
76#define WM8350_RTC_MTH_SEP 9
77#define WM8350_RTC_MTH_OCT 10
78#define WM8350_RTC_MTH_NOV 11
79#define WM8350_RTC_MTH_DEC 12
80#define WM8350_RTC_MTH_JAN_BCD 0x01
81#define WM8350_RTC_MTH_FEB_BCD 0x02
82#define WM8350_RTC_MTH_MAR_BCD 0x03
83#define WM8350_RTC_MTH_APR_BCD 0x04
84#define WM8350_RTC_MTH_MAY_BCD 0x05
85#define WM8350_RTC_MTH_JUN_BCD 0x06
86#define WM8350_RTC_MTH_JUL_BCD 0x07
87#define WM8350_RTC_MTH_AUG_BCD 0x08
88#define WM8350_RTC_MTH_SEP_BCD 0x09
89#define WM8350_RTC_MTH_OCT_BCD 0x10
90#define WM8350_RTC_MTH_NOV_BCD 0x11
91#define WM8350_RTC_MTH_DEC_BCD 0x12
92
93/*
94 * R19 (0x13) - RTC Year
95 */
96#define WM8350_RTC_YHUNDREDS_MASK 0x3F00
97#define WM8350_RTC_YHUNDREDS_SHIFT 8
98#define WM8350_RTC_YUNITS_MASK 0x00FF
99#define WM8350_RTC_YUNITS_SHIFT 0
100
101/*
102 * R20 (0x14) - Alarm Seconds/Minutes
103 */
104#define WM8350_RTC_ALMMINS_MASK 0x7F00
105#define WM8350_RTC_ALMMINS_SHIFT 8
106#define WM8350_RTC_ALMSECS_MASK 0x007F
107#define WM8350_RTC_ALMSECS_SHIFT 0
108
109/* Bit values for R20 (0x14) */
110#define WM8350_RTC_ALMMINS_DONT_CARE -1
111#define WM8350_RTC_ALMSECS_DONT_CARE -1
112
113/*
114 * R21 (0x15) - Alarm Hours/Day
115 */
116#define WM8350_RTC_ALMDAY_MASK 0x0F00
117#define WM8350_RTC_ALMDAY_SHIFT 8
118#define WM8350_RTC_ALMHPM_MASK 0x0020
119#define WM8350_RTC_ALMHPM_SHIFT 5
120#define WM8350_RTC_ALMHRS_MASK 0x001F
121#define WM8350_RTC_ALMHRS_SHIFT 0
122
123/* Bit values for R21 (0x15) */
124#define WM8350_RTC_ALMDAY_DONT_CARE -1
125#define WM8350_RTC_ALMDAY_SUN 1
126#define WM8350_RTC_ALMDAY_MON 2
127#define WM8350_RTC_ALMDAY_TUE 3
128#define WM8350_RTC_ALMDAY_WED 4
129#define WM8350_RTC_ALMDAY_THU 5
130#define WM8350_RTC_ALMDAY_FRI 6
131#define WM8350_RTC_ALMDAY_SAT 7
132
133#define WM8350_RTC_ALMHPM_AM 0
134#define WM8350_RTC_ALMHPM_PM 1
135
136#define WM8350_RTC_ALMHRS_DONT_CARE -1
137
138/*
139 * R22 (0x16) - Alarm Date/Month
140 */
141#define WM8350_RTC_ALMMTH_MASK 0x1F00
142#define WM8350_RTC_ALMMTH_SHIFT 8
143#define WM8350_RTC_ALMDATE_MASK 0x003F
144#define WM8350_RTC_ALMDATE_SHIFT 0
145
146/* Bit values for R22 (0x16) */
147#define WM8350_RTC_ALMDATE_DONT_CARE -1
148
149#define WM8350_RTC_ALMMTH_DONT_CARE -1
150#define WM8350_RTC_ALMMTH_JAN 1
151#define WM8350_RTC_ALMMTH_FEB 2
152#define WM8350_RTC_ALMMTH_MAR 3
153#define WM8350_RTC_ALMMTH_APR 4
154#define WM8350_RTC_ALMMTH_MAY 5
155#define WM8350_RTC_ALMMTH_JUN 6
156#define WM8350_RTC_ALMMTH_JUL 7
157#define WM8350_RTC_ALMMTH_AUG 8
158#define WM8350_RTC_ALMMTH_SEP 9
159#define WM8350_RTC_ALMMTH_OCT 10
160#define WM8350_RTC_ALMMTH_NOV 11
161#define WM8350_RTC_ALMMTH_DEC 12
162#define WM8350_RTC_ALMMTH_JAN_BCD 0x01
163#define WM8350_RTC_ALMMTH_FEB_BCD 0x02
164#define WM8350_RTC_ALMMTH_MAR_BCD 0x03
165#define WM8350_RTC_ALMMTH_APR_BCD 0x04
166#define WM8350_RTC_ALMMTH_MAY_BCD 0x05
167#define WM8350_RTC_ALMMTH_JUN_BCD 0x06
168#define WM8350_RTC_ALMMTH_JUL_BCD 0x07
169#define WM8350_RTC_ALMMTH_AUG_BCD 0x08
170#define WM8350_RTC_ALMMTH_SEP_BCD 0x09
171#define WM8350_RTC_ALMMTH_OCT_BCD 0x10
172#define WM8350_RTC_ALMMTH_NOV_BCD 0x11
173#define WM8350_RTC_ALMMTH_DEC_BCD 0x12
174
175/*
176 * R23 (0x17) - RTC Time Control
177 */
178#define WM8350_RTC_BCD 0x8000
179#define WM8350_RTC_BCD_MASK 0x8000
180#define WM8350_RTC_BCD_SHIFT 15
181#define WM8350_RTC_12HR 0x4000
182#define WM8350_RTC_12HR_MASK 0x4000
183#define WM8350_RTC_12HR_SHIFT 14
184#define WM8350_RTC_DST 0x2000
185#define WM8350_RTC_DST_MASK 0x2000
186#define WM8350_RTC_DST_SHIFT 13
187#define WM8350_RTC_SET 0x0800
188#define WM8350_RTC_SET_MASK 0x0800
189#define WM8350_RTC_SET_SHIFT 11
190#define WM8350_RTC_STS 0x0400
191#define WM8350_RTC_STS_MASK 0x0400
192#define WM8350_RTC_STS_SHIFT 10
193#define WM8350_RTC_ALMSET 0x0200
194#define WM8350_RTC_ALMSET_MASK 0x0200
195#define WM8350_RTC_ALMSET_SHIFT 9
196#define WM8350_RTC_ALMSTS 0x0100
197#define WM8350_RTC_ALMSTS_MASK 0x0100
198#define WM8350_RTC_ALMSTS_SHIFT 8
199#define WM8350_RTC_PINT 0x0070
200#define WM8350_RTC_PINT_MASK 0x0070
201#define WM8350_RTC_PINT_SHIFT 4
202#define WM8350_RTC_DSW 0x000F
203#define WM8350_RTC_DSW_MASK 0x000F
204#define WM8350_RTC_DSW_SHIFT 0
205
206/* Bit values for R23 (0x17) */
207#define WM8350_RTC_BCD_BINARY 0
208#define WM8350_RTC_BCD_BCD 1
209
210#define WM8350_RTC_12HR_24HR 0
211#define WM8350_RTC_12HR_12HR 1
212
213#define WM8350_RTC_DST_DISABLED 0
214#define WM8350_RTC_DST_ENABLED 1
215
216#define WM8350_RTC_SET_RUN 0
217#define WM8350_RTC_SET_SET 1
218
219#define WM8350_RTC_STS_RUNNING 0
220#define WM8350_RTC_STS_STOPPED 1
221
222#define WM8350_RTC_ALMSET_RUN 0
223#define WM8350_RTC_ALMSET_SET 1
224
225#define WM8350_RTC_ALMSTS_RUNNING 0
226#define WM8350_RTC_ALMSTS_STOPPED 1
227
228#define WM8350_RTC_PINT_DISABLED 0
229#define WM8350_RTC_PINT_SECS 1
230#define WM8350_RTC_PINT_MINS 2
231#define WM8350_RTC_PINT_HRS 3
232#define WM8350_RTC_PINT_DAYS 4
233#define WM8350_RTC_PINT_MTHS 5
234
235#define WM8350_RTC_DSW_DISABLED 0
236#define WM8350_RTC_DSW_1HZ 1
237#define WM8350_RTC_DSW_2HZ 2
238#define WM8350_RTC_DSW_4HZ 3
239#define WM8350_RTC_DSW_8HZ 4
240#define WM8350_RTC_DSW_16HZ 5
241#define WM8350_RTC_DSW_32HZ 6
242#define WM8350_RTC_DSW_64HZ 7
243#define WM8350_RTC_DSW_128HZ 8
244#define WM8350_RTC_DSW_256HZ 9
245#define WM8350_RTC_DSW_512HZ 10
246#define WM8350_RTC_DSW_1024HZ 11
247
248/*
249 * R218 (0xDA) - RTC Tick Control
250 */
251#define WM8350_RTC_TICKSTS 0x4000
252#define WM8350_RTC_CLKSRC 0x2000
253#define WM8350_RTC_TRIM_MASK 0x03FF
254
255/*
256 * RTC Interrupts.
257 */
258#define WM8350_IRQ_RTC_PER 7
259#define WM8350_IRQ_RTC_SEC 8
260#define WM8350_IRQ_RTC_ALM 9
261
262struct wm8350_rtc {
263 struct platform_device *pdev;
264};
265
266#endif
diff --git a/include/linux/mfd/wm8350/supply.h b/include/linux/mfd/wm8350/supply.h
new file mode 100644
index 000000000000..1c8f3cde79b0
--- /dev/null
+++ b/include/linux/mfd/wm8350/supply.h
@@ -0,0 +1,111 @@
1/*
2 * supply.h -- Power Supply Driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#ifndef __LINUX_MFD_WM8350_SUPPLY_H_
14#define __LINUX_MFD_WM8350_SUPPLY_H_
15
16#include <linux/platform_device.h>
17
18/*
19 * Charger registers
20 */
21#define WM8350_BATTERY_CHARGER_CONTROL_1 0xA8
22#define WM8350_BATTERY_CHARGER_CONTROL_2 0xA9
23#define WM8350_BATTERY_CHARGER_CONTROL_3 0xAA
24
25/*
26 * R168 (0xA8) - Battery Charger Control 1
27 */
28#define WM8350_CHG_ENA_R168 0x8000
29#define WM8350_CHG_THR 0x2000
30#define WM8350_CHG_EOC_SEL_MASK 0x1C00
31#define WM8350_CHG_TRICKLE_TEMP_CHOKE 0x0200
32#define WM8350_CHG_TRICKLE_USB_CHOKE 0x0100
33#define WM8350_CHG_RECOVER_T 0x0080
34#define WM8350_CHG_END_ACT 0x0040
35#define WM8350_CHG_FAST 0x0020
36#define WM8350_CHG_FAST_USB_THROTTLE 0x0010
37#define WM8350_CHG_NTC_MON 0x0008
38#define WM8350_CHG_BATT_HOT_MON 0x0004
39#define WM8350_CHG_BATT_COLD_MON 0x0002
40#define WM8350_CHG_CHIP_TEMP_MON 0x0001
41
42/*
43 * R169 (0xA9) - Battery Charger Control 2
44 */
45#define WM8350_CHG_ACTIVE 0x8000
46#define WM8350_CHG_PAUSE 0x4000
47#define WM8350_CHG_STS_MASK 0x3000
48#define WM8350_CHG_TIME_MASK 0x0F00
49#define WM8350_CHG_MASK_WALL_FB 0x0080
50#define WM8350_CHG_TRICKLE_SEL 0x0040
51#define WM8350_CHG_VSEL_MASK 0x0030
52#define WM8350_CHG_ISEL_MASK 0x000F
53#define WM8350_CHG_STS_OFF 0x0000
54#define WM8350_CHG_STS_TRICKLE 0x1000
55#define WM8350_CHG_STS_FAST 0x2000
56
57/*
58 * R170 (0xAA) - Battery Charger Control 3
59 */
60#define WM8350_CHG_THROTTLE_T_MASK 0x0060
61#define WM8350_CHG_SMART 0x0010
62#define WM8350_CHG_TIMER_ADJT_MASK 0x000F
63
64/*
65 * Charger Interrupts
66 */
67#define WM8350_IRQ_CHG_BAT_HOT 0
68#define WM8350_IRQ_CHG_BAT_COLD 1
69#define WM8350_IRQ_CHG_BAT_FAIL 2
70#define WM8350_IRQ_CHG_TO 3
71#define WM8350_IRQ_CHG_END 4
72#define WM8350_IRQ_CHG_START 5
73#define WM8350_IRQ_CHG_FAST_RDY 6
74#define WM8350_IRQ_CHG_VBATT_LT_3P9 10
75#define WM8350_IRQ_CHG_VBATT_LT_3P1 11
76#define WM8350_IRQ_CHG_VBATT_LT_2P85 12
77
78/*
79 * Charger Policy
80 */
81#define WM8350_CHG_TRICKLE_50mA (0 << 6)
82#define WM8350_CHG_TRICKLE_100mA (1 << 6)
83#define WM8350_CHG_4_05V (0 << 4)
84#define WM8350_CHG_4_10V (1 << 4)
85#define WM8350_CHG_4_15V (2 << 4)
86#define WM8350_CHG_4_20V (3 << 4)
87#define WM8350_CHG_FAST_LIMIT_mA(x) ((x / 50) & 0xf)
88#define WM8350_CHG_EOC_mA(x) (((x - 10) & 0x7) << 10)
89#define WM8350_CHG_TRICKLE_3_1V (0 << 13)
90#define WM8350_CHG_TRICKLE_3_9V (1 << 13)
91
92/*
93 * Supply Registers.
94 */
95#define WM8350_USB_VOLTAGE_READBACK 0x9C
96#define WM8350_LINE_VOLTAGE_READBACK 0x9D
97#define WM8350_BATT_VOLTAGE_READBACK 0x9E
98
99/*
100 * Supply Interrupts.
101 */
102#define WM8350_IRQ_USB_LIMIT 15
103#define WM8350_IRQ_EXT_USB_FB 36
104#define WM8350_IRQ_EXT_WALL_FB 37
105#define WM8350_IRQ_EXT_BAT_FB 38
106
107struct wm8350_power {
108 struct platform_device *pdev;
109};
110
111#endif
diff --git a/include/linux/mfd/wm8350/wdt.h b/include/linux/mfd/wm8350/wdt.h
new file mode 100644
index 000000000000..f6135b5e5ef4
--- /dev/null
+++ b/include/linux/mfd/wm8350/wdt.h
@@ -0,0 +1,28 @@
1/*
2 * wdt.h -- Watchdog Driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007, 2008 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#ifndef __LINUX_MFD_WM8350_WDT_H_
13#define __LINUX_MFD_WM8350_WDT_H_
14
15#include <linux/platform_device.h>
16
17#define WM8350_WDOG_HIB_MODE 0x0080
18#define WM8350_WDOG_DEBUG 0x0040
19#define WM8350_WDOG_MODE_MASK 0x0030
20#define WM8350_WDOG_TO_MASK 0x0007
21
22#define WM8350_IRQ_SYS_WDOG_TO 24
23
24struct wm8350_wdt {
25 struct platform_device *pdev;
26};
27
28#endif
diff --git a/include/linux/mfd/wm8400-audio.h b/include/linux/mfd/wm8400-audio.h
new file mode 100644
index 000000000000..b6640e018046
--- /dev/null
+++ b/include/linux/mfd/wm8400-audio.h
@@ -0,0 +1,1186 @@
1/*
2 * wm8400 private definitions for audio
3 *
4 * Copyright 2008 Wolfson Microelectronics plc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef __LINUX_MFD_WM8400_AUDIO_H
22#define __LINUX_MFD_WM8400_AUDIO_H
23
24#include <linux/mfd/wm8400-audio.h>
25
26/*
27 * R2 (0x02) - Power Management (1)
28 */
29#define WM8400_CODEC_ENA 0x8000 /* CODEC_ENA */
30#define WM8400_CODEC_ENA_MASK 0x8000 /* CODEC_ENA */
31#define WM8400_CODEC_ENA_SHIFT 15 /* CODEC_ENA */
32#define WM8400_CODEC_ENA_WIDTH 1 /* CODEC_ENA */
33#define WM8400_SYSCLK_ENA 0x4000 /* SYSCLK_ENA */
34#define WM8400_SYSCLK_ENA_MASK 0x4000 /* SYSCLK_ENA */
35#define WM8400_SYSCLK_ENA_SHIFT 14 /* SYSCLK_ENA */
36#define WM8400_SYSCLK_ENA_WIDTH 1 /* SYSCLK_ENA */
37#define WM8400_SPK_MIX_ENA 0x2000 /* SPK_MIX_ENA */
38#define WM8400_SPK_MIX_ENA_MASK 0x2000 /* SPK_MIX_ENA */
39#define WM8400_SPK_MIX_ENA_SHIFT 13 /* SPK_MIX_ENA */
40#define WM8400_SPK_MIX_ENA_WIDTH 1 /* SPK_MIX_ENA */
41#define WM8400_SPK_ENA 0x1000 /* SPK_ENA */
42#define WM8400_SPK_ENA_MASK 0x1000 /* SPK_ENA */
43#define WM8400_SPK_ENA_SHIFT 12 /* SPK_ENA */
44#define WM8400_SPK_ENA_WIDTH 1 /* SPK_ENA */
45#define WM8400_OUT3_ENA 0x0800 /* OUT3_ENA */
46#define WM8400_OUT3_ENA_MASK 0x0800 /* OUT3_ENA */
47#define WM8400_OUT3_ENA_SHIFT 11 /* OUT3_ENA */
48#define WM8400_OUT3_ENA_WIDTH 1 /* OUT3_ENA */
49#define WM8400_OUT4_ENA 0x0400 /* OUT4_ENA */
50#define WM8400_OUT4_ENA_MASK 0x0400 /* OUT4_ENA */
51#define WM8400_OUT4_ENA_SHIFT 10 /* OUT4_ENA */
52#define WM8400_OUT4_ENA_WIDTH 1 /* OUT4_ENA */
53#define WM8400_LOUT_ENA 0x0200 /* LOUT_ENA */
54#define WM8400_LOUT_ENA_MASK 0x0200 /* LOUT_ENA */
55#define WM8400_LOUT_ENA_SHIFT 9 /* LOUT_ENA */
56#define WM8400_LOUT_ENA_WIDTH 1 /* LOUT_ENA */
57#define WM8400_ROUT_ENA 0x0100 /* ROUT_ENA */
58#define WM8400_ROUT_ENA_MASK 0x0100 /* ROUT_ENA */
59#define WM8400_ROUT_ENA_SHIFT 8 /* ROUT_ENA */
60#define WM8400_ROUT_ENA_WIDTH 1 /* ROUT_ENA */
61#define WM8400_MIC1BIAS_ENA 0x0010 /* MIC1BIAS_ENA */
62#define WM8400_MIC1BIAS_ENA_MASK 0x0010 /* MIC1BIAS_ENA */
63#define WM8400_MIC1BIAS_ENA_SHIFT 4 /* MIC1BIAS_ENA */
64#define WM8400_MIC1BIAS_ENA_WIDTH 1 /* MIC1BIAS_ENA */
65#define WM8400_VMID_MODE_MASK 0x0006 /* VMID_MODE - [2:1] */
66#define WM8400_VMID_MODE_SHIFT 1 /* VMID_MODE - [2:1] */
67#define WM8400_VMID_MODE_WIDTH 2 /* VMID_MODE - [2:1] */
68#define WM8400_VREF_ENA 0x0001 /* VREF_ENA */
69#define WM8400_VREF_ENA_MASK 0x0001 /* VREF_ENA */
70#define WM8400_VREF_ENA_SHIFT 0 /* VREF_ENA */
71#define WM8400_VREF_ENA_WIDTH 1 /* VREF_ENA */
72
73/*
74 * R3 (0x03) - Power Management (2)
75 */
76#define WM8400_FLL_ENA 0x8000 /* FLL_ENA */
77#define WM8400_FLL_ENA_MASK 0x8000 /* FLL_ENA */
78#define WM8400_FLL_ENA_SHIFT 15 /* FLL_ENA */
79#define WM8400_FLL_ENA_WIDTH 1 /* FLL_ENA */
80#define WM8400_TSHUT_ENA 0x4000 /* TSHUT_ENA */
81#define WM8400_TSHUT_ENA_MASK 0x4000 /* TSHUT_ENA */
82#define WM8400_TSHUT_ENA_SHIFT 14 /* TSHUT_ENA */
83#define WM8400_TSHUT_ENA_WIDTH 1 /* TSHUT_ENA */
84#define WM8400_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */
85#define WM8400_TSHUT_OPDIS_MASK 0x2000 /* TSHUT_OPDIS */
86#define WM8400_TSHUT_OPDIS_SHIFT 13 /* TSHUT_OPDIS */
87#define WM8400_TSHUT_OPDIS_WIDTH 1 /* TSHUT_OPDIS */
88#define WM8400_OPCLK_ENA 0x0800 /* OPCLK_ENA */
89#define WM8400_OPCLK_ENA_MASK 0x0800 /* OPCLK_ENA */
90#define WM8400_OPCLK_ENA_SHIFT 11 /* OPCLK_ENA */
91#define WM8400_OPCLK_ENA_WIDTH 1 /* OPCLK_ENA */
92#define WM8400_AINL_ENA 0x0200 /* AINL_ENA */
93#define WM8400_AINL_ENA_MASK 0x0200 /* AINL_ENA */
94#define WM8400_AINL_ENA_SHIFT 9 /* AINL_ENA */
95#define WM8400_AINL_ENA_WIDTH 1 /* AINL_ENA */
96#define WM8400_AINR_ENA 0x0100 /* AINR_ENA */
97#define WM8400_AINR_ENA_MASK 0x0100 /* AINR_ENA */
98#define WM8400_AINR_ENA_SHIFT 8 /* AINR_ENA */
99#define WM8400_AINR_ENA_WIDTH 1 /* AINR_ENA */
100#define WM8400_LIN34_ENA 0x0080 /* LIN34_ENA */
101#define WM8400_LIN34_ENA_MASK 0x0080 /* LIN34_ENA */
102#define WM8400_LIN34_ENA_SHIFT 7 /* LIN34_ENA */
103#define WM8400_LIN34_ENA_WIDTH 1 /* LIN34_ENA */
104#define WM8400_LIN12_ENA 0x0040 /* LIN12_ENA */
105#define WM8400_LIN12_ENA_MASK 0x0040 /* LIN12_ENA */
106#define WM8400_LIN12_ENA_SHIFT 6 /* LIN12_ENA */
107#define WM8400_LIN12_ENA_WIDTH 1 /* LIN12_ENA */
108#define WM8400_RIN34_ENA 0x0020 /* RIN34_ENA */
109#define WM8400_RIN34_ENA_MASK 0x0020 /* RIN34_ENA */
110#define WM8400_RIN34_ENA_SHIFT 5 /* RIN34_ENA */
111#define WM8400_RIN34_ENA_WIDTH 1 /* RIN34_ENA */
112#define WM8400_RIN12_ENA 0x0010 /* RIN12_ENA */
113#define WM8400_RIN12_ENA_MASK 0x0010 /* RIN12_ENA */
114#define WM8400_RIN12_ENA_SHIFT 4 /* RIN12_ENA */
115#define WM8400_RIN12_ENA_WIDTH 1 /* RIN12_ENA */
116#define WM8400_ADCL_ENA 0x0002 /* ADCL_ENA */
117#define WM8400_ADCL_ENA_MASK 0x0002 /* ADCL_ENA */
118#define WM8400_ADCL_ENA_SHIFT 1 /* ADCL_ENA */
119#define WM8400_ADCL_ENA_WIDTH 1 /* ADCL_ENA */
120#define WM8400_ADCR_ENA 0x0001 /* ADCR_ENA */
121#define WM8400_ADCR_ENA_MASK 0x0001 /* ADCR_ENA */
122#define WM8400_ADCR_ENA_SHIFT 0 /* ADCR_ENA */
123#define WM8400_ADCR_ENA_WIDTH 1 /* ADCR_ENA */
124
125/*
126 * R4 (0x04) - Power Management (3)
127 */
128#define WM8400_LON_ENA 0x2000 /* LON_ENA */
129#define WM8400_LON_ENA_MASK 0x2000 /* LON_ENA */
130#define WM8400_LON_ENA_SHIFT 13 /* LON_ENA */
131#define WM8400_LON_ENA_WIDTH 1 /* LON_ENA */
132#define WM8400_LOP_ENA 0x1000 /* LOP_ENA */
133#define WM8400_LOP_ENA_MASK 0x1000 /* LOP_ENA */
134#define WM8400_LOP_ENA_SHIFT 12 /* LOP_ENA */
135#define WM8400_LOP_ENA_WIDTH 1 /* LOP_ENA */
136#define WM8400_RON_ENA 0x0800 /* RON_ENA */
137#define WM8400_RON_ENA_MASK 0x0800 /* RON_ENA */
138#define WM8400_RON_ENA_SHIFT 11 /* RON_ENA */
139#define WM8400_RON_ENA_WIDTH 1 /* RON_ENA */
140#define WM8400_ROP_ENA 0x0400 /* ROP_ENA */
141#define WM8400_ROP_ENA_MASK 0x0400 /* ROP_ENA */
142#define WM8400_ROP_ENA_SHIFT 10 /* ROP_ENA */
143#define WM8400_ROP_ENA_WIDTH 1 /* ROP_ENA */
144#define WM8400_LOPGA_ENA 0x0080 /* LOPGA_ENA */
145#define WM8400_LOPGA_ENA_MASK 0x0080 /* LOPGA_ENA */
146#define WM8400_LOPGA_ENA_SHIFT 7 /* LOPGA_ENA */
147#define WM8400_LOPGA_ENA_WIDTH 1 /* LOPGA_ENA */
148#define WM8400_ROPGA_ENA 0x0040 /* ROPGA_ENA */
149#define WM8400_ROPGA_ENA_MASK 0x0040 /* ROPGA_ENA */
150#define WM8400_ROPGA_ENA_SHIFT 6 /* ROPGA_ENA */
151#define WM8400_ROPGA_ENA_WIDTH 1 /* ROPGA_ENA */
152#define WM8400_LOMIX_ENA 0x0020 /* LOMIX_ENA */
153#define WM8400_LOMIX_ENA_MASK 0x0020 /* LOMIX_ENA */
154#define WM8400_LOMIX_ENA_SHIFT 5 /* LOMIX_ENA */
155#define WM8400_LOMIX_ENA_WIDTH 1 /* LOMIX_ENA */
156#define WM8400_ROMIX_ENA 0x0010 /* ROMIX_ENA */
157#define WM8400_ROMIX_ENA_MASK 0x0010 /* ROMIX_ENA */
158#define WM8400_ROMIX_ENA_SHIFT 4 /* ROMIX_ENA */
159#define WM8400_ROMIX_ENA_WIDTH 1 /* ROMIX_ENA */
160#define WM8400_DACL_ENA 0x0002 /* DACL_ENA */
161#define WM8400_DACL_ENA_MASK 0x0002 /* DACL_ENA */
162#define WM8400_DACL_ENA_SHIFT 1 /* DACL_ENA */
163#define WM8400_DACL_ENA_WIDTH 1 /* DACL_ENA */
164#define WM8400_DACR_ENA 0x0001 /* DACR_ENA */
165#define WM8400_DACR_ENA_MASK 0x0001 /* DACR_ENA */
166#define WM8400_DACR_ENA_SHIFT 0 /* DACR_ENA */
167#define WM8400_DACR_ENA_WIDTH 1 /* DACR_ENA */
168
169/*
170 * R5 (0x05) - Audio Interface (1)
171 */
172#define WM8400_AIFADCL_SRC 0x8000 /* AIFADCL_SRC */
173#define WM8400_AIFADCL_SRC_MASK 0x8000 /* AIFADCL_SRC */
174#define WM8400_AIFADCL_SRC_SHIFT 15 /* AIFADCL_SRC */
175#define WM8400_AIFADCL_SRC_WIDTH 1 /* AIFADCL_SRC */
176#define WM8400_AIFADCR_SRC 0x4000 /* AIFADCR_SRC */
177#define WM8400_AIFADCR_SRC_MASK 0x4000 /* AIFADCR_SRC */
178#define WM8400_AIFADCR_SRC_SHIFT 14 /* AIFADCR_SRC */
179#define WM8400_AIFADCR_SRC_WIDTH 1 /* AIFADCR_SRC */
180#define WM8400_AIFADC_TDM 0x2000 /* AIFADC_TDM */
181#define WM8400_AIFADC_TDM_MASK 0x2000 /* AIFADC_TDM */
182#define WM8400_AIFADC_TDM_SHIFT 13 /* AIFADC_TDM */
183#define WM8400_AIFADC_TDM_WIDTH 1 /* AIFADC_TDM */
184#define WM8400_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */
185#define WM8400_AIFADC_TDM_CHAN_MASK 0x1000 /* AIFADC_TDM_CHAN */
186#define WM8400_AIFADC_TDM_CHAN_SHIFT 12 /* AIFADC_TDM_CHAN */
187#define WM8400_AIFADC_TDM_CHAN_WIDTH 1 /* AIFADC_TDM_CHAN */
188#define WM8400_AIF_BCLK_INV 0x0100 /* AIF_BCLK_INV */
189#define WM8400_AIF_BCLK_INV_MASK 0x0100 /* AIF_BCLK_INV */
190#define WM8400_AIF_BCLK_INV_SHIFT 8 /* AIF_BCLK_INV */
191#define WM8400_AIF_BCLK_INV_WIDTH 1 /* AIF_BCLK_INV */
192#define WM8400_AIF_LRCLK_INV 0x0080 /* AIF_LRCLK_INV */
193#define WM8400_AIF_LRCLK_INV_MASK 0x0080 /* AIF_LRCLK_INV */
194#define WM8400_AIF_LRCLK_INV_SHIFT 7 /* AIF_LRCLK_INV */
195#define WM8400_AIF_LRCLK_INV_WIDTH 1 /* AIF_LRCLK_INV */
196#define WM8400_AIF_WL_MASK 0x0060 /* AIF_WL - [6:5] */
197#define WM8400_AIF_WL_SHIFT 5 /* AIF_WL - [6:5] */
198#define WM8400_AIF_WL_WIDTH 2 /* AIF_WL - [6:5] */
199#define WM8400_AIF_WL_16BITS (0 << 5)
200#define WM8400_AIF_WL_20BITS (1 << 5)
201#define WM8400_AIF_WL_24BITS (2 << 5)
202#define WM8400_AIF_WL_32BITS (3 << 5)
203#define WM8400_AIF_FMT_MASK 0x0018 /* AIF_FMT - [4:3] */
204#define WM8400_AIF_FMT_SHIFT 3 /* AIF_FMT - [4:3] */
205#define WM8400_AIF_FMT_WIDTH 2 /* AIF_FMT - [4:3] */
206#define WM8400_AIF_FMT_RIGHTJ (0 << 3)
207#define WM8400_AIF_FMT_LEFTJ (1 << 3)
208#define WM8400_AIF_FMT_I2S (2 << 3)
209#define WM8400_AIF_FMT_DSP (3 << 3)
210
211/*
212 * R6 (0x06) - Audio Interface (2)
213 */
214#define WM8400_DACL_SRC 0x8000 /* DACL_SRC */
215#define WM8400_DACL_SRC_MASK 0x8000 /* DACL_SRC */
216#define WM8400_DACL_SRC_SHIFT 15 /* DACL_SRC */
217#define WM8400_DACL_SRC_WIDTH 1 /* DACL_SRC */
218#define WM8400_DACR_SRC 0x4000 /* DACR_SRC */
219#define WM8400_DACR_SRC_MASK 0x4000 /* DACR_SRC */
220#define WM8400_DACR_SRC_SHIFT 14 /* DACR_SRC */
221#define WM8400_DACR_SRC_WIDTH 1 /* DACR_SRC */
222#define WM8400_AIFDAC_TDM 0x2000 /* AIFDAC_TDM */
223#define WM8400_AIFDAC_TDM_MASK 0x2000 /* AIFDAC_TDM */
224#define WM8400_AIFDAC_TDM_SHIFT 13 /* AIFDAC_TDM */
225#define WM8400_AIFDAC_TDM_WIDTH 1 /* AIFDAC_TDM */
226#define WM8400_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */
227#define WM8400_AIFDAC_TDM_CHAN_MASK 0x1000 /* AIFDAC_TDM_CHAN */
228#define WM8400_AIFDAC_TDM_CHAN_SHIFT 12 /* AIFDAC_TDM_CHAN */
229#define WM8400_AIFDAC_TDM_CHAN_WIDTH 1 /* AIFDAC_TDM_CHAN */
230#define WM8400_DAC_BOOST_MASK 0x0C00 /* DAC_BOOST - [11:10] */
231#define WM8400_DAC_BOOST_SHIFT 10 /* DAC_BOOST - [11:10] */
232#define WM8400_DAC_BOOST_WIDTH 2 /* DAC_BOOST - [11:10] */
233#define WM8400_DAC_COMP 0x0010 /* DAC_COMP */
234#define WM8400_DAC_COMP_MASK 0x0010 /* DAC_COMP */
235#define WM8400_DAC_COMP_SHIFT 4 /* DAC_COMP */
236#define WM8400_DAC_COMP_WIDTH 1 /* DAC_COMP */
237#define WM8400_DAC_COMPMODE 0x0008 /* DAC_COMPMODE */
238#define WM8400_DAC_COMPMODE_MASK 0x0008 /* DAC_COMPMODE */
239#define WM8400_DAC_COMPMODE_SHIFT 3 /* DAC_COMPMODE */
240#define WM8400_DAC_COMPMODE_WIDTH 1 /* DAC_COMPMODE */
241#define WM8400_ADC_COMP 0x0004 /* ADC_COMP */
242#define WM8400_ADC_COMP_MASK 0x0004 /* ADC_COMP */
243#define WM8400_ADC_COMP_SHIFT 2 /* ADC_COMP */
244#define WM8400_ADC_COMP_WIDTH 1 /* ADC_COMP */
245#define WM8400_ADC_COMPMODE 0x0002 /* ADC_COMPMODE */
246#define WM8400_ADC_COMPMODE_MASK 0x0002 /* ADC_COMPMODE */
247#define WM8400_ADC_COMPMODE_SHIFT 1 /* ADC_COMPMODE */
248#define WM8400_ADC_COMPMODE_WIDTH 1 /* ADC_COMPMODE */
249#define WM8400_LOOPBACK 0x0001 /* LOOPBACK */
250#define WM8400_LOOPBACK_MASK 0x0001 /* LOOPBACK */
251#define WM8400_LOOPBACK_SHIFT 0 /* LOOPBACK */
252#define WM8400_LOOPBACK_WIDTH 1 /* LOOPBACK */
253
254/*
255 * R7 (0x07) - Clocking (1)
256 */
257#define WM8400_TOCLK_RATE 0x8000 /* TOCLK_RATE */
258#define WM8400_TOCLK_RATE_MASK 0x8000 /* TOCLK_RATE */
259#define WM8400_TOCLK_RATE_SHIFT 15 /* TOCLK_RATE */
260#define WM8400_TOCLK_RATE_WIDTH 1 /* TOCLK_RATE */
261#define WM8400_TOCLK_ENA 0x4000 /* TOCLK_ENA */
262#define WM8400_TOCLK_ENA_MASK 0x4000 /* TOCLK_ENA */
263#define WM8400_TOCLK_ENA_SHIFT 14 /* TOCLK_ENA */
264#define WM8400_TOCLK_ENA_WIDTH 1 /* TOCLK_ENA */
265#define WM8400_OPCLKDIV_MASK 0x1E00 /* OPCLKDIV - [12:9] */
266#define WM8400_OPCLKDIV_SHIFT 9 /* OPCLKDIV - [12:9] */
267#define WM8400_OPCLKDIV_WIDTH 4 /* OPCLKDIV - [12:9] */
268#define WM8400_DCLKDIV_MASK 0x01C0 /* DCLKDIV - [8:6] */
269#define WM8400_DCLKDIV_SHIFT 6 /* DCLKDIV - [8:6] */
270#define WM8400_DCLKDIV_WIDTH 3 /* DCLKDIV - [8:6] */
271#define WM8400_BCLK_DIV_MASK 0x001E /* BCLK_DIV - [4:1] */
272#define WM8400_BCLK_DIV_SHIFT 1 /* BCLK_DIV - [4:1] */
273#define WM8400_BCLK_DIV_WIDTH 4 /* BCLK_DIV - [4:1] */
274
275/*
276 * R8 (0x08) - Clocking (2)
277 */
278#define WM8400_MCLK_SRC 0x8000 /* MCLK_SRC */
279#define WM8400_MCLK_SRC_MASK 0x8000 /* MCLK_SRC */
280#define WM8400_MCLK_SRC_SHIFT 15 /* MCLK_SRC */
281#define WM8400_MCLK_SRC_WIDTH 1 /* MCLK_SRC */
282#define WM8400_SYSCLK_SRC 0x4000 /* SYSCLK_SRC */
283#define WM8400_SYSCLK_SRC_MASK 0x4000 /* SYSCLK_SRC */
284#define WM8400_SYSCLK_SRC_SHIFT 14 /* SYSCLK_SRC */
285#define WM8400_SYSCLK_SRC_WIDTH 1 /* SYSCLK_SRC */
286#define WM8400_CLK_FORCE 0x2000 /* CLK_FORCE */
287#define WM8400_CLK_FORCE_MASK 0x2000 /* CLK_FORCE */
288#define WM8400_CLK_FORCE_SHIFT 13 /* CLK_FORCE */
289#define WM8400_CLK_FORCE_WIDTH 1 /* CLK_FORCE */
290#define WM8400_MCLK_DIV_MASK 0x1800 /* MCLK_DIV - [12:11] */
291#define WM8400_MCLK_DIV_SHIFT 11 /* MCLK_DIV - [12:11] */
292#define WM8400_MCLK_DIV_WIDTH 2 /* MCLK_DIV - [12:11] */
293#define WM8400_MCLK_INV 0x0400 /* MCLK_INV */
294#define WM8400_MCLK_INV_MASK 0x0400 /* MCLK_INV */
295#define WM8400_MCLK_INV_SHIFT 10 /* MCLK_INV */
296#define WM8400_MCLK_INV_WIDTH 1 /* MCLK_INV */
297#define WM8400_ADC_CLKDIV_MASK 0x00E0 /* ADC_CLKDIV - [7:5] */
298#define WM8400_ADC_CLKDIV_SHIFT 5 /* ADC_CLKDIV - [7:5] */
299#define WM8400_ADC_CLKDIV_WIDTH 3 /* ADC_CLKDIV - [7:5] */
300#define WM8400_DAC_CLKDIV_MASK 0x001C /* DAC_CLKDIV - [4:2] */
301#define WM8400_DAC_CLKDIV_SHIFT 2 /* DAC_CLKDIV - [4:2] */
302#define WM8400_DAC_CLKDIV_WIDTH 3 /* DAC_CLKDIV - [4:2] */
303
304/*
305 * R9 (0x09) - Audio Interface (3)
306 */
307#define WM8400_AIF_MSTR1 0x8000 /* AIF_MSTR1 */
308#define WM8400_AIF_MSTR1_MASK 0x8000 /* AIF_MSTR1 */
309#define WM8400_AIF_MSTR1_SHIFT 15 /* AIF_MSTR1 */
310#define WM8400_AIF_MSTR1_WIDTH 1 /* AIF_MSTR1 */
311#define WM8400_AIF_MSTR2 0x4000 /* AIF_MSTR2 */
312#define WM8400_AIF_MSTR2_MASK 0x4000 /* AIF_MSTR2 */
313#define WM8400_AIF_MSTR2_SHIFT 14 /* AIF_MSTR2 */
314#define WM8400_AIF_MSTR2_WIDTH 1 /* AIF_MSTR2 */
315#define WM8400_AIF_SEL 0x2000 /* AIF_SEL */
316#define WM8400_AIF_SEL_MASK 0x2000 /* AIF_SEL */
317#define WM8400_AIF_SEL_SHIFT 13 /* AIF_SEL */
318#define WM8400_AIF_SEL_WIDTH 1 /* AIF_SEL */
319#define WM8400_ADCLRC_DIR 0x0800 /* ADCLRC_DIR */
320#define WM8400_ADCLRC_DIR_MASK 0x0800 /* ADCLRC_DIR */
321#define WM8400_ADCLRC_DIR_SHIFT 11 /* ADCLRC_DIR */
322#define WM8400_ADCLRC_DIR_WIDTH 1 /* ADCLRC_DIR */
323#define WM8400_ADCLRC_RATE_MASK 0x07FF /* ADCLRC_RATE - [10:0] */
324#define WM8400_ADCLRC_RATE_SHIFT 0 /* ADCLRC_RATE - [10:0] */
325#define WM8400_ADCLRC_RATE_WIDTH 11 /* ADCLRC_RATE - [10:0] */
326
327/*
328 * R10 (0x0A) - Audio Interface (4)
329 */
330#define WM8400_ALRCGPIO1 0x8000 /* ALRCGPIO1 */
331#define WM8400_ALRCGPIO1_MASK 0x8000 /* ALRCGPIO1 */
332#define WM8400_ALRCGPIO1_SHIFT 15 /* ALRCGPIO1 */
333#define WM8400_ALRCGPIO1_WIDTH 1 /* ALRCGPIO1 */
334#define WM8400_ALRCBGPIO6 0x4000 /* ALRCBGPIO6 */
335#define WM8400_ALRCBGPIO6_MASK 0x4000 /* ALRCBGPIO6 */
336#define WM8400_ALRCBGPIO6_SHIFT 14 /* ALRCBGPIO6 */
337#define WM8400_ALRCBGPIO6_WIDTH 1 /* ALRCBGPIO6 */
338#define WM8400_AIF_TRIS 0x2000 /* AIF_TRIS */
339#define WM8400_AIF_TRIS_MASK 0x2000 /* AIF_TRIS */
340#define WM8400_AIF_TRIS_SHIFT 13 /* AIF_TRIS */
341#define WM8400_AIF_TRIS_WIDTH 1 /* AIF_TRIS */
342#define WM8400_DACLRC_DIR 0x0800 /* DACLRC_DIR */
343#define WM8400_DACLRC_DIR_MASK 0x0800 /* DACLRC_DIR */
344#define WM8400_DACLRC_DIR_SHIFT 11 /* DACLRC_DIR */
345#define WM8400_DACLRC_DIR_WIDTH 1 /* DACLRC_DIR */
346#define WM8400_DACLRC_RATE_MASK 0x07FF /* DACLRC_RATE - [10:0] */
347#define WM8400_DACLRC_RATE_SHIFT 0 /* DACLRC_RATE - [10:0] */
348#define WM8400_DACLRC_RATE_WIDTH 11 /* DACLRC_RATE - [10:0] */
349
350/*
351 * R11 (0x0B) - DAC CTRL
352 */
353#define WM8400_DAC_SDMCLK_RATE 0x2000 /* DAC_SDMCLK_RATE */
354#define WM8400_DAC_SDMCLK_RATE_MASK 0x2000 /* DAC_SDMCLK_RATE */
355#define WM8400_DAC_SDMCLK_RATE_SHIFT 13 /* DAC_SDMCLK_RATE */
356#define WM8400_DAC_SDMCLK_RATE_WIDTH 1 /* DAC_SDMCLK_RATE */
357#define WM8400_AIF_LRCLKRATE 0x0400 /* AIF_LRCLKRATE */
358#define WM8400_AIF_LRCLKRATE_MASK 0x0400 /* AIF_LRCLKRATE */
359#define WM8400_AIF_LRCLKRATE_SHIFT 10 /* AIF_LRCLKRATE */
360#define WM8400_AIF_LRCLKRATE_WIDTH 1 /* AIF_LRCLKRATE */
361#define WM8400_DAC_MONO 0x0200 /* DAC_MONO */
362#define WM8400_DAC_MONO_MASK 0x0200 /* DAC_MONO */
363#define WM8400_DAC_MONO_SHIFT 9 /* DAC_MONO */
364#define WM8400_DAC_MONO_WIDTH 1 /* DAC_MONO */
365#define WM8400_DAC_SB_FILT 0x0100 /* DAC_SB_FILT */
366#define WM8400_DAC_SB_FILT_MASK 0x0100 /* DAC_SB_FILT */
367#define WM8400_DAC_SB_FILT_SHIFT 8 /* DAC_SB_FILT */
368#define WM8400_DAC_SB_FILT_WIDTH 1 /* DAC_SB_FILT */
369#define WM8400_DAC_MUTERATE 0x0080 /* DAC_MUTERATE */
370#define WM8400_DAC_MUTERATE_MASK 0x0080 /* DAC_MUTERATE */
371#define WM8400_DAC_MUTERATE_SHIFT 7 /* DAC_MUTERATE */
372#define WM8400_DAC_MUTERATE_WIDTH 1 /* DAC_MUTERATE */
373#define WM8400_DAC_MUTEMODE 0x0040 /* DAC_MUTEMODE */
374#define WM8400_DAC_MUTEMODE_MASK 0x0040 /* DAC_MUTEMODE */
375#define WM8400_DAC_MUTEMODE_SHIFT 6 /* DAC_MUTEMODE */
376#define WM8400_DAC_MUTEMODE_WIDTH 1 /* DAC_MUTEMODE */
377#define WM8400_DEEMP_MASK 0x0030 /* DEEMP - [5:4] */
378#define WM8400_DEEMP_SHIFT 4 /* DEEMP - [5:4] */
379#define WM8400_DEEMP_WIDTH 2 /* DEEMP - [5:4] */
380#define WM8400_DAC_MUTE 0x0004 /* DAC_MUTE */
381#define WM8400_DAC_MUTE_MASK 0x0004 /* DAC_MUTE */
382#define WM8400_DAC_MUTE_SHIFT 2 /* DAC_MUTE */
383#define WM8400_DAC_MUTE_WIDTH 1 /* DAC_MUTE */
384#define WM8400_DACL_DATINV 0x0002 /* DACL_DATINV */
385#define WM8400_DACL_DATINV_MASK 0x0002 /* DACL_DATINV */
386#define WM8400_DACL_DATINV_SHIFT 1 /* DACL_DATINV */
387#define WM8400_DACL_DATINV_WIDTH 1 /* DACL_DATINV */
388#define WM8400_DACR_DATINV 0x0001 /* DACR_DATINV */
389#define WM8400_DACR_DATINV_MASK 0x0001 /* DACR_DATINV */
390#define WM8400_DACR_DATINV_SHIFT 0 /* DACR_DATINV */
391#define WM8400_DACR_DATINV_WIDTH 1 /* DACR_DATINV */
392
393/*
394 * R12 (0x0C) - Left DAC Digital Volume
395 */
396#define WM8400_DAC_VU 0x0100 /* DAC_VU */
397#define WM8400_DAC_VU_MASK 0x0100 /* DAC_VU */
398#define WM8400_DAC_VU_SHIFT 8 /* DAC_VU */
399#define WM8400_DAC_VU_WIDTH 1 /* DAC_VU */
400#define WM8400_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */
401#define WM8400_DACL_VOL_SHIFT 0 /* DACL_VOL - [7:0] */
402#define WM8400_DACL_VOL_WIDTH 8 /* DACL_VOL - [7:0] */
403
404/*
405 * R13 (0x0D) - Right DAC Digital Volume
406 */
407#define WM8400_DAC_VU 0x0100 /* DAC_VU */
408#define WM8400_DAC_VU_MASK 0x0100 /* DAC_VU */
409#define WM8400_DAC_VU_SHIFT 8 /* DAC_VU */
410#define WM8400_DAC_VU_WIDTH 1 /* DAC_VU */
411#define WM8400_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */
412#define WM8400_DACR_VOL_SHIFT 0 /* DACR_VOL - [7:0] */
413#define WM8400_DACR_VOL_WIDTH 8 /* DACR_VOL - [7:0] */
414
415/*
416 * R14 (0x0E) - Digital Side Tone
417 */
418#define WM8400_ADCL_DAC_SVOL_MASK 0x1E00 /* ADCL_DAC_SVOL - [12:9] */
419#define WM8400_ADCL_DAC_SVOL_SHIFT 9 /* ADCL_DAC_SVOL - [12:9] */
420#define WM8400_ADCL_DAC_SVOL_WIDTH 4 /* ADCL_DAC_SVOL - [12:9] */
421#define WM8400_ADCR_DAC_SVOL_MASK 0x01E0 /* ADCR_DAC_SVOL - [8:5] */
422#define WM8400_ADCR_DAC_SVOL_SHIFT 5 /* ADCR_DAC_SVOL - [8:5] */
423#define WM8400_ADCR_DAC_SVOL_WIDTH 4 /* ADCR_DAC_SVOL - [8:5] */
424#define WM8400_ADC_TO_DACL_MASK 0x000C /* ADC_TO_DACL - [3:2] */
425#define WM8400_ADC_TO_DACL_SHIFT 2 /* ADC_TO_DACL - [3:2] */
426#define WM8400_ADC_TO_DACL_WIDTH 2 /* ADC_TO_DACL - [3:2] */
427#define WM8400_ADC_TO_DACR_MASK 0x0003 /* ADC_TO_DACR - [1:0] */
428#define WM8400_ADC_TO_DACR_SHIFT 0 /* ADC_TO_DACR - [1:0] */
429#define WM8400_ADC_TO_DACR_WIDTH 2 /* ADC_TO_DACR - [1:0] */
430
431/*
432 * R15 (0x0F) - ADC CTRL
433 */
434#define WM8400_ADC_HPF_ENA 0x0100 /* ADC_HPF_ENA */
435#define WM8400_ADC_HPF_ENA_MASK 0x0100 /* ADC_HPF_ENA */
436#define WM8400_ADC_HPF_ENA_SHIFT 8 /* ADC_HPF_ENA */
437#define WM8400_ADC_HPF_ENA_WIDTH 1 /* ADC_HPF_ENA */
438#define WM8400_ADC_HPF_CUT_MASK 0x0060 /* ADC_HPF_CUT - [6:5] */
439#define WM8400_ADC_HPF_CUT_SHIFT 5 /* ADC_HPF_CUT - [6:5] */
440#define WM8400_ADC_HPF_CUT_WIDTH 2 /* ADC_HPF_CUT - [6:5] */
441#define WM8400_ADCL_DATINV 0x0002 /* ADCL_DATINV */
442#define WM8400_ADCL_DATINV_MASK 0x0002 /* ADCL_DATINV */
443#define WM8400_ADCL_DATINV_SHIFT 1 /* ADCL_DATINV */
444#define WM8400_ADCL_DATINV_WIDTH 1 /* ADCL_DATINV */
445#define WM8400_ADCR_DATINV 0x0001 /* ADCR_DATINV */
446#define WM8400_ADCR_DATINV_MASK 0x0001 /* ADCR_DATINV */
447#define WM8400_ADCR_DATINV_SHIFT 0 /* ADCR_DATINV */
448#define WM8400_ADCR_DATINV_WIDTH 1 /* ADCR_DATINV */
449
450/*
451 * R16 (0x10) - Left ADC Digital Volume
452 */
453#define WM8400_ADC_VU 0x0100 /* ADC_VU */
454#define WM8400_ADC_VU_MASK 0x0100 /* ADC_VU */
455#define WM8400_ADC_VU_SHIFT 8 /* ADC_VU */
456#define WM8400_ADC_VU_WIDTH 1 /* ADC_VU */
457#define WM8400_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */
458#define WM8400_ADCL_VOL_SHIFT 0 /* ADCL_VOL - [7:0] */
459#define WM8400_ADCL_VOL_WIDTH 8 /* ADCL_VOL - [7:0] */
460
461/*
462 * R17 (0x11) - Right ADC Digital Volume
463 */
464#define WM8400_ADC_VU 0x0100 /* ADC_VU */
465#define WM8400_ADC_VU_MASK 0x0100 /* ADC_VU */
466#define WM8400_ADC_VU_SHIFT 8 /* ADC_VU */
467#define WM8400_ADC_VU_WIDTH 1 /* ADC_VU */
468#define WM8400_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */
469#define WM8400_ADCR_VOL_SHIFT 0 /* ADCR_VOL - [7:0] */
470#define WM8400_ADCR_VOL_WIDTH 8 /* ADCR_VOL - [7:0] */
471
472/*
473 * R24 (0x18) - Left Line Input 1&2 Volume
474 */
475#define WM8400_IPVU 0x0100 /* IPVU */
476#define WM8400_IPVU_MASK 0x0100 /* IPVU */
477#define WM8400_IPVU_SHIFT 8 /* IPVU */
478#define WM8400_IPVU_WIDTH 1 /* IPVU */
479#define WM8400_LI12MUTE 0x0080 /* LI12MUTE */
480#define WM8400_LI12MUTE_MASK 0x0080 /* LI12MUTE */
481#define WM8400_LI12MUTE_SHIFT 7 /* LI12MUTE */
482#define WM8400_LI12MUTE_WIDTH 1 /* LI12MUTE */
483#define WM8400_LI12ZC 0x0040 /* LI12ZC */
484#define WM8400_LI12ZC_MASK 0x0040 /* LI12ZC */
485#define WM8400_LI12ZC_SHIFT 6 /* LI12ZC */
486#define WM8400_LI12ZC_WIDTH 1 /* LI12ZC */
487#define WM8400_LIN12VOL_MASK 0x001F /* LIN12VOL - [4:0] */
488#define WM8400_LIN12VOL_SHIFT 0 /* LIN12VOL - [4:0] */
489#define WM8400_LIN12VOL_WIDTH 5 /* LIN12VOL - [4:0] */
490
491/*
492 * R25 (0x19) - Left Line Input 3&4 Volume
493 */
494#define WM8400_IPVU 0x0100 /* IPVU */
495#define WM8400_IPVU_MASK 0x0100 /* IPVU */
496#define WM8400_IPVU_SHIFT 8 /* IPVU */
497#define WM8400_IPVU_WIDTH 1 /* IPVU */
498#define WM8400_LI34MUTE 0x0080 /* LI34MUTE */
499#define WM8400_LI34MUTE_MASK 0x0080 /* LI34MUTE */
500#define WM8400_LI34MUTE_SHIFT 7 /* LI34MUTE */
501#define WM8400_LI34MUTE_WIDTH 1 /* LI34MUTE */
502#define WM8400_LI34ZC 0x0040 /* LI34ZC */
503#define WM8400_LI34ZC_MASK 0x0040 /* LI34ZC */
504#define WM8400_LI34ZC_SHIFT 6 /* LI34ZC */
505#define WM8400_LI34ZC_WIDTH 1 /* LI34ZC */
506#define WM8400_LIN34VOL_MASK 0x001F /* LIN34VOL - [4:0] */
507#define WM8400_LIN34VOL_SHIFT 0 /* LIN34VOL - [4:0] */
508#define WM8400_LIN34VOL_WIDTH 5 /* LIN34VOL - [4:0] */
509
510/*
511 * R26 (0x1A) - Right Line Input 1&2 Volume
512 */
513#define WM8400_IPVU 0x0100 /* IPVU */
514#define WM8400_IPVU_MASK 0x0100 /* IPVU */
515#define WM8400_IPVU_SHIFT 8 /* IPVU */
516#define WM8400_IPVU_WIDTH 1 /* IPVU */
517#define WM8400_RI12MUTE 0x0080 /* RI12MUTE */
518#define WM8400_RI12MUTE_MASK 0x0080 /* RI12MUTE */
519#define WM8400_RI12MUTE_SHIFT 7 /* RI12MUTE */
520#define WM8400_RI12MUTE_WIDTH 1 /* RI12MUTE */
521#define WM8400_RI12ZC 0x0040 /* RI12ZC */
522#define WM8400_RI12ZC_MASK 0x0040 /* RI12ZC */
523#define WM8400_RI12ZC_SHIFT 6 /* RI12ZC */
524#define WM8400_RI12ZC_WIDTH 1 /* RI12ZC */
525#define WM8400_RIN12VOL_MASK 0x001F /* RIN12VOL - [4:0] */
526#define WM8400_RIN12VOL_SHIFT 0 /* RIN12VOL - [4:0] */
527#define WM8400_RIN12VOL_WIDTH 5 /* RIN12VOL - [4:0] */
528
529/*
530 * R27 (0x1B) - Right Line Input 3&4 Volume
531 */
532#define WM8400_IPVU 0x0100 /* IPVU */
533#define WM8400_IPVU_MASK 0x0100 /* IPVU */
534#define WM8400_IPVU_SHIFT 8 /* IPVU */
535#define WM8400_IPVU_WIDTH 1 /* IPVU */
536#define WM8400_RI34MUTE 0x0080 /* RI34MUTE */
537#define WM8400_RI34MUTE_MASK 0x0080 /* RI34MUTE */
538#define WM8400_RI34MUTE_SHIFT 7 /* RI34MUTE */
539#define WM8400_RI34MUTE_WIDTH 1 /* RI34MUTE */
540#define WM8400_RI34ZC 0x0040 /* RI34ZC */
541#define WM8400_RI34ZC_MASK 0x0040 /* RI34ZC */
542#define WM8400_RI34ZC_SHIFT 6 /* RI34ZC */
543#define WM8400_RI34ZC_WIDTH 1 /* RI34ZC */
544#define WM8400_RIN34VOL_MASK 0x001F /* RIN34VOL - [4:0] */
545#define WM8400_RIN34VOL_SHIFT 0 /* RIN34VOL - [4:0] */
546#define WM8400_RIN34VOL_WIDTH 5 /* RIN34VOL - [4:0] */
547
548/*
549 * R28 (0x1C) - Left Output Volume
550 */
551#define WM8400_OPVU 0x0100 /* OPVU */
552#define WM8400_OPVU_MASK 0x0100 /* OPVU */
553#define WM8400_OPVU_SHIFT 8 /* OPVU */
554#define WM8400_OPVU_WIDTH 1 /* OPVU */
555#define WM8400_LOZC 0x0080 /* LOZC */
556#define WM8400_LOZC_MASK 0x0080 /* LOZC */
557#define WM8400_LOZC_SHIFT 7 /* LOZC */
558#define WM8400_LOZC_WIDTH 1 /* LOZC */
559#define WM8400_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */
560#define WM8400_LOUTVOL_SHIFT 0 /* LOUTVOL - [6:0] */
561#define WM8400_LOUTVOL_WIDTH 7 /* LOUTVOL - [6:0] */
562
563/*
564 * R29 (0x1D) - Right Output Volume
565 */
566#define WM8400_OPVU 0x0100 /* OPVU */
567#define WM8400_OPVU_MASK 0x0100 /* OPVU */
568#define WM8400_OPVU_SHIFT 8 /* OPVU */
569#define WM8400_OPVU_WIDTH 1 /* OPVU */
570#define WM8400_ROZC 0x0080 /* ROZC */
571#define WM8400_ROZC_MASK 0x0080 /* ROZC */
572#define WM8400_ROZC_SHIFT 7 /* ROZC */
573#define WM8400_ROZC_WIDTH 1 /* ROZC */
574#define WM8400_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */
575#define WM8400_ROUTVOL_SHIFT 0 /* ROUTVOL - [6:0] */
576#define WM8400_ROUTVOL_WIDTH 7 /* ROUTVOL - [6:0] */
577
578/*
579 * R30 (0x1E) - Line Outputs Volume
580 */
581#define WM8400_LONMUTE 0x0040 /* LONMUTE */
582#define WM8400_LONMUTE_MASK 0x0040 /* LONMUTE */
583#define WM8400_LONMUTE_SHIFT 6 /* LONMUTE */
584#define WM8400_LONMUTE_WIDTH 1 /* LONMUTE */
585#define WM8400_LOPMUTE 0x0020 /* LOPMUTE */
586#define WM8400_LOPMUTE_MASK 0x0020 /* LOPMUTE */
587#define WM8400_LOPMUTE_SHIFT 5 /* LOPMUTE */
588#define WM8400_LOPMUTE_WIDTH 1 /* LOPMUTE */
589#define WM8400_LOATTN 0x0010 /* LOATTN */
590#define WM8400_LOATTN_MASK 0x0010 /* LOATTN */
591#define WM8400_LOATTN_SHIFT 4 /* LOATTN */
592#define WM8400_LOATTN_WIDTH 1 /* LOATTN */
593#define WM8400_RONMUTE 0x0004 /* RONMUTE */
594#define WM8400_RONMUTE_MASK 0x0004 /* RONMUTE */
595#define WM8400_RONMUTE_SHIFT 2 /* RONMUTE */
596#define WM8400_RONMUTE_WIDTH 1 /* RONMUTE */
597#define WM8400_ROPMUTE 0x0002 /* ROPMUTE */
598#define WM8400_ROPMUTE_MASK 0x0002 /* ROPMUTE */
599#define WM8400_ROPMUTE_SHIFT 1 /* ROPMUTE */
600#define WM8400_ROPMUTE_WIDTH 1 /* ROPMUTE */
601#define WM8400_ROATTN 0x0001 /* ROATTN */
602#define WM8400_ROATTN_MASK 0x0001 /* ROATTN */
603#define WM8400_ROATTN_SHIFT 0 /* ROATTN */
604#define WM8400_ROATTN_WIDTH 1 /* ROATTN */
605
606/*
607 * R31 (0x1F) - Out3/4 Volume
608 */
609#define WM8400_OUT3MUTE 0x0020 /* OUT3MUTE */
610#define WM8400_OUT3MUTE_MASK 0x0020 /* OUT3MUTE */
611#define WM8400_OUT3MUTE_SHIFT 5 /* OUT3MUTE */
612#define WM8400_OUT3MUTE_WIDTH 1 /* OUT3MUTE */
613#define WM8400_OUT3ATTN 0x0010 /* OUT3ATTN */
614#define WM8400_OUT3ATTN_MASK 0x0010 /* OUT3ATTN */
615#define WM8400_OUT3ATTN_SHIFT 4 /* OUT3ATTN */
616#define WM8400_OUT3ATTN_WIDTH 1 /* OUT3ATTN */
617#define WM8400_OUT4MUTE 0x0002 /* OUT4MUTE */
618#define WM8400_OUT4MUTE_MASK 0x0002 /* OUT4MUTE */
619#define WM8400_OUT4MUTE_SHIFT 1 /* OUT4MUTE */
620#define WM8400_OUT4MUTE_WIDTH 1 /* OUT4MUTE */
621#define WM8400_OUT4ATTN 0x0001 /* OUT4ATTN */
622#define WM8400_OUT4ATTN_MASK 0x0001 /* OUT4ATTN */
623#define WM8400_OUT4ATTN_SHIFT 0 /* OUT4ATTN */
624#define WM8400_OUT4ATTN_WIDTH 1 /* OUT4ATTN */
625
626/*
627 * R32 (0x20) - Left OPGA Volume
628 */
629#define WM8400_OPVU 0x0100 /* OPVU */
630#define WM8400_OPVU_MASK 0x0100 /* OPVU */
631#define WM8400_OPVU_SHIFT 8 /* OPVU */
632#define WM8400_OPVU_WIDTH 1 /* OPVU */
633#define WM8400_LOPGAZC 0x0080 /* LOPGAZC */
634#define WM8400_LOPGAZC_MASK 0x0080 /* LOPGAZC */
635#define WM8400_LOPGAZC_SHIFT 7 /* LOPGAZC */
636#define WM8400_LOPGAZC_WIDTH 1 /* LOPGAZC */
637#define WM8400_LOPGAVOL_MASK 0x007F /* LOPGAVOL - [6:0] */
638#define WM8400_LOPGAVOL_SHIFT 0 /* LOPGAVOL - [6:0] */
639#define WM8400_LOPGAVOL_WIDTH 7 /* LOPGAVOL - [6:0] */
640
641/*
642 * R33 (0x21) - Right OPGA Volume
643 */
644#define WM8400_OPVU 0x0100 /* OPVU */
645#define WM8400_OPVU_MASK 0x0100 /* OPVU */
646#define WM8400_OPVU_SHIFT 8 /* OPVU */
647#define WM8400_OPVU_WIDTH 1 /* OPVU */
648#define WM8400_ROPGAZC 0x0080 /* ROPGAZC */
649#define WM8400_ROPGAZC_MASK 0x0080 /* ROPGAZC */
650#define WM8400_ROPGAZC_SHIFT 7 /* ROPGAZC */
651#define WM8400_ROPGAZC_WIDTH 1 /* ROPGAZC */
652#define WM8400_ROPGAVOL_MASK 0x007F /* ROPGAVOL - [6:0] */
653#define WM8400_ROPGAVOL_SHIFT 0 /* ROPGAVOL - [6:0] */
654#define WM8400_ROPGAVOL_WIDTH 7 /* ROPGAVOL - [6:0] */
655
656/*
657 * R34 (0x22) - Speaker Volume
658 */
659#define WM8400_SPKATTN_MASK 0x0003 /* SPKATTN - [1:0] */
660#define WM8400_SPKATTN_SHIFT 0 /* SPKATTN - [1:0] */
661#define WM8400_SPKATTN_WIDTH 2 /* SPKATTN - [1:0] */
662
663/*
664 * R35 (0x23) - ClassD1
665 */
666#define WM8400_CDMODE 0x0100 /* CDMODE */
667#define WM8400_CDMODE_MASK 0x0100 /* CDMODE */
668#define WM8400_CDMODE_SHIFT 8 /* CDMODE */
669#define WM8400_CDMODE_WIDTH 1 /* CDMODE */
670#define WM8400_CLASSD_CLK_SEL 0x0080 /* CLASSD_CLK_SEL */
671#define WM8400_CLASSD_CLK_SEL_MASK 0x0080 /* CLASSD_CLK_SEL */
672#define WM8400_CLASSD_CLK_SEL_SHIFT 7 /* CLASSD_CLK_SEL */
673#define WM8400_CLASSD_CLK_SEL_WIDTH 1 /* CLASSD_CLK_SEL */
674#define WM8400_CD_SRCTRL 0x0040 /* CD_SRCTRL */
675#define WM8400_CD_SRCTRL_MASK 0x0040 /* CD_SRCTRL */
676#define WM8400_CD_SRCTRL_SHIFT 6 /* CD_SRCTRL */
677#define WM8400_CD_SRCTRL_WIDTH 1 /* CD_SRCTRL */
678#define WM8400_SPKNOPOP 0x0020 /* SPKNOPOP */
679#define WM8400_SPKNOPOP_MASK 0x0020 /* SPKNOPOP */
680#define WM8400_SPKNOPOP_SHIFT 5 /* SPKNOPOP */
681#define WM8400_SPKNOPOP_WIDTH 1 /* SPKNOPOP */
682#define WM8400_DBLERATE 0x0010 /* DBLERATE */
683#define WM8400_DBLERATE_MASK 0x0010 /* DBLERATE */
684#define WM8400_DBLERATE_SHIFT 4 /* DBLERATE */
685#define WM8400_DBLERATE_WIDTH 1 /* DBLERATE */
686#define WM8400_LOOPTEST 0x0008 /* LOOPTEST */
687#define WM8400_LOOPTEST_MASK 0x0008 /* LOOPTEST */
688#define WM8400_LOOPTEST_SHIFT 3 /* LOOPTEST */
689#define WM8400_LOOPTEST_WIDTH 1 /* LOOPTEST */
690#define WM8400_HALFABBIAS 0x0004 /* HALFABBIAS */
691#define WM8400_HALFABBIAS_MASK 0x0004 /* HALFABBIAS */
692#define WM8400_HALFABBIAS_SHIFT 2 /* HALFABBIAS */
693#define WM8400_HALFABBIAS_WIDTH 1 /* HALFABBIAS */
694#define WM8400_TRIDEL_MASK 0x0003 /* TRIDEL - [1:0] */
695#define WM8400_TRIDEL_SHIFT 0 /* TRIDEL - [1:0] */
696#define WM8400_TRIDEL_WIDTH 2 /* TRIDEL - [1:0] */
697
698/*
699 * R37 (0x25) - ClassD3
700 */
701#define WM8400_DCGAIN_MASK 0x0038 /* DCGAIN - [5:3] */
702#define WM8400_DCGAIN_SHIFT 3 /* DCGAIN - [5:3] */
703#define WM8400_DCGAIN_WIDTH 3 /* DCGAIN - [5:3] */
704#define WM8400_ACGAIN_MASK 0x0007 /* ACGAIN - [2:0] */
705#define WM8400_ACGAIN_SHIFT 0 /* ACGAIN - [2:0] */
706#define WM8400_ACGAIN_WIDTH 3 /* ACGAIN - [2:0] */
707
708/*
709 * R39 (0x27) - Input Mixer1
710 */
711#define WM8400_AINLMODE_MASK 0x000C /* AINLMODE - [3:2] */
712#define WM8400_AINLMODE_SHIFT 2 /* AINLMODE - [3:2] */
713#define WM8400_AINLMODE_WIDTH 2 /* AINLMODE - [3:2] */
714#define WM8400_AINRMODE_MASK 0x0003 /* AINRMODE - [1:0] */
715#define WM8400_AINRMODE_SHIFT 0 /* AINRMODE - [1:0] */
716#define WM8400_AINRMODE_WIDTH 2 /* AINRMODE - [1:0] */
717
718/*
719 * R40 (0x28) - Input Mixer2
720 */
721#define WM8400_LMP4 0x0080 /* LMP4 */
722#define WM8400_LMP4_MASK 0x0080 /* LMP4 */
723#define WM8400_LMP4_SHIFT 7 /* LMP4 */
724#define WM8400_LMP4_WIDTH 1 /* LMP4 */
725#define WM8400_LMN3 0x0040 /* LMN3 */
726#define WM8400_LMN3_MASK 0x0040 /* LMN3 */
727#define WM8400_LMN3_SHIFT 6 /* LMN3 */
728#define WM8400_LMN3_WIDTH 1 /* LMN3 */
729#define WM8400_LMP2 0x0020 /* LMP2 */
730#define WM8400_LMP2_MASK 0x0020 /* LMP2 */
731#define WM8400_LMP2_SHIFT 5 /* LMP2 */
732#define WM8400_LMP2_WIDTH 1 /* LMP2 */
733#define WM8400_LMN1 0x0010 /* LMN1 */
734#define WM8400_LMN1_MASK 0x0010 /* LMN1 */
735#define WM8400_LMN1_SHIFT 4 /* LMN1 */
736#define WM8400_LMN1_WIDTH 1 /* LMN1 */
737#define WM8400_RMP4 0x0008 /* RMP4 */
738#define WM8400_RMP4_MASK 0x0008 /* RMP4 */
739#define WM8400_RMP4_SHIFT 3 /* RMP4 */
740#define WM8400_RMP4_WIDTH 1 /* RMP4 */
741#define WM8400_RMN3 0x0004 /* RMN3 */
742#define WM8400_RMN3_MASK 0x0004 /* RMN3 */
743#define WM8400_RMN3_SHIFT 2 /* RMN3 */
744#define WM8400_RMN3_WIDTH 1 /* RMN3 */
745#define WM8400_RMP2 0x0002 /* RMP2 */
746#define WM8400_RMP2_MASK 0x0002 /* RMP2 */
747#define WM8400_RMP2_SHIFT 1 /* RMP2 */
748#define WM8400_RMP2_WIDTH 1 /* RMP2 */
749#define WM8400_RMN1 0x0001 /* RMN1 */
750#define WM8400_RMN1_MASK 0x0001 /* RMN1 */
751#define WM8400_RMN1_SHIFT 0 /* RMN1 */
752#define WM8400_RMN1_WIDTH 1 /* RMN1 */
753
754/*
755 * R41 (0x29) - Input Mixer3
756 */
757#define WM8400_L34MNB 0x0100 /* L34MNB */
758#define WM8400_L34MNB_MASK 0x0100 /* L34MNB */
759#define WM8400_L34MNB_SHIFT 8 /* L34MNB */
760#define WM8400_L34MNB_WIDTH 1 /* L34MNB */
761#define WM8400_L34MNBST 0x0080 /* L34MNBST */
762#define WM8400_L34MNBST_MASK 0x0080 /* L34MNBST */
763#define WM8400_L34MNBST_SHIFT 7 /* L34MNBST */
764#define WM8400_L34MNBST_WIDTH 1 /* L34MNBST */
765#define WM8400_L12MNB 0x0020 /* L12MNB */
766#define WM8400_L12MNB_MASK 0x0020 /* L12MNB */
767#define WM8400_L12MNB_SHIFT 5 /* L12MNB */
768#define WM8400_L12MNB_WIDTH 1 /* L12MNB */
769#define WM8400_L12MNBST 0x0010 /* L12MNBST */
770#define WM8400_L12MNBST_MASK 0x0010 /* L12MNBST */
771#define WM8400_L12MNBST_SHIFT 4 /* L12MNBST */
772#define WM8400_L12MNBST_WIDTH 1 /* L12MNBST */
773#define WM8400_LDBVOL_MASK 0x0007 /* LDBVOL - [2:0] */
774#define WM8400_LDBVOL_SHIFT 0 /* LDBVOL - [2:0] */
775#define WM8400_LDBVOL_WIDTH 3 /* LDBVOL - [2:0] */
776
777/*
778 * R42 (0x2A) - Input Mixer4
779 */
780#define WM8400_R34MNB 0x0100 /* R34MNB */
781#define WM8400_R34MNB_MASK 0x0100 /* R34MNB */
782#define WM8400_R34MNB_SHIFT 8 /* R34MNB */
783#define WM8400_R34MNB_WIDTH 1 /* R34MNB */
784#define WM8400_R34MNBST 0x0080 /* R34MNBST */
785#define WM8400_R34MNBST_MASK 0x0080 /* R34MNBST */
786#define WM8400_R34MNBST_SHIFT 7 /* R34MNBST */
787#define WM8400_R34MNBST_WIDTH 1 /* R34MNBST */
788#define WM8400_R12MNB 0x0020 /* R12MNB */
789#define WM8400_R12MNB_MASK 0x0020 /* R12MNB */
790#define WM8400_R12MNB_SHIFT 5 /* R12MNB */
791#define WM8400_R12MNB_WIDTH 1 /* R12MNB */
792#define WM8400_R12MNBST 0x0010 /* R12MNBST */
793#define WM8400_R12MNBST_MASK 0x0010 /* R12MNBST */
794#define WM8400_R12MNBST_SHIFT 4 /* R12MNBST */
795#define WM8400_R12MNBST_WIDTH 1 /* R12MNBST */
796#define WM8400_RDBVOL_MASK 0x0007 /* RDBVOL - [2:0] */
797#define WM8400_RDBVOL_SHIFT 0 /* RDBVOL - [2:0] */
798#define WM8400_RDBVOL_WIDTH 3 /* RDBVOL - [2:0] */
799
800/*
801 * R43 (0x2B) - Input Mixer5
802 */
803#define WM8400_LI2BVOL_MASK 0x01C0 /* LI2BVOL - [8:6] */
804#define WM8400_LI2BVOL_SHIFT 6 /* LI2BVOL - [8:6] */
805#define WM8400_LI2BVOL_WIDTH 3 /* LI2BVOL - [8:6] */
806#define WM8400_LR4BVOL_MASK 0x0038 /* LR4BVOL - [5:3] */
807#define WM8400_LR4BVOL_SHIFT 3 /* LR4BVOL - [5:3] */
808#define WM8400_LR4BVOL_WIDTH 3 /* LR4BVOL - [5:3] */
809#define WM8400_LL4BVOL_MASK 0x0007 /* LL4BVOL - [2:0] */
810#define WM8400_LL4BVOL_SHIFT 0 /* LL4BVOL - [2:0] */
811#define WM8400_LL4BVOL_WIDTH 3 /* LL4BVOL - [2:0] */
812
813/*
814 * R44 (0x2C) - Input Mixer6
815 */
816#define WM8400_RI2BVOL_MASK 0x01C0 /* RI2BVOL - [8:6] */
817#define WM8400_RI2BVOL_SHIFT 6 /* RI2BVOL - [8:6] */
818#define WM8400_RI2BVOL_WIDTH 3 /* RI2BVOL - [8:6] */
819#define WM8400_RL4BVOL_MASK 0x0038 /* RL4BVOL - [5:3] */
820#define WM8400_RL4BVOL_SHIFT 3 /* RL4BVOL - [5:3] */
821#define WM8400_RL4BVOL_WIDTH 3 /* RL4BVOL - [5:3] */
822#define WM8400_RR4BVOL_MASK 0x0007 /* RR4BVOL - [2:0] */
823#define WM8400_RR4BVOL_SHIFT 0 /* RR4BVOL - [2:0] */
824#define WM8400_RR4BVOL_WIDTH 3 /* RR4BVOL - [2:0] */
825
826/*
827 * R45 (0x2D) - Output Mixer1
828 */
829#define WM8400_LRBLO 0x0080 /* LRBLO */
830#define WM8400_LRBLO_MASK 0x0080 /* LRBLO */
831#define WM8400_LRBLO_SHIFT 7 /* LRBLO */
832#define WM8400_LRBLO_WIDTH 1 /* LRBLO */
833#define WM8400_LLBLO 0x0040 /* LLBLO */
834#define WM8400_LLBLO_MASK 0x0040 /* LLBLO */
835#define WM8400_LLBLO_SHIFT 6 /* LLBLO */
836#define WM8400_LLBLO_WIDTH 1 /* LLBLO */
837#define WM8400_LRI3LO 0x0020 /* LRI3LO */
838#define WM8400_LRI3LO_MASK 0x0020 /* LRI3LO */
839#define WM8400_LRI3LO_SHIFT 5 /* LRI3LO */
840#define WM8400_LRI3LO_WIDTH 1 /* LRI3LO */
841#define WM8400_LLI3LO 0x0010 /* LLI3LO */
842#define WM8400_LLI3LO_MASK 0x0010 /* LLI3LO */
843#define WM8400_LLI3LO_SHIFT 4 /* LLI3LO */
844#define WM8400_LLI3LO_WIDTH 1 /* LLI3LO */
845#define WM8400_LR12LO 0x0008 /* LR12LO */
846#define WM8400_LR12LO_MASK 0x0008 /* LR12LO */
847#define WM8400_LR12LO_SHIFT 3 /* LR12LO */
848#define WM8400_LR12LO_WIDTH 1 /* LR12LO */
849#define WM8400_LL12LO 0x0004 /* LL12LO */
850#define WM8400_LL12LO_MASK 0x0004 /* LL12LO */
851#define WM8400_LL12LO_SHIFT 2 /* LL12LO */
852#define WM8400_LL12LO_WIDTH 1 /* LL12LO */
853#define WM8400_LDLO 0x0001 /* LDLO */
854#define WM8400_LDLO_MASK 0x0001 /* LDLO */
855#define WM8400_LDLO_SHIFT 0 /* LDLO */
856#define WM8400_LDLO_WIDTH 1 /* LDLO */
857
858/*
859 * R46 (0x2E) - Output Mixer2
860 */
861#define WM8400_RLBRO 0x0080 /* RLBRO */
862#define WM8400_RLBRO_MASK 0x0080 /* RLBRO */
863#define WM8400_RLBRO_SHIFT 7 /* RLBRO */
864#define WM8400_RLBRO_WIDTH 1 /* RLBRO */
865#define WM8400_RRBRO 0x0040 /* RRBRO */
866#define WM8400_RRBRO_MASK 0x0040 /* RRBRO */
867#define WM8400_RRBRO_SHIFT 6 /* RRBRO */
868#define WM8400_RRBRO_WIDTH 1 /* RRBRO */
869#define WM8400_RLI3RO 0x0020 /* RLI3RO */
870#define WM8400_RLI3RO_MASK 0x0020 /* RLI3RO */
871#define WM8400_RLI3RO_SHIFT 5 /* RLI3RO */
872#define WM8400_RLI3RO_WIDTH 1 /* RLI3RO */
873#define WM8400_RRI3RO 0x0010 /* RRI3RO */
874#define WM8400_RRI3RO_MASK 0x0010 /* RRI3RO */
875#define WM8400_RRI3RO_SHIFT 4 /* RRI3RO */
876#define WM8400_RRI3RO_WIDTH 1 /* RRI3RO */
877#define WM8400_RL12RO 0x0008 /* RL12RO */
878#define WM8400_RL12RO_MASK 0x0008 /* RL12RO */
879#define WM8400_RL12RO_SHIFT 3 /* RL12RO */
880#define WM8400_RL12RO_WIDTH 1 /* RL12RO */
881#define WM8400_RR12RO 0x0004 /* RR12RO */
882#define WM8400_RR12RO_MASK 0x0004 /* RR12RO */
883#define WM8400_RR12RO_SHIFT 2 /* RR12RO */
884#define WM8400_RR12RO_WIDTH 1 /* RR12RO */
885#define WM8400_RDRO 0x0001 /* RDRO */
886#define WM8400_RDRO_MASK 0x0001 /* RDRO */
887#define WM8400_RDRO_SHIFT 0 /* RDRO */
888#define WM8400_RDRO_WIDTH 1 /* RDRO */
889
890/*
891 * R47 (0x2F) - Output Mixer3
892 */
893#define WM8400_LLI3LOVOL_MASK 0x01C0 /* LLI3LOVOL - [8:6] */
894#define WM8400_LLI3LOVOL_SHIFT 6 /* LLI3LOVOL - [8:6] */
895#define WM8400_LLI3LOVOL_WIDTH 3 /* LLI3LOVOL - [8:6] */
896#define WM8400_LR12LOVOL_MASK 0x0038 /* LR12LOVOL - [5:3] */
897#define WM8400_LR12LOVOL_SHIFT 3 /* LR12LOVOL - [5:3] */
898#define WM8400_LR12LOVOL_WIDTH 3 /* LR12LOVOL - [5:3] */
899#define WM8400_LL12LOVOL_MASK 0x0007 /* LL12LOVOL - [2:0] */
900#define WM8400_LL12LOVOL_SHIFT 0 /* LL12LOVOL - [2:0] */
901#define WM8400_LL12LOVOL_WIDTH 3 /* LL12LOVOL - [2:0] */
902
903/*
904 * R48 (0x30) - Output Mixer4
905 */
906#define WM8400_RRI3ROVOL_MASK 0x01C0 /* RRI3ROVOL - [8:6] */
907#define WM8400_RRI3ROVOL_SHIFT 6 /* RRI3ROVOL - [8:6] */
908#define WM8400_RRI3ROVOL_WIDTH 3 /* RRI3ROVOL - [8:6] */
909#define WM8400_RL12ROVOL_MASK 0x0038 /* RL12ROVOL - [5:3] */
910#define WM8400_RL12ROVOL_SHIFT 3 /* RL12ROVOL - [5:3] */
911#define WM8400_RL12ROVOL_WIDTH 3 /* RL12ROVOL - [5:3] */
912#define WM8400_RR12ROVOL_MASK 0x0007 /* RR12ROVOL - [2:0] */
913#define WM8400_RR12ROVOL_SHIFT 0 /* RR12ROVOL - [2:0] */
914#define WM8400_RR12ROVOL_WIDTH 3 /* RR12ROVOL - [2:0] */
915
916/*
917 * R49 (0x31) - Output Mixer5
918 */
919#define WM8400_LRI3LOVOL_MASK 0x01C0 /* LRI3LOVOL - [8:6] */
920#define WM8400_LRI3LOVOL_SHIFT 6 /* LRI3LOVOL - [8:6] */
921#define WM8400_LRI3LOVOL_WIDTH 3 /* LRI3LOVOL - [8:6] */
922#define WM8400_LRBLOVOL_MASK 0x0038 /* LRBLOVOL - [5:3] */
923#define WM8400_LRBLOVOL_SHIFT 3 /* LRBLOVOL - [5:3] */
924#define WM8400_LRBLOVOL_WIDTH 3 /* LRBLOVOL - [5:3] */
925#define WM8400_LLBLOVOL_MASK 0x0007 /* LLBLOVOL - [2:0] */
926#define WM8400_LLBLOVOL_SHIFT 0 /* LLBLOVOL - [2:0] */
927#define WM8400_LLBLOVOL_WIDTH 3 /* LLBLOVOL - [2:0] */
928
929/*
930 * R50 (0x32) - Output Mixer6
931 */
932#define WM8400_RLI3ROVOL_MASK 0x01C0 /* RLI3ROVOL - [8:6] */
933#define WM8400_RLI3ROVOL_SHIFT 6 /* RLI3ROVOL - [8:6] */
934#define WM8400_RLI3ROVOL_WIDTH 3 /* RLI3ROVOL - [8:6] */
935#define WM8400_RLBROVOL_MASK 0x0038 /* RLBROVOL - [5:3] */
936#define WM8400_RLBROVOL_SHIFT 3 /* RLBROVOL - [5:3] */
937#define WM8400_RLBROVOL_WIDTH 3 /* RLBROVOL - [5:3] */
938#define WM8400_RRBROVOL_MASK 0x0007 /* RRBROVOL - [2:0] */
939#define WM8400_RRBROVOL_SHIFT 0 /* RRBROVOL - [2:0] */
940#define WM8400_RRBROVOL_WIDTH 3 /* RRBROVOL - [2:0] */
941
942/*
943 * R51 (0x33) - Out3/4 Mixer
944 */
945#define WM8400_VSEL_MASK 0x0180 /* VSEL - [8:7] */
946#define WM8400_VSEL_SHIFT 7 /* VSEL - [8:7] */
947#define WM8400_VSEL_WIDTH 2 /* VSEL - [8:7] */
948#define WM8400_LI4O3 0x0020 /* LI4O3 */
949#define WM8400_LI4O3_MASK 0x0020 /* LI4O3 */
950#define WM8400_LI4O3_SHIFT 5 /* LI4O3 */
951#define WM8400_LI4O3_WIDTH 1 /* LI4O3 */
952#define WM8400_LPGAO3 0x0010 /* LPGAO3 */
953#define WM8400_LPGAO3_MASK 0x0010 /* LPGAO3 */
954#define WM8400_LPGAO3_SHIFT 4 /* LPGAO3 */
955#define WM8400_LPGAO3_WIDTH 1 /* LPGAO3 */
956#define WM8400_RI4O4 0x0002 /* RI4O4 */
957#define WM8400_RI4O4_MASK 0x0002 /* RI4O4 */
958#define WM8400_RI4O4_SHIFT 1 /* RI4O4 */
959#define WM8400_RI4O4_WIDTH 1 /* RI4O4 */
960#define WM8400_RPGAO4 0x0001 /* RPGAO4 */
961#define WM8400_RPGAO4_MASK 0x0001 /* RPGAO4 */
962#define WM8400_RPGAO4_SHIFT 0 /* RPGAO4 */
963#define WM8400_RPGAO4_WIDTH 1 /* RPGAO4 */
964
965/*
966 * R52 (0x34) - Line Mixer1
967 */
968#define WM8400_LLOPGALON 0x0040 /* LLOPGALON */
969#define WM8400_LLOPGALON_MASK 0x0040 /* LLOPGALON */
970#define WM8400_LLOPGALON_SHIFT 6 /* LLOPGALON */
971#define WM8400_LLOPGALON_WIDTH 1 /* LLOPGALON */
972#define WM8400_LROPGALON 0x0020 /* LROPGALON */
973#define WM8400_LROPGALON_MASK 0x0020 /* LROPGALON */
974#define WM8400_LROPGALON_SHIFT 5 /* LROPGALON */
975#define WM8400_LROPGALON_WIDTH 1 /* LROPGALON */
976#define WM8400_LOPLON 0x0010 /* LOPLON */
977#define WM8400_LOPLON_MASK 0x0010 /* LOPLON */
978#define WM8400_LOPLON_SHIFT 4 /* LOPLON */
979#define WM8400_LOPLON_WIDTH 1 /* LOPLON */
980#define WM8400_LR12LOP 0x0004 /* LR12LOP */
981#define WM8400_LR12LOP_MASK 0x0004 /* LR12LOP */
982#define WM8400_LR12LOP_SHIFT 2 /* LR12LOP */
983#define WM8400_LR12LOP_WIDTH 1 /* LR12LOP */
984#define WM8400_LL12LOP 0x0002 /* LL12LOP */
985#define WM8400_LL12LOP_MASK 0x0002 /* LL12LOP */
986#define WM8400_LL12LOP_SHIFT 1 /* LL12LOP */
987#define WM8400_LL12LOP_WIDTH 1 /* LL12LOP */
988#define WM8400_LLOPGALOP 0x0001 /* LLOPGALOP */
989#define WM8400_LLOPGALOP_MASK 0x0001 /* LLOPGALOP */
990#define WM8400_LLOPGALOP_SHIFT 0 /* LLOPGALOP */
991#define WM8400_LLOPGALOP_WIDTH 1 /* LLOPGALOP */
992
993/*
994 * R53 (0x35) - Line Mixer2
995 */
996#define WM8400_RROPGARON 0x0040 /* RROPGARON */
997#define WM8400_RROPGARON_MASK 0x0040 /* RROPGARON */
998#define WM8400_RROPGARON_SHIFT 6 /* RROPGARON */
999#define WM8400_RROPGARON_WIDTH 1 /* RROPGARON */
1000#define WM8400_RLOPGARON 0x0020 /* RLOPGARON */
1001#define WM8400_RLOPGARON_MASK 0x0020 /* RLOPGARON */
1002#define WM8400_RLOPGARON_SHIFT 5 /* RLOPGARON */
1003#define WM8400_RLOPGARON_WIDTH 1 /* RLOPGARON */
1004#define WM8400_ROPRON 0x0010 /* ROPRON */
1005#define WM8400_ROPRON_MASK 0x0010 /* ROPRON */
1006#define WM8400_ROPRON_SHIFT 4 /* ROPRON */
1007#define WM8400_ROPRON_WIDTH 1 /* ROPRON */
1008#define WM8400_RL12ROP 0x0004 /* RL12ROP */
1009#define WM8400_RL12ROP_MASK 0x0004 /* RL12ROP */
1010#define WM8400_RL12ROP_SHIFT 2 /* RL12ROP */
1011#define WM8400_RL12ROP_WIDTH 1 /* RL12ROP */
1012#define WM8400_RR12ROP 0x0002 /* RR12ROP */
1013#define WM8400_RR12ROP_MASK 0x0002 /* RR12ROP */
1014#define WM8400_RR12ROP_SHIFT 1 /* RR12ROP */
1015#define WM8400_RR12ROP_WIDTH 1 /* RR12ROP */
1016#define WM8400_RROPGAROP 0x0001 /* RROPGAROP */
1017#define WM8400_RROPGAROP_MASK 0x0001 /* RROPGAROP */
1018#define WM8400_RROPGAROP_SHIFT 0 /* RROPGAROP */
1019#define WM8400_RROPGAROP_WIDTH 1 /* RROPGAROP */
1020
1021/*
1022 * R54 (0x36) - Speaker Mixer
1023 */
1024#define WM8400_LB2SPK 0x0080 /* LB2SPK */
1025#define WM8400_LB2SPK_MASK 0x0080 /* LB2SPK */
1026#define WM8400_LB2SPK_SHIFT 7 /* LB2SPK */
1027#define WM8400_LB2SPK_WIDTH 1 /* LB2SPK */
1028#define WM8400_RB2SPK 0x0040 /* RB2SPK */
1029#define WM8400_RB2SPK_MASK 0x0040 /* RB2SPK */
1030#define WM8400_RB2SPK_SHIFT 6 /* RB2SPK */
1031#define WM8400_RB2SPK_WIDTH 1 /* RB2SPK */
1032#define WM8400_LI2SPK 0x0020 /* LI2SPK */
1033#define WM8400_LI2SPK_MASK 0x0020 /* LI2SPK */
1034#define WM8400_LI2SPK_SHIFT 5 /* LI2SPK */
1035#define WM8400_LI2SPK_WIDTH 1 /* LI2SPK */
1036#define WM8400_RI2SPK 0x0010 /* RI2SPK */
1037#define WM8400_RI2SPK_MASK 0x0010 /* RI2SPK */
1038#define WM8400_RI2SPK_SHIFT 4 /* RI2SPK */
1039#define WM8400_RI2SPK_WIDTH 1 /* RI2SPK */
1040#define WM8400_LOPGASPK 0x0008 /* LOPGASPK */
1041#define WM8400_LOPGASPK_MASK 0x0008 /* LOPGASPK */
1042#define WM8400_LOPGASPK_SHIFT 3 /* LOPGASPK */
1043#define WM8400_LOPGASPK_WIDTH 1 /* LOPGASPK */
1044#define WM8400_ROPGASPK 0x0004 /* ROPGASPK */
1045#define WM8400_ROPGASPK_MASK 0x0004 /* ROPGASPK */
1046#define WM8400_ROPGASPK_SHIFT 2 /* ROPGASPK */
1047#define WM8400_ROPGASPK_WIDTH 1 /* ROPGASPK */
1048#define WM8400_LDSPK 0x0002 /* LDSPK */
1049#define WM8400_LDSPK_MASK 0x0002 /* LDSPK */
1050#define WM8400_LDSPK_SHIFT 1 /* LDSPK */
1051#define WM8400_LDSPK_WIDTH 1 /* LDSPK */
1052#define WM8400_RDSPK 0x0001 /* RDSPK */
1053#define WM8400_RDSPK_MASK 0x0001 /* RDSPK */
1054#define WM8400_RDSPK_SHIFT 0 /* RDSPK */
1055#define WM8400_RDSPK_WIDTH 1 /* RDSPK */
1056
1057/*
1058 * R55 (0x37) - Additional Control
1059 */
1060#define WM8400_VROI 0x0001 /* VROI */
1061#define WM8400_VROI_MASK 0x0001 /* VROI */
1062#define WM8400_VROI_SHIFT 0 /* VROI */
1063#define WM8400_VROI_WIDTH 1 /* VROI */
1064
1065/*
1066 * R56 (0x38) - AntiPOP1
1067 */
1068#define WM8400_DIS_LLINE 0x0020 /* DIS_LLINE */
1069#define WM8400_DIS_LLINE_MASK 0x0020 /* DIS_LLINE */
1070#define WM8400_DIS_LLINE_SHIFT 5 /* DIS_LLINE */
1071#define WM8400_DIS_LLINE_WIDTH 1 /* DIS_LLINE */
1072#define WM8400_DIS_RLINE 0x0010 /* DIS_RLINE */
1073#define WM8400_DIS_RLINE_MASK 0x0010 /* DIS_RLINE */
1074#define WM8400_DIS_RLINE_SHIFT 4 /* DIS_RLINE */
1075#define WM8400_DIS_RLINE_WIDTH 1 /* DIS_RLINE */
1076#define WM8400_DIS_OUT3 0x0008 /* DIS_OUT3 */
1077#define WM8400_DIS_OUT3_MASK 0x0008 /* DIS_OUT3 */
1078#define WM8400_DIS_OUT3_SHIFT 3 /* DIS_OUT3 */
1079#define WM8400_DIS_OUT3_WIDTH 1 /* DIS_OUT3 */
1080#define WM8400_DIS_OUT4 0x0004 /* DIS_OUT4 */
1081#define WM8400_DIS_OUT4_MASK 0x0004 /* DIS_OUT4 */
1082#define WM8400_DIS_OUT4_SHIFT 2 /* DIS_OUT4 */
1083#define WM8400_DIS_OUT4_WIDTH 1 /* DIS_OUT4 */
1084#define WM8400_DIS_LOUT 0x0002 /* DIS_LOUT */
1085#define WM8400_DIS_LOUT_MASK 0x0002 /* DIS_LOUT */
1086#define WM8400_DIS_LOUT_SHIFT 1 /* DIS_LOUT */
1087#define WM8400_DIS_LOUT_WIDTH 1 /* DIS_LOUT */
1088#define WM8400_DIS_ROUT 0x0001 /* DIS_ROUT */
1089#define WM8400_DIS_ROUT_MASK 0x0001 /* DIS_ROUT */
1090#define WM8400_DIS_ROUT_SHIFT 0 /* DIS_ROUT */
1091#define WM8400_DIS_ROUT_WIDTH 1 /* DIS_ROUT */
1092
1093/*
1094 * R57 (0x39) - AntiPOP2
1095 */
1096#define WM8400_SOFTST 0x0040 /* SOFTST */
1097#define WM8400_SOFTST_MASK 0x0040 /* SOFTST */
1098#define WM8400_SOFTST_SHIFT 6 /* SOFTST */
1099#define WM8400_SOFTST_WIDTH 1 /* SOFTST */
1100#define WM8400_BUFIOEN 0x0008 /* BUFIOEN */
1101#define WM8400_BUFIOEN_MASK 0x0008 /* BUFIOEN */
1102#define WM8400_BUFIOEN_SHIFT 3 /* BUFIOEN */
1103#define WM8400_BUFIOEN_WIDTH 1 /* BUFIOEN */
1104#define WM8400_BUFDCOPEN 0x0004 /* BUFDCOPEN */
1105#define WM8400_BUFDCOPEN_MASK 0x0004 /* BUFDCOPEN */
1106#define WM8400_BUFDCOPEN_SHIFT 2 /* BUFDCOPEN */
1107#define WM8400_BUFDCOPEN_WIDTH 1 /* BUFDCOPEN */
1108#define WM8400_POBCTRL 0x0002 /* POBCTRL */
1109#define WM8400_POBCTRL_MASK 0x0002 /* POBCTRL */
1110#define WM8400_POBCTRL_SHIFT 1 /* POBCTRL */
1111#define WM8400_POBCTRL_WIDTH 1 /* POBCTRL */
1112#define WM8400_VMIDTOG 0x0001 /* VMIDTOG */
1113#define WM8400_VMIDTOG_MASK 0x0001 /* VMIDTOG */
1114#define WM8400_VMIDTOG_SHIFT 0 /* VMIDTOG */
1115#define WM8400_VMIDTOG_WIDTH 1 /* VMIDTOG */
1116
1117/*
1118 * R58 (0x3A) - MICBIAS
1119 */
1120#define WM8400_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */
1121#define WM8400_MCDSCTH_SHIFT 6 /* MCDSCTH - [7:6] */
1122#define WM8400_MCDSCTH_WIDTH 2 /* MCDSCTH - [7:6] */
1123#define WM8400_MCDTHR_MASK 0x0038 /* MCDTHR - [5:3] */
1124#define WM8400_MCDTHR_SHIFT 3 /* MCDTHR - [5:3] */
1125#define WM8400_MCDTHR_WIDTH 3 /* MCDTHR - [5:3] */
1126#define WM8400_MCD 0x0004 /* MCD */
1127#define WM8400_MCD_MASK 0x0004 /* MCD */
1128#define WM8400_MCD_SHIFT 2 /* MCD */
1129#define WM8400_MCD_WIDTH 1 /* MCD */
1130#define WM8400_MBSEL 0x0001 /* MBSEL */
1131#define WM8400_MBSEL_MASK 0x0001 /* MBSEL */
1132#define WM8400_MBSEL_SHIFT 0 /* MBSEL */
1133#define WM8400_MBSEL_WIDTH 1 /* MBSEL */
1134
1135/*
1136 * R60 (0x3C) - FLL Control 1
1137 */
1138#define WM8400_FLL_REF_FREQ 0x1000 /* FLL_REF_FREQ */
1139#define WM8400_FLL_REF_FREQ_MASK 0x1000 /* FLL_REF_FREQ */
1140#define WM8400_FLL_REF_FREQ_SHIFT 12 /* FLL_REF_FREQ */
1141#define WM8400_FLL_REF_FREQ_WIDTH 1 /* FLL_REF_FREQ */
1142#define WM8400_FLL_CLK_SRC_MASK 0x0C00 /* FLL_CLK_SRC - [11:10] */
1143#define WM8400_FLL_CLK_SRC_SHIFT 10 /* FLL_CLK_SRC - [11:10] */
1144#define WM8400_FLL_CLK_SRC_WIDTH 2 /* FLL_CLK_SRC - [11:10] */
1145#define WM8400_FLL_FRAC 0x0200 /* FLL_FRAC */
1146#define WM8400_FLL_FRAC_MASK 0x0200 /* FLL_FRAC */
1147#define WM8400_FLL_FRAC_SHIFT 9 /* FLL_FRAC */
1148#define WM8400_FLL_FRAC_WIDTH 1 /* FLL_FRAC */
1149#define WM8400_FLL_OSC_ENA 0x0100 /* FLL_OSC_ENA */
1150#define WM8400_FLL_OSC_ENA_MASK 0x0100 /* FLL_OSC_ENA */
1151#define WM8400_FLL_OSC_ENA_SHIFT 8 /* FLL_OSC_ENA */
1152#define WM8400_FLL_OSC_ENA_WIDTH 1 /* FLL_OSC_ENA */
1153#define WM8400_FLL_CTRL_RATE_MASK 0x00E0 /* FLL_CTRL_RATE - [7:5] */
1154#define WM8400_FLL_CTRL_RATE_SHIFT 5 /* FLL_CTRL_RATE - [7:5] */
1155#define WM8400_FLL_CTRL_RATE_WIDTH 3 /* FLL_CTRL_RATE - [7:5] */
1156#define WM8400_FLL_FRATIO_MASK 0x001F /* FLL_FRATIO - [4:0] */
1157#define WM8400_FLL_FRATIO_SHIFT 0 /* FLL_FRATIO - [4:0] */
1158#define WM8400_FLL_FRATIO_WIDTH 5 /* FLL_FRATIO - [4:0] */
1159
1160/*
1161 * R61 (0x3D) - FLL Control 2
1162 */
1163#define WM8400_FLL_K_MASK 0xFFFF /* FLL_K - [15:0] */
1164#define WM8400_FLL_K_SHIFT 0 /* FLL_K - [15:0] */
1165#define WM8400_FLL_K_WIDTH 16 /* FLL_K - [15:0] */
1166
1167/*
1168 * R62 (0x3E) - FLL Control 3
1169 */
1170#define WM8400_FLL_N_MASK 0x03FF /* FLL_N - [9:0] */
1171#define WM8400_FLL_N_SHIFT 0 /* FLL_N - [9:0] */
1172#define WM8400_FLL_N_WIDTH 10 /* FLL_N - [9:0] */
1173
1174/*
1175 * R63 (0x3F) - FLL Control 4
1176 */
1177#define WM8400_FLL_TRK_GAIN_MASK 0x0078 /* FLL_TRK_GAIN - [6:3] */
1178#define WM8400_FLL_TRK_GAIN_SHIFT 3 /* FLL_TRK_GAIN - [6:3] */
1179#define WM8400_FLL_TRK_GAIN_WIDTH 4 /* FLL_TRK_GAIN - [6:3] */
1180#define WM8400_FLL_OUTDIV_MASK 0x0007 /* FLL_OUTDIV - [2:0] */
1181#define WM8400_FLL_OUTDIV_SHIFT 0 /* FLL_OUTDIV - [2:0] */
1182#define WM8400_FLL_OUTDIV_WIDTH 3 /* FLL_OUTDIV - [2:0] */
1183
1184void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400);
1185
1186#endif
diff --git a/include/linux/mfd/wm8400-private.h b/include/linux/mfd/wm8400-private.h
new file mode 100644
index 000000000000..2aab4e93a5c9
--- /dev/null
+++ b/include/linux/mfd/wm8400-private.h
@@ -0,0 +1,936 @@
1/*
2 * wm8400 private definitions.
3 *
4 * Copyright 2008 Wolfson Microelectronics plc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef __LINUX_MFD_WM8400_PRIV_H
22#define __LINUX_MFD_WM8400_PRIV_H
23
24#include <linux/mfd/wm8400.h>
25#include <linux/mutex.h>
26#include <linux/platform_device.h>
27
28#define WM8400_REGISTER_COUNT 0x55
29
30struct wm8400 {
31 struct device *dev;
32
33 int (*read_dev)(void *data, char reg, int count, u16 *dst);
34 int (*write_dev)(void *data, char reg, int count, const u16 *src);
35
36 struct mutex io_lock;
37 void *io_data;
38
39 u16 reg_cache[WM8400_REGISTER_COUNT];
40
41 struct platform_device regulators[6];
42};
43
44/*
45 * Register values.
46 */
47#define WM8400_RESET_ID 0x00
48#define WM8400_ID 0x01
49#define WM8400_POWER_MANAGEMENT_1 0x02
50#define WM8400_POWER_MANAGEMENT_2 0x03
51#define WM8400_POWER_MANAGEMENT_3 0x04
52#define WM8400_AUDIO_INTERFACE_1 0x05
53#define WM8400_AUDIO_INTERFACE_2 0x06
54#define WM8400_CLOCKING_1 0x07
55#define WM8400_CLOCKING_2 0x08
56#define WM8400_AUDIO_INTERFACE_3 0x09
57#define WM8400_AUDIO_INTERFACE_4 0x0A
58#define WM8400_DAC_CTRL 0x0B
59#define WM8400_LEFT_DAC_DIGITAL_VOLUME 0x0C
60#define WM8400_RIGHT_DAC_DIGITAL_VOLUME 0x0D
61#define WM8400_DIGITAL_SIDE_TONE 0x0E
62#define WM8400_ADC_CTRL 0x0F
63#define WM8400_LEFT_ADC_DIGITAL_VOLUME 0x10
64#define WM8400_RIGHT_ADC_DIGITAL_VOLUME 0x11
65#define WM8400_GPIO_CTRL_1 0x12
66#define WM8400_GPIO1_GPIO2 0x13
67#define WM8400_GPIO3_GPIO4 0x14
68#define WM8400_GPIO5_GPIO6 0x15
69#define WM8400_GPIOCTRL_2 0x16
70#define WM8400_GPIO_POL 0x17
71#define WM8400_LEFT_LINE_INPUT_1_2_VOLUME 0x18
72#define WM8400_LEFT_LINE_INPUT_3_4_VOLUME 0x19
73#define WM8400_RIGHT_LINE_INPUT_1_2_VOLUME 0x1A
74#define WM8400_RIGHT_LINE_INPUT_3_4_VOLUME 0x1B
75#define WM8400_LEFT_OUTPUT_VOLUME 0x1C
76#define WM8400_RIGHT_OUTPUT_VOLUME 0x1D
77#define WM8400_LINE_OUTPUTS_VOLUME 0x1E
78#define WM8400_OUT3_4_VOLUME 0x1F
79#define WM8400_LEFT_OPGA_VOLUME 0x20
80#define WM8400_RIGHT_OPGA_VOLUME 0x21
81#define WM8400_SPEAKER_VOLUME 0x22
82#define WM8400_CLASSD1 0x23
83#define WM8400_CLASSD3 0x25
84#define WM8400_INPUT_MIXER1 0x27
85#define WM8400_INPUT_MIXER2 0x28
86#define WM8400_INPUT_MIXER3 0x29
87#define WM8400_INPUT_MIXER4 0x2A
88#define WM8400_INPUT_MIXER5 0x2B
89#define WM8400_INPUT_MIXER6 0x2C
90#define WM8400_OUTPUT_MIXER1 0x2D
91#define WM8400_OUTPUT_MIXER2 0x2E
92#define WM8400_OUTPUT_MIXER3 0x2F
93#define WM8400_OUTPUT_MIXER4 0x30
94#define WM8400_OUTPUT_MIXER5 0x31
95#define WM8400_OUTPUT_MIXER6 0x32
96#define WM8400_OUT3_4_MIXER 0x33
97#define WM8400_LINE_MIXER1 0x34
98#define WM8400_LINE_MIXER2 0x35
99#define WM8400_SPEAKER_MIXER 0x36
100#define WM8400_ADDITIONAL_CONTROL 0x37
101#define WM8400_ANTIPOP1 0x38
102#define WM8400_ANTIPOP2 0x39
103#define WM8400_MICBIAS 0x3A
104#define WM8400_FLL_CONTROL_1 0x3C
105#define WM8400_FLL_CONTROL_2 0x3D
106#define WM8400_FLL_CONTROL_3 0x3E
107#define WM8400_FLL_CONTROL_4 0x3F
108#define WM8400_LDO1_CONTROL 0x41
109#define WM8400_LDO2_CONTROL 0x42
110#define WM8400_LDO3_CONTROL 0x43
111#define WM8400_LDO4_CONTROL 0x44
112#define WM8400_DCDC1_CONTROL_1 0x46
113#define WM8400_DCDC1_CONTROL_2 0x47
114#define WM8400_DCDC2_CONTROL_1 0x48
115#define WM8400_DCDC2_CONTROL_2 0x49
116#define WM8400_INTERFACE 0x4B
117#define WM8400_PM_GENERAL 0x4C
118#define WM8400_PM_SHUTDOWN_CONTROL 0x4E
119#define WM8400_INTERRUPT_STATUS_1 0x4F
120#define WM8400_INTERRUPT_STATUS_1_MASK 0x50
121#define WM8400_INTERRUPT_LEVELS 0x51
122#define WM8400_SHUTDOWN_REASON 0x52
123#define WM8400_LINE_CIRCUITS 0x54
124
125/*
126 * Field Definitions.
127 */
128
129/*
130 * R0 (0x00) - Reset/ID
131 */
132#define WM8400_SW_RESET_CHIP_ID_MASK 0xFFFF /* SW_RESET/CHIP_ID - [15:0] */
133#define WM8400_SW_RESET_CHIP_ID_SHIFT 0 /* SW_RESET/CHIP_ID - [15:0] */
134#define WM8400_SW_RESET_CHIP_ID_WIDTH 16 /* SW_RESET/CHIP_ID - [15:0] */
135
136/*
137 * R1 (0x01) - ID
138 */
139#define WM8400_CHIP_REV_MASK 0x7000 /* CHIP_REV - [14:12] */
140#define WM8400_CHIP_REV_SHIFT 12 /* CHIP_REV - [14:12] */
141#define WM8400_CHIP_REV_WIDTH 3 /* CHIP_REV - [14:12] */
142
143/*
144 * R18 (0x12) - GPIO CTRL 1
145 */
146#define WM8400_IRQ 0x1000 /* IRQ */
147#define WM8400_IRQ_MASK 0x1000 /* IRQ */
148#define WM8400_IRQ_SHIFT 12 /* IRQ */
149#define WM8400_IRQ_WIDTH 1 /* IRQ */
150#define WM8400_TEMPOK 0x0800 /* TEMPOK */
151#define WM8400_TEMPOK_MASK 0x0800 /* TEMPOK */
152#define WM8400_TEMPOK_SHIFT 11 /* TEMPOK */
153#define WM8400_TEMPOK_WIDTH 1 /* TEMPOK */
154#define WM8400_MIC1SHRT 0x0400 /* MIC1SHRT */
155#define WM8400_MIC1SHRT_MASK 0x0400 /* MIC1SHRT */
156#define WM8400_MIC1SHRT_SHIFT 10 /* MIC1SHRT */
157#define WM8400_MIC1SHRT_WIDTH 1 /* MIC1SHRT */
158#define WM8400_MIC1DET 0x0200 /* MIC1DET */
159#define WM8400_MIC1DET_MASK 0x0200 /* MIC1DET */
160#define WM8400_MIC1DET_SHIFT 9 /* MIC1DET */
161#define WM8400_MIC1DET_WIDTH 1 /* MIC1DET */
162#define WM8400_FLL_LCK 0x0100 /* FLL_LCK */
163#define WM8400_FLL_LCK_MASK 0x0100 /* FLL_LCK */
164#define WM8400_FLL_LCK_SHIFT 8 /* FLL_LCK */
165#define WM8400_FLL_LCK_WIDTH 1 /* FLL_LCK */
166#define WM8400_GPIO_STATUS_MASK 0x00FF /* GPIO_STATUS - [7:0] */
167#define WM8400_GPIO_STATUS_SHIFT 0 /* GPIO_STATUS - [7:0] */
168#define WM8400_GPIO_STATUS_WIDTH 8 /* GPIO_STATUS - [7:0] */
169
170/*
171 * R19 (0x13) - GPIO1 & GPIO2
172 */
173#define WM8400_GPIO2_DEB_ENA 0x8000 /* GPIO2_DEB_ENA */
174#define WM8400_GPIO2_DEB_ENA_MASK 0x8000 /* GPIO2_DEB_ENA */
175#define WM8400_GPIO2_DEB_ENA_SHIFT 15 /* GPIO2_DEB_ENA */
176#define WM8400_GPIO2_DEB_ENA_WIDTH 1 /* GPIO2_DEB_ENA */
177#define WM8400_GPIO2_IRQ_ENA 0x4000 /* GPIO2_IRQ_ENA */
178#define WM8400_GPIO2_IRQ_ENA_MASK 0x4000 /* GPIO2_IRQ_ENA */
179#define WM8400_GPIO2_IRQ_ENA_SHIFT 14 /* GPIO2_IRQ_ENA */
180#define WM8400_GPIO2_IRQ_ENA_WIDTH 1 /* GPIO2_IRQ_ENA */
181#define WM8400_GPIO2_PU 0x2000 /* GPIO2_PU */
182#define WM8400_GPIO2_PU_MASK 0x2000 /* GPIO2_PU */
183#define WM8400_GPIO2_PU_SHIFT 13 /* GPIO2_PU */
184#define WM8400_GPIO2_PU_WIDTH 1 /* GPIO2_PU */
185#define WM8400_GPIO2_PD 0x1000 /* GPIO2_PD */
186#define WM8400_GPIO2_PD_MASK 0x1000 /* GPIO2_PD */
187#define WM8400_GPIO2_PD_SHIFT 12 /* GPIO2_PD */
188#define WM8400_GPIO2_PD_WIDTH 1 /* GPIO2_PD */
189#define WM8400_GPIO2_SEL_MASK 0x0F00 /* GPIO2_SEL - [11:8] */
190#define WM8400_GPIO2_SEL_SHIFT 8 /* GPIO2_SEL - [11:8] */
191#define WM8400_GPIO2_SEL_WIDTH 4 /* GPIO2_SEL - [11:8] */
192#define WM8400_GPIO1_DEB_ENA 0x0080 /* GPIO1_DEB_ENA */
193#define WM8400_GPIO1_DEB_ENA_MASK 0x0080 /* GPIO1_DEB_ENA */
194#define WM8400_GPIO1_DEB_ENA_SHIFT 7 /* GPIO1_DEB_ENA */
195#define WM8400_GPIO1_DEB_ENA_WIDTH 1 /* GPIO1_DEB_ENA */
196#define WM8400_GPIO1_IRQ_ENA 0x0040 /* GPIO1_IRQ_ENA */
197#define WM8400_GPIO1_IRQ_ENA_MASK 0x0040 /* GPIO1_IRQ_ENA */
198#define WM8400_GPIO1_IRQ_ENA_SHIFT 6 /* GPIO1_IRQ_ENA */
199#define WM8400_GPIO1_IRQ_ENA_WIDTH 1 /* GPIO1_IRQ_ENA */
200#define WM8400_GPIO1_PU 0x0020 /* GPIO1_PU */
201#define WM8400_GPIO1_PU_MASK 0x0020 /* GPIO1_PU */
202#define WM8400_GPIO1_PU_SHIFT 5 /* GPIO1_PU */
203#define WM8400_GPIO1_PU_WIDTH 1 /* GPIO1_PU */
204#define WM8400_GPIO1_PD 0x0010 /* GPIO1_PD */
205#define WM8400_GPIO1_PD_MASK 0x0010 /* GPIO1_PD */
206#define WM8400_GPIO1_PD_SHIFT 4 /* GPIO1_PD */
207#define WM8400_GPIO1_PD_WIDTH 1 /* GPIO1_PD */
208#define WM8400_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */
209#define WM8400_GPIO1_SEL_SHIFT 0 /* GPIO1_SEL - [3:0] */
210#define WM8400_GPIO1_SEL_WIDTH 4 /* GPIO1_SEL - [3:0] */
211
212/*
213 * R20 (0x14) - GPIO3 & GPIO4
214 */
215#define WM8400_GPIO4_DEB_ENA 0x8000 /* GPIO4_DEB_ENA */
216#define WM8400_GPIO4_DEB_ENA_MASK 0x8000 /* GPIO4_DEB_ENA */
217#define WM8400_GPIO4_DEB_ENA_SHIFT 15 /* GPIO4_DEB_ENA */
218#define WM8400_GPIO4_DEB_ENA_WIDTH 1 /* GPIO4_DEB_ENA */
219#define WM8400_GPIO4_IRQ_ENA 0x4000 /* GPIO4_IRQ_ENA */
220#define WM8400_GPIO4_IRQ_ENA_MASK 0x4000 /* GPIO4_IRQ_ENA */
221#define WM8400_GPIO4_IRQ_ENA_SHIFT 14 /* GPIO4_IRQ_ENA */
222#define WM8400_GPIO4_IRQ_ENA_WIDTH 1 /* GPIO4_IRQ_ENA */
223#define WM8400_GPIO4_PU 0x2000 /* GPIO4_PU */
224#define WM8400_GPIO4_PU_MASK 0x2000 /* GPIO4_PU */
225#define WM8400_GPIO4_PU_SHIFT 13 /* GPIO4_PU */
226#define WM8400_GPIO4_PU_WIDTH 1 /* GPIO4_PU */
227#define WM8400_GPIO4_PD 0x1000 /* GPIO4_PD */
228#define WM8400_GPIO4_PD_MASK 0x1000 /* GPIO4_PD */
229#define WM8400_GPIO4_PD_SHIFT 12 /* GPIO4_PD */
230#define WM8400_GPIO4_PD_WIDTH 1 /* GPIO4_PD */
231#define WM8400_GPIO4_SEL_MASK 0x0F00 /* GPIO4_SEL - [11:8] */
232#define WM8400_GPIO4_SEL_SHIFT 8 /* GPIO4_SEL - [11:8] */
233#define WM8400_GPIO4_SEL_WIDTH 4 /* GPIO4_SEL - [11:8] */
234#define WM8400_GPIO3_DEB_ENA 0x0080 /* GPIO3_DEB_ENA */
235#define WM8400_GPIO3_DEB_ENA_MASK 0x0080 /* GPIO3_DEB_ENA */
236#define WM8400_GPIO3_DEB_ENA_SHIFT 7 /* GPIO3_DEB_ENA */
237#define WM8400_GPIO3_DEB_ENA_WIDTH 1 /* GPIO3_DEB_ENA */
238#define WM8400_GPIO3_IRQ_ENA 0x0040 /* GPIO3_IRQ_ENA */
239#define WM8400_GPIO3_IRQ_ENA_MASK 0x0040 /* GPIO3_IRQ_ENA */
240#define WM8400_GPIO3_IRQ_ENA_SHIFT 6 /* GPIO3_IRQ_ENA */
241#define WM8400_GPIO3_IRQ_ENA_WIDTH 1 /* GPIO3_IRQ_ENA */
242#define WM8400_GPIO3_PU 0x0020 /* GPIO3_PU */
243#define WM8400_GPIO3_PU_MASK 0x0020 /* GPIO3_PU */
244#define WM8400_GPIO3_PU_SHIFT 5 /* GPIO3_PU */
245#define WM8400_GPIO3_PU_WIDTH 1 /* GPIO3_PU */
246#define WM8400_GPIO3_PD 0x0010 /* GPIO3_PD */
247#define WM8400_GPIO3_PD_MASK 0x0010 /* GPIO3_PD */
248#define WM8400_GPIO3_PD_SHIFT 4 /* GPIO3_PD */
249#define WM8400_GPIO3_PD_WIDTH 1 /* GPIO3_PD */
250#define WM8400_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */
251#define WM8400_GPIO3_SEL_SHIFT 0 /* GPIO3_SEL - [3:0] */
252#define WM8400_GPIO3_SEL_WIDTH 4 /* GPIO3_SEL - [3:0] */
253
254/*
255 * R21 (0x15) - GPIO5 & GPIO6
256 */
257#define WM8400_GPIO6_DEB_ENA 0x8000 /* GPIO6_DEB_ENA */
258#define WM8400_GPIO6_DEB_ENA_MASK 0x8000 /* GPIO6_DEB_ENA */
259#define WM8400_GPIO6_DEB_ENA_SHIFT 15 /* GPIO6_DEB_ENA */
260#define WM8400_GPIO6_DEB_ENA_WIDTH 1 /* GPIO6_DEB_ENA */
261#define WM8400_GPIO6_IRQ_ENA 0x4000 /* GPIO6_IRQ_ENA */
262#define WM8400_GPIO6_IRQ_ENA_MASK 0x4000 /* GPIO6_IRQ_ENA */
263#define WM8400_GPIO6_IRQ_ENA_SHIFT 14 /* GPIO6_IRQ_ENA */
264#define WM8400_GPIO6_IRQ_ENA_WIDTH 1 /* GPIO6_IRQ_ENA */
265#define WM8400_GPIO6_PU 0x2000 /* GPIO6_PU */
266#define WM8400_GPIO6_PU_MASK 0x2000 /* GPIO6_PU */
267#define WM8400_GPIO6_PU_SHIFT 13 /* GPIO6_PU */
268#define WM8400_GPIO6_PU_WIDTH 1 /* GPIO6_PU */
269#define WM8400_GPIO6_PD 0x1000 /* GPIO6_PD */
270#define WM8400_GPIO6_PD_MASK 0x1000 /* GPIO6_PD */
271#define WM8400_GPIO6_PD_SHIFT 12 /* GPIO6_PD */
272#define WM8400_GPIO6_PD_WIDTH 1 /* GPIO6_PD */
273#define WM8400_GPIO6_SEL_MASK 0x0F00 /* GPIO6_SEL - [11:8] */
274#define WM8400_GPIO6_SEL_SHIFT 8 /* GPIO6_SEL - [11:8] */
275#define WM8400_GPIO6_SEL_WIDTH 4 /* GPIO6_SEL - [11:8] */
276#define WM8400_GPIO5_DEB_ENA 0x0080 /* GPIO5_DEB_ENA */
277#define WM8400_GPIO5_DEB_ENA_MASK 0x0080 /* GPIO5_DEB_ENA */
278#define WM8400_GPIO5_DEB_ENA_SHIFT 7 /* GPIO5_DEB_ENA */
279#define WM8400_GPIO5_DEB_ENA_WIDTH 1 /* GPIO5_DEB_ENA */
280#define WM8400_GPIO5_IRQ_ENA 0x0040 /* GPIO5_IRQ_ENA */
281#define WM8400_GPIO5_IRQ_ENA_MASK 0x0040 /* GPIO5_IRQ_ENA */
282#define WM8400_GPIO5_IRQ_ENA_SHIFT 6 /* GPIO5_IRQ_ENA */
283#define WM8400_GPIO5_IRQ_ENA_WIDTH 1 /* GPIO5_IRQ_ENA */
284#define WM8400_GPIO5_PU 0x0020 /* GPIO5_PU */
285#define WM8400_GPIO5_PU_MASK 0x0020 /* GPIO5_PU */
286#define WM8400_GPIO5_PU_SHIFT 5 /* GPIO5_PU */
287#define WM8400_GPIO5_PU_WIDTH 1 /* GPIO5_PU */
288#define WM8400_GPIO5_PD 0x0010 /* GPIO5_PD */
289#define WM8400_GPIO5_PD_MASK 0x0010 /* GPIO5_PD */
290#define WM8400_GPIO5_PD_SHIFT 4 /* GPIO5_PD */
291#define WM8400_GPIO5_PD_WIDTH 1 /* GPIO5_PD */
292#define WM8400_GPIO5_SEL_MASK 0x000F /* GPIO5_SEL - [3:0] */
293#define WM8400_GPIO5_SEL_SHIFT 0 /* GPIO5_SEL - [3:0] */
294#define WM8400_GPIO5_SEL_WIDTH 4 /* GPIO5_SEL - [3:0] */
295
296/*
297 * R22 (0x16) - GPIOCTRL 2
298 */
299#define WM8400_TEMPOK_IRQ_ENA 0x0800 /* TEMPOK_IRQ_ENA */
300#define WM8400_TEMPOK_IRQ_ENA_MASK 0x0800 /* TEMPOK_IRQ_ENA */
301#define WM8400_TEMPOK_IRQ_ENA_SHIFT 11 /* TEMPOK_IRQ_ENA */
302#define WM8400_TEMPOK_IRQ_ENA_WIDTH 1 /* TEMPOK_IRQ_ENA */
303#define WM8400_MIC1SHRT_IRQ_ENA 0x0400 /* MIC1SHRT_IRQ_ENA */
304#define WM8400_MIC1SHRT_IRQ_ENA_MASK 0x0400 /* MIC1SHRT_IRQ_ENA */
305#define WM8400_MIC1SHRT_IRQ_ENA_SHIFT 10 /* MIC1SHRT_IRQ_ENA */
306#define WM8400_MIC1SHRT_IRQ_ENA_WIDTH 1 /* MIC1SHRT_IRQ_ENA */
307#define WM8400_MIC1DET_IRQ_ENA 0x0200 /* MIC1DET_IRQ_ENA */
308#define WM8400_MIC1DET_IRQ_ENA_MASK 0x0200 /* MIC1DET_IRQ_ENA */
309#define WM8400_MIC1DET_IRQ_ENA_SHIFT 9 /* MIC1DET_IRQ_ENA */
310#define WM8400_MIC1DET_IRQ_ENA_WIDTH 1 /* MIC1DET_IRQ_ENA */
311#define WM8400_FLL_LCK_IRQ_ENA 0x0100 /* FLL_LCK_IRQ_ENA */
312#define WM8400_FLL_LCK_IRQ_ENA_MASK 0x0100 /* FLL_LCK_IRQ_ENA */
313#define WM8400_FLL_LCK_IRQ_ENA_SHIFT 8 /* FLL_LCK_IRQ_ENA */
314#define WM8400_FLL_LCK_IRQ_ENA_WIDTH 1 /* FLL_LCK_IRQ_ENA */
315#define WM8400_GPI8_DEB_ENA 0x0080 /* GPI8_DEB_ENA */
316#define WM8400_GPI8_DEB_ENA_MASK 0x0080 /* GPI8_DEB_ENA */
317#define WM8400_GPI8_DEB_ENA_SHIFT 7 /* GPI8_DEB_ENA */
318#define WM8400_GPI8_DEB_ENA_WIDTH 1 /* GPI8_DEB_ENA */
319#define WM8400_GPI8_IRQ_ENA 0x0040 /* GPI8_IRQ_ENA */
320#define WM8400_GPI8_IRQ_ENA_MASK 0x0040 /* GPI8_IRQ_ENA */
321#define WM8400_GPI8_IRQ_ENA_SHIFT 6 /* GPI8_IRQ_ENA */
322#define WM8400_GPI8_IRQ_ENA_WIDTH 1 /* GPI8_IRQ_ENA */
323#define WM8400_GPI8_ENA 0x0010 /* GPI8_ENA */
324#define WM8400_GPI8_ENA_MASK 0x0010 /* GPI8_ENA */
325#define WM8400_GPI8_ENA_SHIFT 4 /* GPI8_ENA */
326#define WM8400_GPI8_ENA_WIDTH 1 /* GPI8_ENA */
327#define WM8400_GPI7_DEB_ENA 0x0008 /* GPI7_DEB_ENA */
328#define WM8400_GPI7_DEB_ENA_MASK 0x0008 /* GPI7_DEB_ENA */
329#define WM8400_GPI7_DEB_ENA_SHIFT 3 /* GPI7_DEB_ENA */
330#define WM8400_GPI7_DEB_ENA_WIDTH 1 /* GPI7_DEB_ENA */
331#define WM8400_GPI7_IRQ_ENA 0x0004 /* GPI7_IRQ_ENA */
332#define WM8400_GPI7_IRQ_ENA_MASK 0x0004 /* GPI7_IRQ_ENA */
333#define WM8400_GPI7_IRQ_ENA_SHIFT 2 /* GPI7_IRQ_ENA */
334#define WM8400_GPI7_IRQ_ENA_WIDTH 1 /* GPI7_IRQ_ENA */
335#define WM8400_GPI7_ENA 0x0001 /* GPI7_ENA */
336#define WM8400_GPI7_ENA_MASK 0x0001 /* GPI7_ENA */
337#define WM8400_GPI7_ENA_SHIFT 0 /* GPI7_ENA */
338#define WM8400_GPI7_ENA_WIDTH 1 /* GPI7_ENA */
339
340/*
341 * R23 (0x17) - GPIO_POL
342 */
343#define WM8400_IRQ_INV 0x1000 /* IRQ_INV */
344#define WM8400_IRQ_INV_MASK 0x1000 /* IRQ_INV */
345#define WM8400_IRQ_INV_SHIFT 12 /* IRQ_INV */
346#define WM8400_IRQ_INV_WIDTH 1 /* IRQ_INV */
347#define WM8400_TEMPOK_POL 0x0800 /* TEMPOK_POL */
348#define WM8400_TEMPOK_POL_MASK 0x0800 /* TEMPOK_POL */
349#define WM8400_TEMPOK_POL_SHIFT 11 /* TEMPOK_POL */
350#define WM8400_TEMPOK_POL_WIDTH 1 /* TEMPOK_POL */
351#define WM8400_MIC1SHRT_POL 0x0400 /* MIC1SHRT_POL */
352#define WM8400_MIC1SHRT_POL_MASK 0x0400 /* MIC1SHRT_POL */
353#define WM8400_MIC1SHRT_POL_SHIFT 10 /* MIC1SHRT_POL */
354#define WM8400_MIC1SHRT_POL_WIDTH 1 /* MIC1SHRT_POL */
355#define WM8400_MIC1DET_POL 0x0200 /* MIC1DET_POL */
356#define WM8400_MIC1DET_POL_MASK 0x0200 /* MIC1DET_POL */
357#define WM8400_MIC1DET_POL_SHIFT 9 /* MIC1DET_POL */
358#define WM8400_MIC1DET_POL_WIDTH 1 /* MIC1DET_POL */
359#define WM8400_FLL_LCK_POL 0x0100 /* FLL_LCK_POL */
360#define WM8400_FLL_LCK_POL_MASK 0x0100 /* FLL_LCK_POL */
361#define WM8400_FLL_LCK_POL_SHIFT 8 /* FLL_LCK_POL */
362#define WM8400_FLL_LCK_POL_WIDTH 1 /* FLL_LCK_POL */
363#define WM8400_GPIO_POL_MASK 0x00FF /* GPIO_POL - [7:0] */
364#define WM8400_GPIO_POL_SHIFT 0 /* GPIO_POL - [7:0] */
365#define WM8400_GPIO_POL_WIDTH 8 /* GPIO_POL - [7:0] */
366
367/*
368 * R65 (0x41) - LDO 1 Control
369 */
370#define WM8400_LDO1_ENA 0x8000 /* LDO1_ENA */
371#define WM8400_LDO1_ENA_MASK 0x8000 /* LDO1_ENA */
372#define WM8400_LDO1_ENA_SHIFT 15 /* LDO1_ENA */
373#define WM8400_LDO1_ENA_WIDTH 1 /* LDO1_ENA */
374#define WM8400_LDO1_SWI 0x4000 /* LDO1_SWI */
375#define WM8400_LDO1_SWI_MASK 0x4000 /* LDO1_SWI */
376#define WM8400_LDO1_SWI_SHIFT 14 /* LDO1_SWI */
377#define WM8400_LDO1_SWI_WIDTH 1 /* LDO1_SWI */
378#define WM8400_LDO1_OPFLT 0x1000 /* LDO1_OPFLT */
379#define WM8400_LDO1_OPFLT_MASK 0x1000 /* LDO1_OPFLT */
380#define WM8400_LDO1_OPFLT_SHIFT 12 /* LDO1_OPFLT */
381#define WM8400_LDO1_OPFLT_WIDTH 1 /* LDO1_OPFLT */
382#define WM8400_LDO1_ERRACT 0x0800 /* LDO1_ERRACT */
383#define WM8400_LDO1_ERRACT_MASK 0x0800 /* LDO1_ERRACT */
384#define WM8400_LDO1_ERRACT_SHIFT 11 /* LDO1_ERRACT */
385#define WM8400_LDO1_ERRACT_WIDTH 1 /* LDO1_ERRACT */
386#define WM8400_LDO1_HIB_MODE 0x0400 /* LDO1_HIB_MODE */
387#define WM8400_LDO1_HIB_MODE_MASK 0x0400 /* LDO1_HIB_MODE */
388#define WM8400_LDO1_HIB_MODE_SHIFT 10 /* LDO1_HIB_MODE */
389#define WM8400_LDO1_HIB_MODE_WIDTH 1 /* LDO1_HIB_MODE */
390#define WM8400_LDO1_VIMG_MASK 0x03E0 /* LDO1_VIMG - [9:5] */
391#define WM8400_LDO1_VIMG_SHIFT 5 /* LDO1_VIMG - [9:5] */
392#define WM8400_LDO1_VIMG_WIDTH 5 /* LDO1_VIMG - [9:5] */
393#define WM8400_LDO1_VSEL_MASK 0x001F /* LDO1_VSEL - [4:0] */
394#define WM8400_LDO1_VSEL_SHIFT 0 /* LDO1_VSEL - [4:0] */
395#define WM8400_LDO1_VSEL_WIDTH 5 /* LDO1_VSEL - [4:0] */
396
397/*
398 * R66 (0x42) - LDO 2 Control
399 */
400#define WM8400_LDO2_ENA 0x8000 /* LDO2_ENA */
401#define WM8400_LDO2_ENA_MASK 0x8000 /* LDO2_ENA */
402#define WM8400_LDO2_ENA_SHIFT 15 /* LDO2_ENA */
403#define WM8400_LDO2_ENA_WIDTH 1 /* LDO2_ENA */
404#define WM8400_LDO2_SWI 0x4000 /* LDO2_SWI */
405#define WM8400_LDO2_SWI_MASK 0x4000 /* LDO2_SWI */
406#define WM8400_LDO2_SWI_SHIFT 14 /* LDO2_SWI */
407#define WM8400_LDO2_SWI_WIDTH 1 /* LDO2_SWI */
408#define WM8400_LDO2_OPFLT 0x1000 /* LDO2_OPFLT */
409#define WM8400_LDO2_OPFLT_MASK 0x1000 /* LDO2_OPFLT */
410#define WM8400_LDO2_OPFLT_SHIFT 12 /* LDO2_OPFLT */
411#define WM8400_LDO2_OPFLT_WIDTH 1 /* LDO2_OPFLT */
412#define WM8400_LDO2_ERRACT 0x0800 /* LDO2_ERRACT */
413#define WM8400_LDO2_ERRACT_MASK 0x0800 /* LDO2_ERRACT */
414#define WM8400_LDO2_ERRACT_SHIFT 11 /* LDO2_ERRACT */
415#define WM8400_LDO2_ERRACT_WIDTH 1 /* LDO2_ERRACT */
416#define WM8400_LDO2_HIB_MODE 0x0400 /* LDO2_HIB_MODE */
417#define WM8400_LDO2_HIB_MODE_MASK 0x0400 /* LDO2_HIB_MODE */
418#define WM8400_LDO2_HIB_MODE_SHIFT 10 /* LDO2_HIB_MODE */
419#define WM8400_LDO2_HIB_MODE_WIDTH 1 /* LDO2_HIB_MODE */
420#define WM8400_LDO2_VIMG_MASK 0x03E0 /* LDO2_VIMG - [9:5] */
421#define WM8400_LDO2_VIMG_SHIFT 5 /* LDO2_VIMG - [9:5] */
422#define WM8400_LDO2_VIMG_WIDTH 5 /* LDO2_VIMG - [9:5] */
423#define WM8400_LDO2_VSEL_MASK 0x001F /* LDO2_VSEL - [4:0] */
424#define WM8400_LDO2_VSEL_SHIFT 0 /* LDO2_VSEL - [4:0] */
425#define WM8400_LDO2_VSEL_WIDTH 5 /* LDO2_VSEL - [4:0] */
426
427/*
428 * R67 (0x43) - LDO 3 Control
429 */
430#define WM8400_LDO3_ENA 0x8000 /* LDO3_ENA */
431#define WM8400_LDO3_ENA_MASK 0x8000 /* LDO3_ENA */
432#define WM8400_LDO3_ENA_SHIFT 15 /* LDO3_ENA */
433#define WM8400_LDO3_ENA_WIDTH 1 /* LDO3_ENA */
434#define WM8400_LDO3_SWI 0x4000 /* LDO3_SWI */
435#define WM8400_LDO3_SWI_MASK 0x4000 /* LDO3_SWI */
436#define WM8400_LDO3_SWI_SHIFT 14 /* LDO3_SWI */
437#define WM8400_LDO3_SWI_WIDTH 1 /* LDO3_SWI */
438#define WM8400_LDO3_OPFLT 0x1000 /* LDO3_OPFLT */
439#define WM8400_LDO3_OPFLT_MASK 0x1000 /* LDO3_OPFLT */
440#define WM8400_LDO3_OPFLT_SHIFT 12 /* LDO3_OPFLT */
441#define WM8400_LDO3_OPFLT_WIDTH 1 /* LDO3_OPFLT */
442#define WM8400_LDO3_ERRACT 0x0800 /* LDO3_ERRACT */
443#define WM8400_LDO3_ERRACT_MASK 0x0800 /* LDO3_ERRACT */
444#define WM8400_LDO3_ERRACT_SHIFT 11 /* LDO3_ERRACT */
445#define WM8400_LDO3_ERRACT_WIDTH 1 /* LDO3_ERRACT */
446#define WM8400_LDO3_HIB_MODE 0x0400 /* LDO3_HIB_MODE */
447#define WM8400_LDO3_HIB_MODE_MASK 0x0400 /* LDO3_HIB_MODE */
448#define WM8400_LDO3_HIB_MODE_SHIFT 10 /* LDO3_HIB_MODE */
449#define WM8400_LDO3_HIB_MODE_WIDTH 1 /* LDO3_HIB_MODE */
450#define WM8400_LDO3_VIMG_MASK 0x03E0 /* LDO3_VIMG - [9:5] */
451#define WM8400_LDO3_VIMG_SHIFT 5 /* LDO3_VIMG - [9:5] */
452#define WM8400_LDO3_VIMG_WIDTH 5 /* LDO3_VIMG - [9:5] */
453#define WM8400_LDO3_VSEL_MASK 0x001F /* LDO3_VSEL - [4:0] */
454#define WM8400_LDO3_VSEL_SHIFT 0 /* LDO3_VSEL - [4:0] */
455#define WM8400_LDO3_VSEL_WIDTH 5 /* LDO3_VSEL - [4:0] */
456
457/*
458 * R68 (0x44) - LDO 4 Control
459 */
460#define WM8400_LDO4_ENA 0x8000 /* LDO4_ENA */
461#define WM8400_LDO4_ENA_MASK 0x8000 /* LDO4_ENA */
462#define WM8400_LDO4_ENA_SHIFT 15 /* LDO4_ENA */
463#define WM8400_LDO4_ENA_WIDTH 1 /* LDO4_ENA */
464#define WM8400_LDO4_SWI 0x4000 /* LDO4_SWI */
465#define WM8400_LDO4_SWI_MASK 0x4000 /* LDO4_SWI */
466#define WM8400_LDO4_SWI_SHIFT 14 /* LDO4_SWI */
467#define WM8400_LDO4_SWI_WIDTH 1 /* LDO4_SWI */
468#define WM8400_LDO4_OPFLT 0x1000 /* LDO4_OPFLT */
469#define WM8400_LDO4_OPFLT_MASK 0x1000 /* LDO4_OPFLT */
470#define WM8400_LDO4_OPFLT_SHIFT 12 /* LDO4_OPFLT */
471#define WM8400_LDO4_OPFLT_WIDTH 1 /* LDO4_OPFLT */
472#define WM8400_LDO4_ERRACT 0x0800 /* LDO4_ERRACT */
473#define WM8400_LDO4_ERRACT_MASK 0x0800 /* LDO4_ERRACT */
474#define WM8400_LDO4_ERRACT_SHIFT 11 /* LDO4_ERRACT */
475#define WM8400_LDO4_ERRACT_WIDTH 1 /* LDO4_ERRACT */
476#define WM8400_LDO4_HIB_MODE 0x0400 /* LDO4_HIB_MODE */
477#define WM8400_LDO4_HIB_MODE_MASK 0x0400 /* LDO4_HIB_MODE */
478#define WM8400_LDO4_HIB_MODE_SHIFT 10 /* LDO4_HIB_MODE */
479#define WM8400_LDO4_HIB_MODE_WIDTH 1 /* LDO4_HIB_MODE */
480#define WM8400_LDO4_VIMG_MASK 0x03E0 /* LDO4_VIMG - [9:5] */
481#define WM8400_LDO4_VIMG_SHIFT 5 /* LDO4_VIMG - [9:5] */
482#define WM8400_LDO4_VIMG_WIDTH 5 /* LDO4_VIMG - [9:5] */
483#define WM8400_LDO4_VSEL_MASK 0x001F /* LDO4_VSEL - [4:0] */
484#define WM8400_LDO4_VSEL_SHIFT 0 /* LDO4_VSEL - [4:0] */
485#define WM8400_LDO4_VSEL_WIDTH 5 /* LDO4_VSEL - [4:0] */
486
487/*
488 * R70 (0x46) - DCDC1 Control 1
489 */
490#define WM8400_DC1_ENA 0x8000 /* DC1_ENA */
491#define WM8400_DC1_ENA_MASK 0x8000 /* DC1_ENA */
492#define WM8400_DC1_ENA_SHIFT 15 /* DC1_ENA */
493#define WM8400_DC1_ENA_WIDTH 1 /* DC1_ENA */
494#define WM8400_DC1_ACTIVE 0x4000 /* DC1_ACTIVE */
495#define WM8400_DC1_ACTIVE_MASK 0x4000 /* DC1_ACTIVE */
496#define WM8400_DC1_ACTIVE_SHIFT 14 /* DC1_ACTIVE */
497#define WM8400_DC1_ACTIVE_WIDTH 1 /* DC1_ACTIVE */
498#define WM8400_DC1_SLEEP 0x2000 /* DC1_SLEEP */
499#define WM8400_DC1_SLEEP_MASK 0x2000 /* DC1_SLEEP */
500#define WM8400_DC1_SLEEP_SHIFT 13 /* DC1_SLEEP */
501#define WM8400_DC1_SLEEP_WIDTH 1 /* DC1_SLEEP */
502#define WM8400_DC1_OPFLT 0x1000 /* DC1_OPFLT */
503#define WM8400_DC1_OPFLT_MASK 0x1000 /* DC1_OPFLT */
504#define WM8400_DC1_OPFLT_SHIFT 12 /* DC1_OPFLT */
505#define WM8400_DC1_OPFLT_WIDTH 1 /* DC1_OPFLT */
506#define WM8400_DC1_ERRACT 0x0800 /* DC1_ERRACT */
507#define WM8400_DC1_ERRACT_MASK 0x0800 /* DC1_ERRACT */
508#define WM8400_DC1_ERRACT_SHIFT 11 /* DC1_ERRACT */
509#define WM8400_DC1_ERRACT_WIDTH 1 /* DC1_ERRACT */
510#define WM8400_DC1_HIB_MODE 0x0400 /* DC1_HIB_MODE */
511#define WM8400_DC1_HIB_MODE_MASK 0x0400 /* DC1_HIB_MODE */
512#define WM8400_DC1_HIB_MODE_SHIFT 10 /* DC1_HIB_MODE */
513#define WM8400_DC1_HIB_MODE_WIDTH 1 /* DC1_HIB_MODE */
514#define WM8400_DC1_SOFTST_MASK 0x0300 /* DC1_SOFTST - [9:8] */
515#define WM8400_DC1_SOFTST_SHIFT 8 /* DC1_SOFTST - [9:8] */
516#define WM8400_DC1_SOFTST_WIDTH 2 /* DC1_SOFTST - [9:8] */
517#define WM8400_DC1_OV_PROT 0x0080 /* DC1_OV_PROT */
518#define WM8400_DC1_OV_PROT_MASK 0x0080 /* DC1_OV_PROT */
519#define WM8400_DC1_OV_PROT_SHIFT 7 /* DC1_OV_PROT */
520#define WM8400_DC1_OV_PROT_WIDTH 1 /* DC1_OV_PROT */
521#define WM8400_DC1_VSEL_MASK 0x007F /* DC1_VSEL - [6:0] */
522#define WM8400_DC1_VSEL_SHIFT 0 /* DC1_VSEL - [6:0] */
523#define WM8400_DC1_VSEL_WIDTH 7 /* DC1_VSEL - [6:0] */
524
525/*
526 * R71 (0x47) - DCDC1 Control 2
527 */
528#define WM8400_DC1_FRC_PWM 0x2000 /* DC1_FRC_PWM */
529#define WM8400_DC1_FRC_PWM_MASK 0x2000 /* DC1_FRC_PWM */
530#define WM8400_DC1_FRC_PWM_SHIFT 13 /* DC1_FRC_PWM */
531#define WM8400_DC1_FRC_PWM_WIDTH 1 /* DC1_FRC_PWM */
532#define WM8400_DC1_STBY_LIM_MASK 0x0300 /* DC1_STBY_LIM - [9:8] */
533#define WM8400_DC1_STBY_LIM_SHIFT 8 /* DC1_STBY_LIM - [9:8] */
534#define WM8400_DC1_STBY_LIM_WIDTH 2 /* DC1_STBY_LIM - [9:8] */
535#define WM8400_DC1_ACT_LIM 0x0080 /* DC1_ACT_LIM */
536#define WM8400_DC1_ACT_LIM_MASK 0x0080 /* DC1_ACT_LIM */
537#define WM8400_DC1_ACT_LIM_SHIFT 7 /* DC1_ACT_LIM */
538#define WM8400_DC1_ACT_LIM_WIDTH 1 /* DC1_ACT_LIM */
539#define WM8400_DC1_VIMG_MASK 0x007F /* DC1_VIMG - [6:0] */
540#define WM8400_DC1_VIMG_SHIFT 0 /* DC1_VIMG - [6:0] */
541#define WM8400_DC1_VIMG_WIDTH 7 /* DC1_VIMG - [6:0] */
542
543/*
544 * R72 (0x48) - DCDC2 Control 1
545 */
546#define WM8400_DC2_ENA 0x8000 /* DC2_ENA */
547#define WM8400_DC2_ENA_MASK 0x8000 /* DC2_ENA */
548#define WM8400_DC2_ENA_SHIFT 15 /* DC2_ENA */
549#define WM8400_DC2_ENA_WIDTH 1 /* DC2_ENA */
550#define WM8400_DC2_ACTIVE 0x4000 /* DC2_ACTIVE */
551#define WM8400_DC2_ACTIVE_MASK 0x4000 /* DC2_ACTIVE */
552#define WM8400_DC2_ACTIVE_SHIFT 14 /* DC2_ACTIVE */
553#define WM8400_DC2_ACTIVE_WIDTH 1 /* DC2_ACTIVE */
554#define WM8400_DC2_SLEEP 0x2000 /* DC2_SLEEP */
555#define WM8400_DC2_SLEEP_MASK 0x2000 /* DC2_SLEEP */
556#define WM8400_DC2_SLEEP_SHIFT 13 /* DC2_SLEEP */
557#define WM8400_DC2_SLEEP_WIDTH 1 /* DC2_SLEEP */
558#define WM8400_DC2_OPFLT 0x1000 /* DC2_OPFLT */
559#define WM8400_DC2_OPFLT_MASK 0x1000 /* DC2_OPFLT */
560#define WM8400_DC2_OPFLT_SHIFT 12 /* DC2_OPFLT */
561#define WM8400_DC2_OPFLT_WIDTH 1 /* DC2_OPFLT */
562#define WM8400_DC2_ERRACT 0x0800 /* DC2_ERRACT */
563#define WM8400_DC2_ERRACT_MASK 0x0800 /* DC2_ERRACT */
564#define WM8400_DC2_ERRACT_SHIFT 11 /* DC2_ERRACT */
565#define WM8400_DC2_ERRACT_WIDTH 1 /* DC2_ERRACT */
566#define WM8400_DC2_HIB_MODE 0x0400 /* DC2_HIB_MODE */
567#define WM8400_DC2_HIB_MODE_MASK 0x0400 /* DC2_HIB_MODE */
568#define WM8400_DC2_HIB_MODE_SHIFT 10 /* DC2_HIB_MODE */
569#define WM8400_DC2_HIB_MODE_WIDTH 1 /* DC2_HIB_MODE */
570#define WM8400_DC2_SOFTST_MASK 0x0300 /* DC2_SOFTST - [9:8] */
571#define WM8400_DC2_SOFTST_SHIFT 8 /* DC2_SOFTST - [9:8] */
572#define WM8400_DC2_SOFTST_WIDTH 2 /* DC2_SOFTST - [9:8] */
573#define WM8400_DC2_OV_PROT 0x0080 /* DC2_OV_PROT */
574#define WM8400_DC2_OV_PROT_MASK 0x0080 /* DC2_OV_PROT */
575#define WM8400_DC2_OV_PROT_SHIFT 7 /* DC2_OV_PROT */
576#define WM8400_DC2_OV_PROT_WIDTH 1 /* DC2_OV_PROT */
577#define WM8400_DC2_VSEL_MASK 0x007F /* DC2_VSEL - [6:0] */
578#define WM8400_DC2_VSEL_SHIFT 0 /* DC2_VSEL - [6:0] */
579#define WM8400_DC2_VSEL_WIDTH 7 /* DC2_VSEL - [6:0] */
580
581/*
582 * R73 (0x49) - DCDC2 Control 2
583 */
584#define WM8400_DC2_FRC_PWM 0x2000 /* DC2_FRC_PWM */
585#define WM8400_DC2_FRC_PWM_MASK 0x2000 /* DC2_FRC_PWM */
586#define WM8400_DC2_FRC_PWM_SHIFT 13 /* DC2_FRC_PWM */
587#define WM8400_DC2_FRC_PWM_WIDTH 1 /* DC2_FRC_PWM */
588#define WM8400_DC2_STBY_LIM_MASK 0x0300 /* DC2_STBY_LIM - [9:8] */
589#define WM8400_DC2_STBY_LIM_SHIFT 8 /* DC2_STBY_LIM - [9:8] */
590#define WM8400_DC2_STBY_LIM_WIDTH 2 /* DC2_STBY_LIM - [9:8] */
591#define WM8400_DC2_ACT_LIM 0x0080 /* DC2_ACT_LIM */
592#define WM8400_DC2_ACT_LIM_MASK 0x0080 /* DC2_ACT_LIM */
593#define WM8400_DC2_ACT_LIM_SHIFT 7 /* DC2_ACT_LIM */
594#define WM8400_DC2_ACT_LIM_WIDTH 1 /* DC2_ACT_LIM */
595#define WM8400_DC2_VIMG_MASK 0x007F /* DC2_VIMG - [6:0] */
596#define WM8400_DC2_VIMG_SHIFT 0 /* DC2_VIMG - [6:0] */
597#define WM8400_DC2_VIMG_WIDTH 7 /* DC2_VIMG - [6:0] */
598
599/*
600 * R75 (0x4B) - Interface
601 */
602#define WM8400_AUTOINC 0x0008 /* AUTOINC */
603#define WM8400_AUTOINC_MASK 0x0008 /* AUTOINC */
604#define WM8400_AUTOINC_SHIFT 3 /* AUTOINC */
605#define WM8400_AUTOINC_WIDTH 1 /* AUTOINC */
606#define WM8400_ARA_ENA 0x0004 /* ARA_ENA */
607#define WM8400_ARA_ENA_MASK 0x0004 /* ARA_ENA */
608#define WM8400_ARA_ENA_SHIFT 2 /* ARA_ENA */
609#define WM8400_ARA_ENA_WIDTH 1 /* ARA_ENA */
610#define WM8400_SPI_CFG 0x0002 /* SPI_CFG */
611#define WM8400_SPI_CFG_MASK 0x0002 /* SPI_CFG */
612#define WM8400_SPI_CFG_SHIFT 1 /* SPI_CFG */
613#define WM8400_SPI_CFG_WIDTH 1 /* SPI_CFG */
614
615/*
616 * R76 (0x4C) - PM GENERAL
617 */
618#define WM8400_CODEC_SOFTST 0x8000 /* CODEC_SOFTST */
619#define WM8400_CODEC_SOFTST_MASK 0x8000 /* CODEC_SOFTST */
620#define WM8400_CODEC_SOFTST_SHIFT 15 /* CODEC_SOFTST */
621#define WM8400_CODEC_SOFTST_WIDTH 1 /* CODEC_SOFTST */
622#define WM8400_CODEC_SOFTSD 0x4000 /* CODEC_SOFTSD */
623#define WM8400_CODEC_SOFTSD_MASK 0x4000 /* CODEC_SOFTSD */
624#define WM8400_CODEC_SOFTSD_SHIFT 14 /* CODEC_SOFTSD */
625#define WM8400_CODEC_SOFTSD_WIDTH 1 /* CODEC_SOFTSD */
626#define WM8400_CHIP_SOFTSD 0x2000 /* CHIP_SOFTSD */
627#define WM8400_CHIP_SOFTSD_MASK 0x2000 /* CHIP_SOFTSD */
628#define WM8400_CHIP_SOFTSD_SHIFT 13 /* CHIP_SOFTSD */
629#define WM8400_CHIP_SOFTSD_WIDTH 1 /* CHIP_SOFTSD */
630#define WM8400_DSLEEP1_POL 0x0008 /* DSLEEP1_POL */
631#define WM8400_DSLEEP1_POL_MASK 0x0008 /* DSLEEP1_POL */
632#define WM8400_DSLEEP1_POL_SHIFT 3 /* DSLEEP1_POL */
633#define WM8400_DSLEEP1_POL_WIDTH 1 /* DSLEEP1_POL */
634#define WM8400_DSLEEP2_POL 0x0004 /* DSLEEP2_POL */
635#define WM8400_DSLEEP2_POL_MASK 0x0004 /* DSLEEP2_POL */
636#define WM8400_DSLEEP2_POL_SHIFT 2 /* DSLEEP2_POL */
637#define WM8400_DSLEEP2_POL_WIDTH 1 /* DSLEEP2_POL */
638#define WM8400_PWR_STATE_MASK 0x0003 /* PWR_STATE - [1:0] */
639#define WM8400_PWR_STATE_SHIFT 0 /* PWR_STATE - [1:0] */
640#define WM8400_PWR_STATE_WIDTH 2 /* PWR_STATE - [1:0] */
641
642/*
643 * R78 (0x4E) - PM Shutdown Control
644 */
645#define WM8400_CHIP_GT150_ERRACT 0x0200 /* CHIP_GT150_ERRACT */
646#define WM8400_CHIP_GT150_ERRACT_MASK 0x0200 /* CHIP_GT150_ERRACT */
647#define WM8400_CHIP_GT150_ERRACT_SHIFT 9 /* CHIP_GT150_ERRACT */
648#define WM8400_CHIP_GT150_ERRACT_WIDTH 1 /* CHIP_GT150_ERRACT */
649#define WM8400_CHIP_GT115_ERRACT 0x0100 /* CHIP_GT115_ERRACT */
650#define WM8400_CHIP_GT115_ERRACT_MASK 0x0100 /* CHIP_GT115_ERRACT */
651#define WM8400_CHIP_GT115_ERRACT_SHIFT 8 /* CHIP_GT115_ERRACT */
652#define WM8400_CHIP_GT115_ERRACT_WIDTH 1 /* CHIP_GT115_ERRACT */
653#define WM8400_LINE_CMP_ERRACT 0x0080 /* LINE_CMP_ERRACT */
654#define WM8400_LINE_CMP_ERRACT_MASK 0x0080 /* LINE_CMP_ERRACT */
655#define WM8400_LINE_CMP_ERRACT_SHIFT 7 /* LINE_CMP_ERRACT */
656#define WM8400_LINE_CMP_ERRACT_WIDTH 1 /* LINE_CMP_ERRACT */
657#define WM8400_UVLO_ERRACT 0x0040 /* UVLO_ERRACT */
658#define WM8400_UVLO_ERRACT_MASK 0x0040 /* UVLO_ERRACT */
659#define WM8400_UVLO_ERRACT_SHIFT 6 /* UVLO_ERRACT */
660#define WM8400_UVLO_ERRACT_WIDTH 1 /* UVLO_ERRACT */
661
662/*
663 * R79 (0x4F) - Interrupt Status 1
664 */
665#define WM8400_MICD_CINT 0x8000 /* MICD_CINT */
666#define WM8400_MICD_CINT_MASK 0x8000 /* MICD_CINT */
667#define WM8400_MICD_CINT_SHIFT 15 /* MICD_CINT */
668#define WM8400_MICD_CINT_WIDTH 1 /* MICD_CINT */
669#define WM8400_MICSCD_CINT 0x4000 /* MICSCD_CINT */
670#define WM8400_MICSCD_CINT_MASK 0x4000 /* MICSCD_CINT */
671#define WM8400_MICSCD_CINT_SHIFT 14 /* MICSCD_CINT */
672#define WM8400_MICSCD_CINT_WIDTH 1 /* MICSCD_CINT */
673#define WM8400_JDL_CINT 0x2000 /* JDL_CINT */
674#define WM8400_JDL_CINT_MASK 0x2000 /* JDL_CINT */
675#define WM8400_JDL_CINT_SHIFT 13 /* JDL_CINT */
676#define WM8400_JDL_CINT_WIDTH 1 /* JDL_CINT */
677#define WM8400_JDR_CINT 0x1000 /* JDR_CINT */
678#define WM8400_JDR_CINT_MASK 0x1000 /* JDR_CINT */
679#define WM8400_JDR_CINT_SHIFT 12 /* JDR_CINT */
680#define WM8400_JDR_CINT_WIDTH 1 /* JDR_CINT */
681#define WM8400_CODEC_SEQ_END_EINT 0x0800 /* CODEC_SEQ_END_EINT */
682#define WM8400_CODEC_SEQ_END_EINT_MASK 0x0800 /* CODEC_SEQ_END_EINT */
683#define WM8400_CODEC_SEQ_END_EINT_SHIFT 11 /* CODEC_SEQ_END_EINT */
684#define WM8400_CODEC_SEQ_END_EINT_WIDTH 1 /* CODEC_SEQ_END_EINT */
685#define WM8400_CDEL_TO_EINT 0x0400 /* CDEL_TO_EINT */
686#define WM8400_CDEL_TO_EINT_MASK 0x0400 /* CDEL_TO_EINT */
687#define WM8400_CDEL_TO_EINT_SHIFT 10 /* CDEL_TO_EINT */
688#define WM8400_CDEL_TO_EINT_WIDTH 1 /* CDEL_TO_EINT */
689#define WM8400_CHIP_GT150_EINT 0x0200 /* CHIP_GT150_EINT */
690#define WM8400_CHIP_GT150_EINT_MASK 0x0200 /* CHIP_GT150_EINT */
691#define WM8400_CHIP_GT150_EINT_SHIFT 9 /* CHIP_GT150_EINT */
692#define WM8400_CHIP_GT150_EINT_WIDTH 1 /* CHIP_GT150_EINT */
693#define WM8400_CHIP_GT115_EINT 0x0100 /* CHIP_GT115_EINT */
694#define WM8400_CHIP_GT115_EINT_MASK 0x0100 /* CHIP_GT115_EINT */
695#define WM8400_CHIP_GT115_EINT_SHIFT 8 /* CHIP_GT115_EINT */
696#define WM8400_CHIP_GT115_EINT_WIDTH 1 /* CHIP_GT115_EINT */
697#define WM8400_LINE_CMP_EINT 0x0080 /* LINE_CMP_EINT */
698#define WM8400_LINE_CMP_EINT_MASK 0x0080 /* LINE_CMP_EINT */
699#define WM8400_LINE_CMP_EINT_SHIFT 7 /* LINE_CMP_EINT */
700#define WM8400_LINE_CMP_EINT_WIDTH 1 /* LINE_CMP_EINT */
701#define WM8400_UVLO_EINT 0x0040 /* UVLO_EINT */
702#define WM8400_UVLO_EINT_MASK 0x0040 /* UVLO_EINT */
703#define WM8400_UVLO_EINT_SHIFT 6 /* UVLO_EINT */
704#define WM8400_UVLO_EINT_WIDTH 1 /* UVLO_EINT */
705#define WM8400_DC2_UV_EINT 0x0020 /* DC2_UV_EINT */
706#define WM8400_DC2_UV_EINT_MASK 0x0020 /* DC2_UV_EINT */
707#define WM8400_DC2_UV_EINT_SHIFT 5 /* DC2_UV_EINT */
708#define WM8400_DC2_UV_EINT_WIDTH 1 /* DC2_UV_EINT */
709#define WM8400_DC1_UV_EINT 0x0010 /* DC1_UV_EINT */
710#define WM8400_DC1_UV_EINT_MASK 0x0010 /* DC1_UV_EINT */
711#define WM8400_DC1_UV_EINT_SHIFT 4 /* DC1_UV_EINT */
712#define WM8400_DC1_UV_EINT_WIDTH 1 /* DC1_UV_EINT */
713#define WM8400_LDO4_UV_EINT 0x0008 /* LDO4_UV_EINT */
714#define WM8400_LDO4_UV_EINT_MASK 0x0008 /* LDO4_UV_EINT */
715#define WM8400_LDO4_UV_EINT_SHIFT 3 /* LDO4_UV_EINT */
716#define WM8400_LDO4_UV_EINT_WIDTH 1 /* LDO4_UV_EINT */
717#define WM8400_LDO3_UV_EINT 0x0004 /* LDO3_UV_EINT */
718#define WM8400_LDO3_UV_EINT_MASK 0x0004 /* LDO3_UV_EINT */
719#define WM8400_LDO3_UV_EINT_SHIFT 2 /* LDO3_UV_EINT */
720#define WM8400_LDO3_UV_EINT_WIDTH 1 /* LDO3_UV_EINT */
721#define WM8400_LDO2_UV_EINT 0x0002 /* LDO2_UV_EINT */
722#define WM8400_LDO2_UV_EINT_MASK 0x0002 /* LDO2_UV_EINT */
723#define WM8400_LDO2_UV_EINT_SHIFT 1 /* LDO2_UV_EINT */
724#define WM8400_LDO2_UV_EINT_WIDTH 1 /* LDO2_UV_EINT */
725#define WM8400_LDO1_UV_EINT 0x0001 /* LDO1_UV_EINT */
726#define WM8400_LDO1_UV_EINT_MASK 0x0001 /* LDO1_UV_EINT */
727#define WM8400_LDO1_UV_EINT_SHIFT 0 /* LDO1_UV_EINT */
728#define WM8400_LDO1_UV_EINT_WIDTH 1 /* LDO1_UV_EINT */
729
730/*
731 * R80 (0x50) - Interrupt Status 1 Mask
732 */
733#define WM8400_IM_MICD_CINT 0x8000 /* IM_MICD_CINT */
734#define WM8400_IM_MICD_CINT_MASK 0x8000 /* IM_MICD_CINT */
735#define WM8400_IM_MICD_CINT_SHIFT 15 /* IM_MICD_CINT */
736#define WM8400_IM_MICD_CINT_WIDTH 1 /* IM_MICD_CINT */
737#define WM8400_IM_MICSCD_CINT 0x4000 /* IM_MICSCD_CINT */
738#define WM8400_IM_MICSCD_CINT_MASK 0x4000 /* IM_MICSCD_CINT */
739#define WM8400_IM_MICSCD_CINT_SHIFT 14 /* IM_MICSCD_CINT */
740#define WM8400_IM_MICSCD_CINT_WIDTH 1 /* IM_MICSCD_CINT */
741#define WM8400_IM_JDL_CINT 0x2000 /* IM_JDL_CINT */
742#define WM8400_IM_JDL_CINT_MASK 0x2000 /* IM_JDL_CINT */
743#define WM8400_IM_JDL_CINT_SHIFT 13 /* IM_JDL_CINT */
744#define WM8400_IM_JDL_CINT_WIDTH 1 /* IM_JDL_CINT */
745#define WM8400_IM_JDR_CINT 0x1000 /* IM_JDR_CINT */
746#define WM8400_IM_JDR_CINT_MASK 0x1000 /* IM_JDR_CINT */
747#define WM8400_IM_JDR_CINT_SHIFT 12 /* IM_JDR_CINT */
748#define WM8400_IM_JDR_CINT_WIDTH 1 /* IM_JDR_CINT */
749#define WM8400_IM_CODEC_SEQ_END_EINT 0x0800 /* IM_CODEC_SEQ_END_EINT */
750#define WM8400_IM_CODEC_SEQ_END_EINT_MASK 0x0800 /* IM_CODEC_SEQ_END_EINT */
751#define WM8400_IM_CODEC_SEQ_END_EINT_SHIFT 11 /* IM_CODEC_SEQ_END_EINT */
752#define WM8400_IM_CODEC_SEQ_END_EINT_WIDTH 1 /* IM_CODEC_SEQ_END_EINT */
753#define WM8400_IM_CDEL_TO_EINT 0x0400 /* IM_CDEL_TO_EINT */
754#define WM8400_IM_CDEL_TO_EINT_MASK 0x0400 /* IM_CDEL_TO_EINT */
755#define WM8400_IM_CDEL_TO_EINT_SHIFT 10 /* IM_CDEL_TO_EINT */
756#define WM8400_IM_CDEL_TO_EINT_WIDTH 1 /* IM_CDEL_TO_EINT */
757#define WM8400_IM_CHIP_GT150_EINT 0x0200 /* IM_CHIP_GT150_EINT */
758#define WM8400_IM_CHIP_GT150_EINT_MASK 0x0200 /* IM_CHIP_GT150_EINT */
759#define WM8400_IM_CHIP_GT150_EINT_SHIFT 9 /* IM_CHIP_GT150_EINT */
760#define WM8400_IM_CHIP_GT150_EINT_WIDTH 1 /* IM_CHIP_GT150_EINT */
761#define WM8400_IM_CHIP_GT115_EINT 0x0100 /* IM_CHIP_GT115_EINT */
762#define WM8400_IM_CHIP_GT115_EINT_MASK 0x0100 /* IM_CHIP_GT115_EINT */
763#define WM8400_IM_CHIP_GT115_EINT_SHIFT 8 /* IM_CHIP_GT115_EINT */
764#define WM8400_IM_CHIP_GT115_EINT_WIDTH 1 /* IM_CHIP_GT115_EINT */
765#define WM8400_IM_LINE_CMP_EINT 0x0080 /* IM_LINE_CMP_EINT */
766#define WM8400_IM_LINE_CMP_EINT_MASK 0x0080 /* IM_LINE_CMP_EINT */
767#define WM8400_IM_LINE_CMP_EINT_SHIFT 7 /* IM_LINE_CMP_EINT */
768#define WM8400_IM_LINE_CMP_EINT_WIDTH 1 /* IM_LINE_CMP_EINT */
769#define WM8400_IM_UVLO_EINT 0x0040 /* IM_UVLO_EINT */
770#define WM8400_IM_UVLO_EINT_MASK 0x0040 /* IM_UVLO_EINT */
771#define WM8400_IM_UVLO_EINT_SHIFT 6 /* IM_UVLO_EINT */
772#define WM8400_IM_UVLO_EINT_WIDTH 1 /* IM_UVLO_EINT */
773#define WM8400_IM_DC2_UV_EINT 0x0020 /* IM_DC2_UV_EINT */
774#define WM8400_IM_DC2_UV_EINT_MASK 0x0020 /* IM_DC2_UV_EINT */
775#define WM8400_IM_DC2_UV_EINT_SHIFT 5 /* IM_DC2_UV_EINT */
776#define WM8400_IM_DC2_UV_EINT_WIDTH 1 /* IM_DC2_UV_EINT */
777#define WM8400_IM_DC1_UV_EINT 0x0010 /* IM_DC1_UV_EINT */
778#define WM8400_IM_DC1_UV_EINT_MASK 0x0010 /* IM_DC1_UV_EINT */
779#define WM8400_IM_DC1_UV_EINT_SHIFT 4 /* IM_DC1_UV_EINT */
780#define WM8400_IM_DC1_UV_EINT_WIDTH 1 /* IM_DC1_UV_EINT */
781#define WM8400_IM_LDO4_UV_EINT 0x0008 /* IM_LDO4_UV_EINT */
782#define WM8400_IM_LDO4_UV_EINT_MASK 0x0008 /* IM_LDO4_UV_EINT */
783#define WM8400_IM_LDO4_UV_EINT_SHIFT 3 /* IM_LDO4_UV_EINT */
784#define WM8400_IM_LDO4_UV_EINT_WIDTH 1 /* IM_LDO4_UV_EINT */
785#define WM8400_IM_LDO3_UV_EINT 0x0004 /* IM_LDO3_UV_EINT */
786#define WM8400_IM_LDO3_UV_EINT_MASK 0x0004 /* IM_LDO3_UV_EINT */
787#define WM8400_IM_LDO3_UV_EINT_SHIFT 2 /* IM_LDO3_UV_EINT */
788#define WM8400_IM_LDO3_UV_EINT_WIDTH 1 /* IM_LDO3_UV_EINT */
789#define WM8400_IM_LDO2_UV_EINT 0x0002 /* IM_LDO2_UV_EINT */
790#define WM8400_IM_LDO2_UV_EINT_MASK 0x0002 /* IM_LDO2_UV_EINT */
791#define WM8400_IM_LDO2_UV_EINT_SHIFT 1 /* IM_LDO2_UV_EINT */
792#define WM8400_IM_LDO2_UV_EINT_WIDTH 1 /* IM_LDO2_UV_EINT */
793#define WM8400_IM_LDO1_UV_EINT 0x0001 /* IM_LDO1_UV_EINT */
794#define WM8400_IM_LDO1_UV_EINT_MASK 0x0001 /* IM_LDO1_UV_EINT */
795#define WM8400_IM_LDO1_UV_EINT_SHIFT 0 /* IM_LDO1_UV_EINT */
796#define WM8400_IM_LDO1_UV_EINT_WIDTH 1 /* IM_LDO1_UV_EINT */
797
798/*
799 * R81 (0x51) - Interrupt Levels
800 */
801#define WM8400_MICD_LVL 0x8000 /* MICD_LVL */
802#define WM8400_MICD_LVL_MASK 0x8000 /* MICD_LVL */
803#define WM8400_MICD_LVL_SHIFT 15 /* MICD_LVL */
804#define WM8400_MICD_LVL_WIDTH 1 /* MICD_LVL */
805#define WM8400_MICSCD_LVL 0x4000 /* MICSCD_LVL */
806#define WM8400_MICSCD_LVL_MASK 0x4000 /* MICSCD_LVL */
807#define WM8400_MICSCD_LVL_SHIFT 14 /* MICSCD_LVL */
808#define WM8400_MICSCD_LVL_WIDTH 1 /* MICSCD_LVL */
809#define WM8400_JDL_LVL 0x2000 /* JDL_LVL */
810#define WM8400_JDL_LVL_MASK 0x2000 /* JDL_LVL */
811#define WM8400_JDL_LVL_SHIFT 13 /* JDL_LVL */
812#define WM8400_JDL_LVL_WIDTH 1 /* JDL_LVL */
813#define WM8400_JDR_LVL 0x1000 /* JDR_LVL */
814#define WM8400_JDR_LVL_MASK 0x1000 /* JDR_LVL */
815#define WM8400_JDR_LVL_SHIFT 12 /* JDR_LVL */
816#define WM8400_JDR_LVL_WIDTH 1 /* JDR_LVL */
817#define WM8400_CODEC_SEQ_END_LVL 0x0800 /* CODEC_SEQ_END_LVL */
818#define WM8400_CODEC_SEQ_END_LVL_MASK 0x0800 /* CODEC_SEQ_END_LVL */
819#define WM8400_CODEC_SEQ_END_LVL_SHIFT 11 /* CODEC_SEQ_END_LVL */
820#define WM8400_CODEC_SEQ_END_LVL_WIDTH 1 /* CODEC_SEQ_END_LVL */
821#define WM8400_CDEL_TO_LVL 0x0400 /* CDEL_TO_LVL */
822#define WM8400_CDEL_TO_LVL_MASK 0x0400 /* CDEL_TO_LVL */
823#define WM8400_CDEL_TO_LVL_SHIFT 10 /* CDEL_TO_LVL */
824#define WM8400_CDEL_TO_LVL_WIDTH 1 /* CDEL_TO_LVL */
825#define WM8400_CHIP_GT150_LVL 0x0200 /* CHIP_GT150_LVL */
826#define WM8400_CHIP_GT150_LVL_MASK 0x0200 /* CHIP_GT150_LVL */
827#define WM8400_CHIP_GT150_LVL_SHIFT 9 /* CHIP_GT150_LVL */
828#define WM8400_CHIP_GT150_LVL_WIDTH 1 /* CHIP_GT150_LVL */
829#define WM8400_CHIP_GT115_LVL 0x0100 /* CHIP_GT115_LVL */
830#define WM8400_CHIP_GT115_LVL_MASK 0x0100 /* CHIP_GT115_LVL */
831#define WM8400_CHIP_GT115_LVL_SHIFT 8 /* CHIP_GT115_LVL */
832#define WM8400_CHIP_GT115_LVL_WIDTH 1 /* CHIP_GT115_LVL */
833#define WM8400_LINE_CMP_LVL 0x0080 /* LINE_CMP_LVL */
834#define WM8400_LINE_CMP_LVL_MASK 0x0080 /* LINE_CMP_LVL */
835#define WM8400_LINE_CMP_LVL_SHIFT 7 /* LINE_CMP_LVL */
836#define WM8400_LINE_CMP_LVL_WIDTH 1 /* LINE_CMP_LVL */
837#define WM8400_UVLO_LVL 0x0040 /* UVLO_LVL */
838#define WM8400_UVLO_LVL_MASK 0x0040 /* UVLO_LVL */
839#define WM8400_UVLO_LVL_SHIFT 6 /* UVLO_LVL */
840#define WM8400_UVLO_LVL_WIDTH 1 /* UVLO_LVL */
841#define WM8400_DC2_UV_LVL 0x0020 /* DC2_UV_LVL */
842#define WM8400_DC2_UV_LVL_MASK 0x0020 /* DC2_UV_LVL */
843#define WM8400_DC2_UV_LVL_SHIFT 5 /* DC2_UV_LVL */
844#define WM8400_DC2_UV_LVL_WIDTH 1 /* DC2_UV_LVL */
845#define WM8400_DC1_UV_LVL 0x0010 /* DC1_UV_LVL */
846#define WM8400_DC1_UV_LVL_MASK 0x0010 /* DC1_UV_LVL */
847#define WM8400_DC1_UV_LVL_SHIFT 4 /* DC1_UV_LVL */
848#define WM8400_DC1_UV_LVL_WIDTH 1 /* DC1_UV_LVL */
849#define WM8400_LDO4_UV_LVL 0x0008 /* LDO4_UV_LVL */
850#define WM8400_LDO4_UV_LVL_MASK 0x0008 /* LDO4_UV_LVL */
851#define WM8400_LDO4_UV_LVL_SHIFT 3 /* LDO4_UV_LVL */
852#define WM8400_LDO4_UV_LVL_WIDTH 1 /* LDO4_UV_LVL */
853#define WM8400_LDO3_UV_LVL 0x0004 /* LDO3_UV_LVL */
854#define WM8400_LDO3_UV_LVL_MASK 0x0004 /* LDO3_UV_LVL */
855#define WM8400_LDO3_UV_LVL_SHIFT 2 /* LDO3_UV_LVL */
856#define WM8400_LDO3_UV_LVL_WIDTH 1 /* LDO3_UV_LVL */
857#define WM8400_LDO2_UV_LVL 0x0002 /* LDO2_UV_LVL */
858#define WM8400_LDO2_UV_LVL_MASK 0x0002 /* LDO2_UV_LVL */
859#define WM8400_LDO2_UV_LVL_SHIFT 1 /* LDO2_UV_LVL */
860#define WM8400_LDO2_UV_LVL_WIDTH 1 /* LDO2_UV_LVL */
861#define WM8400_LDO1_UV_LVL 0x0001 /* LDO1_UV_LVL */
862#define WM8400_LDO1_UV_LVL_MASK 0x0001 /* LDO1_UV_LVL */
863#define WM8400_LDO1_UV_LVL_SHIFT 0 /* LDO1_UV_LVL */
864#define WM8400_LDO1_UV_LVL_WIDTH 1 /* LDO1_UV_LVL */
865
866/*
867 * R82 (0x52) - Shutdown Reason
868 */
869#define WM8400_SDR_CHIP_SOFTSD 0x2000 /* SDR_CHIP_SOFTSD */
870#define WM8400_SDR_CHIP_SOFTSD_MASK 0x2000 /* SDR_CHIP_SOFTSD */
871#define WM8400_SDR_CHIP_SOFTSD_SHIFT 13 /* SDR_CHIP_SOFTSD */
872#define WM8400_SDR_CHIP_SOFTSD_WIDTH 1 /* SDR_CHIP_SOFTSD */
873#define WM8400_SDR_NPDN 0x0800 /* SDR_NPDN */
874#define WM8400_SDR_NPDN_MASK 0x0800 /* SDR_NPDN */
875#define WM8400_SDR_NPDN_SHIFT 11 /* SDR_NPDN */
876#define WM8400_SDR_NPDN_WIDTH 1 /* SDR_NPDN */
877#define WM8400_SDR_CHIP_GT150 0x0200 /* SDR_CHIP_GT150 */
878#define WM8400_SDR_CHIP_GT150_MASK 0x0200 /* SDR_CHIP_GT150 */
879#define WM8400_SDR_CHIP_GT150_SHIFT 9 /* SDR_CHIP_GT150 */
880#define WM8400_SDR_CHIP_GT150_WIDTH 1 /* SDR_CHIP_GT150 */
881#define WM8400_SDR_CHIP_GT115 0x0100 /* SDR_CHIP_GT115 */
882#define WM8400_SDR_CHIP_GT115_MASK 0x0100 /* SDR_CHIP_GT115 */
883#define WM8400_SDR_CHIP_GT115_SHIFT 8 /* SDR_CHIP_GT115 */
884#define WM8400_SDR_CHIP_GT115_WIDTH 1 /* SDR_CHIP_GT115 */
885#define WM8400_SDR_LINE_CMP 0x0080 /* SDR_LINE_CMP */
886#define WM8400_SDR_LINE_CMP_MASK 0x0080 /* SDR_LINE_CMP */
887#define WM8400_SDR_LINE_CMP_SHIFT 7 /* SDR_LINE_CMP */
888#define WM8400_SDR_LINE_CMP_WIDTH 1 /* SDR_LINE_CMP */
889#define WM8400_SDR_UVLO 0x0040 /* SDR_UVLO */
890#define WM8400_SDR_UVLO_MASK 0x0040 /* SDR_UVLO */
891#define WM8400_SDR_UVLO_SHIFT 6 /* SDR_UVLO */
892#define WM8400_SDR_UVLO_WIDTH 1 /* SDR_UVLO */
893#define WM8400_SDR_DC2_UV 0x0020 /* SDR_DC2_UV */
894#define WM8400_SDR_DC2_UV_MASK 0x0020 /* SDR_DC2_UV */
895#define WM8400_SDR_DC2_UV_SHIFT 5 /* SDR_DC2_UV */
896#define WM8400_SDR_DC2_UV_WIDTH 1 /* SDR_DC2_UV */
897#define WM8400_SDR_DC1_UV 0x0010 /* SDR_DC1_UV */
898#define WM8400_SDR_DC1_UV_MASK 0x0010 /* SDR_DC1_UV */
899#define WM8400_SDR_DC1_UV_SHIFT 4 /* SDR_DC1_UV */
900#define WM8400_SDR_DC1_UV_WIDTH 1 /* SDR_DC1_UV */
901#define WM8400_SDR_LDO4_UV 0x0008 /* SDR_LDO4_UV */
902#define WM8400_SDR_LDO4_UV_MASK 0x0008 /* SDR_LDO4_UV */
903#define WM8400_SDR_LDO4_UV_SHIFT 3 /* SDR_LDO4_UV */
904#define WM8400_SDR_LDO4_UV_WIDTH 1 /* SDR_LDO4_UV */
905#define WM8400_SDR_LDO3_UV 0x0004 /* SDR_LDO3_UV */
906#define WM8400_SDR_LDO3_UV_MASK 0x0004 /* SDR_LDO3_UV */
907#define WM8400_SDR_LDO3_UV_SHIFT 2 /* SDR_LDO3_UV */
908#define WM8400_SDR_LDO3_UV_WIDTH 1 /* SDR_LDO3_UV */
909#define WM8400_SDR_LDO2_UV 0x0002 /* SDR_LDO2_UV */
910#define WM8400_SDR_LDO2_UV_MASK 0x0002 /* SDR_LDO2_UV */
911#define WM8400_SDR_LDO2_UV_SHIFT 1 /* SDR_LDO2_UV */
912#define WM8400_SDR_LDO2_UV_WIDTH 1 /* SDR_LDO2_UV */
913#define WM8400_SDR_LDO1_UV 0x0001 /* SDR_LDO1_UV */
914#define WM8400_SDR_LDO1_UV_MASK 0x0001 /* SDR_LDO1_UV */
915#define WM8400_SDR_LDO1_UV_SHIFT 0 /* SDR_LDO1_UV */
916#define WM8400_SDR_LDO1_UV_WIDTH 1 /* SDR_LDO1_UV */
917
918/*
919 * R84 (0x54) - Line Circuits
920 */
921#define WM8400_BG_LINE_COMP 0x8000 /* BG_LINE_COMP */
922#define WM8400_BG_LINE_COMP_MASK 0x8000 /* BG_LINE_COMP */
923#define WM8400_BG_LINE_COMP_SHIFT 15 /* BG_LINE_COMP */
924#define WM8400_BG_LINE_COMP_WIDTH 1 /* BG_LINE_COMP */
925#define WM8400_LINE_CMP_VTHI_MASK 0x00F0 /* LINE_CMP_VTHI - [7:4] */
926#define WM8400_LINE_CMP_VTHI_SHIFT 4 /* LINE_CMP_VTHI - [7:4] */
927#define WM8400_LINE_CMP_VTHI_WIDTH 4 /* LINE_CMP_VTHI - [7:4] */
928#define WM8400_LINE_CMP_VTHD_MASK 0x000F /* LINE_CMP_VTHD - [3:0] */
929#define WM8400_LINE_CMP_VTHD_SHIFT 0 /* LINE_CMP_VTHD - [3:0] */
930#define WM8400_LINE_CMP_VTHD_WIDTH 4 /* LINE_CMP_VTHD - [3:0] */
931
932u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg);
933int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data);
934int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val);
935
936#endif
diff --git a/include/linux/mfd/wm8400.h b/include/linux/mfd/wm8400.h
new file mode 100644
index 000000000000..b46b566ac1ac
--- /dev/null
+++ b/include/linux/mfd/wm8400.h
@@ -0,0 +1,40 @@
1/*
2 * wm8400 client interface
3 *
4 * Copyright 2008 Wolfson Microelectronics plc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef __LINUX_MFD_WM8400_H
22#define __LINUX_MFD_WM8400_H
23
24#include <linux/regulator/machine.h>
25
26#define WM8400_LDO1 0
27#define WM8400_LDO2 1
28#define WM8400_LDO3 2
29#define WM8400_LDO4 3
30#define WM8400_DCDC1 4
31#define WM8400_DCDC2 5
32
33struct wm8400_platform_data {
34 int (*platform_init)(struct device *dev);
35};
36
37int wm8400_register_regulator(struct device *dev, int reg,
38 struct regulator_init_data *initdata);
39
40#endif
diff --git a/include/linux/migrate.h b/include/linux/migrate.h
index 03aea612d284..3f34005068d4 100644
--- a/include/linux/migrate.h
+++ b/include/linux/migrate.h
@@ -7,7 +7,6 @@
7typedef struct page *new_page_t(struct page *, unsigned long private, int **); 7typedef struct page *new_page_t(struct page *, unsigned long private, int **);
8 8
9#ifdef CONFIG_MIGRATION 9#ifdef CONFIG_MIGRATION
10extern int isolate_lru_page(struct page *p, struct list_head *pagelist);
11extern int putback_lru_pages(struct list_head *l); 10extern int putback_lru_pages(struct list_head *l);
12extern int migrate_page(struct address_space *, 11extern int migrate_page(struct address_space *,
13 struct page *, struct page *); 12 struct page *, struct page *);
@@ -21,8 +20,6 @@ extern int migrate_vmas(struct mm_struct *mm,
21 const nodemask_t *from, const nodemask_t *to, 20 const nodemask_t *from, const nodemask_t *to,
22 unsigned long flags); 21 unsigned long flags);
23#else 22#else
24static inline int isolate_lru_page(struct page *p, struct list_head *list)
25 { return -ENOSYS; }
26static inline int putback_lru_pages(struct list_head *l) { return 0; } 23static inline int putback_lru_pages(struct list_head *l) { return 0; }
27static inline int migrate_pages(struct list_head *l, new_page_t x, 24static inline int migrate_pages(struct list_head *l, new_page_t x,
28 unsigned long private) { return -ENOSYS; } 25 unsigned long private) { return -ENOSYS; }
diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h
index 77323a72dd3c..cf9c679ab38b 100644
--- a/include/linux/mlx4/cmd.h
+++ b/include/linux/mlx4/cmd.h
@@ -132,6 +132,15 @@ enum {
132 MLX4_MAILBOX_SIZE = 4096 132 MLX4_MAILBOX_SIZE = 4096
133}; 133};
134 134
135enum {
136 /* set port opcode modifiers */
137 MLX4_SET_PORT_GENERAL = 0x0,
138 MLX4_SET_PORT_RQP_CALC = 0x1,
139 MLX4_SET_PORT_MAC_TABLE = 0x2,
140 MLX4_SET_PORT_VLAN_TABLE = 0x3,
141 MLX4_SET_PORT_PRIO_MAP = 0x4,
142};
143
135struct mlx4_dev; 144struct mlx4_dev;
136 145
137struct mlx4_cmd_mailbox { 146struct mlx4_cmd_mailbox {
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index b2f944468313..bd9977b89490 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -60,6 +60,7 @@ enum {
60 MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 << 7, 60 MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 << 7,
61 MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 << 8, 61 MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 << 8,
62 MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 << 9, 62 MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 << 9,
63 MLX4_DEV_CAP_FLAG_DPDP = 1 << 12,
63 MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 << 16, 64 MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 << 16,
64 MLX4_DEV_CAP_FLAG_APM = 1 << 17, 65 MLX4_DEV_CAP_FLAG_APM = 1 << 17,
65 MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18, 66 MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18,
@@ -145,6 +146,29 @@ enum {
145 MLX4_MTT_FLAG_PRESENT = 1 146 MLX4_MTT_FLAG_PRESENT = 1
146}; 147};
147 148
149enum mlx4_qp_region {
150 MLX4_QP_REGION_FW = 0,
151 MLX4_QP_REGION_ETH_ADDR,
152 MLX4_QP_REGION_FC_ADDR,
153 MLX4_QP_REGION_FC_EXCH,
154 MLX4_NUM_QP_REGION
155};
156
157enum mlx4_port_type {
158 MLX4_PORT_TYPE_IB = 1 << 0,
159 MLX4_PORT_TYPE_ETH = 1 << 1,
160};
161
162enum mlx4_special_vlan_idx {
163 MLX4_NO_VLAN_IDX = 0,
164 MLX4_VLAN_MISS_IDX,
165 MLX4_VLAN_REGULAR
166};
167
168enum {
169 MLX4_NUM_FEXCH = 64 * 1024,
170};
171
148static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) 172static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
149{ 173{
150 return (major << 32) | (minor << 16) | subminor; 174 return (major << 32) | (minor << 16) | subminor;
@@ -154,7 +178,9 @@ struct mlx4_caps {
154 u64 fw_ver; 178 u64 fw_ver;
155 int num_ports; 179 int num_ports;
156 int vl_cap[MLX4_MAX_PORTS + 1]; 180 int vl_cap[MLX4_MAX_PORTS + 1];
157 int mtu_cap[MLX4_MAX_PORTS + 1]; 181 int ib_mtu_cap[MLX4_MAX_PORTS + 1];
182 u64 def_mac[MLX4_MAX_PORTS + 1];
183 int eth_mtu_cap[MLX4_MAX_PORTS + 1];
158 int gid_table_len[MLX4_MAX_PORTS + 1]; 184 int gid_table_len[MLX4_MAX_PORTS + 1];
159 int pkey_table_len[MLX4_MAX_PORTS + 1]; 185 int pkey_table_len[MLX4_MAX_PORTS + 1];
160 int local_ca_ack_delay; 186 int local_ca_ack_delay;
@@ -169,7 +195,6 @@ struct mlx4_caps {
169 int max_rq_desc_sz; 195 int max_rq_desc_sz;
170 int max_qp_init_rdma; 196 int max_qp_init_rdma;
171 int max_qp_dest_rdma; 197 int max_qp_dest_rdma;
172 int reserved_qps;
173 int sqp_start; 198 int sqp_start;
174 int num_srqs; 199 int num_srqs;
175 int max_srq_wqes; 200 int max_srq_wqes;
@@ -201,6 +226,15 @@ struct mlx4_caps {
201 u16 stat_rate_support; 226 u16 stat_rate_support;
202 u8 port_width_cap[MLX4_MAX_PORTS + 1]; 227 u8 port_width_cap[MLX4_MAX_PORTS + 1];
203 int max_gso_sz; 228 int max_gso_sz;
229 int reserved_qps_cnt[MLX4_NUM_QP_REGION];
230 int reserved_qps;
231 int reserved_qps_base[MLX4_NUM_QP_REGION];
232 int log_num_macs;
233 int log_num_vlans;
234 int log_num_prios;
235 enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1];
236 u8 supported_type[MLX4_MAX_PORTS + 1];
237 u32 port_mask;
204}; 238};
205 239
206struct mlx4_buf_list { 240struct mlx4_buf_list {
@@ -355,6 +389,11 @@ struct mlx4_init_port_param {
355 u64 si_guid; 389 u64 si_guid;
356}; 390};
357 391
392#define mlx4_foreach_port(port, dev, type) \
393 for ((port) = 1; (port) <= (dev)->caps.num_ports; (port)++) \
394 if (((type) == MLX4_PORT_TYPE_IB ? (dev)->caps.port_mask : \
395 ~(dev)->caps.port_mask) & 1 << ((port) - 1))
396
358int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, 397int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct,
359 struct mlx4_buf *buf); 398 struct mlx4_buf *buf);
360void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); 399void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf);
@@ -400,7 +439,10 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt,
400 int collapsed); 439 int collapsed);
401void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq); 440void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq);
402 441
403int mlx4_qp_alloc(struct mlx4_dev *dev, int sqpn, struct mlx4_qp *qp); 442int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base);
443void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt);
444
445int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp);
404void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp); 446void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp);
405 447
406int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt, 448int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt,
@@ -416,6 +458,12 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16],
416 int block_mcast_loopback); 458 int block_mcast_loopback);
417int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]); 459int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]);
418 460
461int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *index);
462void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, int index);
463
464int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index);
465void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index);
466
419int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list, 467int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list,
420 int npages, u64 iova, u32 *lkey, u32 *rkey); 468 int npages, u64 iova, u32 *lkey, u32 *rkey);
421int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages, 469int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages,
diff --git a/include/linux/mm.h b/include/linux/mm.h
index c61ba10768ea..ffee2f743418 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -132,6 +132,11 @@ extern unsigned int kobjsize(const void *objp);
132#define VM_RandomReadHint(v) ((v)->vm_flags & VM_RAND_READ) 132#define VM_RandomReadHint(v) ((v)->vm_flags & VM_RAND_READ)
133 133
134/* 134/*
135 * special vmas that are non-mergable, non-mlock()able
136 */
137#define VM_SPECIAL (VM_IO | VM_DONTEXPAND | VM_RESERVED | VM_PFNMAP)
138
139/*
135 * mapping from the currently active vm_flags protection bits (the 140 * mapping from the currently active vm_flags protection bits (the
136 * low four bits) to a page protection mask.. 141 * low four bits) to a page protection mask..
137 */ 142 */
@@ -700,10 +705,10 @@ static inline int page_mapped(struct page *page)
700extern void show_free_areas(void); 705extern void show_free_areas(void);
701 706
702#ifdef CONFIG_SHMEM 707#ifdef CONFIG_SHMEM
703int shmem_lock(struct file *file, int lock, struct user_struct *user); 708extern int shmem_lock(struct file *file, int lock, struct user_struct *user);
704#else 709#else
705static inline int shmem_lock(struct file *file, int lock, 710static inline int shmem_lock(struct file *file, int lock,
706 struct user_struct *user) 711 struct user_struct *user)
707{ 712{
708 return 0; 713 return 0;
709} 714}
diff --git a/include/linux/mm_inline.h b/include/linux/mm_inline.h
index 895bc4e93039..c948350c378e 100644
--- a/include/linux/mm_inline.h
+++ b/include/linux/mm_inline.h
@@ -1,40 +1,100 @@
1static inline void 1#ifndef LINUX_MM_INLINE_H
2add_page_to_active_list(struct zone *zone, struct page *page) 2#define LINUX_MM_INLINE_H
3{
4 list_add(&page->lru, &zone->active_list);
5 __inc_zone_state(zone, NR_ACTIVE);
6}
7 3
8static inline void 4/**
9add_page_to_inactive_list(struct zone *zone, struct page *page) 5 * page_is_file_cache - should the page be on a file LRU or anon LRU?
6 * @page: the page to test
7 *
8 * Returns LRU_FILE if @page is page cache page backed by a regular filesystem,
9 * or 0 if @page is anonymous, tmpfs or otherwise ram or swap backed.
10 * Used by functions that manipulate the LRU lists, to sort a page
11 * onto the right LRU list.
12 *
13 * We would like to get this info without a page flag, but the state
14 * needs to survive until the page is last deleted from the LRU, which
15 * could be as far down as __page_cache_release.
16 */
17static inline int page_is_file_cache(struct page *page)
10{ 18{
11 list_add(&page->lru, &zone->inactive_list); 19 if (PageSwapBacked(page))
12 __inc_zone_state(zone, NR_INACTIVE); 20 return 0;
21
22 /* The page is page cache backed by a normal filesystem. */
23 return LRU_FILE;
13} 24}
14 25
15static inline void 26static inline void
16del_page_from_active_list(struct zone *zone, struct page *page) 27add_page_to_lru_list(struct zone *zone, struct page *page, enum lru_list l)
17{ 28{
18 list_del(&page->lru); 29 list_add(&page->lru, &zone->lru[l].list);
19 __dec_zone_state(zone, NR_ACTIVE); 30 __inc_zone_state(zone, NR_LRU_BASE + l);
20} 31}
21 32
22static inline void 33static inline void
23del_page_from_inactive_list(struct zone *zone, struct page *page) 34del_page_from_lru_list(struct zone *zone, struct page *page, enum lru_list l)
24{ 35{
25 list_del(&page->lru); 36 list_del(&page->lru);
26 __dec_zone_state(zone, NR_INACTIVE); 37 __dec_zone_state(zone, NR_LRU_BASE + l);
27} 38}
28 39
29static inline void 40static inline void
30del_page_from_lru(struct zone *zone, struct page *page) 41del_page_from_lru(struct zone *zone, struct page *page)
31{ 42{
43 enum lru_list l = LRU_BASE;
44
32 list_del(&page->lru); 45 list_del(&page->lru);
33 if (PageActive(page)) { 46 if (PageUnevictable(page)) {
34 __ClearPageActive(page); 47 __ClearPageUnevictable(page);
35 __dec_zone_state(zone, NR_ACTIVE); 48 l = LRU_UNEVICTABLE;
36 } else { 49 } else {
37 __dec_zone_state(zone, NR_INACTIVE); 50 if (PageActive(page)) {
51 __ClearPageActive(page);
52 l += LRU_ACTIVE;
53 }
54 l += page_is_file_cache(page);
55 }
56 __dec_zone_state(zone, NR_LRU_BASE + l);
57}
58
59/**
60 * page_lru - which LRU list should a page be on?
61 * @page: the page to test
62 *
63 * Returns the LRU list a page should be on, as an index
64 * into the array of LRU lists.
65 */
66static inline enum lru_list page_lru(struct page *page)
67{
68 enum lru_list lru = LRU_BASE;
69
70 if (PageUnevictable(page))
71 lru = LRU_UNEVICTABLE;
72 else {
73 if (PageActive(page))
74 lru += LRU_ACTIVE;
75 lru += page_is_file_cache(page);
38 } 76 }
77
78 return lru;
39} 79}
40 80
81/**
82 * inactive_anon_is_low - check if anonymous pages need to be deactivated
83 * @zone: zone to check
84 *
85 * Returns true if the zone does not have enough inactive anon pages,
86 * meaning some active anon pages need to be deactivated.
87 */
88static inline int inactive_anon_is_low(struct zone *zone)
89{
90 unsigned long active, inactive;
91
92 active = zone_page_state(zone, NR_ACTIVE_ANON);
93 inactive = zone_page_state(zone, NR_INACTIVE_ANON);
94
95 if (inactive * zone->inactive_ratio < active)
96 return 1;
97
98 return 0;
99}
100#endif
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 9d49fa36bbef..fe825471d5aa 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -94,9 +94,6 @@ struct page {
94 void *virtual; /* Kernel virtual address (NULL if 94 void *virtual; /* Kernel virtual address (NULL if
95 not kmapped, ie. highmem) */ 95 not kmapped, ie. highmem) */
96#endif /* WANT_PAGE_VIRTUAL */ 96#endif /* WANT_PAGE_VIRTUAL */
97#ifdef CONFIG_CGROUP_MEM_RES_CTLR
98 unsigned long page_cgroup;
99#endif
100}; 97};
101 98
102/* 99/*
diff --git a/include/linux/mmiotrace.h b/include/linux/mmiotrace.h
index 61d19e1b7a0b..139d7c88d9c9 100644
--- a/include/linux/mmiotrace.h
+++ b/include/linux/mmiotrace.h
@@ -34,11 +34,15 @@ extern void unregister_kmmio_probe(struct kmmio_probe *p);
34/* Called from page fault handler. */ 34/* Called from page fault handler. */
35extern int kmmio_handler(struct pt_regs *regs, unsigned long addr); 35extern int kmmio_handler(struct pt_regs *regs, unsigned long addr);
36 36
37/* Called from ioremap.c */
38#ifdef CONFIG_MMIOTRACE 37#ifdef CONFIG_MMIOTRACE
38/* Called from ioremap.c */
39extern void mmiotrace_ioremap(resource_size_t offset, unsigned long size, 39extern void mmiotrace_ioremap(resource_size_t offset, unsigned long size,
40 void __iomem *addr); 40 void __iomem *addr);
41extern void mmiotrace_iounmap(volatile void __iomem *addr); 41extern void mmiotrace_iounmap(volatile void __iomem *addr);
42
43/* For anyone to insert markers. Remember trailing newline. */
44extern int mmiotrace_printk(const char *fmt, ...)
45 __attribute__ ((format (printf, 1, 2)));
42#else 46#else
43static inline void mmiotrace_ioremap(resource_size_t offset, 47static inline void mmiotrace_ioremap(resource_size_t offset,
44 unsigned long size, void __iomem *addr) 48 unsigned long size, void __iomem *addr)
@@ -48,15 +52,22 @@ static inline void mmiotrace_ioremap(resource_size_t offset,
48static inline void mmiotrace_iounmap(volatile void __iomem *addr) 52static inline void mmiotrace_iounmap(volatile void __iomem *addr)
49{ 53{
50} 54}
51#endif /* CONFIG_MMIOTRACE_HOOKS */ 55
56static inline int mmiotrace_printk(const char *fmt, ...)
57 __attribute__ ((format (printf, 1, 0)));
58
59static inline int mmiotrace_printk(const char *fmt, ...)
60{
61 return 0;
62}
63#endif /* CONFIG_MMIOTRACE */
52 64
53enum mm_io_opcode { 65enum mm_io_opcode {
54 MMIO_READ = 0x1, /* struct mmiotrace_rw */ 66 MMIO_READ = 0x1, /* struct mmiotrace_rw */
55 MMIO_WRITE = 0x2, /* struct mmiotrace_rw */ 67 MMIO_WRITE = 0x2, /* struct mmiotrace_rw */
56 MMIO_PROBE = 0x3, /* struct mmiotrace_map */ 68 MMIO_PROBE = 0x3, /* struct mmiotrace_map */
57 MMIO_UNPROBE = 0x4, /* struct mmiotrace_map */ 69 MMIO_UNPROBE = 0x4, /* struct mmiotrace_map */
58 MMIO_MARKER = 0x5, /* raw char data */ 70 MMIO_UNKNOWN_OP = 0x5, /* struct mmiotrace_rw */
59 MMIO_UNKNOWN_OP = 0x6, /* struct mmiotrace_rw */
60}; 71};
61 72
62struct mmiotrace_rw { 73struct mmiotrace_rw {
@@ -81,5 +92,6 @@ extern void enable_mmiotrace(void);
81extern void disable_mmiotrace(void); 92extern void disable_mmiotrace(void);
82extern void mmio_trace_rw(struct mmiotrace_rw *rw); 93extern void mmio_trace_rw(struct mmiotrace_rw *rw);
83extern void mmio_trace_mapping(struct mmiotrace_map *map); 94extern void mmio_trace_mapping(struct mmiotrace_map *map);
95extern int mmio_trace_printk(const char *fmt, va_list args);
84 96
85#endif /* MMIOTRACE_H */ 97#endif /* MMIOTRACE_H */
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 428328a05fa1..35a7b5e19465 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -81,21 +81,31 @@ struct zone_padding {
81enum zone_stat_item { 81enum zone_stat_item {
82 /* First 128 byte cacheline (assuming 64 bit words) */ 82 /* First 128 byte cacheline (assuming 64 bit words) */
83 NR_FREE_PAGES, 83 NR_FREE_PAGES,
84 NR_INACTIVE, 84 NR_LRU_BASE,
85 NR_ACTIVE, 85 NR_INACTIVE_ANON = NR_LRU_BASE, /* must match order of LRU_[IN]ACTIVE */
86 NR_ACTIVE_ANON, /* " " " " " */
87 NR_INACTIVE_FILE, /* " " " " " */
88 NR_ACTIVE_FILE, /* " " " " " */
89#ifdef CONFIG_UNEVICTABLE_LRU
90 NR_UNEVICTABLE, /* " " " " " */
91 NR_MLOCK, /* mlock()ed pages found and moved off LRU */
92#else
93 NR_UNEVICTABLE = NR_ACTIVE_FILE, /* avoid compiler errors in dead code */
94 NR_MLOCK = NR_ACTIVE_FILE,
95#endif
86 NR_ANON_PAGES, /* Mapped anonymous pages */ 96 NR_ANON_PAGES, /* Mapped anonymous pages */
87 NR_FILE_MAPPED, /* pagecache pages mapped into pagetables. 97 NR_FILE_MAPPED, /* pagecache pages mapped into pagetables.
88 only modified from process context */ 98 only modified from process context */
89 NR_FILE_PAGES, 99 NR_FILE_PAGES,
90 NR_FILE_DIRTY, 100 NR_FILE_DIRTY,
91 NR_WRITEBACK, 101 NR_WRITEBACK,
92 /* Second 128 byte cacheline */
93 NR_SLAB_RECLAIMABLE, 102 NR_SLAB_RECLAIMABLE,
94 NR_SLAB_UNRECLAIMABLE, 103 NR_SLAB_UNRECLAIMABLE,
95 NR_PAGETABLE, /* used for pagetables */ 104 NR_PAGETABLE, /* used for pagetables */
96 NR_UNSTABLE_NFS, /* NFS unstable pages */ 105 NR_UNSTABLE_NFS, /* NFS unstable pages */
97 NR_BOUNCE, 106 NR_BOUNCE,
98 NR_VMSCAN_WRITE, 107 NR_VMSCAN_WRITE,
108 /* Second 128 byte cacheline */
99 NR_WRITEBACK_TEMP, /* Writeback using temporary buffers */ 109 NR_WRITEBACK_TEMP, /* Writeback using temporary buffers */
100#ifdef CONFIG_NUMA 110#ifdef CONFIG_NUMA
101 NUMA_HIT, /* allocated in intended node */ 111 NUMA_HIT, /* allocated in intended node */
@@ -107,6 +117,55 @@ enum zone_stat_item {
107#endif 117#endif
108 NR_VM_ZONE_STAT_ITEMS }; 118 NR_VM_ZONE_STAT_ITEMS };
109 119
120/*
121 * We do arithmetic on the LRU lists in various places in the code,
122 * so it is important to keep the active lists LRU_ACTIVE higher in
123 * the array than the corresponding inactive lists, and to keep
124 * the *_FILE lists LRU_FILE higher than the corresponding _ANON lists.
125 *
126 * This has to be kept in sync with the statistics in zone_stat_item
127 * above and the descriptions in vmstat_text in mm/vmstat.c
128 */
129#define LRU_BASE 0
130#define LRU_ACTIVE 1
131#define LRU_FILE 2
132
133enum lru_list {
134 LRU_INACTIVE_ANON = LRU_BASE,
135 LRU_ACTIVE_ANON = LRU_BASE + LRU_ACTIVE,
136 LRU_INACTIVE_FILE = LRU_BASE + LRU_FILE,
137 LRU_ACTIVE_FILE = LRU_BASE + LRU_FILE + LRU_ACTIVE,
138#ifdef CONFIG_UNEVICTABLE_LRU
139 LRU_UNEVICTABLE,
140#else
141 LRU_UNEVICTABLE = LRU_ACTIVE_FILE, /* avoid compiler errors in dead code */
142#endif
143 NR_LRU_LISTS
144};
145
146#define for_each_lru(l) for (l = 0; l < NR_LRU_LISTS; l++)
147
148#define for_each_evictable_lru(l) for (l = 0; l <= LRU_ACTIVE_FILE; l++)
149
150static inline int is_file_lru(enum lru_list l)
151{
152 return (l == LRU_INACTIVE_FILE || l == LRU_ACTIVE_FILE);
153}
154
155static inline int is_active_lru(enum lru_list l)
156{
157 return (l == LRU_ACTIVE_ANON || l == LRU_ACTIVE_FILE);
158}
159
160static inline int is_unevictable_lru(enum lru_list l)
161{
162#ifdef CONFIG_UNEVICTABLE_LRU
163 return (l == LRU_UNEVICTABLE);
164#else
165 return 0;
166#endif
167}
168
110struct per_cpu_pages { 169struct per_cpu_pages {
111 int count; /* number of pages in the list */ 170 int count; /* number of pages in the list */
112 int high; /* high watermark, emptying needed */ 171 int high; /* high watermark, emptying needed */
@@ -251,10 +310,22 @@ struct zone {
251 310
252 /* Fields commonly accessed by the page reclaim scanner */ 311 /* Fields commonly accessed by the page reclaim scanner */
253 spinlock_t lru_lock; 312 spinlock_t lru_lock;
254 struct list_head active_list; 313 struct {
255 struct list_head inactive_list; 314 struct list_head list;
256 unsigned long nr_scan_active; 315 unsigned long nr_scan;
257 unsigned long nr_scan_inactive; 316 } lru[NR_LRU_LISTS];
317
318 /*
319 * The pageout code in vmscan.c keeps track of how many of the
320 * mem/swap backed and file backed pages are refeferenced.
321 * The higher the rotated/scanned ratio, the more valuable
322 * that cache is.
323 *
324 * The anon LRU stats live in [0], file LRU stats in [1]
325 */
326 unsigned long recent_rotated[2];
327 unsigned long recent_scanned[2];
328
258 unsigned long pages_scanned; /* since last reclaim */ 329 unsigned long pages_scanned; /* since last reclaim */
259 unsigned long flags; /* zone flags, see below */ 330 unsigned long flags; /* zone flags, see below */
260 331
@@ -276,6 +347,12 @@ struct zone {
276 */ 347 */
277 int prev_priority; 348 int prev_priority;
278 349
350 /*
351 * The target ratio of ACTIVE_ANON to INACTIVE_ANON pages on
352 * this zone's LRU. Maintained by the pageout code.
353 */
354 unsigned int inactive_ratio;
355
279 356
280 ZONE_PADDING(_pad2_) 357 ZONE_PADDING(_pad2_)
281 /* Rarely used or read-mostly fields */ 358 /* Rarely used or read-mostly fields */
@@ -524,8 +601,11 @@ typedef struct pglist_data {
524 struct zone node_zones[MAX_NR_ZONES]; 601 struct zone node_zones[MAX_NR_ZONES];
525 struct zonelist node_zonelists[MAX_ZONELISTS]; 602 struct zonelist node_zonelists[MAX_ZONELISTS];
526 int nr_zones; 603 int nr_zones;
527#ifdef CONFIG_FLAT_NODE_MEM_MAP 604#ifdef CONFIG_FLAT_NODE_MEM_MAP /* means !SPARSEMEM */
528 struct page *node_mem_map; 605 struct page *node_mem_map;
606#ifdef CONFIG_CGROUP_MEM_RES_CTLR
607 struct page_cgroup *node_page_cgroup;
608#endif
529#endif 609#endif
530 struct bootmem_data *bdata; 610 struct bootmem_data *bdata;
531#ifdef CONFIG_MEMORY_HOTPLUG 611#ifdef CONFIG_MEMORY_HOTPLUG
@@ -854,6 +934,7 @@ static inline unsigned long early_pfn_to_nid(unsigned long pfn)
854#endif 934#endif
855 935
856struct page; 936struct page;
937struct page_cgroup;
857struct mem_section { 938struct mem_section {
858 /* 939 /*
859 * This is, logically, a pointer to an array of struct 940 * This is, logically, a pointer to an array of struct
@@ -871,6 +952,14 @@ struct mem_section {
871 952
872 /* See declaration of similar field in struct zone */ 953 /* See declaration of similar field in struct zone */
873 unsigned long *pageblock_flags; 954 unsigned long *pageblock_flags;
955#ifdef CONFIG_CGROUP_MEM_RES_CTLR
956 /*
957 * If !SPARSEMEM, pgdat doesn't have page_cgroup pointer. We use
958 * section. (see memcontrol.h/page_cgroup.h about this.)
959 */
960 struct page_cgroup *page_cgroup;
961 unsigned long pad;
962#endif
874}; 963};
875 964
876#ifdef CONFIG_SPARSEMEM_EXTREME 965#ifdef CONFIG_SPARSEMEM_EXTREME
diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h
index 3481a7d5bc0a..eb71b45fdf5a 100644
--- a/include/linux/mod_devicetable.h
+++ b/include/linux/mod_devicetable.h
@@ -131,6 +131,16 @@ struct usb_device_id {
131#define USB_DEVICE_ID_MATCH_INT_SUBCLASS 0x0100 131#define USB_DEVICE_ID_MATCH_INT_SUBCLASS 0x0100
132#define USB_DEVICE_ID_MATCH_INT_PROTOCOL 0x0200 132#define USB_DEVICE_ID_MATCH_INT_PROTOCOL 0x0200
133 133
134#define HID_ANY_ID (~0)
135
136struct hid_device_id {
137 __u16 bus;
138 __u32 vendor;
139 __u32 product;
140 kernel_ulong_t driver_data
141 __attribute__((aligned(sizeof(kernel_ulong_t))));
142};
143
134/* s390 CCW devices */ 144/* s390 CCW devices */
135struct ccw_device_id { 145struct ccw_device_id {
136 __u16 match_flags; /* which fields to match against */ 146 __u16 match_flags; /* which fields to match against */
@@ -274,7 +284,7 @@ struct pcmcia_device_id {
274/* Input */ 284/* Input */
275#define INPUT_DEVICE_ID_EV_MAX 0x1f 285#define INPUT_DEVICE_ID_EV_MAX 0x1f
276#define INPUT_DEVICE_ID_KEY_MIN_INTERESTING 0x71 286#define INPUT_DEVICE_ID_KEY_MIN_INTERESTING 0x71
277#define INPUT_DEVICE_ID_KEY_MAX 0x1ff 287#define INPUT_DEVICE_ID_KEY_MAX 0x2ff
278#define INPUT_DEVICE_ID_REL_MAX 0x0f 288#define INPUT_DEVICE_ID_REL_MAX 0x0f
279#define INPUT_DEVICE_ID_ABS_MAX 0x3f 289#define INPUT_DEVICE_ID_ABS_MAX 0x3f
280#define INPUT_DEVICE_ID_MSC_MAX 0x07 290#define INPUT_DEVICE_ID_MSC_MAX 0x07
diff --git a/include/linux/module.h b/include/linux/module.h
index 68e09557c951..5d2970cdce93 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -16,6 +16,7 @@
16#include <linux/kobject.h> 16#include <linux/kobject.h>
17#include <linux/moduleparam.h> 17#include <linux/moduleparam.h>
18#include <linux/marker.h> 18#include <linux/marker.h>
19#include <linux/tracepoint.h>
19#include <asm/local.h> 20#include <asm/local.h>
20 21
21#include <asm/module.h> 22#include <asm/module.h>
@@ -331,6 +332,10 @@ struct module
331 struct marker *markers; 332 struct marker *markers;
332 unsigned int num_markers; 333 unsigned int num_markers;
333#endif 334#endif
335#ifdef CONFIG_TRACEPOINTS
336 struct tracepoint *tracepoints;
337 unsigned int num_tracepoints;
338#endif
334 339
335#ifdef CONFIG_MODULE_UNLOAD 340#ifdef CONFIG_MODULE_UNLOAD
336 /* What modules depend on me? */ 341 /* What modules depend on me? */
@@ -345,7 +350,6 @@ struct module
345 /* Reference counts */ 350 /* Reference counts */
346 struct module_ref ref[NR_CPUS]; 351 struct module_ref ref[NR_CPUS];
347#endif 352#endif
348
349}; 353};
350#ifndef MODULE_ARCH_INIT 354#ifndef MODULE_ARCH_INIT
351#define MODULE_ARCH_INIT {} 355#define MODULE_ARCH_INIT {}
@@ -454,6 +458,9 @@ extern void print_modules(void);
454 458
455extern void module_update_markers(void); 459extern void module_update_markers(void);
456 460
461extern void module_update_tracepoints(void);
462extern int module_get_iter_tracepoints(struct tracepoint_iter *iter);
463
457#else /* !CONFIG_MODULES... */ 464#else /* !CONFIG_MODULES... */
458#define EXPORT_SYMBOL(sym) 465#define EXPORT_SYMBOL(sym)
459#define EXPORT_SYMBOL_GPL(sym) 466#define EXPORT_SYMBOL_GPL(sym)
@@ -558,6 +565,15 @@ static inline void module_update_markers(void)
558{ 565{
559} 566}
560 567
568static inline void module_update_tracepoints(void)
569{
570}
571
572static inline int module_get_iter_tracepoints(struct tracepoint_iter *iter)
573{
574 return 0;
575}
576
561#endif /* CONFIG_MODULES */ 577#endif /* CONFIG_MODULES */
562 578
563struct device_driver; 579struct device_driver;
diff --git a/include/linux/mount.h b/include/linux/mount.h
index 30a1d63b6fb5..cab2a85e2ee8 100644
--- a/include/linux/mount.h
+++ b/include/linux/mount.h
@@ -5,8 +5,6 @@
5 * 5 *
6 * Author: Marco van Wieringen <mvw@planets.elm.net> 6 * Author: Marco van Wieringen <mvw@planets.elm.net>
7 * 7 *
8 * Version: $Id: mount.h,v 2.0 1996/11/17 16:48:14 mvw Exp mvw $
9 *
10 */ 8 */
11#ifndef _LINUX_MOUNT_H 9#ifndef _LINUX_MOUNT_H
12#define _LINUX_MOUNT_H 10#define _LINUX_MOUNT_H
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index d6fb115f5a07..ee5124ec319e 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -12,6 +12,7 @@
12#include <linux/mtd/flashchip.h> 12#include <linux/mtd/flashchip.h>
13#include <linux/mtd/map.h> 13#include <linux/mtd/map.h>
14#include <linux/mtd/cfi_endian.h> 14#include <linux/mtd/cfi_endian.h>
15#include <linux/mtd/xip.h>
15 16
16#ifdef CONFIG_MTD_CFI_I1 17#ifdef CONFIG_MTD_CFI_I1
17#define cfi_interleave(cfi) 1 18#define cfi_interleave(cfi) 1
@@ -430,7 +431,6 @@ static inline uint32_t cfi_send_gen_cmd(u_char cmd, uint32_t cmd_addr, uint32_t
430{ 431{
431 map_word val; 432 map_word val;
432 uint32_t addr = base + cfi_build_cmd_addr(cmd_addr, cfi_interleave(cfi), type); 433 uint32_t addr = base + cfi_build_cmd_addr(cmd_addr, cfi_interleave(cfi), type);
433
434 val = cfi_build_cmd(cmd, map, cfi); 434 val = cfi_build_cmd(cmd, map, cfi);
435 435
436 if (prev_val) 436 if (prev_val)
@@ -483,6 +483,13 @@ static inline void cfi_udelay(int us)
483 } 483 }
484} 484}
485 485
486int __xipram cfi_qry_present(struct map_info *map, __u32 base,
487 struct cfi_private *cfi);
488int __xipram cfi_qry_mode_on(uint32_t base, struct map_info *map,
489 struct cfi_private *cfi);
490void __xipram cfi_qry_mode_off(uint32_t base, struct map_info *map,
491 struct cfi_private *cfi);
492
486struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size, 493struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size,
487 const char* name); 494 const char* name);
488struct cfi_fixup { 495struct cfi_fixup {
diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h
index 08dd131301c1..d4f38c5fd44e 100644
--- a/include/linux/mtd/flashchip.h
+++ b/include/linux/mtd/flashchip.h
@@ -73,6 +73,10 @@ struct flchip {
73 int buffer_write_time; 73 int buffer_write_time;
74 int erase_time; 74 int erase_time;
75 75
76 int word_write_time_max;
77 int buffer_write_time_max;
78 int erase_time_max;
79
76 void *priv; 80 void *priv;
77}; 81};
78 82
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 922636548558..eae26bb6430a 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -25,8 +25,10 @@
25#define MTD_ERASE_DONE 0x08 25#define MTD_ERASE_DONE 0x08
26#define MTD_ERASE_FAILED 0x10 26#define MTD_ERASE_FAILED 0x10
27 27
28#define MTD_FAIL_ADDR_UNKNOWN 0xffffffff
29
28/* If the erase fails, fail_addr might indicate exactly which block failed. If 30/* If the erase fails, fail_addr might indicate exactly which block failed. If
29 fail_addr = 0xffffffff, the failure was not at the device level or was not 31 fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level or was not
30 specific to any particular block. */ 32 specific to any particular block. */
31struct erase_info { 33struct erase_info {
32 struct mtd_info *mtd; 34 struct mtd_info *mtd;
diff --git a/include/linux/mtd/nand-gpio.h b/include/linux/mtd/nand-gpio.h
new file mode 100644
index 000000000000..51534e50f7fc
--- /dev/null
+++ b/include/linux/mtd/nand-gpio.h
@@ -0,0 +1,19 @@
1#ifndef __LINUX_MTD_NAND_GPIO_H
2#define __LINUX_MTD_NAND_GPIO_H
3
4#include <linux/mtd/nand.h>
5
6struct gpio_nand_platdata {
7 int gpio_nce;
8 int gpio_nwp;
9 int gpio_cle;
10 int gpio_ale;
11 int gpio_rdy;
12 void (*adjust_parts)(struct gpio_nand_platdata *, size_t);
13 struct mtd_partition *parts;
14 unsigned int num_parts;
15 unsigned int options;
16 int chip_delay;
17};
18
19#endif
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 81774e5facf4..733d3f3b4eb8 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -248,6 +248,7 @@ struct nand_hw_control {
248 * @read_page_raw: function to read a raw page without ECC 248 * @read_page_raw: function to read a raw page without ECC
249 * @write_page_raw: function to write a raw page without ECC 249 * @write_page_raw: function to write a raw page without ECC
250 * @read_page: function to read a page according to the ecc generator requirements 250 * @read_page: function to read a page according to the ecc generator requirements
251 * @read_subpage: function to read parts of the page covered by ECC.
251 * @write_page: function to write a page according to the ecc generator requirements 252 * @write_page: function to write a page according to the ecc generator requirements
252 * @read_oob: function to read chip OOB data 253 * @read_oob: function to read chip OOB data
253 * @write_oob: function to write chip OOB data 254 * @write_oob: function to write chip OOB data
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h
index d1b310c92eb4..0c6bbe28f38c 100644
--- a/include/linux/mtd/onenand_regs.h
+++ b/include/linux/mtd/onenand_regs.h
@@ -152,6 +152,8 @@
152#define ONENAND_SYS_CFG1_INT (1 << 6) 152#define ONENAND_SYS_CFG1_INT (1 << 6)
153#define ONENAND_SYS_CFG1_IOBE (1 << 5) 153#define ONENAND_SYS_CFG1_IOBE (1 << 5)
154#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) 154#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4)
155#define ONENAND_SYS_CFG1_HF (1 << 2)
156#define ONENAND_SYS_CFG1_SYNC_WRITE (1 << 1)
155 157
156/* 158/*
157 * Controller Status Register F240h (R) 159 * Controller Status Register F240h (R)
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index 5014f7a9f5df..c92b4d439609 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -73,7 +73,6 @@ struct device;
73struct device_node; 73struct device_node;
74 74
75int __devinit of_mtd_parse_partitions(struct device *dev, 75int __devinit of_mtd_parse_partitions(struct device *dev,
76 struct mtd_info *mtd,
77 struct device_node *node, 76 struct device_node *node,
78 struct mtd_partition **pparts); 77 struct mtd_partition **pparts);
79 78
diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h
new file mode 100644
index 000000000000..e77c1cea404d
--- /dev/null
+++ b/include/linux/mtd/sh_flctl.h
@@ -0,0 +1,125 @@
1/*
2 * SuperH FLCTL nand controller
3 *
4 * Copyright © 2008 Renesas Solutions Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#ifndef __SH_FLCTL_H__
21#define __SH_FLCTL_H__
22
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/nand.h>
25#include <linux/mtd/partitions.h>
26
27/* FLCTL registers */
28#define FLCMNCR(f) (f->reg + 0x0)
29#define FLCMDCR(f) (f->reg + 0x4)
30#define FLCMCDR(f) (f->reg + 0x8)
31#define FLADR(f) (f->reg + 0xC)
32#define FLADR2(f) (f->reg + 0x3C)
33#define FLDATAR(f) (f->reg + 0x10)
34#define FLDTCNTR(f) (f->reg + 0x14)
35#define FLINTDMACR(f) (f->reg + 0x18)
36#define FLBSYTMR(f) (f->reg + 0x1C)
37#define FLBSYCNT(f) (f->reg + 0x20)
38#define FLDTFIFO(f) (f->reg + 0x24)
39#define FLECFIFO(f) (f->reg + 0x28)
40#define FLTRCR(f) (f->reg + 0x2C)
41#define FL4ECCRESULT0(f) (f->reg + 0x80)
42#define FL4ECCRESULT1(f) (f->reg + 0x84)
43#define FL4ECCRESULT2(f) (f->reg + 0x88)
44#define FL4ECCRESULT3(f) (f->reg + 0x8C)
45#define FL4ECCCR(f) (f->reg + 0x90)
46#define FL4ECCCNT(f) (f->reg + 0x94)
47#define FLERRADR(f) (f->reg + 0x98)
48
49/* FLCMNCR control bits */
50#define ECCPOS2 (0x1 << 25)
51#define _4ECCCNTEN (0x1 << 24)
52#define _4ECCEN (0x1 << 23)
53#define _4ECCCORRECT (0x1 << 22)
54#define SNAND_E (0x1 << 18) /* SNAND (0=512 1=2048)*/
55#define QTSEL_E (0x1 << 17)
56#define ENDIAN (0x1 << 16) /* 1 = little endian */
57#define FCKSEL_E (0x1 << 15)
58#define ECCPOS_00 (0x00 << 12)
59#define ECCPOS_01 (0x01 << 12)
60#define ECCPOS_02 (0x02 << 12)
61#define ACM_SACCES_MODE (0x01 << 10)
62#define NANWF_E (0x1 << 9)
63#define SE_D (0x1 << 8) /* Spare area disable */
64#define CE1_ENABLE (0x1 << 4) /* Chip Enable 1 */
65#define CE0_ENABLE (0x1 << 3) /* Chip Enable 0 */
66#define TYPESEL_SET (0x1 << 0)
67
68/* FLCMDCR control bits */
69#define ADRCNT2_E (0x1 << 31) /* 5byte address enable */
70#define ADRMD_E (0x1 << 26) /* Sector address access */
71#define CDSRC_E (0x1 << 25) /* Data buffer selection */
72#define DOSR_E (0x1 << 24) /* Status read check */
73#define SELRW (0x1 << 21) /* 0:read 1:write */
74#define DOADR_E (0x1 << 20) /* Address stage execute */
75#define ADRCNT_1 (0x00 << 18) /* Address data bytes: 1byte */
76#define ADRCNT_2 (0x01 << 18) /* Address data bytes: 2byte */
77#define ADRCNT_3 (0x02 << 18) /* Address data bytes: 3byte */
78#define ADRCNT_4 (0x03 << 18) /* Address data bytes: 4byte */
79#define DOCMD2_E (0x1 << 17) /* 2nd cmd stage execute */
80#define DOCMD1_E (0x1 << 16) /* 1st cmd stage execute */
81
82/* FLTRCR control bits */
83#define TRSTRT (0x1 << 0) /* translation start */
84#define TREND (0x1 << 1) /* translation end */
85
86/* FL4ECCCR control bits */
87#define _4ECCFA (0x1 << 2) /* 4 symbols correct fault */
88#define _4ECCEND (0x1 << 1) /* 4 symbols end */
89#define _4ECCEXST (0x1 << 0) /* 4 symbols exist */
90
91#define INIT_FL4ECCRESULT_VAL 0x03FF03FF
92#define LOOP_TIMEOUT_MAX 0x00010000
93
94#define mtd_to_flctl(mtd) container_of(mtd, struct sh_flctl, mtd)
95
96struct sh_flctl {
97 struct mtd_info mtd;
98 struct nand_chip chip;
99 void __iomem *reg;
100
101 uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
102 int read_bytes;
103 int index;
104 int seqin_column; /* column in SEQIN cmd */
105 int seqin_page_addr; /* page_addr in SEQIN cmd */
106 uint32_t seqin_read_cmd; /* read cmd in SEQIN cmd */
107 int erase1_page_addr; /* page_addr in ERASE1 cmd */
108 uint32_t erase_ADRCNT; /* bits of FLCMDCR in ERASE1 cmd */
109 uint32_t rw_ADRCNT; /* bits of FLCMDCR in READ WRITE cmd */
110
111 int hwecc_cant_correct[4];
112
113 unsigned page_size:1; /* NAND page size (0 = 512, 1 = 2048) */
114 unsigned hwecc:1; /* Hardware ECC (0 = disabled, 1 = enabled) */
115};
116
117struct sh_flctl_platform_data {
118 struct mtd_partition *parts;
119 int nr_parts;
120 unsigned long flcmncr_val;
121
122 unsigned has_hwecc:1;
123};
124
125#endif /* __SH_FLCTL_H__ */
diff --git a/include/linux/netfilter/nfnetlink.h b/include/linux/netfilter/nfnetlink.h
index 0d8424f76899..7d8e0455ccac 100644
--- a/include/linux/netfilter/nfnetlink.h
+++ b/include/linux/netfilter/nfnetlink.h
@@ -78,6 +78,9 @@ extern int nfnetlink_send(struct sk_buff *skb, u32 pid, unsigned group,
78 int echo); 78 int echo);
79extern int nfnetlink_unicast(struct sk_buff *skb, u_int32_t pid, int flags); 79extern int nfnetlink_unicast(struct sk_buff *skb, u_int32_t pid, int flags);
80 80
81extern void nfnl_lock(void);
82extern void nfnl_unlock(void);
83
81#define MODULE_ALIAS_NFNL_SUBSYS(subsys) \ 84#define MODULE_ALIAS_NFNL_SUBSYS(subsys) \
82 MODULE_ALIAS("nfnetlink-subsys-" __stringify(subsys)) 85 MODULE_ALIAS("nfnetlink-subsys-" __stringify(subsys))
83 86
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 78a5922a2f11..4eaa8347a0d9 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -137,7 +137,7 @@ struct nfs_inode {
137 unsigned long attrtimeo_timestamp; 137 unsigned long attrtimeo_timestamp;
138 __u64 change_attr; /* v4 only */ 138 __u64 change_attr; /* v4 only */
139 139
140 unsigned long last_updated; 140 unsigned long attr_gencount;
141 /* "Generation counter" for the attribute cache. This is 141 /* "Generation counter" for the attribute cache. This is
142 * bumped whenever we update the metadata on the 142 * bumped whenever we update the metadata on the
143 * server. 143 * server.
@@ -200,11 +200,10 @@ struct nfs_inode {
200/* 200/*
201 * Bit offsets in flags field 201 * Bit offsets in flags field
202 */ 202 */
203#define NFS_INO_REVALIDATING (0) /* revalidating attrs */ 203#define NFS_INO_ADVISE_RDPLUS (0) /* advise readdirplus */
204#define NFS_INO_ADVISE_RDPLUS (1) /* advise readdirplus */ 204#define NFS_INO_STALE (1) /* possible stale inode */
205#define NFS_INO_STALE (2) /* possible stale inode */ 205#define NFS_INO_ACL_LRU_SET (2) /* Inode is on the LRU list */
206#define NFS_INO_ACL_LRU_SET (3) /* Inode is on the LRU list */ 206#define NFS_INO_MOUNTPOINT (3) /* inode is remote mountpoint */
207#define NFS_INO_MOUNTPOINT (4) /* inode is remote mountpoint */
208 207
209static inline struct nfs_inode *NFS_I(const struct inode *inode) 208static inline struct nfs_inode *NFS_I(const struct inode *inode)
210{ 209{
@@ -345,15 +344,11 @@ extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ct
345extern void put_nfs_open_context(struct nfs_open_context *ctx); 344extern void put_nfs_open_context(struct nfs_open_context *ctx);
346extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, int mode); 345extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, int mode);
347extern u64 nfs_compat_user_ino64(u64 fileid); 346extern u64 nfs_compat_user_ino64(u64 fileid);
347extern void nfs_fattr_init(struct nfs_fattr *fattr);
348 348
349/* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */ 349/* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */
350extern __be32 root_nfs_parse_addr(char *name); /*__init*/ 350extern __be32 root_nfs_parse_addr(char *name); /*__init*/
351 351extern unsigned long nfs_inc_attr_generation_counter(void);
352static inline void nfs_fattr_init(struct nfs_fattr *fattr)
353{
354 fattr->valid = 0;
355 fattr->time_start = jiffies;
356}
357 352
358/* 353/*
359 * linux/fs/nfs/file.c 354 * linux/fs/nfs/file.c
@@ -372,8 +367,12 @@ static inline struct nfs_open_context *nfs_file_open_context(struct file *filp)
372 367
373static inline struct rpc_cred *nfs_file_cred(struct file *file) 368static inline struct rpc_cred *nfs_file_cred(struct file *file)
374{ 369{
375 if (file != NULL) 370 if (file != NULL) {
376 return nfs_file_open_context(file)->cred; 371 struct nfs_open_context *ctx =
372 nfs_file_open_context(file);
373 if (ctx)
374 return ctx->cred;
375 }
377 return NULL; 376 return NULL;
378} 377}
379 378
diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h
index c9beacd16c00..4e477ae58699 100644
--- a/include/linux/nfs_fs_sb.h
+++ b/include/linux/nfs_fs_sb.h
@@ -119,7 +119,6 @@ struct nfs_server {
119 void (*destroy)(struct nfs_server *); 119 void (*destroy)(struct nfs_server *);
120 120
121 atomic_t active; /* Keep trace of any activity to this server */ 121 atomic_t active; /* Keep trace of any activity to this server */
122 wait_queue_head_t active_wq; /* Wait for any activity to stop */
123 122
124 /* mountd-related mount options */ 123 /* mountd-related mount options */
125 struct sockaddr_storage mountd_address; 124 struct sockaddr_storage mountd_address;
diff --git a/include/linux/nfs_mount.h b/include/linux/nfs_mount.h
index df7c6b7a7ebb..6549a06ac16e 100644
--- a/include/linux/nfs_mount.h
+++ b/include/linux/nfs_mount.h
@@ -65,4 +65,8 @@ struct nfs_mount_data {
65#define NFS_MOUNT_UNSHARED 0x8000 /* 5 */ 65#define NFS_MOUNT_UNSHARED 0x8000 /* 5 */
66#define NFS_MOUNT_FLAGMASK 0xFFFF 66#define NFS_MOUNT_FLAGMASK 0xFFFF
67 67
68/* The following are for internal use only */
69#define NFS_MOUNT_LOOKUP_CACHE_NONEG 0x10000
70#define NFS_MOUNT_LOOKUP_CACHE_NONE 0x20000
71
68#endif 72#endif
diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h
index 8c77c11224d1..c1c31acb8a2b 100644
--- a/include/linux/nfs_xdr.h
+++ b/include/linux/nfs_xdr.h
@@ -36,6 +36,7 @@ struct nfs_fattr {
36 __u32 nlink; 36 __u32 nlink;
37 __u32 uid; 37 __u32 uid;
38 __u32 gid; 38 __u32 gid;
39 dev_t rdev;
39 __u64 size; 40 __u64 size;
40 union { 41 union {
41 struct { 42 struct {
@@ -46,7 +47,6 @@ struct nfs_fattr {
46 __u64 used; 47 __u64 used;
47 } nfs3; 48 } nfs3;
48 } du; 49 } du;
49 dev_t rdev;
50 struct nfs_fsid fsid; 50 struct nfs_fsid fsid;
51 __u64 fileid; 51 __u64 fileid;
52 struct timespec atime; 52 struct timespec atime;
@@ -56,6 +56,7 @@ struct nfs_fattr {
56 __u64 change_attr; /* NFSv4 change attribute */ 56 __u64 change_attr; /* NFSv4 change attribute */
57 __u64 pre_change_attr;/* pre-op NFSv4 change attribute */ 57 __u64 pre_change_attr;/* pre-op NFSv4 change attribute */
58 unsigned long time_start; 58 unsigned long time_start;
59 unsigned long gencount;
59}; 60};
60 61
61#define NFS_ATTR_WCC 0x0001 /* pre-op WCC data */ 62#define NFS_ATTR_WCC 0x0001 /* pre-op WCC data */
@@ -672,16 +673,16 @@ struct nfs4_rename_res {
672 struct nfs_fattr * new_fattr; 673 struct nfs_fattr * new_fattr;
673}; 674};
674 675
675#define NFS4_SETCLIENTID_NAMELEN (56) 676#define NFS4_SETCLIENTID_NAMELEN (127)
676struct nfs4_setclientid { 677struct nfs4_setclientid {
677 const nfs4_verifier * sc_verifier; 678 const nfs4_verifier * sc_verifier;
678 unsigned int sc_name_len; 679 unsigned int sc_name_len;
679 char sc_name[NFS4_SETCLIENTID_NAMELEN]; 680 char sc_name[NFS4_SETCLIENTID_NAMELEN + 1];
680 u32 sc_prog; 681 u32 sc_prog;
681 unsigned int sc_netid_len; 682 unsigned int sc_netid_len;
682 char sc_netid[RPCBIND_MAXNETIDLEN]; 683 char sc_netid[RPCBIND_MAXNETIDLEN + 1];
683 unsigned int sc_uaddr_len; 684 unsigned int sc_uaddr_len;
684 char sc_uaddr[RPCBIND_MAXUADDRLEN]; 685 char sc_uaddr[RPCBIND_MAXUADDRLEN + 1];
685 u32 sc_cb_ident; 686 u32 sc_cb_ident;
686}; 687};
687 688
diff --git a/include/linux/nfsd/nfsd.h b/include/linux/nfsd/nfsd.h
index 108f47e5fd95..21269405ffe2 100644
--- a/include/linux/nfsd/nfsd.h
+++ b/include/linux/nfsd/nfsd.h
@@ -38,6 +38,7 @@
38#define NFSD_MAY_LOCK 32 38#define NFSD_MAY_LOCK 32
39#define NFSD_MAY_OWNER_OVERRIDE 64 39#define NFSD_MAY_OWNER_OVERRIDE 64
40#define NFSD_MAY_LOCAL_ACCESS 128 /* IRIX doing local access check on device special file*/ 40#define NFSD_MAY_LOCAL_ACCESS 128 /* IRIX doing local access check on device special file*/
41#define NFSD_MAY_BYPASS_GSS_ON_ROOT 256
41 42
42#define NFSD_MAY_CREATE (NFSD_MAY_EXEC|NFSD_MAY_WRITE) 43#define NFSD_MAY_CREATE (NFSD_MAY_EXEC|NFSD_MAY_WRITE)
43#define NFSD_MAY_REMOVE (NFSD_MAY_EXEC|NFSD_MAY_WRITE|NFSD_MAY_TRUNC) 44#define NFSD_MAY_REMOVE (NFSD_MAY_EXEC|NFSD_MAY_WRITE|NFSD_MAY_TRUNC)
@@ -125,7 +126,7 @@ int nfsd_truncate(struct svc_rqst *, struct svc_fh *,
125__be32 nfsd_readdir(struct svc_rqst *, struct svc_fh *, 126__be32 nfsd_readdir(struct svc_rqst *, struct svc_fh *,
126 loff_t *, struct readdir_cd *, filldir_t); 127 loff_t *, struct readdir_cd *, filldir_t);
127__be32 nfsd_statfs(struct svc_rqst *, struct svc_fh *, 128__be32 nfsd_statfs(struct svc_rqst *, struct svc_fh *,
128 struct kstatfs *); 129 struct kstatfs *, int access);
129 130
130int nfsd_notify_change(struct inode *, struct iattr *); 131int nfsd_notify_change(struct inode *, struct iattr *);
131__be32 nfsd_permission(struct svc_rqst *, struct svc_export *, 132__be32 nfsd_permission(struct svc_rqst *, struct svc_export *,
diff --git a/include/linux/of.h b/include/linux/of.h
index 79886ade070f..e2488f5e7cb2 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -71,5 +71,8 @@ extern int of_n_size_cells(struct device_node *np);
71extern const struct of_device_id *of_match_node( 71extern const struct of_device_id *of_match_node(
72 const struct of_device_id *matches, const struct device_node *node); 72 const struct of_device_id *matches, const struct device_node *node);
73extern int of_modalias_node(struct device_node *node, char *modalias, int len); 73extern int of_modalias_node(struct device_node *node, char *modalias, int len);
74extern int of_parse_phandles_with_args(struct device_node *np,
75 const char *list_name, const char *cells_name, int index,
76 struct device_node **out_node, const void **out_args);
74 77
75#endif /* _LINUX_OF_H */ 78#endif /* _LINUX_OF_H */
diff --git a/include/linux/oprofile.h b/include/linux/oprofile.h
index bcb8f725427c..5231861f357d 100644
--- a/include/linux/oprofile.h
+++ b/include/linux/oprofile.h
@@ -86,13 +86,6 @@ int oprofile_arch_init(struct oprofile_operations * ops);
86void oprofile_arch_exit(void); 86void oprofile_arch_exit(void);
87 87
88/** 88/**
89 * Add data to the event buffer.
90 * The data passed is free-form, but typically consists of
91 * file offsets, dcookies, context information, and ESCAPE codes.
92 */
93void add_event_entry(unsigned long data);
94
95/**
96 * Add a sample. This may be called from any context. Pass 89 * Add a sample. This may be called from any context. Pass
97 * smp_processor_id() as cpu. 90 * smp_processor_id() as cpu.
98 */ 91 */
@@ -162,5 +155,14 @@ int oprofilefs_ulong_from_user(unsigned long * val, char const __user * buf, siz
162 155
163/** lock for read/write safety */ 156/** lock for read/write safety */
164extern spinlock_t oprofilefs_lock; 157extern spinlock_t oprofilefs_lock;
158
159/**
160 * Add the contents of a circular buffer to the event buffer.
161 */
162void oprofile_put_buff(unsigned long *buf, unsigned int start,
163 unsigned int stop, unsigned int max);
164
165unsigned long oprofile_get_cpu_buffer_size(void);
166void oprofile_cpu_buffer_inc_smpl_lost(void);
165 167
166#endif /* OPROFILE_H */ 168#endif /* OPROFILE_H */
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index c74d3e875314..b12f93a3c345 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -93,6 +93,11 @@ enum pageflags {
93 PG_mappedtodisk, /* Has blocks allocated on-disk */ 93 PG_mappedtodisk, /* Has blocks allocated on-disk */
94 PG_reclaim, /* To be reclaimed asap */ 94 PG_reclaim, /* To be reclaimed asap */
95 PG_buddy, /* Page is free, on buddy lists */ 95 PG_buddy, /* Page is free, on buddy lists */
96 PG_swapbacked, /* Page is backed by RAM/swap */
97#ifdef CONFIG_UNEVICTABLE_LRU
98 PG_unevictable, /* Page is "unevictable" */
99 PG_mlocked, /* Page is vma mlocked */
100#endif
96#ifdef CONFIG_IA64_UNCACHED_ALLOCATOR 101#ifdef CONFIG_IA64_UNCACHED_ALLOCATOR
97 PG_uncached, /* Page has been mapped as uncached */ 102 PG_uncached, /* Page has been mapped as uncached */
98#endif 103#endif
@@ -161,6 +166,18 @@ static inline int Page##uname(struct page *page) \
161#define TESTSCFLAG(uname, lname) \ 166#define TESTSCFLAG(uname, lname) \
162 TESTSETFLAG(uname, lname) TESTCLEARFLAG(uname, lname) 167 TESTSETFLAG(uname, lname) TESTCLEARFLAG(uname, lname)
163 168
169#define SETPAGEFLAG_NOOP(uname) \
170static inline void SetPage##uname(struct page *page) { }
171
172#define CLEARPAGEFLAG_NOOP(uname) \
173static inline void ClearPage##uname(struct page *page) { }
174
175#define __CLEARPAGEFLAG_NOOP(uname) \
176static inline void __ClearPage##uname(struct page *page) { }
177
178#define TESTCLEARFLAG_FALSE(uname) \
179static inline int TestClearPage##uname(struct page *page) { return 0; }
180
164struct page; /* forward declaration */ 181struct page; /* forward declaration */
165 182
166TESTPAGEFLAG(Locked, locked) 183TESTPAGEFLAG(Locked, locked)
@@ -169,6 +186,7 @@ PAGEFLAG(Referenced, referenced) TESTCLEARFLAG(Referenced, referenced)
169PAGEFLAG(Dirty, dirty) TESTSCFLAG(Dirty, dirty) __CLEARPAGEFLAG(Dirty, dirty) 186PAGEFLAG(Dirty, dirty) TESTSCFLAG(Dirty, dirty) __CLEARPAGEFLAG(Dirty, dirty)
170PAGEFLAG(LRU, lru) __CLEARPAGEFLAG(LRU, lru) 187PAGEFLAG(LRU, lru) __CLEARPAGEFLAG(LRU, lru)
171PAGEFLAG(Active, active) __CLEARPAGEFLAG(Active, active) 188PAGEFLAG(Active, active) __CLEARPAGEFLAG(Active, active)
189 TESTCLEARFLAG(Active, active)
172__PAGEFLAG(Slab, slab) 190__PAGEFLAG(Slab, slab)
173PAGEFLAG(Checked, checked) /* Used by some filesystems */ 191PAGEFLAG(Checked, checked) /* Used by some filesystems */
174PAGEFLAG(Pinned, pinned) TESTSCFLAG(Pinned, pinned) /* Xen */ 192PAGEFLAG(Pinned, pinned) TESTSCFLAG(Pinned, pinned) /* Xen */
@@ -176,6 +194,7 @@ PAGEFLAG(SavePinned, savepinned); /* Xen */
176PAGEFLAG(Reserved, reserved) __CLEARPAGEFLAG(Reserved, reserved) 194PAGEFLAG(Reserved, reserved) __CLEARPAGEFLAG(Reserved, reserved)
177PAGEFLAG(Private, private) __CLEARPAGEFLAG(Private, private) 195PAGEFLAG(Private, private) __CLEARPAGEFLAG(Private, private)
178 __SETPAGEFLAG(Private, private) 196 __SETPAGEFLAG(Private, private)
197PAGEFLAG(SwapBacked, swapbacked) __CLEARPAGEFLAG(SwapBacked, swapbacked)
179 198
180__PAGEFLAG(SlobPage, slob_page) 199__PAGEFLAG(SlobPage, slob_page)
181__PAGEFLAG(SlobFree, slob_free) 200__PAGEFLAG(SlobFree, slob_free)
@@ -211,6 +230,25 @@ PAGEFLAG(SwapCache, swapcache)
211PAGEFLAG_FALSE(SwapCache) 230PAGEFLAG_FALSE(SwapCache)
212#endif 231#endif
213 232
233#ifdef CONFIG_UNEVICTABLE_LRU
234PAGEFLAG(Unevictable, unevictable) __CLEARPAGEFLAG(Unevictable, unevictable)
235 TESTCLEARFLAG(Unevictable, unevictable)
236
237#define MLOCK_PAGES 1
238PAGEFLAG(Mlocked, mlocked) __CLEARPAGEFLAG(Mlocked, mlocked)
239 TESTSCFLAG(Mlocked, mlocked)
240
241#else
242
243#define MLOCK_PAGES 0
244PAGEFLAG_FALSE(Mlocked)
245 SETPAGEFLAG_NOOP(Mlocked) TESTCLEARFLAG_FALSE(Mlocked)
246
247PAGEFLAG_FALSE(Unevictable) TESTCLEARFLAG_FALSE(Unevictable)
248 SETPAGEFLAG_NOOP(Unevictable) CLEARPAGEFLAG_NOOP(Unevictable)
249 __CLEARPAGEFLAG_NOOP(Unevictable)
250#endif
251
214#ifdef CONFIG_IA64_UNCACHED_ALLOCATOR 252#ifdef CONFIG_IA64_UNCACHED_ALLOCATOR
215PAGEFLAG(Uncached, uncached) 253PAGEFLAG(Uncached, uncached)
216#else 254#else
@@ -326,15 +364,25 @@ static inline void __ClearPageTail(struct page *page)
326 364
327#endif /* !PAGEFLAGS_EXTENDED */ 365#endif /* !PAGEFLAGS_EXTENDED */
328 366
367#ifdef CONFIG_UNEVICTABLE_LRU
368#define __PG_UNEVICTABLE (1 << PG_unevictable)
369#define __PG_MLOCKED (1 << PG_mlocked)
370#else
371#define __PG_UNEVICTABLE 0
372#define __PG_MLOCKED 0
373#endif
374
329#define PAGE_FLAGS (1 << PG_lru | 1 << PG_private | 1 << PG_locked | \ 375#define PAGE_FLAGS (1 << PG_lru | 1 << PG_private | 1 << PG_locked | \
330 1 << PG_buddy | 1 << PG_writeback | \ 376 1 << PG_buddy | 1 << PG_writeback | \
331 1 << PG_slab | 1 << PG_swapcache | 1 << PG_active) 377 1 << PG_slab | 1 << PG_swapcache | 1 << PG_active | \
378 __PG_UNEVICTABLE | __PG_MLOCKED)
332 379
333/* 380/*
334 * Flags checked in bad_page(). Pages on the free list should not have 381 * Flags checked in bad_page(). Pages on the free list should not have
335 * these flags set. It they are, there is a problem. 382 * these flags set. It they are, there is a problem.
336 */ 383 */
337#define PAGE_FLAGS_CLEAR_WHEN_BAD (PAGE_FLAGS | 1 << PG_reclaim | 1 << PG_dirty) 384#define PAGE_FLAGS_CLEAR_WHEN_BAD (PAGE_FLAGS | \
385 1 << PG_reclaim | 1 << PG_dirty | 1 << PG_swapbacked)
338 386
339/* 387/*
340 * Flags checked when a page is freed. Pages being freed should not have 388 * Flags checked when a page is freed. Pages being freed should not have
@@ -347,7 +395,8 @@ static inline void __ClearPageTail(struct page *page)
347 * Pages being prepped should not have these flags set. It they are, there 395 * Pages being prepped should not have these flags set. It they are, there
348 * is a problem. 396 * is a problem.
349 */ 397 */
350#define PAGE_FLAGS_CHECK_AT_PREP (PAGE_FLAGS | 1 << PG_reserved | 1 << PG_dirty) 398#define PAGE_FLAGS_CHECK_AT_PREP (PAGE_FLAGS | \
399 1 << PG_reserved | 1 << PG_dirty | 1 << PG_swapbacked)
351 400
352#endif /* !__GENERATING_BOUNDS_H */ 401#endif /* !__GENERATING_BOUNDS_H */
353#endif /* PAGE_FLAGS_H */ 402#endif /* PAGE_FLAGS_H */
diff --git a/include/linux/page_cgroup.h b/include/linux/page_cgroup.h
new file mode 100644
index 000000000000..f546ad6fc028
--- /dev/null
+++ b/include/linux/page_cgroup.h
@@ -0,0 +1,108 @@
1#ifndef __LINUX_PAGE_CGROUP_H
2#define __LINUX_PAGE_CGROUP_H
3
4#ifdef CONFIG_CGROUP_MEM_RES_CTLR
5#include <linux/bit_spinlock.h>
6/*
7 * Page Cgroup can be considered as an extended mem_map.
8 * A page_cgroup page is associated with every page descriptor. The
9 * page_cgroup helps us identify information about the cgroup
10 * All page cgroups are allocated at boot or memory hotplug event,
11 * then the page cgroup for pfn always exists.
12 */
13struct page_cgroup {
14 unsigned long flags;
15 struct mem_cgroup *mem_cgroup;
16 struct page *page;
17 struct list_head lru; /* per cgroup LRU list */
18};
19
20void __init pgdat_page_cgroup_init(struct pglist_data *pgdat);
21void __init page_cgroup_init(void);
22struct page_cgroup *lookup_page_cgroup(struct page *page);
23
24enum {
25 /* flags for mem_cgroup */
26 PCG_LOCK, /* page cgroup is locked */
27 PCG_CACHE, /* charged as cache */
28 PCG_USED, /* this object is in use. */
29 /* flags for LRU placement */
30 PCG_ACTIVE, /* page is active in this cgroup */
31 PCG_FILE, /* page is file system backed */
32 PCG_UNEVICTABLE, /* page is unevictableable */
33};
34
35#define TESTPCGFLAG(uname, lname) \
36static inline int PageCgroup##uname(struct page_cgroup *pc) \
37 { return test_bit(PCG_##lname, &pc->flags); }
38
39#define SETPCGFLAG(uname, lname) \
40static inline void SetPageCgroup##uname(struct page_cgroup *pc)\
41 { set_bit(PCG_##lname, &pc->flags); }
42
43#define CLEARPCGFLAG(uname, lname) \
44static inline void ClearPageCgroup##uname(struct page_cgroup *pc) \
45 { clear_bit(PCG_##lname, &pc->flags); }
46
47/* Cache flag is set only once (at allocation) */
48TESTPCGFLAG(Cache, CACHE)
49
50TESTPCGFLAG(Used, USED)
51CLEARPCGFLAG(Used, USED)
52
53/* LRU management flags (from global-lru definition) */
54TESTPCGFLAG(File, FILE)
55SETPCGFLAG(File, FILE)
56CLEARPCGFLAG(File, FILE)
57
58TESTPCGFLAG(Active, ACTIVE)
59SETPCGFLAG(Active, ACTIVE)
60CLEARPCGFLAG(Active, ACTIVE)
61
62TESTPCGFLAG(Unevictable, UNEVICTABLE)
63SETPCGFLAG(Unevictable, UNEVICTABLE)
64CLEARPCGFLAG(Unevictable, UNEVICTABLE)
65
66static inline int page_cgroup_nid(struct page_cgroup *pc)
67{
68 return page_to_nid(pc->page);
69}
70
71static inline enum zone_type page_cgroup_zid(struct page_cgroup *pc)
72{
73 return page_zonenum(pc->page);
74}
75
76static inline void lock_page_cgroup(struct page_cgroup *pc)
77{
78 bit_spin_lock(PCG_LOCK, &pc->flags);
79}
80
81static inline int trylock_page_cgroup(struct page_cgroup *pc)
82{
83 return bit_spin_trylock(PCG_LOCK, &pc->flags);
84}
85
86static inline void unlock_page_cgroup(struct page_cgroup *pc)
87{
88 bit_spin_unlock(PCG_LOCK, &pc->flags);
89}
90
91#else /* CONFIG_CGROUP_MEM_RES_CTLR */
92struct page_cgroup;
93
94static inline void pgdat_page_cgroup_init(struct pglist_data *pgdat)
95{
96}
97
98static inline struct page_cgroup *lookup_page_cgroup(struct page *page)
99{
100 return NULL;
101}
102
103static inline void page_cgroup_init(void)
104{
105}
106
107#endif
108#endif
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 5da31c12101c..709742be02f0 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -32,6 +32,34 @@ static inline void mapping_set_error(struct address_space *mapping, int error)
32 } 32 }
33} 33}
34 34
35#ifdef CONFIG_UNEVICTABLE_LRU
36#define AS_UNEVICTABLE (__GFP_BITS_SHIFT + 2) /* e.g., ramdisk, SHM_LOCK */
37
38static inline void mapping_set_unevictable(struct address_space *mapping)
39{
40 set_bit(AS_UNEVICTABLE, &mapping->flags);
41}
42
43static inline void mapping_clear_unevictable(struct address_space *mapping)
44{
45 clear_bit(AS_UNEVICTABLE, &mapping->flags);
46}
47
48static inline int mapping_unevictable(struct address_space *mapping)
49{
50 if (likely(mapping))
51 return test_bit(AS_UNEVICTABLE, &mapping->flags);
52 return !!mapping;
53}
54#else
55static inline void mapping_set_unevictable(struct address_space *mapping) { }
56static inline void mapping_clear_unevictable(struct address_space *mapping) { }
57static inline int mapping_unevictable(struct address_space *mapping)
58{
59 return 0;
60}
61#endif
62
35static inline gfp_t mapping_gfp_mask(struct address_space * mapping) 63static inline gfp_t mapping_gfp_mask(struct address_space * mapping)
36{ 64{
37 return (__force gfp_t)mapping->flags & __GFP_BITS_MASK; 65 return (__force gfp_t)mapping->flags & __GFP_BITS_MASK;
@@ -271,19 +299,19 @@ extern int __lock_page_killable(struct page *page);
271extern void __lock_page_nosync(struct page *page); 299extern void __lock_page_nosync(struct page *page);
272extern void unlock_page(struct page *page); 300extern void unlock_page(struct page *page);
273 301
274static inline void set_page_locked(struct page *page) 302static inline void __set_page_locked(struct page *page)
275{ 303{
276 set_bit(PG_locked, &page->flags); 304 __set_bit(PG_locked, &page->flags);
277} 305}
278 306
279static inline void clear_page_locked(struct page *page) 307static inline void __clear_page_locked(struct page *page)
280{ 308{
281 clear_bit(PG_locked, &page->flags); 309 __clear_bit(PG_locked, &page->flags);
282} 310}
283 311
284static inline int trylock_page(struct page *page) 312static inline int trylock_page(struct page *page)
285{ 313{
286 return !test_and_set_bit(PG_locked, &page->flags); 314 return (likely(!test_and_set_bit_lock(PG_locked, &page->flags)));
287} 315}
288 316
289/* 317/*
@@ -410,17 +438,17 @@ extern void __remove_from_page_cache(struct page *page);
410 438
411/* 439/*
412 * Like add_to_page_cache_locked, but used to add newly allocated pages: 440 * Like add_to_page_cache_locked, but used to add newly allocated pages:
413 * the page is new, so we can just run set_page_locked() against it. 441 * the page is new, so we can just run __set_page_locked() against it.
414 */ 442 */
415static inline int add_to_page_cache(struct page *page, 443static inline int add_to_page_cache(struct page *page,
416 struct address_space *mapping, pgoff_t offset, gfp_t gfp_mask) 444 struct address_space *mapping, pgoff_t offset, gfp_t gfp_mask)
417{ 445{
418 int error; 446 int error;
419 447
420 set_page_locked(page); 448 __set_page_locked(page);
421 error = add_to_page_cache_locked(page, mapping, offset, gfp_mask); 449 error = add_to_page_cache_locked(page, mapping, offset, gfp_mask);
422 if (unlikely(error)) 450 if (unlikely(error))
423 clear_page_locked(page); 451 __clear_page_locked(page);
424 return error; 452 return error;
425} 453}
426 454
diff --git a/include/linux/pagevec.h b/include/linux/pagevec.h
index 8eb7fa76c1d0..e90a2cb02915 100644
--- a/include/linux/pagevec.h
+++ b/include/linux/pagevec.h
@@ -23,9 +23,9 @@ struct pagevec {
23void __pagevec_release(struct pagevec *pvec); 23void __pagevec_release(struct pagevec *pvec);
24void __pagevec_release_nonlru(struct pagevec *pvec); 24void __pagevec_release_nonlru(struct pagevec *pvec);
25void __pagevec_free(struct pagevec *pvec); 25void __pagevec_free(struct pagevec *pvec);
26void __pagevec_lru_add(struct pagevec *pvec); 26void ____pagevec_lru_add(struct pagevec *pvec, enum lru_list lru);
27void __pagevec_lru_add_active(struct pagevec *pvec);
28void pagevec_strip(struct pagevec *pvec); 27void pagevec_strip(struct pagevec *pvec);
28void pagevec_swap_free(struct pagevec *pvec);
29unsigned pagevec_lookup(struct pagevec *pvec, struct address_space *mapping, 29unsigned pagevec_lookup(struct pagevec *pvec, struct address_space *mapping,
30 pgoff_t start, unsigned nr_pages); 30 pgoff_t start, unsigned nr_pages);
31unsigned pagevec_lookup_tag(struct pagevec *pvec, 31unsigned pagevec_lookup_tag(struct pagevec *pvec,
@@ -81,10 +81,36 @@ static inline void pagevec_free(struct pagevec *pvec)
81 __pagevec_free(pvec); 81 __pagevec_free(pvec);
82} 82}
83 83
84static inline void pagevec_lru_add(struct pagevec *pvec) 84static inline void __pagevec_lru_add_anon(struct pagevec *pvec)
85{
86 ____pagevec_lru_add(pvec, LRU_INACTIVE_ANON);
87}
88
89static inline void __pagevec_lru_add_active_anon(struct pagevec *pvec)
90{
91 ____pagevec_lru_add(pvec, LRU_ACTIVE_ANON);
92}
93
94static inline void __pagevec_lru_add_file(struct pagevec *pvec)
95{
96 ____pagevec_lru_add(pvec, LRU_INACTIVE_FILE);
97}
98
99static inline void __pagevec_lru_add_active_file(struct pagevec *pvec)
100{
101 ____pagevec_lru_add(pvec, LRU_ACTIVE_FILE);
102}
103
104static inline void pagevec_lru_add_file(struct pagevec *pvec)
105{
106 if (pagevec_count(pvec))
107 __pagevec_lru_add_file(pvec);
108}
109
110static inline void pagevec_lru_add_anon(struct pagevec *pvec)
85{ 111{
86 if (pagevec_count(pvec)) 112 if (pagevec_count(pvec))
87 __pagevec_lru_add(pvec); 113 __pagevec_lru_add_anon(pvec);
88} 114}
89 115
90#endif /* _LINUX_PAGEVEC_H */ 116#endif /* _LINUX_PAGEVEC_H */
diff --git a/include/linux/parport.h b/include/linux/parport.h
index 6a0d7cdb5774..e1f83c5065c5 100644
--- a/include/linux/parport.h
+++ b/include/linux/parport.h
@@ -1,5 +1,3 @@
1/* $Id: parport.h,v 1.1 1998/05/17 10:57:52 andrea Exp andrea $ */
2
3/* 1/*
4 * Any part of this program may be used in documents licensed under 2 * Any part of this program may be used in documents licensed under
5 * the GNU Free Documentation License, Version 1.1 or any later version 3 * the GNU Free Documentation License, Version 1.1 or any later version
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 98dc6243a706..085187be29c7 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -214,6 +214,7 @@ struct pci_dev {
214 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 214 unsigned int broken_parity_status:1; /* Device generates false positive parity */
215 unsigned int msi_enabled:1; 215 unsigned int msi_enabled:1;
216 unsigned int msix_enabled:1; 216 unsigned int msix_enabled:1;
217 unsigned int ari_enabled:1; /* ARI forwarding */
217 unsigned int is_managed:1; 218 unsigned int is_managed:1;
218 unsigned int is_pcie:1; 219 unsigned int is_pcie:1;
219 pci_dev_flags_t dev_flags; 220 pci_dev_flags_t dev_flags;
@@ -347,7 +348,6 @@ struct pci_bus_region {
347struct pci_dynids { 348struct pci_dynids {
348 spinlock_t lock; /* protects list, index */ 349 spinlock_t lock; /* protects list, index */
349 struct list_head list; /* for IDs added at runtime */ 350 struct list_head list; /* for IDs added at runtime */
350 unsigned int use_driver_data:1; /* pci_device_id->driver_data is used */
351}; 351};
352 352
353/* ---------------------------------------------------------------- */ 353/* ---------------------------------------------------------------- */
@@ -456,8 +456,8 @@ struct pci_driver {
456 456
457/** 457/**
458 * PCI_VDEVICE - macro used to describe a specific pci device in short form 458 * PCI_VDEVICE - macro used to describe a specific pci device in short form
459 * @vend: the vendor name 459 * @vendor: the vendor name
460 * @dev: the 16 bit PCI Device ID 460 * @device: the 16 bit PCI Device ID
461 * 461 *
462 * This macro is used to create a struct pci_device_id that matches a 462 * This macro is used to create a struct pci_device_id that matches a
463 * specific PCI device. The subvendor, and subdevice fields will be set 463 * specific PCI device. The subvendor, and subdevice fields will be set
@@ -631,6 +631,8 @@ int __must_check pci_assign_resource(struct pci_dev *dev, int i);
631int pci_select_bars(struct pci_dev *dev, unsigned long flags); 631int pci_select_bars(struct pci_dev *dev, unsigned long flags);
632 632
633/* ROM control related routines */ 633/* ROM control related routines */
634int pci_enable_rom(struct pci_dev *pdev);
635void pci_disable_rom(struct pci_dev *pdev);
634void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); 636void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
635void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); 637void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
636size_t pci_get_rom_size(void __iomem *rom, size_t size); 638size_t pci_get_rom_size(void __iomem *rom, size_t size);
@@ -643,6 +645,7 @@ pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
643bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); 645bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
644void pci_pme_active(struct pci_dev *dev, bool enable); 646void pci_pme_active(struct pci_dev *dev, bool enable);
645int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable); 647int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
648int pci_wake_from_d3(struct pci_dev *dev, bool enable);
646pci_power_t pci_target_state(struct pci_dev *dev); 649pci_power_t pci_target_state(struct pci_dev *dev);
647int pci_prepare_to_sleep(struct pci_dev *dev); 650int pci_prepare_to_sleep(struct pci_dev *dev);
648int pci_back_from_sleep(struct pci_dev *dev); 651int pci_back_from_sleep(struct pci_dev *dev);
@@ -723,7 +726,7 @@ enum pci_dma_burst_strategy {
723}; 726};
724 727
725struct msix_entry { 728struct msix_entry {
726 u16 vector; /* kernel uses to write allocated vector */ 729 u32 vector; /* kernel uses to write allocated vector */
727 u16 entry; /* driver uses to specify entry, OS writes */ 730 u16 entry; /* driver uses to specify entry, OS writes */
728}; 731};
729 732
@@ -1116,5 +1119,20 @@ static inline void pci_mmcfg_early_init(void) { }
1116static inline void pci_mmcfg_late_init(void) { } 1119static inline void pci_mmcfg_late_init(void) { }
1117#endif 1120#endif
1118 1121
1122#ifdef CONFIG_HAS_IOMEM
1123static inline void * pci_ioremap_bar(struct pci_dev *pdev, int bar)
1124{
1125 /*
1126 * Make sure the BAR is actually a memory resource, not an IO resource
1127 */
1128 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1129 WARN_ON(1);
1130 return NULL;
1131 }
1132 return ioremap_nocache(pci_resource_start(pdev, bar),
1133 pci_resource_len(pdev, bar));
1134}
1135#endif
1136
1119#endif /* __KERNEL__ */ 1137#endif /* __KERNEL__ */
1120#endif /* LINUX_PCI_H */ 1138#endif /* LINUX_PCI_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 1176f1f177e2..e5d344bfcb7e 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -587,6 +587,7 @@
587#define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 587#define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520
588#define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 588#define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521
589#define PCI_DEVICE_ID_MATROX_G400 0x0525 589#define PCI_DEVICE_ID_MATROX_G400 0x0525
590#define PCI_DEVICE_ID_MATROX_G200EV_PCI 0x0530
590#define PCI_DEVICE_ID_MATROX_G550 0x2527 591#define PCI_DEVICE_ID_MATROX_G550 0x2527
591#define PCI_DEVICE_ID_MATROX_VIA 0x4536 592#define PCI_DEVICE_ID_MATROX_VIA 0x4536
592 593
@@ -2453,9 +2454,9 @@
2453#define PCI_DEVICE_ID_INTEL_ICH10_3 0x3a1a 2454#define PCI_DEVICE_ID_INTEL_ICH10_3 0x3a1a
2454#define PCI_DEVICE_ID_INTEL_ICH10_4 0x3a30 2455#define PCI_DEVICE_ID_INTEL_ICH10_4 0x3a30
2455#define PCI_DEVICE_ID_INTEL_ICH10_5 0x3a60 2456#define PCI_DEVICE_ID_INTEL_ICH10_5 0x3a60
2456#define PCI_DEVICE_ID_INTEL_PCH_0 0x3b10 2457#define PCI_DEVICE_ID_INTEL_PCH_LPC_MIN 0x3b00
2457#define PCI_DEVICE_ID_INTEL_PCH_1 0x3b11 2458#define PCI_DEVICE_ID_INTEL_PCH_LPC_MAX 0x3b1f
2458#define PCI_DEVICE_ID_INTEL_PCH_2 0x3b30 2459#define PCI_DEVICE_ID_INTEL_PCH_SMBUS 0x3b30
2459#define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f 2460#define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f
2460#define PCI_DEVICE_ID_INTEL_5100_16 0x65f0 2461#define PCI_DEVICE_ID_INTEL_5100_16 0x65f0
2461#define PCI_DEVICE_ID_INTEL_5100_21 0x65f5 2462#define PCI_DEVICE_ID_INTEL_5100_21 0x65f5
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 450684f7eaac..eb6686b88f9a 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -419,6 +419,10 @@
419#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */ 419#define PCI_EXP_RTCTL_CRSSVE 0x10 /* CRS Software Visibility Enable */
420#define PCI_EXP_RTCAP 30 /* Root Capabilities */ 420#define PCI_EXP_RTCAP 30 /* Root Capabilities */
421#define PCI_EXP_RTSTA 32 /* Root Status */ 421#define PCI_EXP_RTSTA 32 /* Root Status */
422#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */
423#define PCI_EXP_DEVCAP2_ARI 0x20 /* Alternative Routing-ID */
424#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */
425#define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */
422 426
423/* Extended Capabilities (PCI-X 2.0 and Express) */ 427/* Extended Capabilities (PCI-X 2.0 and Express) */
424#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff) 428#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
@@ -429,6 +433,7 @@
429#define PCI_EXT_CAP_ID_VC 2 433#define PCI_EXT_CAP_ID_VC 2
430#define PCI_EXT_CAP_ID_DSN 3 434#define PCI_EXT_CAP_ID_DSN 3
431#define PCI_EXT_CAP_ID_PWR 4 435#define PCI_EXT_CAP_ID_PWR 4
436#define PCI_EXT_CAP_ID_ARI 14
432 437
433/* Advanced Error Reporting */ 438/* Advanced Error Reporting */
434#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ 439#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */
@@ -536,5 +541,14 @@
536#define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */ 541#define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */
537#define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */ 542#define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */
538 543
544/* Alternative Routing-ID Interpretation */
545#define PCI_ARI_CAP 0x04 /* ARI Capability Register */
546#define PCI_ARI_CAP_MFVC 0x0001 /* MFVC Function Groups Capability */
547#define PCI_ARI_CAP_ACS 0x0002 /* ACS Function Groups Capability */
548#define PCI_ARI_CAP_NFN(x) (((x) >> 8) & 0xff) /* Next Function Number */
549#define PCI_ARI_CTRL 0x06 /* ARI Control Register */
550#define PCI_ARI_CTRL_MFVC 0x0001 /* MFVC Function Groups Enable */
551#define PCI_ARI_CTRL_ACS 0x0002 /* ACS Function Groups Enable */
552#define PCI_ARI_CTRL_FG(x) (((x) >> 4) & 7) /* Function Group */
539 553
540#endif /* LINUX_PCI_REGS_H */ 554#endif /* LINUX_PCI_REGS_H */
diff --git a/include/linux/pfn.h b/include/linux/pfn.h
index bb01f8b92b56..7646637221f3 100644
--- a/include/linux/pfn.h
+++ b/include/linux/pfn.h
@@ -1,9 +1,13 @@
1#ifndef _LINUX_PFN_H_ 1#ifndef _LINUX_PFN_H_
2#define _LINUX_PFN_H_ 2#define _LINUX_PFN_H_
3 3
4#ifndef __ASSEMBLY__
5#include <linux/types.h>
6#endif
7
4#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK) 8#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
5#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT) 9#define PFN_UP(x) (((x) + PAGE_SIZE-1) >> PAGE_SHIFT)
6#define PFN_DOWN(x) ((x) >> PAGE_SHIFT) 10#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
7#define PFN_PHYS(x) ((x) << PAGE_SHIFT) 11#define PFN_PHYS(x) ((phys_addr_t)(x) << PAGE_SHIFT)
8 12
9#endif 13#endif
diff --git a/include/linux/pid_namespace.h b/include/linux/pid_namespace.h
index 1af82c4e17d4..d82fe825d62f 100644
--- a/include/linux/pid_namespace.h
+++ b/include/linux/pid_namespace.h
@@ -84,12 +84,6 @@ static inline struct pid_namespace *task_active_pid_ns(struct task_struct *tsk)
84 return tsk->nsproxy->pid_ns; 84 return tsk->nsproxy->pid_ns;
85} 85}
86 86
87static inline struct task_struct *task_child_reaper(struct task_struct *tsk)
88{
89 BUG_ON(tsk != current);
90 return tsk->nsproxy->pid_ns->child_reaper;
91}
92
93void pidhash_init(void); 87void pidhash_init(void);
94void pidmap_init(void); 88void pidmap_init(void);
95 89
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
index 95ac21ab3a09..4b8cc6a32479 100644
--- a/include/linux/platform_device.h
+++ b/include/linux/platform_device.h
@@ -37,6 +37,8 @@ extern int platform_add_devices(struct platform_device **, int);
37 37
38extern struct platform_device *platform_device_register_simple(const char *, int id, 38extern struct platform_device *platform_device_register_simple(const char *, int id,
39 struct resource *, unsigned int); 39 struct resource *, unsigned int);
40extern struct platform_device *platform_device_register_data(struct device *,
41 const char *, int, const void *, size_t);
40 42
41extern struct platform_device *platform_device_alloc(const char *name, int id); 43extern struct platform_device *platform_device_alloc(const char *name, int id);
42extern int platform_device_add_resources(struct platform_device *pdev, struct resource *res, unsigned int num); 44extern int platform_device_add_resources(struct platform_device *pdev, struct resource *res, unsigned int num);
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 4dcce54b6d76..42de4003c4ee 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -419,7 +419,7 @@ extern void __suspend_report_result(const char *function, void *fn, int ret);
419 419
420#define suspend_report_result(fn, ret) \ 420#define suspend_report_result(fn, ret) \
421 do { \ 421 do { \
422 __suspend_report_result(__FUNCTION__, fn, ret); \ 422 __suspend_report_result(__func__, fn, ret); \
423 } while (0) 423 } while (0)
424 424
425#else /* !CONFIG_PM_SLEEP */ 425#else /* !CONFIG_PM_SLEEP */
diff --git a/include/linux/pnp.h b/include/linux/pnp.h
index be764e514e35..53b70fd1d9a5 100644
--- a/include/linux/pnp.h
+++ b/include/linux/pnp.h
@@ -22,9 +22,11 @@ struct pnp_dev;
22 * Resource Management 22 * Resource Management
23 */ 23 */
24#ifdef CONFIG_PNP 24#ifdef CONFIG_PNP
25struct resource *pnp_get_resource(struct pnp_dev *, unsigned int, unsigned int); 25struct resource *pnp_get_resource(struct pnp_dev *dev, unsigned long type,
26 unsigned int num);
26#else 27#else
27static inline struct resource *pnp_get_resource(struct pnp_dev *dev, unsigned int type, unsigned int num) 28static inline struct resource *pnp_get_resource(struct pnp_dev *dev,
29 unsigned long type, unsigned int num)
28{ 30{
29 return NULL; 31 return NULL;
30} 32}
diff --git a/include/linux/posix-timers.h b/include/linux/posix-timers.h
index a7dd38f30ade..a7c721355549 100644
--- a/include/linux/posix-timers.h
+++ b/include/linux/posix-timers.h
@@ -45,8 +45,6 @@ struct k_itimer {
45 int it_requeue_pending; /* waiting to requeue this timer */ 45 int it_requeue_pending; /* waiting to requeue this timer */
46#define REQUEUE_PENDING 1 46#define REQUEUE_PENDING 1
47 int it_sigev_notify; /* notify word of sigevent struct */ 47 int it_sigev_notify; /* notify word of sigevent struct */
48 int it_sigev_signo; /* signo word of sigevent struct */
49 sigval_t it_sigev_value; /* value word of sigevent struct */
50 struct task_struct *it_process; /* process to send signal to */ 48 struct task_struct *it_process; /* process to send signal to */
51 struct sigqueue *sigq; /* signal queue entry. */ 49 struct sigqueue *sigq; /* signal queue entry. */
52 union { 50 union {
@@ -115,4 +113,6 @@ void set_process_cpu_timer(struct task_struct *task, unsigned int clock_idx,
115 113
116long clock_nanosleep_restart(struct restart_block *restart_block); 114long clock_nanosleep_restart(struct restart_block *restart_block);
117 115
116void update_rlimit_cpu(unsigned long rlim_new);
117
118#endif 118#endif
diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h
index ea96ead1d39d..f9348cba6dc1 100644
--- a/include/linux/power_supply.h
+++ b/include/linux/power_supply.h
@@ -165,6 +165,12 @@ struct power_supply_info {
165extern void power_supply_changed(struct power_supply *psy); 165extern void power_supply_changed(struct power_supply *psy);
166extern int power_supply_am_i_supplied(struct power_supply *psy); 166extern int power_supply_am_i_supplied(struct power_supply *psy);
167 167
168#if defined(CONFIG_POWER_SUPPLY) || defined(CONFIG_POWER_SUPPLY_MODULE)
169extern int power_supply_is_system_supplied(void);
170#else
171static inline int power_supply_is_system_supplied(void) { return -ENOSYS; }
172#endif
173
168extern int power_supply_register(struct device *parent, 174extern int power_supply_register(struct device *parent,
169 struct power_supply *psy); 175 struct power_supply *psy);
170extern void power_supply_unregister(struct power_supply *psy); 176extern void power_supply_unregister(struct power_supply *psy);
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index fb61850d1cfc..27d534f4470d 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -139,7 +139,6 @@ extern int proc_readdir(struct file *, void *, filldir_t);
139extern struct dentry *proc_lookup(struct inode *, struct dentry *, struct nameidata *); 139extern struct dentry *proc_lookup(struct inode *, struct dentry *, struct nameidata *);
140 140
141extern const struct file_operations proc_kcore_operations; 141extern const struct file_operations proc_kcore_operations;
142extern const struct file_operations ppc_htab_operations;
143 142
144extern int pid_ns_prepare_proc(struct pid_namespace *ns); 143extern int pid_ns_prepare_proc(struct pid_namespace *ns);
145extern void pid_ns_release_proc(struct pid_namespace *ns); 144extern void pid_ns_release_proc(struct pid_namespace *ns);
diff --git a/include/linux/profile.h b/include/linux/profile.h
index 7e7087239af5..a0fc32279fc0 100644
--- a/include/linux/profile.h
+++ b/include/linux/profile.h
@@ -19,10 +19,16 @@ struct notifier_block;
19 19
20#if defined(CONFIG_PROFILING) && defined(CONFIG_PROC_FS) 20#if defined(CONFIG_PROFILING) && defined(CONFIG_PROC_FS)
21void create_prof_cpu_mask(struct proc_dir_entry *de); 21void create_prof_cpu_mask(struct proc_dir_entry *de);
22int create_proc_profile(void);
22#else 23#else
23static inline void create_prof_cpu_mask(struct proc_dir_entry *de) 24static inline void create_prof_cpu_mask(struct proc_dir_entry *de)
24{ 25{
25} 26}
27
28static inline int create_proc_profile(void)
29{
30 return 0;
31}
26#endif 32#endif
27 33
28enum profile_type { 34enum profile_type {
@@ -35,7 +41,8 @@ enum profile_type {
35extern int prof_on __read_mostly; 41extern int prof_on __read_mostly;
36 42
37/* init basic kernel profiler */ 43/* init basic kernel profiler */
38void __init profile_init(void); 44int profile_init(void);
45int profile_setup(char *str);
39void profile_tick(int type); 46void profile_tick(int type);
40 47
41/* 48/*
@@ -84,9 +91,9 @@ struct pt_regs;
84 91
85#define prof_on 0 92#define prof_on 0
86 93
87static inline void profile_init(void) 94static inline int profile_init(void)
88{ 95{
89 return; 96 return 0;
90} 97}
91 98
92static inline void profile_tick(int type) 99static inline void profile_tick(int type)
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index ea7416c901d1..22641d5d45df 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -94,7 +94,6 @@ extern void ptrace_notify(int exit_code);
94extern void __ptrace_link(struct task_struct *child, 94extern void __ptrace_link(struct task_struct *child,
95 struct task_struct *new_parent); 95 struct task_struct *new_parent);
96extern void __ptrace_unlink(struct task_struct *child); 96extern void __ptrace_unlink(struct task_struct *child);
97extern void ptrace_untrace(struct task_struct *child);
98#define PTRACE_MODE_READ 1 97#define PTRACE_MODE_READ 1
99#define PTRACE_MODE_ATTACH 2 98#define PTRACE_MODE_ATTACH 2
100/* Returns 0 on success, -errno on denial. */ 99/* Returns 0 on success, -errno on denial. */
diff --git a/include/linux/quota.h b/include/linux/quota.h
index 376a05048bc5..40401b554484 100644
--- a/include/linux/quota.h
+++ b/include/linux/quota.h
@@ -28,8 +28,6 @@
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE. 30 * SUCH DAMAGE.
31 *
32 * Version: $Id: quota.h,v 2.0 1996/11/17 16:48:14 mvw Exp mvw $
33 */ 31 */
34 32
35#ifndef _LINUX_QUOTA_ 33#ifndef _LINUX_QUOTA_
diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h
index ca6b9b5c8d52..a558a4c1d35a 100644
--- a/include/linux/quotaops.h
+++ b/include/linux/quotaops.h
@@ -3,9 +3,6 @@
3 * macros expand to the right source-code. 3 * macros expand to the right source-code.
4 * 4 *
5 * Author: Marco van Wieringen <mvw@planets.elm.net> 5 * Author: Marco van Wieringen <mvw@planets.elm.net>
6 *
7 * Version: $Id: quotaops.h,v 1.2 1998/01/15 16:22:26 ecd Exp $
8 *
9 */ 6 */
10#ifndef _LINUX_QUOTAOPS_ 7#ifndef _LINUX_QUOTAOPS_
11#define _LINUX_QUOTAOPS_ 8#define _LINUX_QUOTAOPS_
diff --git a/include/linux/raid/linear.h b/include/linux/raid/linear.h
index 7e375111d007..f38b9c586afb 100644
--- a/include/linux/raid/linear.h
+++ b/include/linux/raid/linear.h
@@ -5,8 +5,8 @@
5 5
6struct dev_info { 6struct dev_info {
7 mdk_rdev_t *rdev; 7 mdk_rdev_t *rdev;
8 sector_t size; 8 sector_t num_sectors;
9 sector_t offset; 9 sector_t start_sector;
10}; 10};
11 11
12typedef struct dev_info dev_info_t; 12typedef struct dev_info dev_info_t;
@@ -15,9 +15,11 @@ struct linear_private_data
15{ 15{
16 struct linear_private_data *prev; /* earlier version */ 16 struct linear_private_data *prev; /* earlier version */
17 dev_info_t **hash_table; 17 dev_info_t **hash_table;
18 sector_t hash_spacing; 18 sector_t spacing;
19 sector_t array_sectors; 19 sector_t array_sectors;
20 int preshift; /* shift before dividing by hash_spacing */ 20 int sector_shift; /* shift before dividing
21 * by spacing
22 */
21 dev_info_t disks[0]; 23 dev_info_t disks[0];
22}; 24};
23 25
diff --git a/include/linux/raid/md.h b/include/linux/raid/md.h
index dc0e3fcb9f28..82bea14cae1a 100644
--- a/include/linux/raid/md.h
+++ b/include/linux/raid/md.h
@@ -19,27 +19,7 @@
19#define _MD_H 19#define _MD_H
20 20
21#include <linux/blkdev.h> 21#include <linux/blkdev.h>
22#include <linux/major.h>
23#include <linux/ioctl.h>
24#include <linux/types.h>
25#include <linux/bitops.h>
26#include <linux/module.h>
27#include <linux/hdreg.h>
28#include <linux/proc_fs.h>
29#include <linux/seq_file.h> 22#include <linux/seq_file.h>
30#include <linux/smp_lock.h>
31#include <linux/delay.h>
32#include <net/checksum.h>
33#include <linux/random.h>
34#include <linux/kernel_stat.h>
35#include <asm/io.h>
36#include <linux/completion.h>
37#include <linux/mempool.h>
38#include <linux/list.h>
39#include <linux/reboot.h>
40#include <linux/vmalloc.h>
41#include <linux/blkpg.h>
42#include <linux/bio.h>
43 23
44/* 24/*
45 * 'md_p.h' holds the 'physical' layout of RAID devices 25 * 'md_p.h' holds the 'physical' layout of RAID devices
@@ -74,19 +54,17 @@
74 54
75extern int mdp_major; 55extern int mdp_major;
76 56
77extern int register_md_personality (struct mdk_personality *p); 57extern int register_md_personality(struct mdk_personality *p);
78extern int unregister_md_personality (struct mdk_personality *p); 58extern int unregister_md_personality(struct mdk_personality *p);
79extern mdk_thread_t * md_register_thread (void (*run) (mddev_t *mddev), 59extern mdk_thread_t * md_register_thread(void (*run) (mddev_t *mddev),
80 mddev_t *mddev, const char *name); 60 mddev_t *mddev, const char *name);
81extern void md_unregister_thread (mdk_thread_t *thread); 61extern void md_unregister_thread(mdk_thread_t *thread);
82extern void md_wakeup_thread(mdk_thread_t *thread); 62extern void md_wakeup_thread(mdk_thread_t *thread);
83extern void md_check_recovery(mddev_t *mddev); 63extern void md_check_recovery(mddev_t *mddev);
84extern void md_write_start(mddev_t *mddev, struct bio *bi); 64extern void md_write_start(mddev_t *mddev, struct bio *bi);
85extern void md_write_end(mddev_t *mddev); 65extern void md_write_end(mddev_t *mddev);
86extern void md_handle_safemode(mddev_t *mddev);
87extern void md_done_sync(mddev_t *mddev, int blocks, int ok); 66extern void md_done_sync(mddev_t *mddev, int blocks, int ok);
88extern void md_error (mddev_t *mddev, mdk_rdev_t *rdev); 67extern void md_error(mddev_t *mddev, mdk_rdev_t *rdev);
89extern void md_unplug_mddev(mddev_t *mddev);
90 68
91extern void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev, 69extern void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev,
92 sector_t sector, int size, struct page *page); 70 sector_t sector, int size, struct page *page);
diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h
index 1d712c7172a2..e37d80561985 100644
--- a/include/linux/regulator/driver.h
+++ b/include/linux/regulator/driver.h
@@ -18,8 +18,8 @@
18#include <linux/device.h> 18#include <linux/device.h>
19#include <linux/regulator/consumer.h> 19#include <linux/regulator/consumer.h>
20 20
21struct regulator_constraints;
22struct regulator_dev; 21struct regulator_dev;
22struct regulator_init_data;
23 23
24/** 24/**
25 * struct regulator_ops - regulator operations. 25 * struct regulator_ops - regulator operations.
@@ -51,7 +51,7 @@ struct regulator_ops {
51 int output_uV, int load_uA); 51 int output_uV, int load_uA);
52 52
53 /* the operations below are for configuration of regulator state when 53 /* the operations below are for configuration of regulator state when
54 * it's parent PMIC enters a global STANBY/HIBERNATE state */ 54 * its parent PMIC enters a global STANDBY/HIBERNATE state */
55 55
56 /* set regulator suspend voltage */ 56 /* set regulator suspend voltage */
57 int (*set_suspend_voltage) (struct regulator_dev *, int uV); 57 int (*set_suspend_voltage) (struct regulator_dev *, int uV);
@@ -85,15 +85,17 @@ struct regulator_desc {
85 struct module *owner; 85 struct module *owner;
86}; 86};
87 87
88
89struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc, 88struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc,
90 void *reg_data); 89 struct device *dev, void *driver_data);
91void regulator_unregister(struct regulator_dev *rdev); 90void regulator_unregister(struct regulator_dev *rdev);
92 91
93int regulator_notifier_call_chain(struct regulator_dev *rdev, 92int regulator_notifier_call_chain(struct regulator_dev *rdev,
94 unsigned long event, void *data); 93 unsigned long event, void *data);
95 94
96void *rdev_get_drvdata(struct regulator_dev *rdev); 95void *rdev_get_drvdata(struct regulator_dev *rdev);
96struct device *rdev_get_dev(struct regulator_dev *rdev);
97int rdev_get_id(struct regulator_dev *rdev); 97int rdev_get_id(struct regulator_dev *rdev);
98 98
99void *regulator_get_init_drvdata(struct regulator_init_data *reg_init_data);
100
99#endif 101#endif
diff --git a/include/linux/regulator/machine.h b/include/linux/regulator/machine.h
index 11e737dbfcf2..c6d69331a81e 100644
--- a/include/linux/regulator/machine.h
+++ b/include/linux/regulator/machine.h
@@ -89,15 +89,33 @@ struct regulation_constraints {
89 unsigned apply_uV:1; /* apply uV constraint iff min == max */ 89 unsigned apply_uV:1; /* apply uV constraint iff min == max */
90}; 90};
91 91
92int regulator_set_supply(const char *regulator, const char *regulator_supply); 92/**
93 * struct regulator_consumer_supply - supply -> device mapping
94 *
95 * This maps a supply name to a device.
96 */
97struct regulator_consumer_supply {
98 struct device *dev; /* consumer */
99 const char *supply; /* consumer supply - e.g. "vcc" */
100};
93 101
94const char *regulator_get_supply(const char *regulator); 102/**
103 * struct regulator_init_data - regulator platform initialisation data.
104 *
105 * Initialisation constraints, our supply and consumers supplies.
106 */
107struct regulator_init_data {
108 struct device *supply_regulator_dev; /* or NULL for LINE */
95 109
96int regulator_set_machine_constraints(const char *regulator, 110 struct regulation_constraints constraints;
97 struct regulation_constraints *constraints);
98 111
99int regulator_set_device_supply(const char *regulator, struct device *dev, 112 int num_consumer_supplies;
100 const char *supply); 113 struct regulator_consumer_supply *consumer_supplies;
114
115 /* optional regulator machine specific init */
116 int (*regulator_init)(void *driver_data);
117 void *driver_data; /* core does not touch this */
118};
101 119
102int regulator_suspend_prepare(suspend_state_t state); 120int regulator_suspend_prepare(suspend_state_t state);
103 121
diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h
index e9963af16cda..bc5114d35e99 100644
--- a/include/linux/reiserfs_fs.h
+++ b/include/linux/reiserfs_fs.h
@@ -87,7 +87,7 @@ void reiserfs_warning(struct super_block *s, const char *fmt, ...);
87if( !( cond ) ) \ 87if( !( cond ) ) \
88 reiserfs_panic( NULL, "reiserfs[%i]: assertion " scond " failed at " \ 88 reiserfs_panic( NULL, "reiserfs[%i]: assertion " scond " failed at " \
89 __FILE__ ":%i:%s: " format "\n", \ 89 __FILE__ ":%i:%s: " format "\n", \
90 in_interrupt() ? -1 : task_pid_nr(current), __LINE__ , __FUNCTION__ , ##args ) 90 in_interrupt() ? -1 : task_pid_nr(current), __LINE__ , __func__ , ##args )
91 91
92#define RASSERT(cond, format, args...) __RASSERT(cond, #cond, format, ##args) 92#define RASSERT(cond, format, args...) __RASSERT(cond, #cond, format, ##args)
93 93
diff --git a/include/linux/ring_buffer.h b/include/linux/ring_buffer.h
new file mode 100644
index 000000000000..536b0ca46a03
--- /dev/null
+++ b/include/linux/ring_buffer.h
@@ -0,0 +1,127 @@
1#ifndef _LINUX_RING_BUFFER_H
2#define _LINUX_RING_BUFFER_H
3
4#include <linux/mm.h>
5#include <linux/seq_file.h>
6
7struct ring_buffer;
8struct ring_buffer_iter;
9
10/*
11 * Don't reference this struct directly, use functions below.
12 */
13struct ring_buffer_event {
14 u32 type:2, len:3, time_delta:27;
15 u32 array[];
16};
17
18/**
19 * enum ring_buffer_type - internal ring buffer types
20 *
21 * @RINGBUF_TYPE_PADDING: Left over page padding
22 * array is ignored
23 * size is variable depending on how much
24 * padding is needed
25 *
26 * @RINGBUF_TYPE_TIME_EXTEND: Extend the time delta
27 * array[0] = time delta (28 .. 59)
28 * size = 8 bytes
29 *
30 * @RINGBUF_TYPE_TIME_STAMP: Sync time stamp with external clock
31 * array[0] = tv_nsec
32 * array[1] = tv_sec
33 * size = 16 bytes
34 *
35 * @RINGBUF_TYPE_DATA: Data record
36 * If len is zero:
37 * array[0] holds the actual length
38 * array[1..(length+3)/4-1] holds data
39 * else
40 * length = len << 2
41 * array[0..(length+3)/4] holds data
42 */
43enum ring_buffer_type {
44 RINGBUF_TYPE_PADDING,
45 RINGBUF_TYPE_TIME_EXTEND,
46 /* FIXME: RINGBUF_TYPE_TIME_STAMP not implemented */
47 RINGBUF_TYPE_TIME_STAMP,
48 RINGBUF_TYPE_DATA,
49};
50
51unsigned ring_buffer_event_length(struct ring_buffer_event *event);
52void *ring_buffer_event_data(struct ring_buffer_event *event);
53
54/**
55 * ring_buffer_event_time_delta - return the delta timestamp of the event
56 * @event: the event to get the delta timestamp of
57 *
58 * The delta timestamp is the 27 bit timestamp since the last event.
59 */
60static inline unsigned
61ring_buffer_event_time_delta(struct ring_buffer_event *event)
62{
63 return event->time_delta;
64}
65
66/*
67 * size is in bytes for each per CPU buffer.
68 */
69struct ring_buffer *
70ring_buffer_alloc(unsigned long size, unsigned flags);
71void ring_buffer_free(struct ring_buffer *buffer);
72
73int ring_buffer_resize(struct ring_buffer *buffer, unsigned long size);
74
75struct ring_buffer_event *
76ring_buffer_lock_reserve(struct ring_buffer *buffer,
77 unsigned long length,
78 unsigned long *flags);
79int ring_buffer_unlock_commit(struct ring_buffer *buffer,
80 struct ring_buffer_event *event,
81 unsigned long flags);
82int ring_buffer_write(struct ring_buffer *buffer,
83 unsigned long length, void *data);
84
85struct ring_buffer_event *
86ring_buffer_peek(struct ring_buffer *buffer, int cpu, u64 *ts);
87struct ring_buffer_event *
88ring_buffer_consume(struct ring_buffer *buffer, int cpu, u64 *ts);
89
90struct ring_buffer_iter *
91ring_buffer_read_start(struct ring_buffer *buffer, int cpu);
92void ring_buffer_read_finish(struct ring_buffer_iter *iter);
93
94struct ring_buffer_event *
95ring_buffer_iter_peek(struct ring_buffer_iter *iter, u64 *ts);
96struct ring_buffer_event *
97ring_buffer_read(struct ring_buffer_iter *iter, u64 *ts);
98void ring_buffer_iter_reset(struct ring_buffer_iter *iter);
99int ring_buffer_iter_empty(struct ring_buffer_iter *iter);
100
101unsigned long ring_buffer_size(struct ring_buffer *buffer);
102
103void ring_buffer_reset_cpu(struct ring_buffer *buffer, int cpu);
104void ring_buffer_reset(struct ring_buffer *buffer);
105
106int ring_buffer_swap_cpu(struct ring_buffer *buffer_a,
107 struct ring_buffer *buffer_b, int cpu);
108
109int ring_buffer_empty(struct ring_buffer *buffer);
110int ring_buffer_empty_cpu(struct ring_buffer *buffer, int cpu);
111
112void ring_buffer_record_disable(struct ring_buffer *buffer);
113void ring_buffer_record_enable(struct ring_buffer *buffer);
114void ring_buffer_record_disable_cpu(struct ring_buffer *buffer, int cpu);
115void ring_buffer_record_enable_cpu(struct ring_buffer *buffer, int cpu);
116
117unsigned long ring_buffer_entries(struct ring_buffer *buffer);
118unsigned long ring_buffer_overruns(struct ring_buffer *buffer);
119
120u64 ring_buffer_time_stamp(int cpu);
121void ring_buffer_normalize_time_stamp(int cpu, u64 *ts);
122
123enum ring_buffer_flags {
124 RB_FL_OVERWRITE = 1 << 0,
125};
126
127#endif /* _LINUX_RING_BUFFER_H */
diff --git a/include/linux/rmap.h b/include/linux/rmap.h
index fed6f5e0b411..89f0564b10c8 100644
--- a/include/linux/rmap.h
+++ b/include/linux/rmap.h
@@ -39,18 +39,6 @@ struct anon_vma {
39 39
40#ifdef CONFIG_MMU 40#ifdef CONFIG_MMU
41 41
42extern struct kmem_cache *anon_vma_cachep;
43
44static inline struct anon_vma *anon_vma_alloc(void)
45{
46 return kmem_cache_alloc(anon_vma_cachep, GFP_KERNEL);
47}
48
49static inline void anon_vma_free(struct anon_vma *anon_vma)
50{
51 kmem_cache_free(anon_vma_cachep, anon_vma);
52}
53
54static inline void anon_vma_lock(struct vm_area_struct *vma) 42static inline void anon_vma_lock(struct vm_area_struct *vma)
55{ 43{
56 struct anon_vma *anon_vma = vma->anon_vma; 44 struct anon_vma *anon_vma = vma->anon_vma;
@@ -75,6 +63,9 @@ void anon_vma_unlink(struct vm_area_struct *);
75void anon_vma_link(struct vm_area_struct *); 63void anon_vma_link(struct vm_area_struct *);
76void __anon_vma_link(struct vm_area_struct *); 64void __anon_vma_link(struct vm_area_struct *);
77 65
66extern struct anon_vma *page_lock_anon_vma(struct page *page);
67extern void page_unlock_anon_vma(struct anon_vma *anon_vma);
68
78/* 69/*
79 * rmap interfaces called when adding or removing pte of page 70 * rmap interfaces called when adding or removing pte of page
80 */ 71 */
@@ -117,6 +108,19 @@ unsigned long page_address_in_vma(struct page *, struct vm_area_struct *);
117 */ 108 */
118int page_mkclean(struct page *); 109int page_mkclean(struct page *);
119 110
111#ifdef CONFIG_UNEVICTABLE_LRU
112/*
113 * called in munlock()/munmap() path to check for other vmas holding
114 * the page mlocked.
115 */
116int try_to_munlock(struct page *);
117#else
118static inline int try_to_munlock(struct page *page)
119{
120 return 0; /* a.k.a. SWAP_SUCCESS */
121}
122#endif
123
120#else /* !CONFIG_MMU */ 124#else /* !CONFIG_MMU */
121 125
122#define anon_vma_init() do {} while (0) 126#define anon_vma_init() do {} while (0)
@@ -140,5 +144,6 @@ static inline int page_mkclean(struct page *page)
140#define SWAP_SUCCESS 0 144#define SWAP_SUCCESS 0
141#define SWAP_AGAIN 1 145#define SWAP_AGAIN 1
142#define SWAP_FAIL 2 146#define SWAP_FAIL 2
147#define SWAP_MLOCK 3
143 148
144#endif /* _LINUX_RMAP_H */ 149#endif /* _LINUX_RMAP_H */
diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h
index 382bb7951166..f19b00b7d530 100644
--- a/include/linux/rtmutex.h
+++ b/include/linux/rtmutex.h
@@ -54,7 +54,7 @@ struct hrtimer_sleeper;
54#ifdef CONFIG_DEBUG_RT_MUTEXES 54#ifdef CONFIG_DEBUG_RT_MUTEXES
55# define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \ 55# define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \
56 , .name = #mutexname, .file = __FILE__, .line = __LINE__ 56 , .name = #mutexname, .file = __FILE__, .line = __LINE__
57# define rt_mutex_init(mutex) __rt_mutex_init(mutex, __FUNCTION__) 57# define rt_mutex_init(mutex) __rt_mutex_init(mutex, __func__)
58 extern void rt_mutex_debug_task_free(struct task_struct *tsk); 58 extern void rt_mutex_debug_task_free(struct task_struct *tsk);
59#else 59#else
60# define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) 60# define __DEBUG_RT_MUTEX_INITIALIZER(mutexname)
diff --git a/include/linux/sched.h b/include/linux/sched.h
index c226c7b82946..5c38db536e07 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -403,12 +403,21 @@ extern int get_dumpable(struct mm_struct *mm);
403#define MMF_DUMP_MAPPED_PRIVATE 4 403#define MMF_DUMP_MAPPED_PRIVATE 4
404#define MMF_DUMP_MAPPED_SHARED 5 404#define MMF_DUMP_MAPPED_SHARED 5
405#define MMF_DUMP_ELF_HEADERS 6 405#define MMF_DUMP_ELF_HEADERS 6
406#define MMF_DUMP_HUGETLB_PRIVATE 7
407#define MMF_DUMP_HUGETLB_SHARED 8
406#define MMF_DUMP_FILTER_SHIFT MMF_DUMPABLE_BITS 408#define MMF_DUMP_FILTER_SHIFT MMF_DUMPABLE_BITS
407#define MMF_DUMP_FILTER_BITS 5 409#define MMF_DUMP_FILTER_BITS 7
408#define MMF_DUMP_FILTER_MASK \ 410#define MMF_DUMP_FILTER_MASK \
409 (((1 << MMF_DUMP_FILTER_BITS) - 1) << MMF_DUMP_FILTER_SHIFT) 411 (((1 << MMF_DUMP_FILTER_BITS) - 1) << MMF_DUMP_FILTER_SHIFT)
410#define MMF_DUMP_FILTER_DEFAULT \ 412#define MMF_DUMP_FILTER_DEFAULT \
411 ((1 << MMF_DUMP_ANON_PRIVATE) | (1 << MMF_DUMP_ANON_SHARED)) 413 ((1 << MMF_DUMP_ANON_PRIVATE) | (1 << MMF_DUMP_ANON_SHARED) |\
414 (1 << MMF_DUMP_HUGETLB_PRIVATE) | MMF_DUMP_MASK_DEFAULT_ELF)
415
416#ifdef CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS
417# define MMF_DUMP_MASK_DEFAULT_ELF (1 << MMF_DUMP_ELF_HEADERS)
418#else
419# define MMF_DUMP_MASK_DEFAULT_ELF 0
420#endif
412 421
413struct sighand_struct { 422struct sighand_struct {
414 atomic_t count; 423 atomic_t count;
@@ -425,6 +434,39 @@ struct pacct_struct {
425 unsigned long ac_minflt, ac_majflt; 434 unsigned long ac_minflt, ac_majflt;
426}; 435};
427 436
437/**
438 * struct task_cputime - collected CPU time counts
439 * @utime: time spent in user mode, in &cputime_t units
440 * @stime: time spent in kernel mode, in &cputime_t units
441 * @sum_exec_runtime: total time spent on the CPU, in nanoseconds
442 *
443 * This structure groups together three kinds of CPU time that are
444 * tracked for threads and thread groups. Most things considering
445 * CPU time want to group these counts together and treat all three
446 * of them in parallel.
447 */
448struct task_cputime {
449 cputime_t utime;
450 cputime_t stime;
451 unsigned long long sum_exec_runtime;
452};
453/* Alternate field names when used to cache expirations. */
454#define prof_exp stime
455#define virt_exp utime
456#define sched_exp sum_exec_runtime
457
458/**
459 * struct thread_group_cputime - thread group interval timer counts
460 * @totals: thread group interval timers; substructure for
461 * uniprocessor kernel, per-cpu for SMP kernel.
462 *
463 * This structure contains the version of task_cputime, above, that is
464 * used for thread group CPU clock calculations.
465 */
466struct thread_group_cputime {
467 struct task_cputime *totals;
468};
469
428/* 470/*
429 * NOTE! "signal_struct" does not have it's own 471 * NOTE! "signal_struct" does not have it's own
430 * locking, because a shared signal_struct always 472 * locking, because a shared signal_struct always
@@ -470,6 +512,17 @@ struct signal_struct {
470 cputime_t it_prof_expires, it_virt_expires; 512 cputime_t it_prof_expires, it_virt_expires;
471 cputime_t it_prof_incr, it_virt_incr; 513 cputime_t it_prof_incr, it_virt_incr;
472 514
515 /*
516 * Thread group totals for process CPU clocks.
517 * See thread_group_cputime(), et al, for details.
518 */
519 struct thread_group_cputime cputime;
520
521 /* Earliest-expiration cache. */
522 struct task_cputime cputime_expires;
523
524 struct list_head cpu_timers[3];
525
473 /* job control IDs */ 526 /* job control IDs */
474 527
475 /* 528 /*
@@ -500,7 +553,7 @@ struct signal_struct {
500 * Live threads maintain their own counters and add to these 553 * Live threads maintain their own counters and add to these
501 * in __exit_signal, except for the group leader. 554 * in __exit_signal, except for the group leader.
502 */ 555 */
503 cputime_t utime, stime, cutime, cstime; 556 cputime_t cutime, cstime;
504 cputime_t gtime; 557 cputime_t gtime;
505 cputime_t cgtime; 558 cputime_t cgtime;
506 unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw; 559 unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw;
@@ -509,14 +562,6 @@ struct signal_struct {
509 struct task_io_accounting ioac; 562 struct task_io_accounting ioac;
510 563
511 /* 564 /*
512 * Cumulative ns of scheduled CPU time for dead threads in the
513 * group, not including a zombie group leader. (This only differs
514 * from jiffies_to_ns(utime + stime) if sched_clock uses something
515 * other than jiffies.)
516 */
517 unsigned long long sum_sched_runtime;
518
519 /*
520 * We don't bother to synchronize most readers of this at all, 565 * We don't bother to synchronize most readers of this at all,
521 * because there is no reader checking a limit that actually needs 566 * because there is no reader checking a limit that actually needs
522 * to get both rlim_cur and rlim_max atomically, and either one 567 * to get both rlim_cur and rlim_max atomically, and either one
@@ -527,8 +572,6 @@ struct signal_struct {
527 */ 572 */
528 struct rlimit rlim[RLIM_NLIMITS]; 573 struct rlimit rlim[RLIM_NLIMITS];
529 574
530 struct list_head cpu_timers[3];
531
532 /* keep the process-shared keyrings here so that they do the right 575 /* keep the process-shared keyrings here so that they do the right
533 * thing in threads created with CLONE_THREAD */ 576 * thing in threads created with CLONE_THREAD */
534#ifdef CONFIG_KEYS 577#ifdef CONFIG_KEYS
@@ -1137,8 +1180,7 @@ struct task_struct {
1137/* mm fault and swap info: this can arguably be seen as either mm-specific or thread-specific */ 1180/* mm fault and swap info: this can arguably be seen as either mm-specific or thread-specific */
1138 unsigned long min_flt, maj_flt; 1181 unsigned long min_flt, maj_flt;
1139 1182
1140 cputime_t it_prof_expires, it_virt_expires; 1183 struct task_cputime cputime_expires;
1141 unsigned long long it_sched_expires;
1142 struct list_head cpu_timers[3]; 1184 struct list_head cpu_timers[3];
1143 1185
1144/* process credentials */ 1186/* process credentials */
@@ -1588,6 +1630,7 @@ extern unsigned long long cpu_clock(int cpu);
1588 1630
1589extern unsigned long long 1631extern unsigned long long
1590task_sched_runtime(struct task_struct *task); 1632task_sched_runtime(struct task_struct *task);
1633extern unsigned long long thread_group_sched_runtime(struct task_struct *task);
1591 1634
1592/* sched_exec is called by processes performing an exec */ 1635/* sched_exec is called by processes performing an exec */
1593#ifdef CONFIG_SMP 1636#ifdef CONFIG_SMP
@@ -2085,6 +2128,30 @@ static inline int spin_needbreak(spinlock_t *lock)
2085} 2128}
2086 2129
2087/* 2130/*
2131 * Thread group CPU time accounting.
2132 */
2133
2134extern int thread_group_cputime_alloc(struct task_struct *);
2135extern void thread_group_cputime(struct task_struct *, struct task_cputime *);
2136
2137static inline void thread_group_cputime_init(struct signal_struct *sig)
2138{
2139 sig->cputime.totals = NULL;
2140}
2141
2142static inline int thread_group_cputime_clone_thread(struct task_struct *curr)
2143{
2144 if (curr->signal->cputime.totals)
2145 return 0;
2146 return thread_group_cputime_alloc(curr);
2147}
2148
2149static inline void thread_group_cputime_free(struct signal_struct *sig)
2150{
2151 free_percpu(sig->cputime.totals);
2152}
2153
2154/*
2088 * Reevaluate whether the task has signals pending delivery. 2155 * Reevaluate whether the task has signals pending delivery.
2089 * Wake the task if so. 2156 * Wake the task if so.
2090 * This is required every time the blocked sigset_t changes. 2157 * This is required every time the blocked sigset_t changes.
diff --git a/include/linux/seq_file.h b/include/linux/seq_file.h
index a1783b229ef4..dc50bcc282a8 100644
--- a/include/linux/seq_file.h
+++ b/include/linux/seq_file.h
@@ -60,6 +60,19 @@ static inline int seq_nodemask(struct seq_file *m, nodemask_t *mask)
60 return seq_bitmap(m, mask->bits, MAX_NUMNODES); 60 return seq_bitmap(m, mask->bits, MAX_NUMNODES);
61} 61}
62 62
63int seq_bitmap_list(struct seq_file *m, unsigned long *bits,
64 unsigned int nr_bits);
65
66static inline int seq_cpumask_list(struct seq_file *m, cpumask_t *mask)
67{
68 return seq_bitmap_list(m, mask->bits, NR_CPUS);
69}
70
71static inline int seq_nodemask_list(struct seq_file *m, nodemask_t *mask)
72{
73 return seq_bitmap_list(m, mask->bits, MAX_NUMNODES);
74}
75
63int single_open(struct file *, int (*)(struct seq_file *, void *), void *); 76int single_open(struct file *, int (*)(struct seq_file *, void *), void *);
64int single_release(struct inode *, struct file *); 77int single_release(struct inode *, struct file *);
65void *__seq_open_private(struct file *, const struct seq_operations *, int); 78void *__seq_open_private(struct file *, const struct seq_operations *, int);
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
new file mode 100644
index 000000000000..68e212ff9dde
--- /dev/null
+++ b/include/linux/sh_intc.h
@@ -0,0 +1,91 @@
1#ifndef __SH_INTC_H
2#define __SH_INTC_H
3
4typedef unsigned char intc_enum;
5
6struct intc_vect {
7 intc_enum enum_id;
8 unsigned short vect;
9};
10
11#define INTC_VECT(enum_id, vect) { enum_id, vect }
12#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
13
14struct intc_group {
15 intc_enum enum_id;
16 intc_enum enum_ids[32];
17};
18
19#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
20
21struct intc_mask_reg {
22 unsigned long set_reg, clr_reg, reg_width;
23 intc_enum enum_ids[32];
24#ifdef CONFIG_SMP
25 unsigned long smp;
26#endif
27};
28
29struct intc_prio_reg {
30 unsigned long set_reg, clr_reg, reg_width, field_width;
31 intc_enum enum_ids[16];
32#ifdef CONFIG_SMP
33 unsigned long smp;
34#endif
35};
36
37struct intc_sense_reg {
38 unsigned long reg, reg_width, field_width;
39 intc_enum enum_ids[16];
40};
41
42#ifdef CONFIG_SMP
43#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
44#else
45#define INTC_SMP(stride, nr)
46#endif
47
48struct intc_desc {
49 struct intc_vect *vectors;
50 unsigned int nr_vectors;
51 struct intc_group *groups;
52 unsigned int nr_groups;
53 struct intc_mask_reg *mask_regs;
54 unsigned int nr_mask_regs;
55 struct intc_prio_reg *prio_regs;
56 unsigned int nr_prio_regs;
57 struct intc_sense_reg *sense_regs;
58 unsigned int nr_sense_regs;
59 char *name;
60#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
61 struct intc_mask_reg *ack_regs;
62 unsigned int nr_ack_regs;
63#endif
64};
65
66#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
67#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
68 mask_regs, prio_regs, sense_regs) \
69struct intc_desc symbol __initdata = { \
70 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
71 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
72 _INTC_ARRAY(sense_regs), \
73 chipname, \
74}
75
76#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
77#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
78 mask_regs, prio_regs, sense_regs, ack_regs) \
79struct intc_desc symbol __initdata = { \
80 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
81 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
82 _INTC_ARRAY(sense_regs), \
83 chipname, \
84 _INTC_ARRAY(ack_regs), \
85}
86#endif
87
88void __init register_intc_controller(struct intc_desc *desc);
89int intc_set_priority(unsigned int irq, unsigned int prio);
90
91#endif /* __SH_INTC_H */
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 66484d4a8459..2e4d58b26c06 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include <linux/errno.h> 9#include <linux/errno.h>
10#include <linux/types.h>
10#include <linux/list.h> 11#include <linux/list.h>
11#include <linux/cpumask.h> 12#include <linux/cpumask.h>
12 13
@@ -16,7 +17,8 @@ struct call_single_data {
16 struct list_head list; 17 struct list_head list;
17 void (*func) (void *info); 18 void (*func) (void *info);
18 void *info; 19 void *info;
19 unsigned int flags; 20 u16 flags;
21 u16 priv;
20}; 22};
21 23
22#ifdef CONFIG_SMP 24#ifdef CONFIG_SMP
diff --git a/include/linux/spi/orion_spi.h b/include/linux/spi/orion_spi.h
index b4d9fa6f797c..decf6d8c77b7 100644
--- a/include/linux/spi/orion_spi.h
+++ b/include/linux/spi/orion_spi.h
@@ -11,6 +11,7 @@
11 11
12struct orion_spi_info { 12struct orion_spi_info {
13 u32 tclk; /* no <linux/clk.h> support yet */ 13 u32 tclk; /* no <linux/clk.h> support yet */
14 u32 enable_clock_fix;
14}; 15};
15 16
16 17
diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h
index e5bfe01ee305..6f0ee1b84a4f 100644
--- a/include/linux/sunrpc/clnt.h
+++ b/include/linux/sunrpc/clnt.h
@@ -104,6 +104,7 @@ struct rpc_create_args {
104 const struct rpc_timeout *timeout; 104 const struct rpc_timeout *timeout;
105 char *servername; 105 char *servername;
106 struct rpc_program *program; 106 struct rpc_program *program;
107 u32 prognumber; /* overrides program->number */
107 u32 version; 108 u32 version;
108 rpc_authflavor_t authflavor; 109 rpc_authflavor_t authflavor;
109 unsigned long flags; 110 unsigned long flags;
@@ -124,10 +125,10 @@ struct rpc_clnt *rpc_clone_client(struct rpc_clnt *);
124void rpc_shutdown_client(struct rpc_clnt *); 125void rpc_shutdown_client(struct rpc_clnt *);
125void rpc_release_client(struct rpc_clnt *); 126void rpc_release_client(struct rpc_clnt *);
126 127
127int rpcb_register(u32, u32, int, unsigned short, int *); 128int rpcb_register(u32, u32, int, unsigned short);
128int rpcb_v4_register(const u32 program, const u32 version, 129int rpcb_v4_register(const u32 program, const u32 version,
129 const struct sockaddr *address, 130 const struct sockaddr *address,
130 const char *netid, int *result); 131 const char *netid);
131int rpcb_getport_sync(struct sockaddr_in *, u32, u32, int); 132int rpcb_getport_sync(struct sockaddr_in *, u32, u32, int);
132void rpcb_getport_async(struct rpc_task *); 133void rpcb_getport_async(struct rpc_task *);
133 134
diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h
index dc69068d94c7..3afe7fb403b2 100644
--- a/include/linux/sunrpc/svc.h
+++ b/include/linux/sunrpc/svc.h
@@ -66,6 +66,7 @@ struct svc_serv {
66 struct list_head sv_tempsocks; /* all temporary sockets */ 66 struct list_head sv_tempsocks; /* all temporary sockets */
67 int sv_tmpcnt; /* count of temporary sockets */ 67 int sv_tmpcnt; /* count of temporary sockets */
68 struct timer_list sv_temptimer; /* timer for aging temporary sockets */ 68 struct timer_list sv_temptimer; /* timer for aging temporary sockets */
69 sa_family_t sv_family; /* listener's address family */
69 70
70 char * sv_name; /* service name */ 71 char * sv_name; /* service name */
71 72
@@ -265,17 +266,17 @@ struct svc_rqst {
265/* 266/*
266 * Rigorous type checking on sockaddr type conversions 267 * Rigorous type checking on sockaddr type conversions
267 */ 268 */
268static inline struct sockaddr_in *svc_addr_in(struct svc_rqst *rqst) 269static inline struct sockaddr_in *svc_addr_in(const struct svc_rqst *rqst)
269{ 270{
270 return (struct sockaddr_in *) &rqst->rq_addr; 271 return (struct sockaddr_in *) &rqst->rq_addr;
271} 272}
272 273
273static inline struct sockaddr_in6 *svc_addr_in6(struct svc_rqst *rqst) 274static inline struct sockaddr_in6 *svc_addr_in6(const struct svc_rqst *rqst)
274{ 275{
275 return (struct sockaddr_in6 *) &rqst->rq_addr; 276 return (struct sockaddr_in6 *) &rqst->rq_addr;
276} 277}
277 278
278static inline struct sockaddr *svc_addr(struct svc_rqst *rqst) 279static inline struct sockaddr *svc_addr(const struct svc_rqst *rqst)
279{ 280{
280 return (struct sockaddr *) &rqst->rq_addr; 281 return (struct sockaddr *) &rqst->rq_addr;
281} 282}
@@ -381,18 +382,20 @@ struct svc_procedure {
381/* 382/*
382 * Function prototypes. 383 * Function prototypes.
383 */ 384 */
384struct svc_serv * svc_create(struct svc_program *, unsigned int, 385struct svc_serv *svc_create(struct svc_program *, unsigned int, sa_family_t,
385 void (*shutdown)(struct svc_serv*)); 386 void (*shutdown)(struct svc_serv *));
386struct svc_rqst *svc_prepare_thread(struct svc_serv *serv, 387struct svc_rqst *svc_prepare_thread(struct svc_serv *serv,
387 struct svc_pool *pool); 388 struct svc_pool *pool);
388void svc_exit_thread(struct svc_rqst *); 389void svc_exit_thread(struct svc_rqst *);
389struct svc_serv * svc_create_pooled(struct svc_program *, unsigned int, 390struct svc_serv * svc_create_pooled(struct svc_program *, unsigned int,
390 void (*shutdown)(struct svc_serv*), svc_thread_fn, 391 sa_family_t, void (*shutdown)(struct svc_serv *),
391 struct module *); 392 svc_thread_fn, struct module *);
392int svc_set_num_threads(struct svc_serv *, struct svc_pool *, int); 393int svc_set_num_threads(struct svc_serv *, struct svc_pool *, int);
393void svc_destroy(struct svc_serv *); 394void svc_destroy(struct svc_serv *);
394int svc_process(struct svc_rqst *); 395int svc_process(struct svc_rqst *);
395int svc_register(struct svc_serv *, int, unsigned short); 396int svc_register(const struct svc_serv *, const unsigned short,
397 const unsigned short);
398
396void svc_wake_up(struct svc_serv *); 399void svc_wake_up(struct svc_serv *);
397void svc_reserve(struct svc_rqst *rqstp, int space); 400void svc_reserve(struct svc_rqst *rqstp, int space);
398struct svc_pool * svc_pool_for_cpu(struct svc_serv *serv, int cpu); 401struct svc_pool * svc_pool_for_cpu(struct svc_serv *serv, int cpu);
diff --git a/include/linux/sunrpc/svc_rdma.h b/include/linux/sunrpc/svc_rdma.h
index dc05b54bd3a3..c14fe86dac59 100644
--- a/include/linux/sunrpc/svc_rdma.h
+++ b/include/linux/sunrpc/svc_rdma.h
@@ -72,6 +72,7 @@ extern atomic_t rdma_stat_sq_prod;
72 */ 72 */
73struct svc_rdma_op_ctxt { 73struct svc_rdma_op_ctxt {
74 struct svc_rdma_op_ctxt *read_hdr; 74 struct svc_rdma_op_ctxt *read_hdr;
75 struct svc_rdma_fastreg_mr *frmr;
75 int hdr_count; 76 int hdr_count;
76 struct xdr_buf arg; 77 struct xdr_buf arg;
77 struct list_head dto_q; 78 struct list_head dto_q;
@@ -103,16 +104,30 @@ struct svc_rdma_chunk_sge {
103 int start; /* sge no for this chunk */ 104 int start; /* sge no for this chunk */
104 int count; /* sge count for this chunk */ 105 int count; /* sge count for this chunk */
105}; 106};
107struct svc_rdma_fastreg_mr {
108 struct ib_mr *mr;
109 void *kva;
110 struct ib_fast_reg_page_list *page_list;
111 int page_list_len;
112 unsigned long access_flags;
113 unsigned long map_len;
114 enum dma_data_direction direction;
115 struct list_head frmr_list;
116};
106struct svc_rdma_req_map { 117struct svc_rdma_req_map {
118 struct svc_rdma_fastreg_mr *frmr;
107 unsigned long count; 119 unsigned long count;
108 union { 120 union {
109 struct kvec sge[RPCSVC_MAXPAGES]; 121 struct kvec sge[RPCSVC_MAXPAGES];
110 struct svc_rdma_chunk_sge ch[RPCSVC_MAXPAGES]; 122 struct svc_rdma_chunk_sge ch[RPCSVC_MAXPAGES];
111 }; 123 };
112}; 124};
113 125#define RDMACTXT_F_FAST_UNREG 1
114#define RDMACTXT_F_LAST_CTXT 2 126#define RDMACTXT_F_LAST_CTXT 2
115 127
128#define SVCRDMA_DEVCAP_FAST_REG 1 /* fast mr registration */
129#define SVCRDMA_DEVCAP_READ_W_INV 2 /* read w/ invalidate */
130
116struct svcxprt_rdma { 131struct svcxprt_rdma {
117 struct svc_xprt sc_xprt; /* SVC transport structure */ 132 struct svc_xprt sc_xprt; /* SVC transport structure */
118 struct rdma_cm_id *sc_cm_id; /* RDMA connection id */ 133 struct rdma_cm_id *sc_cm_id; /* RDMA connection id */
@@ -136,6 +151,11 @@ struct svcxprt_rdma {
136 struct ib_cq *sc_rq_cq; 151 struct ib_cq *sc_rq_cq;
137 struct ib_cq *sc_sq_cq; 152 struct ib_cq *sc_sq_cq;
138 struct ib_mr *sc_phys_mr; /* MR for server memory */ 153 struct ib_mr *sc_phys_mr; /* MR for server memory */
154 u32 sc_dev_caps; /* distilled device caps */
155 u32 sc_dma_lkey; /* local dma key */
156 unsigned int sc_frmr_pg_list_len;
157 struct list_head sc_frmr_q;
158 spinlock_t sc_frmr_q_lock;
139 159
140 spinlock_t sc_lock; /* transport lock */ 160 spinlock_t sc_lock; /* transport lock */
141 161
@@ -192,8 +212,13 @@ extern int svc_rdma_post_recv(struct svcxprt_rdma *);
192extern int svc_rdma_create_listen(struct svc_serv *, int, struct sockaddr *); 212extern int svc_rdma_create_listen(struct svc_serv *, int, struct sockaddr *);
193extern struct svc_rdma_op_ctxt *svc_rdma_get_context(struct svcxprt_rdma *); 213extern struct svc_rdma_op_ctxt *svc_rdma_get_context(struct svcxprt_rdma *);
194extern void svc_rdma_put_context(struct svc_rdma_op_ctxt *, int); 214extern void svc_rdma_put_context(struct svc_rdma_op_ctxt *, int);
215extern void svc_rdma_unmap_dma(struct svc_rdma_op_ctxt *ctxt);
195extern struct svc_rdma_req_map *svc_rdma_get_req_map(void); 216extern struct svc_rdma_req_map *svc_rdma_get_req_map(void);
196extern void svc_rdma_put_req_map(struct svc_rdma_req_map *); 217extern void svc_rdma_put_req_map(struct svc_rdma_req_map *);
218extern int svc_rdma_fastreg(struct svcxprt_rdma *, struct svc_rdma_fastreg_mr *);
219extern struct svc_rdma_fastreg_mr *svc_rdma_get_frmr(struct svcxprt_rdma *);
220extern void svc_rdma_put_frmr(struct svcxprt_rdma *,
221 struct svc_rdma_fastreg_mr *);
197extern void svc_sq_reap(struct svcxprt_rdma *); 222extern void svc_sq_reap(struct svcxprt_rdma *);
198extern void svc_rq_reap(struct svcxprt_rdma *); 223extern void svc_rq_reap(struct svcxprt_rdma *);
199extern struct svc_xprt_class svc_rdma_class; 224extern struct svc_xprt_class svc_rdma_class;
diff --git a/include/linux/sunrpc/svcsock.h b/include/linux/sunrpc/svcsock.h
index 8cff696dedf5..483e10380aae 100644
--- a/include/linux/sunrpc/svcsock.h
+++ b/include/linux/sunrpc/svcsock.h
@@ -39,10 +39,7 @@ int svc_send(struct svc_rqst *);
39void svc_drop(struct svc_rqst *); 39void svc_drop(struct svc_rqst *);
40void svc_sock_update_bufs(struct svc_serv *serv); 40void svc_sock_update_bufs(struct svc_serv *serv);
41int svc_sock_names(char *buf, struct svc_serv *serv, char *toclose); 41int svc_sock_names(char *buf, struct svc_serv *serv, char *toclose);
42int svc_addsock(struct svc_serv *serv, 42int svc_addsock(struct svc_serv *serv, int fd, char *name_return);
43 int fd,
44 char *name_return,
45 int *proto);
46void svc_init_xprt_sock(void); 43void svc_init_xprt_sock(void);
47void svc_cleanup_xprt_sock(void); 44void svc_cleanup_xprt_sock(void);
48 45
diff --git a/include/linux/sunrpc/xprtrdma.h b/include/linux/sunrpc/xprtrdma.h
index 4de56b1d372b..54a379c9e8eb 100644
--- a/include/linux/sunrpc/xprtrdma.h
+++ b/include/linux/sunrpc/xprtrdma.h
@@ -66,9 +66,6 @@
66 66
67#define RPCRDMA_INLINE_PAD_THRESH (512)/* payload threshold to pad (bytes) */ 67#define RPCRDMA_INLINE_PAD_THRESH (512)/* payload threshold to pad (bytes) */
68 68
69#define RDMA_RESOLVE_TIMEOUT (5*HZ) /* TBD 5 seconds */
70#define RDMA_CONNECT_RETRY_MAX (2) /* retries if no listener backlog */
71
72/* memory registration strategies */ 69/* memory registration strategies */
73#define RPCRDMA_PERSISTENT_REGISTRATION (1) 70#define RPCRDMA_PERSISTENT_REGISTRATION (1)
74 71
@@ -78,6 +75,7 @@ enum rpcrdma_memreg {
78 RPCRDMA_MEMWINDOWS, 75 RPCRDMA_MEMWINDOWS,
79 RPCRDMA_MEMWINDOWS_ASYNC, 76 RPCRDMA_MEMWINDOWS_ASYNC,
80 RPCRDMA_MTHCAFMR, 77 RPCRDMA_MTHCAFMR,
78 RPCRDMA_FRMR,
81 RPCRDMA_ALLPHYSICAL, 79 RPCRDMA_ALLPHYSICAL,
82 RPCRDMA_LAST 80 RPCRDMA_LAST
83}; 81};
diff --git a/include/linux/swab.h b/include/linux/swab.h
index 270d5c208a89..bbed279f3b32 100644
--- a/include/linux/swab.h
+++ b/include/linux/swab.h
@@ -47,8 +47,6 @@ static inline __attribute_const__ __u16 ___swab16(__u16 val)
47{ 47{
48#ifdef __arch_swab16 48#ifdef __arch_swab16
49 return __arch_swab16(val); 49 return __arch_swab16(val);
50#elif defined(__arch_swab16p)
51 return __arch_swab16p(&val);
52#else 50#else
53 return __const_swab16(val); 51 return __const_swab16(val);
54#endif 52#endif
@@ -58,8 +56,6 @@ static inline __attribute_const__ __u32 ___swab32(__u32 val)
58{ 56{
59#ifdef __arch_swab32 57#ifdef __arch_swab32
60 return __arch_swab32(val); 58 return __arch_swab32(val);
61#elif defined(__arch_swab32p)
62 return __arch_swab32p(&val);
63#else 59#else
64 return __const_swab32(val); 60 return __const_swab32(val);
65#endif 61#endif
@@ -69,8 +65,6 @@ static inline __attribute_const__ __u64 ___swab64(__u64 val)
69{ 65{
70#ifdef __arch_swab64 66#ifdef __arch_swab64
71 return __arch_swab64(val); 67 return __arch_swab64(val);
72#elif defined(__arch_swab64p)
73 return __arch_swab64p(&val);
74#elif defined(__SWAB_64_THRU_32__) 68#elif defined(__SWAB_64_THRU_32__)
75 __u32 h = val >> 32; 69 __u32 h = val >> 32;
76 __u32 l = val & ((1ULL << 32) - 1); 70 __u32 l = val & ((1ULL << 32) - 1);
@@ -84,8 +78,6 @@ static inline __attribute_const__ __u32 ___swahw32(__u32 val)
84{ 78{
85#ifdef __arch_swahw32 79#ifdef __arch_swahw32
86 return __arch_swahw32(val); 80 return __arch_swahw32(val);
87#elif defined(__arch_swahw32p)
88 return __arch_swahw32p(&val);
89#else 81#else
90 return __const_swahw32(val); 82 return __const_swahw32(val);
91#endif 83#endif
@@ -95,8 +87,6 @@ static inline __attribute_const__ __u32 ___swahb32(__u32 val)
95{ 87{
96#ifdef __arch_swahb32 88#ifdef __arch_swahb32
97 return __arch_swahb32(val); 89 return __arch_swahb32(val);
98#elif defined(__arch_swahb32p)
99 return __arch_swahb32p(&val);
100#else 90#else
101 return __const_swahb32(val); 91 return __const_swahb32(val);
102#endif 92#endif
diff --git a/include/linux/swap.h b/include/linux/swap.h
index de40f169a4e4..a3af95b2cb6d 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -7,6 +7,7 @@
7#include <linux/list.h> 7#include <linux/list.h>
8#include <linux/memcontrol.h> 8#include <linux/memcontrol.h>
9#include <linux/sched.h> 9#include <linux/sched.h>
10#include <linux/node.h>
10 11
11#include <asm/atomic.h> 12#include <asm/atomic.h>
12#include <asm/page.h> 13#include <asm/page.h>
@@ -171,8 +172,10 @@ extern unsigned int nr_free_pagecache_pages(void);
171 172
172 173
173/* linux/mm/swap.c */ 174/* linux/mm/swap.c */
174extern void lru_cache_add(struct page *); 175extern void __lru_cache_add(struct page *, enum lru_list lru);
175extern void lru_cache_add_active(struct page *); 176extern void lru_cache_add_lru(struct page *, enum lru_list lru);
177extern void lru_cache_add_active_or_unevictable(struct page *,
178 struct vm_area_struct *);
176extern void activate_page(struct page *); 179extern void activate_page(struct page *);
177extern void mark_page_accessed(struct page *); 180extern void mark_page_accessed(struct page *);
178extern void lru_add_drain(void); 181extern void lru_add_drain(void);
@@ -180,12 +183,38 @@ extern int lru_add_drain_all(void);
180extern void rotate_reclaimable_page(struct page *page); 183extern void rotate_reclaimable_page(struct page *page);
181extern void swap_setup(void); 184extern void swap_setup(void);
182 185
186extern void add_page_to_unevictable_list(struct page *page);
187
188/**
189 * lru_cache_add: add a page to the page lists
190 * @page: the page to add
191 */
192static inline void lru_cache_add_anon(struct page *page)
193{
194 __lru_cache_add(page, LRU_INACTIVE_ANON);
195}
196
197static inline void lru_cache_add_active_anon(struct page *page)
198{
199 __lru_cache_add(page, LRU_ACTIVE_ANON);
200}
201
202static inline void lru_cache_add_file(struct page *page)
203{
204 __lru_cache_add(page, LRU_INACTIVE_FILE);
205}
206
207static inline void lru_cache_add_active_file(struct page *page)
208{
209 __lru_cache_add(page, LRU_ACTIVE_FILE);
210}
211
183/* linux/mm/vmscan.c */ 212/* linux/mm/vmscan.c */
184extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order, 213extern unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
185 gfp_t gfp_mask); 214 gfp_t gfp_mask);
186extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *mem, 215extern unsigned long try_to_free_mem_cgroup_pages(struct mem_cgroup *mem,
187 gfp_t gfp_mask); 216 gfp_t gfp_mask);
188extern int __isolate_lru_page(struct page *page, int mode); 217extern int __isolate_lru_page(struct page *page, int mode, int file);
189extern unsigned long shrink_all_memory(unsigned long nr_pages); 218extern unsigned long shrink_all_memory(unsigned long nr_pages);
190extern int vm_swappiness; 219extern int vm_swappiness;
191extern int remove_mapping(struct address_space *mapping, struct page *page); 220extern int remove_mapping(struct address_space *mapping, struct page *page);
@@ -204,6 +233,34 @@ static inline int zone_reclaim(struct zone *z, gfp_t mask, unsigned int order)
204} 233}
205#endif 234#endif
206 235
236#ifdef CONFIG_UNEVICTABLE_LRU
237extern int page_evictable(struct page *page, struct vm_area_struct *vma);
238extern void scan_mapping_unevictable_pages(struct address_space *);
239
240extern unsigned long scan_unevictable_pages;
241extern int scan_unevictable_handler(struct ctl_table *, int, struct file *,
242 void __user *, size_t *, loff_t *);
243extern int scan_unevictable_register_node(struct node *node);
244extern void scan_unevictable_unregister_node(struct node *node);
245#else
246static inline int page_evictable(struct page *page,
247 struct vm_area_struct *vma)
248{
249 return 1;
250}
251
252static inline void scan_mapping_unevictable_pages(struct address_space *mapping)
253{
254}
255
256static inline int scan_unevictable_register_node(struct node *node)
257{
258 return 0;
259}
260
261static inline void scan_unevictable_unregister_node(struct node *node) { }
262#endif
263
207extern int kswapd_run(int nid); 264extern int kswapd_run(int nid);
208 265
209#ifdef CONFIG_MMU 266#ifdef CONFIG_MMU
@@ -251,6 +308,7 @@ extern sector_t swapdev_block(int, pgoff_t);
251extern struct swap_info_struct *get_swap_info_struct(unsigned); 308extern struct swap_info_struct *get_swap_info_struct(unsigned);
252extern int can_share_swap_page(struct page *); 309extern int can_share_swap_page(struct page *);
253extern int remove_exclusive_swap_page(struct page *); 310extern int remove_exclusive_swap_page(struct page *);
311extern int remove_exclusive_swap_page_ref(struct page *);
254struct backing_dev_info; 312struct backing_dev_info;
255 313
256/* linux/mm/thrash.c */ 314/* linux/mm/thrash.c */
@@ -339,6 +397,11 @@ static inline int remove_exclusive_swap_page(struct page *p)
339 return 0; 397 return 0;
340} 398}
341 399
400static inline int remove_exclusive_swap_page_ref(struct page *page)
401{
402 return 0;
403}
404
342static inline swp_entry_t get_swap_page(void) 405static inline swp_entry_t get_swap_page(void)
343{ 406{
344 swp_entry_t entry; 407 swp_entry_t entry;
diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
new file mode 100644
index 000000000000..b18ec5533e8c
--- /dev/null
+++ b/include/linux/swiotlb.h
@@ -0,0 +1,83 @@
1#ifndef __LINUX_SWIOTLB_H
2#define __LINUX_SWIOTLB_H
3
4#include <linux/types.h>
5
6struct device;
7struct dma_attrs;
8struct scatterlist;
9
10extern void
11swiotlb_init(void);
12
13extern void
14*swiotlb_alloc_coherent(struct device *hwdev, size_t size,
15 dma_addr_t *dma_handle, gfp_t flags);
16
17extern void
18swiotlb_free_coherent(struct device *hwdev, size_t size,
19 void *vaddr, dma_addr_t dma_handle);
20
21extern dma_addr_t
22swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir);
23
24extern void
25swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr,
26 size_t size, int dir);
27
28extern dma_addr_t
29swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
30 int dir, struct dma_attrs *attrs);
31
32extern void
33swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
34 size_t size, int dir, struct dma_attrs *attrs);
35
36extern int
37swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nents,
38 int direction);
39
40extern void
41swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
42 int direction);
43
44extern int
45swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
46 int dir, struct dma_attrs *attrs);
47
48extern void
49swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
50 int nelems, int dir, struct dma_attrs *attrs);
51
52extern void
53swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
54 size_t size, int dir);
55
56extern void
57swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
58 int nelems, int dir);
59
60extern void
61swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
62 size_t size, int dir);
63
64extern void
65swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
66 int nelems, int dir);
67
68extern void
69swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
70 unsigned long offset, size_t size, int dir);
71
72extern void
73swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
74 unsigned long offset, size_t size,
75 int dir);
76
77extern int
78swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr);
79
80extern int
81swiotlb_dma_supported(struct device *hwdev, u64 mask);
82
83#endif /* __LINUX_SWIOTLB_H */
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index d0437f36921f..39d471d1163b 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -972,7 +972,7 @@ extern int sysctl_perm(struct ctl_table_root *root,
972 972
973typedef struct ctl_table ctl_table; 973typedef struct ctl_table ctl_table;
974 974
975typedef int ctl_handler (struct ctl_table *table, int __user *name, int nlen, 975typedef int ctl_handler (struct ctl_table *table,
976 void __user *oldval, size_t __user *oldlenp, 976 void __user *oldval, size_t __user *oldlenp,
977 void __user *newval, size_t newlen); 977 void __user *newval, size_t newlen);
978 978
diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h
index 37fa24152bd8..9d68fed50f11 100644
--- a/include/linux/sysfs.h
+++ b/include/linux/sysfs.h
@@ -21,8 +21,9 @@ struct kobject;
21struct module; 21struct module;
22 22
23/* FIXME 23/* FIXME
24 * The *owner field is no longer used, but leave around 24 * The *owner field is no longer used.
25 * until the tree gets cleaned up fully. 25 * x86 tree has been cleaned up. The owner
26 * attribute is still left for other arches.
26 */ 27 */
27struct attribute { 28struct attribute {
28 const char *name; 29 const char *name;
@@ -78,6 +79,8 @@ struct sysfs_ops {
78 ssize_t (*store)(struct kobject *,struct attribute *,const char *, size_t); 79 ssize_t (*store)(struct kobject *,struct attribute *,const char *, size_t);
79}; 80};
80 81
82struct sysfs_dirent;
83
81#ifdef CONFIG_SYSFS 84#ifdef CONFIG_SYSFS
82 85
83int sysfs_schedule_callback(struct kobject *kobj, void (*func)(void *), 86int sysfs_schedule_callback(struct kobject *kobj, void (*func)(void *),
@@ -117,9 +120,14 @@ int sysfs_add_file_to_group(struct kobject *kobj,
117void sysfs_remove_file_from_group(struct kobject *kobj, 120void sysfs_remove_file_from_group(struct kobject *kobj,
118 const struct attribute *attr, const char *group); 121 const struct attribute *attr, const char *group);
119 122
120void sysfs_notify(struct kobject *kobj, char *dir, char *attr); 123void sysfs_notify(struct kobject *kobj, const char *dir, const char *attr);
121 124void sysfs_notify_dirent(struct sysfs_dirent *sd);
122extern int __must_check sysfs_init(void); 125struct sysfs_dirent *sysfs_get_dirent(struct sysfs_dirent *parent_sd,
126 const unsigned char *name);
127struct sysfs_dirent *sysfs_get(struct sysfs_dirent *sd);
128void sysfs_put(struct sysfs_dirent *sd);
129void sysfs_printk_last_file(void);
130int __must_check sysfs_init(void);
123 131
124#else /* CONFIG_SYSFS */ 132#else /* CONFIG_SYSFS */
125 133
@@ -222,7 +230,24 @@ static inline void sysfs_remove_file_from_group(struct kobject *kobj,
222{ 230{
223} 231}
224 232
225static inline void sysfs_notify(struct kobject *kobj, char *dir, char *attr) 233static inline void sysfs_notify(struct kobject *kobj, const char *dir,
234 const char *attr)
235{
236}
237static inline void sysfs_notify_dirent(struct sysfs_dirent *sd)
238{
239}
240static inline
241struct sysfs_dirent *sysfs_get_dirent(struct sysfs_dirent *parent_sd,
242 const unsigned char *name)
243{
244 return NULL;
245}
246static inline struct sysfs_dirent *sysfs_get(struct sysfs_dirent *sd)
247{
248 return NULL;
249}
250static inline void sysfs_put(struct sysfs_dirent *sd)
226{ 251{
227} 252}
228 253
@@ -231,6 +256,10 @@ static inline int __must_check sysfs_init(void)
231 return 0; 256 return 0;
232} 257}
233 258
259static inline void sysfs_printk_last_file(void)
260{
261}
262
234#endif /* CONFIG_SYSFS */ 263#endif /* CONFIG_SYSFS */
235 264
236#endif /* _SYSFS_H_ */ 265#endif /* _SYSFS_H_ */
diff --git a/include/linux/task_io_accounting.h b/include/linux/task_io_accounting.h
index 5e88afc9a2fb..bdf855c2856f 100644
--- a/include/linux/task_io_accounting.h
+++ b/include/linux/task_io_accounting.h
@@ -5,7 +5,7 @@
5 * Don't include this header file directly - it is designed to be dragged in via 5 * Don't include this header file directly - it is designed to be dragged in via
6 * sched.h. 6 * sched.h.
7 * 7 *
8 * Blame akpm@osdl.org for all this. 8 * Blame Andrew Morton for all this.
9 */ 9 */
10 10
11struct task_io_accounting { 11struct task_io_accounting {
diff --git a/include/linux/telephony.h b/include/linux/telephony.h
index 0d0cf2a1e7bc..5b2b6261f193 100644
--- a/include/linux/telephony.h
+++ b/include/linux/telephony.h
@@ -28,10 +28,6 @@
28 * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION 28 * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION
29 * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. 29 * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
30 * 30 *
31 * Version: $Revision: 4.2 $
32 *
33 * $Id: telephony.h,v 4.2 2001/08/06 07:09:43 craigs Exp $
34 *
35 *****************************************************************************/ 31 *****************************************************************************/
36 32
37#ifndef TELEPHONY_H 33#ifndef TELEPHONY_H
diff --git a/include/linux/tick.h b/include/linux/tick.h
index 98921a3e1aa8..b6ec8189ac0c 100644
--- a/include/linux/tick.h
+++ b/include/linux/tick.h
@@ -96,9 +96,11 @@ extern cpumask_t *tick_get_broadcast_oneshot_mask(void);
96extern void tick_clock_notify(void); 96extern void tick_clock_notify(void);
97extern int tick_check_oneshot_change(int allow_nohz); 97extern int tick_check_oneshot_change(int allow_nohz);
98extern struct tick_sched *tick_get_tick_sched(int cpu); 98extern struct tick_sched *tick_get_tick_sched(int cpu);
99extern void tick_check_idle(int cpu);
99# else 100# else
100static inline void tick_clock_notify(void) { } 101static inline void tick_clock_notify(void) { }
101static inline int tick_check_oneshot_change(int allow_nohz) { return 0; } 102static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
103static inline void tick_check_idle(int cpu) { }
102# endif 104# endif
103 105
104#else /* CONFIG_GENERIC_CLOCKEVENTS */ 106#else /* CONFIG_GENERIC_CLOCKEVENTS */
@@ -106,26 +108,23 @@ static inline void tick_init(void) { }
106static inline void tick_cancel_sched_timer(int cpu) { } 108static inline void tick_cancel_sched_timer(int cpu) { }
107static inline void tick_clock_notify(void) { } 109static inline void tick_clock_notify(void) { }
108static inline int tick_check_oneshot_change(int allow_nohz) { return 0; } 110static inline int tick_check_oneshot_change(int allow_nohz) { return 0; }
111static inline void tick_check_idle(int cpu) { }
109#endif /* !CONFIG_GENERIC_CLOCKEVENTS */ 112#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
110 113
111# ifdef CONFIG_NO_HZ 114# ifdef CONFIG_NO_HZ
112extern void tick_nohz_stop_sched_tick(int inidle); 115extern void tick_nohz_stop_sched_tick(int inidle);
113extern void tick_nohz_restart_sched_tick(void); 116extern void tick_nohz_restart_sched_tick(void);
114extern void tick_nohz_update_jiffies(void);
115extern ktime_t tick_nohz_get_sleep_length(void); 117extern ktime_t tick_nohz_get_sleep_length(void);
116extern void tick_nohz_stop_idle(int cpu);
117extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time); 118extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time);
118# else 119# else
119static inline void tick_nohz_stop_sched_tick(int inidle) { } 120static inline void tick_nohz_stop_sched_tick(int inidle) { }
120static inline void tick_nohz_restart_sched_tick(void) { } 121static inline void tick_nohz_restart_sched_tick(void) { }
121static inline void tick_nohz_update_jiffies(void) { }
122static inline ktime_t tick_nohz_get_sleep_length(void) 122static inline ktime_t tick_nohz_get_sleep_length(void)
123{ 123{
124 ktime_t len = { .tv64 = NSEC_PER_SEC/HZ }; 124 ktime_t len = { .tv64 = NSEC_PER_SEC/HZ };
125 125
126 return len; 126 return len;
127} 127}
128static inline void tick_nohz_stop_idle(int cpu) { }
129static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; } 128static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; }
130# endif /* !NO_HZ */ 129# endif /* !NO_HZ */
131 130
diff --git a/include/linux/time.h b/include/linux/time.h
index e15206a7e82e..4f1c9db57707 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -29,6 +29,8 @@ struct timezone {
29 29
30#ifdef __KERNEL__ 30#ifdef __KERNEL__
31 31
32extern struct timezone sys_tz;
33
32/* Parameters used to convert the timespec values: */ 34/* Parameters used to convert the timespec values: */
33#define MSEC_PER_SEC 1000L 35#define MSEC_PER_SEC 1000L
34#define USEC_PER_MSEC 1000L 36#define USEC_PER_MSEC 1000L
@@ -117,6 +119,7 @@ extern int do_setitimer(int which, struct itimerval *value,
117extern unsigned int alarm_setitimer(unsigned int seconds); 119extern unsigned int alarm_setitimer(unsigned int seconds);
118extern int do_getitimer(int which, struct itimerval *value); 120extern int do_getitimer(int which, struct itimerval *value);
119extern void getnstimeofday(struct timespec *tv); 121extern void getnstimeofday(struct timespec *tv);
122extern void getrawmonotonic(struct timespec *ts);
120extern void getboottime(struct timespec *ts); 123extern void getboottime(struct timespec *ts);
121extern void monotonic_to_bootbased(struct timespec *ts); 124extern void monotonic_to_bootbased(struct timespec *ts);
122 125
@@ -125,6 +128,9 @@ extern int timekeeping_valid_for_hres(void);
125extern void update_wall_time(void); 128extern void update_wall_time(void);
126extern void update_xtime_cache(u64 nsec); 129extern void update_xtime_cache(u64 nsec);
127 130
131struct tms;
132extern void do_sys_times(struct tms *);
133
128/** 134/**
129 * timespec_to_ns - Convert timespec to nanoseconds 135 * timespec_to_ns - Convert timespec to nanoseconds
130 * @ts: pointer to the timespec variable to be converted 136 * @ts: pointer to the timespec variable to be converted
@@ -214,6 +220,7 @@ struct itimerval {
214#define CLOCK_MONOTONIC 1 220#define CLOCK_MONOTONIC 1
215#define CLOCK_PROCESS_CPUTIME_ID 2 221#define CLOCK_PROCESS_CPUTIME_ID 2
216#define CLOCK_THREAD_CPUTIME_ID 3 222#define CLOCK_THREAD_CPUTIME_ID 3
223#define CLOCK_MONOTONIC_RAW 4
217 224
218/* 225/*
219 * The IDs of various hardware clocks: 226 * The IDs of various hardware clocks:
diff --git a/include/linux/timex.h b/include/linux/timex.h
index fc6035d29d56..9007313b5b71 100644
--- a/include/linux/timex.h
+++ b/include/linux/timex.h
@@ -82,7 +82,7 @@
82 */ 82 */
83#define SHIFT_USEC 16 /* frequency offset scale (shift) */ 83#define SHIFT_USEC 16 /* frequency offset scale (shift) */
84#define PPM_SCALE (NSEC_PER_USEC << (NTP_SCALE_SHIFT - SHIFT_USEC)) 84#define PPM_SCALE (NSEC_PER_USEC << (NTP_SCALE_SHIFT - SHIFT_USEC))
85#define PPM_SCALE_INV_SHIFT 20 85#define PPM_SCALE_INV_SHIFT 19
86#define PPM_SCALE_INV ((1ll << (PPM_SCALE_INV_SHIFT + NTP_SCALE_SHIFT)) / \ 86#define PPM_SCALE_INV ((1ll << (PPM_SCALE_INV_SHIFT + NTP_SCALE_SHIFT)) / \
87 PPM_SCALE + 1) 87 PPM_SCALE + 1)
88 88
@@ -141,8 +141,15 @@ struct timex {
141#define ADJ_MICRO 0x1000 /* select microsecond resolution */ 141#define ADJ_MICRO 0x1000 /* select microsecond resolution */
142#define ADJ_NANO 0x2000 /* select nanosecond resolution */ 142#define ADJ_NANO 0x2000 /* select nanosecond resolution */
143#define ADJ_TICK 0x4000 /* tick value */ 143#define ADJ_TICK 0x4000 /* tick value */
144
145#ifdef __KERNEL__
146#define ADJ_ADJTIME 0x8000 /* switch between adjtime/adjtimex modes */
147#define ADJ_OFFSET_SINGLESHOT 0x0001 /* old-fashioned adjtime */
148#define ADJ_OFFSET_READONLY 0x2000 /* read-only adjtime */
149#else
144#define ADJ_OFFSET_SINGLESHOT 0x8001 /* old-fashioned adjtime */ 150#define ADJ_OFFSET_SINGLESHOT 0x8001 /* old-fashioned adjtime */
145#define ADJ_OFFSET_SS_READ 0xa001 /* read-only adjtime */ 151#define ADJ_OFFSET_SS_READ 0xa001 /* read-only adjtime */
152#endif
146 153
147/* xntp 3.4 compatibility names */ 154/* xntp 3.4 compatibility names */
148#define MOD_OFFSET ADJ_OFFSET 155#define MOD_OFFSET ADJ_OFFSET
diff --git a/include/linux/tracepoint.h b/include/linux/tracepoint.h
new file mode 100644
index 000000000000..c5bb39c7a770
--- /dev/null
+++ b/include/linux/tracepoint.h
@@ -0,0 +1,137 @@
1#ifndef _LINUX_TRACEPOINT_H
2#define _LINUX_TRACEPOINT_H
3
4/*
5 * Kernel Tracepoint API.
6 *
7 * See Documentation/tracepoint.txt.
8 *
9 * (C) Copyright 2008 Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
10 *
11 * Heavily inspired from the Linux Kernel Markers.
12 *
13 * This file is released under the GPLv2.
14 * See the file COPYING for more details.
15 */
16
17#include <linux/types.h>
18#include <linux/rcupdate.h>
19
20struct module;
21struct tracepoint;
22
23struct tracepoint {
24 const char *name; /* Tracepoint name */
25 int state; /* State. */
26 void **funcs;
27} __attribute__((aligned(8)));
28
29
30#define TPPROTO(args...) args
31#define TPARGS(args...) args
32
33#ifdef CONFIG_TRACEPOINTS
34
35/*
36 * it_func[0] is never NULL because there is at least one element in the array
37 * when the array itself is non NULL.
38 */
39#define __DO_TRACE(tp, proto, args) \
40 do { \
41 void **it_func; \
42 \
43 rcu_read_lock_sched(); \
44 it_func = rcu_dereference((tp)->funcs); \
45 if (it_func) { \
46 do { \
47 ((void(*)(proto))(*it_func))(args); \
48 } while (*(++it_func)); \
49 } \
50 rcu_read_unlock_sched(); \
51 } while (0)
52
53/*
54 * Make sure the alignment of the structure in the __tracepoints section will
55 * not add unwanted padding between the beginning of the section and the
56 * structure. Force alignment to the same alignment as the section start.
57 */
58#define DEFINE_TRACE(name, proto, args) \
59 static inline void trace_##name(proto) \
60 { \
61 static const char __tpstrtab_##name[] \
62 __attribute__((section("__tracepoints_strings"))) \
63 = #name ":" #proto; \
64 static struct tracepoint __tracepoint_##name \
65 __attribute__((section("__tracepoints"), aligned(8))) = \
66 { __tpstrtab_##name, 0, NULL }; \
67 if (unlikely(__tracepoint_##name.state)) \
68 __DO_TRACE(&__tracepoint_##name, \
69 TPPROTO(proto), TPARGS(args)); \
70 } \
71 static inline int register_trace_##name(void (*probe)(proto)) \
72 { \
73 return tracepoint_probe_register(#name ":" #proto, \
74 (void *)probe); \
75 } \
76 static inline void unregister_trace_##name(void (*probe)(proto))\
77 { \
78 tracepoint_probe_unregister(#name ":" #proto, \
79 (void *)probe); \
80 }
81
82extern void tracepoint_update_probe_range(struct tracepoint *begin,
83 struct tracepoint *end);
84
85#else /* !CONFIG_TRACEPOINTS */
86#define DEFINE_TRACE(name, proto, args) \
87 static inline void _do_trace_##name(struct tracepoint *tp, proto) \
88 { } \
89 static inline void trace_##name(proto) \
90 { } \
91 static inline int register_trace_##name(void (*probe)(proto)) \
92 { \
93 return -ENOSYS; \
94 } \
95 static inline void unregister_trace_##name(void (*probe)(proto))\
96 { }
97
98static inline void tracepoint_update_probe_range(struct tracepoint *begin,
99 struct tracepoint *end)
100{ }
101#endif /* CONFIG_TRACEPOINTS */
102
103/*
104 * Connect a probe to a tracepoint.
105 * Internal API, should not be used directly.
106 */
107extern int tracepoint_probe_register(const char *name, void *probe);
108
109/*
110 * Disconnect a probe from a tracepoint.
111 * Internal API, should not be used directly.
112 */
113extern int tracepoint_probe_unregister(const char *name, void *probe);
114
115struct tracepoint_iter {
116 struct module *module;
117 struct tracepoint *tracepoint;
118};
119
120extern void tracepoint_iter_start(struct tracepoint_iter *iter);
121extern void tracepoint_iter_next(struct tracepoint_iter *iter);
122extern void tracepoint_iter_stop(struct tracepoint_iter *iter);
123extern void tracepoint_iter_reset(struct tracepoint_iter *iter);
124extern int tracepoint_get_iter_range(struct tracepoint **tracepoint,
125 struct tracepoint *begin, struct tracepoint *end);
126
127/*
128 * tracepoint_synchronize_unregister must be called between the last tracepoint
129 * probe unregistration and the end of module exit to make sure there is no
130 * caller executing a probe when it is freed.
131 */
132static inline void tracepoint_synchronize_unregister(void)
133{
134 synchronize_sched();
135}
136
137#endif
diff --git a/include/linux/types.h b/include/linux/types.h
index d4a9ce6e2760..f24f7beb47df 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -191,12 +191,14 @@ typedef __u32 __bitwise __wsum;
191#ifdef __KERNEL__ 191#ifdef __KERNEL__
192typedef unsigned __bitwise__ gfp_t; 192typedef unsigned __bitwise__ gfp_t;
193 193
194#ifdef CONFIG_RESOURCES_64BIT 194#ifdef CONFIG_PHYS_ADDR_T_64BIT
195typedef u64 resource_size_t; 195typedef u64 phys_addr_t;
196#else 196#else
197typedef u32 resource_size_t; 197typedef u32 phys_addr_t;
198#endif 198#endif
199 199
200typedef phys_addr_t resource_size_t;
201
200struct ustat { 202struct ustat {
201 __kernel_daddr_t f_tfree; 203 __kernel_daddr_t f_tfree;
202 __kernel_ino_t f_tinode; 204 __kernel_ino_t f_tinode;
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 94ac74aba6b6..8fa973bede5e 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -1135,6 +1135,7 @@ struct usb_anchor {
1135 struct list_head urb_list; 1135 struct list_head urb_list;
1136 wait_queue_head_t wait; 1136 wait_queue_head_t wait;
1137 spinlock_t lock; 1137 spinlock_t lock;
1138 unsigned int poisoned:1;
1138}; 1139};
1139 1140
1140static inline void init_usb_anchor(struct usb_anchor *anchor) 1141static inline void init_usb_anchor(struct usb_anchor *anchor)
@@ -1459,12 +1460,18 @@ extern struct urb *usb_get_urb(struct urb *urb);
1459extern int usb_submit_urb(struct urb *urb, gfp_t mem_flags); 1460extern int usb_submit_urb(struct urb *urb, gfp_t mem_flags);
1460extern int usb_unlink_urb(struct urb *urb); 1461extern int usb_unlink_urb(struct urb *urb);
1461extern void usb_kill_urb(struct urb *urb); 1462extern void usb_kill_urb(struct urb *urb);
1463extern void usb_poison_urb(struct urb *urb);
1464extern void usb_unpoison_urb(struct urb *urb);
1462extern void usb_kill_anchored_urbs(struct usb_anchor *anchor); 1465extern void usb_kill_anchored_urbs(struct usb_anchor *anchor);
1466extern void usb_poison_anchored_urbs(struct usb_anchor *anchor);
1463extern void usb_unlink_anchored_urbs(struct usb_anchor *anchor); 1467extern void usb_unlink_anchored_urbs(struct usb_anchor *anchor);
1464extern void usb_anchor_urb(struct urb *urb, struct usb_anchor *anchor); 1468extern void usb_anchor_urb(struct urb *urb, struct usb_anchor *anchor);
1465extern void usb_unanchor_urb(struct urb *urb); 1469extern void usb_unanchor_urb(struct urb *urb);
1466extern int usb_wait_anchor_empty_timeout(struct usb_anchor *anchor, 1470extern int usb_wait_anchor_empty_timeout(struct usb_anchor *anchor,
1467 unsigned int timeout); 1471 unsigned int timeout);
1472extern struct urb *usb_get_from_anchor(struct usb_anchor *anchor);
1473extern void usb_scuttle_anchored_urbs(struct usb_anchor *anchor);
1474extern int usb_anchor_empty(struct usb_anchor *anchor);
1468 1475
1469/** 1476/**
1470 * usb_urb_dir_in - check if an URB describes an IN transfer 1477 * usb_urb_dir_in - check if an URB describes an IN transfer
diff --git a/include/linux/usb/Kbuild b/include/linux/usb/Kbuild
index 42e84fc315e3..54c446309a2a 100644
--- a/include/linux/usb/Kbuild
+++ b/include/linux/usb/Kbuild
@@ -4,4 +4,5 @@ header-y += ch9.h
4header-y += gadgetfs.h 4header-y += gadgetfs.h
5header-y += midi.h 5header-y += midi.h
6header-y += g_printer.h 6header-y += g_printer.h
7 7header-y += tmc.h
8header-y += vstusb.h
diff --git a/include/linux/usb/cdc.h b/include/linux/usb/cdc.h
index ca228bb94218..18a729343ffa 100644
--- a/include/linux/usb/cdc.h
+++ b/include/linux/usb/cdc.h
@@ -160,6 +160,15 @@ struct usb_cdc_mdlm_detail_desc {
160 __u8 bDetailData[0]; 160 __u8 bDetailData[0];
161} __attribute__ ((packed)); 161} __attribute__ ((packed));
162 162
163/* "OBEX Control Model Functional Descriptor" */
164struct usb_cdc_obex_desc {
165 __u8 bLength;
166 __u8 bDescriptorType;
167 __u8 bDescriptorSubType;
168
169 __le16 bcdVersion;
170} __attribute__ ((packed));
171
163/*-------------------------------------------------------------------------*/ 172/*-------------------------------------------------------------------------*/
164 173
165/* 174/*
diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h
index c932390c6da0..935c380ffe47 100644
--- a/include/linux/usb/composite.h
+++ b/include/linux/usb/composite.h
@@ -130,6 +130,9 @@ struct usb_function {
130 130
131int usb_add_function(struct usb_configuration *, struct usb_function *); 131int usb_add_function(struct usb_configuration *, struct usb_function *);
132 132
133int usb_function_deactivate(struct usb_function *);
134int usb_function_activate(struct usb_function *);
135
133int usb_interface_id(struct usb_configuration *, struct usb_function *); 136int usb_interface_id(struct usb_configuration *, struct usb_function *);
134 137
135/** 138/**
@@ -316,9 +319,13 @@ struct usb_composite_dev {
316 struct usb_composite_driver *driver; 319 struct usb_composite_driver *driver;
317 u8 next_string_id; 320 u8 next_string_id;
318 321
319 spinlock_t lock; 322 /* the gadget driver won't enable the data pullup
323 * while the deactivation count is nonzero.
324 */
325 unsigned deactivations;
320 326
321 /* REVISIT use and existence of lock ... */ 327 /* protects at least deactivation count */
328 spinlock_t lock;
322}; 329};
323 330
324extern int usb_string_id(struct usb_composite_dev *c); 331extern int usb_string_id(struct usb_composite_dev *c);
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index 655341d0f534..0b8617a9176d 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -192,7 +192,7 @@ static inline void usb_set_serial_data(struct usb_serial *serial, void *data)
192 * The driver.owner field should be set to the module owner of this driver. 192 * The driver.owner field should be set to the module owner of this driver.
193 * The driver.name field should be set to the name of this driver (remember 193 * The driver.name field should be set to the name of this driver (remember
194 * it will show up in sysfs, so it needs to be short and to the point. 194 * it will show up in sysfs, so it needs to be short and to the point.
195 * Useing the module name is a good idea.) 195 * Using the module name is a good idea.)
196 */ 196 */
197struct usb_serial_driver { 197struct usb_serial_driver {
198 const char *description; 198 const char *description;
diff --git a/include/linux/usb/tmc.h b/include/linux/usb/tmc.h
new file mode 100644
index 000000000000..c045ae12556c
--- /dev/null
+++ b/include/linux/usb/tmc.h
@@ -0,0 +1,43 @@
1/*
2 * Copyright (C) 2007 Stefan Kopp, Gechingen, Germany
3 * Copyright (C) 2008 Novell, Inc.
4 * Copyright (C) 2008 Greg Kroah-Hartman <gregkh@suse.de>
5 *
6 * This file holds USB constants defined by the USB Device Class
7 * Definition for Test and Measurement devices published by the USB-IF.
8 *
9 * It also has the ioctl definitions for the usbtmc kernel driver that
10 * userspace needs to know about.
11 */
12
13#ifndef __LINUX_USB_TMC_H
14#define __LINUX_USB_TMC_H
15
16/* USB TMC status values */
17#define USBTMC_STATUS_SUCCESS 0x01
18#define USBTMC_STATUS_PENDING 0x02
19#define USBTMC_STATUS_FAILED 0x80
20#define USBTMC_STATUS_TRANSFER_NOT_IN_PROGRESS 0x81
21#define USBTMC_STATUS_SPLIT_NOT_IN_PROGRESS 0x82
22#define USBTMC_STATUS_SPLIT_IN_PROGRESS 0x83
23
24/* USB TMC requests values */
25#define USBTMC_REQUEST_INITIATE_ABORT_BULK_OUT 1
26#define USBTMC_REQUEST_CHECK_ABORT_BULK_OUT_STATUS 2
27#define USBTMC_REQUEST_INITIATE_ABORT_BULK_IN 3
28#define USBTMC_REQUEST_CHECK_ABORT_BULK_IN_STATUS 4
29#define USBTMC_REQUEST_INITIATE_CLEAR 5
30#define USBTMC_REQUEST_CHECK_CLEAR_STATUS 6
31#define USBTMC_REQUEST_GET_CAPABILITIES 7
32#define USBTMC_REQUEST_INDICATOR_PULSE 64
33
34/* Request values for USBTMC driver's ioctl entry point */
35#define USBTMC_IOC_NR 91
36#define USBTMC_IOCTL_INDICATOR_PULSE _IO(USBTMC_IOC_NR, 1)
37#define USBTMC_IOCTL_CLEAR _IO(USBTMC_IOC_NR, 2)
38#define USBTMC_IOCTL_ABORT_BULK_OUT _IO(USBTMC_IOC_NR, 3)
39#define USBTMC_IOCTL_ABORT_BULK_IN _IO(USBTMC_IOC_NR, 4)
40#define USBTMC_IOCTL_CLEAR_OUT_HALT _IO(USBTMC_IOC_NR, 6)
41#define USBTMC_IOCTL_CLEAR_IN_HALT _IO(USBTMC_IOC_NR, 7)
42
43#endif
diff --git a/include/linux/usb/vstusb.h b/include/linux/usb/vstusb.h
new file mode 100644
index 000000000000..1cfac67191ff
--- /dev/null
+++ b/include/linux/usb/vstusb.h
@@ -0,0 +1,71 @@
1/*****************************************************************************
2 * File: drivers/usb/misc/vstusb.h
3 *
4 * Purpose: Support for the bulk USB Vernier Spectrophotometers
5 *
6 * Author: EQware Engineering, Inc.
7 * Oregon City, OR, USA 97045
8 *
9 * Copyright: 2007, 2008
10 * Vernier Software & Technology
11 * Beaverton, OR, USA 97005
12 *
13 * Web: www.vernier.com
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 *
19 *****************************************************************************/
20/*****************************************************************************
21 *
22 * The vstusb module is a standard usb 'client' driver running on top of the
23 * standard usb host controller stack.
24 *
25 * In general, vstusb supports standard bulk usb pipes. It supports multiple
26 * devices and multiple pipes per device.
27 *
28 * The vstusb driver supports two interfaces:
29 * 1 - ioctl SEND_PIPE/RECV_PIPE - a general bulk write/read msg
30 * interface to any pipe with timeout support;
31 * 2 - standard read/write with ioctl config - offers standard read/write
32 * interface with ioctl configured pipes and timeouts.
33 *
34 * Both interfaces can be signal from other process and will abort its i/o
35 * operation.
36 *
37 * A timeout of 0 means NO timeout. The user can still terminate the read via
38 * signal.
39 *
40 * If using multiple threads with this driver, the user should ensure that
41 * any reads, writes, or ioctls are complete before closing the device.
42 * Changing read/write timeouts or pipes takes effect on next read/write.
43 *
44 *****************************************************************************/
45
46struct vstusb_args {
47 union {
48 /* this struct is used for IOCTL_VSTUSB_SEND_PIPE, *
49 * IOCTL_VSTUSB_RECV_PIPE, and read()/write() fops */
50 struct {
51 void __user *buffer;
52 size_t count;
53 unsigned int timeout_ms;
54 int pipe;
55 };
56
57 /* this one is used for IOCTL_VSTUSB_CONFIG_RW */
58 struct {
59 int rd_pipe;
60 int rd_timeout_ms;
61 int wr_pipe;
62 int wr_timeout_ms;
63 };
64 };
65};
66
67#define VST_IOC_MAGIC 'L'
68#define VST_IOC_FIRST 0x20
69#define IOCTL_VSTUSB_SEND_PIPE _IO(VST_IOC_MAGIC, VST_IOC_FIRST)
70#define IOCTL_VSTUSB_RECV_PIPE _IO(VST_IOC_MAGIC, VST_IOC_FIRST + 1)
71#define IOCTL_VSTUSB_CONFIG_RW _IO(VST_IOC_MAGIC, VST_IOC_FIRST + 2)
diff --git a/include/linux/usb/wusb-wa.h b/include/linux/usb/wusb-wa.h
new file mode 100644
index 000000000000..a102561e7026
--- /dev/null
+++ b/include/linux/usb/wusb-wa.h
@@ -0,0 +1,271 @@
1/*
2 * Wireless USB Wire Adapter constants and structures.
3 *
4 * Copyright (C) 2005-2006 Intel Corporation.
5 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 *
21 *
22 * FIXME: docs
23 * FIXME: organize properly, group logically
24 *
25 * All the event structures are defined in uwb/spec.h, as they are
26 * common to the WHCI and WUSB radio control interfaces.
27 *
28 * References:
29 * [WUSB] Wireless Universal Serial Bus Specification, revision 1.0, ch8
30 */
31#ifndef __LINUX_USB_WUSB_WA_H
32#define __LINUX_USB_WUSB_WA_H
33
34/**
35 * Radio Command Request for the Radio Control Interface
36 *
37 * Radio Control Interface command and event codes are the same as
38 * WHCI, and listed in include/linux/uwb.h:UWB_RC_{CMD,EVT}_*
39 */
40enum {
41 WA_EXEC_RC_CMD = 40, /* Radio Control command Request */
42};
43
44/* Wireless Adapter Requests ([WUSB] table 8-51) */
45enum {
46 WUSB_REQ_ADD_MMC_IE = 20,
47 WUSB_REQ_REMOVE_MMC_IE = 21,
48 WUSB_REQ_SET_NUM_DNTS = 22,
49 WUSB_REQ_SET_CLUSTER_ID = 23,
50 WUSB_REQ_SET_DEV_INFO = 24,
51 WUSB_REQ_GET_TIME = 25,
52 WUSB_REQ_SET_STREAM_IDX = 26,
53 WUSB_REQ_SET_WUSB_MAS = 27,
54};
55
56
57/* Wireless Adapter WUSB Channel Time types ([WUSB] table 8-52) */
58enum {
59 WUSB_TIME_ADJ = 0,
60 WUSB_TIME_BPST = 1,
61 WUSB_TIME_WUSB = 2,
62};
63
64enum {
65 WA_ENABLE = 0x01,
66 WA_RESET = 0x02,
67 RPIPE_PAUSE = 0x1,
68};
69
70/* Responses from Get Status request ([WUSB] section 8.3.1.6) */
71enum {
72 WA_STATUS_ENABLED = 0x01,
73 WA_STATUS_RESETTING = 0x02
74};
75
76enum rpipe_crs {
77 RPIPE_CRS_CTL = 0x01,
78 RPIPE_CRS_ISO = 0x02,
79 RPIPE_CRS_BULK = 0x04,
80 RPIPE_CRS_INTR = 0x08
81};
82
83/**
84 * RPipe descriptor ([WUSB] section 8.5.2.11)
85 *
86 * FIXME: explain rpipes
87 */
88struct usb_rpipe_descriptor {
89 u8 bLength;
90 u8 bDescriptorType;
91 __le16 wRPipeIndex;
92 __le16 wRequests;
93 __le16 wBlocks; /* rw if 0 */
94 __le16 wMaxPacketSize; /* rw? */
95 u8 bHSHubAddress; /* reserved: 0 */
96 u8 bHSHubPort; /* ??? FIXME ??? */
97 u8 bSpeed; /* rw: xfer rate 'enum uwb_phy_rate' */
98 u8 bDeviceAddress; /* rw: Target device address */
99 u8 bEndpointAddress; /* rw: Target EP address */
100 u8 bDataSequence; /* ro: Current Data sequence */
101 __le32 dwCurrentWindow; /* ro */
102 u8 bMaxDataSequence; /* ro?: max supported seq */
103 u8 bInterval; /* rw: */
104 u8 bOverTheAirInterval; /* rw: */
105 u8 bmAttribute; /* ro? */
106 u8 bmCharacteristics; /* ro? enum rpipe_attr, supported xsactions */
107 u8 bmRetryOptions; /* rw? */
108 __le16 wNumTransactionErrors; /* rw */
109} __attribute__ ((packed));
110
111/**
112 * Wire Adapter Notification types ([WUSB] sections 8.4.5 & 8.5.4)
113 *
114 * These are the notifications coming on the notification endpoint of
115 * an HWA and a DWA.
116 */
117enum wa_notif_type {
118 DWA_NOTIF_RWAKE = 0x91,
119 DWA_NOTIF_PORTSTATUS = 0x92,
120 WA_NOTIF_TRANSFER = 0x93,
121 HWA_NOTIF_BPST_ADJ = 0x94,
122 HWA_NOTIF_DN = 0x95,
123};
124
125/**
126 * Wire Adapter notification header
127 *
128 * Notifications coming from a wire adapter use a common header
129 * defined in [WUSB] sections 8.4.5 & 8.5.4.
130 */
131struct wa_notif_hdr {
132 u8 bLength;
133 u8 bNotifyType; /* enum wa_notif_type */
134} __attribute__((packed));
135
136/**
137 * HWA DN Received notification [(WUSB] section 8.5.4.2)
138 *
139 * The DNData is specified in WUSB1.0[7.6]. For each device
140 * notification we received, we just need to dispatch it.
141 *
142 * @dndata: this is really an array of notifications, but all start
143 * with the same header.
144 */
145struct hwa_notif_dn {
146 struct wa_notif_hdr hdr;
147 u8 bSourceDeviceAddr; /* from errata 2005/07 */
148 u8 bmAttributes;
149 struct wusb_dn_hdr dndata[];
150} __attribute__((packed));
151
152/* [WUSB] section 8.3.3 */
153enum wa_xfer_type {
154 WA_XFER_TYPE_CTL = 0x80,
155 WA_XFER_TYPE_BI = 0x81, /* bulk/interrupt */
156 WA_XFER_TYPE_ISO = 0x82,
157 WA_XFER_RESULT = 0x83,
158 WA_XFER_ABORT = 0x84,
159};
160
161/* [WUSB] section 8.3.3 */
162struct wa_xfer_hdr {
163 u8 bLength; /* 0x18 */
164 u8 bRequestType; /* 0x80 WA_REQUEST_TYPE_CTL */
165 __le16 wRPipe; /* RPipe index */
166 __le32 dwTransferID; /* Host-assigned ID */
167 __le32 dwTransferLength; /* Length of data to xfer */
168 u8 bTransferSegment;
169} __attribute__((packed));
170
171struct wa_xfer_ctl {
172 struct wa_xfer_hdr hdr;
173 u8 bmAttribute;
174 __le16 wReserved;
175 struct usb_ctrlrequest baSetupData;
176} __attribute__((packed));
177
178struct wa_xfer_bi {
179 struct wa_xfer_hdr hdr;
180 u8 bReserved;
181 __le16 wReserved;
182} __attribute__((packed));
183
184struct wa_xfer_hwaiso {
185 struct wa_xfer_hdr hdr;
186 u8 bReserved;
187 __le16 wPresentationTime;
188 __le32 dwNumOfPackets;
189 /* FIXME: u8 pktdata[]? */
190} __attribute__((packed));
191
192/* [WUSB] section 8.3.3.5 */
193struct wa_xfer_abort {
194 u8 bLength;
195 u8 bRequestType;
196 __le16 wRPipe; /* RPipe index */
197 __le32 dwTransferID; /* Host-assigned ID */
198} __attribute__((packed));
199
200/**
201 * WA Transfer Complete notification ([WUSB] section 8.3.3.3)
202 *
203 */
204struct wa_notif_xfer {
205 struct wa_notif_hdr hdr;
206 u8 bEndpoint;
207 u8 Reserved;
208} __attribute__((packed));
209
210/** Transfer result basic codes [WUSB] table 8-15 */
211enum {
212 WA_XFER_STATUS_SUCCESS,
213 WA_XFER_STATUS_HALTED,
214 WA_XFER_STATUS_DATA_BUFFER_ERROR,
215 WA_XFER_STATUS_BABBLE,
216 WA_XFER_RESERVED,
217 WA_XFER_STATUS_NOT_FOUND,
218 WA_XFER_STATUS_INSUFFICIENT_RESOURCE,
219 WA_XFER_STATUS_TRANSACTION_ERROR,
220 WA_XFER_STATUS_ABORTED,
221 WA_XFER_STATUS_RPIPE_NOT_READY,
222 WA_XFER_INVALID_FORMAT,
223 WA_XFER_UNEXPECTED_SEGMENT_NUMBER,
224 WA_XFER_STATUS_RPIPE_TYPE_MISMATCH,
225};
226
227/** [WUSB] section 8.3.3.4 */
228struct wa_xfer_result {
229 struct wa_notif_hdr hdr;
230 __le32 dwTransferID;
231 __le32 dwTransferLength;
232 u8 bTransferSegment;
233 u8 bTransferStatus;
234 __le32 dwNumOfPackets;
235} __attribute__((packed));
236
237/**
238 * Wire Adapter Class Descriptor ([WUSB] section 8.5.2.7).
239 *
240 * NOTE: u16 fields are read Little Endian from the hardware.
241 *
242 * @bNumPorts is the original max number of devices that the host can
243 * connect; we might chop this so the stack can handle
244 * it. In case you need to access it, use wusbhc->ports_max
245 * if it is a Wireless USB WA.
246 */
247struct usb_wa_descriptor {
248 u8 bLength;
249 u8 bDescriptorType;
250 u16 bcdWAVersion;
251 u8 bNumPorts; /* don't use!! */
252 u8 bmAttributes; /* Reserved == 0 */
253 u16 wNumRPipes;
254 u16 wRPipeMaxBlock;
255 u8 bRPipeBlockSize;
256 u8 bPwrOn2PwrGood;
257 u8 bNumMMCIEs;
258 u8 DeviceRemovable; /* FIXME: in DWA this is up to 16 bytes */
259} __attribute__((packed));
260
261/**
262 * HWA Device Information Buffer (WUSB1.0[T8.54])
263 */
264struct hwa_dev_info {
265 u8 bmDeviceAvailability[32]; /* FIXME: ignored for now */
266 u8 bDeviceAddress;
267 __le16 wPHYRates;
268 u8 bmDeviceAttribute;
269} __attribute__((packed));
270
271#endif /* #ifndef __LINUX_USB_WUSB_WA_H */
diff --git a/include/linux/usb/wusb.h b/include/linux/usb/wusb.h
new file mode 100644
index 000000000000..5f401b644ed5
--- /dev/null
+++ b/include/linux/usb/wusb.h
@@ -0,0 +1,376 @@
1/*
2 * Wireless USB Standard Definitions
3 * Event Size Tables
4 *
5 * Copyright (C) 2005-2006 Intel Corporation
6 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 *
23 * FIXME: docs
24 * FIXME: organize properly, group logically
25 *
26 * All the event structures are defined in uwb/spec.h, as they are
27 * common to the WHCI and WUSB radio control interfaces.
28 */
29
30#ifndef __WUSB_H__
31#define __WUSB_H__
32
33#include <linux/types.h>
34#include <linux/kernel.h>
35#include <linux/uwb/spec.h>
36#include <linux/usb/ch9.h>
37#include <linux/param.h>
38
39/**
40 * WUSB Information Element header
41 *
42 * I don't know why, they decided to make it different to the MBOA MAC
43 * IE Header; beats me.
44 */
45struct wuie_hdr {
46 u8 bLength;
47 u8 bIEIdentifier;
48} __attribute__((packed));
49
50enum {
51 WUIE_ID_WCTA = 0x80,
52 WUIE_ID_CONNECTACK,
53 WUIE_ID_HOST_INFO,
54 WUIE_ID_CHANGE_ANNOUNCE,
55 WUIE_ID_DEVICE_DISCONNECT,
56 WUIE_ID_HOST_DISCONNECT,
57 WUIE_ID_KEEP_ALIVE = 0x89,
58 WUIE_ID_ISOCH_DISCARD,
59 WUIE_ID_RESET_DEVICE,
60};
61
62/**
63 * Maximum number of array elements in a WUSB IE.
64 *
65 * WUSB1.0[7.5 before table 7-38] says that in WUSB IEs that
66 * are "arrays" have to limited to 4 elements. So we define it
67 * like that to ease up and submit only the neeed size.
68 */
69#define WUIE_ELT_MAX 4
70
71/**
72 * Wrapper for the data that defines a CHID, a CDID or a CK
73 *
74 * WUSB defines that CHIDs, CDIDs and CKs are a 16 byte string of
75 * data. In order to avoid confusion and enforce types, we wrap it.
76 *
77 * Make it packed, as we use it in some hw defintions.
78 */
79struct wusb_ckhdid {
80 u8 data[16];
81} __attribute__((packed));
82
83const static
84struct wusb_ckhdid wusb_ckhdid_zero = { .data = { 0 } };
85
86#define WUSB_CKHDID_STRSIZE (3 * sizeof(struct wusb_ckhdid) + 1)
87
88/**
89 * WUSB IE: Host Information (WUSB1.0[7.5.2])
90 *
91 * Used to provide information about the host to the Wireless USB
92 * devices in range (CHID can be used as an ASCII string).
93 */
94struct wuie_host_info {
95 struct wuie_hdr hdr;
96 __le16 attributes;
97 struct wusb_ckhdid CHID;
98} __attribute__((packed));
99
100/**
101 * WUSB IE: Connect Ack (WUSB1.0[7.5.1])
102 *
103 * Used to acknowledge device connect requests. See note for
104 * WUIE_ELT_MAX.
105 */
106struct wuie_connect_ack {
107 struct wuie_hdr hdr;
108 struct {
109 struct wusb_ckhdid CDID;
110 u8 bDeviceAddress; /* 0 means unused */
111 u8 bReserved;
112 } blk[WUIE_ELT_MAX];
113} __attribute__((packed));
114
115/**
116 * WUSB IE Host Information Element, Connect Availability
117 *
118 * WUSB1.0[7.5.2], bmAttributes description
119 */
120enum {
121 WUIE_HI_CAP_RECONNECT = 0,
122 WUIE_HI_CAP_LIMITED,
123 WUIE_HI_CAP_RESERVED,
124 WUIE_HI_CAP_ALL,
125};
126
127/**
128 * WUSB IE: Channel Stop (WUSB1.0[7.5.8])
129 *
130 * Tells devices the host is going to stop sending MMCs and will dissapear.
131 */
132struct wuie_channel_stop {
133 struct wuie_hdr hdr;
134 u8 attributes;
135 u8 timestamp[3];
136} __attribute__((packed));
137
138/**
139 * WUSB IE: Keepalive (WUSB1.0[7.5.9])
140 *
141 * Ask device(s) to send keepalives.
142 */
143struct wuie_keep_alive {
144 struct wuie_hdr hdr;
145 u8 bDeviceAddress[WUIE_ELT_MAX];
146} __attribute__((packed));
147
148/**
149 * WUSB IE: Reset device (WUSB1.0[7.5.11])
150 *
151 * Tell device to reset; in all truth, we can fit 4 CDIDs, but we only
152 * use it for one at the time...
153 *
154 * In any case, this request is a wee bit silly: why don't they target
155 * by address??
156 */
157struct wuie_reset {
158 struct wuie_hdr hdr;
159 struct wusb_ckhdid CDID;
160} __attribute__((packed));
161
162/**
163 * WUSB IE: Disconnect device (WUSB1.0[7.5.11])
164 *
165 * Tell device to disconnect; we can fit 4 addresses, but we only use
166 * it for one at the time...
167 */
168struct wuie_disconnect {
169 struct wuie_hdr hdr;
170 u8 bDeviceAddress;
171 u8 padding;
172} __attribute__((packed));
173
174/**
175 * WUSB IE: Host disconnect ([WUSB] section 7.5.5)
176 *
177 * Tells all connected devices to disconnect.
178 */
179struct wuie_host_disconnect {
180 struct wuie_hdr hdr;
181} __attribute__((packed));
182
183/**
184 * WUSB Device Notification header (WUSB1.0[7.6])
185 */
186struct wusb_dn_hdr {
187 u8 bType;
188 u8 notifdata[];
189} __attribute__((packed));
190
191/** Device Notification codes (WUSB1.0[Table 7-54]) */
192enum WUSB_DN {
193 WUSB_DN_CONNECT = 0x01,
194 WUSB_DN_DISCONNECT = 0x02,
195 WUSB_DN_EPRDY = 0x03,
196 WUSB_DN_MASAVAILCHANGED = 0x04,
197 WUSB_DN_RWAKE = 0x05,
198 WUSB_DN_SLEEP = 0x06,
199 WUSB_DN_ALIVE = 0x07,
200};
201
202/** WUSB Device Notification Connect */
203struct wusb_dn_connect {
204 struct wusb_dn_hdr hdr;
205 __le16 attributes;
206 struct wusb_ckhdid CDID;
207} __attribute__((packed));
208
209static inline int wusb_dn_connect_prev_dev_addr(const struct wusb_dn_connect *dn)
210{
211 return le16_to_cpu(dn->attributes) & 0xff;
212}
213
214static inline int wusb_dn_connect_new_connection(const struct wusb_dn_connect *dn)
215{
216 return (le16_to_cpu(dn->attributes) >> 8) & 0x1;
217}
218
219static inline int wusb_dn_connect_beacon_behavior(const struct wusb_dn_connect *dn)
220{
221 return (le16_to_cpu(dn->attributes) >> 9) & 0x03;
222}
223
224/** Device is alive (aka: pong) (WUSB1.0[7.6.7]) */
225struct wusb_dn_alive {
226 struct wusb_dn_hdr hdr;
227} __attribute__((packed));
228
229/** Device is disconnecting (WUSB1.0[7.6.2]) */
230struct wusb_dn_disconnect {
231 struct wusb_dn_hdr hdr;
232} __attribute__((packed));
233
234/* General constants */
235enum {
236 WUSB_TRUST_TIMEOUT_MS = 4000, /* [WUSB] section 4.15.1 */
237};
238
239static inline size_t ckhdid_printf(char *pr_ckhdid, size_t size,
240 const struct wusb_ckhdid *ckhdid)
241{
242 return scnprintf(pr_ckhdid, size,
243 "%02hx %02hx %02hx %02hx %02hx %02hx %02hx %02hx "
244 "%02hx %02hx %02hx %02hx %02hx %02hx %02hx %02hx",
245 ckhdid->data[0], ckhdid->data[1],
246 ckhdid->data[2], ckhdid->data[3],
247 ckhdid->data[4], ckhdid->data[5],
248 ckhdid->data[6], ckhdid->data[7],
249 ckhdid->data[8], ckhdid->data[9],
250 ckhdid->data[10], ckhdid->data[11],
251 ckhdid->data[12], ckhdid->data[13],
252 ckhdid->data[14], ckhdid->data[15]);
253}
254
255/*
256 * WUSB Crypto stuff (WUSB1.0[6])
257 */
258
259extern const char *wusb_et_name(u8);
260
261/**
262 * WUSB key index WUSB1.0[7.3.2.4], for usage when setting keys for
263 * the host or the device.
264 */
265static inline u8 wusb_key_index(int index, int type, int originator)
266{
267 return (originator << 6) | (type << 4) | index;
268}
269
270#define WUSB_KEY_INDEX_TYPE_PTK 0 /* for HWA only */
271#define WUSB_KEY_INDEX_TYPE_ASSOC 1
272#define WUSB_KEY_INDEX_TYPE_GTK 2
273#define WUSB_KEY_INDEX_ORIGINATOR_HOST 0
274#define WUSB_KEY_INDEX_ORIGINATOR_DEVICE 1
275
276/* A CCM Nonce, defined in WUSB1.0[6.4.1] */
277struct aes_ccm_nonce {
278 u8 sfn[6]; /* Little Endian */
279 u8 tkid[3]; /* LE */
280 struct uwb_dev_addr dest_addr;
281 struct uwb_dev_addr src_addr;
282} __attribute__((packed));
283
284/* A CCM operation label, defined on WUSB1.0[6.5.x] */
285struct aes_ccm_label {
286 u8 data[14];
287} __attribute__((packed));
288
289/*
290 * Input to the key derivation sequence defined in
291 * WUSB1.0[6.5.1]. Rest of the data is in the CCM Nonce passed to the
292 * PRF function.
293 */
294struct wusb_keydvt_in {
295 u8 hnonce[16];
296 u8 dnonce[16];
297} __attribute__((packed));
298
299/*
300 * Output from the key derivation sequence defined in
301 * WUSB1.0[6.5.1].
302 */
303struct wusb_keydvt_out {
304 u8 kck[16];
305 u8 ptk[16];
306} __attribute__((packed));
307
308/* Pseudo Random Function WUSB1.0[6.5] */
309extern int wusb_crypto_init(void);
310extern void wusb_crypto_exit(void);
311extern ssize_t wusb_prf(void *out, size_t out_size,
312 const u8 key[16], const struct aes_ccm_nonce *_n,
313 const struct aes_ccm_label *a,
314 const void *b, size_t blen, size_t len);
315
316static inline int wusb_prf_64(void *out, size_t out_size, const u8 key[16],
317 const struct aes_ccm_nonce *n,
318 const struct aes_ccm_label *a,
319 const void *b, size_t blen)
320{
321 return wusb_prf(out, out_size, key, n, a, b, blen, 64);
322}
323
324static inline int wusb_prf_128(void *out, size_t out_size, const u8 key[16],
325 const struct aes_ccm_nonce *n,
326 const struct aes_ccm_label *a,
327 const void *b, size_t blen)
328{
329 return wusb_prf(out, out_size, key, n, a, b, blen, 128);
330}
331
332static inline int wusb_prf_256(void *out, size_t out_size, const u8 key[16],
333 const struct aes_ccm_nonce *n,
334 const struct aes_ccm_label *a,
335 const void *b, size_t blen)
336{
337 return wusb_prf(out, out_size, key, n, a, b, blen, 256);
338}
339
340/* Key derivation WUSB1.0[6.5.1] */
341static inline int wusb_key_derive(struct wusb_keydvt_out *keydvt_out,
342 const u8 key[16],
343 const struct aes_ccm_nonce *n,
344 const struct wusb_keydvt_in *keydvt_in)
345{
346 const struct aes_ccm_label a = { .data = "Pair-wise keys" };
347 return wusb_prf_256(keydvt_out, sizeof(*keydvt_out), key, n, &a,
348 keydvt_in, sizeof(*keydvt_in));
349}
350
351/*
352 * Out-of-band MIC Generation WUSB1.0[6.5.2]
353 *
354 * Compute the MIC over @key, @n and @hs and place it in @mic_out.
355 *
356 * @mic_out: Where to place the 8 byte MIC tag
357 * @key: KCK from the derivation process
358 * @n: CCM nonce, n->sfn == 0, TKID as established in the
359 * process.
360 * @hs: Handshake struct for phase 2 of the 4-way.
361 * hs->bStatus and hs->bReserved are zero.
362 * hs->bMessageNumber is 2 (WUSB1.0[7.3.2.5.2]
363 * hs->dest_addr is the device's USB address padded with 0
364 * hs->src_addr is the hosts's UWB device address
365 * hs->mic is ignored (as we compute that value).
366 */
367static inline int wusb_oob_mic(u8 mic_out[8], const u8 key[16],
368 const struct aes_ccm_nonce *n,
369 const struct usb_handshake *hs)
370{
371 const struct aes_ccm_label a = { .data = "out-of-bandMIC" };
372 return wusb_prf_64(mic_out, 8, key, n, &a,
373 hs, sizeof(*hs) - sizeof(hs->MIC));
374}
375
376#endif /* #ifndef __WUSB_H__ */
diff --git a/include/linux/uwb.h b/include/linux/uwb.h
new file mode 100644
index 000000000000..f9ccbd9a2ced
--- /dev/null
+++ b/include/linux/uwb.h
@@ -0,0 +1,765 @@
1/*
2 * Ultra Wide Band
3 * UWB API
4 *
5 * Copyright (C) 2005-2006 Intel Corporation
6 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 *
23 * FIXME: doc: overview of the API, different parts and pointers
24 */
25
26#ifndef __LINUX__UWB_H__
27#define __LINUX__UWB_H__
28
29#include <linux/limits.h>
30#include <linux/device.h>
31#include <linux/mutex.h>
32#include <linux/timer.h>
33#include <linux/workqueue.h>
34#include <linux/uwb/spec.h>
35
36struct uwb_dev;
37struct uwb_beca_e;
38struct uwb_rc;
39struct uwb_rsv;
40struct uwb_dbg;
41
42/**
43 * struct uwb_dev - a UWB Device
44 * @rc: UWB Radio Controller that discovered the device (kind of its
45 * parent).
46 * @bce: a beacon cache entry for this device; or NULL if the device
47 * is a local radio controller.
48 * @mac_addr: the EUI-48 address of this device.
49 * @dev_addr: the current DevAddr used by this device.
50 * @beacon_slot: the slot number the beacon is using.
51 * @streams: bitmap of streams allocated to reservations targeted at
52 * this device. For an RC, this is the streams allocated for
53 * reservations targeted at DevAddrs.
54 *
55 * A UWB device may either by a neighbor or part of a local radio
56 * controller.
57 */
58struct uwb_dev {
59 struct mutex mutex;
60 struct list_head list_node;
61 struct device dev;
62 struct uwb_rc *rc; /* radio controller */
63 struct uwb_beca_e *bce; /* Beacon Cache Entry */
64
65 struct uwb_mac_addr mac_addr;
66 struct uwb_dev_addr dev_addr;
67 int beacon_slot;
68 DECLARE_BITMAP(streams, UWB_NUM_STREAMS);
69};
70#define to_uwb_dev(d) container_of(d, struct uwb_dev, dev)
71
72/**
73 * UWB HWA/WHCI Radio Control {Command|Event} Block context IDs
74 *
75 * RC[CE]Bs have a 'context ID' field that matches the command with
76 * the event received to confirm it.
77 *
78 * Maximum number of context IDs
79 */
80enum { UWB_RC_CTX_MAX = 256 };
81
82
83/** Notification chain head for UWB generated events to listeners */
84struct uwb_notifs_chain {
85 struct list_head list;
86 struct mutex mutex;
87};
88
89/**
90 * struct uwb_mas_bm - a bitmap of all MAS in a superframe
91 * @bm: a bitmap of length #UWB_NUM_MAS
92 */
93struct uwb_mas_bm {
94 DECLARE_BITMAP(bm, UWB_NUM_MAS);
95};
96
97/**
98 * uwb_rsv_state - UWB Reservation state.
99 *
100 * NONE - reservation is not active (no DRP IE being transmitted).
101 *
102 * Owner reservation states:
103 *
104 * INITIATED - owner has sent an initial DRP request.
105 * PENDING - target responded with pending Reason Code.
106 * MODIFIED - reservation manager is modifying an established
107 * reservation with a different MAS allocation.
108 * ESTABLISHED - the reservation has been successfully negotiated.
109 *
110 * Target reservation states:
111 *
112 * DENIED - request is denied.
113 * ACCEPTED - request is accepted.
114 * PENDING - PAL has yet to make a decision to whether to accept or
115 * deny.
116 *
117 * FIXME: further target states TBD.
118 */
119enum uwb_rsv_state {
120 UWB_RSV_STATE_NONE,
121 UWB_RSV_STATE_O_INITIATED,
122 UWB_RSV_STATE_O_PENDING,
123 UWB_RSV_STATE_O_MODIFIED,
124 UWB_RSV_STATE_O_ESTABLISHED,
125 UWB_RSV_STATE_T_ACCEPTED,
126 UWB_RSV_STATE_T_DENIED,
127 UWB_RSV_STATE_T_PENDING,
128
129 UWB_RSV_STATE_LAST,
130};
131
132enum uwb_rsv_target_type {
133 UWB_RSV_TARGET_DEV,
134 UWB_RSV_TARGET_DEVADDR,
135};
136
137/**
138 * struct uwb_rsv_target - the target of a reservation.
139 *
140 * Reservations unicast and targeted at a single device
141 * (UWB_RSV_TARGET_DEV); or (e.g., in the case of WUSB) targeted at a
142 * specific (private) DevAddr (UWB_RSV_TARGET_DEVADDR).
143 */
144struct uwb_rsv_target {
145 enum uwb_rsv_target_type type;
146 union {
147 struct uwb_dev *dev;
148 struct uwb_dev_addr devaddr;
149 };
150};
151
152/*
153 * Number of streams reserved for reservations targeted at DevAddrs.
154 */
155#define UWB_NUM_GLOBAL_STREAMS 1
156
157typedef void (*uwb_rsv_cb_f)(struct uwb_rsv *rsv);
158
159/**
160 * struct uwb_rsv - a DRP reservation
161 *
162 * Data structure management:
163 *
164 * @rc: the radio controller this reservation is for
165 * (as target or owner)
166 * @rc_node: a list node for the RC
167 * @pal_node: a list node for the PAL
168 *
169 * Owner and target parameters:
170 *
171 * @owner: the UWB device owning this reservation
172 * @target: the target UWB device
173 * @type: reservation type
174 *
175 * Owner parameters:
176 *
177 * @max_mas: maxiumum number of MAS
178 * @min_mas: minimum number of MAS
179 * @sparsity: owner selected sparsity
180 * @is_multicast: true iff multicast
181 *
182 * @callback: callback function when the reservation completes
183 * @pal_priv: private data for the PAL making the reservation
184 *
185 * Reservation status:
186 *
187 * @status: negotiation status
188 * @stream: stream index allocated for this reservation
189 * @mas: reserved MAS
190 * @drp_ie: the DRP IE
191 * @ie_valid: true iff the DRP IE matches the reservation parameters
192 *
193 * DRP reservations are uniquely identified by the owner, target and
194 * stream index. However, when using a DevAddr as a target (e.g., for
195 * a WUSB cluster reservation) the responses may be received from
196 * devices with different DevAddrs. In this case, reservations are
197 * uniquely identified by just the stream index. A number of stream
198 * indexes (UWB_NUM_GLOBAL_STREAMS) are reserved for this.
199 */
200struct uwb_rsv {
201 struct uwb_rc *rc;
202 struct list_head rc_node;
203 struct list_head pal_node;
204
205 struct uwb_dev *owner;
206 struct uwb_rsv_target target;
207 enum uwb_drp_type type;
208 int max_mas;
209 int min_mas;
210 int sparsity;
211 bool is_multicast;
212
213 uwb_rsv_cb_f callback;
214 void *pal_priv;
215
216 enum uwb_rsv_state state;
217 u8 stream;
218 struct uwb_mas_bm mas;
219 struct uwb_ie_drp *drp_ie;
220 bool ie_valid;
221 struct timer_list timer;
222 bool expired;
223};
224
225static const
226struct uwb_mas_bm uwb_mas_bm_zero = { .bm = { 0 } };
227
228static inline void uwb_mas_bm_copy_le(void *dst, const struct uwb_mas_bm *mas)
229{
230 bitmap_copy_le(dst, mas->bm, UWB_NUM_MAS);
231}
232
233/**
234 * struct uwb_drp_avail - a radio controller's view of MAS usage
235 * @global: MAS unused by neighbors (excluding reservations targetted
236 * or owned by the local radio controller) or the beaon period
237 * @local: MAS unused by local established reservations
238 * @pending: MAS unused by local pending reservations
239 * @ie: DRP Availability IE to be included in the beacon
240 * @ie_valid: true iff @ie is valid and does not need to regenerated from
241 * @global and @local
242 *
243 * Each radio controller maintains a view of MAS usage or
244 * availability. MAS available for a new reservation are determined
245 * from the intersection of @global, @local, and @pending.
246 *
247 * The radio controller must transmit a DRP Availability IE that's the
248 * intersection of @global and @local.
249 *
250 * A set bit indicates the MAS is unused and available.
251 *
252 * rc->rsvs_mutex should be held before accessing this data structure.
253 *
254 * [ECMA-368] section 17.4.3.
255 */
256struct uwb_drp_avail {
257 DECLARE_BITMAP(global, UWB_NUM_MAS);
258 DECLARE_BITMAP(local, UWB_NUM_MAS);
259 DECLARE_BITMAP(pending, UWB_NUM_MAS);
260 struct uwb_ie_drp_avail ie;
261 bool ie_valid;
262};
263
264
265const char *uwb_rsv_state_str(enum uwb_rsv_state state);
266const char *uwb_rsv_type_str(enum uwb_drp_type type);
267
268struct uwb_rsv *uwb_rsv_create(struct uwb_rc *rc, uwb_rsv_cb_f cb,
269 void *pal_priv);
270void uwb_rsv_destroy(struct uwb_rsv *rsv);
271
272int uwb_rsv_establish(struct uwb_rsv *rsv);
273int uwb_rsv_modify(struct uwb_rsv *rsv,
274 int max_mas, int min_mas, int sparsity);
275void uwb_rsv_terminate(struct uwb_rsv *rsv);
276
277void uwb_rsv_accept(struct uwb_rsv *rsv, uwb_rsv_cb_f cb, void *pal_priv);
278
279/**
280 * Radio Control Interface instance
281 *
282 *
283 * Life cycle rules: those of the UWB Device.
284 *
285 * @index: an index number for this radio controller, as used in the
286 * device name.
287 * @version: version of protocol supported by this device
288 * @priv: Backend implementation; rw with uwb_dev.dev.sem taken.
289 * @cmd: Backend implementation to execute commands; rw and call
290 * only with uwb_dev.dev.sem taken.
291 * @reset: Hardware reset of radio controller and any PAL controllers.
292 * @filter: Backend implementation to manipulate data to and from device
293 * to be compliant to specification assumed by driver (WHCI
294 * 0.95).
295 *
296 * uwb_dev.dev.mutex is used to execute commands and update
297 * the corresponding structures; can't use a spinlock
298 * because rc->cmd() can sleep.
299 * @ies: This is a dynamically allocated array cacheing the
300 * IEs (settable by the host) that the beacon of this
301 * radio controller is currently sending.
302 *
303 * In reality, we store here the full command we set to
304 * the radio controller (which is basically a command
305 * prefix followed by all the IEs the beacon currently
306 * contains). This way we don't have to realloc and
307 * memcpy when setting it.
308 *
309 * We set this up in uwb_rc_ie_setup(), where we alloc
310 * this struct, call get_ie() [so we know which IEs are
311 * currently being sent, if any].
312 *
313 * @ies_capacity:Amount of space (in bytes) allocated in @ies. The
314 * amount used is given by sizeof(*ies) plus ies->wIELength
315 * (which is a little endian quantity all the time).
316 * @ies_mutex: protect the IE cache
317 * @dbg: information for the debug interface
318 */
319struct uwb_rc {
320 struct uwb_dev uwb_dev;
321 int index;
322 u16 version;
323
324 struct module *owner;
325 void *priv;
326 int (*start)(struct uwb_rc *rc);
327 void (*stop)(struct uwb_rc *rc);
328 int (*cmd)(struct uwb_rc *, const struct uwb_rccb *, size_t);
329 int (*reset)(struct uwb_rc *rc);
330 int (*filter_cmd)(struct uwb_rc *, struct uwb_rccb **, size_t *);
331 int (*filter_event)(struct uwb_rc *, struct uwb_rceb **, const size_t,
332 size_t *, size_t *);
333
334 spinlock_t neh_lock; /* protects neh_* and ctx_* */
335 struct list_head neh_list; /* Open NE handles */
336 unsigned long ctx_bm[UWB_RC_CTX_MAX / 8 / sizeof(unsigned long)];
337 u8 ctx_roll;
338
339 int beaconing; /* Beaconing state [channel number] */
340 int scanning;
341 enum uwb_scan_type scan_type:3;
342 unsigned ready:1;
343 struct uwb_notifs_chain notifs_chain;
344
345 struct uwb_drp_avail drp_avail;
346 struct list_head reservations;
347 struct mutex rsvs_mutex;
348 struct workqueue_struct *rsv_workq;
349 struct work_struct rsv_update_work;
350
351 struct mutex ies_mutex;
352 struct uwb_rc_cmd_set_ie *ies;
353 size_t ies_capacity;
354
355 spinlock_t pal_lock;
356 struct list_head pals;
357
358 struct uwb_dbg *dbg;
359};
360
361
362/**
363 * struct uwb_pal - a UWB PAL
364 * @name: descriptive name for this PAL (wushc, wlp, etc.).
365 * @device: a device for the PAL. Used to link the PAL and the radio
366 * controller in sysfs.
367 * @new_rsv: called when a peer requests a reservation (may be NULL if
368 * the PAL cannot accept reservation requests).
369 *
370 * A Protocol Adaptation Layer (PAL) is a user of the WiMedia UWB
371 * radio platform (e.g., WUSB, WLP or Bluetooth UWB AMP).
372 *
373 * The PALs using a radio controller must register themselves to
374 * permit the UWB stack to coordinate usage of the radio between the
375 * various PALs or to allow PALs to response to certain requests from
376 * peers.
377 *
378 * A struct uwb_pal should be embedded in a containing structure
379 * belonging to the PAL and initialized with uwb_pal_init()). Fields
380 * should be set appropriately by the PAL before registering the PAL
381 * with uwb_pal_register().
382 */
383struct uwb_pal {
384 struct list_head node;
385 const char *name;
386 struct device *device;
387 void (*new_rsv)(struct uwb_rsv *rsv);
388};
389
390void uwb_pal_init(struct uwb_pal *pal);
391int uwb_pal_register(struct uwb_rc *rc, struct uwb_pal *pal);
392void uwb_pal_unregister(struct uwb_rc *rc, struct uwb_pal *pal);
393
394/*
395 * General public API
396 *
397 * This API can be used by UWB device drivers or by those implementing
398 * UWB Radio Controllers
399 */
400struct uwb_dev *uwb_dev_get_by_devaddr(struct uwb_rc *rc,
401 const struct uwb_dev_addr *devaddr);
402struct uwb_dev *uwb_dev_get_by_rc(struct uwb_dev *, struct uwb_rc *);
403static inline void uwb_dev_get(struct uwb_dev *uwb_dev)
404{
405 get_device(&uwb_dev->dev);
406}
407static inline void uwb_dev_put(struct uwb_dev *uwb_dev)
408{
409 put_device(&uwb_dev->dev);
410}
411struct uwb_dev *uwb_dev_try_get(struct uwb_rc *rc, struct uwb_dev *uwb_dev);
412
413/**
414 * Callback function for 'uwb_{dev,rc}_foreach()'.
415 *
416 * @dev: Linux device instance
417 * 'uwb_dev = container_of(dev, struct uwb_dev, dev)'
418 * @priv: Data passed by the caller to 'uwb_{dev,rc}_foreach()'.
419 *
420 * @returns: 0 to continue the iterations, any other val to stop
421 * iterating and return the value to the caller of
422 * _foreach().
423 */
424typedef int (*uwb_dev_for_each_f)(struct device *dev, void *priv);
425int uwb_dev_for_each(struct uwb_rc *rc, uwb_dev_for_each_f func, void *priv);
426
427struct uwb_rc *uwb_rc_alloc(void);
428struct uwb_rc *uwb_rc_get_by_dev(const struct uwb_dev_addr *);
429struct uwb_rc *uwb_rc_get_by_grandpa(const struct device *);
430void uwb_rc_put(struct uwb_rc *rc);
431
432typedef void (*uwb_rc_cmd_cb_f)(struct uwb_rc *rc, void *arg,
433 struct uwb_rceb *reply, ssize_t reply_size);
434
435int uwb_rc_cmd_async(struct uwb_rc *rc, const char *cmd_name,
436 struct uwb_rccb *cmd, size_t cmd_size,
437 u8 expected_type, u16 expected_event,
438 uwb_rc_cmd_cb_f cb, void *arg);
439ssize_t uwb_rc_cmd(struct uwb_rc *rc, const char *cmd_name,
440 struct uwb_rccb *cmd, size_t cmd_size,
441 struct uwb_rceb *reply, size_t reply_size);
442ssize_t uwb_rc_vcmd(struct uwb_rc *rc, const char *cmd_name,
443 struct uwb_rccb *cmd, size_t cmd_size,
444 u8 expected_type, u16 expected_event,
445 struct uwb_rceb **preply);
446ssize_t uwb_rc_get_ie(struct uwb_rc *, struct uwb_rc_evt_get_ie **);
447int uwb_bg_joined(struct uwb_rc *rc);
448
449size_t __uwb_addr_print(char *, size_t, const unsigned char *, int);
450
451int uwb_rc_dev_addr_set(struct uwb_rc *, const struct uwb_dev_addr *);
452int uwb_rc_dev_addr_get(struct uwb_rc *, struct uwb_dev_addr *);
453int uwb_rc_mac_addr_set(struct uwb_rc *, const struct uwb_mac_addr *);
454int uwb_rc_mac_addr_get(struct uwb_rc *, struct uwb_mac_addr *);
455int __uwb_mac_addr_assigned_check(struct device *, void *);
456int __uwb_dev_addr_assigned_check(struct device *, void *);
457
458/* Print in @buf a pretty repr of @addr */
459static inline size_t uwb_dev_addr_print(char *buf, size_t buf_size,
460 const struct uwb_dev_addr *addr)
461{
462 return __uwb_addr_print(buf, buf_size, addr->data, 0);
463}
464
465/* Print in @buf a pretty repr of @addr */
466static inline size_t uwb_mac_addr_print(char *buf, size_t buf_size,
467 const struct uwb_mac_addr *addr)
468{
469 return __uwb_addr_print(buf, buf_size, addr->data, 1);
470}
471
472/* @returns 0 if device addresses @addr2 and @addr1 are equal */
473static inline int uwb_dev_addr_cmp(const struct uwb_dev_addr *addr1,
474 const struct uwb_dev_addr *addr2)
475{
476 return memcmp(addr1, addr2, sizeof(*addr1));
477}
478
479/* @returns 0 if MAC addresses @addr2 and @addr1 are equal */
480static inline int uwb_mac_addr_cmp(const struct uwb_mac_addr *addr1,
481 const struct uwb_mac_addr *addr2)
482{
483 return memcmp(addr1, addr2, sizeof(*addr1));
484}
485
486/* @returns !0 if a MAC @addr is a broadcast address */
487static inline int uwb_mac_addr_bcast(const struct uwb_mac_addr *addr)
488{
489 struct uwb_mac_addr bcast = {
490 .data = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }
491 };
492 return !uwb_mac_addr_cmp(addr, &bcast);
493}
494
495/* @returns !0 if a MAC @addr is all zeroes*/
496static inline int uwb_mac_addr_unset(const struct uwb_mac_addr *addr)
497{
498 struct uwb_mac_addr unset = {
499 .data = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
500 };
501 return !uwb_mac_addr_cmp(addr, &unset);
502}
503
504/* @returns !0 if the address is in use. */
505static inline unsigned __uwb_dev_addr_assigned(struct uwb_rc *rc,
506 struct uwb_dev_addr *addr)
507{
508 return uwb_dev_for_each(rc, __uwb_dev_addr_assigned_check, addr);
509}
510
511/*
512 * UWB Radio Controller API
513 *
514 * This API is used (in addition to the general API) to implement UWB
515 * Radio Controllers.
516 */
517void uwb_rc_init(struct uwb_rc *);
518int uwb_rc_add(struct uwb_rc *, struct device *dev, void *rc_priv);
519void uwb_rc_rm(struct uwb_rc *);
520void uwb_rc_neh_grok(struct uwb_rc *, void *, size_t);
521void uwb_rc_neh_error(struct uwb_rc *, int);
522void uwb_rc_reset_all(struct uwb_rc *rc);
523
524/**
525 * uwb_rsv_is_owner - is the owner of this reservation the RC?
526 * @rsv: the reservation
527 */
528static inline bool uwb_rsv_is_owner(struct uwb_rsv *rsv)
529{
530 return rsv->owner == &rsv->rc->uwb_dev;
531}
532
533/**
534 * Events generated by UWB that can be passed to any listeners
535 *
536 * Higher layers can register callback functions with the radio
537 * controller using uwb_notifs_register(). The radio controller
538 * maintains a list of all registered handlers and will notify all
539 * nodes when an event occurs.
540 */
541enum uwb_notifs {
542 UWB_NOTIF_BG_JOIN = 0, /* radio controller joined a beacon group */
543 UWB_NOTIF_BG_LEAVE = 1, /* radio controller left a beacon group */
544 UWB_NOTIF_ONAIR,
545 UWB_NOTIF_OFFAIR,
546};
547
548/* Callback function registered with UWB */
549struct uwb_notifs_handler {
550 struct list_head list_node;
551 void (*cb)(void *, struct uwb_dev *, enum uwb_notifs);
552 void *data;
553};
554
555int uwb_notifs_register(struct uwb_rc *, struct uwb_notifs_handler *);
556int uwb_notifs_deregister(struct uwb_rc *, struct uwb_notifs_handler *);
557
558
559/**
560 * UWB radio controller Event Size Entry (for creating entry tables)
561 *
562 * WUSB and WHCI define events and notifications, and they might have
563 * fixed or variable size.
564 *
565 * Each event/notification has a size which is not necessarily known
566 * in advance based on the event code. As well, vendor specific
567 * events/notifications will have a size impossible to determine
568 * unless we know about the device's specific details.
569 *
570 * It was way too smart of the spec writers not to think that it would
571 * be impossible for a generic driver to skip over vendor specific
572 * events/notifications if there are no LENGTH fields in the HEADER of
573 * each message...the transaction size cannot be counted on as the
574 * spec does not forbid to pack more than one event in a single
575 * transaction.
576 *
577 * Thus, we guess sizes with tables (or for events, when you know the
578 * size ahead of time you can use uwb_rc_neh_extra_size*()). We
579 * register tables with the known events and their sizes, and then we
580 * traverse those tables. For those with variable length, we provide a
581 * way to lookup the size inside the event/notification's
582 * payload. This allows device-specific event size tables to be
583 * registered.
584 *
585 * @size: Size of the payload
586 *
587 * @offset: if != 0, at offset @offset-1 starts a field with a length
588 * that has to be added to @size. The format of the field is
589 * given by @type.
590 *
591 * @type: Type and length of the offset field. Most common is LE 16
592 * bits (that's why that is zero); others are there mostly to
593 * cover for bugs and weirdos.
594 */
595struct uwb_est_entry {
596 size_t size;
597 unsigned offset;
598 enum { UWB_EST_16 = 0, UWB_EST_8 = 1 } type;
599};
600
601int uwb_est_register(u8 type, u8 code_high, u16 vendor, u16 product,
602 const struct uwb_est_entry *, size_t entries);
603int uwb_est_unregister(u8 type, u8 code_high, u16 vendor, u16 product,
604 const struct uwb_est_entry *, size_t entries);
605ssize_t uwb_est_find_size(struct uwb_rc *rc, const struct uwb_rceb *rceb,
606 size_t len);
607
608/* -- Misc */
609
610enum {
611 EDC_MAX_ERRORS = 10,
612 EDC_ERROR_TIMEFRAME = HZ,
613};
614
615/* error density counter */
616struct edc {
617 unsigned long timestart;
618 u16 errorcount;
619};
620
621static inline
622void edc_init(struct edc *edc)
623{
624 edc->timestart = jiffies;
625}
626
627/* Called when an error occured.
628 * This is way to determine if the number of acceptable errors per time
629 * period has been exceeded. It is not accurate as there are cases in which
630 * this scheme will not work, for example if there are periodic occurences
631 * of errors that straddle updates to the start time. This scheme is
632 * sufficient for our usage.
633 *
634 * @returns 1 if maximum acceptable errors per timeframe has been exceeded.
635 */
636static inline int edc_inc(struct edc *err_hist, u16 max_err, u16 timeframe)
637{
638 unsigned long now;
639
640 now = jiffies;
641 if (now - err_hist->timestart > timeframe) {
642 err_hist->errorcount = 1;
643 err_hist->timestart = now;
644 } else if (++err_hist->errorcount > max_err) {
645 err_hist->errorcount = 0;
646 err_hist->timestart = now;
647 return 1;
648 }
649 return 0;
650}
651
652
653/* Information Element handling */
654
655/* For representing the state of writing to a buffer when iterating */
656struct uwb_buf_ctx {
657 char *buf;
658 size_t bytes, size;
659};
660
661typedef int (*uwb_ie_f)(struct uwb_dev *, const struct uwb_ie_hdr *,
662 size_t, void *);
663struct uwb_ie_hdr *uwb_ie_next(void **ptr, size_t *len);
664ssize_t uwb_ie_for_each(struct uwb_dev *uwb_dev, uwb_ie_f fn, void *data,
665 const void *buf, size_t size);
666int uwb_ie_dump_hex(struct uwb_dev *, const struct uwb_ie_hdr *,
667 size_t, void *);
668int uwb_rc_set_ie(struct uwb_rc *, struct uwb_rc_cmd_set_ie *);
669struct uwb_ie_hdr *uwb_ie_next(void **ptr, size_t *len);
670
671
672/*
673 * Transmission statistics
674 *
675 * UWB uses LQI and RSSI (one byte values) for reporting radio signal
676 * strength and line quality indication. We do quick and dirty
677 * averages of those. They are signed values, btw.
678 *
679 * For 8 bit quantities, we keep the min, the max, an accumulator
680 * (@sigma) and a # of samples. When @samples gets to 255, we compute
681 * the average (@sigma / @samples), place it in @sigma and reset
682 * @samples to 1 (so we use it as the first sample).
683 *
684 * Now, statistically speaking, probably I am kicking the kidneys of
685 * some books I have in my shelves collecting dust, but I just want to
686 * get an approx, not the Nobel.
687 *
688 * LOCKING: there is no locking per se, but we try to keep a lockless
689 * schema. Only _add_samples() modifies the values--as long as you
690 * have other locking on top that makes sure that no two calls of
691 * _add_sample() happen at the same time, then we are fine. Now, for
692 * resetting the values we just set @samples to 0 and that makes the
693 * next _add_sample() to start with defaults. Reading the values in
694 * _show() currently can race, so you need to make sure the calls are
695 * under the same lock that protects calls to _add_sample(). FIXME:
696 * currently unlocked (It is not ultraprecise but does the trick. Bite
697 * me).
698 */
699struct stats {
700 s8 min, max;
701 s16 sigma;
702 atomic_t samples;
703};
704
705static inline
706void stats_init(struct stats *stats)
707{
708 atomic_set(&stats->samples, 0);
709 wmb();
710}
711
712static inline
713void stats_add_sample(struct stats *stats, s8 sample)
714{
715 s8 min, max;
716 s16 sigma;
717 unsigned samples = atomic_read(&stats->samples);
718 if (samples == 0) { /* it was zero before, so we initialize */
719 min = 127;
720 max = -128;
721 sigma = 0;
722 } else {
723 min = stats->min;
724 max = stats->max;
725 sigma = stats->sigma;
726 }
727
728 if (sample < min) /* compute new values */
729 min = sample;
730 else if (sample > max)
731 max = sample;
732 sigma += sample;
733
734 stats->min = min; /* commit */
735 stats->max = max;
736 stats->sigma = sigma;
737 if (atomic_add_return(1, &stats->samples) > 255) {
738 /* wrapped around! reset */
739 stats->sigma = sigma / 256;
740 atomic_set(&stats->samples, 1);
741 }
742}
743
744static inline ssize_t stats_show(struct stats *stats, char *buf)
745{
746 int min, max, avg;
747 int samples = atomic_read(&stats->samples);
748 if (samples == 0)
749 min = max = avg = 0;
750 else {
751 min = stats->min;
752 max = stats->max;
753 avg = stats->sigma / samples;
754 }
755 return scnprintf(buf, PAGE_SIZE, "%d %d %d\n", min, max, avg);
756}
757
758static inline ssize_t stats_store(struct stats *stats, const char *buf,
759 size_t size)
760{
761 stats_init(stats);
762 return size;
763}
764
765#endif /* #ifndef __LINUX__UWB_H__ */
diff --git a/include/linux/uwb/debug-cmd.h b/include/linux/uwb/debug-cmd.h
new file mode 100644
index 000000000000..1141f41bab5c
--- /dev/null
+++ b/include/linux/uwb/debug-cmd.h
@@ -0,0 +1,57 @@
1/*
2 * Ultra Wide Band
3 * Debug interface commands
4 *
5 * Copyright (C) 2008 Cambridge Silicon Radio Ltd.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19#ifndef __LINUX__UWB__DEBUG_CMD_H__
20#define __LINUX__UWB__DEBUG_CMD_H__
21
22#include <linux/types.h>
23
24/*
25 * Debug interface commands
26 *
27 * UWB_DBG_CMD_RSV_ESTABLISH: Establish a new unicast reservation.
28 *
29 * UWB_DBG_CMD_RSV_TERMINATE: Terminate the Nth reservation.
30 */
31
32enum uwb_dbg_cmd_type {
33 UWB_DBG_CMD_RSV_ESTABLISH = 1,
34 UWB_DBG_CMD_RSV_TERMINATE = 2,
35};
36
37struct uwb_dbg_cmd_rsv_establish {
38 __u8 target[6];
39 __u8 type;
40 __u16 max_mas;
41 __u16 min_mas;
42 __u8 sparsity;
43};
44
45struct uwb_dbg_cmd_rsv_terminate {
46 int index;
47};
48
49struct uwb_dbg_cmd {
50 __u32 type;
51 union {
52 struct uwb_dbg_cmd_rsv_establish rsv_establish;
53 struct uwb_dbg_cmd_rsv_terminate rsv_terminate;
54 };
55};
56
57#endif /* #ifndef __LINUX__UWB__DEBUG_CMD_H__ */
diff --git a/include/linux/uwb/debug.h b/include/linux/uwb/debug.h
new file mode 100644
index 000000000000..a86a73fe303f
--- /dev/null
+++ b/include/linux/uwb/debug.h
@@ -0,0 +1,82 @@
1/*
2 * Ultra Wide Band
3 * Debug Support
4 *
5 * Copyright (C) 2005-2006 Intel Corporation
6 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 *
23 * FIXME: doc
24 * Invoke like:
25 *
26 * #define D_LOCAL 4
27 * #include <linux/uwb/debug.h>
28 *
29 * At the end of your include files.
30 */
31#include <linux/types.h>
32
33struct device;
34extern void dump_bytes(struct device *dev, const void *_buf, size_t rsize);
35
36/* Master debug switch; !0 enables, 0 disables */
37#define D_MASTER (!0)
38
39/* Local (per-file) debug switch; #define before #including */
40#ifndef D_LOCAL
41#define D_LOCAL 0
42#endif
43
44#undef __d_printf
45#undef d_fnstart
46#undef d_fnend
47#undef d_printf
48#undef d_dump
49
50#define __d_printf(l, _tag, _dev, f, a...) \
51do { \
52 struct device *__dev = (_dev); \
53 if (D_MASTER && D_LOCAL >= (l)) { \
54 char __head[64] = ""; \
55 if (_dev != NULL) { \
56 if ((unsigned long)__dev < 4096) \
57 printk(KERN_ERR "E: Corrupt dev %p\n", \
58 __dev); \
59 else \
60 snprintf(__head, sizeof(__head), \
61 "%s %s: ", \
62 dev_driver_string(__dev), \
63 __dev->bus_id); \
64 } \
65 printk(KERN_ERR "%s%s" _tag ": " f, __head, \
66 __func__, ## a); \
67 } \
68} while (0 && _dev)
69
70#define d_fnstart(l, _dev, f, a...) \
71 __d_printf(l, " FNSTART", _dev, f, ## a)
72#define d_fnend(l, _dev, f, a...) \
73 __d_printf(l, " FNEND", _dev, f, ## a)
74#define d_printf(l, _dev, f, a...) \
75 __d_printf(l, "", _dev, f, ## a)
76#define d_dump(l, _dev, ptr, size) \
77do { \
78 struct device *__dev = _dev; \
79 if (D_MASTER && D_LOCAL >= (l)) \
80 dump_bytes(__dev, ptr, size); \
81} while (0 && _dev)
82#define d_test(l) (D_MASTER && D_LOCAL >= (l))
diff --git a/include/linux/uwb/spec.h b/include/linux/uwb/spec.h
new file mode 100644
index 000000000000..198c15f8e251
--- /dev/null
+++ b/include/linux/uwb/spec.h
@@ -0,0 +1,727 @@
1/*
2 * Ultra Wide Band
3 * UWB Standard definitions
4 *
5 * Copyright (C) 2005-2006 Intel Corporation
6 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA.
21 *
22 *
23 * All these definitions are based on the ECMA-368 standard.
24 *
25 * Note all definitions are Little Endian in the wire, and we will
26 * convert them to host order before operating on the bitfields (that
27 * yes, we use extensively).
28 */
29
30#ifndef __LINUX__UWB_SPEC_H__
31#define __LINUX__UWB_SPEC_H__
32
33#include <linux/types.h>
34#include <linux/bitmap.h>
35
36#define i1480_FW 0x00000303
37/* #define i1480_FW 0x00000302 */
38
39/**
40 * Number of Medium Access Slots in a superframe.
41 *
42 * UWB divides time in SuperFrames, each one divided in 256 pieces, or
43 * Medium Access Slots. See MBOA MAC[5.4.5] for details. The MAS is the
44 * basic bandwidth allocation unit in UWB.
45 */
46enum { UWB_NUM_MAS = 256 };
47
48/**
49 * Number of Zones in superframe.
50 *
51 * UWB divides the superframe into zones with numbering starting from BPST.
52 * See MBOA MAC[16.8.6]
53 */
54enum { UWB_NUM_ZONES = 16 };
55
56/*
57 * Number of MAS in a zone.
58 */
59#define UWB_MAS_PER_ZONE (UWB_NUM_MAS / UWB_NUM_ZONES)
60
61/*
62 * Number of streams per DRP reservation between a pair of devices.
63 *
64 * [ECMA-368] section 16.8.6.
65 */
66enum { UWB_NUM_STREAMS = 8 };
67
68/*
69 * mMasLength
70 *
71 * The length of a MAS in microseconds.
72 *
73 * [ECMA-368] section 17.16.
74 */
75enum { UWB_MAS_LENGTH_US = 256 };
76
77/*
78 * mBeaconSlotLength
79 *
80 * The length of the beacon slot in microseconds.
81 *
82 * [ECMA-368] section 17.16
83 */
84enum { UWB_BEACON_SLOT_LENGTH_US = 85 };
85
86/*
87 * mMaxLostBeacons
88 *
89 * The number beacons missing in consecutive superframes before a
90 * device can be considered as unreachable.
91 *
92 * [ECMA-368] section 17.16
93 */
94enum { UWB_MAX_LOST_BEACONS = 3 };
95
96/*
97 * Length of a superframe in microseconds.
98 */
99#define UWB_SUPERFRAME_LENGTH_US (UWB_MAS_LENGTH_US * UWB_NUM_MAS)
100
101/**
102 * UWB MAC address
103 *
104 * It is *imperative* that this struct is exactly 6 packed bytes (as
105 * it is also used to define headers sent down and up the wire/radio).
106 */
107struct uwb_mac_addr {
108 u8 data[6];
109} __attribute__((packed));
110
111
112/**
113 * UWB device address
114 *
115 * It is *imperative* that this struct is exactly 6 packed bytes (as
116 * it is also used to define headers sent down and up the wire/radio).
117 */
118struct uwb_dev_addr {
119 u8 data[2];
120} __attribute__((packed));
121
122
123/**
124 * Types of UWB addresses
125 *
126 * Order matters (by size).
127 */
128enum uwb_addr_type {
129 UWB_ADDR_DEV = 0,
130 UWB_ADDR_MAC = 1,
131};
132
133
134/** Size of a char buffer for printing a MAC/device address */
135enum { UWB_ADDR_STRSIZE = 32 };
136
137
138/** UWB WiMedia protocol IDs. */
139enum uwb_prid {
140 UWB_PRID_WLP_RESERVED = 0x0000,
141 UWB_PRID_WLP = 0x0001,
142 UWB_PRID_WUSB_BOT = 0x0010,
143 UWB_PRID_WUSB = 0x0010,
144 UWB_PRID_WUSB_TOP = 0x001F,
145};
146
147
148/** PHY Rate (MBOA MAC[7.8.12, Table 61]) */
149enum uwb_phy_rate {
150 UWB_PHY_RATE_53 = 0,
151 UWB_PHY_RATE_80,
152 UWB_PHY_RATE_106,
153 UWB_PHY_RATE_160,
154 UWB_PHY_RATE_200,
155 UWB_PHY_RATE_320,
156 UWB_PHY_RATE_400,
157 UWB_PHY_RATE_480,
158 UWB_PHY_RATE_INVALID
159};
160
161
162/**
163 * Different ways to scan (MBOA MAC[6.2.2, Table 8], WUSB[Table 8-78])
164 */
165enum uwb_scan_type {
166 UWB_SCAN_ONLY = 0,
167 UWB_SCAN_OUTSIDE_BP,
168 UWB_SCAN_WHILE_INACTIVE,
169 UWB_SCAN_DISABLED,
170 UWB_SCAN_ONLY_STARTTIME,
171 UWB_SCAN_TOP
172};
173
174
175/** ACK Policy types (MBOA MAC[7.2.1.3]) */
176enum uwb_ack_pol {
177 UWB_ACK_NO = 0,
178 UWB_ACK_INM = 1,
179 UWB_ACK_B = 2,
180 UWB_ACK_B_REQ = 3,
181};
182
183
184/** DRP reservation types ([ECMA-368 table 106) */
185enum uwb_drp_type {
186 UWB_DRP_TYPE_ALIEN_BP = 0,
187 UWB_DRP_TYPE_HARD,
188 UWB_DRP_TYPE_SOFT,
189 UWB_DRP_TYPE_PRIVATE,
190 UWB_DRP_TYPE_PCA,
191};
192
193
194/** DRP Reason Codes ([ECMA-368] table 107) */
195enum uwb_drp_reason {
196 UWB_DRP_REASON_ACCEPTED = 0,
197 UWB_DRP_REASON_CONFLICT,
198 UWB_DRP_REASON_PENDING,
199 UWB_DRP_REASON_DENIED,
200 UWB_DRP_REASON_MODIFIED,
201};
202
203/**
204 * DRP Notification Reason Codes (WHCI 0.95 [3.1.4.9])
205 */
206enum uwb_drp_notif_reason {
207 UWB_DRP_NOTIF_DRP_IE_RCVD = 0,
208 UWB_DRP_NOTIF_CONFLICT,
209 UWB_DRP_NOTIF_TERMINATE,
210};
211
212
213/** Allocation of MAS slots in a DRP request MBOA MAC[7.8.7] */
214struct uwb_drp_alloc {
215 __le16 zone_bm;
216 __le16 mas_bm;
217} __attribute__((packed));
218
219
220/** General MAC Header format (ECMA-368[16.2]) */
221struct uwb_mac_frame_hdr {
222 __le16 Frame_Control;
223 struct uwb_dev_addr DestAddr;
224 struct uwb_dev_addr SrcAddr;
225 __le16 Sequence_Control;
226 __le16 Access_Information;
227} __attribute__((packed));
228
229
230/**
231 * uwb_beacon_frame - a beacon frame including MAC headers
232 *
233 * [ECMA] section 16.3.
234 */
235struct uwb_beacon_frame {
236 struct uwb_mac_frame_hdr hdr;
237 struct uwb_mac_addr Device_Identifier; /* may be a NULL EUI-48 */
238 u8 Beacon_Slot_Number;
239 u8 Device_Control;
240 u8 IEData[];
241} __attribute__((packed));
242
243
244/** Information Element codes (MBOA MAC[T54]) */
245enum uwb_ie {
246 UWB_PCA_AVAILABILITY = 2,
247 UWB_IE_DRP_AVAILABILITY = 8,
248 UWB_IE_DRP = 9,
249 UWB_BP_SWITCH_IE = 11,
250 UWB_MAC_CAPABILITIES_IE = 12,
251 UWB_PHY_CAPABILITIES_IE = 13,
252 UWB_APP_SPEC_PROBE_IE = 15,
253 UWB_IDENTIFICATION_IE = 19,
254 UWB_MASTER_KEY_ID_IE = 20,
255 UWB_IE_WLP = 250, /* WiMedia Logical Link Control Protocol WLP 0.99 */
256 UWB_APP_SPEC_IE = 255,
257};
258
259
260/**
261 * Header common to all Information Elements (IEs)
262 */
263struct uwb_ie_hdr {
264 u8 element_id; /* enum uwb_ie */
265 u8 length;
266} __attribute__((packed));
267
268
269/** Dynamic Reservation Protocol IE (MBOA MAC[7.8.6]) */
270struct uwb_ie_drp {
271 struct uwb_ie_hdr hdr;
272 __le16 drp_control;
273 struct uwb_dev_addr dev_addr;
274 struct uwb_drp_alloc allocs[];
275} __attribute__((packed));
276
277static inline int uwb_ie_drp_type(struct uwb_ie_drp *ie)
278{
279 return (le16_to_cpu(ie->drp_control) >> 0) & 0x7;
280}
281
282static inline int uwb_ie_drp_stream_index(struct uwb_ie_drp *ie)
283{
284 return (le16_to_cpu(ie->drp_control) >> 3) & 0x7;
285}
286
287static inline int uwb_ie_drp_reason_code(struct uwb_ie_drp *ie)
288{
289 return (le16_to_cpu(ie->drp_control) >> 6) & 0x7;
290}
291
292static inline int uwb_ie_drp_status(struct uwb_ie_drp *ie)
293{
294 return (le16_to_cpu(ie->drp_control) >> 9) & 0x1;
295}
296
297static inline int uwb_ie_drp_owner(struct uwb_ie_drp *ie)
298{
299 return (le16_to_cpu(ie->drp_control) >> 10) & 0x1;
300}
301
302static inline int uwb_ie_drp_tiebreaker(struct uwb_ie_drp *ie)
303{
304 return (le16_to_cpu(ie->drp_control) >> 11) & 0x1;
305}
306
307static inline int uwb_ie_drp_unsafe(struct uwb_ie_drp *ie)
308{
309 return (le16_to_cpu(ie->drp_control) >> 12) & 0x1;
310}
311
312static inline void uwb_ie_drp_set_type(struct uwb_ie_drp *ie, enum uwb_drp_type type)
313{
314 u16 drp_control = le16_to_cpu(ie->drp_control);
315 drp_control = (drp_control & ~(0x7 << 0)) | (type << 0);
316 ie->drp_control = cpu_to_le16(drp_control);
317}
318
319static inline void uwb_ie_drp_set_stream_index(struct uwb_ie_drp *ie, int stream_index)
320{
321 u16 drp_control = le16_to_cpu(ie->drp_control);
322 drp_control = (drp_control & ~(0x7 << 3)) | (stream_index << 3);
323 ie->drp_control = cpu_to_le16(drp_control);
324}
325
326static inline void uwb_ie_drp_set_reason_code(struct uwb_ie_drp *ie,
327 enum uwb_drp_reason reason_code)
328{
329 u16 drp_control = le16_to_cpu(ie->drp_control);
330 drp_control = (ie->drp_control & ~(0x7 << 6)) | (reason_code << 6);
331 ie->drp_control = cpu_to_le16(drp_control);
332}
333
334static inline void uwb_ie_drp_set_status(struct uwb_ie_drp *ie, int status)
335{
336 u16 drp_control = le16_to_cpu(ie->drp_control);
337 drp_control = (drp_control & ~(0x1 << 9)) | (status << 9);
338 ie->drp_control = cpu_to_le16(drp_control);
339}
340
341static inline void uwb_ie_drp_set_owner(struct uwb_ie_drp *ie, int owner)
342{
343 u16 drp_control = le16_to_cpu(ie->drp_control);
344 drp_control = (drp_control & ~(0x1 << 10)) | (owner << 10);
345 ie->drp_control = cpu_to_le16(drp_control);
346}
347
348static inline void uwb_ie_drp_set_tiebreaker(struct uwb_ie_drp *ie, int tiebreaker)
349{
350 u16 drp_control = le16_to_cpu(ie->drp_control);
351 drp_control = (drp_control & ~(0x1 << 11)) | (tiebreaker << 11);
352 ie->drp_control = cpu_to_le16(drp_control);
353}
354
355static inline void uwb_ie_drp_set_unsafe(struct uwb_ie_drp *ie, int unsafe)
356{
357 u16 drp_control = le16_to_cpu(ie->drp_control);
358 drp_control = (drp_control & ~(0x1 << 12)) | (unsafe << 12);
359 ie->drp_control = cpu_to_le16(drp_control);
360}
361
362/** Dynamic Reservation Protocol IE (MBOA MAC[7.8.7]) */
363struct uwb_ie_drp_avail {
364 struct uwb_ie_hdr hdr;
365 DECLARE_BITMAP(bmp, UWB_NUM_MAS);
366} __attribute__((packed));
367
368/**
369 * The Vendor ID is set to an OUI that indicates the vendor of the device.
370 * ECMA-368 [16.8.10]
371 */
372struct uwb_vendor_id {
373 u8 data[3];
374} __attribute__((packed));
375
376/**
377 * The device type ID
378 * FIXME: clarify what this means
379 * ECMA-368 [16.8.10]
380 */
381struct uwb_device_type_id {
382 u8 data[3];
383} __attribute__((packed));
384
385
386/**
387 * UWB device information types
388 * ECMA-368 [16.8.10]
389 */
390enum uwb_dev_info_type {
391 UWB_DEV_INFO_VENDOR_ID = 0,
392 UWB_DEV_INFO_VENDOR_TYPE,
393 UWB_DEV_INFO_NAME,
394};
395
396/**
397 * UWB device information found in Identification IE
398 * ECMA-368 [16.8.10]
399 */
400struct uwb_dev_info {
401 u8 type; /* enum uwb_dev_info_type */
402 u8 length;
403 u8 data[];
404} __attribute__((packed));
405
406/**
407 * UWB Identification IE
408 * ECMA-368 [16.8.10]
409 */
410struct uwb_identification_ie {
411 struct uwb_ie_hdr hdr;
412 struct uwb_dev_info info[];
413} __attribute__((packed));
414
415/*
416 * UWB Radio Controller
417 *
418 * These definitions are common to the Radio Control layers as
419 * exported by the WUSB1.0 HWA and WHCI interfaces.
420 */
421
422/** Radio Control Command Block (WUSB1.0[Table 8-65] and WHCI 0.95) */
423struct uwb_rccb {
424 u8 bCommandType; /* enum hwa_cet */
425 __le16 wCommand; /* Command code */
426 u8 bCommandContext; /* Context ID */
427} __attribute__((packed));
428
429
430/** Radio Control Event Block (WUSB[table 8-66], WHCI 0.95) */
431struct uwb_rceb {
432 u8 bEventType; /* enum hwa_cet */
433 __le16 wEvent; /* Event code */
434 u8 bEventContext; /* Context ID */
435} __attribute__((packed));
436
437
438enum {
439 UWB_RC_CET_GENERAL = 0, /* General Command/Event type */
440 UWB_RC_CET_EX_TYPE_1 = 1, /* Extended Type 1 Command/Event type */
441};
442
443/* Commands to the radio controller */
444enum uwb_rc_cmd {
445 UWB_RC_CMD_CHANNEL_CHANGE = 16,
446 UWB_RC_CMD_DEV_ADDR_MGMT = 17, /* Device Address Management */
447 UWB_RC_CMD_GET_IE = 18, /* GET Information Elements */
448 UWB_RC_CMD_RESET = 19,
449 UWB_RC_CMD_SCAN = 20, /* Scan management */
450 UWB_RC_CMD_SET_BEACON_FILTER = 21,
451 UWB_RC_CMD_SET_DRP_IE = 22, /* Dynamic Reservation Protocol IEs */
452 UWB_RC_CMD_SET_IE = 23, /* Information Element management */
453 UWB_RC_CMD_SET_NOTIFICATION_FILTER = 24,
454 UWB_RC_CMD_SET_TX_POWER = 25,
455 UWB_RC_CMD_SLEEP = 26,
456 UWB_RC_CMD_START_BEACON = 27,
457 UWB_RC_CMD_STOP_BEACON = 28,
458 UWB_RC_CMD_BP_MERGE = 29,
459 UWB_RC_CMD_SEND_COMMAND_FRAME = 30,
460 UWB_RC_CMD_SET_ASIE_NOTIF = 31,
461};
462
463/* Notifications from the radio controller */
464enum uwb_rc_evt {
465 UWB_RC_EVT_IE_RCV = 0,
466 UWB_RC_EVT_BEACON = 1,
467 UWB_RC_EVT_BEACON_SIZE = 2,
468 UWB_RC_EVT_BPOIE_CHANGE = 3,
469 UWB_RC_EVT_BP_SLOT_CHANGE = 4,
470 UWB_RC_EVT_BP_SWITCH_IE_RCV = 5,
471 UWB_RC_EVT_DEV_ADDR_CONFLICT = 6,
472 UWB_RC_EVT_DRP_AVAIL = 7,
473 UWB_RC_EVT_DRP = 8,
474 UWB_RC_EVT_BP_SWITCH_STATUS = 9,
475 UWB_RC_EVT_CMD_FRAME_RCV = 10,
476 UWB_RC_EVT_CHANNEL_CHANGE_IE_RCV = 11,
477 /* Events (command responses) use the same code as the command */
478 UWB_RC_EVT_UNKNOWN_CMD_RCV = 65535,
479};
480
481enum uwb_rc_extended_type_1_cmd {
482 UWB_RC_SET_DAA_ENERGY_MASK = 32,
483 UWB_RC_SET_NOTIFICATION_FILTER_EX = 33,
484};
485
486enum uwb_rc_extended_type_1_evt {
487 UWB_RC_DAA_ENERGY_DETECTED = 0,
488};
489
490/* Radio Control Result Code. [WHCI] table 3-3. */
491enum {
492 UWB_RC_RES_SUCCESS = 0,
493 UWB_RC_RES_FAIL,
494 UWB_RC_RES_FAIL_HARDWARE,
495 UWB_RC_RES_FAIL_NO_SLOTS,
496 UWB_RC_RES_FAIL_BEACON_TOO_LARGE,
497 UWB_RC_RES_FAIL_INVALID_PARAMETER,
498 UWB_RC_RES_FAIL_UNSUPPORTED_PWR_LEVEL,
499 UWB_RC_RES_FAIL_INVALID_IE_DATA,
500 UWB_RC_RES_FAIL_BEACON_SIZE_EXCEEDED,
501 UWB_RC_RES_FAIL_CANCELLED,
502 UWB_RC_RES_FAIL_INVALID_STATE,
503 UWB_RC_RES_FAIL_INVALID_SIZE,
504 UWB_RC_RES_FAIL_ACK_NOT_RECEIVED,
505 UWB_RC_RES_FAIL_NO_MORE_ASIE_NOTIF,
506 UWB_RC_RES_FAIL_TIME_OUT = 255,
507};
508
509/* Confirm event. [WHCI] section 3.1.3.1 etc. */
510struct uwb_rc_evt_confirm {
511 struct uwb_rceb rceb;
512 u8 bResultCode;
513} __attribute__((packed));
514
515/* Device Address Management event. [WHCI] section 3.1.3.2. */
516struct uwb_rc_evt_dev_addr_mgmt {
517 struct uwb_rceb rceb;
518 u8 baAddr[6];
519 u8 bResultCode;
520} __attribute__((packed));
521
522
523/* Get IE Event. [WHCI] section 3.1.3.3. */
524struct uwb_rc_evt_get_ie {
525 struct uwb_rceb rceb;
526 __le16 wIELength;
527 u8 IEData[];
528} __attribute__((packed));
529
530/* Set DRP IE Event. [WHCI] section 3.1.3.7. */
531struct uwb_rc_evt_set_drp_ie {
532 struct uwb_rceb rceb;
533 __le16 wRemainingSpace;
534 u8 bResultCode;
535} __attribute__((packed));
536
537/* Set IE Event. [WHCI] section 3.1.3.8. */
538struct uwb_rc_evt_set_ie {
539 struct uwb_rceb rceb;
540 __le16 RemainingSpace;
541 u8 bResultCode;
542} __attribute__((packed));
543
544/* Scan command. [WHCI] 3.1.3.5. */
545struct uwb_rc_cmd_scan {
546 struct uwb_rccb rccb;
547 u8 bChannelNumber;
548 u8 bScanState;
549 __le16 wStartTime;
550} __attribute__((packed));
551
552/* Set DRP IE command. [WHCI] section 3.1.3.7. */
553struct uwb_rc_cmd_set_drp_ie {
554 struct uwb_rccb rccb;
555 __le16 wIELength;
556 struct uwb_ie_drp IEData[];
557} __attribute__((packed));
558
559/* Set IE command. [WHCI] section 3.1.3.8. */
560struct uwb_rc_cmd_set_ie {
561 struct uwb_rccb rccb;
562 __le16 wIELength;
563 u8 IEData[];
564} __attribute__((packed));
565
566/* Set DAA Energy Mask event. [WHCI 0.96] section 3.1.3.17. */
567struct uwb_rc_evt_set_daa_energy_mask {
568 struct uwb_rceb rceb;
569 __le16 wLength;
570 u8 result;
571} __attribute__((packed));
572
573/* Set Notification Filter Extended event. [WHCI 0.96] section 3.1.3.18. */
574struct uwb_rc_evt_set_notification_filter_ex {
575 struct uwb_rceb rceb;
576 __le16 wLength;
577 u8 result;
578} __attribute__((packed));
579
580/* IE Received notification. [WHCI] section 3.1.4.1. */
581struct uwb_rc_evt_ie_rcv {
582 struct uwb_rceb rceb;
583 struct uwb_dev_addr SrcAddr;
584 __le16 wIELength;
585 u8 IEData[];
586} __attribute__((packed));
587
588/* Type of the received beacon. [WHCI] section 3.1.4.2. */
589enum uwb_rc_beacon_type {
590 UWB_RC_BEACON_TYPE_SCAN = 0,
591 UWB_RC_BEACON_TYPE_NEIGHBOR,
592 UWB_RC_BEACON_TYPE_OL_ALIEN,
593 UWB_RC_BEACON_TYPE_NOL_ALIEN,
594};
595
596/* Beacon received notification. [WHCI] 3.1.4.2. */
597struct uwb_rc_evt_beacon {
598 struct uwb_rceb rceb;
599 u8 bChannelNumber;
600 u8 bBeaconType;
601 __le16 wBPSTOffset;
602 u8 bLQI;
603 u8 bRSSI;
604 __le16 wBeaconInfoLength;
605 u8 BeaconInfo[];
606} __attribute__((packed));
607
608
609/* Beacon Size Change notification. [WHCI] section 3.1.4.3 */
610struct uwb_rc_evt_beacon_size {
611 struct uwb_rceb rceb;
612 __le16 wNewBeaconSize;
613} __attribute__((packed));
614
615
616/* BPOIE Change notification. [WHCI] section 3.1.4.4. */
617struct uwb_rc_evt_bpoie_change {
618 struct uwb_rceb rceb;
619 __le16 wBPOIELength;
620 u8 BPOIE[];
621} __attribute__((packed));
622
623
624/* Beacon Slot Change notification. [WHCI] section 3.1.4.5. */
625struct uwb_rc_evt_bp_slot_change {
626 struct uwb_rceb rceb;
627 u8 slot_info;
628} __attribute__((packed));
629
630static inline int uwb_rc_evt_bp_slot_change_slot_num(
631 const struct uwb_rc_evt_bp_slot_change *evt)
632{
633 return evt->slot_info & 0x7f;
634}
635
636static inline int uwb_rc_evt_bp_slot_change_no_slot(
637 const struct uwb_rc_evt_bp_slot_change *evt)
638{
639 return (evt->slot_info & 0x80) >> 7;
640}
641
642/* BP Switch IE Received notification. [WHCI] section 3.1.4.6. */
643struct uwb_rc_evt_bp_switch_ie_rcv {
644 struct uwb_rceb rceb;
645 struct uwb_dev_addr wSrcAddr;
646 __le16 wIELength;
647 u8 IEData[];
648} __attribute__((packed));
649
650/* DevAddr Conflict notification. [WHCI] section 3.1.4.7. */
651struct uwb_rc_evt_dev_addr_conflict {
652 struct uwb_rceb rceb;
653} __attribute__((packed));
654
655/* DRP notification. [WHCI] section 3.1.4.9. */
656struct uwb_rc_evt_drp {
657 struct uwb_rceb rceb;
658 struct uwb_dev_addr src_addr;
659 u8 reason;
660 u8 beacon_slot_number;
661 __le16 ie_length;
662 u8 ie_data[];
663} __attribute__((packed));
664
665static inline enum uwb_drp_notif_reason uwb_rc_evt_drp_reason(struct uwb_rc_evt_drp *evt)
666{
667 return evt->reason & 0x0f;
668}
669
670
671/* DRP Availability Change notification. [WHCI] section 3.1.4.8. */
672struct uwb_rc_evt_drp_avail {
673 struct uwb_rceb rceb;
674 DECLARE_BITMAP(bmp, UWB_NUM_MAS);
675} __attribute__((packed));
676
677/* BP switch status notification. [WHCI] section 3.1.4.10. */
678struct uwb_rc_evt_bp_switch_status {
679 struct uwb_rceb rceb;
680 u8 status;
681 u8 slot_offset;
682 __le16 bpst_offset;
683 u8 move_countdown;
684} __attribute__((packed));
685
686/* Command Frame Received notification. [WHCI] section 3.1.4.11. */
687struct uwb_rc_evt_cmd_frame_rcv {
688 struct uwb_rceb rceb;
689 __le16 receive_time;
690 struct uwb_dev_addr wSrcAddr;
691 struct uwb_dev_addr wDstAddr;
692 __le16 control;
693 __le16 reserved;
694 __le16 dataLength;
695 u8 data[];
696} __attribute__((packed));
697
698/* Channel Change IE Received notification. [WHCI] section 3.1.4.12. */
699struct uwb_rc_evt_channel_change_ie_rcv {
700 struct uwb_rceb rceb;
701 struct uwb_dev_addr wSrcAddr;
702 __le16 wIELength;
703 u8 IEData[];
704} __attribute__((packed));
705
706/* DAA Energy Detected notification. [WHCI 0.96] section 3.1.4.14. */
707struct uwb_rc_evt_daa_energy_detected {
708 struct uwb_rceb rceb;
709 __le16 wLength;
710 u8 bandID;
711 u8 reserved;
712 u8 toneBmp[16];
713} __attribute__((packed));
714
715
716/**
717 * Radio Control Interface Class Descriptor
718 *
719 * WUSB 1.0 [8.6.1.2]
720 */
721struct uwb_rc_control_intf_class_desc {
722 u8 bLength;
723 u8 bDescriptorType;
724 __le16 bcdRCIVersion;
725} __attribute__((packed));
726
727#endif /* #ifndef __LINUX__UWB_SPEC_H__ */
diff --git a/include/linux/uwb/umc.h b/include/linux/uwb/umc.h
new file mode 100644
index 000000000000..36a39e34f8d7
--- /dev/null
+++ b/include/linux/uwb/umc.h
@@ -0,0 +1,194 @@
1/*
2 * UWB Multi-interface Controller support.
3 *
4 * Copyright (C) 2007 Cambridge Silicon Radio Ltd.
5 *
6 * This file is released under the GPLv2
7 *
8 * UMC (UWB Multi-interface Controller) capabilities (e.g., radio
9 * controller, host controller) are presented as devices on the "umc"
10 * bus.
11 *
12 * The radio controller is not strictly a UMC capability but it's
13 * useful to present it as such.
14 *
15 * References:
16 *
17 * [WHCI] Wireless Host Controller Interface Specification for
18 * Certified Wireless Universal Serial Bus, revision 0.95.
19 *
20 * How this works is kind of convoluted but simple. The whci.ko driver
21 * loads when WHCI devices are detected. These WHCI devices expose
22 * many devices in the same PCI function (they couldn't have reused
23 * functions, no), so for each PCI function that exposes these many
24 * devices, whci ceates a umc_dev [whci_probe() -> whci_add_cap()]
25 * with umc_device_create() and adds it to the bus with
26 * umc_device_register().
27 *
28 * umc_device_register() calls device_register() which will push the
29 * bus management code to load your UMC driver's somehting_probe()
30 * that you have registered for that capability code.
31 *
32 * Now when the WHCI device is removed, whci_remove() will go over
33 * each umc_dev assigned to each of the PCI function's capabilities
34 * and through whci_del_cap() call umc_device_unregister() each
35 * created umc_dev. Of course, if you are bound to the device, your
36 * driver's something_remove() will be called.
37 */
38
39#ifndef _LINUX_UWB_UMC_H_
40#define _LINUX_UWB_UMC_H_
41
42#include <linux/device.h>
43#include <linux/pci.h>
44
45/*
46 * UMC capability IDs.
47 *
48 * 0x00 is reserved so use it for the radio controller device.
49 *
50 * [WHCI] table 2-8
51 */
52#define UMC_CAP_ID_WHCI_RC 0x00 /* radio controller */
53#define UMC_CAP_ID_WHCI_WUSB_HC 0x01 /* WUSB host controller */
54
55/**
56 * struct umc_dev - UMC capability device
57 *
58 * @version: version of the specification this capability conforms to.
59 * @cap_id: capability ID.
60 * @bar: PCI Bar (64 bit) where the resource lies
61 * @resource: register space resource.
62 * @irq: interrupt line.
63 */
64struct umc_dev {
65 u16 version;
66 u8 cap_id;
67 u8 bar;
68 struct resource resource;
69 unsigned irq;
70 struct device dev;
71};
72
73#define to_umc_dev(d) container_of(d, struct umc_dev, dev)
74
75/**
76 * struct umc_driver - UMC capability driver
77 * @cap_id: supported capability ID.
78 * @match: driver specific capability matching function.
79 * @match_data: driver specific data for match() (e.g., a
80 * table of pci_device_id's if umc_match_pci_id() is used).
81 */
82struct umc_driver {
83 char *name;
84 u8 cap_id;
85 int (*match)(struct umc_driver *, struct umc_dev *);
86 const void *match_data;
87
88 int (*probe)(struct umc_dev *);
89 void (*remove)(struct umc_dev *);
90 int (*suspend)(struct umc_dev *, pm_message_t state);
91 int (*resume)(struct umc_dev *);
92
93 struct device_driver driver;
94};
95
96#define to_umc_driver(d) container_of(d, struct umc_driver, driver)
97
98extern struct bus_type umc_bus_type;
99
100struct umc_dev *umc_device_create(struct device *parent, int n);
101int __must_check umc_device_register(struct umc_dev *umc);
102void umc_device_unregister(struct umc_dev *umc);
103
104int __must_check __umc_driver_register(struct umc_driver *umc_drv,
105 struct module *mod,
106 const char *mod_name);
107
108/**
109 * umc_driver_register - register a UMC capabiltity driver.
110 * @umc_drv: pointer to the driver.
111 */
112static inline int __must_check umc_driver_register(struct umc_driver *umc_drv)
113{
114 return __umc_driver_register(umc_drv, THIS_MODULE, KBUILD_MODNAME);
115}
116void umc_driver_unregister(struct umc_driver *umc_drv);
117
118/*
119 * Utility function you can use to match (umc_driver->match) against a
120 * null-terminated array of 'struct pci_device_id' in
121 * umc_driver->match_data.
122 */
123int umc_match_pci_id(struct umc_driver *umc_drv, struct umc_dev *umc);
124
125/**
126 * umc_parent_pci_dev - return the UMC's parent PCI device or NULL if none
127 * @umc_dev: UMC device whose parent PCI device we are looking for
128 *
129 * DIRTY!!! DON'T RELY ON THIS
130 *
131 * FIXME: This is as dirty as it gets, but we need some way to check
132 * the correct type of umc_dev->parent (so that for example, we can
133 * cast to pci_dev). Casting to pci_dev is necesary because at some
134 * point we need to request resources from the device. Mapping is
135 * easily over come (ioremap and stuff are bus agnostic), but hooking
136 * up to some error handlers (such as pci error handlers) might need
137 * this.
138 *
139 * THIS might (probably will) be removed in the future, so don't count
140 * on it.
141 */
142static inline struct pci_dev *umc_parent_pci_dev(struct umc_dev *umc_dev)
143{
144 struct pci_dev *pci_dev = NULL;
145 if (umc_dev->dev.parent->bus == &pci_bus_type)
146 pci_dev = to_pci_dev(umc_dev->dev.parent);
147 return pci_dev;
148}
149
150/**
151 * umc_dev_get() - reference a UMC device.
152 * @umc_dev: Pointer to UMC device.
153 *
154 * NOTE: we are assuming in this whole scheme that the parent device
155 * is referenced at _probe() time and unreferenced at _remove()
156 * time by the parent's subsystem.
157 */
158static inline struct umc_dev *umc_dev_get(struct umc_dev *umc_dev)
159{
160 get_device(&umc_dev->dev);
161 return umc_dev;
162}
163
164/**
165 * umc_dev_put() - unreference a UMC device.
166 * @umc_dev: Pointer to UMC device.
167 */
168static inline void umc_dev_put(struct umc_dev *umc_dev)
169{
170 put_device(&umc_dev->dev);
171}
172
173/**
174 * umc_set_drvdata - set UMC device's driver data.
175 * @umc_dev: Pointer to UMC device.
176 * @data: Data to set.
177 */
178static inline void umc_set_drvdata(struct umc_dev *umc_dev, void *data)
179{
180 dev_set_drvdata(&umc_dev->dev, data);
181}
182
183/**
184 * umc_get_drvdata - recover UMC device's driver data.
185 * @umc_dev: Pointer to UMC device.
186 */
187static inline void *umc_get_drvdata(struct umc_dev *umc_dev)
188{
189 return dev_get_drvdata(&umc_dev->dev);
190}
191
192int umc_controller_reset(struct umc_dev *umc);
193
194#endif /* #ifndef _LINUX_UWB_UMC_H_ */
diff --git a/include/linux/uwb/whci.h b/include/linux/uwb/whci.h
new file mode 100644
index 000000000000..915ec23042d4
--- /dev/null
+++ b/include/linux/uwb/whci.h
@@ -0,0 +1,117 @@
1/*
2 * Wireless Host Controller Interface for Ultra-Wide-Band and Wireless USB
3 *
4 * Copyright (C) 2005-2006 Intel Corporation
5 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 *
21 *
22 *
23 * References:
24 * [WHCI] Wireless Host Controller Interface Specification for
25 * Certified Wireless Universal Serial Bus, revision 0.95.
26 */
27#ifndef _LINUX_UWB_WHCI_H_
28#define _LINUX_UWB_WHCI_H_
29
30#include <linux/pci.h>
31
32/*
33 * UWB interface capability registers (offsets from UWBBASE)
34 *
35 * [WHCI] section 2.2
36 */
37#define UWBCAPINFO 0x00 /* == UWBCAPDATA(0) */
38# define UWBCAPINFO_TO_N_CAPS(c) (((c) >> 0) & 0xFull)
39#define UWBCAPDATA(n) (8*(n))
40# define UWBCAPDATA_TO_VERSION(c) (((c) >> 32) & 0xFFFFull)
41# define UWBCAPDATA_TO_OFFSET(c) (((c) >> 18) & 0x3FFFull)
42# define UWBCAPDATA_TO_BAR(c) (((c) >> 16) & 0x3ull)
43# define UWBCAPDATA_TO_SIZE(c) ((((c) >> 8) & 0xFFull) * sizeof(u32))
44# define UWBCAPDATA_TO_CAP_ID(c) (((c) >> 0) & 0xFFull)
45
46/* Size of the WHCI capability data (including the RC capability) for
47 a device with n capabilities. */
48#define UWBCAPDATA_SIZE(n) (8 + 8*(n))
49
50
51/*
52 * URC registers (offsets from URCBASE)
53 *
54 * [WHCI] section 2.3
55 */
56#define URCCMD 0x00
57# define URCCMD_RESET (1 << 31) /* UMC Hardware reset */
58# define URCCMD_RS (1 << 30) /* Run/Stop */
59# define URCCMD_EARV (1 << 29) /* Event Address Register Valid */
60# define URCCMD_ACTIVE (1 << 15) /* Command is active */
61# define URCCMD_IWR (1 << 14) /* Interrupt When Ready */
62# define URCCMD_SIZE_MASK 0x00000fff /* Command size mask */
63#define URCSTS 0x04
64# define URCSTS_EPS (1 << 17) /* Event Processing Status */
65# define URCSTS_HALTED (1 << 16) /* RC halted */
66# define URCSTS_HSE (1 << 10) /* Host System Error...fried */
67# define URCSTS_ER (1 << 9) /* Event Ready */
68# define URCSTS_RCI (1 << 8) /* Ready for Command Interrupt */
69# define URCSTS_INT_MASK 0x00000700 /* URC interrupt sources */
70# define URCSTS_ISI 0x000000ff /* Interrupt Source Identification */
71#define URCINTR 0x08
72# define URCINTR_EN_ALL 0x000007ff /* Enable all interrupt sources */
73#define URCCMDADDR 0x10
74#define URCEVTADDR 0x18
75# define URCEVTADDR_OFFSET_MASK 0xfff /* Event pointer offset mask */
76
77
78/** Write 32 bit @value to little endian register at @addr */
79static inline
80void le_writel(u32 value, void __iomem *addr)
81{
82 iowrite32(value, addr);
83}
84
85
86/** Read from 32 bit little endian register at @addr */
87static inline
88u32 le_readl(void __iomem *addr)
89{
90 return ioread32(addr);
91}
92
93
94/** Write 64 bit @value to little endian register at @addr */
95static inline
96void le_writeq(u64 value, void __iomem *addr)
97{
98 iowrite32(value, addr);
99 iowrite32(value >> 32, addr + 4);
100}
101
102
103/** Read from 64 bit little endian register at @addr */
104static inline
105u64 le_readq(void __iomem *addr)
106{
107 u64 value;
108 value = ioread32(addr);
109 value |= (u64)ioread32(addr + 4) << 32;
110 return value;
111}
112
113extern int whci_wait_for(struct device *dev, u32 __iomem *reg,
114 u32 mask, u32 result,
115 unsigned long max_ms, const char *tag);
116
117#endif /* #ifndef _LINUX_UWB_WHCI_H_ */
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 328eb4022727..4c28c4d564e2 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -2,6 +2,7 @@
2#define _LINUX_VMALLOC_H 2#define _LINUX_VMALLOC_H
3 3
4#include <linux/spinlock.h> 4#include <linux/spinlock.h>
5#include <linux/init.h>
5#include <asm/page.h> /* pgprot_t */ 6#include <asm/page.h> /* pgprot_t */
6 7
7struct vm_area_struct; /* vma defining user mapping in mm_types.h */ 8struct vm_area_struct; /* vma defining user mapping in mm_types.h */
@@ -23,7 +24,6 @@ struct vm_area_struct; /* vma defining user mapping in mm_types.h */
23#endif 24#endif
24 25
25struct vm_struct { 26struct vm_struct {
26 /* keep next,addr,size together to speedup lookups */
27 struct vm_struct *next; 27 struct vm_struct *next;
28 void *addr; 28 void *addr;
29 unsigned long size; 29 unsigned long size;
@@ -37,6 +37,19 @@ struct vm_struct {
37/* 37/*
38 * Highlevel APIs for driver use 38 * Highlevel APIs for driver use
39 */ 39 */
40extern void vm_unmap_ram(const void *mem, unsigned int count);
41extern void *vm_map_ram(struct page **pages, unsigned int count,
42 int node, pgprot_t prot);
43extern void vm_unmap_aliases(void);
44
45#ifdef CONFIG_MMU
46extern void __init vmalloc_init(void);
47#else
48static inline void vmalloc_init(void)
49{
50}
51#endif
52
40extern void *vmalloc(unsigned long size); 53extern void *vmalloc(unsigned long size);
41extern void *vmalloc_user(unsigned long size); 54extern void *vmalloc_user(unsigned long size);
42extern void *vmalloc_node(unsigned long size, int node); 55extern void *vmalloc_node(unsigned long size, int node);
diff --git a/include/linux/vmstat.h b/include/linux/vmstat.h
index 58334d439516..9cd3ab0f554d 100644
--- a/include/linux/vmstat.h
+++ b/include/linux/vmstat.h
@@ -41,6 +41,16 @@ enum vm_event_item { PGPGIN, PGPGOUT, PSWPIN, PSWPOUT,
41#ifdef CONFIG_HUGETLB_PAGE 41#ifdef CONFIG_HUGETLB_PAGE
42 HTLB_BUDDY_PGALLOC, HTLB_BUDDY_PGALLOC_FAIL, 42 HTLB_BUDDY_PGALLOC, HTLB_BUDDY_PGALLOC_FAIL,
43#endif 43#endif
44#ifdef CONFIG_UNEVICTABLE_LRU
45 UNEVICTABLE_PGCULLED, /* culled to noreclaim list */
46 UNEVICTABLE_PGSCANNED, /* scanned for reclaimability */
47 UNEVICTABLE_PGRESCUED, /* rescued from noreclaim list */
48 UNEVICTABLE_PGMLOCKED,
49 UNEVICTABLE_PGMUNLOCKED,
50 UNEVICTABLE_PGCLEARED, /* on COW, page truncate */
51 UNEVICTABLE_PGSTRANDED, /* unable to isolate on unlock */
52 UNEVICTABLE_MLOCKFREED,
53#endif
44 NR_VM_EVENT_ITEMS 54 NR_VM_EVENT_ITEMS
45}; 55};
46 56
@@ -159,6 +169,16 @@ static inline unsigned long zone_page_state(struct zone *zone,
159 return x; 169 return x;
160} 170}
161 171
172extern unsigned long global_lru_pages(void);
173
174static inline unsigned long zone_lru_pages(struct zone *zone)
175{
176 return (zone_page_state(zone, NR_ACTIVE_ANON)
177 + zone_page_state(zone, NR_ACTIVE_FILE)
178 + zone_page_state(zone, NR_INACTIVE_ANON)
179 + zone_page_state(zone, NR_INACTIVE_FILE));
180}
181
162#ifdef CONFIG_NUMA 182#ifdef CONFIG_NUMA
163/* 183/*
164 * Determine the per node value of a stat item. This function 184 * Determine the per node value of a stat item. This function
diff --git a/include/linux/wait.h b/include/linux/wait.h
index 0081147a9fe8..ef609f842fac 100644
--- a/include/linux/wait.h
+++ b/include/linux/wait.h
@@ -108,15 +108,6 @@ static inline int waitqueue_active(wait_queue_head_t *q)
108 return !list_empty(&q->task_list); 108 return !list_empty(&q->task_list);
109} 109}
110 110
111/*
112 * Used to distinguish between sync and async io wait context:
113 * sync i/o typically specifies a NULL wait queue entry or a wait
114 * queue entry bound to a task (current task) to wake up.
115 * aio specifies a wait queue entry with an async notification
116 * callback routine, not associated with any task.
117 */
118#define is_sync_wait(wait) (!(wait) || ((wait)->private))
119
120extern void add_wait_queue(wait_queue_head_t *q, wait_queue_t *wait); 111extern void add_wait_queue(wait_queue_head_t *q, wait_queue_t *wait);
121extern void add_wait_queue_exclusive(wait_queue_head_t *q, wait_queue_t *wait); 112extern void add_wait_queue_exclusive(wait_queue_head_t *q, wait_queue_t *wait);
122extern void remove_wait_queue(wait_queue_head_t *q, wait_queue_t *wait); 113extern void remove_wait_queue(wait_queue_head_t *q, wait_queue_t *wait);
diff --git a/include/linux/wlp.h b/include/linux/wlp.h
new file mode 100644
index 000000000000..033545e145c7
--- /dev/null
+++ b/include/linux/wlp.h
@@ -0,0 +1,735 @@
1/*
2 * WiMedia Logical Link Control Protocol (WLP)
3 *
4 * Copyright (C) 2005-2006 Intel Corporation
5 * Reinette Chatre <reinette.chatre@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License version
9 * 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 * 02110-1301, USA.
20 *
21 *
22 * FIXME: docs
23 *
24 * - Does not (yet) include support for WLP control frames
25 * WLP Draft 0.99 [6.5].
26 *
27 * A visual representation of the data structures.
28 *
29 * wssidB wssidB
30 * ^ ^
31 * | |
32 * wssidA wssidA
33 * wlp interface { ^ ^
34 * ... | |
35 * ... ... wssid wssid ...
36 * wlp --- ... | |
37 * }; neighbors --> neighbA --> neighbB
38 * ...
39 * wss
40 * ...
41 * eda cache --> neighborA --> neighborB --> neighborC ...
42 */
43
44#ifndef __LINUX__WLP_H_
45#define __LINUX__WLP_H_
46
47#include <linux/netdevice.h>
48#include <linux/skbuff.h>
49#include <linux/list.h>
50#include <linux/uwb.h>
51
52/**
53 * WLP Protocol ID
54 * WLP Draft 0.99 [6.2]
55 *
56 * The MUX header for all WLP frames
57 */
58#define WLP_PROTOCOL_ID 0x0100
59
60/**
61 * WLP Version
62 * WLP version placed in the association frames (WLP 0.99 [6.6])
63 */
64#define WLP_VERSION 0x10
65
66/**
67 * Bytes needed to print UUID as string
68 */
69#define WLP_WSS_UUID_STRSIZE 48
70
71/**
72 * Bytes needed to print nonce as string
73 */
74#define WLP_WSS_NONCE_STRSIZE 48
75
76
77/**
78 * Size used for WLP name size
79 *
80 * The WSS name is set to 65 bytes, 1 byte larger than the maximum
81 * allowed by the WLP spec. This is to have a null terminated string
82 * for display to the user. A maximum of 64 bytes will still be used
83 * when placing the WSS name field in association frames.
84 */
85#define WLP_WSS_NAME_SIZE 65
86
87/**
88 * Number of bytes added by WLP to data frame
89 *
90 * A data frame transmitted from a host will be placed in a Standard or
91 * Abbreviated WLP frame. These have an extra 4 bytes of header (struct
92 * wlp_frame_std_abbrv_hdr).
93 * When the stack sends this data frame for transmission it needs to ensure
94 * there is enough headroom for this header.
95 */
96#define WLP_DATA_HLEN 4
97
98/**
99 * State of device regarding WLP Service Set
100 *
101 * WLP_WSS_STATE_NONE: the host does not participate in any WSS
102 * WLP_WSS_STATE_PART_ENROLLED: used as part of the enrollment sequence
103 * ("Partial Enroll"). This state is used to
104 * indicate the first part of enrollment that is
105 * unsecure. If the WSS is unsecure then the
106 * state will promptly go to WLP_WSS_STATE_ENROLLED,
107 * if the WSS is not secure then the enrollment
108 * procedure is a few more steps before we are
109 * enrolled.
110 * WLP_WSS_STATE_ENROLLED: the host is enrolled in a WSS
111 * WLP_WSS_STATE_ACTIVE: WSS is activated
112 * WLP_WSS_STATE_CONNECTED: host is connected to neighbor in WSS
113 *
114 */
115enum wlp_wss_state {
116 WLP_WSS_STATE_NONE = 0,
117 WLP_WSS_STATE_PART_ENROLLED,
118 WLP_WSS_STATE_ENROLLED,
119 WLP_WSS_STATE_ACTIVE,
120 WLP_WSS_STATE_CONNECTED,
121};
122
123/**
124 * WSS Secure status
125 * WLP 0.99 Table 6
126 *
127 * Set to one if the WSS is secure, zero if it is not secure
128 */
129enum wlp_wss_sec_status {
130 WLP_WSS_UNSECURE = 0,
131 WLP_WSS_SECURE,
132};
133
134/**
135 * WLP frame type
136 * WLP Draft 0.99 [6.2 Table 1]
137 */
138enum wlp_frame_type {
139 WLP_FRAME_STANDARD = 0,
140 WLP_FRAME_ABBREVIATED,
141 WLP_FRAME_CONTROL,
142 WLP_FRAME_ASSOCIATION,
143};
144
145/**
146 * WLP Association Message Type
147 * WLP Draft 0.99 [6.6.1.2 Table 8]
148 */
149enum wlp_assoc_type {
150 WLP_ASSOC_D1 = 2,
151 WLP_ASSOC_D2 = 3,
152 WLP_ASSOC_M1 = 4,
153 WLP_ASSOC_M2 = 5,
154 WLP_ASSOC_M3 = 7,
155 WLP_ASSOC_M4 = 8,
156 WLP_ASSOC_M5 = 9,
157 WLP_ASSOC_M6 = 10,
158 WLP_ASSOC_M7 = 11,
159 WLP_ASSOC_M8 = 12,
160 WLP_ASSOC_F0 = 14,
161 WLP_ASSOC_E1 = 32,
162 WLP_ASSOC_E2 = 33,
163 WLP_ASSOC_C1 = 34,
164 WLP_ASSOC_C2 = 35,
165 WLP_ASSOC_C3 = 36,
166 WLP_ASSOC_C4 = 37,
167};
168
169/**
170 * WLP Attribute Type
171 * WLP Draft 0.99 [6.6.1 Table 6]
172 */
173enum wlp_attr_type {
174 WLP_ATTR_AUTH = 0x1005, /* Authenticator */
175 WLP_ATTR_DEV_NAME = 0x1011, /* Device Name */
176 WLP_ATTR_DEV_PWD_ID = 0x1012, /* Device Password ID */
177 WLP_ATTR_E_HASH1 = 0x1014, /* E-Hash1 */
178 WLP_ATTR_E_HASH2 = 0x1015, /* E-Hash2 */
179 WLP_ATTR_E_SNONCE1 = 0x1016, /* E-SNonce1 */
180 WLP_ATTR_E_SNONCE2 = 0x1017, /* E-SNonce2 */
181 WLP_ATTR_ENCR_SET = 0x1018, /* Encrypted Settings */
182 WLP_ATTR_ENRL_NONCE = 0x101A, /* Enrollee Nonce */
183 WLP_ATTR_KEYWRAP_AUTH = 0x101E, /* Key Wrap Authenticator */
184 WLP_ATTR_MANUF = 0x1021, /* Manufacturer */
185 WLP_ATTR_MSG_TYPE = 0x1022, /* Message Type */
186 WLP_ATTR_MODEL_NAME = 0x1023, /* Model Name */
187 WLP_ATTR_MODEL_NR = 0x1024, /* Model Number */
188 WLP_ATTR_PUB_KEY = 0x1032, /* Public Key */
189 WLP_ATTR_REG_NONCE = 0x1039, /* Registrar Nonce */
190 WLP_ATTR_R_HASH1 = 0x103D, /* R-Hash1 */
191 WLP_ATTR_R_HASH2 = 0x103E, /* R-Hash2 */
192 WLP_ATTR_R_SNONCE1 = 0x103F, /* R-SNonce1 */
193 WLP_ATTR_R_SNONCE2 = 0x1040, /* R-SNonce2 */
194 WLP_ATTR_SERIAL = 0x1042, /* Serial number */
195 WLP_ATTR_UUID_E = 0x1047, /* UUID-E */
196 WLP_ATTR_UUID_R = 0x1048, /* UUID-R */
197 WLP_ATTR_PRI_DEV_TYPE = 0x1054, /* Primary Device Type */
198 WLP_ATTR_SEC_DEV_TYPE = 0x1055, /* Secondary Device Type */
199 WLP_ATTR_PORT_DEV = 0x1056, /* Portable Device */
200 WLP_ATTR_APP_EXT = 0x1058, /* Application Extension */
201 WLP_ATTR_WLP_VER = 0x2000, /* WLP Version */
202 WLP_ATTR_WSSID = 0x2001, /* WSSID */
203 WLP_ATTR_WSS_NAME = 0x2002, /* WSS Name */
204 WLP_ATTR_WSS_SEC_STAT = 0x2003, /* WSS Secure Status */
205 WLP_ATTR_WSS_BCAST = 0x2004, /* WSS Broadcast Address */
206 WLP_ATTR_WSS_M_KEY = 0x2005, /* WSS Master Key */
207 WLP_ATTR_ACC_ENRL = 0x2006, /* Accepting Enrollment */
208 WLP_ATTR_WSS_INFO = 0x2007, /* WSS Information */
209 WLP_ATTR_WSS_SEL_MTHD = 0x2008, /* WSS Selection Method */
210 WLP_ATTR_ASSC_MTHD_LIST = 0x2009, /* Association Methods List */
211 WLP_ATTR_SEL_ASSC_MTHD = 0x200A, /* Selected Association Method */
212 WLP_ATTR_ENRL_HASH_COMM = 0x200B, /* Enrollee Hash Commitment */
213 WLP_ATTR_WSS_TAG = 0x200C, /* WSS Tag */
214 WLP_ATTR_WSS_VIRT = 0x200D, /* WSS Virtual EUI-48 */
215 WLP_ATTR_WLP_ASSC_ERR = 0x200E, /* WLP Association Error */
216 WLP_ATTR_VNDR_EXT = 0x200F, /* Vendor Extension */
217};
218
219/**
220 * WLP Category ID of primary/secondary device
221 * WLP Draft 0.99 [6.6.1.8 Table 12]
222 */
223enum wlp_dev_category_id {
224 WLP_DEV_CAT_COMPUTER = 1,
225 WLP_DEV_CAT_INPUT,
226 WLP_DEV_CAT_PRINT_SCAN_FAX_COPIER,
227 WLP_DEV_CAT_CAMERA,
228 WLP_DEV_CAT_STORAGE,
229 WLP_DEV_CAT_INFRASTRUCTURE,
230 WLP_DEV_CAT_DISPLAY,
231 WLP_DEV_CAT_MULTIM,
232 WLP_DEV_CAT_GAMING,
233 WLP_DEV_CAT_TELEPHONE,
234 WLP_DEV_CAT_OTHER = 65535,
235};
236
237/**
238 * WLP WSS selection method
239 * WLP Draft 0.99 [6.6.1.6 Table 10]
240 */
241enum wlp_wss_sel_mthd {
242 WLP_WSS_ENRL_SELECT = 1, /* Enrollee selects */
243 WLP_WSS_REG_SELECT, /* Registrar selects */
244};
245
246/**
247 * WLP association error values
248 * WLP Draft 0.99 [6.6.1.5 Table 9]
249 */
250enum wlp_assc_error {
251 WLP_ASSOC_ERROR_NONE,
252 WLP_ASSOC_ERROR_AUTH, /* Authenticator Failure */
253 WLP_ASSOC_ERROR_ROGUE, /* Rogue activity suspected */
254 WLP_ASSOC_ERROR_BUSY, /* Device busy */
255 WLP_ASSOC_ERROR_LOCK, /* Setup Locked */
256 WLP_ASSOC_ERROR_NOT_READY, /* Registrar not ready */
257 WLP_ASSOC_ERROR_INV, /* Invalid WSS selection */
258 WLP_ASSOC_ERROR_MSG_TIME, /* Message timeout */
259 WLP_ASSOC_ERROR_ENR_TIME, /* Enrollment session timeout */
260 WLP_ASSOC_ERROR_PW, /* Device password invalid */
261 WLP_ASSOC_ERROR_VER, /* Unsupported version */
262 WLP_ASSOC_ERROR_INT, /* Internal error */
263 WLP_ASSOC_ERROR_UNDEF, /* Undefined error */
264 WLP_ASSOC_ERROR_NUM, /* Numeric comparison failure */
265 WLP_ASSOC_ERROR_WAIT, /* Waiting for user input */
266};
267
268/**
269 * WLP Parameters
270 * WLP 0.99 [7.7]
271 */
272enum wlp_parameters {
273 WLP_PER_MSG_TIMEOUT = 15, /* Seconds to wait for response to
274 association message. */
275};
276
277/**
278 * WLP IE
279 *
280 * The WLP IE should be included in beacons by all devices.
281 *
282 * The driver can set only a few of the fields in this information element,
283 * most fields are managed by the device self. When the driver needs to set
284 * a field it will only provide values for the fields of interest, the rest
285 * will be filled with zeroes. The fields of interest are:
286 *
287 * Element ID
288 * Length
289 * Capabilities (only to include WSSID Hash list length)
290 * WSSID Hash List fields
291 *
292 * WLP 0.99 [6.7]
293 *
294 * Only the fields that will be used are detailed in this structure, rest
295 * are not detailed or marked as "notused".
296 */
297struct wlp_ie {
298 struct uwb_ie_hdr hdr;
299 __le16 capabilities;
300 __le16 cycle_param;
301 __le16 acw_anchor_addr;
302 u8 wssid_hash_list[];
303} __attribute__((packed));
304
305static inline int wlp_ie_hash_length(struct wlp_ie *ie)
306{
307 return (le16_to_cpu(ie->capabilities) >> 12) & 0xf;
308}
309
310static inline void wlp_ie_set_hash_length(struct wlp_ie *ie, int hash_length)
311{
312 u16 caps = le16_to_cpu(ie->capabilities);
313 caps = (caps & ~(0xf << 12)) | (hash_length << 12);
314 ie->capabilities = cpu_to_le16(caps);
315}
316
317/**
318 * WLP nonce
319 * WLP Draft 0.99 [6.6.1 Table 6]
320 *
321 * A 128-bit random number often used (E-SNonce1, E-SNonce2, Enrollee
322 * Nonce, Registrar Nonce, R-SNonce1, R-SNonce2). It is passed to HW so
323 * it is packed.
324 */
325struct wlp_nonce {
326 u8 data[16];
327} __attribute__((packed));
328
329/**
330 * WLP UUID
331 * WLP Draft 0.99 [6.6.1 Table 6]
332 *
333 * Universally Unique Identifier (UUID) encoded as an octet string in the
334 * order the octets are shown in string representation in RFC4122. A UUID
335 * is often used (UUID-E, UUID-R, WSSID). It is passed to HW so it is packed.
336 */
337struct wlp_uuid {
338 u8 data[16];
339} __attribute__((packed));
340
341
342/**
343 * Primary and secondary device type attributes
344 * WLP Draft 0.99 [6.6.1.8]
345 */
346struct wlp_dev_type {
347 enum wlp_dev_category_id category:16;
348 u8 OUI[3];
349 u8 OUIsubdiv;
350 __le16 subID;
351} __attribute__((packed));
352
353/**
354 * WLP frame header
355 * WLP Draft 0.99 [6.2]
356 */
357struct wlp_frame_hdr {
358 __le16 mux_hdr; /* WLP_PROTOCOL_ID */
359 enum wlp_frame_type type:8;
360} __attribute__((packed));
361
362/**
363 * WLP attribute field header
364 * WLP Draft 0.99 [6.6.1]
365 *
366 * Header of each attribute found in an association frame
367 */
368struct wlp_attr_hdr {
369 __le16 type;
370 __le16 length;
371} __attribute__((packed));
372
373/**
374 * Device information commonly used together
375 *
376 * Each of these device information elements has a specified range in which it
377 * should fit (WLP 0.99 [Table 6]). This range provided in the spec does not
378 * include the termination null '\0' character (when used in the
379 * association protocol the attribute fields are accompanied
380 * with a "length" field so the full range from the spec can be used for
381 * the value). We thus allocate an extra byte to be able to store a string
382 * of max length with a terminating '\0'.
383 */
384struct wlp_device_info {
385 char name[33];
386 char model_name[33];
387 char manufacturer[65];
388 char model_nr[33];
389 char serial[33];
390 struct wlp_dev_type prim_dev_type;
391};
392
393/**
394 * Macros for the WLP attributes
395 *
396 * There are quite a few attributes (total is 43). The attribute layout can be
397 * in one of three categories: one value, an array, an enum forced to 8 bits.
398 * These macros help with their definitions.
399 */
400#define wlp_attr(type, name) \
401struct wlp_attr_##name { \
402 struct wlp_attr_hdr hdr; \
403 type name; \
404} __attribute__((packed));
405
406#define wlp_attr_array(type, name) \
407struct wlp_attr_##name { \
408 struct wlp_attr_hdr hdr; \
409 type name[]; \
410} __attribute__((packed));
411
412/**
413 * WLP association attribute fields
414 * WLP Draft 0.99 [6.6.1 Table 6]
415 *
416 * Attributes appear in same order as the Table in the spec
417 * FIXME Does not define all attributes yet
418 */
419
420/* Device name: Friendly name of sending device */
421wlp_attr_array(u8, dev_name)
422
423/* Enrollee Nonce: Random number generated by enrollee for an enrollment
424 * session */
425wlp_attr(struct wlp_nonce, enonce)
426
427/* Manufacturer name: Name of manufacturer of the sending device */
428wlp_attr_array(u8, manufacturer)
429
430/* WLP Message Type */
431wlp_attr(u8, msg_type)
432
433/* WLP Model name: Model name of sending device */
434wlp_attr_array(u8, model_name)
435
436/* WLP Model number: Model number of sending device */
437wlp_attr_array(u8, model_nr)
438
439/* Registrar Nonce: Random number generated by registrar for an enrollment
440 * session */
441wlp_attr(struct wlp_nonce, rnonce)
442
443/* Serial number of device */
444wlp_attr_array(u8, serial)
445
446/* UUID of enrollee */
447wlp_attr(struct wlp_uuid, uuid_e)
448
449/* UUID of registrar */
450wlp_attr(struct wlp_uuid, uuid_r)
451
452/* WLP Primary device type */
453wlp_attr(struct wlp_dev_type, prim_dev_type)
454
455/* WLP Secondary device type */
456wlp_attr(struct wlp_dev_type, sec_dev_type)
457
458/* WLP protocol version */
459wlp_attr(u8, version)
460
461/* WLP service set identifier */
462wlp_attr(struct wlp_uuid, wssid)
463
464/* WLP WSS name */
465wlp_attr_array(u8, wss_name)
466
467/* WLP WSS Secure Status */
468wlp_attr(u8, wss_sec_status)
469
470/* WSS Broadcast Address */
471wlp_attr(struct uwb_mac_addr, wss_bcast)
472
473/* WLP Accepting Enrollment */
474wlp_attr(u8, accept_enrl)
475
476/**
477 * WSS information attributes
478 * WLP Draft 0.99 [6.6.3 Table 15]
479 */
480struct wlp_wss_info {
481 struct wlp_attr_wssid wssid;
482 struct wlp_attr_wss_name name;
483 struct wlp_attr_accept_enrl accept;
484 struct wlp_attr_wss_sec_status sec_stat;
485 struct wlp_attr_wss_bcast bcast;
486} __attribute__((packed));
487
488/* WLP WSS Information */
489wlp_attr_array(struct wlp_wss_info, wss_info)
490
491/* WLP WSS Selection method */
492wlp_attr(u8, wss_sel_mthd)
493
494/* WLP WSS tag */
495wlp_attr(u8, wss_tag)
496
497/* WSS Virtual Address */
498wlp_attr(struct uwb_mac_addr, wss_virt)
499
500/* WLP association error */
501wlp_attr(u8, wlp_assc_err)
502
503/**
504 * WLP standard and abbreviated frames
505 *
506 * WLP Draft 0.99 [6.3] and [6.4]
507 *
508 * The difference between the WLP standard frame and the WLP
509 * abbreviated frame is that the standard frame includes the src
510 * and dest addresses from the Ethernet header, the abbreviated frame does
511 * not.
512 * The src/dest (as well as the type/length and client data) are already
513 * defined as part of the Ethernet header, we do not do this here.
514 * From this perspective the standard and abbreviated frames appear the
515 * same - they will be treated differently though.
516 *
517 * The size of this header is also captured in WLP_DATA_HLEN to enable
518 * interfaces to prepare their headroom.
519 */
520struct wlp_frame_std_abbrv_hdr {
521 struct wlp_frame_hdr hdr;
522 u8 tag;
523} __attribute__((packed));
524
525/**
526 * WLP association frames
527 *
528 * WLP Draft 0.99 [6.6]
529 */
530struct wlp_frame_assoc {
531 struct wlp_frame_hdr hdr;
532 enum wlp_assoc_type type:8;
533 struct wlp_attr_version version;
534 struct wlp_attr_msg_type msg_type;
535 u8 attr[];
536} __attribute__((packed));
537
538/* Ethernet to dev address mapping */
539struct wlp_eda {
540 spinlock_t lock;
541 struct list_head cache; /* Eth<->Dev Addr cache */
542};
543
544/**
545 * WSS information temporary storage
546 *
547 * This information is only stored temporarily during discovery. It should
548 * not be stored unless the device is enrolled in the advertised WSS. This
549 * is done mainly because we follow the letter of the spec in this regard.
550 * See WLP 0.99 [7.2.3].
551 * When the device does become enrolled in a WSS the WSS information will
552 * be stored as part of the more comprehensive struct wlp_wss.
553 */
554struct wlp_wss_tmp_info {
555 char name[WLP_WSS_NAME_SIZE];
556 u8 accept_enroll;
557 u8 sec_status;
558 struct uwb_mac_addr bcast;
559};
560
561struct wlp_wssid_e {
562 struct list_head node;
563 struct wlp_uuid wssid;
564 struct wlp_wss_tmp_info *info;
565};
566
567/**
568 * A cache entry of WLP neighborhood
569 *
570 * @node: head of list is wlp->neighbors
571 * @wssid: list of wssids of this neighbor, element is wlp_wssid_e
572 * @info: temporary storage for information learned during discovery. This
573 * storage is used together with the wssid_e temporary storage
574 * during discovery.
575 */
576struct wlp_neighbor_e {
577 struct list_head node;
578 struct wlp_uuid uuid;
579 struct uwb_dev *uwb_dev;
580 struct list_head wssid; /* Elements are wlp_wssid_e */
581 struct wlp_device_info *info;
582};
583
584struct wlp;
585/**
586 * Information for an association session in progress.
587 *
588 * @exp_message: The type of the expected message. Both this message and a
589 * F0 message (which can be sent in response to any
590 * association frame) will be accepted as a valid message for
591 * this session.
592 * @cb: The function that will be called upon receipt of this
593 * message.
594 * @cb_priv: Private data of callback
595 * @data: Data used in association process (always a sk_buff?)
596 * @neighbor: Address of neighbor with which association session is in
597 * progress.
598 */
599struct wlp_session {
600 enum wlp_assoc_type exp_message;
601 void (*cb)(struct wlp *);
602 void *cb_priv;
603 void *data;
604 struct uwb_dev_addr neighbor_addr;
605};
606
607/**
608 * WLP Service Set
609 *
610 * @mutex: used to protect entire WSS structure.
611 *
612 * @name: The WSS name is set to 65 bytes, 1 byte larger than the maximum
613 * allowed by the WLP spec. This is to have a null terminated string
614 * for display to the user. A maximum of 64 bytes will still be used
615 * when placing the WSS name field in association frames.
616 *
617 * @accept_enroll: Accepting enrollment: Set to one if registrar is
618 * accepting enrollment in WSS, or zero otherwise.
619 *
620 * Global and local information for each WSS in which we are enrolled.
621 * WLP 0.99 Section 7.2.1 and Section 7.2.2
622 */
623struct wlp_wss {
624 struct mutex mutex;
625 struct kobject kobj;
626 /* Global properties. */
627 struct wlp_uuid wssid;
628 u8 hash;
629 char name[WLP_WSS_NAME_SIZE];
630 struct uwb_mac_addr bcast;
631 u8 secure_status:1;
632 u8 master_key[16];
633 /* Local properties. */
634 u8 tag;
635 struct uwb_mac_addr virtual_addr;
636 /* Extra */
637 u8 accept_enroll:1;
638 enum wlp_wss_state state;
639};
640
641/**
642 * WLP main structure
643 * @mutex: protect changes to WLP structure. We only allow changes to the
644 * uuid, so currently this mutex only protects this field.
645 */
646struct wlp {
647 struct mutex mutex;
648 struct uwb_rc *rc; /* UWB radio controller */
649 struct uwb_pal pal;
650 struct wlp_eda eda;
651 struct wlp_uuid uuid;
652 struct wlp_session *session;
653 struct wlp_wss wss;
654 struct mutex nbmutex; /* Neighbor mutex protects neighbors list */
655 struct list_head neighbors; /* Elements are wlp_neighbor_e */
656 struct uwb_notifs_handler uwb_notifs_handler;
657 struct wlp_device_info *dev_info;
658 void (*fill_device_info)(struct wlp *wlp, struct wlp_device_info *info);
659 int (*xmit_frame)(struct wlp *, struct sk_buff *,
660 struct uwb_dev_addr *);
661 void (*stop_queue)(struct wlp *);
662 void (*start_queue)(struct wlp *);
663};
664
665/* sysfs */
666
667
668struct wlp_wss_attribute {
669 struct attribute attr;
670 ssize_t (*show)(struct wlp_wss *wss, char *buf);
671 ssize_t (*store)(struct wlp_wss *wss, const char *buf, size_t count);
672};
673
674#define WSS_ATTR(_name, _mode, _show, _store) \
675static struct wlp_wss_attribute wss_attr_##_name = __ATTR(_name, _mode, \
676 _show, _store)
677
678extern int wlp_setup(struct wlp *, struct uwb_rc *);
679extern void wlp_remove(struct wlp *);
680extern ssize_t wlp_neighborhood_show(struct wlp *, char *);
681extern int wlp_wss_setup(struct net_device *, struct wlp_wss *);
682extern void wlp_wss_remove(struct wlp_wss *);
683extern ssize_t wlp_wss_activate_show(struct wlp_wss *, char *);
684extern ssize_t wlp_wss_activate_store(struct wlp_wss *, const char *, size_t);
685extern ssize_t wlp_eda_show(struct wlp *, char *);
686extern ssize_t wlp_eda_store(struct wlp *, const char *, size_t);
687extern ssize_t wlp_uuid_show(struct wlp *, char *);
688extern ssize_t wlp_uuid_store(struct wlp *, const char *, size_t);
689extern ssize_t wlp_dev_name_show(struct wlp *, char *);
690extern ssize_t wlp_dev_name_store(struct wlp *, const char *, size_t);
691extern ssize_t wlp_dev_manufacturer_show(struct wlp *, char *);
692extern ssize_t wlp_dev_manufacturer_store(struct wlp *, const char *, size_t);
693extern ssize_t wlp_dev_model_name_show(struct wlp *, char *);
694extern ssize_t wlp_dev_model_name_store(struct wlp *, const char *, size_t);
695extern ssize_t wlp_dev_model_nr_show(struct wlp *, char *);
696extern ssize_t wlp_dev_model_nr_store(struct wlp *, const char *, size_t);
697extern ssize_t wlp_dev_serial_show(struct wlp *, char *);
698extern ssize_t wlp_dev_serial_store(struct wlp *, const char *, size_t);
699extern ssize_t wlp_dev_prim_category_show(struct wlp *, char *);
700extern ssize_t wlp_dev_prim_category_store(struct wlp *, const char *,
701 size_t);
702extern ssize_t wlp_dev_prim_OUI_show(struct wlp *, char *);
703extern ssize_t wlp_dev_prim_OUI_store(struct wlp *, const char *, size_t);
704extern ssize_t wlp_dev_prim_OUI_sub_show(struct wlp *, char *);
705extern ssize_t wlp_dev_prim_OUI_sub_store(struct wlp *, const char *,
706 size_t);
707extern ssize_t wlp_dev_prim_subcat_show(struct wlp *, char *);
708extern ssize_t wlp_dev_prim_subcat_store(struct wlp *, const char *,
709 size_t);
710extern int wlp_receive_frame(struct device *, struct wlp *, struct sk_buff *,
711 struct uwb_dev_addr *);
712extern int wlp_prepare_tx_frame(struct device *, struct wlp *,
713 struct sk_buff *, struct uwb_dev_addr *);
714void wlp_reset_all(struct wlp *wlp);
715
716/**
717 * Initialize WSS
718 */
719static inline
720void wlp_wss_init(struct wlp_wss *wss)
721{
722 mutex_init(&wss->mutex);
723}
724
725static inline
726void wlp_init(struct wlp *wlp)
727{
728 INIT_LIST_HEAD(&wlp->neighbors);
729 mutex_init(&wlp->mutex);
730 mutex_init(&wlp->nbmutex);
731 wlp_wss_init(&wlp->wss);
732}
733
734
735#endif /* #ifndef __LINUX__WLP_H_ */
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index 12b15c561a1f..e585657e9831 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -63,7 +63,15 @@ struct writeback_control {
63 unsigned for_writepages:1; /* This is a writepages() call */ 63 unsigned for_writepages:1; /* This is a writepages() call */
64 unsigned range_cyclic:1; /* range_start is cyclic */ 64 unsigned range_cyclic:1; /* range_start is cyclic */
65 unsigned more_io:1; /* more io to be dispatched */ 65 unsigned more_io:1; /* more io to be dispatched */
66 unsigned range_cont:1; 66 /*
67 * write_cache_pages() won't update wbc->nr_to_write and
68 * mapping->writeback_index if no_nrwrite_index_update
69 * is set. write_cache_pages() may write more than we
70 * requested and we want to make sure nr_to_write and
71 * writeback_index are updated in a consistent manner
72 * so we use a single control to update them
73 */
74 unsigned no_nrwrite_index_update:1;
67}; 75};
68 76
69/* 77/*
diff --git a/include/math-emu/op-2.h b/include/math-emu/op-2.h
index e193fb08fd55..4f26ecc1411b 100644
--- a/include/math-emu/op-2.h
+++ b/include/math-emu/op-2.h
@@ -25,7 +25,7 @@
25#ifndef __MATH_EMU_OP_2_H__ 25#ifndef __MATH_EMU_OP_2_H__
26#define __MATH_EMU_OP_2_H__ 26#define __MATH_EMU_OP_2_H__
27 27
28#define _FP_FRAC_DECL_2(X) _FP_W_TYPE X##_f0, X##_f1 28#define _FP_FRAC_DECL_2(X) _FP_W_TYPE X##_f0 = 0, X##_f1 = 0
29#define _FP_FRAC_COPY_2(D,S) (D##_f0 = S##_f0, D##_f1 = S##_f1) 29#define _FP_FRAC_COPY_2(D,S) (D##_f0 = S##_f0, D##_f1 = S##_f1)
30#define _FP_FRAC_SET_2(X,I) __FP_FRAC_SET_2(X, I) 30#define _FP_FRAC_SET_2(X,I) __FP_FRAC_SET_2(X, I)
31#define _FP_FRAC_HIGH_2(X) (X##_f1) 31#define _FP_FRAC_HIGH_2(X) (X##_f1)
diff --git a/include/math-emu/op-common.h b/include/math-emu/op-common.h
index bb46e7645d53..cc1ec396f8d6 100644
--- a/include/math-emu/op-common.h
+++ b/include/math-emu/op-common.h
@@ -73,7 +73,7 @@ do { \
73 X##_c = FP_CLS_NAN; \ 73 X##_c = FP_CLS_NAN; \
74 /* Check for signaling NaN */ \ 74 /* Check for signaling NaN */ \
75 if (!(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ 75 if (!(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \
76 FP_SET_EXCEPTION(FP_EX_INVALID); \ 76 FP_SET_EXCEPTION(FP_EX_INVALID | FP_EX_INVALID_SNAN); \
77 } \ 77 } \
78 break; \ 78 break; \
79 } \ 79 } \
@@ -324,7 +324,7 @@ do { \
324 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \ 324 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
325 R##_s = _FP_NANSIGN_##fs; \ 325 R##_s = _FP_NANSIGN_##fs; \
326 R##_c = FP_CLS_NAN; \ 326 R##_c = FP_CLS_NAN; \
327 FP_SET_EXCEPTION(FP_EX_INVALID); \ 327 FP_SET_EXCEPTION(FP_EX_INVALID | FP_EX_INVALID_ISI); \
328 break; \ 328 break; \
329 } \ 329 } \
330 /* FALLTHRU */ \ 330 /* FALLTHRU */ \
@@ -431,7 +431,7 @@ do { \
431 R##_s = _FP_NANSIGN_##fs; \ 431 R##_s = _FP_NANSIGN_##fs; \
432 R##_c = FP_CLS_NAN; \ 432 R##_c = FP_CLS_NAN; \
433 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \ 433 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
434 FP_SET_EXCEPTION(FP_EX_INVALID); \ 434 FP_SET_EXCEPTION(FP_EX_INVALID | FP_EX_INVALID_IMZ);\
435 break; \ 435 break; \
436 \ 436 \
437 default: \ 437 default: \
@@ -490,11 +490,15 @@ do { \
490 break; \ 490 break; \
491 \ 491 \
492 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF): \ 492 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF): \
493 R##_s = _FP_NANSIGN_##fs; \
494 R##_c = FP_CLS_NAN; \
495 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
496 FP_SET_EXCEPTION(FP_EX_INVALID | FP_EX_INVALID_IDI);\
493 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \ 497 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \
494 R##_s = _FP_NANSIGN_##fs; \ 498 R##_s = _FP_NANSIGN_##fs; \
495 R##_c = FP_CLS_NAN; \ 499 R##_c = FP_CLS_NAN; \
496 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \ 500 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
497 FP_SET_EXCEPTION(FP_EX_INVALID); \ 501 FP_SET_EXCEPTION(FP_EX_INVALID | FP_EX_INVALID_ZDZ);\
498 break; \ 502 break; \
499 \ 503 \
500 default: \ 504 default: \
diff --git a/include/math-emu/soft-fp.h b/include/math-emu/soft-fp.h
index a6f873b45f98..3f284bc03180 100644
--- a/include/math-emu/soft-fp.h
+++ b/include/math-emu/soft-fp.h
@@ -51,6 +51,25 @@
51#ifndef FP_EX_INVALID 51#ifndef FP_EX_INVALID
52#define FP_EX_INVALID 0 52#define FP_EX_INVALID 0
53#endif 53#endif
54#ifndef FP_EX_INVALID_SNAN
55#define FP_EX_INVALID_SNAN 0
56#endif
57/* inf - inf */
58#ifndef FP_EX_INVALID_ISI
59#define FP_EX_INVALID_ISI 0
60#endif
61/* inf / inf */
62#ifndef FP_EX_INVALID_IDI
63#define FP_EX_INVALID_IDI 0
64#endif
65/* 0 / 0 */
66#ifndef FP_EX_INVALID_ZDZ
67#define FP_EX_INVALID_ZDZ 0
68#endif
69/* inf * 0 */
70#ifndef FP_EX_INVALID_IMZ
71#define FP_EX_INVALID_IMZ 0
72#endif
54#ifndef FP_EX_OVERFLOW 73#ifndef FP_EX_OVERFLOW
55#define FP_EX_OVERFLOW 0 74#define FP_EX_OVERFLOW 0
56#endif 75#endif
diff --git a/include/media/saa7146.h b/include/media/saa7146.h
index 64a2ec746a3e..c5a6e22a4b37 100644
--- a/include/media/saa7146.h
+++ b/include/media/saa7146.h
@@ -24,7 +24,7 @@
24 24
25extern unsigned int saa7146_debug; 25extern unsigned int saa7146_debug;
26 26
27//#define DEBUG_PROLOG printk("(0x%08x)(0x%08x) %s: %s(): ",(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,RPS_ADDR0))),(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,IER))),KBUILD_MODNAME,__FUNCTION__) 27//#define DEBUG_PROLOG printk("(0x%08x)(0x%08x) %s: %s(): ",(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,RPS_ADDR0))),(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,IER))),KBUILD_MODNAME,__func__)
28 28
29#ifndef DEBUG_VARIABLE 29#ifndef DEBUG_VARIABLE
30 #define DEBUG_VARIABLE saa7146_debug 30 #define DEBUG_VARIABLE saa7146_debug
diff --git a/include/media/soc_camera_platform.h b/include/media/soc_camera_platform.h
index 851f18220984..1d092b4678aa 100644
--- a/include/media/soc_camera_platform.h
+++ b/include/media/soc_camera_platform.h
@@ -1,3 +1,13 @@
1/*
2 * Generic Platform Camera Driver Header
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
1#ifndef __SOC_CAMERA_H__ 11#ifndef __SOC_CAMERA_H__
2#define __SOC_CAMERA_H__ 12#define __SOC_CAMERA_H__
3 13
@@ -9,6 +19,7 @@ struct soc_camera_platform_info {
9 unsigned long format_depth; 19 unsigned long format_depth;
10 struct v4l2_pix_format format; 20 struct v4l2_pix_format format;
11 unsigned long bus_param; 21 unsigned long bus_param;
22 void (*power)(int);
12 int (*set_capture)(struct soc_camera_platform_info *info, int enable); 23 int (*set_capture)(struct soc_camera_platform_info *info, int enable);
13}; 24};
14 25
diff --git a/include/media/tuner.h b/include/media/tuner.h
index 67c1f514d0e2..7d4e2db78076 100644
--- a/include/media/tuner.h
+++ b/include/media/tuner.h
@@ -123,6 +123,7 @@
123#define TUNER_TEA5761 75 /* Only FM Radio Tuner */ 123#define TUNER_TEA5761 75 /* Only FM Radio Tuner */
124#define TUNER_XC5000 76 /* Xceive Silicon Tuner */ 124#define TUNER_XC5000 76 /* Xceive Silicon Tuner */
125#define TUNER_TCL_MF02GIP_5N 77 /* TCL MF02GIP_5N */ 125#define TUNER_TCL_MF02GIP_5N 77 /* TCL MF02GIP_5N */
126#define TUNER_PHILIPS_FMD1216MEX_MK3 78
126 127
127/* tv card specific */ 128/* tv card specific */
128#define TDA9887_PRESENT (1<<0) 129#define TDA9887_PRESENT (1<<0)
diff --git a/include/media/v4l2-i2c-drv-legacy.h b/include/media/v4l2-i2c-drv-legacy.h
index 975ffbf4e2c5..e65dd9d84e8b 100644
--- a/include/media/v4l2-i2c-drv-legacy.h
+++ b/include/media/v4l2-i2c-drv-legacy.h
@@ -21,6 +21,17 @@
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 22 */
23 23
24/* NOTE: the full version of this header is in the v4l-dvb repository
25 * and allows v4l i2c drivers to be compiled on older kernels as well.
26 * The version of this header as it appears in the kernel is a stripped
27 * version (without all the backwards compatibility stuff) and so it
28 * looks a bit odd.
29 *
30 * If you look at the full version then you will understand the reason
31 * for introducing this header since you really don't want to have all
32 * the tricky backwards compatibility code in each and every i2c driver.
33 */
34
24struct v4l2_i2c_driver_data { 35struct v4l2_i2c_driver_data {
25 const char * const name; 36 const char * const name;
26 int driverid; 37 int driverid;
diff --git a/include/media/v4l2-i2c-drv.h b/include/media/v4l2-i2c-drv.h
index 40ecef29801d..efdc8bf27f87 100644
--- a/include/media/v4l2-i2c-drv.h
+++ b/include/media/v4l2-i2c-drv.h
@@ -21,6 +21,17 @@
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 22 */
23 23
24/* NOTE: the full version of this header is in the v4l-dvb repository
25 * and allows v4l i2c drivers to be compiled on older kernels as well.
26 * The version of this header as it appears in the kernel is a stripped
27 * version (without all the backwards compatibility stuff) and so it
28 * looks a bit odd.
29 *
30 * If you look at the full version then you will understand the reason
31 * for introducing this header since you really don't want to have all
32 * the tricky backwards compatibility code in each and every i2c driver.
33 */
34
24#ifndef __V4L2_I2C_DRV_H__ 35#ifndef __V4L2_I2C_DRV_H__
25#define __V4L2_I2C_DRV_H__ 36#define __V4L2_I2C_DRV_H__
26 37
diff --git a/include/media/videobuf-dvb.h b/include/media/videobuf-dvb.h
index b77748696329..80471c2b6343 100644
--- a/include/media/videobuf-dvb.h
+++ b/include/media/videobuf-dvb.h
@@ -16,7 +16,6 @@ struct videobuf_dvb {
16 int nfeeds; 16 int nfeeds;
17 17
18 /* videobuf_dvb_(un)register manges this */ 18 /* videobuf_dvb_(un)register manges this */
19 struct dvb_adapter adapter;
20 struct dvb_demux demux; 19 struct dvb_demux demux;
21 struct dmxdev dmxdev; 20 struct dmxdev dmxdev;
22 struct dmx_frontend fe_hw; 21 struct dmx_frontend fe_hw;
@@ -24,12 +23,34 @@ struct videobuf_dvb {
24 struct dvb_net net; 23 struct dvb_net net;
25}; 24};
26 25
27int videobuf_dvb_register(struct videobuf_dvb *dvb, 26struct videobuf_dvb_frontend {
27 struct list_head felist;
28 int id;
29 struct videobuf_dvb dvb;
30};
31
32struct videobuf_dvb_frontends {
33 struct list_head felist;
34 struct mutex lock;
35 struct dvb_adapter adapter;
36 int active_fe_id; /* Indicates which frontend in the felist is in use */
37 int gate; /* Frontend with gate control 0=!MFE,1=fe0,2=fe1 etc */
38};
39
40int videobuf_dvb_register_bus(struct videobuf_dvb_frontends *f,
28 struct module *module, 41 struct module *module,
29 void *adapter_priv, 42 void *adapter_priv,
30 struct device *device, 43 struct device *device,
31 short *adapter_nr); 44 short *adapter_nr,
32void videobuf_dvb_unregister(struct videobuf_dvb *dvb); 45 int mfe_shared);
46
47void videobuf_dvb_unregister_bus(struct videobuf_dvb_frontends *f);
48
49struct videobuf_dvb_frontend * videobuf_dvb_alloc_frontend(struct videobuf_dvb_frontends *f, int id);
50
51struct videobuf_dvb_frontend * videobuf_dvb_get_frontend(struct videobuf_dvb_frontends *f, int id);
52int videobuf_dvb_find_frontend(struct videobuf_dvb_frontends *f, struct dvb_frontend *p);
53
33 54
34/* 55/*
35 * Local variables: 56 * Local variables:
diff --git a/include/net/9p/9p.h b/include/net/9p/9p.h
index c3626c0ba9d3..d2c60c73619d 100644
--- a/include/net/9p/9p.h
+++ b/include/net/9p/9p.h
@@ -27,8 +27,6 @@
27#ifndef NET_9P_H 27#ifndef NET_9P_H
28#define NET_9P_H 28#define NET_9P_H
29 29
30#ifdef CONFIG_NET_9P_DEBUG
31
32/** 30/**
33 * enum p9_debug_flags - bits for mount time debug parameter 31 * enum p9_debug_flags - bits for mount time debug parameter
34 * @P9_DEBUG_ERROR: more verbose error messages including original error string 32 * @P9_DEBUG_ERROR: more verbose error messages including original error string
@@ -39,6 +37,7 @@
39 * @P9_DEBUG_TRANS: transport tracing 37 * @P9_DEBUG_TRANS: transport tracing
40 * @P9_DEBUG_SLABS: memory management tracing 38 * @P9_DEBUG_SLABS: memory management tracing
41 * @P9_DEBUG_FCALL: verbose dump of protocol messages 39 * @P9_DEBUG_FCALL: verbose dump of protocol messages
40 * @P9_DEBUG_FID: fid allocation/deallocation tracking
42 * 41 *
43 * These flags are passed at mount time to turn on various levels of 42 * These flags are passed at mount time to turn on various levels of
44 * verbosity and tracing which will be output to the system logs. 43 * verbosity and tracing which will be output to the system logs.
@@ -53,30 +52,33 @@ enum p9_debug_flags {
53 P9_DEBUG_TRANS = (1<<6), 52 P9_DEBUG_TRANS = (1<<6),
54 P9_DEBUG_SLABS = (1<<7), 53 P9_DEBUG_SLABS = (1<<7),
55 P9_DEBUG_FCALL = (1<<8), 54 P9_DEBUG_FCALL = (1<<8),
55 P9_DEBUG_FID = (1<<9),
56 P9_DEBUG_PKT = (1<<10),
56}; 57};
57 58
58extern unsigned int p9_debug_level; 59extern unsigned int p9_debug_level;
59 60
61#ifdef CONFIG_NET_9P_DEBUG
60#define P9_DPRINTK(level, format, arg...) \ 62#define P9_DPRINTK(level, format, arg...) \
61do { \ 63do { \
62 if ((p9_debug_level & level) == level) \ 64 if ((p9_debug_level & level) == level) {\
63 printk(KERN_NOTICE "-- %s (%d): " \ 65 if (level == P9_DEBUG_9P) \
64 format , __FUNCTION__, task_pid_nr(current) , ## arg); \ 66 printk(KERN_NOTICE "(%8.8d) " \
67 format , task_pid_nr(current) , ## arg); \
68 else \
69 printk(KERN_NOTICE "-- %s (%d): " \
70 format , __func__, task_pid_nr(current) , ## arg); \
71 } \
65} while (0) 72} while (0)
66 73
67#define PRINT_FCALL_ERROR(s, fcall) P9_DPRINTK(P9_DEBUG_ERROR, \
68 "%s: %.*s\n", s, fcall?fcall->params.rerror.error.len:0, \
69 fcall?fcall->params.rerror.error.str:"");
70
71#else 74#else
72#define P9_DPRINTK(level, format, arg...) do { } while (0) 75#define P9_DPRINTK(level, format, arg...) do { } while (0)
73#define PRINT_FCALL_ERROR(s, fcall) do { } while (0)
74#endif 76#endif
75 77
76#define P9_EPRINTK(level, format, arg...) \ 78#define P9_EPRINTK(level, format, arg...) \
77do { \ 79do { \
78 printk(level "9p: %s (%d): " \ 80 printk(level "9p: %s (%d): " \
79 format , __FUNCTION__, task_pid_nr(current), ## arg); \ 81 format , __func__, task_pid_nr(current), ## arg); \
80} while (0) 82} while (0)
81 83
82/** 84/**
@@ -325,33 +327,6 @@ struct p9_qid {
325 * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat 327 * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat
326 */ 328 */
327 329
328struct p9_stat {
329 u16 size;
330 u16 type;
331 u32 dev;
332 struct p9_qid qid;
333 u32 mode;
334 u32 atime;
335 u32 mtime;
336 u64 length;
337 struct p9_str name;
338 struct p9_str uid;
339 struct p9_str gid;
340 struct p9_str muid;
341 struct p9_str extension; /* 9p2000.u extensions */
342 u32 n_uid; /* 9p2000.u extensions */
343 u32 n_gid; /* 9p2000.u extensions */
344 u32 n_muid; /* 9p2000.u extensions */
345};
346
347/*
348 * file metadata (stat) structure used to create Twstat message
349 * The is identical to &p9_stat, but the strings don't point to
350 * the same memory block and should be freed separately
351 *
352 * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat
353 */
354
355struct p9_wstat { 330struct p9_wstat {
356 u16 size; 331 u16 size;
357 u16 type; 332 u16 type;
@@ -493,12 +468,12 @@ struct p9_tstat {
493}; 468};
494 469
495struct p9_rstat { 470struct p9_rstat {
496 struct p9_stat stat; 471 struct p9_wstat stat;
497}; 472};
498 473
499struct p9_twstat { 474struct p9_twstat {
500 u32 fid; 475 u32 fid;
501 struct p9_stat stat; 476 struct p9_wstat stat;
502}; 477};
503 478
504struct p9_rwstat { 479struct p9_rwstat {
@@ -509,8 +484,9 @@ struct p9_rwstat {
509 * @size: prefixed length of the structure 484 * @size: prefixed length of the structure
510 * @id: protocol operating identifier of type &p9_msg_t 485 * @id: protocol operating identifier of type &p9_msg_t
511 * @tag: transaction id of the request 486 * @tag: transaction id of the request
487 * @offset: used by marshalling routines to track currentposition in buffer
488 * @capacity: used by marshalling routines to track total capacity
512 * @sdata: payload 489 * @sdata: payload
513 * @params: per-operation parameters
514 * 490 *
515 * &p9_fcall represents the structure for all 9P RPC 491 * &p9_fcall represents the structure for all 9P RPC
516 * transactions. Requests are packaged into fcalls, and reponses 492 * transactions. Requests are packaged into fcalls, and reponses
@@ -523,68 +499,15 @@ struct p9_fcall {
523 u32 size; 499 u32 size;
524 u8 id; 500 u8 id;
525 u16 tag; 501 u16 tag;
526 void *sdata; 502
527 503 size_t offset;
528 union { 504 size_t capacity;
529 struct p9_tversion tversion; 505
530 struct p9_rversion rversion; 506 uint8_t *sdata;
531 struct p9_tauth tauth;
532 struct p9_rauth rauth;
533 struct p9_rerror rerror;
534 struct p9_tflush tflush;
535 struct p9_rflush rflush;
536 struct p9_tattach tattach;
537 struct p9_rattach rattach;
538 struct p9_twalk twalk;
539 struct p9_rwalk rwalk;
540 struct p9_topen topen;
541 struct p9_ropen ropen;
542 struct p9_tcreate tcreate;
543 struct p9_rcreate rcreate;
544 struct p9_tread tread;
545 struct p9_rread rread;
546 struct p9_twrite twrite;
547 struct p9_rwrite rwrite;
548 struct p9_tclunk tclunk;
549 struct p9_rclunk rclunk;
550 struct p9_tremove tremove;
551 struct p9_rremove rremove;
552 struct p9_tstat tstat;
553 struct p9_rstat rstat;
554 struct p9_twstat twstat;
555 struct p9_rwstat rwstat;
556 } params;
557}; 507};
558 508
559struct p9_idpool; 509struct p9_idpool;
560 510
561int p9_deserialize_stat(void *buf, u32 buflen, struct p9_stat *stat,
562 int dotu);
563int p9_deserialize_fcall(void *buf, u32 buflen, struct p9_fcall *fc, int dotu);
564void p9_set_tag(struct p9_fcall *fc, u16 tag);
565struct p9_fcall *p9_create_tversion(u32 msize, char *version);
566struct p9_fcall *p9_create_tattach(u32 fid, u32 afid, char *uname,
567 char *aname, u32 n_uname, int dotu);
568struct p9_fcall *p9_create_tauth(u32 afid, char *uname, char *aname,
569 u32 n_uname, int dotu);
570struct p9_fcall *p9_create_tflush(u16 oldtag);
571struct p9_fcall *p9_create_twalk(u32 fid, u32 newfid, u16 nwname,
572 char **wnames);
573struct p9_fcall *p9_create_topen(u32 fid, u8 mode);
574struct p9_fcall *p9_create_tcreate(u32 fid, char *name, u32 perm, u8 mode,
575 char *extension, int dotu);
576struct p9_fcall *p9_create_tread(u32 fid, u64 offset, u32 count);
577struct p9_fcall *p9_create_twrite(u32 fid, u64 offset, u32 count,
578 const char *data);
579struct p9_fcall *p9_create_twrite_u(u32 fid, u64 offset, u32 count,
580 const char __user *data);
581struct p9_fcall *p9_create_tclunk(u32 fid);
582struct p9_fcall *p9_create_tremove(u32 fid);
583struct p9_fcall *p9_create_tstat(u32 fid);
584struct p9_fcall *p9_create_twstat(u32 fid, struct p9_wstat *wstat,
585 int dotu);
586
587int p9_printfcall(char *buf, int buflen, struct p9_fcall *fc, int dotu);
588int p9_errstr2errno(char *errstr, int len); 511int p9_errstr2errno(char *errstr, int len);
589 512
590struct p9_idpool *p9_idpool_create(void); 513struct p9_idpool *p9_idpool_create(void);
diff --git a/include/net/9p/client.h b/include/net/9p/client.h
index c936dd14de41..1f17f3d93727 100644
--- a/include/net/9p/client.h
+++ b/include/net/9p/client.h
@@ -26,6 +26,87 @@
26#ifndef NET_9P_CLIENT_H 26#ifndef NET_9P_CLIENT_H
27#define NET_9P_CLIENT_H 27#define NET_9P_CLIENT_H
28 28
29/* Number of requests per row */
30#define P9_ROW_MAXTAG 255
31
32/**
33 * enum p9_trans_status - different states of underlying transports
34 * @Connected: transport is connected and healthy
35 * @Disconnected: transport has been disconnected
36 * @Hung: transport is connected by wedged
37 *
38 * This enumeration details the various states a transport
39 * instatiation can be in.
40 */
41
42enum p9_trans_status {
43 Connected,
44 Disconnected,
45 Hung,
46};
47
48/**
49 * enum p9_req_status_t - virtio request status
50 * @REQ_STATUS_IDLE: request slot unused
51 * @REQ_STATUS_ALLOC: request has been allocated but not sent
52 * @REQ_STATUS_UNSENT: request waiting to be sent
53 * @REQ_STATUS_SENT: request sent to server
54 * @REQ_STATUS_FLSH: a flush has been sent for this request
55 * @REQ_STATUS_RCVD: response received from server
56 * @REQ_STATUS_FLSHD: request has been flushed
57 * @REQ_STATUS_ERROR: request encountered an error on the client side
58 *
59 * The @REQ_STATUS_IDLE state is used to mark a request slot as unused
60 * but use is actually tracked by the idpool structure which handles tag
61 * id allocation.
62 *
63 */
64
65enum p9_req_status_t {
66 REQ_STATUS_IDLE,
67 REQ_STATUS_ALLOC,
68 REQ_STATUS_UNSENT,
69 REQ_STATUS_SENT,
70 REQ_STATUS_FLSH,
71 REQ_STATUS_RCVD,
72 REQ_STATUS_FLSHD,
73 REQ_STATUS_ERROR,
74};
75
76/**
77 * struct p9_req_t - request slots
78 * @status: status of this request slot
79 * @t_err: transport error
80 * @flush_tag: tag of request being flushed (for flush requests)
81 * @wq: wait_queue for the client to block on for this request
82 * @tc: the request fcall structure
83 * @rc: the response fcall structure
84 * @aux: transport specific data (provided for trans_fd migration)
85 * @req_list: link for higher level objects to chain requests
86 *
87 * Transport use an array to track outstanding requests
88 * instead of a list. While this may incurr overhead during initial
89 * allocation or expansion, it makes request lookup much easier as the
90 * tag id is a index into an array. (We use tag+1 so that we can accomodate
91 * the -1 tag for the T_VERSION request).
92 * This also has the nice effect of only having to allocate wait_queues
93 * once, instead of constantly allocating and freeing them. Its possible
94 * other resources could benefit from this scheme as well.
95 *
96 */
97
98struct p9_req_t {
99 int status;
100 int t_err;
101 u16 flush_tag;
102 wait_queue_head_t *wq;
103 struct p9_fcall *tc;
104 struct p9_fcall *rc;
105 void *aux;
106
107 struct list_head req_list;
108};
109
29/** 110/**
30 * struct p9_client - per client instance state 111 * struct p9_client - per client instance state
31 * @lock: protect @fidlist 112 * @lock: protect @fidlist
@@ -36,9 +117,20 @@
36 * @conn: connection state information used by trans_fd 117 * @conn: connection state information used by trans_fd
37 * @fidpool: fid handle accounting for session 118 * @fidpool: fid handle accounting for session
38 * @fidlist: List of active fid handles 119 * @fidlist: List of active fid handles
120 * @tagpool - transaction id accounting for session
121 * @reqs - 2D array of requests
122 * @max_tag - current maximum tag id allocated
39 * 123 *
40 * The client structure is used to keep track of various per-client 124 * The client structure is used to keep track of various per-client
41 * state that has been instantiated. 125 * state that has been instantiated.
126 * In order to minimize per-transaction overhead we use a
127 * simple array to lookup requests instead of a hash table
128 * or linked list. In order to support larger number of
129 * transactions, we make this a 2D array, allocating new rows
130 * when we need to grow the total number of the transactions.
131 *
132 * Each row is 256 requests and we'll support up to 256 rows for
133 * a total of 64k concurrent requests per session.
42 * 134 *
43 * Bugs: duplicated data and potentially unnecessary elements. 135 * Bugs: duplicated data and potentially unnecessary elements.
44 */ 136 */
@@ -48,11 +140,16 @@ struct p9_client {
48 int msize; 140 int msize;
49 unsigned char dotu; 141 unsigned char dotu;
50 struct p9_trans_module *trans_mod; 142 struct p9_trans_module *trans_mod;
51 struct p9_trans *trans; 143 enum p9_trans_status status;
144 void *trans;
52 struct p9_conn *conn; 145 struct p9_conn *conn;
53 146
54 struct p9_idpool *fidpool; 147 struct p9_idpool *fidpool;
55 struct list_head fidlist; 148 struct list_head fidlist;
149
150 struct p9_idpool *tagpool;
151 struct p9_req_t *reqs[P9_ROW_MAXTAG];
152 int max_tag;
56}; 153};
57 154
58/** 155/**
@@ -65,8 +162,6 @@ struct p9_client {
65 * @uid: the numeric uid of the local user who owns this handle 162 * @uid: the numeric uid of the local user who owns this handle
66 * @aux: transport specific information (unused?) 163 * @aux: transport specific information (unused?)
67 * @rdir_fpos: tracks offset of file position when reading directory contents 164 * @rdir_fpos: tracks offset of file position when reading directory contents
68 * @rdir_pos: (unused?)
69 * @rdir_fcall: holds response of last directory read request
70 * @flist: per-client-instance fid tracking 165 * @flist: per-client-instance fid tracking
71 * @dlist: per-dentry fid tracking 166 * @dlist: per-dentry fid tracking
72 * 167 *
@@ -83,8 +178,6 @@ struct p9_fid {
83 void *aux; 178 void *aux;
84 179
85 int rdir_fpos; 180 int rdir_fpos;
86 int rdir_pos;
87 struct p9_fcall *rdir_fcall;
88 struct list_head flist; 181 struct list_head flist;
89 struct list_head dlist; /* list of all fids attached to a dentry */ 182 struct list_head dlist; /* list of all fids attached to a dentry */
90}; 183};
@@ -103,15 +196,18 @@ int p9_client_fcreate(struct p9_fid *fid, char *name, u32 perm, int mode,
103 char *extension); 196 char *extension);
104int p9_client_clunk(struct p9_fid *fid); 197int p9_client_clunk(struct p9_fid *fid);
105int p9_client_remove(struct p9_fid *fid); 198int p9_client_remove(struct p9_fid *fid);
106int p9_client_read(struct p9_fid *fid, char *data, u64 offset, u32 count); 199int p9_client_read(struct p9_fid *fid, char *data, char __user *udata,
107int p9_client_readn(struct p9_fid *fid, char *data, u64 offset, u32 count); 200 u64 offset, u32 count);
108int p9_client_write(struct p9_fid *fid, char *data, u64 offset, u32 count); 201int p9_client_write(struct p9_fid *fid, char *data, const char __user *udata,
109int p9_client_uread(struct p9_fid *fid, char __user *data, u64 offset, 202 u64 offset, u32 count);
110 u32 count); 203struct p9_wstat *p9_client_stat(struct p9_fid *fid);
111int p9_client_uwrite(struct p9_fid *fid, const char __user *data, u64 offset,
112 u32 count);
113struct p9_stat *p9_client_stat(struct p9_fid *fid);
114int p9_client_wstat(struct p9_fid *fid, struct p9_wstat *wst); 204int p9_client_wstat(struct p9_fid *fid, struct p9_wstat *wst);
115struct p9_stat *p9_client_dirread(struct p9_fid *fid, u64 offset); 205
206struct p9_req_t *p9_tag_lookup(struct p9_client *, u16);
207void p9_client_cb(struct p9_client *c, struct p9_req_t *req);
208
209int p9stat_read(char *, int, struct p9_wstat *, int);
210void p9stat_free(struct p9_wstat *);
211
116 212
117#endif /* NET_9P_CLIENT_H */ 213#endif /* NET_9P_CLIENT_H */
diff --git a/include/net/9p/transport.h b/include/net/9p/transport.h
index 3ca737120a90..6d5886efb102 100644
--- a/include/net/9p/transport.h
+++ b/include/net/9p/transport.h
@@ -26,52 +26,6 @@
26#ifndef NET_9P_TRANSPORT_H 26#ifndef NET_9P_TRANSPORT_H
27#define NET_9P_TRANSPORT_H 27#define NET_9P_TRANSPORT_H
28 28
29#include <linux/module.h>
30
31/**
32 * enum p9_trans_status - different states of underlying transports
33 * @Connected: transport is connected and healthy
34 * @Disconnected: transport has been disconnected
35 * @Hung: transport is connected by wedged
36 *
37 * This enumeration details the various states a transport
38 * instatiation can be in.
39 */
40
41enum p9_trans_status {
42 Connected,
43 Disconnected,
44 Hung,
45};
46
47/**
48 * struct p9_trans - per-transport state and API
49 * @status: transport &p9_trans_status
50 * @msize: negotiated maximum packet size (duplicate from client)
51 * @extended: negotiated protocol extensions (duplicate from client)
52 * @priv: transport private data
53 * @close: member function to disconnect and close the transport
54 * @rpc: member function to issue a request to the transport
55 *
56 * This is the basic API for a transport instance. It is used as
57 * a handle by the client to issue requests. This interface is currently
58 * in flux during reorganization.
59 *
60 * Bugs: there is lots of duplicated data here and its not clear that
61 * the member functions need to be per-instance versus per transport
62 * module.
63 */
64
65struct p9_trans {
66 enum p9_trans_status status;
67 int msize;
68 unsigned char extended;
69 void *priv;
70 void (*close) (struct p9_trans *);
71 int (*rpc) (struct p9_trans *t, struct p9_fcall *tc,
72 struct p9_fcall **rc);
73};
74
75/** 29/**
76 * struct p9_trans_module - transport module interface 30 * struct p9_trans_module - transport module interface
77 * @list: used to maintain a list of currently available transports 31 * @list: used to maintain a list of currently available transports
@@ -79,12 +33,14 @@ struct p9_trans {
79 * @maxsize: transport provided maximum packet size 33 * @maxsize: transport provided maximum packet size
80 * @def: set if this transport should be considered the default 34 * @def: set if this transport should be considered the default
81 * @create: member function to create a new connection on this transport 35 * @create: member function to create a new connection on this transport
36 * @request: member function to issue a request to the transport
37 * @cancel: member function to cancel a request (if it hasn't been sent)
82 * 38 *
83 * This is the basic API for a transport module which is registered by the 39 * This is the basic API for a transport module which is registered by the
84 * transport module with the 9P core network module and used by the client 40 * transport module with the 9P core network module and used by the client
85 * to instantiate a new connection on a transport. 41 * to instantiate a new connection on a transport.
86 * 42 *
87 * Bugs: the transport module list isn't protected. 43 * BUGS: the transport module list isn't protected.
88 */ 44 */
89 45
90struct p9_trans_module { 46struct p9_trans_module {
@@ -92,8 +48,11 @@ struct p9_trans_module {
92 char *name; /* name of transport */ 48 char *name; /* name of transport */
93 int maxsize; /* max message size of transport */ 49 int maxsize; /* max message size of transport */
94 int def; /* this transport should be default */ 50 int def; /* this transport should be default */
95 struct p9_trans * (*create)(const char *, char *, int, unsigned char);
96 struct module *owner; 51 struct module *owner;
52 int (*create)(struct p9_client *, const char *, char *);
53 void (*close) (struct p9_client *);
54 int (*request) (struct p9_client *, struct p9_req_t *req);
55 int (*cancel) (struct p9_client *, struct p9_req_t *req);
97}; 56};
98 57
99void v9fs_register_trans(struct p9_trans_module *m); 58void v9fs_register_trans(struct p9_trans_module *m);
diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h
index 6f8418bf4241..996d12df7594 100644
--- a/include/net/bluetooth/bluetooth.h
+++ b/include/net/bluetooth/bluetooth.h
@@ -54,8 +54,8 @@
54#define SOL_RFCOMM 18 54#define SOL_RFCOMM 18
55 55
56#define BT_INFO(fmt, arg...) printk(KERN_INFO "Bluetooth: " fmt "\n" , ## arg) 56#define BT_INFO(fmt, arg...) printk(KERN_INFO "Bluetooth: " fmt "\n" , ## arg)
57#define BT_DBG(fmt, arg...) printk(KERN_INFO "%s: " fmt "\n" , __FUNCTION__ , ## arg) 57#define BT_DBG(fmt, arg...) printk(KERN_INFO "%s: " fmt "\n" , __func__ , ## arg)
58#define BT_ERR(fmt, arg...) printk(KERN_ERR "%s: " fmt "\n" , __FUNCTION__ , ## arg) 58#define BT_ERR(fmt, arg...) printk(KERN_ERR "%s: " fmt "\n" , __func__ , ## arg)
59 59
60/* Connection and socket states */ 60/* Connection and socket states */
61enum { 61enum {
diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h
index 6048579d0b24..93a56de3594b 100644
--- a/include/net/ieee80211.h
+++ b/include/net/ieee80211.h
@@ -114,7 +114,7 @@ extern u32 ieee80211_debug_level;
114#define IEEE80211_DEBUG(level, fmt, args...) \ 114#define IEEE80211_DEBUG(level, fmt, args...) \
115do { if (ieee80211_debug_level & (level)) \ 115do { if (ieee80211_debug_level & (level)) \
116 printk(KERN_DEBUG "ieee80211: %c %s " fmt, \ 116 printk(KERN_DEBUG "ieee80211: %c %s " fmt, \
117 in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0) 117 in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0)
118static inline bool ieee80211_ratelimit_debug(u32 level) 118static inline bool ieee80211_ratelimit_debug(u32 level)
119{ 119{
120 return (ieee80211_debug_level & level) && net_ratelimit(); 120 return (ieee80211_debug_level & level) && net_ratelimit();
diff --git a/include/net/ip.h b/include/net/ip.h
index 1cbccaf0de3f..bc026ecb513f 100644
--- a/include/net/ip.h
+++ b/include/net/ip.h
@@ -396,7 +396,7 @@ extern void ip_local_error(struct sock *sk, int err, __be32 daddr, __be16 dport,
396int ipv4_doint_and_flush(ctl_table *ctl, int write, 396int ipv4_doint_and_flush(ctl_table *ctl, int write,
397 struct file* filp, void __user *buffer, 397 struct file* filp, void __user *buffer,
398 size_t *lenp, loff_t *ppos); 398 size_t *lenp, loff_t *ppos);
399int ipv4_doint_and_flush_strategy(ctl_table *table, int __user *name, int nlen, 399int ipv4_doint_and_flush_strategy(ctl_table *table,
400 void __user *oldval, size_t __user *oldlenp, 400 void __user *oldval, size_t __user *oldlenp,
401 void __user *newval, size_t newlen); 401 void __user *newval, size_t newlen);
402#ifdef CONFIG_PROC_FS 402#ifdef CONFIG_PROC_FS
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h
index 0b2071d9326d..fe9fcf73c85e 100644
--- a/include/net/ip_vs.h
+++ b/include/net/ip_vs.h
@@ -165,13 +165,13 @@ static inline const char *ip_vs_dbg_addr(int af, char *buf, size_t buf_len,
165 do { \ 165 do { \
166 if (level <= ip_vs_get_debug_level()) \ 166 if (level <= ip_vs_get_debug_level()) \
167 printk(KERN_DEBUG "Enter: %s, %s line %i\n", \ 167 printk(KERN_DEBUG "Enter: %s, %s line %i\n", \
168 __FUNCTION__, __FILE__, __LINE__); \ 168 __func__, __FILE__, __LINE__); \
169 } while (0) 169 } while (0)
170#define LeaveFunction(level) \ 170#define LeaveFunction(level) \
171 do { \ 171 do { \
172 if (level <= ip_vs_get_debug_level()) \ 172 if (level <= ip_vs_get_debug_level()) \
173 printk(KERN_DEBUG "Leave: %s, %s line %i\n", \ 173 printk(KERN_DEBUG "Leave: %s, %s line %i\n", \
174 __FUNCTION__, __FILE__, __LINE__); \ 174 __func__, __FILE__, __LINE__); \
175 } while (0) 175 } while (0)
176#else 176#else
177#define EnterFunction(level) do {} while (0) 177#define EnterFunction(level) do {} while (0)
diff --git a/include/net/irda/irda.h b/include/net/irda/irda.h
index 08387553b57e..7e582061b230 100644
--- a/include/net/irda/irda.h
+++ b/include/net/irda/irda.h
@@ -72,7 +72,7 @@ do { if (irda_debug >= (n)) \
72#define IRDA_ASSERT(expr, func) \ 72#define IRDA_ASSERT(expr, func) \
73do { if(!(expr)) { \ 73do { if(!(expr)) { \
74 printk( "Assertion failed! %s:%s:%d %s\n", \ 74 printk( "Assertion failed! %s:%s:%d %s\n", \
75 __FILE__,__FUNCTION__,__LINE__,(#expr) ); \ 75 __FILE__,__func__,__LINE__,(#expr) ); \
76 func } } while (0) 76 func } } while (0)
77#define IRDA_ASSERT_LABEL(label) label 77#define IRDA_ASSERT_LABEL(label) label
78#else 78#else
diff --git a/include/net/mac80211.h b/include/net/mac80211.h
index 5617a1613c91..d861197f83c7 100644
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -645,7 +645,8 @@ enum ieee80211_key_flags {
645 * - Temporal Encryption Key (128 bits) 645 * - Temporal Encryption Key (128 bits)
646 * - Temporal Authenticator Tx MIC Key (64 bits) 646 * - Temporal Authenticator Tx MIC Key (64 bits)
647 * - Temporal Authenticator Rx MIC Key (64 bits) 647 * - Temporal Authenticator Rx MIC Key (64 bits)
648 * 648 * @icv_len: FIXME
649 * @iv_len: FIXME
649 */ 650 */
650struct ieee80211_key_conf { 651struct ieee80211_key_conf {
651 enum ieee80211_key_alg alg; 652 enum ieee80211_key_alg alg;
diff --git a/include/net/ndisc.h b/include/net/ndisc.h
index a01b7c4dc763..11dd0137c6a5 100644
--- a/include/net/ndisc.h
+++ b/include/net/ndisc.h
@@ -129,9 +129,8 @@ extern int ndisc_ifinfo_sysctl_change(struct ctl_table *ctl,
129 void __user *buffer, 129 void __user *buffer,
130 size_t *lenp, 130 size_t *lenp,
131 loff_t *ppos); 131 loff_t *ppos);
132int ndisc_ifinfo_sysctl_strategy(ctl_table *ctl, int __user *name, 132int ndisc_ifinfo_sysctl_strategy(ctl_table *ctl,
133 int nlen, void __user *oldval, 133 void __user *oldval, size_t __user *oldlenp,
134 size_t __user *oldlenp,
135 void __user *newval, size_t newlen); 134 void __user *newval, size_t newlen);
136#endif 135#endif
137 136
diff --git a/include/net/netfilter/nf_nat_core.h b/include/net/netfilter/nf_nat_core.h
index f29eeb9777e0..58684066388c 100644
--- a/include/net/netfilter/nf_nat_core.h
+++ b/include/net/netfilter/nf_nat_core.h
@@ -25,4 +25,12 @@ static inline int nf_nat_initialized(struct nf_conn *ct,
25 else 25 else
26 return test_bit(IPS_DST_NAT_DONE_BIT, &ct->status); 26 return test_bit(IPS_DST_NAT_DONE_BIT, &ct->status);
27} 27}
28
29struct nlattr;
30
31extern int
32(*nfnetlink_parse_nat_setup_hook)(struct nf_conn *ct,
33 enum nf_nat_manip_type manip,
34 struct nlattr *attr);
35
28#endif /* _NF_NAT_CORE_H */ 36#endif /* _NF_NAT_CORE_H */
diff --git a/include/net/netns/x_tables.h b/include/net/netns/x_tables.h
index 0cb63ed2c1fc..b8093971ccb4 100644
--- a/include/net/netns/x_tables.h
+++ b/include/net/netns/x_tables.h
@@ -2,9 +2,9 @@
2#define __NETNS_X_TABLES_H 2#define __NETNS_X_TABLES_H
3 3
4#include <linux/list.h> 4#include <linux/list.h>
5#include <linux/net.h> 5#include <linux/netfilter.h>
6 6
7struct netns_xt { 7struct netns_xt {
8 struct list_head tables[NPROTO]; 8 struct list_head tables[NFPROTO_NUMPROTO];
9}; 9};
10#endif 10#endif
diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h
index 703305d00365..ed71b110edf7 100644
--- a/include/net/sctp/sctp.h
+++ b/include/net/sctp/sctp.h
@@ -303,7 +303,7 @@ extern int sctp_debug_flag;
303#define SCTP_ASSERT(expr, str, func) \ 303#define SCTP_ASSERT(expr, str, func) \
304 if (!(expr)) { \ 304 if (!(expr)) { \
305 SCTP_DEBUG_PRINTK("Assertion Failed: %s(%s) at %s:%s:%d\n", \ 305 SCTP_DEBUG_PRINTK("Assertion Failed: %s(%s) at %s:%s:%d\n", \
306 str, (#expr), __FILE__, __FUNCTION__, __LINE__); \ 306 str, (#expr), __FILE__, __func__, __LINE__); \
307 func; \ 307 func; \
308 } 308 }
309 309
diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h
index 16be12f1cbe8..0c9514de5df7 100644
--- a/include/scsi/iscsi_if.h
+++ b/include/scsi/iscsi_if.h
@@ -213,6 +213,8 @@ enum iscsi_err {
213 ISCSI_ERR_DATA_DGST = ISCSI_ERR_BASE + 15, 213 ISCSI_ERR_DATA_DGST = ISCSI_ERR_BASE + 15,
214 ISCSI_ERR_PARAM_NOT_FOUND = ISCSI_ERR_BASE + 16, 214 ISCSI_ERR_PARAM_NOT_FOUND = ISCSI_ERR_BASE + 16,
215 ISCSI_ERR_NO_SCSI_CMD = ISCSI_ERR_BASE + 17, 215 ISCSI_ERR_NO_SCSI_CMD = ISCSI_ERR_BASE + 17,
216 ISCSI_ERR_INVALID_HOST = ISCSI_ERR_BASE + 18,
217 ISCSI_ERR_XMIT_FAILED = ISCSI_ERR_BASE + 19,
216}; 218};
217 219
218/* 220/*
diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h
index 5e75bb7f311c..61e53f14f7e1 100644
--- a/include/scsi/libiscsi.h
+++ b/include/scsi/libiscsi.h
@@ -287,6 +287,11 @@ struct iscsi_session {
287 struct iscsi_pool cmdpool; /* PDU's pool */ 287 struct iscsi_pool cmdpool; /* PDU's pool */
288}; 288};
289 289
290enum {
291 ISCSI_HOST_SETUP,
292 ISCSI_HOST_REMOVED,
293};
294
290struct iscsi_host { 295struct iscsi_host {
291 char *initiatorname; 296 char *initiatorname;
292 /* hw address or netdev iscsi connection is bound to */ 297 /* hw address or netdev iscsi connection is bound to */
@@ -295,6 +300,12 @@ struct iscsi_host {
295 /* local address */ 300 /* local address */
296 int local_port; 301 int local_port;
297 char local_address[ISCSI_ADDRESS_BUF_LEN]; 302 char local_address[ISCSI_ADDRESS_BUF_LEN];
303
304 wait_queue_head_t session_removal_wq;
305 /* protects sessions and state */
306 spinlock_t lock;
307 int num_sessions;
308 int state;
298}; 309};
299 310
300/* 311/*
@@ -302,7 +313,7 @@ struct iscsi_host {
302 */ 313 */
303extern int iscsi_change_queue_depth(struct scsi_device *sdev, int depth); 314extern int iscsi_change_queue_depth(struct scsi_device *sdev, int depth);
304extern int iscsi_eh_abort(struct scsi_cmnd *sc); 315extern int iscsi_eh_abort(struct scsi_cmnd *sc);
305extern int iscsi_eh_host_reset(struct scsi_cmnd *sc); 316extern int iscsi_eh_target_reset(struct scsi_cmnd *sc);
306extern int iscsi_eh_device_reset(struct scsi_cmnd *sc); 317extern int iscsi_eh_device_reset(struct scsi_cmnd *sc);
307extern int iscsi_queuecommand(struct scsi_cmnd *sc, 318extern int iscsi_queuecommand(struct scsi_cmnd *sc,
308 void (*done)(struct scsi_cmnd *)); 319 void (*done)(struct scsi_cmnd *));
@@ -351,6 +362,8 @@ extern void iscsi_conn_stop(struct iscsi_cls_conn *, int);
351extern int iscsi_conn_bind(struct iscsi_cls_session *, struct iscsi_cls_conn *, 362extern int iscsi_conn_bind(struct iscsi_cls_session *, struct iscsi_cls_conn *,
352 int); 363 int);
353extern void iscsi_conn_failure(struct iscsi_conn *conn, enum iscsi_err err); 364extern void iscsi_conn_failure(struct iscsi_conn *conn, enum iscsi_err err);
365extern void iscsi_session_failure(struct iscsi_cls_session *cls_session,
366 enum iscsi_err err);
354extern int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn, 367extern int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn,
355 enum iscsi_param param, char *buf); 368 enum iscsi_param param, char *buf);
356extern void iscsi_suspend_tx(struct iscsi_conn *conn); 369extern void iscsi_suspend_tx(struct iscsi_conn *conn);
diff --git a/include/scsi/scsi.h b/include/scsi/scsi.h
index 192f8716aa9e..a109165714d6 100644
--- a/include/scsi/scsi.h
+++ b/include/scsi/scsi.h
@@ -381,6 +381,11 @@ static inline int scsi_is_wlun(unsigned int lun)
381#define DID_IMM_RETRY 0x0c /* Retry without decrementing retry count */ 381#define DID_IMM_RETRY 0x0c /* Retry without decrementing retry count */
382#define DID_REQUEUE 0x0d /* Requeue command (no immediate retry) also 382#define DID_REQUEUE 0x0d /* Requeue command (no immediate retry) also
383 * without decrementing the retry count */ 383 * without decrementing the retry count */
384#define DID_TRANSPORT_DISRUPTED 0x0e /* Transport error disrupted execution
385 * and the driver blocked the port to
386 * recover the link. Transport class will
387 * retry or fail IO */
388#define DID_TRANSPORT_FAILFAST 0x0f /* Transport class fastfailed the io */
384#define DRIVER_OK 0x00 /* Driver status */ 389#define DRIVER_OK 0x00 /* Driver status */
385 390
386/* 391/*
@@ -426,6 +431,7 @@ static inline int scsi_is_wlun(unsigned int lun)
426#define SCSI_MLQUEUE_HOST_BUSY 0x1055 431#define SCSI_MLQUEUE_HOST_BUSY 0x1055
427#define SCSI_MLQUEUE_DEVICE_BUSY 0x1056 432#define SCSI_MLQUEUE_DEVICE_BUSY 0x1056
428#define SCSI_MLQUEUE_EH_RETRY 0x1057 433#define SCSI_MLQUEUE_EH_RETRY 0x1057
434#define SCSI_MLQUEUE_TARGET_BUSY 0x1058
429 435
430/* 436/*
431 * Use these to separate status msg and our bytes 437 * Use these to separate status msg and our bytes
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index b49e725be039..a37a8148a310 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -238,6 +238,16 @@ struct scsi_target {
238 * for the device at a time. */ 238 * for the device at a time. */
239 unsigned int pdt_1f_for_no_lun; /* PDT = 0x1f */ 239 unsigned int pdt_1f_for_no_lun; /* PDT = 0x1f */
240 /* means no lun present */ 240 /* means no lun present */
241 /* commands actually active on LLD. protected by host lock. */
242 unsigned int target_busy;
243 /*
244 * LLDs should set this in the slave_alloc host template callout.
245 * If set to zero then there is not limit.
246 */
247 unsigned int can_queue;
248 unsigned int target_blocked;
249 unsigned int max_target_blocked;
250#define SCSI_DEFAULT_TARGET_BLOCKED 3
241 251
242 char scsi_level; 252 char scsi_level;
243 struct execute_work ew; 253 struct execute_work ew;
diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h
index 21018a4df452..49d8913c4f86 100644
--- a/include/scsi/scsi_transport_fc.h
+++ b/include/scsi/scsi_transport_fc.h
@@ -357,6 +357,7 @@ struct fc_rport { /* aka fc_starget_attrs */
357/* bit field values for struct fc_rport "flags" field: */ 357/* bit field values for struct fc_rport "flags" field: */
358#define FC_RPORT_DEVLOSS_PENDING 0x01 358#define FC_RPORT_DEVLOSS_PENDING 0x01
359#define FC_RPORT_SCAN_PENDING 0x02 359#define FC_RPORT_SCAN_PENDING 0x02
360#define FC_RPORT_FAST_FAIL_TIMEDOUT 0x03
360 361
361#define dev_to_rport(d) \ 362#define dev_to_rport(d) \
362 container_of(d, struct fc_rport, dev) 363 container_of(d, struct fc_rport, dev)
@@ -678,12 +679,15 @@ fc_remote_port_chkready(struct fc_rport *rport)
678 if (rport->roles & FC_PORT_ROLE_FCP_TARGET) 679 if (rport->roles & FC_PORT_ROLE_FCP_TARGET)
679 result = 0; 680 result = 0;
680 else if (rport->flags & FC_RPORT_DEVLOSS_PENDING) 681 else if (rport->flags & FC_RPORT_DEVLOSS_PENDING)
681 result = DID_IMM_RETRY << 16; 682 result = DID_TRANSPORT_DISRUPTED << 16;
682 else 683 else
683 result = DID_NO_CONNECT << 16; 684 result = DID_NO_CONNECT << 16;
684 break; 685 break;
685 case FC_PORTSTATE_BLOCKED: 686 case FC_PORTSTATE_BLOCKED:
686 result = DID_IMM_RETRY << 16; 687 if (rport->flags & FC_RPORT_FAST_FAIL_TIMEDOUT)
688 result = DID_TRANSPORT_FAILFAST << 16;
689 else
690 result = DID_TRANSPORT_DISRUPTED << 16;
687 break; 691 break;
688 default: 692 default:
689 result = DID_NO_CONNECT << 16; 693 result = DID_NO_CONNECT << 16;
diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h
index 8b6c91df4c7a..c667cc396545 100644
--- a/include/scsi/scsi_transport_iscsi.h
+++ b/include/scsi/scsi_transport_iscsi.h
@@ -135,7 +135,8 @@ extern int iscsi_unregister_transport(struct iscsi_transport *tt);
135/* 135/*
136 * control plane upcalls 136 * control plane upcalls
137 */ 137 */
138extern void iscsi_conn_error(struct iscsi_cls_conn *conn, enum iscsi_err error); 138extern void iscsi_conn_error_event(struct iscsi_cls_conn *conn,
139 enum iscsi_err error);
139extern int iscsi_recv_pdu(struct iscsi_cls_conn *conn, struct iscsi_hdr *hdr, 140extern int iscsi_recv_pdu(struct iscsi_cls_conn *conn, struct iscsi_hdr *hdr,
140 char *data, uint32_t data_size); 141 char *data, uint32_t data_size);
141 142
@@ -207,7 +208,7 @@ extern void iscsi_host_for_each_session(struct Scsi_Host *shost,
207struct iscsi_endpoint { 208struct iscsi_endpoint {
208 void *dd_data; /* LLD private data */ 209 void *dd_data; /* LLD private data */
209 struct device dev; 210 struct device dev;
210 unsigned int id; 211 uint64_t id;
211}; 212};
212 213
213/* 214/*
diff --git a/include/trace/sched.h b/include/trace/sched.h
new file mode 100644
index 000000000000..ad47369d01b5
--- /dev/null
+++ b/include/trace/sched.h
@@ -0,0 +1,56 @@
1#ifndef _TRACE_SCHED_H
2#define _TRACE_SCHED_H
3
4#include <linux/sched.h>
5#include <linux/tracepoint.h>
6
7DEFINE_TRACE(sched_kthread_stop,
8 TPPROTO(struct task_struct *t),
9 TPARGS(t));
10
11DEFINE_TRACE(sched_kthread_stop_ret,
12 TPPROTO(int ret),
13 TPARGS(ret));
14
15DEFINE_TRACE(sched_wait_task,
16 TPPROTO(struct rq *rq, struct task_struct *p),
17 TPARGS(rq, p));
18
19DEFINE_TRACE(sched_wakeup,
20 TPPROTO(struct rq *rq, struct task_struct *p),
21 TPARGS(rq, p));
22
23DEFINE_TRACE(sched_wakeup_new,
24 TPPROTO(struct rq *rq, struct task_struct *p),
25 TPARGS(rq, p));
26
27DEFINE_TRACE(sched_switch,
28 TPPROTO(struct rq *rq, struct task_struct *prev,
29 struct task_struct *next),
30 TPARGS(rq, prev, next));
31
32DEFINE_TRACE(sched_migrate_task,
33 TPPROTO(struct rq *rq, struct task_struct *p, int dest_cpu),
34 TPARGS(rq, p, dest_cpu));
35
36DEFINE_TRACE(sched_process_free,
37 TPPROTO(struct task_struct *p),
38 TPARGS(p));
39
40DEFINE_TRACE(sched_process_exit,
41 TPPROTO(struct task_struct *p),
42 TPARGS(p));
43
44DEFINE_TRACE(sched_process_wait,
45 TPPROTO(struct pid *pid),
46 TPARGS(pid));
47
48DEFINE_TRACE(sched_process_fork,
49 TPPROTO(struct task_struct *parent, struct task_struct *child),
50 TPARGS(parent, child));
51
52DEFINE_TRACE(sched_signal_send,
53 TPPROTO(int sig, struct task_struct *p),
54 TPARGS(sig, p));
55
56#endif
diff --git a/include/video/cyblafb.h b/include/video/cyblafb.h
index 717440575380..d3c1d4e2c8e3 100644
--- a/include/video/cyblafb.h
+++ b/include/video/cyblafb.h
@@ -4,7 +4,7 @@
4#endif 4#endif
5 5
6#if CYBLAFB_DEBUG 6#if CYBLAFB_DEBUG
7#define debug(f,a...) printk("%s:" f, __FUNCTION__ , ## a); 7#define debug(f,a...) printk("%s:" f, __func__ , ## a);
8#else 8#else
9#define debug(f,a...) 9#define debug(f,a...)
10#endif 10#endif
diff --git a/include/video/neomagic.h b/include/video/neomagic.h
index 38910da0ae59..08b663782956 100644
--- a/include/video/neomagic.h
+++ b/include/video/neomagic.h
@@ -123,7 +123,6 @@ typedef volatile struct {
123 123
124struct neofb_par { 124struct neofb_par {
125 struct vgastate state; 125 struct vgastate state;
126 struct mutex open_lock;
127 unsigned int ref_count; 126 unsigned int ref_count;
128 127
129 unsigned char MiscOutReg; /* Misc */ 128 unsigned char MiscOutReg; /* Misc */
diff --git a/include/video/radeon.h b/include/video/radeon.h
index 099ffa5e5bee..d5dcaf154ba4 100644
--- a/include/video/radeon.h
+++ b/include/video/radeon.h
@@ -386,7 +386,7 @@
386#define SC_BOTTOM_RIGHT 0x16F0 386#define SC_BOTTOM_RIGHT 0x16F0
387#define SRC_SC_BOTTOM_RIGHT 0x16F4 387#define SRC_SC_BOTTOM_RIGHT 0x16F4
388#define RB2D_DSTCACHE_MODE 0x3428 388#define RB2D_DSTCACHE_MODE 0x3428
389#define RB2D_DSTCACHE_CTLSTAT 0x342C 389#define RB2D_DSTCACHE_CTLSTAT_broken 0x342C /* do not use */
390#define LVDS_GEN_CNTL 0x02d0 390#define LVDS_GEN_CNTL 0x02d0
391#define LVDS_PLL_CNTL 0x02d4 391#define LVDS_PLL_CNTL 0x02d4
392#define FP2_GEN_CNTL 0x0288 392#define FP2_GEN_CNTL 0x0288
@@ -525,6 +525,9 @@
525#define CRTC_DISPLAY_DIS (1 << 10) 525#define CRTC_DISPLAY_DIS (1 << 10)
526#define CRTC_CRT_ON (1 << 15) 526#define CRTC_CRT_ON (1 << 15)
527 527
528/* DSTCACHE_MODE bits constants */
529#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8)
530#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17)
528 531
529/* DSTCACHE_CTLSTAT bit constants */ 532/* DSTCACHE_CTLSTAT bit constants */
530#define RB2D_DC_FLUSH_2D (1 << 0) 533#define RB2D_DC_FLUSH_2D (1 << 0)
@@ -532,6 +535,9 @@
532#define RB2D_DC_FLUSH_ALL (RB2D_DC_FLUSH_2D | RB2D_DC_FREE_2D) 535#define RB2D_DC_FLUSH_ALL (RB2D_DC_FLUSH_2D | RB2D_DC_FREE_2D)
533#define RB2D_DC_BUSY (1 << 31) 536#define RB2D_DC_BUSY (1 << 31)
534 537
538/* DSTCACHE_MODE bits constants */
539#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8)
540#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17)
535 541
536/* CRTC_GEN_CNTL bit constants */ 542/* CRTC_GEN_CNTL bit constants */
537#define CRTC_DBL_SCAN_EN 0x00000001 543#define CRTC_DBL_SCAN_EN 0x00000001
@@ -863,15 +869,10 @@
863#define GMC_DST_16BPP_YVYU422 0x00000c00 869#define GMC_DST_16BPP_YVYU422 0x00000c00
864#define GMC_DST_32BPP_AYUV444 0x00000e00 870#define GMC_DST_32BPP_AYUV444 0x00000e00
865#define GMC_DST_16BPP_ARGB4444 0x00000f00 871#define GMC_DST_16BPP_ARGB4444 0x00000f00
866#define GMC_SRC_MONO 0x00000000
867#define GMC_SRC_MONO_LBKGD 0x00001000
868#define GMC_SRC_DSTCOLOR 0x00003000
869#define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 872#define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000
870#define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 873#define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000
871#define GMC_DP_CONVERSION_TEMP_9300 0x00008000 874#define GMC_DP_CONVERSION_TEMP_9300 0x00008000
872#define GMC_DP_CONVERSION_TEMP_6500 0x00000000 875#define GMC_DP_CONVERSION_TEMP_6500 0x00000000
873#define GMC_DP_SRC_RECT 0x02000000
874#define GMC_DP_SRC_HOST 0x03000000
875#define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 876#define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000
876#define GMC_3D_FCN_EN_CLR 0x00000000 877#define GMC_3D_FCN_EN_CLR 0x00000000
877#define GMC_3D_FCN_EN_SET 0x08000000 878#define GMC_3D_FCN_EN_SET 0x08000000
@@ -882,6 +883,9 @@
882#define GMC_WRITE_MASK_LEAVE 0x00000000 883#define GMC_WRITE_MASK_LEAVE 0x00000000
883#define GMC_WRITE_MASK_SET 0x40000000 884#define GMC_WRITE_MASK_SET 0x40000000
884#define GMC_CLR_CMP_CNTL_DIS (1 << 28) 885#define GMC_CLR_CMP_CNTL_DIS (1 << 28)
886#define GMC_SRC_DATATYPE_MASK (3 << 12)
887#define GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12)
888#define GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12)
885#define GMC_SRC_DATATYPE_COLOR (3 << 12) 889#define GMC_SRC_DATATYPE_COLOR (3 << 12)
886#define ROP3_S 0x00cc0000 890#define ROP3_S 0x00cc0000
887#define ROP3_SRCCOPY 0x00cc0000 891#define ROP3_SRCCOPY 0x00cc0000
@@ -890,6 +894,7 @@
890#define DP_SRC_SOURCE_MASK (7 << 24) 894#define DP_SRC_SOURCE_MASK (7 << 24)
891#define GMC_BRUSH_NONE (15 << 4) 895#define GMC_BRUSH_NONE (15 << 4)
892#define DP_SRC_SOURCE_MEMORY (2 << 24) 896#define DP_SRC_SOURCE_MEMORY (2 << 24)
897#define DP_SRC_SOURCE_HOST_DATA (3 << 24)
893#define GMC_BRUSH_SOLIDCOLOR 0x000000d0 898#define GMC_BRUSH_SOLIDCOLOR 0x000000d0
894 899
895/* DP_MIX bit constants */ 900/* DP_MIX bit constants */
@@ -975,6 +980,12 @@
975#define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25) 980#define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25)
976#define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26) 981#define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26)
977 982
983/* RBBM_GUICNTL constants */
984#define RBBM_GUICNTL_HOST_DATA_SWAP_NONE (0 << 0)
985#define RBBM_GUICNTL_HOST_DATA_SWAP_16BIT (1 << 0)
986#define RBBM_GUICNTL_HOST_DATA_SWAP_32BIT (2 << 0)
987#define RBBM_GUICNTL_HOST_DATA_SWAP_HDW (3 << 0)
988
978/* masks */ 989/* masks */
979 990
980#define CONFIG_MEMSIZE_MASK 0x1f000000 991#define CONFIG_MEMSIZE_MASK 0x1f000000
diff --git a/include/video/s1d13xxxfb.h b/include/video/s1d13xxxfb.h
index c99d261df8f7..fe41b8407946 100644
--- a/include/video/s1d13xxxfb.h
+++ b/include/video/s1d13xxxfb.h
@@ -14,7 +14,8 @@
14#define S1D13XXXFB_H 14#define S1D13XXXFB_H
15 15
16#define S1D_PALETTE_SIZE 256 16#define S1D_PALETTE_SIZE 256
17#define S1D_CHIP_REV 7 /* expected chip revision number for s1d13806 */ 17#define S1D13506_CHIP_REV 4 /* expected chip revision number for s1d13506 */
18#define S1D13806_CHIP_REV 7 /* expected chip revision number for s1d13806 */
18#define S1D_FBID "S1D13806" 19#define S1D_FBID "S1D13806"
19#define S1D_DEVICENAME "s1d13806fb" 20#define S1D_DEVICENAME "s1d13806fb"
20 21
diff --git a/include/video/sh_mobile_lcdc.h b/include/video/sh_mobile_lcdc.h
new file mode 100644
index 000000000000..1a4bc6ada606
--- /dev/null
+++ b/include/video/sh_mobile_lcdc.h
@@ -0,0 +1,78 @@
1#ifndef __ASM_SH_MOBILE_LCDC_H__
2#define __ASM_SH_MOBILE_LCDC_H__
3
4#include <linux/fb.h>
5
6enum { RGB8, /* 24bpp, 8:8:8 */
7 RGB9, /* 18bpp, 9:9 */
8 RGB12A, /* 24bpp, 12:12 */
9 RGB12B, /* 12bpp */
10 RGB16, /* 16bpp */
11 RGB18, /* 18bpp */
12 RGB24, /* 24bpp */
13 SYS8A, /* 24bpp, 8:8:8 */
14 SYS8B, /* 18bpp, 8:8:2 */
15 SYS8C, /* 18bpp, 2:8:8 */
16 SYS8D, /* 16bpp, 8:8 */
17 SYS9, /* 18bpp, 9:9 */
18 SYS12, /* 24bpp, 12:12 */
19 SYS16A, /* 16bpp */
20 SYS16B, /* 18bpp, 16:2 */
21 SYS16C, /* 18bpp, 2:16 */
22 SYS18, /* 18bpp */
23 SYS24 };/* 24bpp */
24
25enum { LCDC_CHAN_DISABLED = 0,
26 LCDC_CHAN_MAINLCD,
27 LCDC_CHAN_SUBLCD };
28
29enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL };
30
31#define LCDC_FLAGS_DWPOL (1 << 0) /* Rising edge dot clock data latch */
32#define LCDC_FLAGS_DIPOL (1 << 1) /* Active low display enable polarity */
33#define LCDC_FLAGS_DAPOL (1 << 2) /* Active low display data polarity */
34#define LCDC_FLAGS_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */
35#define LCDC_FLAGS_DWCNT (1 << 4) /* Disable dotclock during blanking */
36
37struct sh_mobile_lcdc_sys_bus_cfg {
38 unsigned long ldmt2r;
39 unsigned long ldmt3r;
40};
41
42struct sh_mobile_lcdc_sys_bus_ops {
43 void (*write_index)(void *handle, unsigned long data);
44 void (*write_data)(void *handle, unsigned long data);
45 unsigned long (*read_data)(void *handle);
46};
47
48struct sh_mobile_lcdc_board_cfg {
49 void *board_data;
50 int (*setup_sys)(void *board_data, void *sys_ops_handle,
51 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
52 void (*display_on)(void *board_data);
53 void (*display_off)(void *board_data);
54};
55
56struct sh_mobile_lcdc_lcd_size_cfg { /* width and height of panel in mm */
57 unsigned long width;
58 unsigned long height;
59};
60
61struct sh_mobile_lcdc_chan_cfg {
62 int chan;
63 int bpp;
64 int interface_type; /* selects RGBn or SYSn I/F, see above */
65 int clock_divider;
66 unsigned long flags; /* LCDC_FLAGS_... */
67 struct fb_videomode lcd_cfg;
68 struct sh_mobile_lcdc_lcd_size_cfg lcd_size_cfg;
69 struct sh_mobile_lcdc_board_cfg board_cfg;
70 struct sh_mobile_lcdc_sys_bus_cfg sys_bus_cfg; /* only for SYSn I/F */
71};
72
73struct sh_mobile_lcdc_info {
74 int clock_source;
75 struct sh_mobile_lcdc_chan_cfg ch[2];
76};
77
78#endif /* __ASM_SH_MOBILE_LCDC_H__ */