diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-powerpc/cell-pmu.h | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/include/asm-powerpc/cell-pmu.h b/include/asm-powerpc/cell-pmu.h index e8c2ebd3ddda..35b95773746c 100644 --- a/include/asm-powerpc/cell-pmu.h +++ b/include/asm-powerpc/cell-pmu.h | |||
@@ -53,6 +53,11 @@ | |||
53 | #define CBE_PM_CTR_POLARITY 0x01000000 | 53 | #define CBE_PM_CTR_POLARITY 0x01000000 |
54 | #define CBE_PM_CTR_COUNT_CYCLES 0x00800000 | 54 | #define CBE_PM_CTR_COUNT_CYCLES 0x00800000 |
55 | #define CBE_PM_CTR_ENABLE 0x00400000 | 55 | #define CBE_PM_CTR_ENABLE 0x00400000 |
56 | #define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26) | ||
57 | #define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25) | ||
58 | #define PM07_CTR_POLARITY(x) (((x) & 1) << 24) | ||
59 | #define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23) | ||
60 | #define PM07_CTR_ENABLE(x) (((x) & 1) << 22) | ||
56 | 61 | ||
57 | /* Macros for the pm_status register. */ | 62 | /* Macros for the pm_status register. */ |
58 | #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) | 63 | #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) |
@@ -89,8 +94,7 @@ extern void cbe_read_trace_buffer(u32 cpu, u64 *buf); | |||
89 | 94 | ||
90 | extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask); | 95 | extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask); |
91 | extern void cbe_disable_pm_interrupts(u32 cpu); | 96 | extern void cbe_disable_pm_interrupts(u32 cpu); |
92 | extern u32 cbe_query_pm_interrupts(u32 cpu); | 97 | extern u32 cbe_get_and_clear_pm_interrupts(u32 cpu); |
93 | extern u32 cbe_clear_pm_interrupts(u32 cpu); | ||
94 | extern void cbe_sync_irq(int node); | 98 | extern void cbe_sync_irq(int node); |
95 | 99 | ||
96 | /* Utility functions, macros */ | 100 | /* Utility functions, macros */ |
@@ -103,11 +107,4 @@ extern u32 cbe_get_hw_thread_id(int cpu); | |||
103 | #define CBE_COUNT_PROBLEM_MODE 2 | 107 | #define CBE_COUNT_PROBLEM_MODE 2 |
104 | #define CBE_COUNT_ALL_MODES 3 | 108 | #define CBE_COUNT_ALL_MODES 3 |
105 | 109 | ||
106 | /* Macros for the pm07_control registers. */ | ||
107 | #define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26) | ||
108 | #define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25) | ||
109 | #define PM07_CTR_POLARITY(x) (((x) & 1) << 24) | ||
110 | #define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23) | ||
111 | #define PM07_CTR_ENABLE(x) (((x) & 1) << 22) | ||
112 | |||
113 | #endif /* __ASM_CELL_PMU_H__ */ | 110 | #endif /* __ASM_CELL_PMU_H__ */ |