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-rw-r--r--include/asm-x86/mach-default/mach_apic.h83
-rw-r--r--include/asm-x86/mach_apic.h26
2 files changed, 46 insertions, 63 deletions
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h
index 13900e8cc1ab..1f56e7d5bfdd 100644
--- a/include/asm-x86/mach-default/mach_apic.h
+++ b/include/asm-x86/mach-default/mach_apic.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_MACH_APIC_H 1#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H 2#define __ASM_MACH_APIC_H
3 3
4#ifdef CONFIG_X86_LOCAL_APIC
5
4#include <mach_apicdef.h> 6#include <mach_apicdef.h>
5#include <asm/smp.h> 7#include <asm/smp.h>
6 8
@@ -14,24 +16,25 @@ static inline cpumask_t target_cpus(void)
14 return cpumask_of_cpu(0); 16 return cpumask_of_cpu(0);
15#endif 17#endif
16} 18}
17#define TARGET_CPUS (target_cpus())
18 19
19#define NO_BALANCE_IRQ (0) 20#define NO_BALANCE_IRQ (0)
20#define esr_disable (0) 21#define esr_disable (0)
21 22
23#ifdef CONFIG_X86_64
24#include <asm/genapic.h>
25#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
26#define INT_DEST_MODE (genapic->int_dest_mode)
27#define TARGET_CPUS (genapic->target_cpus())
28#define apic_id_registered (genapic->apic_id_registered)
29#define init_apic_ldr (genapic->init_apic_ldr)
30#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
31#define phys_pkg_id (genapic->phys_pkg_id)
32#define vector_allocation_domain (genapic->vector_allocation_domain)
33extern void setup_apic_routing(void);
34#else
22#define INT_DELIVERY_MODE dest_LowestPrio 35#define INT_DELIVERY_MODE dest_LowestPrio
23#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ 36#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
24 37#define TARGET_CPUS (target_cpus())
25static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
26{
27 return physid_isset(apicid, bitmap);
28}
29
30static inline unsigned long check_apicid_present(int bit)
31{
32 return physid_isset(bit, phys_cpu_present_map);
33}
34
35/* 38/*
36 * Set up the logical destination ID. 39 * Set up the logical destination ID.
37 * 40 *
@@ -49,32 +52,52 @@ static inline void init_apic_ldr(void)
49 apic_write_around(APIC_LDR, val); 52 apic_write_around(APIC_LDR, val);
50} 53}
51 54
52static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map) 55static inline int apic_id_registered(void)
53{ 56{
54 return phys_map; 57 return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
58}
59
60static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
61{
62 return cpus_addr(cpumask)[0];
63}
64
65static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
66{
67 return cpuid_apic >> index_msb;
55} 68}
56 69
57#ifdef CONFIG_X86_64
58extern void setup_apic_routing(void);
59#else
60static inline void setup_apic_routing(void) 70static inline void setup_apic_routing(void)
61{ 71{
62 printk("Enabling APIC mode: %s. Using %d I/O APICs\n", 72 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
63 "Flat", nr_ioapics); 73 "Flat", nr_ioapics);
64} 74}
65#endif
66 75
67static inline int multi_timer_check(int apic, int irq) 76static inline int apicid_to_node(int logical_apicid)
68{ 77{
69 return 0; 78 return 0;
70} 79}
80#endif
71 81
72#ifdef CONFIG_X86_32 82static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
73static inline int apicid_to_node(int logical_apicid) 83{
84 return physid_isset(apicid, bitmap);
85}
86
87static inline unsigned long check_apicid_present(int bit)
88{
89 return physid_isset(bit, phys_cpu_present_map);
90}
91
92static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
93{
94 return phys_map;
95}
96
97static inline int multi_timer_check(int apic, int irq)
74{ 98{
75 return 0; 99 return 0;
76} 100}
77#endif
78 101
79/* Mapping from cpu number to logical apicid */ 102/* Mapping from cpu number to logical apicid */
80static inline int cpu_to_logical_apicid(int cpu) 103static inline int cpu_to_logical_apicid(int cpu)
@@ -109,23 +132,9 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
109 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); 132 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
110} 133}
111 134
112static inline int apic_id_registered(void)
113{
114 return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
115}
116
117static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
118{
119 return cpus_addr(cpumask)[0];
120}
121
122static inline void enable_apic_mode(void) 135static inline void enable_apic_mode(void)
123{ 136{
124} 137}
125 138
126static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) 139#endif /* CONFIG_X86_LOCAL_APIC */
127{
128 return cpuid_apic >> index_msb;
129}
130
131#endif /* __ASM_MACH_APIC_H */ 140#endif /* __ASM_MACH_APIC_H */
diff --git a/include/asm-x86/mach_apic.h b/include/asm-x86/mach_apic.h
deleted file mode 100644
index 1bc68c0c0cdf..000000000000
--- a/include/asm-x86/mach_apic.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H
3
4/*
5 * Copyright 2004 James Cleverdon, IBM.
6 * Subject to the GNU Public License, v.2
7 *
8 * Generic APIC sub-arch defines.
9 *
10 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
11 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
12 * James Cleverdon.
13 */
14
15#include <asm/genapic.h>
16
17#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
18#define INT_DEST_MODE (genapic->int_dest_mode)
19#define TARGET_CPUS (genapic->target_cpus())
20#define vector_allocation_domain (genapic->vector_allocation_domain)
21#define apic_id_registered (genapic->apic_id_registered)
22#define init_apic_ldr (genapic->init_apic_ldr)
23#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
24#define phys_pkg_id (genapic->phys_pkg_id)
25
26#endif /* __ASM_MACH_APIC_H */