8 files changed, 115 insertions, 14 deletions

diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 4525c784dfd0..528ef183c221 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -57,6 +57,14 @@ enum powerpc_pmc_type {
         PPC_PMC_PA6T = 2,
 };
 
+struct pt_regs;
+
+extern int machine_check_generic(struct pt_regs *regs);
+extern int machine_check_4xx(struct pt_regs *regs);
+extern int machine_check_440A(struct pt_regs *regs);
+extern int machine_check_e500(struct pt_regs *regs);
+extern int machine_check_e200(struct pt_regs *regs);
+
 /* NOTE WELL: Update identify_cpu() if fields are added or removed! */
 struct cpu_spec {
         /* CPU is matched via (PVR & pvr_mask) == pvr_value */
@@ -97,6 +105,11 @@ struct cpu_spec {
 
         /* Name of processor class, for the ELF AT_PLATFORM entry */
         char            *platform;
+
+        /* Processor specific machine check handling. Return negative
+         * if the error is fatal, 1 if it was fully recovered and 0 to
+         * pass up (not CPU originated) */
+        int             (*machine_check)(struct pt_regs *regs);
 };
 
 extern struct cpu_spec          *cur_cpu_spec;
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index 8dbb1ab0aa04..af5fb31af559 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -22,6 +22,8 @@
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 
+#include <linux/spinlock.h>
+
 typedef struct {
         unsigned int base;
 } dcr_host_t;
@@ -55,20 +57,28 @@ do {								\
 } while (0)
 
 /* R/W of indirect DCRs make use of standard naming conventions for DCRs */
-#define mfdcri(base, reg)                       \
-({                                              \
-        mtdcr(base ## _CFGADDR, base ## _ ## reg);      \
-        mfdcr(base ## _CFGDATA);                        \
+extern spinlock_t dcr_ind_lock;
+
+#define mfdcri(base, reg)                               \
+({                                                      \
+        unsigned long flags;                            \
+        unsigned int val;                               \
+        spin_lock_irqsave(&dcr_ind_lock, flags);        \
+        mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg);      \
+        val = mfdcr(DCRN_ ## base ## _CONFIG_DATA);     \
+        spin_unlock_irqrestore(&dcr_ind_lock, flags);   \
+        val;                                            \
 })
 
-#define mtdcri(base, reg, data)                 \
-do {                                            \
-        mtdcr(base ## _CFGADDR, base ## _ ## reg);      \
-        mtdcr(base ## _CFGDATA, data);          \
+#define mtdcri(base, reg, data)                         \
+do {                                                    \
+        unsigned long flags;                            \
+        spin_lock_irqsave(&dcr_ind_lock, flags);        \
+        mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg);      \
+        mtdcr(DCRN_ ## base ## _CONFIG_DATA, data);     \
+        spin_unlock_irqrestore(&dcr_ind_lock, flags);   \
 } while (0)
 
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_DCR_NATIVE_H */
-
-
diff --git a/include/asm-powerpc/dcr-regs.h b/include/asm-powerpc/dcr-regs.h
new file mode 100644
index 000000000000..9f1fb98fcdc6
--- /dev/null
+++ b/include/asm-powerpc/dcr-regs.h
@@ -0,0 +1,71 @@
+/*
+ * Common DCR / SDR / CPR register definitions used on various IBM/AMCC
+ * 4xx processors
+ *
+ *    Copyright 2007 Benjamin Herrenschmidt, IBM Corp
+ *                   <benh@kernel.crashing.org>
+ *
+ * Mostly lifted from asm-ppc/ibm4xx.h by
+ *
+ *    Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
+ *
+ */
+
+#ifndef __DCR_REGS_H__
+#define __DCR_REGS_H__
+
+/*
+ * Most DCRs used for controlling devices such as the MAL, DMA engine,
+ * etc... are obtained for the device tree.
+ *
+ * The definitions in this files are fixed DCRs and indirect DCRs that
+ * are commonly used outside of specific drivers or refer to core
+ * common registers that may occasionally have to be tweaked outside
+ * of the driver main register set
+ */
+
+/* CPRs (440GX and 440SP/440SPe) */
+#define DCRN_CPR0_CONFIG_ADDR   0xc
+#define DCRN_CPR0_CONFIG_DATA   0xd
+
+/* SDRs (440GX and 440SP/440SPe) */
+#define DCRN_SDR0_CONFIG_ADDR   0xe
+#define DCRN_SDR0_CONFIG_DATA   0xf
+
+#define SDR0_PFC0               0x4100
+#define SDR0_PFC1               0x4101
+#define SDR0_PFC1_EPS           0x1c00000
+#define SDR0_PFC1_EPS_SHIFT     22
+#define SDR0_PFC1_RMII          0x02000000
+#define SDR0_MFR                0x4300
+#define SDR0_MFR_TAH0           0x80000000      /* TAHOE0 Enable */
+#define SDR0_MFR_TAH1           0x40000000      /* TAHOE1 Enable */
+#define SDR0_MFR_PCM            0x10000000      /* PPC440GP irq compat mode */
+#define SDR0_MFR_ECS            0x08000000      /* EMAC int clk */
+#define SDR0_MFR_T0TXFL         0x00080000
+#define SDR0_MFR_T0TXFH         0x00040000
+#define SDR0_MFR_T1TXFL         0x00020000
+#define SDR0_MFR_T1TXFH         0x00010000
+#define SDR0_MFR_E0TXFL         0x00008000
+#define SDR0_MFR_E0TXFH         0x00004000
+#define SDR0_MFR_E0RXFL         0x00002000
+#define SDR0_MFR_E0RXFH         0x00001000
+#define SDR0_MFR_E1TXFL         0x00000800
+#define SDR0_MFR_E1TXFH         0x00000400
+#define SDR0_MFR_E1RXFL         0x00000200
+#define SDR0_MFR_E1RXFH         0x00000100
+#define SDR0_MFR_E2TXFL         0x00000080
+#define SDR0_MFR_E2TXFH         0x00000040
+#define SDR0_MFR_E2RXFL         0x00000020
+#define SDR0_MFR_E2RXFH         0x00000010
+#define SDR0_MFR_E3TXFL         0x00000008
+#define SDR0_MFR_E3TXFH         0x00000004
+#define SDR0_MFR_E3RXFL         0x00000002
+#define SDR0_MFR_E3RXFH         0x00000001
+#define SDR0_UART0              0x0120
+#define SDR0_UART1              0x0121
+#define SDR0_UART2              0x0122
+#define SDR0_UART3              0x0123
+#define SDR0_CUST0              0x4000
+
+#endif /* __DCR_REGS_H__ */
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h
index 13fccc5a4119..c662287efd8f 100644
--- a/include/asm-powerpc/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -106,7 +106,8 @@ extern int ptrace_put_reg(struct task_struct *task, int regno,
  */
 #define FULL_REGS(regs)         (((regs)->trap & 1) == 0)
 #ifndef __powerpc64__
-#define IS_CRITICAL_EXC(regs)   (((regs)->trap & 2) == 0)
+#define IS_CRITICAL_EXC(regs)   (((regs)->trap & 2) != 0)
+#define IS_MCHECK_EXC(regs)     (((regs)->trap & 4) != 0)
 #endif /* ! __powerpc64__ */
 #define TRAP(regs)              ((regs)->trap & ~0xF)
 #ifdef __powerpc64__
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
index d3e8dd0fc738..0405ef479814 100644
--- a/include/asm-powerpc/reg_booke.h
+++ b/include/asm-powerpc/reg_booke.h
@@ -218,7 +218,6 @@
 #define CCR1_TCS        0x00000080 /* Timer Clock Select */
 
 /* Bit definitions for the MCSR. */
-#ifdef CONFIG_440A
 #define MCSR_MCS        0x80000000 /* Machine Check Summary */
 #define MCSR_IB         0x40000000 /* Instruction PLB Error */
 #define MCSR_DRB        0x20000000 /* Data Read PLB Error */
@@ -228,7 +227,7 @@
 #define MCSR_DCSP       0x02000000 /* D-Cache Search Parity Error */
 #define MCSR_DCFP       0x01000000 /* D-Cache Flush Parity Error */
 #define MCSR_IMPE       0x00800000 /* Imprecise Machine Check Exception */
-#endif
+
 #ifdef CONFIG_E500
 #define MCSR_MCP        0x80000000UL /* Machine Check Input Pin */
 #define MCSR_ICPERR     0x40000000UL /* I-Cache Parity Error */
diff --git a/include/asm-powerpc/udbg.h b/include/asm-powerpc/udbg.h
index a9e0b0ebcb0f..6418ceea44b7 100644
--- a/include/asm-powerpc/udbg.h
+++ b/include/asm-powerpc/udbg.h
@@ -48,6 +48,7 @@ extern void __init udbg_init_rtas_console(void);
 extern void __init udbg_init_debug_beat(void);
 extern void __init udbg_init_btext(void);
 extern void __init udbg_init_44x_as1(void);
+extern void __init udbg_init_40x_realmode(void);
 extern void __init udbg_init_cpm(void);
 
 #endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h
index 14584e505ed5..d46b57b589ae 100644
--- a/include/asm-ppc/mmu.h
+++ b/include/asm-ppc/mmu.h
@@ -383,6 +383,12 @@ typedef struct _P601_BAT {
 #define BOOKE_PAGESZ_256GB      14
 #define BOOKE_PAGESZ_1TB        15
 
+#ifndef CONFIG_SERIAL_TEXT_DEBUG
+#define PPC44x_EARLY_TLBS       1
+#else
+#define PPC44x_EARLY_TLBS       2
+#endif
+
 /*
  * Freescale Book-E MMU support
  */
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
index 4cad45a055dd..2f1a2afcfc28 100644
--- a/include/asm-ppc/reg_booke.h
+++ b/include/asm-ppc/reg_booke.h
@@ -207,7 +207,7 @@
 #define CCR1_TCS        0x00000080 /* Timer Clock Select */
 
 /* Bit definitions for the MCSR. */
-#ifdef CONFIG_440A
+#ifdef CONFIG_4xx
 #define MCSR_MCS        0x80000000 /* Machine Check Summary */
 #define MCSR_IB         0x40000000 /* Instruction PLB Error */
 #define MCSR_DRB        0x20000000 /* Data Read PLB Error */