diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/cpu-features.h | 4 | ||||
-rw-r--r-- | include/asm-mips/cpu.h | 2 | ||||
-rw-r--r-- | include/asm-mips/mach-cobalt/cpu-feature-overrides.h | 2 | ||||
-rw-r--r-- | include/asm-mips/mach-excite/cpu-feature-overrides.h | 2 | ||||
-rw-r--r-- | include/asm-mips/mach-ip27/cpu-feature-overrides.h | 2 | ||||
-rw-r--r-- | include/asm-mips/mach-ja/cpu-feature-overrides.h | 2 | ||||
-rw-r--r-- | include/asm-mips/mach-mips/cpu-feature-overrides.h | 4 | ||||
-rw-r--r-- | include/asm-mips/mach-ocelot3/cpu-feature-overrides.h | 2 | ||||
-rw-r--r-- | include/asm-mips/mach-sibyte/cpu-feature-overrides.h | 2 | ||||
-rw-r--r-- | include/asm-mips/mach-sim/cpu-feature-overrides.h | 4 | ||||
-rw-r--r-- | include/asm-mips/mach-yosemite/cpu-feature-overrides.h | 2 |
11 files changed, 14 insertions, 14 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 3c2fc2b647c8..eadca266f159 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h | |||
@@ -195,8 +195,8 @@ | |||
195 | # define cpu_has_veic 0 | 195 | # define cpu_has_veic 0 |
196 | #endif | 196 | #endif |
197 | 197 | ||
198 | #ifndef cpu_has_subset_pcaches | 198 | #ifndef cpu_has_inclusive_pcaches |
199 | #define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES) | 199 | #define cpu_has_inclusive_pcaches (cpu_data[0].options & MIPS_CPU_INCLUSIVE_CACHES) |
200 | #endif | 200 | #endif |
201 | 201 | ||
202 | #ifndef cpu_dcache_line_size | 202 | #ifndef cpu_dcache_line_size |
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index dff2a0a52f8f..d38fdbf845b2 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h | |||
@@ -242,7 +242,7 @@ | |||
242 | #define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */ | 242 | #define MIPS_CPU_EJTAG 0x00008000 /* EJTAG exception */ |
243 | #define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */ | 243 | #define MIPS_CPU_NOFPUEX 0x00010000 /* no FPU exception */ |
244 | #define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */ | 244 | #define MIPS_CPU_LLSC 0x00020000 /* CPU has ll/sc instructions */ |
245 | #define MIPS_CPU_SUBSET_CACHES 0x00040000 /* P-cache subset enforced */ | 245 | #define MIPS_CPU_INCLUSIVE_CACHES 0x00040000 /* P-cache subset enforced */ |
246 | #define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */ | 246 | #define MIPS_CPU_PREFETCH 0x00080000 /* CPU has usable prefetch */ |
247 | #define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */ | 247 | #define MIPS_CPU_VINT 0x00100000 /* CPU supports MIPSR2 vectored interrupts */ |
248 | #define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */ | 248 | #define MIPS_CPU_VEIC 0x00200000 /* CPU supports MIPSR2 external interrupt controller mode */ |
diff --git a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h index e0e08fc5d7f7..c6dfa59d1986 100644 --- a/include/asm-mips/mach-cobalt/cpu-feature-overrides.h +++ b/include/asm-mips/mach-cobalt/cpu-feature-overrides.h | |||
@@ -27,7 +27,7 @@ | |||
27 | #define cpu_has_mcheck 0 | 27 | #define cpu_has_mcheck 0 |
28 | #define cpu_has_ejtag 0 | 28 | #define cpu_has_ejtag 0 |
29 | 29 | ||
30 | #define cpu_has_subset_pcaches 0 | 30 | #define cpu_has_inclusive_pcaches 0 |
31 | #define cpu_dcache_line_size() 32 | 31 | #define cpu_dcache_line_size() 32 |
32 | #define cpu_icache_line_size() 32 | 32 | #define cpu_icache_line_size() 32 |
33 | #define cpu_scache_line_size() 0 | 33 | #define cpu_scache_line_size() 0 |
diff --git a/include/asm-mips/mach-excite/cpu-feature-overrides.h b/include/asm-mips/mach-excite/cpu-feature-overrides.h index abb76b2fd865..0d31854222f9 100644 --- a/include/asm-mips/mach-excite/cpu-feature-overrides.h +++ b/include/asm-mips/mach-excite/cpu-feature-overrides.h | |||
@@ -31,7 +31,7 @@ | |||
31 | #define cpu_has_nofpuex 0 | 31 | #define cpu_has_nofpuex 0 |
32 | #define cpu_has_64bits 1 | 32 | #define cpu_has_64bits 1 |
33 | 33 | ||
34 | #define cpu_has_subset_pcaches 0 | 34 | #define cpu_has_inclusive_pcaches 0 |
35 | 35 | ||
36 | #define cpu_dcache_line_size() 32 | 36 | #define cpu_dcache_line_size() 32 |
37 | #define cpu_icache_line_size() 32 | 37 | #define cpu_icache_line_size() 32 |
diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h index 19c2d135985b..a071974b67bb 100644 --- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h | |||
@@ -34,7 +34,7 @@ | |||
34 | #define cpu_has_4kex 1 | 34 | #define cpu_has_4kex 1 |
35 | #define cpu_has_4k_cache 1 | 35 | #define cpu_has_4k_cache 1 |
36 | 36 | ||
37 | #define cpu_has_subset_pcaches 1 | 37 | #define cpu_has_inclusive_pcaches 1 |
38 | 38 | ||
39 | #define cpu_dcache_line_size() 32 | 39 | #define cpu_dcache_line_size() 32 |
40 | #define cpu_icache_line_size() 64 | 40 | #define cpu_icache_line_size() 64 |
diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h index 90ff087083b9..84b6dead0e8a 100644 --- a/include/asm-mips/mach-ja/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ja/cpu-feature-overrides.h | |||
@@ -31,7 +31,7 @@ | |||
31 | #define cpu_has_nofpuex 0 | 31 | #define cpu_has_nofpuex 0 |
32 | #define cpu_has_64bits 1 | 32 | #define cpu_has_64bits 1 |
33 | 33 | ||
34 | #define cpu_has_subset_pcaches 0 | 34 | #define cpu_has_inclusive_pcaches 0 |
35 | 35 | ||
36 | #define cpu_dcache_line_size() 32 | 36 | #define cpu_dcache_line_size() 32 |
37 | #define cpu_icache_line_size() 32 | 37 | #define cpu_icache_line_size() 32 |
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-mips/cpu-feature-overrides.h index e960679f54ba..7f3e3f9bd23a 100644 --- a/include/asm-mips/mach-mips/cpu-feature-overrides.h +++ b/include/asm-mips/mach-mips/cpu-feature-overrides.h | |||
@@ -39,7 +39,7 @@ | |||
39 | #define cpu_has_nofpuex 0 | 39 | #define cpu_has_nofpuex 0 |
40 | /* #define cpu_has_64bits ? */ | 40 | /* #define cpu_has_64bits ? */ |
41 | /* #define cpu_has_64bit_zero_reg ? */ | 41 | /* #define cpu_has_64bit_zero_reg ? */ |
42 | /* #define cpu_has_subset_pcaches ? */ | 42 | /* #define cpu_has_inclusive_pcaches ? */ |
43 | #define cpu_icache_snoops_remote_store 1 | 43 | #define cpu_icache_snoops_remote_store 1 |
44 | #endif | 44 | #endif |
45 | 45 | ||
@@ -65,7 +65,7 @@ | |||
65 | #define cpu_has_nofpuex 0 | 65 | #define cpu_has_nofpuex 0 |
66 | /* #define cpu_has_64bits ? */ | 66 | /* #define cpu_has_64bits ? */ |
67 | /* #define cpu_has_64bit_zero_reg ? */ | 67 | /* #define cpu_has_64bit_zero_reg ? */ |
68 | /* #define cpu_has_subset_pcaches ? */ | 68 | /* #define cpu_has_inclusive_pcaches ? */ |
69 | #define cpu_icache_snoops_remote_store 1 | 69 | #define cpu_icache_snoops_remote_store 1 |
70 | #endif | 70 | #endif |
71 | 71 | ||
diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h index 782b986241dd..57a12ded0613 100644 --- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h | |||
@@ -34,7 +34,7 @@ | |||
34 | #define cpu_has_nofpuex 0 | 34 | #define cpu_has_nofpuex 0 |
35 | #define cpu_has_64bits 1 | 35 | #define cpu_has_64bits 1 |
36 | 36 | ||
37 | #define cpu_has_subset_pcaches 0 | 37 | #define cpu_has_inclusive_pcaches 0 |
38 | 38 | ||
39 | #define cpu_dcache_line_size() 32 | 39 | #define cpu_dcache_line_size() 32 |
40 | #define cpu_icache_line_size() 32 | 40 | #define cpu_icache_line_size() 32 |
diff --git a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h index 193a666cd131..a25968f277a2 100644 --- a/include/asm-mips/mach-sibyte/cpu-feature-overrides.h +++ b/include/asm-mips/mach-sibyte/cpu-feature-overrides.h | |||
@@ -31,7 +31,7 @@ | |||
31 | #define cpu_has_nofpuex 0 | 31 | #define cpu_has_nofpuex 0 |
32 | #define cpu_has_64bits 1 | 32 | #define cpu_has_64bits 1 |
33 | 33 | ||
34 | #define cpu_has_subset_pcaches 0 | 34 | #define cpu_has_inclusive_pcaches 0 |
35 | 35 | ||
36 | #define cpu_dcache_line_size() 32 | 36 | #define cpu_dcache_line_size() 32 |
37 | #define cpu_icache_line_size() 32 | 37 | #define cpu_icache_line_size() 32 |
diff --git a/include/asm-mips/mach-sim/cpu-feature-overrides.h b/include/asm-mips/mach-sim/cpu-feature-overrides.h index d736bdadb6df..779b02205737 100644 --- a/include/asm-mips/mach-sim/cpu-feature-overrides.h +++ b/include/asm-mips/mach-sim/cpu-feature-overrides.h | |||
@@ -34,7 +34,7 @@ | |||
34 | #define cpu_has_nofpuex 0 | 34 | #define cpu_has_nofpuex 0 |
35 | /* #define cpu_has_64bits ? */ | 35 | /* #define cpu_has_64bits ? */ |
36 | /* #define cpu_has_64bit_zero_reg ? */ | 36 | /* #define cpu_has_64bit_zero_reg ? */ |
37 | /* #define cpu_has_subset_pcaches ? */ | 37 | /* #define cpu_has_inclusive_pcaches ? */ |
38 | #endif | 38 | #endif |
39 | 39 | ||
40 | #ifdef CONFIG_CPU_MIPS64 | 40 | #ifdef CONFIG_CPU_MIPS64 |
@@ -59,7 +59,7 @@ | |||
59 | #define cpu_has_nofpuex 0 | 59 | #define cpu_has_nofpuex 0 |
60 | /* #define cpu_has_64bits ? */ | 60 | /* #define cpu_has_64bits ? */ |
61 | /* #define cpu_has_64bit_zero_reg ? */ | 61 | /* #define cpu_has_64bit_zero_reg ? */ |
62 | /* #define cpu_has_subset_pcaches ? */ | 62 | /* #define cpu_has_inclusive_pcaches ? */ |
63 | #endif | 63 | #endif |
64 | 64 | ||
65 | #endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */ | 65 | #endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */ |
diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h index 3073542c93c7..42cebb7ce7a6 100644 --- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h +++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h | |||
@@ -31,7 +31,7 @@ | |||
31 | #define cpu_has_nofpuex 0 | 31 | #define cpu_has_nofpuex 0 |
32 | #define cpu_has_64bits 1 | 32 | #define cpu_has_64bits 1 |
33 | 33 | ||
34 | #define cpu_has_subset_pcaches 0 | 34 | #define cpu_has_inclusive_pcaches 0 |
35 | 35 | ||
36 | #define cpu_dcache_line_size() 32 | 36 | #define cpu_dcache_line_size() 32 |
37 | #define cpu_icache_line_size() 32 | 37 | #define cpu_icache_line_size() 32 |