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-rw-r--r--include/asm-arm/arch-clps711x/hardware.h117
-rw-r--r--include/asm-arm/arch-clps711x/mp1000-seprom.h77
-rw-r--r--include/asm-arm/arch-iop3xx/iop321.h2
-rw-r--r--include/asm-arm/arch-ixp2000/irqs.h35
-rw-r--r--include/asm-arm/mmu_context.h3
5 files changed, 37 insertions, 197 deletions
diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h
index f864c367c934..1386871e1a5a 100644
--- a/include/asm-arm/arch-clps711x/hardware.h
+++ b/include/asm-arm/arch-clps711x/hardware.h
@@ -235,121 +235,4 @@
235#define CEIVA_PB0_BLK_BTN (1<<0) 235#define CEIVA_PB0_BLK_BTN (1<<0)
236#endif // #if defined (CONFIG_ARCH_CEIVA) 236#endif // #if defined (CONFIG_ARCH_CEIVA)
237 237
238#if defined (CONFIG_MACH_MP1000)
239/* NOR FLASH */
240#define MP1000_NIO_BASE 0xf9000000 /* virtual */
241#define MP1000_NIO_START CS0_PHYS_BASE /* physical */
242#define MP1000_NIO_SIZE 0x00400000
243
244/* DSP Interface */
245#define MP1000_DSP_BASE 0xfa000000 /* virtual */
246#define MP1000_DSP_START CS1_PHYS_BASE /* physical */
247#define MP1000_DSP_SIZE 0x00100000
248
249/* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */
250#define MP1000_LIO_BASE 0xfb000000 /* virtual */
251#define MP1000_LIO_START CS2_PHYS_BASE /* physical */
252#define MP1000_LIO_SIZE 0x00100000
253
254/* NAND FLASH */
255#define MP1000_FIO_BASE 0xfc000000 /* virtual */
256#define MP1000_FIO_START CS3_PHYS_BASE /* physical */
257#define MP1000_FIO_SIZE 0x00800000
258
259/* Ethernet */
260#define MP1000_EIO_BASE 0xfd000000 /* virtual */
261#define MP1000_EIO_START CS4_PHYS_BASE /* physical */
262#define MP1000_EIO_SIZE 0x00100000
263
264#define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */
265#define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/
266#define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */
267#define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */
268
269/* IDE */
270#define MP1000_IDE_BASE 0xfe000000 /* virtual */
271#define MP1000_IDE_START CS5_PHYS_BASE /* physical */
272#define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */
273
274#define IRQ_HARDDISK IRQ_EINT2
275
276/*
277 * IDE registers definition
278 */
279
280#define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000)
281#define IDE_BASE_OFF (MP1000_IDE_BASE)
282
283#define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0)
284#define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2)
285#define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4)
286#define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6)
287#define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8)
288#define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa)
289#define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc)
290#define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe)
291#define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc)
292
293#define IDE_IRQ IRQ_EINT2
294
295
296#define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2))
297#define RTC_ALWAYS_BCD 0
298
299/*
300// Definitions of the bit fields in the HwPortA register for the
301// MP1000 board.
302*/
303#define HwPortAKeyboardRow1 0x00000001
304#define HwPortAKeyboardRow2 0x00000002
305#define HwPortAKeyboardRow3 0x00000004
306#define HwPortAKeyboardRow4 0x00000008
307#define HwPortAKeyboardRow5 0x00000010
308#define HwPortAKeyboardRow6 0x00000020
309#define HwPortALCDEnable 0x00000040
310#define HwPortAOffhook 0x00000080
311
312/*
313// Definitions of the bit fields in the HwPortB register for the
314// MP1000 board.
315*/
316#define HwPortBL3Mode 0x00000001
317#define HwPortBL3Clk 0x00000002
318#define HwPortBSClk 0x00000001
319#define HwPortBSData 0x00000002
320#define HwPortBL3Data 0x00000004
321#define HwPortBMute 0x00000008
322#define HwPortBQD0 0x00000010
323#define HwPortBQD1 0x00000020
324#define HwPortBQD2 0x00000040
325#define HwPortBQD3 0x00000080
326
327/*
328// Definitions of the bit fields in the HwPortD register for the
329// MP1000 board.
330*/
331#define HwPortDLED1 0x00000001
332#define HwPortDLED2 0x00000002
333#define HwPortDLED3 0x00000004
334#define HwPortDLED4 0x00000008
335#define HwPortDLED5 0x00000010
336#define HwPortDEECS 0x00000020
337#define HwPortBRTS 0x00000040
338#define HwPortBRI 0x00000080
339
340
341/*
342// Definitions of the bit fields in the HwPortE register for the
343// MP1000 board.
344*/
345
346#define HwPortECLE 0x00000001
347#define HwPortESepromDOut 0x00000001
348#define HwPortEALE 0x00000002
349#define HwPortESepromDIn 0x00000002
350#define HwPortENANDCS 0x00000004
351#define HwPortESepromCLK 0x00000004
352
353#endif // #if defined (CONFIG_MACH_MP1000)
354
355#endif 238#endif
diff --git a/include/asm-arm/arch-clps711x/mp1000-seprom.h b/include/asm-arm/arch-clps711x/mp1000-seprom.h
deleted file mode 100644
index 3e5566cf9666..000000000000
--- a/include/asm-arm/arch-clps711x/mp1000-seprom.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#ifndef MP1000_SEPROM_H
2#define MP1000_SEPROM_H
3
4/*
5 * mp1000-seprom.h
6 *
7 *
8 * This file contains the Serial EEPROM definitions for the MP1000 board
9 *
10 * Copyright (C) 2005 Comdial Corporation
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#define COMMAND_ERASE (0x1C0)
29#define COMMAND_ERASE_ALL (0x120)
30#define COMMAND_WRITE_DISABLE (0x100)
31#define COMMAND_WRITE_ENABLE (0x130)
32#define COMMAND_READ (0x180)
33#define COMMAND_WRITE (0x140)
34#define COMMAND_WRITE_ALL (0x110)
35
36//
37// Serial EEPROM data format
38//
39
40#define PACKED __attribute__ ((packed))
41
42typedef struct _EEPROM {
43 union {
44 unsigned char eprom_byte_data[128];
45 unsigned short eprom_short_data[64];
46 struct {
47 unsigned char version PACKED; // EEPROM Version "1" for now
48 unsigned char box_id PACKED; // Box ID (Standalone, SOHO, embedded, etc)
49 unsigned char major_hw_version PACKED; // Major Hardware version (Hex)
50 unsigned char minor_hw_version PACKED; // Minor Hardware Version (Hex)
51 unsigned char mfg_id[3] PACKED; // Manufacturer ID (3 character Alphabetic)
52 unsigned char mfg_serial_number[10] PACKED; // Manufacturer Serial number
53 unsigned char mfg_date[3] PACKED; // Date of Mfg (Formatted YY:MM:DD)
54 unsigned char country PACKED; // Country of deployment
55 unsigned char mac_Address[6] PACKED; // MAC Address
56 unsigned char oem_string[20] PACKED; // OEM ID string
57 unsigned short feature_bits1 PACKED; // Feature Bits 1
58 unsigned short feature_bits2 PACKED; // Feature Bits 2
59 unsigned char filler[75] PACKED; // Unused/Undefined “0” initialized
60 unsigned short checksum PACKED; // byte accumulated short checksum
61 } eprom_struct;
62 } variant;
63} eeprom_struct;
64
65/* These settings must be mutually exclusive */
66#define FEATURE_BITS1_DRAMSIZE_16MEG 0x0001 /* 0 signifies 4 MEG system */
67#define FEATURE_BITS1_DRAMSIZE_8MEG 0x0002 /* 1 in bit 1 = 8MEG system */
68#define FEATURE_BITS1_DRAMSIZE_64MEG 0x0004 /* 1 in bit 2 = 64MEG system */
69
70#define FEATURE_BITS1_CPUIS90MEG 0x0010
71
72extern void seprom_init(void);
73extern eeprom_struct* get_seprom_ptr(void);
74extern unsigned char* get_eeprom_mac_address(void);
75
76#endif /* MP1000_SEPROM_H */
77
diff --git a/include/asm-arm/arch-iop3xx/iop321.h b/include/asm-arm/arch-iop3xx/iop321.h
index 200621ff3690..f8df778a356f 100644
--- a/include/asm-arm/arch-iop3xx/iop321.h
+++ b/include/asm-arm/arch-iop3xx/iop321.h
@@ -40,7 +40,7 @@
40#define IOP321_PCI_UPPER_IO_BA (IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_WINDOW_SIZE - 1) 40#define IOP321_PCI_UPPER_IO_BA (IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_WINDOW_SIZE - 1)
41#define IOP321_PCI_IO_OFFSET (IOP321_PCI_LOWER_IO_VA - IOP321_PCI_LOWER_IO_BA) 41#define IOP321_PCI_IO_OFFSET (IOP321_PCI_LOWER_IO_VA - IOP321_PCI_LOWER_IO_BA)
42 42
43//#define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1) 43/* #define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1) */
44#define IOP321_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */ 44#define IOP321_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */
45#define IOP321_PCI_LOWER_MEM_PA 0x80000000 45#define IOP321_PCI_LOWER_MEM_PA 0x80000000
46#define IOP321_PCI_LOWER_MEM_BA (*IOP321_OMWTVR0) 46#define IOP321_PCI_LOWER_MEM_BA (*IOP321_OMWTVR0)
diff --git a/include/asm-arm/arch-ixp2000/irqs.h b/include/asm-arm/arch-ixp2000/irqs.h
index 0deb96c12adb..62f09c7ff420 100644
--- a/include/asm-arm/arch-ixp2000/irqs.h
+++ b/include/asm-arm/arch-ixp2000/irqs.h
@@ -67,12 +67,45 @@
67#define IRQ_IXP2000_PCIA 40 67#define IRQ_IXP2000_PCIA 40
68#define IRQ_IXP2000_PCIB 41 68#define IRQ_IXP2000_PCIB 41
69 69
70#define NR_IXP2000_IRQS 42 70/* Int sources from IRQ_ERROR_STATUS */
71#define IRQ_IXP2000_DRAM0_MIN_ERR 42
72#define IRQ_IXP2000_DRAM0_MAJ_ERR 43
73#define IRQ_IXP2000_DRAM1_MIN_ERR 44
74#define IRQ_IXP2000_DRAM1_MAJ_ERR 45
75#define IRQ_IXP2000_DRAM2_MIN_ERR 46
76#define IRQ_IXP2000_DRAM2_MAJ_ERR 47
77/* 48-57 reserved */
78#define IRQ_IXP2000_SRAM0_ERR 58
79#define IRQ_IXP2000_SRAM1_ERR 59
80#define IRQ_IXP2000_SRAM2_ERR 60
81#define IRQ_IXP2000_SRAM3_ERR 61
82/* 62-65 reserved */
83#define IRQ_IXP2000_MEDIA_ERR 66
84#define IRQ_IXP2000_PCI_ERR 67
85#define IRQ_IXP2000_SP_INT 68
86
87#define NR_IXP2000_IRQS 69
71 88
72#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x)) 89#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x))
73 90
74#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS)) 91#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS))
75 92
93#define IXP2000_ERR_IRQ_MASK(irq) ( 1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR))
94#define IXP2000_VALID_ERR_IRQ_MASK (\
95 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \
96 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \
97 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \
98 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \
99 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \
100 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \
101 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \
102 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \
103 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \
104 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \
105 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \
106 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \
107 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT) )
108
76/* 109/*
77 * This allows for all the on-chip sources plus up to 32 CPLD based 110 * This allows for all the on-chip sources plus up to 32 CPLD based
78 * IRQs. Should be more than enough. 111 * IRQs. Should be more than enough.
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
index 4af9c411c617..57b8def83d41 100644
--- a/include/asm-arm/mmu_context.h
+++ b/include/asm-arm/mmu_context.h
@@ -86,7 +86,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
86 cpu_set(cpu, next->cpu_vm_mask); 86 cpu_set(cpu, next->cpu_vm_mask);
87 check_context(next); 87 check_context(next);
88 cpu_switch_mm(next->pgd, next); 88 cpu_switch_mm(next->pgd, next);
89 cpu_clear(cpu, prev->cpu_vm_mask); 89 if (cache_is_vivt())
90 cpu_clear(cpu, prev->cpu_vm_mask);
90 } 91 }
91} 92}
92 93
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