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-rw-r--r--include/asm-m32r/atomic.h21
-rw-r--r--include/asm-m32r/system.h64
2 files changed, 83 insertions, 2 deletions
diff --git a/include/asm-m32r/atomic.h b/include/asm-m32r/atomic.h
index bfff69a49936..ef1fb8ea4726 100644
--- a/include/asm-m32r/atomic.h
+++ b/include/asm-m32r/atomic.h
@@ -242,6 +242,27 @@ static __inline__ int atomic_dec_return(atomic_t *v)
242 */ 242 */
243#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0) 243#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
244 244
245#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
246
247/**
248 * atomic_add_unless - add unless the number is a given value
249 * @v: pointer of type atomic_t
250 * @a: the amount to add to v...
251 * @u: ...unless v is equal to u.
252 *
253 * Atomically adds @a to @v, so long as it was not @u.
254 * Returns non-zero if @v was not @u, and zero otherwise.
255 */
256#define atomic_add_unless(v, a, u) \
257({ \
258 int c, old; \
259 c = atomic_read(v); \
260 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
261 c = old; \
262 c != (u); \
263})
264#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
265
245static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr) 266static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
246{ 267{
247 unsigned long flags; 268 unsigned long flags;
diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h
index 73348c3f858b..5eee832b73a0 100644
--- a/include/asm-m32r/system.h
+++ b/include/asm-m32r/system.h
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14#include <asm/assembler.h>
14 15
15#ifdef __KERNEL__ 16#ifdef __KERNEL__
16 17
@@ -132,8 +133,6 @@ static inline void local_irq_disable(void)
132 !(flags & 0x40); \ 133 !(flags & 0x40); \
133 }) 134 })
134 135
135#endif /* __KERNEL__ */
136
137#define nop() __asm__ __volatile__ ("nop" : : ) 136#define nop() __asm__ __volatile__ ("nop" : : )
138 137
139#define xchg(ptr,x) \ 138#define xchg(ptr,x) \
@@ -213,6 +212,67 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr,
213 return (tmp); 212 return (tmp);
214} 213}
215 214
215#define __HAVE_ARCH_CMPXCHG 1
216
217static __inline__ unsigned long
218__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
219{
220 unsigned long flags;
221 unsigned int retval;
222
223 local_irq_save(flags);
224 __asm__ __volatile__ (
225 DCACHE_CLEAR("%0", "r4", "%1")
226 M32R_LOCK" %0, @%1; \n"
227 " bne %0, %2, 1f; \n"
228 M32R_UNLOCK" %3, @%1; \n"
229 " bra 2f; \n"
230 " .fillinsn \n"
231 "1:"
232 M32R_UNLOCK" %2, @%1; \n"
233 " .fillinsn \n"
234 "2:"
235 : "=&r" (retval)
236 : "r" (p), "r" (old), "r" (new)
237 : "cbit", "memory"
238#ifdef CONFIG_CHIP_M32700_TS1
239 , "r4"
240#endif /* CONFIG_CHIP_M32700_TS1 */
241 );
242 local_irq_restore(flags);
243
244 return retval;
245}
246
247/* This function doesn't exist, so you'll get a linker error
248 if something tries to do an invalid cmpxchg(). */
249extern void __cmpxchg_called_with_bad_pointer(void);
250
251static __inline__ unsigned long
252__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
253{
254 switch (size) {
255 case 4:
256 return __cmpxchg_u32(ptr, old, new);
257#if 0 /* we don't have __cmpxchg_u64 */
258 case 8:
259 return __cmpxchg_u64(ptr, old, new);
260#endif /* 0 */
261 }
262 __cmpxchg_called_with_bad_pointer();
263 return old;
264}
265
266#define cmpxchg(ptr,o,n) \
267 ({ \
268 __typeof__(*(ptr)) _o_ = (o); \
269 __typeof__(*(ptr)) _n_ = (n); \
270 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
271 (unsigned long)_n_, sizeof(*(ptr))); \
272 })
273
274#endif /* __KERNEL__ */
275
216/* 276/*
217 * Memory barrier. 277 * Memory barrier.
218 * 278 *