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-rw-r--r--include/asm-arm/arch-imx/imx-regs.h24
-rw-r--r--include/asm-arm/arch-s3c2410/regs-nand.h44
-rw-r--r--include/asm-arm/page.h18
-rw-r--r--include/linux/serial_core.h19
4 files changed, 89 insertions, 16 deletions
diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h
index f32c203952cf..93b840e8fa60 100644
--- a/include/asm-arm/arch-imx/imx-regs.h
+++ b/include/asm-arm/arch-imx/imx-regs.h
@@ -228,6 +228,30 @@
228#define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 ) 228#define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 )
229 229
230/* 230/*
231 * PWM controller
232 */
233#define PWMC __REG(IMX_PWM_BASE + 0x00) /* PWM Control Register */
234#define PWMS __REG(IMX_PWM_BASE + 0x04) /* PWM Sample Register */
235#define PWMP __REG(IMX_PWM_BASE + 0x08) /* PWM Period Register */
236#define PWMCNT __REG(IMX_PWM_BASE + 0x0C) /* PWM Counter Register */
237
238#define PWMC_HCTR (0x01<<18) /* Halfword FIFO Data Swapping */
239#define PWMC_BCTR (0x01<<17) /* Byte FIFO Data Swapping */
240#define PWMC_SWR (0x01<<16) /* Software Reset */
241#define PWMC_CLKSRC (0x01<<15) /* Clock Source */
242#define PWMC_PRESCALER(x) (((x-1) & 0x7F) << 8) /* PRESCALER */
243#define PWMC_IRQ (0x01<< 7) /* Interrupt Request */
244#define PWMC_IRQEN (0x01<< 6) /* Interrupt Request Enable */
245#define PWMC_FIFOAV (0x01<< 5) /* FIFO Available */
246#define PWMC_EN (0x01<< 4) /* Enables/Disables the PWM */
247#define PWMC_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */
248#define PWMC_CLKSEL(x) (((x) & 0x03) << 0) /* Clock Selection */
249
250#define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */
251#define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */
252#define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */
253
254/*
231 * DMA Controller 255 * DMA Controller
232 */ 256 */
233#define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */ 257#define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */
diff --git a/include/asm-arm/arch-s3c2410/regs-nand.h b/include/asm-arm/arch-s3c2410/regs-nand.h
index c443ac834698..7cff235e667a 100644
--- a/include/asm-arm/arch-s3c2410/regs-nand.h
+++ b/include/asm-arm/arch-s3c2410/regs-nand.h
@@ -1,16 +1,17 @@
1/* linux/include/asm-arm/arch-s3c2410/regs-nand.h 1/* linux/include/asm-arm/arch-s3c2410/regs-nand.h
2 * 2 *
3 * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk> 3 * Copyright (c) 2004,2005 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/ 4 * http://www.simtec.co.uk/products/SWLINUX/
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 * 9 *
10 * S3C2410 clock register definitions 10 * S3C2410 NAND register definitions
11 * 11 *
12 * Changelog: 12 * Changelog:
13 * 18-Aug-2004 BJD Copied file from 2.4 and updated 13 * 18-Aug-2004 BJD Copied file from 2.4 and updated
14 * 01-May-2005 BJD Added definitions for s3c2440 controller
14*/ 15*/
15 16
16#ifndef __ASM_ARM_REGS_NAND 17#ifndef __ASM_ARM_REGS_NAND
@@ -26,6 +27,22 @@
26#define S3C2410_NFSTAT S3C2410_NFREG(0x10) 27#define S3C2410_NFSTAT S3C2410_NFREG(0x10)
27#define S3C2410_NFECC S3C2410_NFREG(0x14) 28#define S3C2410_NFECC S3C2410_NFREG(0x14)
28 29
30#define S3C2440_NFCONT S3C2410_NFREG(0x04)
31#define S3C2440_NFCMD S3C2410_NFREG(0x08)
32#define S3C2440_NFADDR S3C2410_NFREG(0x0C)
33#define S3C2440_NFDATA S3C2410_NFREG(0x10)
34#define S3C2440_NFECCD0 S3C2410_NFREG(0x14)
35#define S3C2440_NFECCD1 S3C2410_NFREG(0x18)
36#define S3C2440_NFECCD S3C2410_NFREG(0x1C)
37#define S3C2440_NFSTAT S3C2410_NFREG(0x20)
38#define S3C2440_NFESTAT0 S3C2410_NFREG(0x24)
39#define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
40#define S3C2440_NFMECC0 S3C2410_NFREG(0x2C)
41#define S3C2440_NFMECC1 S3C2410_NFREG(0x30)
42#define S3C2440_NFSECC S3C2410_NFREG(0x34)
43#define S3C2440_NFSBLK S3C2410_NFREG(0x38)
44#define S3C2440_NFEBLK S3C2410_NFREG(0x3C)
45
29#define S3C2410_NFCONF_EN (1<<15) 46#define S3C2410_NFCONF_EN (1<<15)
30#define S3C2410_NFCONF_512BYTE (1<<14) 47#define S3C2410_NFCONF_512BYTE (1<<14)
31#define S3C2410_NFCONF_4STEP (1<<13) 48#define S3C2410_NFCONF_4STEP (1<<13)
@@ -37,7 +54,28 @@
37 54
38#define S3C2410_NFSTAT_BUSY (1<<0) 55#define S3C2410_NFSTAT_BUSY (1<<0)
39 56
40/* think ECC can only be 8bit read? */ 57#define S3C2440_NFCONF_BUSWIDTH_8 (0<<0)
58#define S3C2440_NFCONF_BUSWIDTH_16 (1<<0)
59#define S3C2440_NFCONF_ADVFLASH (1<<3)
60#define S3C2440_NFCONF_TACLS(x) ((x)<<12)
61#define S3C2440_NFCONF_TWRPH0(x) ((x)<<8)
62#define S3C2440_NFCONF_TWRPH1(x) ((x)<<4)
63
64#define S3C2440_NFCONT_LOCKTIGHT (1<<13)
65#define S3C2440_NFCONT_SOFTLOCK (1<<12)
66#define S3C2440_NFCONT_ILLEGALACC_EN (1<<10)
67#define S3C2440_NFCONT_RNBINT_EN (1<<9)
68#define S3C2440_NFCONT_RN_FALLING (1<<8)
69#define S3C2440_NFCONT_SPARE_ECCLOCK (1<<6)
70#define S3C2440_NFCONT_MAIN_ECCLOCK (1<<5)
71#define S3C2440_NFCONT_INITECC (1<<4)
72#define S3C2440_NFCONT_nFCE (1<<1)
73#define S3C2440_NFCONT_ENABLE (1<<0)
74
75#define S3C2440_NFSTAT_READY (1<<0)
76#define S3C2440_NFSTAT_nCE (1<<1)
77#define S3C2440_NFSTAT_RnB_CHANGE (1<<2)
78#define S3C2440_NFSTAT_ILLEGAL_ACCESS (1<<3)
41 79
42#endif /* __ASM_ARM_REGS_NAND */ 80#endif /* __ASM_ARM_REGS_NAND */
43 81
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 4ca3a8e9348f..019c45d75730 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -114,19 +114,8 @@ extern void __cpu_copy_user_page(void *to, const void *from,
114 unsigned long user); 114 unsigned long user);
115#endif 115#endif
116 116
117#define clear_user_page(addr,vaddr,pg) \ 117#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr)
118 do { \ 118#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr)
119 preempt_disable(); \
120 __cpu_clear_user_page(addr, vaddr); \
121 preempt_enable(); \
122 } while (0)
123
124#define copy_user_page(to,from,vaddr,pg) \
125 do { \
126 preempt_disable(); \
127 __cpu_copy_user_page(to, from, vaddr); \
128 preempt_enable(); \
129 } while (0)
130 119
131#define clear_page(page) memzero((void *)(page), PAGE_SIZE) 120#define clear_page(page) memzero((void *)(page), PAGE_SIZE)
132extern void copy_page(void *to, const void *from); 121extern void copy_page(void *to, const void *from);
@@ -171,6 +160,9 @@ typedef unsigned long pgprot_t;
171 160
172#endif /* STRICT_MM_TYPECHECKS */ 161#endif /* STRICT_MM_TYPECHECKS */
173 162
163/* the upper-most page table pointer */
164extern pmd_t *top_pmd;
165
174/* Pure 2^n version of get_order */ 166/* Pure 2^n version of get_order */
175static inline int get_order(unsigned long size) 167static inline int get_order(unsigned long size)
176{ 168{
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index c3fb5984f250..d6025af7efac 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -479,6 +479,25 @@ uart_handle_cts_change(struct uart_port *port, unsigned int status)
479 } 479 }
480} 480}
481 481
482#include <linux/tty_flip.h>
483
484static inline void
485uart_insert_char(struct uart_port *port, unsigned int status,
486 unsigned int overrun, unsigned int ch, unsigned int flag)
487{
488 struct tty_struct *tty = port->info->tty;
489
490 if ((status & port->ignore_status_mask & ~overrun) == 0)
491 tty_insert_flip_char(tty, ch, flag);
492
493 /*
494 * Overrun is special. Since it's reported immediately,
495 * it doesn't affect the current character.
496 */
497 if (status & ~port->ignore_status_mask & overrun)
498 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
499}
500
482/* 501/*
483 * UART_ENABLE_MS - determine if port should enable modem status irqs 502 * UART_ENABLE_MS - determine if port should enable modem status irqs
484 */ 503 */