2 files changed, 28 insertions, 95 deletions

diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 745de2aac85f..a21ab29ff363 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -15,72 +15,8 @@ struct pcmcia_device;
 struct ssb_bus;
 struct ssb_driver;
 
-
-struct ssb_sprom_r1 {
-        u16 pci_spid;           /* Subsystem Product ID for PCI */
-        u16 pci_svid;           /* Subsystem Vendor ID for PCI */
-        u16 pci_pid;            /* Product ID for PCI */
-        u8 il0mac[6];           /* MAC address for 802.11b/g */
-        u8 et0mac[6];           /* MAC address for Ethernet */
-        u8 et1mac[6];           /* MAC address for 802.11a */
-        u8 et0phyaddr:5;        /* MII address for enet0 */
-        u8 et1phyaddr:5;        /* MII address for enet1 */
-        u8 et0mdcport:1;        /* MDIO for enet0 */
-        u8 et1mdcport:1;        /* MDIO for enet1 */
-        u8 board_rev;           /* Board revision */
-        u8 country_code:4;      /* Country Code */
-        u8 antenna_a:2;         /* Antenna 0/1 available for A-PHY */
-        u8 antenna_bg:2;        /* Antenna 0/1 available for B-PHY and G-PHY */
-        u16 pa0b0;
-        u16 pa0b1;
-        u16 pa0b2;
-        u16 pa1b0;
-        u16 pa1b1;
-        u16 pa1b2;
-        u8 gpio0;               /* GPIO pin 0 */
-        u8 gpio1;               /* GPIO pin 1 */
-        u8 gpio2;               /* GPIO pin 2 */
-        u8 gpio3;               /* GPIO pin 3 */
-        u16 maxpwr_a;           /* A-PHY Power Amplifier Max Power (in dBm Q5.2) */
-        u16 maxpwr_bg;          /* B/G-PHY Power Amplifier Max Power (in dBm Q5.2) */
-        u8 itssi_a;             /* Idle TSSI Target for A-PHY */
-        u8 itssi_bg;            /* Idle TSSI Target for B/G-PHY */
-        u16 boardflags_lo;      /* Boardflags (low 16 bits) */
-        u8 antenna_gain_a;      /* A-PHY Antenna gain (in dBm Q5.2) */
-        u8 antenna_gain_bg;     /* B/G-PHY Antenna gain (in dBm Q5.2) */
-        u8 oem[8];              /* OEM string (rev 1 only) */
-};
-
-struct ssb_sprom_r2 {
-        u16 boardflags_hi;      /* Boardflags (high 16 bits) */
-        u8 maxpwr_a_lo;         /* A-PHY Max Power Low */
-        u8 maxpwr_a_hi;         /* A-PHY Max Power High */
-        u16 pa1lob0;            /* A-PHY PA Low Settings */
-        u16 pa1lob1;            /* A-PHY PA Low Settings */
-        u16 pa1lob2;            /* A-PHY PA Low Settings */
-        u16 pa1hib0;            /* A-PHY PA High Settings */
-        u16 pa1hib1;            /* A-PHY PA High Settings */
-        u16 pa1hib2;            /* A-PHY PA High Settings */
-        u8 ofdm_pwr_off;        /* OFDM Power Offset from CCK Level */
-        u8 country_str[2];      /* Two char Country Code */
-};
-
-struct ssb_sprom_r3 {
-        u32 ofdmapo;            /* A-PHY OFDM Mid Power Offset */
-        u32 ofdmalpo;           /* A-PHY OFDM Low Power Offset */
-        u32 ofdmahpo;           /* A-PHY OFDM High Power Offset */
-        u8 gpioldc_on_cnt;      /* GPIO LED Powersave Duty Cycle ON count */
-        u8 gpioldc_off_cnt;     /* GPIO LED Powersave Duty Cycle OFF count */
-        u8 cckpo_1M:4;          /* CCK Power Offset for Rate 1M */
-        u8 cckpo_2M:4;          /* CCK Power Offset for Rate 2M */
-        u8 cckpo_55M:4;         /* CCK Power Offset for Rate 5.5M */
-        u8 cckpo_11M:4;         /* CCK Power Offset for Rate 11M */
-        u32 ofdmgpo;            /* G-PHY OFDM Power Offset */
-};
-
 struct ssb_sprom {
         u8 revision;
-        u8 temp_fill[2 * sizeof(struct ssb_sprom_r1)];
         u8 il0mac[6];           /* MAC address for 802.11b/g */
         u8 et0mac[6];           /* MAC address for Ethernet */
         u8 et1mac[6];           /* MAC address for 802.11a */
@@ -106,16 +42,6 @@ struct ssb_sprom {
         u8 antenna_gain_bg;     /* B/G-PHY Antenna gain (in dBm Q5.2) */
 
         /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
-        /* The valid r# fields are selected by the "revision".
-         * Revision 3 and lower inherit from lower revisions.
-         */
-        union {
-                struct {
-                        struct ssb_sprom_r1 r1;
-                        struct ssb_sprom_r2 r2;
-                        struct ssb_sprom_r3 r3;
-                };
-        };
 };
 
 /* Information about the PCB the circuitry is soldered on. */
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index 96bba69b1271..30222e89ad16 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -175,6 +175,7 @@
 #define  SSB_SPROM_REVISION_REV         0x00FF  /* SPROM Revision number */
 #define  SSB_SPROM_REVISION_CRC         0xFF00  /* SPROM CRC8 value */
 #define  SSB_SPROM_REVISION_CRC_SHIFT   8
+
 /* SPROM Revision 1 */
 #define SSB_SPROM1_SPID                 0x1004  /* Subsystem Product ID for PCI */
 #define SSB_SPROM1_SVID                 0x1006  /* Subsystem Vendor ID for PCI */
@@ -223,7 +224,7 @@
 #define  SSB_SPROM1_AGAIN_A             0x00FF  /* A-PHY */
 #define  SSB_SPROM1_AGAIN_BG            0xFF00  /* B-PHY and G-PHY */
 #define  SSB_SPROM1_AGAIN_BG_SHIFT      8
-#define SSB_SPROM1_OEM                  0x1076  /* 8 bytes OEM string (rev 1 only) */
+
 /* SPROM Revision 2 (inherits from rev 1) */
 #define SSB_SPROM2_BFLHI                0x1038  /* Boardflags (high 16 bits) */
 #define SSB_SPROM2_MAXP_A               0x103A  /* A-PHY Max Power */
@@ -240,6 +241,7 @@
 #define  SSB_SPROM2_OPO_VALUE           0x00FF
 #define  SSB_SPROM2_OPO_UNUSED          0xFF00
 #define SSB_SPROM2_CCODE                0x107C  /* Two char Country Code */
+
 /* SPROM Revision 3 (inherits most data from rev 2) */
 #define SSB_SPROM3_IL0MAC               0x104A  /* 6 bytes MAC address for 802.11b/g */
 #define SSB_SPROM3_ET0MAC               0x1050  /* 6 bytes MAC address for Ethernet ?? */
@@ -261,11 +263,12 @@
 #define  SSB_SPROM3_CCKPO_11M           0xF000  /* 11M Rate PO */
 #define  SSB_SPROM3_CCKPO_11M_SHIFT     12
 #define  SSB_SPROM3_OFDMGPO             0x107A  /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
+
 /* SPROM Revision 4             entries with ?? in comment are unknown */
-#define SSB_SPROM4_IL0MAC               0x104C  /* 6 byte MAC address for b/g */
+#define SSB_SPROM4_IL0MAC               0x104C  /* 6 byte MAC address for a/b/g/n */
 #define SSB_SPROM4_ET0MAC               0x1018  /* 6 bytes MAC address for Ethernet ?? */
 #define SSB_SPROM4_ET1MAC               0x1018  /* 6 bytes MAC address for 802.11a ?? */
-#define SSB_SPROM4_ETHPHY               0x105A  /* Ethernet PHY settings */
+#define SSB_SPROM4_ETHPHY               0x105A  /* Ethernet PHY settings ?? */
 #define  SSB_SPROM4_ETHPHY_ET0A         0x001F  /* MII Address for enet0 */
 #define  SSB_SPROM4_ETHPHY_ET1A         0x03E0  /* MII Address for enet1 */
 #define  SSB_SPROM4_ETHPHY_ET1A_SHIFT   5
@@ -280,24 +283,28 @@
 #define  SSB_SPROM4_AGAIN_1             0xFF00  /* Antenna 1 */
 #define  SSB_SPROM4_AGAIN_1_SHIFT       8
 #define SSB_SPROM4_BFLHI                0x1046  /* Board Flags Hi */
-#define SSB_SPROM4_MAXP_A               0x1000  /* Max Power A ?? */
-#define SSB_SPROM4_MAXP_A_HI            0x00FF  /* Mask for Hi */
-#define SSB_SPROM4_MAXP_A_LO            0xFF00  /* Mask for Lo */
-#define SSB_SPROM4_MAXP_A_LO_SHIFT      16      /* Shift for Lo */
-#define SSB_SPROM4_PA1LOB0              0x1000  /* ?? */
-#define SSB_SPROM4_PA1LOB1              0x1000  /* ?? */
-#define SSB_SPROM4_PA1LOB2              0x1000  /* ?? */
-#define SSB_SPROM4_PA1HIB0              0x1000  /* ?? */
-#define SSB_SPROM4_PA1HIB1              0x1000  /* ?? */
-#define SSB_SPROM4_PA1HIB2              0x1000  /* ?? */
-#define SSB_SPROM4_OPO                  0x1000  /* ?? */
-#define SSB_SPROM4_OPO_VALUE            0x0000  /* ?? */
-#define SSB_SPROM4_GPIOLDC              0x105A  /* LED Powersave Duty Cycle */
-#define  SSB_SPROM4_GPIOLDC_OFF         0x0000FF00      /* Off Count */
-#define  SSB_SPROM4_GPIOLDC_OFF_SHIFT   8
-#define  SSB_SPROM4_GPIOLDC_ON          0x00FF0000      /* On Count */
-#define  SSB_SPROM4_GPIOLDC_ON_SHIFT    16
-
+#define SSB_SPROM4_MAXP_BG              0x1080  /* Max Power BG in path 1 */
+#define  SSB_SPROM4_MAXP_BG_MASK        0x00FF  /* Mask for Max Power BG */
+#define  SSB_SPROM4_ITSSI_BG            0xFF00  /* Mask for path 1 itssi_bg */
+#define  SSB_SPROM4_ITSSI_BG_SHIFT      8
+#define SSB_SPROM4_MAXP_A               0x108A  /* Max Power A in path 1 */
+#define  SSB_SPROM4_MAXP_A_MASK         0x00FF  /* Mask for Max Power A */
+#define  SSB_SPROM4_ITSSI_A             0xFF00  /* Mask for path 1 itssi_a */
+#define  SSB_SPROM4_ITSSI_A_SHIFT       8
+#define SSB_SPROM4_GPIOA                0x1056  /* Gen. Purpose IO # 0 and 1 */
+#define  SSB_SPROM4_GPIOA_P0            0x00FF  /* Pin 0 */
+#define  SSB_SPROM4_GPIOA_P1            0xFF00  /* Pin 1 */
+#define  SSB_SPROM4_GPIOA_P1_SHIFT      8
+#define SSB_SPROM4_GPIOB                0x1058  /* Gen. Purpose IO # 2 and 3 */
+#define  SSB_SPROM4_GPIOB_P2            0x00FF  /* Pin 2 */
+#define  SSB_SPROM4_GPIOB_P3            0xFF00  /* Pin 3 */
+#define  SSB_SPROM4_GPIOB_P3_SHIFT      8
+#define SSB_SPROM4_PA0B0                0x1082  /* The paXbY locations are */
+#define SSB_SPROM4_PA0B1                0x1084  /*   only guesses */
+#define SSB_SPROM4_PA0B2                0x1086
+#define SSB_SPROM4_PA1B0                0x108E
+#define SSB_SPROM4_PA1B1                0x1090
+#define SSB_SPROM4_PA1B2                0x1092
 
 /* Values for SSB_SPROM1_BINF_CCODE */
 enum {