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-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h10
-rw-r--r--include/asm-arm/arch-versatile/entry-macro.S1
-rw-r--r--include/asm-arm/arch-versatile/platform.h23
-rw-r--r--include/asm-arm/hardware/vic.h45
-rw-r--r--include/asm-arm/mach/arch.h2
-rw-r--r--include/asm-arm/page.h7
-rw-r--r--include/asm-arm/processor.h7
-rw-r--r--include/asm-arm/ptrace.h11
-rw-r--r--include/asm-arm/stat.h11
-rw-r--r--include/asm-arm/statfs.h38
-rw-r--r--include/asm-arm/unistd.h65
11 files changed, 155 insertions, 65 deletions
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 8cf70ff160af..2b57f91b4ebd 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -26,6 +26,8 @@
26 * fc000000 da000000 16M PCI CFG0 26 * fc000000 da000000 16M PCI CFG0
27 * fd000000 d8000000 16M PCI I/O 27 * fd000000 d8000000 16M PCI I/O
28 * fe[0-7]00000 8M per-platform mappings 28 * fe[0-7]00000 8M per-platform mappings
29 * fe900000 80000000 1M SRAM #0 (first MB)
30 * fea00000 cb400000 1M SCRATCH ring get/put
29 * feb00000 c8000000 1M MSF 31 * feb00000 c8000000 1M MSF
30 * fec00000 df000000 1M PCI CSRs 32 * fec00000 df000000 1M PCI CSRs
31 * fed00000 de000000 1M PCI CREG 33 * fed00000 de000000 1M PCI CREG
@@ -91,6 +93,14 @@
91#define IXP2000_MSF_VIRT_BASE 0xfeb00000 93#define IXP2000_MSF_VIRT_BASE 0xfeb00000
92#define IXP2000_MSF_SIZE 0x00100000 94#define IXP2000_MSF_SIZE 0x00100000
93 95
96#define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000
97#define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000
98#define IXP2000_SCRATCH_RING_SIZE 0x00100000
99
100#define IXP2000_SRAM0_PHYS_BASE 0x80000000
101#define IXP2000_SRAM0_VIRT_BASE 0xfe900000
102#define IXP2000_SRAM0_SIZE 0x00100000
103
94#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 104#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000
95#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 105#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000
96#define IXP2000_PCI_IO_SIZE 0x01000000 106#define IXP2000_PCI_IO_SIZE 0x01000000
diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S
index 58f0d71759f6..feff771c0a0a 100644
--- a/include/asm-arm/arch-versatile/entry-macro.S
+++ b/include/asm-arm/arch-versatile/entry-macro.S
@@ -8,6 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <asm/hardware.h> 10#include <asm/hardware.h>
11#include <asm/hardware/vic.h>
11 12
12 .macro disable_fiq 13 .macro disable_fiq
13 .endm 14 .endm
diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h
index cbdd9fb96332..72ef874567d5 100644
--- a/include/asm-arm/arch-versatile/platform.h
+++ b/include/asm-arm/arch-versatile/platform.h
@@ -293,26 +293,7 @@
293 * VERSATILE_SYS_IC 293 * VERSATILE_SYS_IC
294 * 294 *
295 */ 295 */
296#define VIC_IRQ_STATUS 0 296/* VIC definitions in include/asm-arm/hardware/vic.h */
297#define VIC_FIQ_STATUS 0x04
298#define VIC_IRQ_RAW_STATUS 0x08
299#define VIC_INT_SELECT 0x0C /* 1 = FIQ, 0 = IRQ */
300#define VIC_IRQ_ENABLE 0x10 /* 1 = enable, 0 = disable */
301#define VIC_IRQ_ENABLE_CLEAR 0x14
302#define VIC_IRQ_SOFT 0x18
303#define VIC_IRQ_SOFT_CLEAR 0x1C
304#define VIC_PROTECT 0x20
305#define VIC_VECT_ADDR 0x30
306#define VIC_DEF_VECT_ADDR 0x34
307#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */
308#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */
309#define VIC_ITCR 0x300 /* VIC test control register */
310
311#define VIC_FIQ_RAW_STATUS 0x08
312#define VIC_FIQ_ENABLE 0x10 /* 1 = enable, 0 = disable */
313#define VIC_FIQ_ENABLE_CLEAR 0x14
314#define VIC_FIQ_SOFT 0x18
315#define VIC_FIQ_SOFT_CLEAR 0x1C
316 297
317#define SIC_IRQ_STATUS 0 298#define SIC_IRQ_STATUS 0
318#define SIC_IRQ_RAW_STATUS 0x04 299#define SIC_IRQ_RAW_STATUS 0x04
@@ -325,8 +306,6 @@
325#define SIC_INT_PIC_ENABLES 0x20 /* set interrupt pass through bits */ 306#define SIC_INT_PIC_ENABLES 0x20 /* set interrupt pass through bits */
326#define SIC_INT_PIC_ENABLEC 0x24 /* Clear interrupt pass through bits */ 307#define SIC_INT_PIC_ENABLEC 0x24 /* Clear interrupt pass through bits */
327 308
328#define VICVectCntl_Enable (1 << 5)
329
330/* ------------------------------------------------------------------------ 309/* ------------------------------------------------------------------------
331 * Interrupts - bit assignment (primary) 310 * Interrupts - bit assignment (primary)
332 * ------------------------------------------------------------------------ 311 * ------------------------------------------------------------------------
diff --git a/include/asm-arm/hardware/vic.h b/include/asm-arm/hardware/vic.h
new file mode 100644
index 000000000000..81825eb54c9e
--- /dev/null
+++ b/include/asm-arm/hardware/vic.h
@@ -0,0 +1,45 @@
1/*
2 * linux/include/asm-arm/hardware/vic.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_HARDWARE_VIC_H
21#define __ASM_ARM_HARDWARE_VIC_H
22
23#define VIC_IRQ_STATUS 0x00
24#define VIC_FIQ_STATUS 0x04
25#define VIC_RAW_STATUS 0x08
26#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */
27#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */
28#define VIC_INT_ENABLE_CLEAR 0x14
29#define VIC_INT_SOFT 0x18
30#define VIC_INT_SOFT_CLEAR 0x1c
31#define VIC_PROTECT 0x20
32#define VIC_VECT_ADDR 0x30
33#define VIC_DEF_VECT_ADDR 0x34
34
35#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */
36#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */
37#define VIC_ITCR 0x300 /* VIC test control register */
38
39#define VIC_VECT_CNTL_ENABLE (1 << 5)
40
41#ifndef __ASSEMBLY__
42void vic_init(void __iomem *base, u32 vic_sources);
43#endif
44
45#endif
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index eb262e078c46..8222bf9fc366 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -20,7 +20,7 @@ struct machine_desc {
20 * by assembler code in head-armv.S 20 * by assembler code in head-armv.S
21 */ 21 */
22 unsigned int nr; /* architecture number */ 22 unsigned int nr; /* architecture number */
23 unsigned int phys_ram; /* start of physical ram */ 23 unsigned int __deprecated phys_ram; /* start of physical ram */
24 unsigned int phys_io; /* start of physical io */ 24 unsigned int phys_io; /* start of physical io */
25 unsigned int io_pg_offst; /* byte offset for io 25 unsigned int io_pg_offst; /* byte offset for io
26 * page tabe entry */ 26 * page tabe entry */
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 4da1d532cbeb..416320d95419 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -170,6 +170,13 @@ extern pmd_t *top_pmd;
170#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 170#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
171 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 171 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
172 172
173/*
174 * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
175 */
176#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
177#define ARCH_SLAB_MINALIGN 8
178#endif
179
173#endif /* __KERNEL__ */ 180#endif /* __KERNEL__ */
174 181
175#include <asm-generic/page.h> 182#include <asm-generic/page.h>
diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h
index 31290694648b..04f4d34c6317 100644
--- a/include/asm-arm/processor.h
+++ b/include/asm-arm/processor.h
@@ -49,6 +49,12 @@ struct thread_struct {
49 49
50#define INIT_THREAD { } 50#define INIT_THREAD { }
51 51
52#ifdef CONFIG_MMU
53#define nommu_start_thread(regs) do { } while (0)
54#else
55#define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data
56#endif
57
52#define start_thread(regs,pc,sp) \ 58#define start_thread(regs,pc,sp) \
53({ \ 59({ \
54 unsigned long *stack = (unsigned long *)sp; \ 60 unsigned long *stack = (unsigned long *)sp; \
@@ -65,6 +71,7 @@ struct thread_struct {
65 regs->ARM_r2 = stack[2]; /* r2 (envp) */ \ 71 regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
66 regs->ARM_r1 = stack[1]; /* r1 (argv) */ \ 72 regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
67 regs->ARM_r0 = stack[0]; /* r0 (argc) */ \ 73 regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
74 nommu_start_thread(regs); \
68}) 75})
69 76
70/* Forward declaration, a strange C thing */ 77/* Forward declaration, a strange C thing */
diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h
index 4377e22b7e1a..77adb7fa169b 100644
--- a/include/asm-arm/ptrace.h
+++ b/include/asm-arm/ptrace.h
@@ -23,6 +23,9 @@
23#define PTRACE_OLDSETOPTIONS 21 23#define PTRACE_OLDSETOPTIONS 21
24 24
25#define PTRACE_GET_THREAD_AREA 22 25#define PTRACE_GET_THREAD_AREA 22
26
27#define PTRACE_SET_SYSCALL 23
28
26/* 29/*
27 * PSR bits 30 * PSR bits
28 */ 31 */
@@ -60,9 +63,11 @@
60 63
61#ifndef __ASSEMBLY__ 64#ifndef __ASSEMBLY__
62 65
63/* this struct defines the way the registers are stored on the 66/*
64 stack during a system call. */ 67 * This struct defines the way the registers are stored on the
65 68 * stack during a system call. Note that sizeof(struct pt_regs)
69 * has to be a multiple of 8.
70 */
66struct pt_regs { 71struct pt_regs {
67 long uregs[18]; 72 long uregs[18];
68}; 73};
diff --git a/include/asm-arm/stat.h b/include/asm-arm/stat.h
index ec4e2c2e3b47..42c0c13999d5 100644
--- a/include/asm-arm/stat.h
+++ b/include/asm-arm/stat.h
@@ -70,14 +70,7 @@ struct stat64 {
70 70
71 long long st_size; 71 long long st_size;
72 unsigned long st_blksize; 72 unsigned long st_blksize;
73 73 unsigned long long st_blocks; /* Number 512-byte blocks allocated. */
74#if defined(__ARMEB__)
75 unsigned long __pad4; /* Future possible st_blocks hi bits */
76 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
77#else /* Must be little */
78 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
79 unsigned long __pad4; /* Future possible st_blocks hi bits */
80#endif
81 74
82 unsigned long st_atime; 75 unsigned long st_atime;
83 unsigned long st_atime_nsec; 76 unsigned long st_atime_nsec;
@@ -89,6 +82,6 @@ struct stat64 {
89 unsigned long st_ctime_nsec; 82 unsigned long st_ctime_nsec;
90 83
91 unsigned long long st_ino; 84 unsigned long long st_ino;
92} __attribute__((packed)); 85};
93 86
94#endif 87#endif
diff --git a/include/asm-arm/statfs.h b/include/asm-arm/statfs.h
index e81f82783b87..a02e6a8c3d70 100644
--- a/include/asm-arm/statfs.h
+++ b/include/asm-arm/statfs.h
@@ -1,6 +1,42 @@
1#ifndef _ASMARM_STATFS_H 1#ifndef _ASMARM_STATFS_H
2#define _ASMARM_STATFS_H 2#define _ASMARM_STATFS_H
3 3
4#include <asm-generic/statfs.h> 4#ifndef __KERNEL_STRICT_NAMES
5# include <linux/types.h>
6typedef __kernel_fsid_t fsid_t;
7#endif
8
9struct statfs {
10 __u32 f_type;
11 __u32 f_bsize;
12 __u32 f_blocks;
13 __u32 f_bfree;
14 __u32 f_bavail;
15 __u32 f_files;
16 __u32 f_ffree;
17 __kernel_fsid_t f_fsid;
18 __u32 f_namelen;
19 __u32 f_frsize;
20 __u32 f_spare[5];
21};
22
23/*
24 * With EABI there is 4 bytes of padding added to this structure.
25 * Let's pack it so the padding goes away to simplify dual ABI support.
26 * Note that user space does NOT have to pack this structure.
27 */
28struct statfs64 {
29 __u32 f_type;
30 __u32 f_bsize;
31 __u64 f_blocks;
32 __u64 f_bfree;
33 __u64 f_bavail;
34 __u64 f_files;
35 __u64 f_ffree;
36 __kernel_fsid_t f_fsid;
37 __u32 f_namelen;
38 __u32 f_frsize;
39 __u32 f_spare[5];
40} __attribute__ ((packed,aligned(4)));
5 41
6#endif 42#endif
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index d626e70faded..77430d6178ae 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -15,10 +15,12 @@
15 15
16#include <linux/linkage.h> 16#include <linux/linkage.h>
17 17
18#if defined(__thumb__) 18#define __NR_OABI_SYSCALL_BASE 0x900000
19
20#if defined(__thumb__) || defined(__ARM_EABI__)
19#define __NR_SYSCALL_BASE 0 21#define __NR_SYSCALL_BASE 0
20#else 22#else
21#define __NR_SYSCALL_BASE 0x900000 23#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
22#endif 24#endif
23 25
24/* 26/*
@@ -373,13 +375,13 @@
373#define __sys1(x) __sys2(x) 375#define __sys1(x) __sys2(x)
374 376
375#ifndef __syscall 377#ifndef __syscall
376#if defined(__thumb__) 378#if defined(__thumb__) || defined(__ARM_EABI__)
377#define __syscall(name) \ 379#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name;
378 "push {r7}\n\t" \ 380#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs
379 "mov r7, #" __sys1(__NR_##name) "\n\t" \ 381#define __syscall(name) "swi\t0"
380 "swi 0\n\t" \
381 "pop {r7}"
382#else 382#else
383#define __SYS_REG(name)
384#define __SYS_REG_LIST(regs...) regs
383#define __syscall(name) "swi\t" __sys1(__NR_##name) "" 385#define __syscall(name) "swi\t" __sys1(__NR_##name) ""
384#endif 386#endif
385#endif 387#endif
@@ -395,33 +397,34 @@ do { \
395 397
396#define _syscall0(type,name) \ 398#define _syscall0(type,name) \
397type name(void) { \ 399type name(void) { \
400 __SYS_REG(name) \
398 register long __res_r0 __asm__("r0"); \ 401 register long __res_r0 __asm__("r0"); \
399 long __res; \ 402 long __res; \
400 __asm__ __volatile__ ( \ 403 __asm__ __volatile__ ( \
401 __syscall(name) \ 404 __syscall(name) \
402 : "=r" (__res_r0) \ 405 : "=r" (__res_r0) \
403 : \ 406 : __SYS_REG_LIST() ); \
404 : "lr"); \
405 __res = __res_r0; \ 407 __res = __res_r0; \
406 __syscall_return(type,__res); \ 408 __syscall_return(type,__res); \
407} 409}
408 410
409#define _syscall1(type,name,type1,arg1) \ 411#define _syscall1(type,name,type1,arg1) \
410type name(type1 arg1) { \ 412type name(type1 arg1) { \
413 __SYS_REG(name) \
411 register long __r0 __asm__("r0") = (long)arg1; \ 414 register long __r0 __asm__("r0") = (long)arg1; \
412 register long __res_r0 __asm__("r0"); \ 415 register long __res_r0 __asm__("r0"); \
413 long __res; \ 416 long __res; \
414 __asm__ __volatile__ ( \ 417 __asm__ __volatile__ ( \
415 __syscall(name) \ 418 __syscall(name) \
416 : "=r" (__res_r0) \ 419 : "=r" (__res_r0) \
417 : "r" (__r0) \ 420 : __SYS_REG_LIST( "0" (__r0) ) ); \
418 : "lr"); \
419 __res = __res_r0; \ 421 __res = __res_r0; \
420 __syscall_return(type,__res); \ 422 __syscall_return(type,__res); \
421} 423}
422 424
423#define _syscall2(type,name,type1,arg1,type2,arg2) \ 425#define _syscall2(type,name,type1,arg1,type2,arg2) \
424type name(type1 arg1,type2 arg2) { \ 426type name(type1 arg1,type2 arg2) { \
427 __SYS_REG(name) \
425 register long __r0 __asm__("r0") = (long)arg1; \ 428 register long __r0 __asm__("r0") = (long)arg1; \
426 register long __r1 __asm__("r1") = (long)arg2; \ 429 register long __r1 __asm__("r1") = (long)arg2; \
427 register long __res_r0 __asm__("r0"); \ 430 register long __res_r0 __asm__("r0"); \
@@ -429,8 +432,7 @@ type name(type1 arg1,type2 arg2) { \
429 __asm__ __volatile__ ( \ 432 __asm__ __volatile__ ( \
430 __syscall(name) \ 433 __syscall(name) \
431 : "=r" (__res_r0) \ 434 : "=r" (__res_r0) \
432 : "r" (__r0),"r" (__r1) \ 435 : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) ); \
433 : "lr"); \
434 __res = __res_r0; \ 436 __res = __res_r0; \
435 __syscall_return(type,__res); \ 437 __syscall_return(type,__res); \
436} 438}
@@ -438,6 +440,7 @@ type name(type1 arg1,type2 arg2) { \
438 440
439#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ 441#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
440type name(type1 arg1,type2 arg2,type3 arg3) { \ 442type name(type1 arg1,type2 arg2,type3 arg3) { \
443 __SYS_REG(name) \
441 register long __r0 __asm__("r0") = (long)arg1; \ 444 register long __r0 __asm__("r0") = (long)arg1; \
442 register long __r1 __asm__("r1") = (long)arg2; \ 445 register long __r1 __asm__("r1") = (long)arg2; \
443 register long __r2 __asm__("r2") = (long)arg3; \ 446 register long __r2 __asm__("r2") = (long)arg3; \
@@ -446,8 +449,7 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \
446 __asm__ __volatile__ ( \ 449 __asm__ __volatile__ ( \
447 __syscall(name) \ 450 __syscall(name) \
448 : "=r" (__res_r0) \ 451 : "=r" (__res_r0) \
449 : "r" (__r0),"r" (__r1),"r" (__r2) \ 452 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) ); \
450 : "lr"); \
451 __res = __res_r0; \ 453 __res = __res_r0; \
452 __syscall_return(type,__res); \ 454 __syscall_return(type,__res); \
453} 455}
@@ -455,6 +457,7 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \
455 457
456#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\ 458#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\
457type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ 459type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
460 __SYS_REG(name) \
458 register long __r0 __asm__("r0") = (long)arg1; \ 461 register long __r0 __asm__("r0") = (long)arg1; \
459 register long __r1 __asm__("r1") = (long)arg2; \ 462 register long __r1 __asm__("r1") = (long)arg2; \
460 register long __r2 __asm__("r2") = (long)arg3; \ 463 register long __r2 __asm__("r2") = (long)arg3; \
@@ -464,8 +467,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
464 __asm__ __volatile__ ( \ 467 __asm__ __volatile__ ( \
465 __syscall(name) \ 468 __syscall(name) \
466 : "=r" (__res_r0) \ 469 : "=r" (__res_r0) \
467 : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3) \ 470 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) ); \
468 : "lr"); \
469 __res = __res_r0; \ 471 __res = __res_r0; \
470 __syscall_return(type,__res); \ 472 __syscall_return(type,__res); \
471} 473}
@@ -473,6 +475,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
473 475
474#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ 476#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
475type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \ 477type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
478 __SYS_REG(name) \
476 register long __r0 __asm__("r0") = (long)arg1; \ 479 register long __r0 __asm__("r0") = (long)arg1; \
477 register long __r1 __asm__("r1") = (long)arg2; \ 480 register long __r1 __asm__("r1") = (long)arg2; \
478 register long __r2 __asm__("r2") = (long)arg3; \ 481 register long __r2 __asm__("r2") = (long)arg3; \
@@ -483,14 +486,15 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
483 __asm__ __volatile__ ( \ 486 __asm__ __volatile__ ( \
484 __syscall(name) \ 487 __syscall(name) \
485 : "=r" (__res_r0) \ 488 : "=r" (__res_r0) \
486 : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3),"r" (__r4) \ 489 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
487 : "lr"); \ 490 "r" (__r3), "r" (__r4) ) ); \
488 __res = __res_r0; \ 491 __res = __res_r0; \
489 __syscall_return(type,__res); \ 492 __syscall_return(type,__res); \
490} 493}
491 494
492#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ 495#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \
493type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) { \ 496type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) { \
497 __SYS_REG(name) \
494 register long __r0 __asm__("r0") = (long)arg1; \ 498 register long __r0 __asm__("r0") = (long)arg1; \
495 register long __r1 __asm__("r1") = (long)arg2; \ 499 register long __r1 __asm__("r1") = (long)arg2; \
496 register long __r2 __asm__("r2") = (long)arg3; \ 500 register long __r2 __asm__("r2") = (long)arg3; \
@@ -502,30 +506,33 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
502 __asm__ __volatile__ ( \ 506 __asm__ __volatile__ ( \
503 __syscall(name) \ 507 __syscall(name) \
504 : "=r" (__res_r0) \ 508 : "=r" (__res_r0) \
505 : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3), "r" (__r4),"r" (__r5) \ 509 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
506 : "lr"); \ 510 "r" (__r3), "r" (__r4), "r" (__r5) ) ); \
507 __res = __res_r0; \ 511 __res = __res_r0; \
508 __syscall_return(type,__res); \ 512 __syscall_return(type,__res); \
509} 513}
510 514
511#ifdef __KERNEL__ 515#ifdef __KERNEL__
512#define __ARCH_WANT_IPC_PARSE_VERSION 516#define __ARCH_WANT_IPC_PARSE_VERSION
513#define __ARCH_WANT_OLD_READDIR
514#define __ARCH_WANT_STAT64 517#define __ARCH_WANT_STAT64
515#define __ARCH_WANT_SYS_ALARM
516#define __ARCH_WANT_SYS_GETHOSTNAME 518#define __ARCH_WANT_SYS_GETHOSTNAME
517#define __ARCH_WANT_SYS_PAUSE 519#define __ARCH_WANT_SYS_PAUSE
518#define __ARCH_WANT_SYS_TIME
519#define __ARCH_WANT_SYS_UTIME
520#define __ARCH_WANT_SYS_SOCKETCALL
521#define __ARCH_WANT_SYS_GETPGRP 520#define __ARCH_WANT_SYS_GETPGRP
522#define __ARCH_WANT_SYS_LLSEEK 521#define __ARCH_WANT_SYS_LLSEEK
523#define __ARCH_WANT_SYS_NICE 522#define __ARCH_WANT_SYS_NICE
524#define __ARCH_WANT_SYS_OLD_GETRLIMIT
525#define __ARCH_WANT_SYS_OLDUMOUNT
526#define __ARCH_WANT_SYS_SIGPENDING 523#define __ARCH_WANT_SYS_SIGPENDING
527#define __ARCH_WANT_SYS_SIGPROCMASK 524#define __ARCH_WANT_SYS_SIGPROCMASK
528#define __ARCH_WANT_SYS_RT_SIGACTION 525#define __ARCH_WANT_SYS_RT_SIGACTION
526
527#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
528#define __ARCH_WANT_SYS_TIME
529#define __ARCH_WANT_SYS_OLDUMOUNT
530#define __ARCH_WANT_SYS_ALARM
531#define __ARCH_WANT_SYS_UTIME
532#define __ARCH_WANT_SYS_OLD_GETRLIMIT
533#define __ARCH_WANT_OLD_READDIR
534#define __ARCH_WANT_SYS_SOCKETCALL
535#endif
529#endif 536#endif
530 537
531#ifdef __KERNEL_SYSCALLS__ 538#ifdef __KERNEL_SYSCALLS__
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-03 12:17:38 -0500