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-rw-r--r--include/asm-arm/fpstate.h4
-rw-r--r--include/asm-arm/system.h3
-rw-r--r--include/asm-arm/thread_info.h2
-rw-r--r--include/asm-arm/tlbflush.h6
-rw-r--r--include/asm-generic/unaligned.h4
-rw-r--r--include/asm-i386/apic.h2
-rw-r--r--include/asm-m68k/atomic.h35
-rw-r--r--include/asm-mips/cpu-features.h3
-rw-r--r--include/asm-mips/cpu-info.h1
-rw-r--r--include/asm-mips/hazards.h180
-rw-r--r--include/asm-mips/io.h18
-rw-r--r--include/asm-mips/r4kcache.h3
-rw-r--r--include/asm-mips/sibyte/sb1250.h2
-rw-r--r--include/asm-mips/sibyte/sb1250_scd.h5
-rw-r--r--include/asm-mips/vga.h3
-rw-r--r--include/asm-powerpc/cputable.h2
-rw-r--r--include/asm-powerpc/eeh.h2
-rw-r--r--include/asm-powerpc/kexec.h3
-rw-r--r--include/asm-powerpc/pgtable-4k.h2
-rw-r--r--include/asm-powerpc/ppc-pci.h1
-rw-r--r--include/asm-powerpc/thread_info.h8
-rw-r--r--include/linux/compat_ioctl.h2
-rw-r--r--include/linux/file.h2
-rw-r--r--include/linux/fs.h6
-rw-r--r--include/linux/gfp.h4
-rw-r--r--include/linux/pci_ids.h1
-rw-r--r--include/linux/percpu_counter.h6
-rw-r--r--include/linux/rcupdate.h6
-rw-r--r--include/linux/sched.h1
-rw-r--r--include/net/ax25.h9
-rw-r--r--include/net/sock.h2
31 files changed, 218 insertions, 110 deletions
diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h
index f7430e3aa55d..6246bf83627d 100644
--- a/include/asm-arm/fpstate.h
+++ b/include/asm-arm/fpstate.h
@@ -55,8 +55,10 @@ struct fp_soft_struct {
55 unsigned int save[FP_SOFT_SIZE]; /* undefined information */ 55 unsigned int save[FP_SOFT_SIZE]; /* undefined information */
56}; 56};
57 57
58#define IWMMXT_SIZE 0x98
59
58struct iwmmxt_struct { 60struct iwmmxt_struct {
59 unsigned int save[0x98/sizeof(int) + 1]; 61 unsigned int save[IWMMXT_SIZE / sizeof(unsigned int)];
60}; 62};
61 63
62union fp_state { 64union fp_state {
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index eb2de8c10515..ec91d1ff032a 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -415,6 +415,9 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
415 return ret; 415 return ret;
416} 416}
417 417
418extern void disable_hlt(void);
419extern void enable_hlt(void);
420
418#endif /* __ASSEMBLY__ */ 421#endif /* __ASSEMBLY__ */
419 422
420#define arch_align_stack(x) (x) 423#define arch_align_stack(x) (x)
diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h
index 33a33cbb6329..cfbccb63c67b 100644
--- a/include/asm-arm/thread_info.h
+++ b/include/asm-arm/thread_info.h
@@ -59,7 +59,7 @@ struct thread_info {
59 struct cpu_context_save cpu_context; /* cpu context */ 59 struct cpu_context_save cpu_context; /* cpu context */
60 __u8 used_cp[16]; /* thread used copro */ 60 __u8 used_cp[16]; /* thread used copro */
61 unsigned long tp_value; 61 unsigned long tp_value;
62 union fp_state fpstate; 62 union fp_state fpstate __attribute__((aligned(8)));
63 union vfp_state vfpstate; 63 union vfp_state vfpstate;
64 struct restart_block restart_block; 64 struct restart_block restart_block;
65}; 65};
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 9387a5e1ffe0..0c2acc944a0a 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -340,6 +340,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
340 asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); 340 asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr));
341 if (tlb_flag(TLB_V6_I_PAGE)) 341 if (tlb_flag(TLB_V6_I_PAGE))
342 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); 342 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr));
343
344 /* The ARM ARM states that the completion of a TLB maintenance
345 * operation is only guaranteed by a DSB instruction
346 */
347 if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE))
348 asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero));
343} 349}
344 350
345/* 351/*
diff --git a/include/asm-generic/unaligned.h b/include/asm-generic/unaligned.h
index 4dc8ddb401c1..09ec447fe2af 100644
--- a/include/asm-generic/unaligned.h
+++ b/include/asm-generic/unaligned.h
@@ -78,7 +78,7 @@ static inline void __ustw(__u16 val, __u16 *addr)
78 78
79#define __get_unaligned(ptr, size) ({ \ 79#define __get_unaligned(ptr, size) ({ \
80 const void *__gu_p = ptr; \ 80 const void *__gu_p = ptr; \
81 __typeof__(*(ptr)) val; \ 81 __u64 val; \
82 switch (size) { \ 82 switch (size) { \
83 case 1: \ 83 case 1: \
84 val = *(const __u8 *)__gu_p; \ 84 val = *(const __u8 *)__gu_p; \
@@ -95,7 +95,7 @@ static inline void __ustw(__u16 val, __u16 *addr)
95 default: \ 95 default: \
96 bad_unaligned_access_length(); \ 96 bad_unaligned_access_length(); \
97 }; \ 97 }; \
98 val; \ 98 (__typeof__(*(ptr)))val; \
99}) 99})
100 100
101#define __put_unaligned(val, ptr, size) \ 101#define __put_unaligned(val, ptr, size) \
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h
index d30b8571573f..ff9ac8d19eb2 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-i386/apic.h
@@ -137,6 +137,8 @@ void switch_APIC_timer_to_ipi(void *cpumask);
137void switch_ipi_to_APIC_timer(void *cpumask); 137void switch_ipi_to_APIC_timer(void *cpumask);
138#define ARCH_APICTIMER_STOPS_ON_C3 1 138#define ARCH_APICTIMER_STOPS_ON_C3 1
139 139
140extern int timer_over_8254;
141
140#else /* !CONFIG_X86_LOCAL_APIC */ 142#else /* !CONFIG_X86_LOCAL_APIC */
141static inline void lapic_shutdown(void) { } 143static inline void lapic_shutdown(void) { }
142 144
diff --git a/include/asm-m68k/atomic.h b/include/asm-m68k/atomic.h
index a4a84d5c65d5..862e497c2645 100644
--- a/include/asm-m68k/atomic.h
+++ b/include/asm-m68k/atomic.h
@@ -55,6 +55,7 @@ static inline int atomic_inc_and_test(atomic_t *v)
55} 55}
56 56
57#ifdef CONFIG_RMW_INSNS 57#ifdef CONFIG_RMW_INSNS
58
58static inline int atomic_add_return(int i, atomic_t *v) 59static inline int atomic_add_return(int i, atomic_t *v)
59{ 60{
60 int t, tmp; 61 int t, tmp;
@@ -82,7 +83,12 @@ static inline int atomic_sub_return(int i, atomic_t *v)
82 : "g" (i), "2" (atomic_read(v))); 83 : "g" (i), "2" (atomic_read(v)));
83 return t; 84 return t;
84} 85}
86
87#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
88#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
89
85#else /* !CONFIG_RMW_INSNS */ 90#else /* !CONFIG_RMW_INSNS */
91
86static inline int atomic_add_return(int i, atomic_t * v) 92static inline int atomic_add_return(int i, atomic_t * v)
87{ 93{
88 unsigned long flags; 94 unsigned long flags;
@@ -110,6 +116,32 @@ static inline int atomic_sub_return(int i, atomic_t * v)
110 116
111 return t; 117 return t;
112} 118}
119
120static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
121{
122 unsigned long flags;
123 int prev;
124
125 local_irq_save(flags);
126 prev = atomic_read(v);
127 if (prev == old)
128 atomic_set(v, new);
129 local_irq_restore(flags);
130 return prev;
131}
132
133static inline int atomic_xchg(atomic_t *v, int new)
134{
135 unsigned long flags;
136 int prev;
137
138 local_irq_save(flags);
139 prev = atomic_read(v);
140 atomic_set(v, new);
141 local_irq_restore(flags);
142 return prev;
143}
144
113#endif /* !CONFIG_RMW_INSNS */ 145#endif /* !CONFIG_RMW_INSNS */
114 146
115#define atomic_dec_return(v) atomic_sub_return(1, (v)) 147#define atomic_dec_return(v) atomic_sub_return(1, (v))
@@ -139,9 +171,6 @@ static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
139 __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask)); 171 __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
140} 172}
141 173
142#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
143#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
144
145#define atomic_add_unless(v, a, u) \ 174#define atomic_add_unless(v, a, u) \
146({ \ 175({ \
147 int c, old; \ 176 int c, old; \
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 78c9cc2735d5..3f2b6d9ac45e 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -96,6 +96,9 @@
96#ifndef cpu_has_ic_fills_f_dc 96#ifndef cpu_has_ic_fills_f_dc
97#define cpu_has_ic_fills_f_dc (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC) 97#define cpu_has_ic_fills_f_dc (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC)
98#endif 98#endif
99#ifndef cpu_has_pindexed_dcache
100#define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
101#endif
99 102
100/* 103/*
101 * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors 104 * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index d5cf519f8fcc..140be1c67da7 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -39,6 +39,7 @@ struct cache_desc {
39#define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */ 39#define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */
40#define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */ 40#define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */
41#define MIPS_IC_SNOOPS_REMOTE 0x00000010 /* Ic snoops remote stores */ 41#define MIPS_IC_SNOOPS_REMOTE 0x00000010 /* Ic snoops remote stores */
42#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */
42 43
43struct cpuinfo_mips { 44struct cpuinfo_mips {
44 unsigned long udelay_val; 45 unsigned long udelay_val;
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 6111a0ce58c4..feb29a793888 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -3,7 +3,9 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2003, 2004 Ralf Baechle 6 * Copyright (C) 2003, 2004 Ralf Baechle <ralf@linux-mips.org>
7 * Copyright (C) MIPS Technologies, Inc.
8 * written by Ralf Baechle <ralf@linux-mips.org>
7 */ 9 */
8#ifndef _ASM_HAZARDS_H 10#ifndef _ASM_HAZARDS_H
9#define _ASM_HAZARDS_H 11#define _ASM_HAZARDS_H
@@ -74,8 +76,7 @@
74#define irq_disable_hazard 76#define irq_disable_hazard
75 _ehb 77 _ehb
76 78
77#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \ 79#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
78 defined(CONFIG_CPU_SB1)
79 80
80/* 81/*
81 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. 82 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
@@ -99,13 +100,13 @@
99#else /* __ASSEMBLY__ */ 100#else /* __ASSEMBLY__ */
100 101
101__asm__( 102__asm__(
102 " .macro _ssnop \n\t" 103 " .macro _ssnop \n"
103 " sll $0, $0, 1 \n\t" 104 " sll $0, $0, 1 \n"
104 " .endm \n\t" 105 " .endm \n"
105 " \n\t" 106 " \n"
106 " .macro _ehb \n\t" 107 " .macro _ehb \n"
107 " sll $0, $0, 3 \n\t" 108 " sll $0, $0, 3 \n"
108 " .endm \n\t"); 109 " .endm \n");
109 110
110#ifdef CONFIG_CPU_RM9000 111#ifdef CONFIG_CPU_RM9000
111 112
@@ -117,17 +118,21 @@ __asm__(
117 118
118#define mtc0_tlbw_hazard() \ 119#define mtc0_tlbw_hazard() \
119 __asm__ __volatile__( \ 120 __asm__ __volatile__( \
120 ".set\tmips32\n\t" \ 121 " .set mips32 \n" \
121 "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ 122 " _ssnop \n" \
122 ".set\tmips0") 123 " _ssnop \n" \
124 " _ssnop \n" \
125 " _ssnop \n" \
126 " .set mips0 \n")
123 127
124#define tlbw_use_hazard() \ 128#define tlbw_use_hazard() \
125 __asm__ __volatile__( \ 129 __asm__ __volatile__( \
126 ".set\tmips32\n\t" \ 130 " .set mips32 \n" \
127 "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ 131 " _ssnop \n" \
128 ".set\tmips0") 132 " _ssnop \n" \
129 133 " _ssnop \n" \
130#define back_to_back_c0_hazard() do { } while (0) 134 " _ssnop \n" \
135 " .set mips0 \n")
131 136
132#else 137#else
133 138
@@ -136,15 +141,25 @@ __asm__(
136 */ 141 */
137#define mtc0_tlbw_hazard() \ 142#define mtc0_tlbw_hazard() \
138 __asm__ __volatile__( \ 143 __asm__ __volatile__( \
139 ".set noreorder\n\t" \ 144 " .set noreorder \n" \
140 "nop; nop; nop; nop; nop; nop;\n\t" \ 145 " nop \n" \
141 ".set reorder\n\t") 146 " nop \n" \
147 " nop \n" \
148 " nop \n" \
149 " nop \n" \
150 " nop \n" \
151 " .set reorder \n")
142 152
143#define tlbw_use_hazard() \ 153#define tlbw_use_hazard() \
144 __asm__ __volatile__( \ 154 __asm__ __volatile__( \
145 ".set noreorder\n\t" \ 155 " .set noreorder \n" \
146 "nop; nop; nop; nop; nop; nop;\n\t" \ 156 " nop \n" \
147 ".set reorder\n\t") 157 " nop \n" \
158 " nop \n" \
159 " nop \n" \
160 " nop \n" \
161 " nop \n" \
162 " .set reorder \n")
148 163
149#endif 164#endif
150 165
@@ -156,49 +171,26 @@ __asm__(
156 171
157#ifdef CONFIG_CPU_MIPSR2 172#ifdef CONFIG_CPU_MIPSR2
158 173
159__asm__( 174__asm__(" .macro irq_enable_hazard \n"
160 " .macro\tirq_enable_hazard \n\t" 175 " _ehb \n"
161 " _ehb \n\t" 176 " .endm \n"
162 " .endm \n\t" 177 " \n"
163 " \n\t" 178 " .macro irq_disable_hazard \n"
164 " .macro\tirq_disable_hazard \n\t" 179 " _ehb \n"
165 " _ehb \n\t" 180 " .endm \n");
166 " .endm \n\t"
167 " \n\t"
168 " .macro\tback_to_back_c0_hazard \n\t"
169 " _ehb \n\t"
170 " .endm");
171
172#define irq_enable_hazard() \
173 __asm__ __volatile__( \
174 "irq_enable_hazard")
175 181
176#define irq_disable_hazard() \ 182#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
177 __asm__ __volatile__( \
178 "irq_disable_hazard")
179
180#define back_to_back_c0_hazard() \
181 __asm__ __volatile__( \
182 "back_to_back_c0_hazard")
183
184#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \
185 defined(CONFIG_CPU_SB1)
186 183
187/* 184/*
188 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. 185 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
189 */ 186 */
190 187
191__asm__( 188__asm__(
192 " .macro\tirq_enable_hazard \n\t" 189 " .macro irq_enable_hazard \n"
193 " .endm \n\t" 190 " .endm \n"
194 " \n\t" 191 " \n"
195 " .macro\tirq_disable_hazard \n\t" 192 " .macro irq_disable_hazard \n"
196 " .endm"); 193 " .endm \n");
197
198#define irq_enable_hazard() do { } while (0)
199#define irq_disable_hazard() do { } while (0)
200
201#define back_to_back_c0_hazard() do { } while (0)
202 194
203#else 195#else
204 196
@@ -209,29 +201,63 @@ __asm__(
209 */ 201 */
210 202
211__asm__( 203__asm__(
212 " # \n\t" 204 " # \n"
213 " # There is a hazard but we do not care \n\t" 205 " # There is a hazard but we do not care \n"
214 " # \n\t" 206 " # \n"
215 " .macro\tirq_enable_hazard \n\t" 207 " .macro\tirq_enable_hazard \n"
216 " .endm \n\t" 208 " .endm \n"
217 " \n\t" 209 " \n"
218 " .macro\tirq_disable_hazard \n\t" 210 " .macro\tirq_disable_hazard \n"
219 " _ssnop; _ssnop; _ssnop \n\t" 211 " _ssnop \n"
220 " .endm"); 212 " _ssnop \n"
213 " _ssnop \n"
214 " .endm \n");
221 215
222#define irq_enable_hazard() do { } while (0) 216#endif
217
218#define irq_enable_hazard() \
219 __asm__ __volatile__("irq_enable_hazard")
223#define irq_disable_hazard() \ 220#define irq_disable_hazard() \
224 __asm__ __volatile__( \ 221 __asm__ __volatile__("irq_disable_hazard")
225 "irq_disable_hazard")
226 222
227#define back_to_back_c0_hazard() \ 223
228 __asm__ __volatile__( \ 224/*
229 " .set noreorder \n" \ 225 * Back-to-back hazards -
230 " nop; nop; nop \n" \ 226 *
231 " .set reorder \n") 227 * What is needed to separate a move to cp0 from a subsequent read from the
228 * same cp0 register?
229 */
230#ifdef CONFIG_CPU_MIPSR2
231
232__asm__(" .macro back_to_back_c0_hazard \n"
233 " _ehb \n"
234 " .endm \n");
235
236#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000) || \
237 defined(CONFIG_CPU_SB1)
238
239__asm__(" .macro back_to_back_c0_hazard \n"
240 " .endm \n");
241
242#else
243
244__asm__(" .macro back_to_back_c0_hazard \n"
245 " .set noreorder \n"
246 " _ssnop \n"
247 " _ssnop \n"
248 " _ssnop \n"
249 " .set reorder \n"
250 " .endm");
232 251
233#endif 252#endif
234 253
254#define back_to_back_c0_hazard() \
255 __asm__ __volatile__("back_to_back_c0_hazard")
256
257
258/*
259 * Instruction execution hazard
260 */
235#ifdef CONFIG_CPU_MIPSR2 261#ifdef CONFIG_CPU_MIPSR2
236/* 262/*
237 * gcc has a tradition of misscompiling the previous construct using the 263 * gcc has a tradition of misscompiling the previous construct using the
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 8c011aa61afa..ba1d7bbc15d2 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -4,7 +4,7 @@
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1994, 1995 Waldorf GmbH 6 * Copyright (C) 1994, 1995 Waldorf GmbH
7 * Copyright (C) 1994 - 2000 Ralf Baechle 7 * Copyright (C) 1994 - 2000, 06 Ralf Baechle
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved. 9 * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
10 * Author: Maciej W. Rozycki <macro@mips.com> 10 * Author: Maciej W. Rozycki <macro@mips.com>
@@ -103,8 +103,20 @@
103 */ 103 */
104extern const unsigned long mips_io_port_base; 104extern const unsigned long mips_io_port_base;
105 105
106#define set_io_port_base(base) \ 106/*
107 do { * (unsigned long *) &mips_io_port_base = (base); } while (0) 107 * Gcc will generate code to load the value of mips_io_port_base after each
108 * function call which may be fairly wasteful in some cases. So we don't
109 * play quite by the book. We tell gcc mips_io_port_base is a long variable
110 * which solves the code generation issue. Now we need to violate the
111 * aliasing rules a little to make initialization possible and finally we
112 * will need the barrier() to fight side effects of the aliasing chat.
113 * This trickery will eventually collapse under gcc's optimizer. Oh well.
114 */
115static inline void set_io_port_base(unsigned long base)
116{
117 * (unsigned long *) &mips_io_port_base = base;
118 barrier();
119}
108 120
109/* 121/*
110 * Thanks to James van Artsdalen for a better timing-fix than 122 * Thanks to James van Artsdalen for a better timing-fix than
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index 9632c27dad15..0bcb79a58ee9 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -257,7 +257,8 @@ static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \
257 \ 257 \
258static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \ 258static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \
259{ \ 259{ \
260 unsigned long start = page; \ 260 unsigned long indexmask = current_cpu_data.desc.waysize - 1; \
261 unsigned long start = INDEX_BASE + (page & indexmask); \
261 unsigned long end = start + PAGE_SIZE; \ 262 unsigned long end = start + PAGE_SIZE; \
262 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ 263 unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \
263 unsigned long ws_end = current_cpu_data.desc.ways << \ 264 unsigned long ws_end = current_cpu_data.desc.ways << \
diff --git a/include/asm-mips/sibyte/sb1250.h b/include/asm-mips/sibyte/sb1250.h
index a474c29cd701..b09e16c93ca0 100644
--- a/include/asm-mips/sibyte/sb1250.h
+++ b/include/asm-mips/sibyte/sb1250.h
@@ -45,8 +45,8 @@ extern unsigned int soc_type;
45extern unsigned int periph_rev; 45extern unsigned int periph_rev;
46extern unsigned int zbbus_mhz; 46extern unsigned int zbbus_mhz;
47 47
48extern void sb1250_hpt_setup(void);
48extern void sb1250_time_init(void); 49extern void sb1250_time_init(void);
49extern unsigned long sb1250_gettimeoffset(void);
50extern void sb1250_mask_irq(int cpu, int irq); 50extern void sb1250_mask_irq(int cpu, int irq);
51extern void sb1250_unmask_irq(int cpu, int irq); 51extern void sb1250_unmask_irq(int cpu, int irq);
52extern void sb1250_smp_finish(void); 52extern void sb1250_smp_finish(void);
diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h
index a667bc14a7cd..f4178bdcfcb0 100644
--- a/include/asm-mips/sibyte/sb1250_scd.h
+++ b/include/asm-mips/sibyte/sb1250_scd.h
@@ -359,14 +359,15 @@
359 */ 359 */
360 360
361#define V_SCD_TIMER_FREQ 1000000 361#define V_SCD_TIMER_FREQ 1000000
362#define V_SCD_TIMER_WIDTH 23
362 363
363#define S_SCD_TIMER_INIT 0 364#define S_SCD_TIMER_INIT 0
364#define M_SCD_TIMER_INIT _SB_MAKEMASK(20,S_SCD_TIMER_INIT) 365#define M_SCD_TIMER_INIT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_INIT)
365#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT) 366#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_INIT)
366#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT) 367#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT)
367 368
368#define S_SCD_TIMER_CNT 0 369#define S_SCD_TIMER_CNT 0
369#define M_SCD_TIMER_CNT _SB_MAKEMASK(20,S_SCD_TIMER_CNT) 370#define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_CNT)
370#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT) 371#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x,S_SCD_TIMER_CNT)
371#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT) 372#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT)
372 373
diff --git a/include/asm-mips/vga.h b/include/asm-mips/vga.h
index ca5cec97e167..34755c0a6398 100644
--- a/include/asm-mips/vga.h
+++ b/include/asm-mips/vga.h
@@ -26,6 +26,9 @@
26 * <linux/vt_buffer.h> has already done the right job for us. 26 * <linux/vt_buffer.h> has already done the right job for us.
27 */ 27 */
28 28
29#undef scr_writew
30#undef scr_readw
31
29static inline void scr_writew(u16 val, volatile u16 *addr) 32static inline void scr_writew(u16 val, volatile u16 *addr)
30{ 33{
31 *addr = cpu_to_le16(val); 34 *addr = cpu_to_le16(val);
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 90d005bb4d1c..5638518968c3 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -20,6 +20,8 @@
20#define PPC_FEATURE_POWER5_PLUS 0x00020000 20#define PPC_FEATURE_POWER5_PLUS 0x00020000
21#define PPC_FEATURE_CELL 0x00010000 21#define PPC_FEATURE_CELL 0x00010000
22#define PPC_FEATURE_BOOKE 0x00008000 22#define PPC_FEATURE_BOOKE 0x00008000
23#define PPC_FEATURE_SMT 0x00004000
24#define PPC_FEATURE_ICACHE_SNOOP 0x00002000
23 25
24#ifdef __KERNEL__ 26#ifdef __KERNEL__
25#ifndef __ASSEMBLY__ 27#ifndef __ASSEMBLY__
diff --git a/include/asm-powerpc/eeh.h b/include/asm-powerpc/eeh.h
index eb392032e19b..5207758a6dd9 100644
--- a/include/asm-powerpc/eeh.h
+++ b/include/asm-powerpc/eeh.h
@@ -118,6 +118,8 @@ static inline void pci_addr_cache_build(void) { }
118 118
119static inline void eeh_add_device_early(struct device_node *dn) { } 119static inline void eeh_add_device_early(struct device_node *dn) { }
120 120
121static inline void eeh_add_device_late(struct pci_dev *dev) { }
122
121static inline void eeh_remove_device(struct pci_dev *dev) { } 123static inline void eeh_remove_device(struct pci_dev *dev) { }
122 124
123static inline void eeh_add_device_tree_early(struct device_node *dn) { } 125static inline void eeh_add_device_tree_early(struct device_node *dn) { }
diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h
index bda2f217e6fe..6a2af2f6853b 100644
--- a/include/asm-powerpc/kexec.h
+++ b/include/asm-powerpc/kexec.h
@@ -93,7 +93,8 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
93 "mfxer %0\n" 93 "mfxer %0\n"
94 "std %0, 296(%2)\n" 94 "std %0, 296(%2)\n"
95 : "=&r" (tmp1), "=&r" (tmp2) 95 : "=&r" (tmp1), "=&r" (tmp2)
96 : "b" (newregs)); 96 : "b" (newregs)
97 : "memory");
97 } 98 }
98} 99}
99#else 100#else
diff --git a/include/asm-powerpc/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h
index e9590c06ad92..80a7832d2721 100644
--- a/include/asm-powerpc/pgtable-4k.h
+++ b/include/asm-powerpc/pgtable-4k.h
@@ -88,4 +88,4 @@
88 (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))) 88 (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)))
89 89
90#define pud_ERROR(e) \ 90#define pud_ERROR(e) \
91 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pud_val(e)) 91 printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index f80482c7231f..cf79bc7ebb55 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -38,6 +38,7 @@ void *traverse_pci_devices(struct device_node *start, traverse_func pre,
38 38
39void pci_devs_phb_init(void); 39void pci_devs_phb_init(void);
40void pci_devs_phb_init_dynamic(struct pci_controller *phb); 40void pci_devs_phb_init_dynamic(struct pci_controller *phb);
41int setup_phb(struct device_node *dev, struct pci_controller *phb);
41void __devinit scan_phb(struct pci_controller *hose); 42void __devinit scan_phb(struct pci_controller *hose);
42 43
43/* From rtas_pci.h */ 44/* From rtas_pci.h */
diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h
index 237fc2b72974..ffc7462d77ba 100644
--- a/include/asm-powerpc/thread_info.h
+++ b/include/asm-powerpc/thread_info.h
@@ -37,7 +37,6 @@ struct thread_info {
37 int preempt_count; /* 0 => preemptable, 37 int preempt_count; /* 0 => preemptable,
38 <0 => BUG */ 38 <0 => BUG */
39 struct restart_block restart_block; 39 struct restart_block restart_block;
40 void __user *nvgprs_frame;
41 /* low level flags - has atomic operations done on it */ 40 /* low level flags - has atomic operations done on it */
42 unsigned long flags ____cacheline_aligned_in_smp; 41 unsigned long flags ____cacheline_aligned_in_smp;
43}; 42};
@@ -120,7 +119,6 @@ static inline struct thread_info *current_thread_info(void)
120#define TIF_MEMDIE 10 119#define TIF_MEMDIE 10
121#define TIF_SECCOMP 11 /* secure computing */ 120#define TIF_SECCOMP 11 /* secure computing */
122#define TIF_RESTOREALL 12 /* Restore all regs (implies NOERROR) */ 121#define TIF_RESTOREALL 12 /* Restore all regs (implies NOERROR) */
123#define TIF_SAVE_NVGPRS 13 /* Save r14-r31 in signal frame */
124#define TIF_NOERROR 14 /* Force successful syscall return */ 122#define TIF_NOERROR 14 /* Force successful syscall return */
125#define TIF_RESTORE_SIGMASK 15 /* Restore signal mask in do_signal */ 123#define TIF_RESTORE_SIGMASK 15 /* Restore signal mask in do_signal */
126 124
@@ -137,15 +135,13 @@ static inline struct thread_info *current_thread_info(void)
137#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) 135#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
138#define _TIF_SECCOMP (1<<TIF_SECCOMP) 136#define _TIF_SECCOMP (1<<TIF_SECCOMP)
139#define _TIF_RESTOREALL (1<<TIF_RESTOREALL) 137#define _TIF_RESTOREALL (1<<TIF_RESTOREALL)
140#define _TIF_SAVE_NVGPRS (1<<TIF_SAVE_NVGPRS)
141#define _TIF_NOERROR (1<<TIF_NOERROR) 138#define _TIF_NOERROR (1<<TIF_NOERROR)
142#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 139#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
143#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) 140#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
144 141
145#define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \ 142#define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
146 _TIF_NEED_RESCHED | _TIF_RESTOREALL | \ 143 _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK)
147 _TIF_RESTORE_SIGMASK) 144#define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR)
148#define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR|_TIF_SAVE_NVGPRS)
149 145
150#endif /* __KERNEL__ */ 146#endif /* __KERNEL__ */
151 147
diff --git a/include/linux/compat_ioctl.h b/include/linux/compat_ioctl.h
index 8fad50f8e389..ae7dfb790df3 100644
--- a/include/linux/compat_ioctl.h
+++ b/include/linux/compat_ioctl.h
@@ -696,6 +696,8 @@ COMPATIBLE_IOCTL(MEMLOCK)
696COMPATIBLE_IOCTL(MEMUNLOCK) 696COMPATIBLE_IOCTL(MEMUNLOCK)
697COMPATIBLE_IOCTL(MEMGETREGIONCOUNT) 697COMPATIBLE_IOCTL(MEMGETREGIONCOUNT)
698COMPATIBLE_IOCTL(MEMGETREGIONINFO) 698COMPATIBLE_IOCTL(MEMGETREGIONINFO)
699COMPATIBLE_IOCTL(MEMGETBADBLOCK)
700COMPATIBLE_IOCTL(MEMSETBADBLOCK)
699/* NBD */ 701/* NBD */
700ULONG_IOCTL(NBD_SET_SOCK) 702ULONG_IOCTL(NBD_SET_SOCK)
701ULONG_IOCTL(NBD_SET_BLKSIZE) 703ULONG_IOCTL(NBD_SET_BLKSIZE)
diff --git a/include/linux/file.h b/include/linux/file.h
index 418b6101b59a..9901b850f2e4 100644
--- a/include/linux/file.h
+++ b/include/linux/file.h
@@ -60,8 +60,6 @@ extern void put_filp(struct file *);
60extern int get_unused_fd(void); 60extern int get_unused_fd(void);
61extern void FASTCALL(put_unused_fd(unsigned int fd)); 61extern void FASTCALL(put_unused_fd(unsigned int fd));
62struct kmem_cache; 62struct kmem_cache;
63extern void filp_ctor(void * objp, struct kmem_cache *cachep, unsigned long cflags);
64extern void filp_dtor(void * objp, struct kmem_cache *cachep, unsigned long dflags);
65 63
66extern struct file ** alloc_fd_array(int); 64extern struct file ** alloc_fd_array(int);
67extern void free_fd_array(struct file **, int); 65extern void free_fd_array(struct file **, int);
diff --git a/include/linux/fs.h b/include/linux/fs.h
index e059da947007..128d0082522c 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -35,6 +35,7 @@ struct files_stat_struct {
35 int max_files; /* tunable */ 35 int max_files; /* tunable */
36}; 36};
37extern struct files_stat_struct files_stat; 37extern struct files_stat_struct files_stat;
38extern int get_max_files(void);
38 39
39struct inodes_stat_t { 40struct inodes_stat_t {
40 int nr_inodes; 41 int nr_inodes;
@@ -1418,9 +1419,6 @@ extern int is_bad_inode(struct inode *);
1418extern struct file_operations read_fifo_fops; 1419extern struct file_operations read_fifo_fops;
1419extern struct file_operations write_fifo_fops; 1420extern struct file_operations write_fifo_fops;
1420extern struct file_operations rdwr_fifo_fops; 1421extern struct file_operations rdwr_fifo_fops;
1421extern struct file_operations read_pipe_fops;
1422extern struct file_operations write_pipe_fops;
1423extern struct file_operations rdwr_pipe_fops;
1424 1422
1425extern int fs_may_remount_ro(struct super_block *); 1423extern int fs_may_remount_ro(struct super_block *);
1426 1424
@@ -1666,6 +1664,8 @@ extern int vfs_follow_link(struct nameidata *, const char *);
1666extern int page_readlink(struct dentry *, char __user *, int); 1664extern int page_readlink(struct dentry *, char __user *, int);
1667extern void *page_follow_link_light(struct dentry *, struct nameidata *); 1665extern void *page_follow_link_light(struct dentry *, struct nameidata *);
1668extern void page_put_link(struct dentry *, struct nameidata *, void *); 1666extern void page_put_link(struct dentry *, struct nameidata *, void *);
1667extern int __page_symlink(struct inode *inode, const char *symname, int len,
1668 gfp_t gfp_mask);
1669extern int page_symlink(struct inode *inode, const char *symname, int len); 1669extern int page_symlink(struct inode *inode, const char *symname, int len);
1670extern struct inode_operations page_symlink_inode_operations; 1670extern struct inode_operations page_symlink_inode_operations;
1671extern int generic_readlink(struct dentry *, char __user *, int); 1671extern int generic_readlink(struct dentry *, char __user *, int);
diff --git a/include/linux/gfp.h b/include/linux/gfp.h
index 20f9148e38d9..7851e6b520cf 100644
--- a/include/linux/gfp.h
+++ b/include/linux/gfp.h
@@ -157,9 +157,9 @@ extern void FASTCALL(free_cold_page(struct page *page));
157 157
158void page_alloc_init(void); 158void page_alloc_init(void);
159#ifdef CONFIG_NUMA 159#ifdef CONFIG_NUMA
160void drain_remote_pages(void); 160void drain_node_pages(int node);
161#else 161#else
162static inline void drain_remote_pages(void) { }; 162static inline void drain_node_pages(int node) { };
163#endif 163#endif
164 164
165#endif /* __LINUX_GFP_H */ 165#endif /* __LINUX_GFP_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 1709b5009d2e..751eea58bde8 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1365,6 +1365,7 @@
1365#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 1365#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008
1366#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 1366#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009
1367#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 1367#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017
1368#define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103
1368#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 1369#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200
1369#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 1370#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201
1370#define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 1371#define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203
diff --git a/include/linux/percpu_counter.h b/include/linux/percpu_counter.h
index bd6708e2c027..682525511c9e 100644
--- a/include/linux/percpu_counter.h
+++ b/include/linux/percpu_counter.h
@@ -39,6 +39,7 @@ static inline void percpu_counter_destroy(struct percpu_counter *fbc)
39} 39}
40 40
41void percpu_counter_mod(struct percpu_counter *fbc, long amount); 41void percpu_counter_mod(struct percpu_counter *fbc, long amount);
42long percpu_counter_sum(struct percpu_counter *fbc);
42 43
43static inline long percpu_counter_read(struct percpu_counter *fbc) 44static inline long percpu_counter_read(struct percpu_counter *fbc)
44{ 45{
@@ -92,6 +93,11 @@ static inline long percpu_counter_read_positive(struct percpu_counter *fbc)
92 return fbc->count; 93 return fbc->count;
93} 94}
94 95
96static inline long percpu_counter_sum(struct percpu_counter *fbc)
97{
98 return percpu_counter_read_positive(fbc);
99}
100
95#endif /* CONFIG_SMP */ 101#endif /* CONFIG_SMP */
96 102
97static inline void percpu_counter_inc(struct percpu_counter *fbc) 103static inline void percpu_counter_inc(struct percpu_counter *fbc)
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index b87aefa082e2..c2ec6c77874e 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -98,13 +98,17 @@ struct rcu_data {
98 long batch; /* Batch # for current RCU batch */ 98 long batch; /* Batch # for current RCU batch */
99 struct rcu_head *nxtlist; 99 struct rcu_head *nxtlist;
100 struct rcu_head **nxttail; 100 struct rcu_head **nxttail;
101 long count; /* # of queued items */ 101 long qlen; /* # of queued callbacks */
102 struct rcu_head *curlist; 102 struct rcu_head *curlist;
103 struct rcu_head **curtail; 103 struct rcu_head **curtail;
104 struct rcu_head *donelist; 104 struct rcu_head *donelist;
105 struct rcu_head **donetail; 105 struct rcu_head **donetail;
106 long blimit; /* Upper limit on a processed batch */
106 int cpu; 107 int cpu;
107 struct rcu_head barrier; 108 struct rcu_head barrier;
109#ifdef CONFIG_SMP
110 long last_rs_qlen; /* qlen during the last resched */
111#endif
108}; 112};
109 113
110DECLARE_PER_CPU(struct rcu_data, rcu_data); 114DECLARE_PER_CPU(struct rcu_data, rcu_data);
diff --git a/include/linux/sched.h b/include/linux/sched.h
index ff2e09c953b9..62e6314382f0 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -892,7 +892,6 @@ static inline int pid_alive(struct task_struct *p)
892} 892}
893 893
894extern void free_task(struct task_struct *tsk); 894extern void free_task(struct task_struct *tsk);
895extern void __put_task_struct(struct task_struct *tsk);
896#define get_task_struct(tsk) do { atomic_inc(&(tsk)->usage); } while(0) 895#define get_task_struct(tsk) do { atomic_inc(&(tsk)->usage); } while(0)
897 896
898extern void __put_task_struct_cb(struct rcu_head *rhp); 897extern void __put_task_struct_cb(struct rcu_head *rhp);
diff --git a/include/net/ax25.h b/include/net/ax25.h
index 2250a18b0cbb..d052b221dbcd 100644
--- a/include/net/ax25.h
+++ b/include/net/ax25.h
@@ -110,8 +110,15 @@ enum {
110enum { 110enum {
111 AX25_PROTO_STD_SIMPLEX, 111 AX25_PROTO_STD_SIMPLEX,
112 AX25_PROTO_STD_DUPLEX, 112 AX25_PROTO_STD_DUPLEX,
113#ifdef CONFIG_AX25_DAMA_SLAVE
113 AX25_PROTO_DAMA_SLAVE, 114 AX25_PROTO_DAMA_SLAVE,
114 AX25_PROTO_DAMA_MASTER 115#ifdef CONFIG_AX25_DAMA_MASTER
116 AX25_PROTO_DAMA_MASTER,
117#define AX25_PROTO_MAX AX25_PROTO_DAMA_MASTER
118#endif
119#endif
120 __AX25_PROTO_MAX,
121 AX25_PROTO_MAX = __AX25_PROTO_MAX -1
115}; 122};
116 123
117enum { 124enum {
diff --git a/include/net/sock.h b/include/net/sock.h
index 30758035d616..f63d0d56712c 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -478,9 +478,9 @@ static inline void sk_add_backlog(struct sock *sk, struct sk_buff *skb)
478 rc = __condition; \ 478 rc = __condition; \
479 if (!rc) { \ 479 if (!rc) { \
480 *(__timeo) = schedule_timeout(*(__timeo)); \ 480 *(__timeo) = schedule_timeout(*(__timeo)); \
481 rc = __condition; \
482 } \ 481 } \
483 lock_sock(__sk); \ 482 lock_sock(__sk); \
483 rc = __condition; \
484 rc; \ 484 rc; \
485}) 485})
486 486
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-26 07:46:29 -0400