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-rw-r--r--include/asm-arm/arch-clps711x/hardware.h117
-rw-r--r--include/asm-arm/arch-clps711x/mp1000-seprom.h77
-rw-r--r--include/asm-arm/arch-iop3xx/iop321.h2
-rw-r--r--include/asm-arm/arch-ixp2000/enp2611.h16
-rw-r--r--include/asm-arm/arch-ixp2000/irqs.h35
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h7
-rw-r--r--include/asm-arm/arch-ixp2000/system.h23
-rw-r--r--include/asm-arm/arch-ixp2000/uengine.h62
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h74
-rw-r--r--include/asm-arm/arch-realview/debug-macro.S38
-rw-r--r--include/asm-arm/arch-realview/dma.h27
-rw-r--r--include/asm-arm/arch-realview/entry-macro.S49
-rw-r--r--include/asm-arm/arch-realview/hardware.h31
-rw-r--r--include/asm-arm/arch-realview/io.h34
-rw-r--r--include/asm-arm/arch-realview/irqs.h103
-rw-r--r--include/asm-arm/arch-realview/memory.h38
-rw-r--r--include/asm-arm/arch-realview/param.h19
-rw-r--r--include/asm-arm/arch-realview/platform.h395
-rw-r--r--include/asm-arm/arch-realview/system.h51
-rw-r--r--include/asm-arm/arch-realview/timex.h23
-rw-r--r--include/asm-arm/arch-realview/uncompress.h54
-rw-r--r--include/asm-arm/arch-realview/vmalloc.h21
-rw-r--r--include/asm-arm/arch-s3c2410/regs-iis.h1
-rw-r--r--include/asm-arm/cpu.h1
-rw-r--r--include/asm-arm/hardware/amba_clcd.h2
-rw-r--r--include/asm-arm/irq.h1
-rw-r--r--include/asm-arm/mmu_context.h3
-rw-r--r--include/asm-arm/smp.h10
-rw-r--r--include/asm-arm/spinlock.h6
-rw-r--r--include/asm-i386/apic.h3
-rw-r--r--include/asm-i386/hw_irq.h1
-rw-r--r--include/asm-i386/mach-default/smpboot_hooks.h15
-rw-r--r--include/asm-i386/mach-visws/smpboot_hooks.h7
-rw-r--r--include/asm-m68knommu/anchor.h4
-rw-r--r--include/asm-m68knommu/asm-offsets.h49
-rw-r--r--include/asm-m68knommu/atomic.h4
-rw-r--r--include/asm-m68knommu/coldfire.h10
-rw-r--r--include/asm-m68knommu/delay.h4
-rw-r--r--include/asm-m68knommu/ide.h437
-rw-r--r--include/asm-m68knommu/io.h8
-rw-r--r--include/asm-m68knommu/m520xsim.h54
-rw-r--r--include/asm-m68knommu/mcfcache.h14
-rw-r--r--include/asm-m68knommu/mcfne.h18
-rw-r--r--include/asm-m68knommu/mcfpit.h8
-rw-r--r--include/asm-m68knommu/mcfsim.h15
-rw-r--r--include/asm-m68knommu/mcfuart.h4
-rw-r--r--include/asm-m68knommu/mcfwdebug.h2
-rw-r--r--include/asm-m68knommu/mmu_context.h4
-rw-r--r--include/asm-m68knommu/processor.h4
-rw-r--r--include/asm-m68knommu/semaphore.h10
-rw-r--r--include/asm-m68knommu/system.h13
-rw-r--r--include/asm-m68knommu/tlbflush.h4
-rw-r--r--include/asm-powerpc/bitops.h437
-rw-r--r--include/asm-powerpc/bug.h34
-rw-r--r--include/asm-powerpc/elf.h22
-rw-r--r--include/asm-powerpc/futex.h (renamed from include/asm-ppc64/futex.h)45
-rw-r--r--include/asm-powerpc/ioctls.h3
-rw-r--r--include/asm-powerpc/ipcbuf.h34
-rw-r--r--include/asm-powerpc/irq.h2
-rw-r--r--include/asm-powerpc/iseries/hv_call.h (renamed from include/asm-ppc64/iSeries/HvCall.h)10
-rw-r--r--include/asm-powerpc/iseries/hv_call_event.h (renamed from include/asm-ppc64/iSeries/HvCallEvent.h)10
-rw-r--r--include/asm-powerpc/iseries/hv_call_sc.h (renamed from include/asm-ppc64/iSeries/HvCallSc.h)6
-rw-r--r--include/asm-powerpc/iseries/hv_call_xm.h (renamed from include/asm-ppc64/iSeries/HvCallXm.h)10
-rw-r--r--include/asm-powerpc/iseries/hv_lp_config.h (renamed from include/asm-ppc64/iSeries/HvLpConfig.h)12
-rw-r--r--include/asm-powerpc/iseries/hv_lp_event.h (renamed from include/asm-ppc64/iSeries/HvLpEvent.h)10
-rw-r--r--include/asm-powerpc/iseries/hv_types.h (renamed from include/asm-ppc64/iSeries/HvTypes.h)6
-rw-r--r--include/asm-powerpc/iseries/iseries_io.h (renamed from include/asm-ppc64/iSeries/iSeries_io.h)6
-rw-r--r--include/asm-powerpc/iseries/it_exp_vpd_panel.h (renamed from include/asm-ppc64/iSeries/ItExtVpdPanel.h)6
-rw-r--r--include/asm-powerpc/iseries/it_lp_naca.h (renamed from include/asm-ppc64/iSeries/ItLpNaca.h)6
-rw-r--r--include/asm-powerpc/iseries/it_lp_queue.h (renamed from include/asm-ppc64/iSeries/ItLpQueue.h)6
-rw-r--r--include/asm-powerpc/iseries/it_lp_reg_save.h (renamed from include/asm-ppc64/iSeries/ItLpRegSave.h)4
-rw-r--r--include/asm-powerpc/iseries/lpar_map.h (renamed from include/asm-ppc64/iSeries/LparMap.h)6
-rw-r--r--include/asm-powerpc/iseries/mf.h (renamed from include/asm-ppc64/iSeries/mf.h)10
-rw-r--r--include/asm-powerpc/iseries/vio.h (renamed from include/asm-ppc64/iSeries/vio.h)10
-rw-r--r--include/asm-powerpc/kexec.h49
-rw-r--r--include/asm-powerpc/machdep.h1
-rw-r--r--include/asm-powerpc/numnodes.h7
-rw-r--r--include/asm-powerpc/ppc_asm.h7
-rw-r--r--include/asm-powerpc/processor.h2
-rw-r--r--include/asm-powerpc/ptrace.h (renamed from include/asm-ppc64/ptrace.h)143
-rw-r--r--include/asm-powerpc/rtas.h25
-rw-r--r--include/asm-powerpc/sigcontext.h (renamed from include/asm-ppc64/sigcontext.h)41
-rw-r--r--include/asm-powerpc/smp.h (renamed from include/asm-ppc64/smp.h)45
-rw-r--r--include/asm-powerpc/sparsemem.h (renamed from include/asm-ppc64/sparsemem.h)6
-rw-r--r--include/asm-powerpc/stat.h81
-rw-r--r--include/asm-powerpc/system.h48
-rw-r--r--include/asm-powerpc/termios.h135
-rw-r--r--include/asm-powerpc/time.h2
-rw-r--r--include/asm-powerpc/tlb.h (renamed from include/asm-ppc/tlb.h)59
-rw-r--r--include/asm-powerpc/tlbflush.h146
-rw-r--r--include/asm-powerpc/uaccess.h468
-rw-r--r--include/asm-powerpc/ucontext.h40
-rw-r--r--include/asm-ppc/bitops.h460
-rw-r--r--include/asm-ppc/commproc.h2
-rw-r--r--include/asm-ppc/futex.h53
-rw-r--r--include/asm-ppc/ipcbuf.h29
-rw-r--r--include/asm-ppc/kexec.h40
-rw-r--r--include/asm-ppc/mv64x60.h2
-rw-r--r--include/asm-ppc/ppc_sys.h2
-rw-r--r--include/asm-ppc/ptrace.h152
-rw-r--r--include/asm-ppc/sigcontext.h15
-rw-r--r--include/asm-ppc/stat.h69
-rw-r--r--include/asm-ppc/tlbflush.h115
-rw-r--r--include/asm-ppc/uaccess.h393
-rw-r--r--include/asm-ppc/ucontext.h27
-rw-r--r--include/asm-ppc64/bitops.h360
-rw-r--r--include/asm-ppc64/dart.h59
-rw-r--r--include/asm-ppc64/io.h2
-rw-r--r--include/asm-ppc64/ipcbuf.h28
-rw-r--r--include/asm-ppc64/kexec.h41
-rw-r--r--include/asm-ppc64/mmu_context.h15
-rw-r--r--include/asm-ppc64/naca.h24
-rw-r--r--include/asm-ppc64/numnodes.h7
-rw-r--r--include/asm-ppc64/nvram.h2
-rw-r--r--include/asm-ppc64/paca.h2
-rw-r--r--include/asm-ppc64/plpar_wrappers.h120
-rw-r--r--include/asm-ppc64/ppc32.h122
-rw-r--r--include/asm-ppc64/spinlock.h2
-rw-r--r--include/asm-ppc64/stat.h60
-rw-r--r--include/asm-ppc64/tlb.h39
-rw-r--r--include/asm-ppc64/tlbflush.h52
-rw-r--r--include/asm-ppc64/uaccess.h341
-rw-r--r--include/asm-ppc64/ucontext.h22
-rw-r--r--include/asm-x86_64/dma-mapping.h31
-rw-r--r--include/asm-x86_64/swiotlb.h8
-rw-r--r--include/linux/device.h26
-rw-r--r--include/linux/dqblk_xfs.h20
-rw-r--r--include/linux/etherdevice.h27
-rw-r--r--include/linux/genhd.h10
-rw-r--r--include/linux/libata.h52
-rw-r--r--include/linux/netfilter_arp/arp_tables.h20
-rw-r--r--include/linux/netfilter_ipv6/ip6_tables.h27
-rw-r--r--include/linux/nfs_fs.h2
-rw-r--r--include/linux/pci_ids.h4
-rw-r--r--include/linux/phy.h3
-rw-r--r--include/linux/platform_device.h40
-rw-r--r--include/linux/serial_8250.h2
-rw-r--r--include/linux/serial_core.h7
-rw-r--r--include/rdma/ib_user_cm.h19
-rw-r--r--include/scsi/iscsi_if.h245
-rw-r--r--include/scsi/iscsi_proto.h589
-rw-r--r--include/scsi/scsi_device.h22
-rw-r--r--include/scsi/scsi_host.h6
-rw-r--r--include/scsi/scsi_transport_fc.h33
-rw-r--r--include/scsi/scsi_transport_iscsi.h202
-rw-r--r--include/scsi/scsi_transport_sas.h27
-rw-r--r--include/scsi/srp.h226
-rw-r--r--include/sound/emu10k1.h1
148 files changed, 4283 insertions, 4035 deletions
diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h
index f864c367c934..1386871e1a5a 100644
--- a/include/asm-arm/arch-clps711x/hardware.h
+++ b/include/asm-arm/arch-clps711x/hardware.h
@@ -235,121 +235,4 @@
235#define CEIVA_PB0_BLK_BTN (1<<0) 235#define CEIVA_PB0_BLK_BTN (1<<0)
236#endif // #if defined (CONFIG_ARCH_CEIVA) 236#endif // #if defined (CONFIG_ARCH_CEIVA)
237 237
238#if defined (CONFIG_MACH_MP1000)
239/* NOR FLASH */
240#define MP1000_NIO_BASE 0xf9000000 /* virtual */
241#define MP1000_NIO_START CS0_PHYS_BASE /* physical */
242#define MP1000_NIO_SIZE 0x00400000
243
244/* DSP Interface */
245#define MP1000_DSP_BASE 0xfa000000 /* virtual */
246#define MP1000_DSP_START CS1_PHYS_BASE /* physical */
247#define MP1000_DSP_SIZE 0x00100000
248
249/* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */
250#define MP1000_LIO_BASE 0xfb000000 /* virtual */
251#define MP1000_LIO_START CS2_PHYS_BASE /* physical */
252#define MP1000_LIO_SIZE 0x00100000
253
254/* NAND FLASH */
255#define MP1000_FIO_BASE 0xfc000000 /* virtual */
256#define MP1000_FIO_START CS3_PHYS_BASE /* physical */
257#define MP1000_FIO_SIZE 0x00800000
258
259/* Ethernet */
260#define MP1000_EIO_BASE 0xfd000000 /* virtual */
261#define MP1000_EIO_START CS4_PHYS_BASE /* physical */
262#define MP1000_EIO_SIZE 0x00100000
263
264#define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */
265#define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/
266#define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */
267#define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */
268
269/* IDE */
270#define MP1000_IDE_BASE 0xfe000000 /* virtual */
271#define MP1000_IDE_START CS5_PHYS_BASE /* physical */
272#define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */
273
274#define IRQ_HARDDISK IRQ_EINT2
275
276/*
277 * IDE registers definition
278 */
279
280#define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000)
281#define IDE_BASE_OFF (MP1000_IDE_BASE)
282
283#define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0)
284#define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2)
285#define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4)
286#define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6)
287#define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8)
288#define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa)
289#define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc)
290#define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe)
291#define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc)
292
293#define IDE_IRQ IRQ_EINT2
294
295
296#define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2))
297#define RTC_ALWAYS_BCD 0
298
299/*
300// Definitions of the bit fields in the HwPortA register for the
301// MP1000 board.
302*/
303#define HwPortAKeyboardRow1 0x00000001
304#define HwPortAKeyboardRow2 0x00000002
305#define HwPortAKeyboardRow3 0x00000004
306#define HwPortAKeyboardRow4 0x00000008
307#define HwPortAKeyboardRow5 0x00000010
308#define HwPortAKeyboardRow6 0x00000020
309#define HwPortALCDEnable 0x00000040
310#define HwPortAOffhook 0x00000080
311
312/*
313// Definitions of the bit fields in the HwPortB register for the
314// MP1000 board.
315*/
316#define HwPortBL3Mode 0x00000001
317#define HwPortBL3Clk 0x00000002
318#define HwPortBSClk 0x00000001
319#define HwPortBSData 0x00000002
320#define HwPortBL3Data 0x00000004
321#define HwPortBMute 0x00000008
322#define HwPortBQD0 0x00000010
323#define HwPortBQD1 0x00000020
324#define HwPortBQD2 0x00000040
325#define HwPortBQD3 0x00000080
326
327/*
328// Definitions of the bit fields in the HwPortD register for the
329// MP1000 board.
330*/
331#define HwPortDLED1 0x00000001
332#define HwPortDLED2 0x00000002
333#define HwPortDLED3 0x00000004
334#define HwPortDLED4 0x00000008
335#define HwPortDLED5 0x00000010
336#define HwPortDEECS 0x00000020
337#define HwPortBRTS 0x00000040
338#define HwPortBRI 0x00000080
339
340
341/*
342// Definitions of the bit fields in the HwPortE register for the
343// MP1000 board.
344*/
345
346#define HwPortECLE 0x00000001
347#define HwPortESepromDOut 0x00000001
348#define HwPortEALE 0x00000002
349#define HwPortESepromDIn 0x00000002
350#define HwPortENANDCS 0x00000004
351#define HwPortESepromCLK 0x00000004
352
353#endif // #if defined (CONFIG_MACH_MP1000)
354
355#endif 238#endif
diff --git a/include/asm-arm/arch-clps711x/mp1000-seprom.h b/include/asm-arm/arch-clps711x/mp1000-seprom.h
deleted file mode 100644
index 3e5566cf9666..000000000000
--- a/include/asm-arm/arch-clps711x/mp1000-seprom.h
+++ /dev/null
@@ -1,77 +0,0 @@
1#ifndef MP1000_SEPROM_H
2#define MP1000_SEPROM_H
3
4/*
5 * mp1000-seprom.h
6 *
7 *
8 * This file contains the Serial EEPROM definitions for the MP1000 board
9 *
10 * Copyright (C) 2005 Comdial Corporation
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#define COMMAND_ERASE (0x1C0)
29#define COMMAND_ERASE_ALL (0x120)
30#define COMMAND_WRITE_DISABLE (0x100)
31#define COMMAND_WRITE_ENABLE (0x130)
32#define COMMAND_READ (0x180)
33#define COMMAND_WRITE (0x140)
34#define COMMAND_WRITE_ALL (0x110)
35
36//
37// Serial EEPROM data format
38//
39
40#define PACKED __attribute__ ((packed))
41
42typedef struct _EEPROM {
43 union {
44 unsigned char eprom_byte_data[128];
45 unsigned short eprom_short_data[64];
46 struct {
47 unsigned char version PACKED; // EEPROM Version "1" for now
48 unsigned char box_id PACKED; // Box ID (Standalone, SOHO, embedded, etc)
49 unsigned char major_hw_version PACKED; // Major Hardware version (Hex)
50 unsigned char minor_hw_version PACKED; // Minor Hardware Version (Hex)
51 unsigned char mfg_id[3] PACKED; // Manufacturer ID (3 character Alphabetic)
52 unsigned char mfg_serial_number[10] PACKED; // Manufacturer Serial number
53 unsigned char mfg_date[3] PACKED; // Date of Mfg (Formatted YY:MM:DD)
54 unsigned char country PACKED; // Country of deployment
55 unsigned char mac_Address[6] PACKED; // MAC Address
56 unsigned char oem_string[20] PACKED; // OEM ID string
57 unsigned short feature_bits1 PACKED; // Feature Bits 1
58 unsigned short feature_bits2 PACKED; // Feature Bits 2
59 unsigned char filler[75] PACKED; // Unused/Undefined “0” initialized
60 unsigned short checksum PACKED; // byte accumulated short checksum
61 } eprom_struct;
62 } variant;
63} eeprom_struct;
64
65/* These settings must be mutually exclusive */
66#define FEATURE_BITS1_DRAMSIZE_16MEG 0x0001 /* 0 signifies 4 MEG system */
67#define FEATURE_BITS1_DRAMSIZE_8MEG 0x0002 /* 1 in bit 1 = 8MEG system */
68#define FEATURE_BITS1_DRAMSIZE_64MEG 0x0004 /* 1 in bit 2 = 64MEG system */
69
70#define FEATURE_BITS1_CPUIS90MEG 0x0010
71
72extern void seprom_init(void);
73extern eeprom_struct* get_seprom_ptr(void);
74extern unsigned char* get_eeprom_mac_address(void);
75
76#endif /* MP1000_SEPROM_H */
77
diff --git a/include/asm-arm/arch-iop3xx/iop321.h b/include/asm-arm/arch-iop3xx/iop321.h
index 200621ff3690..f8df778a356f 100644
--- a/include/asm-arm/arch-iop3xx/iop321.h
+++ b/include/asm-arm/arch-iop3xx/iop321.h
@@ -40,7 +40,7 @@
40#define IOP321_PCI_UPPER_IO_BA (IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_WINDOW_SIZE - 1) 40#define IOP321_PCI_UPPER_IO_BA (IOP321_PCI_LOWER_IO_BA + IOP321_PCI_IO_WINDOW_SIZE - 1)
41#define IOP321_PCI_IO_OFFSET (IOP321_PCI_LOWER_IO_VA - IOP321_PCI_LOWER_IO_BA) 41#define IOP321_PCI_IO_OFFSET (IOP321_PCI_LOWER_IO_VA - IOP321_PCI_LOWER_IO_BA)
42 42
43//#define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1) 43/* #define IOP321_PCI_MEM_WINDOW_SIZE (~*IOP321_IALR1 + 1) */
44#define IOP321_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */ 44#define IOP321_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */
45#define IOP321_PCI_LOWER_MEM_PA 0x80000000 45#define IOP321_PCI_LOWER_MEM_PA 0x80000000
46#define IOP321_PCI_LOWER_MEM_BA (*IOP321_OMWTVR0) 46#define IOP321_PCI_LOWER_MEM_BA (*IOP321_OMWTVR0)
diff --git a/include/asm-arm/arch-ixp2000/enp2611.h b/include/asm-arm/arch-ixp2000/enp2611.h
index 31ae88674968..95128d9f5026 100644
--- a/include/asm-arm/arch-ixp2000/enp2611.h
+++ b/include/asm-arm/arch-ixp2000/enp2611.h
@@ -21,8 +21,20 @@
21#ifndef __ENP2611_H 21#ifndef __ENP2611_H
22#define __ENP2611_H 22#define __ENP2611_H
23 23
24#define ENP2611_GPIO_SCL 0x07 24#define ENP2611_CALEB_PHYS_BASE 0xc5000000
25#define ENP2611_GPIO_SDA 0x06 25#define ENP2611_CALEB_VIRT_BASE 0xfe000000
26#define ENP2611_CALEB_SIZE 0x00100000
27
28#define ENP2611_PM3386_0_PHYS_BASE 0xc6000000
29#define ENP2611_PM3386_0_VIRT_BASE 0xfe100000
30#define ENP2611_PM3386_0_SIZE 0x00100000
31
32#define ENP2611_PM3386_1_PHYS_BASE 0xc6400000
33#define ENP2611_PM3386_1_VIRT_BASE 0xfe200000
34#define ENP2611_PM3386_1_SIZE 0x00100000
35
36#define ENP2611_GPIO_SCL 7
37#define ENP2611_GPIO_SDA 6
26 38
27 39
28#endif 40#endif
diff --git a/include/asm-arm/arch-ixp2000/irqs.h b/include/asm-arm/arch-ixp2000/irqs.h
index 0deb96c12adb..62f09c7ff420 100644
--- a/include/asm-arm/arch-ixp2000/irqs.h
+++ b/include/asm-arm/arch-ixp2000/irqs.h
@@ -67,12 +67,45 @@
67#define IRQ_IXP2000_PCIA 40 67#define IRQ_IXP2000_PCIA 40
68#define IRQ_IXP2000_PCIB 41 68#define IRQ_IXP2000_PCIB 41
69 69
70#define NR_IXP2000_IRQS 42 70/* Int sources from IRQ_ERROR_STATUS */
71#define IRQ_IXP2000_DRAM0_MIN_ERR 42
72#define IRQ_IXP2000_DRAM0_MAJ_ERR 43
73#define IRQ_IXP2000_DRAM1_MIN_ERR 44
74#define IRQ_IXP2000_DRAM1_MAJ_ERR 45
75#define IRQ_IXP2000_DRAM2_MIN_ERR 46
76#define IRQ_IXP2000_DRAM2_MAJ_ERR 47
77/* 48-57 reserved */
78#define IRQ_IXP2000_SRAM0_ERR 58
79#define IRQ_IXP2000_SRAM1_ERR 59
80#define IRQ_IXP2000_SRAM2_ERR 60
81#define IRQ_IXP2000_SRAM3_ERR 61
82/* 62-65 reserved */
83#define IRQ_IXP2000_MEDIA_ERR 66
84#define IRQ_IXP2000_PCI_ERR 67
85#define IRQ_IXP2000_SP_INT 68
86
87#define NR_IXP2000_IRQS 69
71 88
72#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x)) 89#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x))
73 90
74#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS)) 91#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS))
75 92
93#define IXP2000_ERR_IRQ_MASK(irq) ( 1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR))
94#define IXP2000_VALID_ERR_IRQ_MASK (\
95 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \
96 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \
97 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \
98 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \
99 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \
100 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \
101 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \
102 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \
103 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \
104 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \
105 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \
106 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \
107 IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT) )
108
76/* 109/*
77 * This allows for all the on-chip sources plus up to 32 CPLD based 110 * This allows for all the on-chip sources plus up to 32 CPLD based
78 * IRQs. Should be more than enough. 111 * IRQs. Should be more than enough.
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index def089d693d2..fc5ac6aec4f2 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -59,14 +59,15 @@
59#define IXP2000_CAP_SIZE 0x00100000 59#define IXP2000_CAP_SIZE 0x00100000
60 60
61/* 61/*
62 * Addresses for specific on-chip peripherals 62 * Addresses for specific on-chip peripherals.
63 */ 63 */
64#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000 64#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000
65#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000 65#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000
66#define IXP2000_UART_PHYS_BASE 0xc0030000 66#define IXP2000_UART_PHYS_BASE 0xc0030000
67#define IXP2000_UART_VIRT_BASE 0xfef30000 67#define IXP2000_UART_VIRT_BASE 0xfef30000
68#define IXP2000_TIMER_VIRT_BASE 0xfef20000 68#define IXP2000_TIMER_VIRT_BASE 0xfef20000
69#define IXP2000_GPIO_VIRT_BASE 0Xfef10000 69#define IXP2000_UENGINE_CSR_VIRT_BASE 0xfef18000
70#define IXP2000_GPIO_VIRT_BASE 0xfef10000
70 71
71/* 72/*
72 * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual 73 * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual
@@ -252,7 +253,7 @@
252#define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C) 253#define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C)
253 254
254#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */ 255#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */
255#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Centrolfunction bit */ 256#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Central function bit */
256#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */ 257#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */
257 258
258/* These are from the IRQ register in the PCI ISR register */ 259/* These are from the IRQ register in the PCI ISR register */
diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h
index 4f489cc0dfa5..ddbbb34b5f95 100644
--- a/include/asm-arm/arch-ixp2000/system.h
+++ b/include/asm-arm/arch-ixp2000/system.h
@@ -26,29 +26,24 @@ static inline void arch_reset(char mode)
26 * RedBoot bank. 26 * RedBoot bank.
27 */ 27 */
28 if (machine_is_ixdp2401()) { 28 if (machine_is_ixdp2401()) {
29 *IXDP2X01_CPLD_FLASH_REG = ((0 >> IXDP2X01_FLASH_WINDOW_BITS) 29 ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
30 | IXDP2X01_CPLD_FLASH_INTERN); 30 ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
31 *IXDP2X01_CPLD_RESET_REG = 0xffffffff; 31 | IXDP2X01_CPLD_FLASH_INTERN));
32 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff);
32 } 33 }
33 34
34 /* 35 /*
35 * On IXDP2801 we need to write this magic sequence to the CPLD 36 * On IXDP2801 we need to write this magic sequence to the CPLD
36 * to cause a complete reset of the CPU and all external devices 37 * to cause a complete reset of the CPU and all external devices
37 * and moves the flash bank register back to 0. 38 * and move the flash bank register back to 0.
38 */ 39 */
39 if (machine_is_ixdp2801()) { 40 if (machine_is_ixdp2801()) {
40 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; 41 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
42
41 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); 43 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
42 *IXDP2X01_CPLD_RESET_REG = reset_reg; 44 ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg);
43 mb(); 45 ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000);
44 *IXDP2X01_CPLD_RESET_REG = 0x80000000;
45 } 46 }
46 47
47 /* 48 ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
48 * We do a reset all if we are PCI master. We could be a slave and we
49 * don't want to do anything funky on the PCI bus.
50 */
51 if (*IXP2000_STRAP_OPTIONS & CFG_PCI_BOOT_HOST) {
52 *(IXP2000_RESET0) |= (RSTALL);
53 }
54} 49}
diff --git a/include/asm-arm/arch-ixp2000/uengine.h b/include/asm-arm/arch-ixp2000/uengine.h
new file mode 100644
index 000000000000..b442d65c6593
--- /dev/null
+++ b/include/asm-arm/arch-ixp2000/uengine.h
@@ -0,0 +1,62 @@
1/*
2 * Generic library functions for the microengines found on the Intel
3 * IXP2000 series of network processors.
4 *
5 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Dedicated to Marija Kulikova.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as
10 * published by the Free Software Foundation; either version 2.1 of the
11 * License, or (at your option) any later version.
12 */
13
14#ifndef __IXP2000_UENGINE_H
15#define __IXP2000_UENGINE_H
16
17extern u32 ixp2000_uengine_mask;
18
19struct ixp2000_uengine_code
20{
21 u32 cpu_model_bitmask;
22 u8 cpu_min_revision;
23 u8 cpu_max_revision;
24
25 u32 uengine_parameters;
26
27 struct ixp2000_reg_value {
28 int reg;
29 u32 value;
30 } *initial_reg_values;
31
32 int num_insns;
33 u8 *insns;
34};
35
36u32 ixp2000_uengine_csr_read(int uengine, int offset);
37void ixp2000_uengine_csr_write(int uengine, int offset, u32 value);
38void ixp2000_uengine_reset(u32 uengine_mask);
39void ixp2000_uengine_set_mode(int uengine, u32 mode);
40void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns);
41void ixp2000_uengine_init_context(int uengine, int context, int pc);
42void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask);
43void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask);
44int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c);
45
46#define IXP2000_UENGINE_8_CONTEXTS 0x00000000
47#define IXP2000_UENGINE_4_CONTEXTS 0x80000000
48#define IXP2000_UENGINE_PRN_UPDATE_EVERY 0x40000000
49#define IXP2000_UENGINE_PRN_UPDATE_ON_ACCESS 0x00000000
50#define IXP2000_UENGINE_NN_FROM_SELF 0x00100000
51#define IXP2000_UENGINE_NN_FROM_PREVIOUS 0x00000000
52#define IXP2000_UENGINE_ASSERT_EMPTY_AT_3 0x000c0000
53#define IXP2000_UENGINE_ASSERT_EMPTY_AT_2 0x00080000
54#define IXP2000_UENGINE_ASSERT_EMPTY_AT_1 0x00040000
55#define IXP2000_UENGINE_ASSERT_EMPTY_AT_0 0x00000000
56#define IXP2000_UENGINE_LM_ADDR1_GLOBAL 0x00020000
57#define IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT 0x00000000
58#define IXP2000_UENGINE_LM_ADDR0_GLOBAL 0x00010000
59#define IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT 0x00000000
60
61
62#endif
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 80d05ecad2f0..688f7f90d93e 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -80,9 +80,9 @@ __ixp4xx_iounmap(void __iomem *addr)
80#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) 80#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x)
81#define __arch_iounmap(a) __ixp4xx_iounmap(a) 81#define __arch_iounmap(a) __ixp4xx_iounmap(a)
82 82
83#define writeb(p, v) __ixp4xx_writeb(p, v) 83#define writeb(v, p) __ixp4xx_writeb(v, p)
84#define writew(p, v) __ixp4xx_writew(p, v) 84#define writew(v, p) __ixp4xx_writew(v, p)
85#define writel(p, v) __ixp4xx_writel(p, v) 85#define writel(v, p) __ixp4xx_writel(v, p)
86 86
87#define writesb(p, v, l) __ixp4xx_writesb(p, v, l) 87#define writesb(p, v, l) __ixp4xx_writesb(p, v, l)
88#define writesw(p, v, l) __ixp4xx_writesw(p, v, l) 88#define writesw(p, v, l) __ixp4xx_writesw(p, v, l)
@@ -97,8 +97,9 @@ __ixp4xx_iounmap(void __iomem *addr)
97#define readsl(p, v, l) __ixp4xx_readsl(p, v, l) 97#define readsl(p, v, l) __ixp4xx_readsl(p, v, l)
98 98
99static inline void 99static inline void
100__ixp4xx_writeb(u8 value, u32 addr) 100__ixp4xx_writeb(u8 value, volatile void __iomem *p)
101{ 101{
102 u32 addr = (u32)p;
102 u32 n, byte_enables, data; 103 u32 n, byte_enables, data;
103 104
104 if (addr >= VMALLOC_START) { 105 if (addr >= VMALLOC_START) {
@@ -113,15 +114,16 @@ __ixp4xx_writeb(u8 value, u32 addr)
113} 114}
114 115
115static inline void 116static inline void
116__ixp4xx_writesb(u32 bus_addr, const u8 *vaddr, int count) 117__ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count)
117{ 118{
118 while (count--) 119 while (count--)
119 writeb(*vaddr++, bus_addr); 120 writeb(*vaddr++, bus_addr);
120} 121}
121 122
122static inline void 123static inline void
123__ixp4xx_writew(u16 value, u32 addr) 124__ixp4xx_writew(u16 value, volatile void __iomem *p)
124{ 125{
126 u32 addr = (u32)p;
125 u32 n, byte_enables, data; 127 u32 n, byte_enables, data;
126 128
127 if (addr >= VMALLOC_START) { 129 if (addr >= VMALLOC_START) {
@@ -136,15 +138,16 @@ __ixp4xx_writew(u16 value, u32 addr)
136} 138}
137 139
138static inline void 140static inline void
139__ixp4xx_writesw(u32 bus_addr, const u16 *vaddr, int count) 141__ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count)
140{ 142{
141 while (count--) 143 while (count--)
142 writew(*vaddr++, bus_addr); 144 writew(*vaddr++, bus_addr);
143} 145}
144 146
145static inline void 147static inline void
146__ixp4xx_writel(u32 value, u32 addr) 148__ixp4xx_writel(u32 value, volatile void __iomem *p)
147{ 149{
150 u32 addr = (u32)p;
148 if (addr >= VMALLOC_START) { 151 if (addr >= VMALLOC_START) {
149 __raw_writel(value, addr); 152 __raw_writel(value, addr);
150 return; 153 return;
@@ -154,15 +157,16 @@ __ixp4xx_writel(u32 value, u32 addr)
154} 157}
155 158
156static inline void 159static inline void
157__ixp4xx_writesl(u32 bus_addr, const u32 *vaddr, int count) 160__ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count)
158{ 161{
159 while (count--) 162 while (count--)
160 writel(*vaddr++, bus_addr); 163 writel(*vaddr++, bus_addr);
161} 164}
162 165
163static inline unsigned char 166static inline unsigned char
164__ixp4xx_readb(u32 addr) 167__ixp4xx_readb(const volatile void __iomem *p)
165{ 168{
169 u32 addr = (u32)p;
166 u32 n, byte_enables, data; 170 u32 n, byte_enables, data;
167 171
168 if (addr >= VMALLOC_START) 172 if (addr >= VMALLOC_START)
@@ -177,15 +181,16 @@ __ixp4xx_readb(u32 addr)
177} 181}
178 182
179static inline void 183static inline void
180__ixp4xx_readsb(u32 bus_addr, u8 *vaddr, u32 count) 184__ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count)
181{ 185{
182 while (count--) 186 while (count--)
183 *vaddr++ = readb(bus_addr); 187 *vaddr++ = readb(bus_addr);
184} 188}
185 189
186static inline unsigned short 190static inline unsigned short
187__ixp4xx_readw(u32 addr) 191__ixp4xx_readw(const volatile void __iomem *p)
188{ 192{
193 u32 addr = (u32)p;
189 u32 n, byte_enables, data; 194 u32 n, byte_enables, data;
190 195
191 if (addr >= VMALLOC_START) 196 if (addr >= VMALLOC_START)
@@ -200,15 +205,16 @@ __ixp4xx_readw(u32 addr)
200} 205}
201 206
202static inline void 207static inline void
203__ixp4xx_readsw(u32 bus_addr, u16 *vaddr, u32 count) 208__ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count)
204{ 209{
205 while (count--) 210 while (count--)
206 *vaddr++ = readw(bus_addr); 211 *vaddr++ = readw(bus_addr);
207} 212}
208 213
209static inline unsigned long 214static inline unsigned long
210__ixp4xx_readl(u32 addr) 215__ixp4xx_readl(const volatile void __iomem *p)
211{ 216{
217 u32 addr = (u32)p;
212 u32 data; 218 u32 data;
213 219
214 if (addr >= VMALLOC_START) 220 if (addr >= VMALLOC_START)
@@ -221,7 +227,7 @@ __ixp4xx_readl(u32 addr)
221} 227}
222 228
223static inline void 229static inline void
224__ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count) 230__ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count)
225{ 231{
226 while (count--) 232 while (count--)
227 *vaddr++ = readl(bus_addr); 233 *vaddr++ = readl(bus_addr);
@@ -239,7 +245,7 @@ __ixp4xx_readsl(u32 bus_addr, u32 *vaddr, u32 count)
239 eth_copy_and_sum((s),__mem_pci(c),(l),(b)) 245 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
240 246
241static inline int 247static inline int
242check_signature(unsigned long bus_addr, const unsigned char *signature, 248check_signature(const unsigned char __iomem *bus_addr, const unsigned char *signature,
243 int length) 249 int length)
244{ 250{
245 int retval = 0; 251 int retval = 0;
@@ -389,7 +395,7 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count)
389#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \ 395#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \
390 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET))) 396 ((unsigned long)p <= (PIO_MASK + PIO_OFFSET)))
391static inline unsigned int 397static inline unsigned int
392__ixp4xx_ioread8(void __iomem *addr) 398__ixp4xx_ioread8(const void __iomem *addr)
393{ 399{
394 unsigned long port = (unsigned long __force)addr; 400 unsigned long port = (unsigned long __force)addr;
395 if (__is_io_address(port)) 401 if (__is_io_address(port))
@@ -398,12 +404,12 @@ __ixp4xx_ioread8(void __iomem *addr)
398#ifndef CONFIG_IXP4XX_INDIRECT_PCI 404#ifndef CONFIG_IXP4XX_INDIRECT_PCI
399 return (unsigned int)__raw_readb(port); 405 return (unsigned int)__raw_readb(port);
400#else 406#else
401 return (unsigned int)__ixp4xx_readb(port); 407 return (unsigned int)__ixp4xx_readb(addr);
402#endif 408#endif
403} 409}
404 410
405static inline void 411static inline void
406__ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count) 412__ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count)
407{ 413{
408 unsigned long port = (unsigned long __force)addr; 414 unsigned long port = (unsigned long __force)addr;
409 if (__is_io_address(port)) 415 if (__is_io_address(port))
@@ -412,12 +418,12 @@ __ixp4xx_ioread8_rep(void __iomem *addr, void *vaddr, u32 count)
412#ifndef CONFIG_IXP4XX_INDIRECT_PCI 418#ifndef CONFIG_IXP4XX_INDIRECT_PCI
413 __raw_readsb(addr, vaddr, count); 419 __raw_readsb(addr, vaddr, count);
414#else 420#else
415 __ixp4xx_readsb(port, vaddr, count); 421 __ixp4xx_readsb(addr, vaddr, count);
416#endif 422#endif
417} 423}
418 424
419static inline unsigned int 425static inline unsigned int
420__ixp4xx_ioread16(void __iomem *addr) 426__ixp4xx_ioread16(const void __iomem *addr)
421{ 427{
422 unsigned long port = (unsigned long __force)addr; 428 unsigned long port = (unsigned long __force)addr;
423 if (__is_io_address(port)) 429 if (__is_io_address(port))
@@ -426,12 +432,12 @@ __ixp4xx_ioread16(void __iomem *addr)
426#ifndef CONFIG_IXP4XX_INDIRECT_PCI 432#ifndef CONFIG_IXP4XX_INDIRECT_PCI
427 return le16_to_cpu(__raw_readw((u32)port)); 433 return le16_to_cpu(__raw_readw((u32)port));
428#else 434#else
429 return (unsigned int)__ixp4xx_readw((u32)port); 435 return (unsigned int)__ixp4xx_readw(addr);
430#endif 436#endif
431} 437}
432 438
433static inline void 439static inline void
434__ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count) 440__ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count)
435{ 441{
436 unsigned long port = (unsigned long __force)addr; 442 unsigned long port = (unsigned long __force)addr;
437 if (__is_io_address(port)) 443 if (__is_io_address(port))
@@ -440,12 +446,12 @@ __ixp4xx_ioread16_rep(void __iomem *addr, void *vaddr, u32 count)
440#ifndef CONFIG_IXP4XX_INDIRECT_PCI 446#ifndef CONFIG_IXP4XX_INDIRECT_PCI
441 __raw_readsw(addr, vaddr, count); 447 __raw_readsw(addr, vaddr, count);
442#else 448#else
443 __ixp4xx_readsw(port, vaddr, count); 449 __ixp4xx_readsw(addr, vaddr, count);
444#endif 450#endif
445} 451}
446 452
447static inline unsigned int 453static inline unsigned int
448__ixp4xx_ioread32(void __iomem *addr) 454__ixp4xx_ioread32(const void __iomem *addr)
449{ 455{
450 unsigned long port = (unsigned long __force)addr; 456 unsigned long port = (unsigned long __force)addr;
451 if (__is_io_address(port)) 457 if (__is_io_address(port))
@@ -454,13 +460,13 @@ __ixp4xx_ioread32(void __iomem *addr)
454#ifndef CONFIG_IXP4XX_INDIRECT_PCI 460#ifndef CONFIG_IXP4XX_INDIRECT_PCI
455 return le32_to_cpu(__raw_readl((u32)port)); 461 return le32_to_cpu(__raw_readl((u32)port));
456#else 462#else
457 return (unsigned int)__ixp4xx_readl((u32)port); 463 return (unsigned int)__ixp4xx_readl(addr);
458#endif 464#endif
459 } 465 }
460} 466}
461 467
462static inline void 468static inline void
463__ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count) 469__ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count)
464{ 470{
465 unsigned long port = (unsigned long __force)addr; 471 unsigned long port = (unsigned long __force)addr;
466 if (__is_io_address(port)) 472 if (__is_io_address(port))
@@ -469,7 +475,7 @@ __ixp4xx_ioread32_rep(void __iomem *addr, void *vaddr, u32 count)
469#ifndef CONFIG_IXP4XX_INDIRECT_PCI 475#ifndef CONFIG_IXP4XX_INDIRECT_PCI
470 __raw_readsl(addr, vaddr, count); 476 __raw_readsl(addr, vaddr, count);
471#else 477#else
472 __ixp4xx_readsl(port, vaddr, count); 478 __ixp4xx_readsl(addr, vaddr, count);
473#endif 479#endif
474} 480}
475 481
@@ -483,7 +489,7 @@ __ixp4xx_iowrite8(u8 value, void __iomem *addr)
483#ifndef CONFIG_IXP4XX_INDIRECT_PCI 489#ifndef CONFIG_IXP4XX_INDIRECT_PCI
484 __raw_writeb(value, port); 490 __raw_writeb(value, port);
485#else 491#else
486 __ixp4xx_writeb(value, port); 492 __ixp4xx_writeb(value, addr);
487#endif 493#endif
488} 494}
489 495
@@ -497,7 +503,7 @@ __ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count)
497#ifndef CONFIG_IXP4XX_INDIRECT_PCI 503#ifndef CONFIG_IXP4XX_INDIRECT_PCI
498 __raw_writesb(addr, vaddr, count); 504 __raw_writesb(addr, vaddr, count);
499#else 505#else
500 __ixp4xx_writesb(port, vaddr, count); 506 __ixp4xx_writesb(addr, vaddr, count);
501#endif 507#endif
502} 508}
503 509
@@ -511,7 +517,7 @@ __ixp4xx_iowrite16(u16 value, void __iomem *addr)
511#ifndef CONFIG_IXP4XX_INDIRECT_PCI 517#ifndef CONFIG_IXP4XX_INDIRECT_PCI
512 __raw_writew(cpu_to_le16(value), addr); 518 __raw_writew(cpu_to_le16(value), addr);
513#else 519#else
514 __ixp4xx_writew(value, port); 520 __ixp4xx_writew(value, addr);
515#endif 521#endif
516} 522}
517 523
@@ -525,7 +531,7 @@ __ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count)
525#ifndef CONFIG_IXP4XX_INDIRECT_PCI 531#ifndef CONFIG_IXP4XX_INDIRECT_PCI
526 __raw_writesw(addr, vaddr, count); 532 __raw_writesw(addr, vaddr, count);
527#else 533#else
528 __ixp4xx_writesw(port, vaddr, count); 534 __ixp4xx_writesw(addr, vaddr, count);
529#endif 535#endif
530} 536}
531 537
@@ -539,7 +545,7 @@ __ixp4xx_iowrite32(u32 value, void __iomem *addr)
539#ifndef CONFIG_IXP4XX_INDIRECT_PCI 545#ifndef CONFIG_IXP4XX_INDIRECT_PCI
540 __raw_writel(cpu_to_le32(value), port); 546 __raw_writel(cpu_to_le32(value), port);
541#else 547#else
542 __ixp4xx_writel(value, port); 548 __ixp4xx_writel(value, addr);
543#endif 549#endif
544} 550}
545 551
@@ -553,7 +559,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
553#ifndef CONFIG_IXP4XX_INDIRECT_PCI 559#ifndef CONFIG_IXP4XX_INDIRECT_PCI
554 __raw_writesl(addr, vaddr, count); 560 __raw_writesl(addr, vaddr, count);
555#else 561#else
556 __ixp4xx_writesl(port, vaddr, count); 562 __ixp4xx_writesl(addr, vaddr, count);
557#endif 563#endif
558} 564}
559 565
diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S
new file mode 100644
index 000000000000..ed28bd012236
--- /dev/null
+++ b/include/asm-arm/arch-realview/debug-macro.S
@@ -0,0 +1,38 @@
1/* linux/include/asm-arm/arch-realview/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <asm/hardware/amba_serial.h>
15
16 .macro addruart,rx
17 mrc p15, 0, \rx, c1, c0
18 tst \rx, #1 @ MMU enabled?
19 moveq \rx, #0x10000000
20 movne \rx, #0xf1000000 @ virtual base
21 orr \rx, \rx, #0x00009000
22 .endm
23
24 .macro senduart,rd,rx
25 strb \rd, [\rx, #UART01x_DR]
26 .endm
27
28 .macro waituart,rd,rx
291001: ldr \rd, [\rx, #0x18] @ UARTFLG
30 tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full
31 bne 1001b
32 .endm
33
34 .macro busyuart,rd,rx
351001: ldr \rd, [\rx, #0x18] @ UARTFLG
36 tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy
37 bne 1001b
38 .endm
diff --git a/include/asm-arm/arch-realview/dma.h b/include/asm-arm/arch-realview/dma.h
new file mode 100644
index 000000000000..744491a74bd9
--- /dev/null
+++ b/include/asm-arm/arch-realview/dma.h
@@ -0,0 +1,27 @@
1/*
2 * linux/include/asm-arm/arch-realview/dma.h
3 *
4 * Copyright (C) 2003 ARM Limited.
5 * Copyright (C) 1997,1998 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_DMA_H
22#define __ASM_ARCH_DMA_H
23
24#define MAX_DMA_ADDRESS 0xffffffff
25#define MAX_DMA_CHANNELS 0
26
27#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
new file mode 100644
index 000000000000..2712ba77bb3a
--- /dev/null
+++ b/include/asm-arm/arch-realview/entry-macro.S
@@ -0,0 +1,49 @@
1/*
2 * include/asm-arm/arch-realview/entry-macro.S
3 *
4 * Low-level IRQ helper macros for RealView platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <asm/hardware/gic.h>
12
13 .macro disable_fiq
14 .endm
15
16 /*
17 * The interrupt numbering scheme is defined in the
18 * interrupt controller spec. To wit:
19 *
20 * Interrupts 0-15 are IPI
21 * 16-28 are reserved
22 * 29-31 are local. We allow 30 to be used for the watchdog.
23 * 32-1020 are global
24 * 1021-1022 are reserved
25 * 1023 is "spurious" (no interrupt)
26 *
27 * For now, we ignore all local interrupts so only return an interrupt if it's
28 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
29 *
30 * A simple read from the controller will tell us the number of the highest
31 * priority enabled interrupt. We then just need to check whether it is in the
32 * valid range for an IRQ (30-1020 inclusive).
33 */
34
35 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
36
37 ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
38 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
39
40 ldr \tmp, =1021
41
42 bic \irqnr, \irqstat, #0x1c00
43
44 cmp \irqnr, #29
45 cmpcc \irqnr, \irqnr
46 cmpne \irqnr, \tmp
47 cmpcs \irqnr, \irqnr
48
49 .endm
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
new file mode 100644
index 000000000000..67879cdb6ef2
--- /dev/null
+++ b/include/asm-arm/arch-realview/hardware.h
@@ -0,0 +1,31 @@
1/*
2 * linux/include/asm-arm/arch-realview/hardware.h
3 *
4 * This file contains the hardware definitions of the RealView boards.
5 *
6 * Copyright (C) 2003 ARM Limited.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#ifndef __ASM_ARCH_HARDWARE_H
23#define __ASM_ARCH_HARDWARE_H
24
25#include <asm/sizes.h>
26#include <asm/arch/platform.h>
27
28/* macro to get at IO space when running virtually */
29#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
30
31#endif
diff --git a/include/asm-arm/arch-realview/io.h b/include/asm-arm/arch-realview/io.h
new file mode 100644
index 000000000000..d444a68ac330
--- /dev/null
+++ b/include/asm-arm/arch-realview/io.h
@@ -0,0 +1,34 @@
1/*
2 * linux/include/asm-arm/arch-realview/io.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25static inline void __iomem *__io(unsigned long addr)
26{
27 return (void __iomem *)addr;
28}
29
30#define __io(a) __io(a)
31#define __mem_pci(a) (a)
32#define __mem_isa(a) (a)
33
34#endif
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
new file mode 100644
index 000000000000..ff376494e5b1
--- /dev/null
+++ b/include/asm-arm/arch-realview/irqs.h
@@ -0,0 +1,103 @@
1/*
2 * linux/include/asm-arm/arch-realview/irqs.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <asm/arch/platform.h>
23
24/*
25 * IRQ interrupts definitions are the same the INT definitions
26 * held within platform.h
27 */
28#define IRQ_GIC_START 32
29#define IRQ_WDOGINT (IRQ_GIC_START + INT_WDOGINT)
30#define IRQ_SOFTINT (IRQ_GIC_START + INT_SOFTINT)
31#define IRQ_COMMRx (IRQ_GIC_START + INT_COMMRx)
32#define IRQ_COMMTx (IRQ_GIC_START + INT_COMMTx)
33#define IRQ_TIMERINT0_1 (IRQ_GIC_START + INT_TIMERINT0_1)
34#define IRQ_TIMERINT2_3 (IRQ_GIC_START + INT_TIMERINT2_3)
35#define IRQ_GPIOINT0 (IRQ_GIC_START + INT_GPIOINT0)
36#define IRQ_GPIOINT1 (IRQ_GIC_START + INT_GPIOINT1)
37#define IRQ_GPIOINT2 (IRQ_GIC_START + INT_GPIOINT2)
38#define IRQ_GPIOINT3 (IRQ_GIC_START + INT_GPIOINT3)
39#define IRQ_RTCINT (IRQ_GIC_START + INT_RTCINT)
40#define IRQ_SSPINT (IRQ_GIC_START + INT_SSPINT)
41#define IRQ_UARTINT0 (IRQ_GIC_START + INT_UARTINT0)
42#define IRQ_UARTINT1 (IRQ_GIC_START + INT_UARTINT1)
43#define IRQ_UARTINT2 (IRQ_GIC_START + INT_UARTINT2)
44#define IRQ_UART3 (IRQ_GIC_START + INT_UARTINT3)
45#define IRQ_SCIINT (IRQ_GIC_START + INT_SCIINT)
46#define IRQ_CLCDINT (IRQ_GIC_START + INT_CLCDINT)
47#define IRQ_DMAINT (IRQ_GIC_START + INT_DMAINT)
48#define IRQ_PWRFAILINT (IRQ_GIC_START + INT_PWRFAILINT)
49#define IRQ_MBXINT (IRQ_GIC_START + INT_MBXINT)
50#define IRQ_GNDINT (IRQ_GIC_START + INT_GNDINT)
51#define IRQ_MMCI0B (IRQ_GIC_START + INT_MMCI0B)
52#define IRQ_MMCI1B (IRQ_GIC_START + INT_MMCI1B)
53#define IRQ_KMI0 (IRQ_GIC_START + INT_KMI0)
54#define IRQ_KMI1 (IRQ_GIC_START + INT_KMI1)
55#define IRQ_SCI3 (IRQ_GIC_START + INT_SCI3)
56#define IRQ_CLCD (IRQ_GIC_START + INT_CLCD)
57#define IRQ_TOUCH (IRQ_GIC_START + INT_TOUCH)
58#define IRQ_KEYPAD (IRQ_GIC_START + INT_KEYPAD)
59#define IRQ_DoC (IRQ_GIC_START + INT_DoC)
60#define IRQ_MMCI0A (IRQ_GIC_START + INT_MMCI0A)
61#define IRQ_MMCI1A (IRQ_GIC_START + INT_MMCI1A)
62#define IRQ_AACI (IRQ_GIC_START + INT_AACI)
63#define IRQ_ETH (IRQ_GIC_START + INT_ETH)
64#define IRQ_USB (IRQ_GIC_START + INT_USB)
65
66#define IRQMASK_WDOGINT INTMASK_WDOGINT
67#define IRQMASK_SOFTINT INTMASK_SOFTINT
68#define IRQMASK_COMMRx INTMASK_COMMRx
69#define IRQMASK_COMMTx INTMASK_COMMTx
70#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1
71#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3
72#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0
73#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1
74#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2
75#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3
76#define IRQMASK_RTCINT INTMASK_RTCINT
77#define IRQMASK_SSPINT INTMASK_SSPINT
78#define IRQMASK_UARTINT0 INTMASK_UARTINT0
79#define IRQMASK_UARTINT1 INTMASK_UARTINT1
80#define IRQMASK_UARTINT2 INTMASK_UARTINT2
81#define IRQMASK_SCIINT INTMASK_SCIINT
82#define IRQMASK_CLCDINT INTMASK_CLCDINT
83#define IRQMASK_DMAINT INTMASK_DMAINT
84#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT
85#define IRQMASK_MBXINT INTMASK_MBXINT
86#define IRQMASK_GNDINT INTMASK_GNDINT
87#define IRQMASK_MMCI0B INTMASK_MMCI0B
88#define IRQMASK_MMCI1B INTMASK_MMCI1B
89#define IRQMASK_KMI0 INTMASK_KMI0
90#define IRQMASK_KMI1 INTMASK_KMI1
91#define IRQMASK_SCI3 INTMASK_SCI3
92#define IRQMASK_UART3 INTMASK_UART3
93#define IRQMASK_CLCD INTMASK_CLCD
94#define IRQMASK_TOUCH INTMASK_TOUCH
95#define IRQMASK_KEYPAD INTMASK_KEYPAD
96#define IRQMASK_DoC INTMASK_DoC
97#define IRQMASK_MMCI0A INTMASK_MMCI0A
98#define IRQMASK_MMCI1A INTMASK_MMCI1A
99#define IRQMASK_AACI INTMASK_AACI
100#define IRQMASK_ETH INTMASK_ETH
101#define IRQMASK_USB INTMASK_USB
102
103#define NR_IRQS (IRQ_GIC_START + 64)
diff --git a/include/asm-arm/arch-realview/memory.h b/include/asm-arm/arch-realview/memory.h
new file mode 100644
index 000000000000..ed370abb638f
--- /dev/null
+++ b/include/asm-arm/arch-realview/memory.h
@@ -0,0 +1,38 @@
1/*
2 * linux/include/asm-arm/arch-realview/memory.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_MEMORY_H
21#define __ASM_ARCH_MEMORY_H
22
23/*
24 * Physical DRAM offset.
25 */
26#define PHYS_OFFSET UL(0x00000000)
27
28/*
29 * Virtual view <-> DMA view memory address translations
30 * virt_to_bus: Used to translate the virtual address to an
31 * address suitable to be passed to set_dma_addr
32 * bus_to_virt: Used to convert an address for DMA operations
33 * to an address that the kernel can use.
34 */
35#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
36#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
37
38#endif
diff --git a/include/asm-arm/arch-realview/param.h b/include/asm-arm/arch-realview/param.h
new file mode 100644
index 000000000000..89b1235d32bd
--- /dev/null
+++ b/include/asm-arm/arch-realview/param.h
@@ -0,0 +1,19 @@
1/*
2 * linux/include/asm-arm/arch-realview/param.h
3 *
4 * Copyright (C) 2002 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h
new file mode 100644
index 000000000000..4b6de13a6b9a
--- /dev/null
+++ b/include/asm-arm/arch-realview/platform.h
@@ -0,0 +1,395 @@
1/*
2 * linux/include/asm-arm/arch-realview/platform.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __address_h
22#define __address_h 1
23
24/*
25 * Memory definitions
26 */
27#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
28#define REALVIEW_BOOT_ROM_HI 0x30000000
29#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
30#define REALVIEW_BOOT_ROM_SIZE SZ_64M
31
32#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
33#define REALVIEW_SSRAM_SIZE SZ_2M
34
35#define REALVIEW_FLASH_BASE 0x40000000
36#define REALVIEW_FLASH_SIZE SZ_64M
37
38/*
39 * SDRAM
40 */
41#define REALVIEW_SDRAM_BASE 0x00000000
42
43/*
44 * Logic expansion modules
45 *
46 */
47
48
49/* ------------------------------------------------------------------------
50 * RealView Registers
51 * ------------------------------------------------------------------------
52 *
53 */
54#define REALVIEW_SYS_ID_OFFSET 0x00
55#define REALVIEW_SYS_SW_OFFSET 0x04
56#define REALVIEW_SYS_LED_OFFSET 0x08
57#define REALVIEW_SYS_OSC0_OFFSET 0x0C
58
59#define REALVIEW_SYS_OSC1_OFFSET 0x10
60#define REALVIEW_SYS_OSC2_OFFSET 0x14
61#define REALVIEW_SYS_OSC3_OFFSET 0x18
62#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
63
64#define REALVIEW_SYS_LOCK_OFFSET 0x20
65#define REALVIEW_SYS_100HZ_OFFSET 0x24
66#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
67#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
68#define REALVIEW_SYS_FLAGS_OFFSET 0x30
69#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
70#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
71#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
72#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
73#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
74#define REALVIEW_SYS_RESETCTL_OFFSET 0x40
75#define REALVIEW_SYS_PCICTL_OFFSET 0x44
76#define REALVIEW_SYS_MCI_OFFSET 0x48
77#define REALVIEW_SYS_FLASH_OFFSET 0x4C
78#define REALVIEW_SYS_CLCD_OFFSET 0x50
79#define REALVIEW_SYS_CLCDSER_OFFSET 0x54
80#define REALVIEW_SYS_BOOTCS_OFFSET 0x58
81#define REALVIEW_SYS_24MHz_OFFSET 0x5C
82#define REALVIEW_SYS_MISC_OFFSET 0x60
83#define REALVIEW_SYS_IOSEL_OFFSET 0x70
84#define REALVIEW_SYS_TEST_OSC0_OFFSET 0x80
85#define REALVIEW_SYS_TEST_OSC1_OFFSET 0x84
86#define REALVIEW_SYS_TEST_OSC2_OFFSET 0x88
87#define REALVIEW_SYS_TEST_OSC3_OFFSET 0x8C
88#define REALVIEW_SYS_TEST_OSC4_OFFSET 0x90
89
90#define REALVIEW_SYS_BASE 0x10000000
91#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
92#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
93#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
94#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
95#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
96
97#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
98#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
99#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
100#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
101#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
102#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
103#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
104#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
105#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
106#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
107#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
108#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
109#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
110#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
111#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
112#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
113#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
114#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
115#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
116#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
117#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
118#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
119#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
120#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
121#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
122
123/*
124 * Values for REALVIEW_SYS_RESET_CTRL
125 */
126#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
127#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
128#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
129#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
130#define REALVIEW_SYS_CTRL_RESET_POR 0x05
131#define REALVIEW_SYS_CTRL_RESET_DoC 0x06
132
133#define REALVIEW_SYS_CTRL_LED (1 << 0)
134
135
136/* ------------------------------------------------------------------------
137 * RealView control registers
138 * ------------------------------------------------------------------------
139 */
140
141/*
142 * REALVIEW_IDFIELD
143 *
144 * 31:24 = manufacturer (0x41 = ARM)
145 * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
146 * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
147 * 11:4 = build value
148 * 3:0 = revision number (0x1 = rev B (AHB))
149 */
150
151/*
152 * REALVIEW_SYS_LOCK
153 * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
154 * SYS_CLD, SYS_BOOTCS
155 */
156#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
157#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
158
159/*
160 * REALVIEW_SYS_FLASH
161 */
162#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
163
164/*
165 * REALVIEW_INTREG
166 * - used to acknowledge and control MMCI and UART interrupts
167 */
168#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
169#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
170#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
171 /* write 1 to acknowledge and clear */
172#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
173#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
174
175/*
176 * REALVIEW peripheral addresses
177 */
178#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */
179#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */
180 /* Reserved 0x10003000 */
181#define REALVIEW_AACI_BASE 0x10004000 /* Audio */
182#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */
183#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */
184#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */
185#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */
186#define REALVIEW_UART0_BASE 0x10009000 /* UART 0 */
187#define REALVIEW_UART1_BASE 0x1000A000 /* UART 1 */
188#define REALVIEW_UART2_BASE 0x1000B000 /* UART 2 */
189#define REALVIEW_UART3_BASE 0x1000C000 /* UART 3 */
190#define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
191#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
192 /* Reserved 0x1000F000 */
193#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
194#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
195#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
196#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
197#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
198#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
199 /* Reserved 0x10016000 */
200#define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */
201#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */
202#define REALVIEW_PCI_CORE_BASE 0x10019000 /* PCI configuration */
203 /* Reserved 0x1001A000 - 0x1001FFFF */
204#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
205#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
206#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
207#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
208#define REALVIEW_SMC_BASE 0x10080000 /* SMC */
209 /* Reserved 0x10090000 - 0x100EFFFF */
210
211#define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */
212
213/* PCI space */
214#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */
215#define REALVIEW_PCI_CFG_BASE 0x42000000
216#define REALVIEW_PCI_MEM_BASE0 0x44000000
217#define REALVIEW_PCI_MEM_BASE1 0x50000000
218#define REALVIEW_PCI_MEM_BASE2 0x60000000
219/* Sizes of above maps */
220#define REALVIEW_PCI_BASE_SIZE 0x01000000
221#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000
222#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
223#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
224#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
225
226#define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
227#define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */
228
229/*
230 * Disk on Chip
231 */
232#define REALVIEW_DOC_BASE 0x2C000000
233#define REALVIEW_DOC_SIZE (16 << 20)
234#define REALVIEW_DOC_PAGE_SIZE 512
235#define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE)
236
237#define ERASE_UNIT_PAGES 32
238#define START_PAGE 0x80
239
240/*
241 * LED settings, bits [7:0]
242 */
243#define REALVIEW_SYS_LED0 (1 << 0)
244#define REALVIEW_SYS_LED1 (1 << 1)
245#define REALVIEW_SYS_LED2 (1 << 2)
246#define REALVIEW_SYS_LED3 (1 << 3)
247#define REALVIEW_SYS_LED4 (1 << 4)
248#define REALVIEW_SYS_LED5 (1 << 5)
249#define REALVIEW_SYS_LED6 (1 << 6)
250#define REALVIEW_SYS_LED7 (1 << 7)
251
252#define ALL_LEDS 0xFF
253
254#define LED_BANK REALVIEW_SYS_LED
255
256/*
257 * Control registers
258 */
259#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
260#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
261#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
262#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
263
264/* ------------------------------------------------------------------------
265 * Interrupts - bit assignment (primary)
266 * ------------------------------------------------------------------------
267 */
268#define INT_WDOGINT 0 /* Watchdog timer */
269#define INT_SOFTINT 1 /* Software interrupt */
270#define INT_COMMRx 2 /* Debug Comm Rx interrupt */
271#define INT_COMMTx 3 /* Debug Comm Tx interrupt */
272#define INT_TIMERINT0_1 4 /* Timer 0 and 1 */
273#define INT_TIMERINT2_3 5 /* Timer 2 and 3 */
274#define INT_GPIOINT0 6 /* GPIO 0 */
275#define INT_GPIOINT1 7 /* GPIO 1 */
276#define INT_GPIOINT2 8 /* GPIO 2 */
277/* 9 reserved */
278#define INT_RTCINT 10 /* Real Time Clock */
279#define INT_SSPINT 11 /* Synchronous Serial Port */
280#define INT_UARTINT0 12 /* UART 0 on development chip */
281#define INT_UARTINT1 13 /* UART 1 on development chip */
282#define INT_UARTINT2 14 /* UART 2 on development chip */
283#define INT_UARTINT3 15 /* UART 3 on development chip */
284#define INT_SCIINT 16 /* Smart Card Interface */
285#define INT_MMCI0A 17 /* Multimedia Card 0A */
286#define INT_MMCI0B 18 /* Multimedia Card 0B */
287#define INT_AACI 19 /* Audio Codec */
288#define INT_KMI0 20 /* Keyboard/Mouse port 0 */
289#define INT_KMI1 21 /* Keyboard/Mouse port 1 */
290#define INT_CHARLCD 22 /* Character LCD */
291#define INT_CLCDINT 23 /* CLCD controller */
292#define INT_DMAINT 24 /* DMA controller */
293#define INT_PWRFAILINT 25 /* Power failure */
294#define INT_PISMO 26
295#define INT_DoC 27 /* Disk on Chip memory controller */
296#define INT_ETH 28 /* Ethernet controller */
297#define INT_USB 29 /* USB controller */
298#define INT_TSPENINT 30 /* Touchscreen pen */
299#define INT_TSKPADINT 31 /* Touchscreen keypad */
300
301/*
302 * Interrupt bit positions
303 *
304 */
305#define INTMASK_WDOGINT (1 << INT_WDOGINT)
306#define INTMASK_SOFTINT (1 << INT_SOFTINT)
307#define INTMASK_COMMRx (1 << INT_COMMRx)
308#define INTMASK_COMMTx (1 << INT_COMMTx)
309#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1)
310#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3)
311#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0)
312#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1)
313#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2)
314#define INTMASK_RTCINT (1 << INT_RTCINT)
315#define INTMASK_SSPINT (1 << INT_SSPINT)
316#define INTMASK_UARTINT0 (1 << INT_UARTINT0)
317#define INTMASK_UARTINT1 (1 << INT_UARTINT1)
318#define INTMASK_UARTINT2 (1 << INT_UARTINT2)
319#define INTMASK_UARTINT3 (1 << INT_UARTINT3)
320#define INTMASK_SCIINT (1 << INT_SCIINT)
321#define INTMASK_MMCI0A (1 << INT_MMCI0A)
322#define INTMASK_MMCI0B (1 << INT_MMCI0B)
323#define INTMASK_AACI (1 << INT_AACI)
324#define INTMASK_KMI0 (1 << INT_KMI0)
325#define INTMASK_KMI1 (1 << INT_KMI1)
326#define INTMASK_CHARLCD (1 << INT_CHARLCD)
327#define INTMASK_CLCDINT (1 << INT_CLCDINT)
328#define INTMASK_DMAINT (1 << INT_DMAINT)
329#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT)
330#define INTMASK_PISMO (1 << INT_PISMO)
331#define INTMASK_DoC (1 << INT_DoC)
332#define INTMASK_ETH (1 << INT_ETH)
333#define INTMASK_USB (1 << INT_USB)
334#define INTMASK_TSPENINT (1 << INT_TSPENINT)
335#define INTMASK_TSKPADINT (1 << INT_TSKPADINT)
336
337#define MAXIRQNUM 31
338#define MAXFIQNUM 31
339#define MAXSWINUM 31
340
341/*
342 * Application Flash
343 *
344 */
345#define FLASH_BASE REALVIEW_FLASH_BASE
346#define FLASH_SIZE REALVIEW_FLASH_SIZE
347#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
348#define FLASH_BLOCK_SIZE SZ_128K
349
350/*
351 * Boot Flash
352 *
353 */
354#define EPROM_BASE REALVIEW_BOOT_ROM_HI
355#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
356#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
357
358/*
359 * Clean base - dummy
360 *
361 */
362#define CLEAN_BASE EPROM_BASE
363
364/*
365 * System controller bit assignment
366 */
367#define REALVIEW_REFCLK 0
368#define REALVIEW_TIMCLK 1
369
370#define REALVIEW_TIMER1_EnSel 15
371#define REALVIEW_TIMER2_EnSel 17
372#define REALVIEW_TIMER3_EnSel 19
373#define REALVIEW_TIMER4_EnSel 21
374
375
376#define MAX_TIMER 2
377#define MAX_PERIOD 699050
378#define TICKS_PER_uSEC 1
379
380/*
381 * These are useconds NOT ticks.
382 *
383 */
384#define mSEC_1 1000
385#define mSEC_5 (mSEC_1 * 5)
386#define mSEC_10 (mSEC_1 * 10)
387#define mSEC_25 (mSEC_1 * 25)
388#define SEC_1 (mSEC_1 * 1000)
389
390#define REALVIEW_CSR_BASE 0x10000000
391#define REALVIEW_CSR_SIZE 0x10000000
392
393#endif
394
395/* END */
diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h
new file mode 100644
index 000000000000..9f8fcbca0869
--- /dev/null
+++ b/include/asm-arm/arch-realview/system.h
@@ -0,0 +1,51 @@
1/*
2 * linux/include/asm-arm/arch-realview/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24#include <asm/hardware.h>
25#include <asm/io.h>
26#include <asm/arch/platform.h>
27
28static inline void arch_idle(void)
29{
30 /*
31 * This should do all the clock switching
32 * and wait for interrupt tricks
33 */
34 cpu_do_idle();
35}
36
37static inline void arch_reset(char mode)
38{
39 unsigned int hdr_ctrl = (IO_ADDRESS(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET);
40 unsigned int val;
41
42 /*
43 * To reset, we hit the on-board reset register
44 * in the system FPGA
45 */
46 val = __raw_readl(hdr_ctrl);
47 val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
48 __raw_writel(val, hdr_ctrl);
49}
50
51#endif
diff --git a/include/asm-arm/arch-realview/timex.h b/include/asm-arm/arch-realview/timex.h
new file mode 100644
index 000000000000..5b9d82d0a5e0
--- /dev/null
+++ b/include/asm-arm/arch-realview/timex.h
@@ -0,0 +1,23 @@
1/*
2 * linux/include/asm-arm/arch-realview/timex.h
3 *
4 * RealView architecture timex specifications
5 *
6 * Copyright (C) 2003 ARM Limited
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define CLOCK_TICK_RATE (50000000 / 16)
diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h
new file mode 100644
index 000000000000..b5e4d360665b
--- /dev/null
+++ b/include/asm-arm/arch-realview/uncompress.h
@@ -0,0 +1,54 @@
1/*
2 * linux/include/asm-arm/arch-realview/uncompress.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <asm/hardware.h>
21
22#define AMBA_UART_DR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x00))
23#define AMBA_UART_LCRH (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x2c))
24#define AMBA_UART_CR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x30))
25#define AMBA_UART_FR (*(volatile unsigned char *) (REALVIEW_UART0_BASE + 0x18))
26
27/*
28 * This does not append a newline
29 */
30static void putstr(const char *s)
31{
32 while (*s) {
33 while (AMBA_UART_FR & (1 << 5))
34 barrier();
35
36 AMBA_UART_DR = *s;
37
38 if (*s == '\n') {
39 while (AMBA_UART_FR & (1 << 5))
40 barrier();
41
42 AMBA_UART_DR = '\r';
43 }
44 s++;
45 }
46 while (AMBA_UART_FR & (1 << 3))
47 barrier();
48}
49
50/*
51 * nothing to do
52 */
53#define arch_decomp_setup()
54#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-realview/vmalloc.h b/include/asm-arm/arch-realview/vmalloc.h
new file mode 100644
index 000000000000..0ad49af186af
--- /dev/null
+++ b/include/asm-arm/arch-realview/vmalloc.h
@@ -0,0 +1,21 @@
1/*
2 * linux/include/asm-arm/arch-realview/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END (PAGE_OFFSET + 0x18000000)
diff --git a/include/asm-arm/arch-s3c2410/regs-iis.h b/include/asm-arm/arch-s3c2410/regs-iis.h
index fdd62e8cd6cb..7fdde9b91cb4 100644
--- a/include/asm-arm/arch-s3c2410/regs-iis.h
+++ b/include/asm-arm/arch-s3c2410/regs-iis.h
@@ -55,6 +55,7 @@
55#define S3C2410_IISMOD_16FS (0<<0) 55#define S3C2410_IISMOD_16FS (0<<0)
56#define S3C2410_IISMOD_32FS (1<<0) 56#define S3C2410_IISMOD_32FS (1<<0)
57#define S3C2410_IISMOD_48FS (2<<0) 57#define S3C2410_IISMOD_48FS (2<<0)
58#define S3C2410_IISMOD_FS_MASK (3<<0)
58 59
59#define S3C2410_IISPSR (0x08) 60#define S3C2410_IISPSR (0x08)
60#define S3C2410_IISPSR_INTMASK (31<<5) 61#define S3C2410_IISPSR_INTMASK (31<<5)
diff --git a/include/asm-arm/cpu.h b/include/asm-arm/cpu.h
index fcbdd40cb667..751bc7462074 100644
--- a/include/asm-arm/cpu.h
+++ b/include/asm-arm/cpu.h
@@ -16,6 +16,7 @@
16struct cpuinfo_arm { 16struct cpuinfo_arm {
17 struct cpu cpu; 17 struct cpu cpu;
18#ifdef CONFIG_SMP 18#ifdef CONFIG_SMP
19 struct task_struct *idle;
19 unsigned int loops_per_jiffy; 20 unsigned int loops_per_jiffy;
20#endif 21#endif
21}; 22};
diff --git a/include/asm-arm/hardware/amba_clcd.h b/include/asm-arm/hardware/amba_clcd.h
index ce4cf5c1c05d..6b8d73dc1ab0 100644
--- a/include/asm-arm/hardware/amba_clcd.h
+++ b/include/asm-arm/hardware/amba_clcd.h
@@ -22,7 +22,7 @@
22#define CLCD_UBAS 0x00000010 22#define CLCD_UBAS 0x00000010
23#define CLCD_LBAS 0x00000014 23#define CLCD_LBAS 0x00000014
24 24
25#ifndef CONFIG_ARCH_VERSATILE 25#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
26#define CLCD_IENB 0x00000018 26#define CLCD_IENB 0x00000018
27#define CLCD_CNTL 0x0000001c 27#define CLCD_CNTL 0x0000001c
28#else 28#else
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index f97912fbb10f..59975ee43cf1 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -47,5 +47,6 @@ struct irqaction;
47struct pt_regs; 47struct pt_regs;
48int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *); 48int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
49 49
50extern void migrate_irqs(void);
50#endif 51#endif
51 52
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
index 4af9c411c617..57b8def83d41 100644
--- a/include/asm-arm/mmu_context.h
+++ b/include/asm-arm/mmu_context.h
@@ -86,7 +86,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
86 cpu_set(cpu, next->cpu_vm_mask); 86 cpu_set(cpu, next->cpu_vm_mask);
87 check_context(next); 87 check_context(next);
88 cpu_switch_mm(next->pgd, next); 88 cpu_switch_mm(next->pgd, next);
89 cpu_clear(cpu, prev->cpu_vm_mask); 89 if (cache_is_vivt())
90 cpu_clear(cpu, prev->cpu_vm_mask);
90 } 91 }
91} 92}
92 93
diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h
index dbb4d859c586..551cd3c3093c 100644
--- a/include/asm-arm/smp.h
+++ b/include/asm-arm/smp.h
@@ -66,4 +66,14 @@ struct secondary_data {
66}; 66};
67extern struct secondary_data secondary_data; 67extern struct secondary_data secondary_data;
68 68
69extern int __cpu_disable(void);
70extern int mach_cpu_disable(unsigned int cpu);
71
72extern void __cpu_die(unsigned int cpu);
73extern void cpu_die(void);
74
75extern void platform_cpu_die(unsigned int cpu);
76extern int platform_cpu_kill(unsigned int cpu);
77extern void platform_cpu_enable(unsigned int cpu);
78
69#endif /* ifndef __ASM_ARM_SMP_H */ 79#endif /* ifndef __ASM_ARM_SMP_H */
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index cb4906b45555..6ed4f916b166 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -80,7 +80,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
80 */ 80 */
81#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0) 81#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0)
82 82
83static inline void __raw_write_lock(rwlock_t *rw) 83static inline void __raw_write_lock(raw_rwlock_t *rw)
84{ 84{
85 unsigned long tmp; 85 unsigned long tmp;
86 86
@@ -97,7 +97,7 @@ static inline void __raw_write_lock(rwlock_t *rw)
97 smp_mb(); 97 smp_mb();
98} 98}
99 99
100static inline int __raw_write_trylock(rwlock_t *rw) 100static inline int __raw_write_trylock(raw_rwlock_t *rw)
101{ 101{
102 unsigned long tmp; 102 unsigned long tmp;
103 103
@@ -157,7 +157,7 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
157 smp_mb(); 157 smp_mb();
158} 158}
159 159
160static inline void __raw_read_unlock(rwlock_t *rw) 160static inline void __raw_read_unlock(raw_rwlock_t *rw)
161{ 161{
162 unsigned long tmp, tmp2; 162 unsigned long tmp, tmp2;
163 163
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h
index a515e2aed829..8c454aa58ac6 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-i386/apic.h
@@ -118,8 +118,7 @@ extern void release_lapic_nmi(void);
118extern void disable_timer_nmi_watchdog(void); 118extern void disable_timer_nmi_watchdog(void);
119extern void enable_timer_nmi_watchdog(void); 119extern void enable_timer_nmi_watchdog(void);
120extern void nmi_watchdog_tick (struct pt_regs * regs); 120extern void nmi_watchdog_tick (struct pt_regs * regs);
121extern int APIC_init(void); 121extern int APIC_init_uniprocessor (void);
122extern void APIC_late_time_init(void);
123extern void disable_APIC_timer(void); 122extern void disable_APIC_timer(void);
124extern void enable_APIC_timer(void); 123extern void enable_APIC_timer(void);
125 124
diff --git a/include/asm-i386/hw_irq.h b/include/asm-i386/hw_irq.h
index 9139b89497a1..622815bf3243 100644
--- a/include/asm-i386/hw_irq.h
+++ b/include/asm-i386/hw_irq.h
@@ -55,7 +55,6 @@ void init_8259A(int aeoi);
55void FASTCALL(send_IPI_self(int vector)); 55void FASTCALL(send_IPI_self(int vector));
56void init_VISWS_APIC_irqs(void); 56void init_VISWS_APIC_irqs(void);
57void setup_IO_APIC(void); 57void setup_IO_APIC(void);
58void IO_APIC_late_time_init(void);
59void disable_IO_APIC(void); 58void disable_IO_APIC(void);
60void print_IO_APIC(void); 59void print_IO_APIC(void);
61int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); 60int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
diff --git a/include/asm-i386/mach-default/smpboot_hooks.h b/include/asm-i386/mach-default/smpboot_hooks.h
index d7c70c144f9f..7f45f6311059 100644
--- a/include/asm-i386/mach-default/smpboot_hooks.h
+++ b/include/asm-i386/mach-default/smpboot_hooks.h
@@ -1,6 +1,11 @@
1/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws 1/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws
2 * which needs to alter them. */ 2 * which needs to alter them. */
3 3
4static inline void smpboot_clear_io_apic_irqs(void)
5{
6 io_apic_irqs = 0;
7}
8
4static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) 9static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
5{ 10{
6 CMOS_WRITE(0xa, 0xf); 11 CMOS_WRITE(0xa, 0xf);
@@ -27,3 +32,13 @@ static inline void smpboot_restore_warm_reset_vector(void)
27 32
28 *((volatile long *) phys_to_virt(0x467)) = 0; 33 *((volatile long *) phys_to_virt(0x467)) = 0;
29} 34}
35
36static inline void smpboot_setup_io_apic(void)
37{
38 /*
39 * Here we can be sure that there is an IO-APIC in the system. Let's
40 * go and set it up:
41 */
42 if (!skip_ioapic_setup && nr_ioapics)
43 setup_IO_APIC();
44}
diff --git a/include/asm-i386/mach-visws/smpboot_hooks.h b/include/asm-i386/mach-visws/smpboot_hooks.h
index 14d8e0375f7a..d926471fa359 100644
--- a/include/asm-i386/mach-visws/smpboot_hooks.h
+++ b/include/asm-i386/mach-visws/smpboot_hooks.h
@@ -11,7 +11,14 @@ static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
11 11
12/* for visws do nothing for any of these */ 12/* for visws do nothing for any of these */
13 13
14static inline void smpboot_clear_io_apic_irqs(void)
15{
16}
17
14static inline void smpboot_restore_warm_reset_vector(void) 18static inline void smpboot_restore_warm_reset_vector(void)
15{ 19{
16} 20}
17 21
22static inline void smpboot_setup_io_apic(void)
23{
24}
diff --git a/include/asm-m68knommu/anchor.h b/include/asm-m68knommu/anchor.h
index 75390e0b40c9..871c0d5cfc3d 100644
--- a/include/asm-m68knommu/anchor.h
+++ b/include/asm-m68knommu/anchor.h
@@ -14,7 +14,7 @@
14/* 14/*
15 * Define basic addressing info. 15 * Define basic addressing info.
16 */ 16 */
17#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) 17#if defined(CONFIG_M5407C3)
18#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */ 18#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */
19#define COMEM_IRQ 25 /* IRQ of anchor part */ 19#define COMEM_IRQ 25 /* IRQ of anchor part */
20#else 20#else
@@ -96,7 +96,7 @@
96 * The PCI bus will be limited in what slots will actually be used. 96 * The PCI bus will be limited in what slots will actually be used.
97 * Define valid device numbers for different boards. 97 * Define valid device numbers for different boards.
98 */ 98 */
99#if defined(CONFIG_MOTOROLA) && defined(CONFIG_M5407) 99#if defined(CONFIG_M5407C3)
100#define COMEM_MINDEV 14 /* Minimum valid DEVICE */ 100#define COMEM_MINDEV 14 /* Minimum valid DEVICE */
101#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */ 101#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */
102#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */ 102#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */
diff --git a/include/asm-m68knommu/asm-offsets.h b/include/asm-m68knommu/asm-offsets.h
deleted file mode 100644
index 825f6e210f19..000000000000
--- a/include/asm-m68knommu/asm-offsets.h
+++ /dev/null
@@ -1,49 +0,0 @@
1#ifndef __ASM_OFFSETS_H__
2#define __ASM_OFFSETS_H__
3/*
4 * DO NOT MODIFY.
5 *
6 * This file was generated by arch/m68knommu/Makefile
7 *
8 */
9
10#define TASK_STATE 0 /* offsetof(struct task_struct, state) */
11#define TASK_FLAGS 12 /* offsetof(struct task_struct, flags) */
12#define TASK_PTRACE 16 /* offsetof(struct task_struct, ptrace) */
13#define TASK_BLOCKED 922 /* offsetof(struct task_struct, blocked) */
14#define TASK_THREAD 772 /* offsetof(struct task_struct, thread) */
15#define TASK_THREAD_INFO 4 /* offsetof(struct task_struct, thread_info) */
16#define TASK_MM 92 /* offsetof(struct task_struct, mm) */
17#define TASK_ACTIVE_MM 96 /* offsetof(struct task_struct, active_mm) */
18#define CPUSTAT_SOFTIRQ_PENDING 0 /* offsetof(irq_cpustat_t, __softirq_pending) */
19#define THREAD_KSP 0 /* offsetof(struct thread_struct, ksp) */
20#define THREAD_USP 4 /* offsetof(struct thread_struct, usp) */
21#define THREAD_SR 8 /* offsetof(struct thread_struct, sr) */
22#define THREAD_FS 10 /* offsetof(struct thread_struct, fs) */
23#define THREAD_CRP 12 /* offsetof(struct thread_struct, crp) */
24#define THREAD_ESP0 20 /* offsetof(struct thread_struct, esp0) */
25#define THREAD_FPREG 24 /* offsetof(struct thread_struct, fp) */
26#define THREAD_FPCNTL 120 /* offsetof(struct thread_struct, fpcntl) */
27#define THREAD_FPSTATE 132 /* offsetof(struct thread_struct, fpstate) */
28#define PT_D0 32 /* offsetof(struct pt_regs, d0) */
29#define PT_ORIG_D0 36 /* offsetof(struct pt_regs, orig_d0) */
30#define PT_D1 0 /* offsetof(struct pt_regs, d1) */
31#define PT_D2 4 /* offsetof(struct pt_regs, d2) */
32#define PT_D3 8 /* offsetof(struct pt_regs, d3) */
33#define PT_D4 12 /* offsetof(struct pt_regs, d4) */
34#define PT_D5 16 /* offsetof(struct pt_regs, d5) */
35#define PT_A0 20 /* offsetof(struct pt_regs, a0) */
36#define PT_A1 24 /* offsetof(struct pt_regs, a1) */
37#define PT_A2 28 /* offsetof(struct pt_regs, a2) */
38#define PT_PC 48 /* offsetof(struct pt_regs, pc) */
39#define PT_SR 46 /* offsetof(struct pt_regs, sr) */
40#define PT_VECTOR 52 /* offsetof(struct pt_regs, pc) + 4 */
41#define STAT_IRQ 5140 /* offsetof(struct kernel_stat, irqs) */
42#define SIGSEGV 11 /* SIGSEGV */
43#define SEGV_MAPERR 196609 /* SEGV_MAPERR */
44#define SIGTRAP 5 /* SIGTRAP */
45#define TRAP_TRACE 196610 /* TRAP_TRACE */
46#define PT_PTRACED 1 /* PT_PTRACED */
47#define PT_DTRACE 2 /* PT_DTRACE */
48
49#endif
diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h
index b1957fba083b..a83631ed8c8f 100644
--- a/include/asm-m68knommu/atomic.h
+++ b/include/asm-m68knommu/atomic.h
@@ -100,7 +100,7 @@ static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
100#define smp_mb__before_atomic_inc() barrier() 100#define smp_mb__before_atomic_inc() barrier()
101#define smp_mb__after_atomic_inc() barrier() 101#define smp_mb__after_atomic_inc() barrier()
102 102
103extern __inline__ int atomic_add_return(int i, atomic_t * v) 103static inline int atomic_add_return(int i, atomic_t * v)
104{ 104{
105 unsigned long temp, flags; 105 unsigned long temp, flags;
106 106
@@ -115,7 +115,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v)
115 115
116#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) 116#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
117 117
118extern __inline__ int atomic_sub_return(int i, atomic_t * v) 118static inline int atomic_sub_return(int i, atomic_t * v)
119{ 119{
120 unsigned long temp, flags; 120 unsigned long temp, flags;
121 121
diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h
index 1df3f666a28e..6190f77b1e6c 100644
--- a/include/asm-m68knommu/coldfire.h
+++ b/include/asm-m68knommu/coldfire.h
@@ -20,9 +20,14 @@
20 */ 20 */
21#define MCF_MBAR 0x10000000 21#define MCF_MBAR 0x10000000
22#define MCF_MBAR2 0x80000000 22#define MCF_MBAR2 0x80000000
23#if defined(CONFIG_M520x)
24#define MCF_IPSBAR 0xFC000000
25#else
23#define MCF_IPSBAR 0x40000000 26#define MCF_IPSBAR 0x40000000
27#endif
24 28
25#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) 29#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
30 defined(CONFIG_M520x)
26#undef MCF_MBAR 31#undef MCF_MBAR
27#define MCF_MBAR MCF_IPSBAR 32#define MCF_MBAR MCF_IPSBAR
28#endif 33#endif
@@ -78,7 +83,8 @@
78 * One some ColdFire family members the bus clock (used by internal 83 * One some ColdFire family members the bus clock (used by internal
79 * peripherals) is not the same as the CPU clock. 84 * peripherals) is not the same as the CPU clock.
80 */ 85 */
81#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) 86#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
87 defined(CONFIG_M520x)
82#define MCF_BUSCLK (MCF_CLK / 2) 88#define MCF_BUSCLK (MCF_CLK / 2)
83#else 89#else
84#define MCF_BUSCLK MCF_CLK 90#define MCF_BUSCLK MCF_CLK
diff --git a/include/asm-m68knommu/delay.h b/include/asm-m68knommu/delay.h
index e3a976254672..04a20fd051cf 100644
--- a/include/asm-m68knommu/delay.h
+++ b/include/asm-m68knommu/delay.h
@@ -8,7 +8,7 @@
8 8
9#include <asm/param.h> 9#include <asm/param.h>
10 10
11extern __inline__ void __delay(unsigned long loops) 11static inline void __delay(unsigned long loops)
12{ 12{
13#if defined(CONFIG_COLDFIRE) 13#if defined(CONFIG_COLDFIRE)
14 /* The coldfire runs this loop at significantly different speeds 14 /* The coldfire runs this loop at significantly different speeds
@@ -48,7 +48,7 @@ extern __inline__ void __delay(unsigned long loops)
48 48
49extern unsigned long loops_per_jiffy; 49extern unsigned long loops_per_jiffy;
50 50
51extern __inline__ void _udelay(unsigned long usecs) 51static inline void _udelay(unsigned long usecs)
52{ 52{
53#if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \ 53#if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \
54 defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \ 54 defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \
diff --git a/include/asm-m68knommu/ide.h b/include/asm-m68knommu/ide.h
deleted file mode 100644
index 836f0721ecf9..000000000000
--- a/include/asm-m68knommu/ide.h
+++ /dev/null
@@ -1,437 +0,0 @@
1/****************************************************************************/
2/*
3 * linux/include/asm-m68knommu/ide.h
4 *
5 * Copyright (C) 1994-1996 Linus Torvalds & authors
6 * Copyright (C) 2001 Lineo Inc., davidm@uclinux.org
7 */
8/****************************************************************************/
9#ifndef _M68KNOMMU_IDE_H
10#define _M68KNOMMU_IDE_H
11
12#ifdef __KERNEL__
13/****************************************************************************/
14
15#include <linux/config.h>
16#include <linux/interrupt.h>
17
18#include <asm/setup.h>
19#include <asm/io.h>
20#include <asm/irq.h>
21
22/****************************************************************************/
23/*
24 * some coldfire specifics
25 */
26
27#ifdef CONFIG_COLDFIRE
28#include <asm/coldfire.h>
29#include <asm/mcfsim.h>
30
31/*
32 * Save some space, only have 1 interface
33 */
34#define MAX_HWIFS 1 /* we only have one interface for now */
35
36#ifdef CONFIG_SECUREEDGEMP3
37#define MCFSIM_LOCALCS MCFSIM_CSCR4
38#else
39#define MCFSIM_LOCALCS MCFSIM_CSCR6
40#endif
41
42#endif /* CONFIG_COLDFIRE */
43
44/****************************************************************************/
45/*
46 * Fix up things that may not have been provided
47 */
48
49#ifndef MAX_HWIFS
50#define MAX_HWIFS 4 /* same as the other archs */
51#endif
52
53#undef SUPPORT_SLOW_DATA_PORTS
54#define SUPPORT_SLOW_DATA_PORTS 0
55
56#undef SUPPORT_VLB_SYNC
57#define SUPPORT_VLB_SYNC 0
58
59/* this definition is used only on startup .. */
60#undef HD_DATA
61#define HD_DATA NULL
62
63#define DBGIDE(fmt,a...)
64// #define DBGIDE(fmt,a...) printk(fmt, ##a)
65#define IDE_INLINE __inline__
66// #define IDE_INLINE
67
68/****************************************************************************/
69
70typedef union {
71 unsigned all : 8; /* all of the bits together */
72 struct {
73 unsigned bit7 : 1; /* always 1 */
74 unsigned lba : 1; /* using LBA instead of CHS */
75 unsigned bit5 : 1; /* always 1 */
76 unsigned unit : 1; /* drive select number, 0 or 1 */
77 unsigned head : 4; /* always zeros here */
78 } b;
79} select_t;
80
81/*
82 * our list of ports/irq's for different boards
83 */
84
85static struct m68k_ide_defaults {
86 ide_ioreg_t base;
87 int irq;
88} m68k_ide_defaults[MAX_HWIFS] = {
89#if defined(CONFIG_SECUREEDGEMP3)
90 { ((ide_ioreg_t)0x30800000), 29 },
91#elif defined(CONFIG_eLIA)
92 { ((ide_ioreg_t)0x30c00000), 29 },
93#else
94 { ((ide_ioreg_t)0x0), 0 }
95#endif
96};
97
98/****************************************************************************/
99
100static IDE_INLINE int ide_default_irq(ide_ioreg_t base)
101{
102 int i;
103
104 for (i = 0; i < MAX_HWIFS; i++)
105 if (m68k_ide_defaults[i].base == base)
106 return(m68k_ide_defaults[i].irq);
107 return 0;
108}
109
110static IDE_INLINE ide_ioreg_t ide_default_io_base(int index)
111{
112 if (index >= 0 && index < MAX_HWIFS)
113 return(m68k_ide_defaults[index].base);
114 return 0;
115}
116
117
118/*
119 * Set up a hw structure for a specified data port, control port and IRQ.
120 * This should follow whatever the default interface uses.
121 */
122static IDE_INLINE void ide_init_hwif_ports(
123 hw_regs_t *hw,
124 ide_ioreg_t data_port,
125 ide_ioreg_t ctrl_port,
126 int *irq)
127{
128 ide_ioreg_t reg = data_port;
129 int i;
130
131 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
132 hw->io_ports[i] = reg;
133 reg += 1;
134 }
135 if (ctrl_port) {
136 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
137 } else {
138 hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0xe;
139 }
140}
141
142#define ide_init_default_irq(base) ide_default_irq(base)
143
144static IDE_INLINE int
145ide_request_irq(
146 unsigned int irq,
147 void (*handler)(int, void *, struct pt_regs *),
148 unsigned long flags,
149 const char *device,
150 void *dev_id)
151{
152#ifdef CONFIG_COLDFIRE
153 mcf_autovector(irq);
154#endif
155 return(request_irq(irq, handler, flags, device, dev_id));
156}
157
158
159static IDE_INLINE void
160ide_free_irq(unsigned int irq, void *dev_id)
161{
162 free_irq(irq, dev_id);
163}
164
165
166static IDE_INLINE void
167ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name)
168{
169}
170
171
172static IDE_INLINE void
173ide_release_region(ide_ioreg_t from, unsigned int extent)
174{
175}
176
177
178static IDE_INLINE void
179ide_fix_driveid(struct hd_driveid *id)
180{
181#ifdef CONFIG_COLDFIRE
182 int i, n;
183 unsigned short *wp = (unsigned short *) id;
184 int avoid[] = {49, 51, 52, 59, -1 }; /* do not swap these words */
185
186 /* Need to byte swap shorts, but not char fields */
187 for (i = n = 0; i < sizeof(*id) / sizeof(*wp); i++, wp++) {
188 if (avoid[n] == i) {
189 n++;
190 continue;
191 }
192 *wp = ((*wp & 0xff) << 8) | ((*wp >> 8) & 0xff);
193 }
194 /* have to word swap the one 32 bit field */
195 id->lba_capacity = ((id->lba_capacity & 0xffff) << 16) |
196 ((id->lba_capacity >> 16) & 0xffff);
197#endif
198}
199
200
201static IDE_INLINE void
202ide_release_lock (int *ide_lock)
203{
204}
205
206
207static IDE_INLINE void
208ide_get_lock(
209 int *ide_lock,
210 void (*handler)(int, void *, struct pt_regs *),
211 void *data)
212{
213}
214
215
216#define ide_ack_intr(hwif) \
217 ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
218#define ide__sti() __sti()
219
220/****************************************************************************/
221/*
222 * System specific IO requirements
223 */
224
225#ifdef CONFIG_COLDFIRE
226
227#ifdef CONFIG_SECUREEDGEMP3
228
229/* Replace standard IO functions for funky mapping of MP3 board */
230#undef outb
231#undef outb_p
232#undef inb
233#undef inb_p
234
235#define outb(v, a) ide_outb(v, (unsigned long) (a))
236#define outb_p(v, a) ide_outb(v, (unsigned long) (a))
237#define inb(a) ide_inb((unsigned long) (a))
238#define inb_p(a) ide_inb((unsigned long) (a))
239
240#define ADDR8_PTR(addr) (((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr))
241#define ADDR16_PTR(addr) (addr)
242#define ADDR32_PTR(addr) (addr)
243#define SWAP8(w) ((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8))
244#define SWAP16(w) (w)
245#define SWAP32(w) (w)
246
247
248static IDE_INLINE void
249ide_outb(unsigned int val, unsigned int addr)
250{
251 volatile unsigned short *rp;
252
253 DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
254 rp = (volatile unsigned short *) ADDR8_PTR(addr);
255 *rp = SWAP8(val);
256}
257
258
259static IDE_INLINE int
260ide_inb(unsigned int addr)
261{
262 volatile unsigned short *rp, val;
263
264 DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
265 rp = (volatile unsigned short *) ADDR8_PTR(addr);
266 val = *rp;
267 return(SWAP8(val));
268}
269
270
271static IDE_INLINE void
272ide_outw(unsigned int val, unsigned int addr)
273{
274 volatile unsigned short *rp;
275
276 DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
277 rp = (volatile unsigned short *) ADDR16_PTR(addr);
278 *rp = SWAP16(val);
279}
280
281static IDE_INLINE void
282ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
283{
284 volatile unsigned short *rp, val;
285 unsigned short *buf;
286
287 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
288 buf = (unsigned short *) vbuf;
289 rp = (volatile unsigned short *) ADDR16_PTR(addr);
290 for (; (len > 0); len--) {
291 val = *buf++;
292 *rp = SWAP16(val);
293 }
294}
295
296static IDE_INLINE int
297ide_inw(unsigned int addr)
298{
299 volatile unsigned short *rp, val;
300
301 DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
302 rp = (volatile unsigned short *) ADDR16_PTR(addr);
303 val = *rp;
304 return(SWAP16(val));
305}
306
307static IDE_INLINE void
308ide_insw(unsigned int addr, void *vbuf, unsigned long len)
309{
310 volatile unsigned short *rp;
311 unsigned short w, *buf;
312
313 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
314 buf = (unsigned short *) vbuf;
315 rp = (volatile unsigned short *) ADDR16_PTR(addr);
316 for (; (len > 0); len--) {
317 w = *rp;
318 *buf++ = SWAP16(w);
319 }
320}
321
322static IDE_INLINE void
323ide_insl(unsigned int addr, void *vbuf, unsigned long len)
324{
325 volatile unsigned long *rp;
326 unsigned long w, *buf;
327
328 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
329 buf = (unsigned long *) vbuf;
330 rp = (volatile unsigned long *) ADDR32_PTR(addr);
331 for (; (len > 0); len--) {
332 w = *rp;
333 *buf++ = SWAP32(w);
334 }
335}
336
337static IDE_INLINE void
338ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
339{
340 volatile unsigned long *rp, val;
341 unsigned long *buf;
342
343 DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
344 buf = (unsigned long *) vbuf;
345 rp = (volatile unsigned long *) ADDR32_PTR(addr);
346 for (; (len > 0); len--) {
347 val = *buf++;
348 *rp = SWAP32(val);
349 }
350}
351
352#elif CONFIG_eLIA
353
354/* 8/16 bit acesses are controlled by flicking bits in the CS register */
355#define ACCESS_MODE_16BIT() \
356 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080
357#define ACCESS_MODE_8BIT() \
358 *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040
359
360
361static IDE_INLINE void
362ide_outw(unsigned int val, unsigned int addr)
363{
364 ACCESS_MODE_16BIT();
365 outw(val, addr);
366 ACCESS_MODE_8BIT();
367}
368
369static IDE_INLINE void
370ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
371{
372 ACCESS_MODE_16BIT();
373 outsw(addr, vbuf, len);
374 ACCESS_MODE_8BIT();
375}
376
377static IDE_INLINE int
378ide_inw(unsigned int addr)
379{
380 int ret;
381
382 ACCESS_MODE_16BIT();
383 ret = inw(addr);
384 ACCESS_MODE_8BIT();
385 return(ret);
386}
387
388static IDE_INLINE void
389ide_insw(unsigned int addr, void *vbuf, unsigned long len)
390{
391 ACCESS_MODE_16BIT();
392 insw(addr, vbuf, len);
393 ACCESS_MODE_8BIT();
394}
395
396static IDE_INLINE void
397ide_insl(unsigned int addr, void *vbuf, unsigned long len)
398{
399 ACCESS_MODE_16BIT();
400 insl(addr, vbuf, len);
401 ACCESS_MODE_8BIT();
402}
403
404static IDE_INLINE void
405ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
406{
407 ACCESS_MODE_16BIT();
408 outsl(addr, vbuf, len);
409 ACCESS_MODE_8BIT();
410}
411
412#endif /* CONFIG_SECUREEDGEMP3 */
413
414#undef outw
415#undef outw_p
416#undef outsw
417#undef inw
418#undef inw_p
419#undef insw
420#undef insl
421#undef outsl
422
423#define outw(v, a) ide_outw(v, (unsigned long) (a))
424#define outw_p(v, a) ide_outw(v, (unsigned long) (a))
425#define outsw(a, b, n) ide_outsw((unsigned long) (a), b, n)
426#define inw(a) ide_inw((unsigned long) (a))
427#define inw_p(a) ide_inw((unsigned long) (a))
428#define insw(a, b, n) ide_insw((unsigned long) (a), b, n)
429#define insl(a, b, n) ide_insl((unsigned long) (a), b, n)
430#define outsl(a, b, n) ide_outsl((unsigned long) (a), b, n)
431
432#endif CONFIG_COLDFIRE
433
434/****************************************************************************/
435#endif /* __KERNEL__ */
436#endif /* _M68KNOMMU_IDE_H */
437/****************************************************************************/
diff --git a/include/asm-m68knommu/io.h b/include/asm-m68knommu/io.h
index 30fade4149b8..e08f2ee4b4a2 100644
--- a/include/asm-m68knommu/io.h
+++ b/include/asm-m68knommu/io.h
@@ -147,19 +147,19 @@ static inline void io_insl(unsigned int addr, void *buf, int len)
147extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); 147extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag);
148extern void __iounmap(void *addr, unsigned long size); 148extern void __iounmap(void *addr, unsigned long size);
149 149
150extern inline void *ioremap(unsigned long physaddr, unsigned long size) 150static inline void *ioremap(unsigned long physaddr, unsigned long size)
151{ 151{
152 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 152 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
153} 153}
154extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) 154static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
155{ 155{
156 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); 156 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
157} 157}
158extern inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size) 158static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size)
159{ 159{
160 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); 160 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
161} 161}
162extern inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size) 162static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size)
163{ 163{
164 return __ioremap(physaddr, size, IOMAP_FULL_CACHING); 164 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
165} 165}
diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h
new file mode 100644
index 000000000000..6dc62869e62b
--- /dev/null
+++ b/include/asm-m68knommu/m520xsim.h
@@ -0,0 +1,54 @@
1/****************************************************************************/
2
3/*
4 * m520xsim.h -- ColdFire 5207/5208 System Integration Module support.
5 *
6 * (C) Copyright 2005, Intec Automation (mike@steroidmicros.com)
7 */
8
9/****************************************************************************/
10#ifndef m520xsim_h
11#define m520xsim_h
12/****************************************************************************/
13
14#include <linux/config.h>
15
16/*
17 * Define the 5282 SIM register set addresses.
18 */
19#define MCFICM_INTC0 0x48000 /* Base for Interrupt Ctrl 0 */
20#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
21#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
22#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
23#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
24#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
25#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
26#define MCFINTC_ICR0 0x40 /* Base ICR register */
27
28#define MCFINT_VECBASE 64
29#define MCFINT_UART0 26 /* Interrupt number for UART0 */
30#define MCFINT_UART1 27 /* Interrupt number for UART1 */
31#define MCFINT_UART2 28 /* Interrupt number for UART2 */
32#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
33#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */
34
35
36#define MCF_GPIO_PAR_UART (0xA4036)
37#define MCF_GPIO_PAR_FECI2C (0xA4033)
38#define MCF_GPIO_PAR_FEC (0xA4038)
39
40#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001)
41#define MCF_GPIO_PAR_UART_PAR_UTXD0 (0x0002)
42
43#define MCF_GPIO_PAR_UART_PAR_URXD1 (0x0040)
44#define MCF_GPIO_PAR_UART_PAR_UTXD1 (0x0080)
45
46#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02)
47#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04)
48
49#define ICR_INTRCONF 0x05
50#define MCFPIT_IMR MCFINTC_IMRL
51#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1)
52
53/****************************************************************************/
54#endif /* m520xsim_h */
diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
index b17cd920977f..9cb401421835 100644
--- a/include/asm-m68knommu/mcfcache.h
+++ b/include/asm-m68knommu/mcfcache.h
@@ -117,6 +117,20 @@
117.endm 117.endm
118#endif /* CONFIG_M5407 */ 118#endif /* CONFIG_M5407 */
119 119
120#if defined(CONFIG_M520x)
121.macro CACHE_ENABLE
122 move.l #0x01000000,%d0 /* invalidate whole cache */
123 movec %d0,%CACR
124 nop
125 move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */
126 movec %d0,%ACR0
127 move.l #0x00000000,%d0 /* no other regions cached */
128 movec %d0,%ACR1
129 move.l #0x80400000,%d0 /* enable 8K instruction cache */
130 movec %d0,%CACR
131 nop
132.endm
133#endif /* CONFIG_M520x */
120 134
121/****************************************************************************/ 135/****************************************************************************/
122#endif /* __M68KNOMMU_MCFCACHE_H */ 136#endif /* __M68KNOMMU_MCFCACHE_H */
diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h
index 045875651e4d..a71b1c8cb4f8 100644
--- a/include/asm-m68knommu/mcfne.h
+++ b/include/asm-m68knommu/mcfne.h
@@ -35,7 +35,7 @@
35 * Define the basic hardware resources of NE2000 boards. 35 * Define the basic hardware resources of NE2000 boards.
36 */ 36 */
37 37
38#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) 38#if defined(CONFIG_ARN5206)
39#define NE2000_ADDR 0x40000300 39#define NE2000_ADDR 0x40000300
40#define NE2000_ODDOFFSET 0x00010000 40#define NE2000_ODDOFFSET 0x00010000
41#define NE2000_IRQ_VECTOR 0xf0 41#define NE2000_IRQ_VECTOR 0xf0
@@ -44,7 +44,7 @@
44#define NE2000_BYTE volatile unsigned short 44#define NE2000_BYTE volatile unsigned short
45#endif 45#endif
46 46
47#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) 47#if defined(CONFIG_M5206eC3)
48#define NE2000_ADDR 0x40000300 48#define NE2000_ADDR 0x40000300
49#define NE2000_ODDOFFSET 0x00010000 49#define NE2000_ODDOFFSET 0x00010000
50#define NE2000_IRQ_VECTOR 0x1c 50#define NE2000_IRQ_VECTOR 0x1c
@@ -61,7 +61,7 @@
61#define NE2000_BYTE volatile unsigned char 61#define NE2000_BYTE volatile unsigned char
62#endif 62#endif
63 63
64#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) 64#if defined(CONFIG_CFV240)
65#define NE2000_ADDR 0x40010000 65#define NE2000_ADDR 0x40010000
66#define NE2000_ADDR1 0x40010001 66#define NE2000_ADDR1 0x40010001
67#define NE2000_ODDOFFSET 0x00000000 67#define NE2000_ODDOFFSET 0x00000000
@@ -72,7 +72,7 @@
72#define NE2000_BYTE volatile unsigned char 72#define NE2000_BYTE volatile unsigned char
73#endif 73#endif
74 74
75#if defined(CONFIG_M5307) && defined(CONFIG_MOTOROLA) 75#if defined(CONFIG_M5307C3)
76#define NE2000_ADDR 0x40000300 76#define NE2000_ADDR 0x40000300
77#define NE2000_ODDOFFSET 0x00010000 77#define NE2000_ODDOFFSET 0x00010000
78#define NE2000_IRQ_VECTOR 0x1b 78#define NE2000_IRQ_VECTOR 0x1b
@@ -114,7 +114,7 @@
114#define RSWAP(w) (((w) << 8) | ((w) >> 8)) 114#define RSWAP(w) (((w) << 8) | ((w) >> 8))
115#endif 115#endif
116 116
117#if defined(CONFIG_M5307) && defined(CONFIG_ARNEWSH) 117#if defined(CONFIG_ARN5307)
118#define NE2000_ADDR 0xfe600300 118#define NE2000_ADDR 0xfe600300
119#define NE2000_ODDOFFSET 0x00010000 119#define NE2000_ODDOFFSET 0x00010000
120#define NE2000_IRQ_VECTOR 0x1b 120#define NE2000_IRQ_VECTOR 0x1b
@@ -123,7 +123,7 @@
123#define NE2000_BYTE volatile unsigned short 123#define NE2000_BYTE volatile unsigned short
124#endif 124#endif
125 125
126#if defined(CONFIG_M5407) 126#if defined(CONFIG_M5407C3)
127#define NE2000_ADDR 0x40000300 127#define NE2000_ADDR 0x40000300
128#define NE2000_ODDOFFSET 0x00010000 128#define NE2000_ODDOFFSET 0x00010000
129#define NE2000_IRQ_VECTOR 0x1b 129#define NE2000_IRQ_VECTOR 0x1b
@@ -264,7 +264,7 @@ void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
264 * Minor differences between the different board types. 264 * Minor differences between the different board types.
265 */ 265 */
266 266
267#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH) 267#if defined(CONFIG_ARN5206)
268void ne2000_irqsetup(int irq) 268void ne2000_irqsetup(int irq)
269{ 269{
270 volatile unsigned char *icrp; 270 volatile unsigned char *icrp;
@@ -275,7 +275,7 @@ void ne2000_irqsetup(int irq)
275} 275}
276#endif 276#endif
277 277
278#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA) 278#if defined(CONFIG_M5206eC3)
279void ne2000_irqsetup(int irq) 279void ne2000_irqsetup(int irq)
280{ 280{
281 volatile unsigned char *icrp; 281 volatile unsigned char *icrp;
@@ -286,7 +286,7 @@ void ne2000_irqsetup(int irq)
286} 286}
287#endif 287#endif
288 288
289#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240) 289#if defined(CONFIG_CFV240)
290void ne2000_irqsetup(int irq) 290void ne2000_irqsetup(int irq)
291{ 291{
292 volatile unsigned char *icrp; 292 volatile unsigned char *icrp;
diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h
index 4cc2e9fd6ad0..a685f1b45401 100644
--- a/include/asm-m68knommu/mcfpit.h
+++ b/include/asm-m68knommu/mcfpit.h
@@ -14,13 +14,17 @@
14#include <linux/config.h> 14#include <linux/config.h>
15 15
16/* 16/*
17 * Get address specific defines for the 5270/5271 and 5280/5282. 17 * Get address specific defines for the 5270/5271, 5280/5282, and 5208.
18 */ 18 */
19#if defined(CONFIG_M520x)
20#define MCFPIT_BASE1 0x00080000 /* Base address of TIMER1 */
21#define MCFPIT_BASE2 0x00084000 /* Base address of TIMER2 */
22#else
19#define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */ 23#define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */
20#define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */ 24#define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */
21#define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */ 25#define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */
22#define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */ 26#define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */
23 27#endif
24 28
25/* 29/*
26 * Define the PIT timer register set addresses. 30 * Define the PIT timer register set addresses.
diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h
index b0c7736f7a99..81d74a31dc43 100644
--- a/include/asm-m68knommu/mcfsim.h
+++ b/include/asm-m68knommu/mcfsim.h
@@ -22,6 +22,8 @@
22#include <asm/m5204sim.h> 22#include <asm/m5204sim.h>
23#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) 23#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e)
24#include <asm/m5206sim.h> 24#include <asm/m5206sim.h>
25#elif defined(CONFIG_M520x)
26#include <asm/m520xsim.h>
25#elif defined(CONFIG_M523x) 27#elif defined(CONFIG_M523x)
26#include <asm/m523xsim.h> 28#include <asm/m523xsim.h>
27#elif defined(CONFIG_M5249) 29#elif defined(CONFIG_M5249)
@@ -99,6 +101,19 @@
99#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */ 101#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */
100#endif 102#endif
101 103
104/*
105 * PIT interrupt settings, if not found in mXXXXsim.h file.
106 */
107#ifndef ICR_INTRCONF
108#define ICR_INTRCONF 0x2b /* PIT1 level 5, priority 3 */
109#endif
110#ifndef MCFPIT_IMR
111#define MCFPIT_IMR MCFINTC_IMRH
112#endif
113#ifndef MCFPIT_IMR_IBIT
114#define MCFPIT_IMR_IBIT (1 << (MCFINT_PIT1 - 32))
115#endif
116
102 117
103#ifndef __ASSEMBLY__ 118#ifndef __ASSEMBLY__
104/* 119/*
diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h
index 9c1210613bc7..b016fad83119 100644
--- a/include/asm-m68knommu/mcfuart.h
+++ b/include/asm-m68knommu/mcfuart.h
@@ -41,6 +41,10 @@
41#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ 41#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
42#define MCFUART_BASE2 0x200 /* Base address of UART2 */ 42#define MCFUART_BASE2 0x200 /* Base address of UART2 */
43#endif 43#endif
44#elif defined(CONFIG_M520x)
45#define MCFUART_BASE1 0x60000 /* Base address of UART1 */
46#define MCFUART_BASE2 0x64000 /* Base address of UART2 */
47#define MCFUART_BASE3 0x68000 /* Base address of UART2 */
44#endif 48#endif
45 49
46 50
diff --git a/include/asm-m68knommu/mcfwdebug.h b/include/asm-m68knommu/mcfwdebug.h
index c425dd568155..6ceae103596b 100644
--- a/include/asm-m68knommu/mcfwdebug.h
+++ b/include/asm-m68knommu/mcfwdebug.h
@@ -90,7 +90,7 @@
90 * that the debug module instructions (2 longs) must be long word aligned and 90 * that the debug module instructions (2 longs) must be long word aligned and
91 * some pointer fiddling is performed to ensure this. 91 * some pointer fiddling is performed to ensure this.
92 */ 92 */
93extern inline void wdebug(int reg, unsigned long data) { 93static inline void wdebug(int reg, unsigned long data) {
94 unsigned short dbg_spc[6]; 94 unsigned short dbg_spc[6];
95 unsigned short *dbg; 95 unsigned short *dbg;
96 96
diff --git a/include/asm-m68knommu/mmu_context.h b/include/asm-m68knommu/mmu_context.h
index 9bc0fd49b8aa..1e080eca9ca8 100644
--- a/include/asm-m68knommu/mmu_context.h
+++ b/include/asm-m68knommu/mmu_context.h
@@ -10,7 +10,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
10{ 10{
11} 11}
12 12
13extern inline int 13static inline int
14init_new_context(struct task_struct *tsk, struct mm_struct *mm) 14init_new_context(struct task_struct *tsk, struct mm_struct *mm)
15{ 15{
16 // mm->context = virt_to_phys(mm->pgd); 16 // mm->context = virt_to_phys(mm->pgd);
@@ -25,7 +25,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, str
25 25
26#define deactivate_mm(tsk,mm) do { } while (0) 26#define deactivate_mm(tsk,mm) do { } while (0)
27 27
28extern inline void activate_mm(struct mm_struct *prev_mm, 28static inline void activate_mm(struct mm_struct *prev_mm,
29 struct mm_struct *next_mm) 29 struct mm_struct *next_mm)
30{ 30{
31} 31}
diff --git a/include/asm-m68knommu/processor.h b/include/asm-m68knommu/processor.h
index 85a054e758b1..ba393b1a023b 100644
--- a/include/asm-m68knommu/processor.h
+++ b/include/asm-m68knommu/processor.h
@@ -21,7 +21,7 @@
21#include <asm/ptrace.h> 21#include <asm/ptrace.h>
22#include <asm/current.h> 22#include <asm/current.h>
23 23
24extern inline unsigned long rdusp(void) 24static inline unsigned long rdusp(void)
25{ 25{
26#ifdef CONFIG_COLDFIRE 26#ifdef CONFIG_COLDFIRE
27 extern unsigned int sw_usp; 27 extern unsigned int sw_usp;
@@ -33,7 +33,7 @@ extern inline unsigned long rdusp(void)
33#endif 33#endif
34} 34}
35 35
36extern inline void wrusp(unsigned long usp) 36static inline void wrusp(unsigned long usp)
37{ 37{
38#ifdef CONFIG_COLDFIRE 38#ifdef CONFIG_COLDFIRE
39 extern unsigned int sw_usp; 39 extern unsigned int sw_usp;
diff --git a/include/asm-m68knommu/semaphore.h b/include/asm-m68knommu/semaphore.h
index 17aee15906a6..5cc1fdd86f50 100644
--- a/include/asm-m68knommu/semaphore.h
+++ b/include/asm-m68knommu/semaphore.h
@@ -41,7 +41,7 @@ struct semaphore {
41#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) 41#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
42#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) 42#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
43 43
44extern inline void sema_init (struct semaphore *sem, int val) 44static inline void sema_init (struct semaphore *sem, int val)
45{ 45{
46 *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val); 46 *sem = (struct semaphore)__SEMAPHORE_INITIALIZER(*sem, val);
47} 47}
@@ -73,7 +73,7 @@ extern spinlock_t semaphore_wake_lock;
73 * "down_failed" is a special asm handler that calls the C 73 * "down_failed" is a special asm handler that calls the C
74 * routine that actually waits. See arch/m68k/lib/semaphore.S 74 * routine that actually waits. See arch/m68k/lib/semaphore.S
75 */ 75 */
76extern inline void down(struct semaphore * sem) 76static inline void down(struct semaphore * sem)
77{ 77{
78 might_sleep(); 78 might_sleep();
79 __asm__ __volatile__( 79 __asm__ __volatile__(
@@ -88,7 +88,7 @@ extern inline void down(struct semaphore * sem)
88 : "cc", "%a0", "%a1", "memory"); 88 : "cc", "%a0", "%a1", "memory");
89} 89}
90 90
91extern inline int down_interruptible(struct semaphore * sem) 91static inline int down_interruptible(struct semaphore * sem)
92{ 92{
93 int ret; 93 int ret;
94 94
@@ -107,7 +107,7 @@ extern inline int down_interruptible(struct semaphore * sem)
107 return(ret); 107 return(ret);
108} 108}
109 109
110extern inline int down_trylock(struct semaphore * sem) 110static inline int down_trylock(struct semaphore * sem)
111{ 111{
112 register struct semaphore *sem1 __asm__ ("%a1") = sem; 112 register struct semaphore *sem1 __asm__ ("%a1") = sem;
113 register int result __asm__ ("%d0"); 113 register int result __asm__ ("%d0");
@@ -135,7 +135,7 @@ extern inline int down_trylock(struct semaphore * sem)
135 * The default case (no contention) will result in NO 135 * The default case (no contention) will result in NO
136 * jumps for both down() and up(). 136 * jumps for both down() and up().
137 */ 137 */
138extern inline void up(struct semaphore * sem) 138static inline void up(struct semaphore * sem)
139{ 139{
140 __asm__ __volatile__( 140 __asm__ __volatile__(
141 "| atomic up operation\n\t" 141 "| atomic up operation\n\t"
diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h
index 53cbbad0f130..6338afc850ba 100644
--- a/include/asm-m68knommu/system.h
+++ b/include/asm-m68knommu/system.h
@@ -312,6 +312,19 @@ cmpxchg(volatile int *p, int old, int new)
312 moveb #0x80, (%a0); \ 312 moveb #0x80, (%a0); \
313 "); \ 313 "); \
314}) 314})
315#elif defined(CONFIG_M520x)
316 /*
317 * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register
318 * RCR), that when set, resets the MCF5208.
319 */
320#define HARD_RESET_NOW() \
321({ \
322 unsigned char volatile *reset; \
323 asm("move.w #0x2700, %sr"); \
324 reset = ((volatile unsigned short *)(MCF_IPSBAR + 0xA0000)); \
325 while(1) \
326 *reset |= 0x80; \
327})
315#else 328#else
316#define HARD_RESET_NOW() ({ \ 329#define HARD_RESET_NOW() ({ \
317 asm(" \ 330 asm(" \
diff --git a/include/asm-m68knommu/tlbflush.h b/include/asm-m68knommu/tlbflush.h
index bf7004e1afe0..de858db28b00 100644
--- a/include/asm-m68knommu/tlbflush.h
+++ b/include/asm-m68knommu/tlbflush.h
@@ -47,12 +47,12 @@ static inline void flush_tlb_range(struct mm_struct *mm,
47 BUG(); 47 BUG();
48} 48}
49 49
50extern inline void flush_tlb_kernel_page(unsigned long addr) 50static inline void flush_tlb_kernel_page(unsigned long addr)
51{ 51{
52 BUG(); 52 BUG();
53} 53}
54 54
55extern inline void flush_tlb_pgtables(struct mm_struct *mm, 55static inline void flush_tlb_pgtables(struct mm_struct *mm,
56 unsigned long start, unsigned long end) 56 unsigned long start, unsigned long end)
57{ 57{
58 BUG(); 58 BUG();
diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h
new file mode 100644
index 000000000000..dc25c53704d5
--- /dev/null
+++ b/include/asm-powerpc/bitops.h
@@ -0,0 +1,437 @@
1/*
2 * PowerPC atomic bit operations.
3 *
4 * Merged version by David Gibson <david@gibson.dropbear.id.au>.
5 * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don
6 * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They
7 * originally took it from the ppc32 code.
8 *
9 * Within a word, bits are numbered LSB first. Lot's of places make
10 * this assumption by directly testing bits with (val & (1<<nr)).
11 * This can cause confusion for large (> 1 word) bitmaps on a
12 * big-endian system because, unlike little endian, the number of each
13 * bit depends on the word size.
14 *
15 * The bitop functions are defined to work on unsigned longs, so for a
16 * ppc64 system the bits end up numbered:
17 * |63..............0|127............64|191...........128|255...........196|
18 * and on ppc32:
19 * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224|
20 *
21 * There are a few little-endian macros used mostly for filesystem
22 * bitmaps, these work on similar bit arrays layouts, but
23 * byte-oriented:
24 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
25 *
26 * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
27 * number field needs to be reversed compared to the big-endian bit
28 * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
29 *
30 * This program is free software; you can redistribute it and/or
31 * modify it under the terms of the GNU General Public License
32 * as published by the Free Software Foundation; either version
33 * 2 of the License, or (at your option) any later version.
34 */
35
36#ifndef _ASM_POWERPC_BITOPS_H
37#define _ASM_POWERPC_BITOPS_H
38
39#ifdef __KERNEL__
40
41#include <linux/compiler.h>
42#include <asm/atomic.h>
43#include <asm/synch.h>
44
45/*
46 * clear_bit doesn't imply a memory barrier
47 */
48#define smp_mb__before_clear_bit() smp_mb()
49#define smp_mb__after_clear_bit() smp_mb()
50
51#define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
52#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
53#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
54
55#ifdef CONFIG_PPC64
56#define LARXL "ldarx"
57#define STCXL "stdcx."
58#define CNTLZL "cntlzd"
59#else
60#define LARXL "lwarx"
61#define STCXL "stwcx."
62#define CNTLZL "cntlzw"
63#endif
64
65static __inline__ void set_bit(int nr, volatile unsigned long *addr)
66{
67 unsigned long old;
68 unsigned long mask = BITOP_MASK(nr);
69 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
70
71 __asm__ __volatile__(
72"1:" LARXL " %0,0,%3 # set_bit\n"
73 "or %0,%0,%2\n"
74 PPC405_ERR77(0,%3)
75 STCXL " %0,0,%3\n"
76 "bne- 1b"
77 : "=&r"(old), "=m"(*p)
78 : "r"(mask), "r"(p), "m"(*p)
79 : "cc" );
80}
81
82static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
83{
84 unsigned long old;
85 unsigned long mask = BITOP_MASK(nr);
86 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
87
88 __asm__ __volatile__(
89"1:" LARXL " %0,0,%3 # set_bit\n"
90 "andc %0,%0,%2\n"
91 PPC405_ERR77(0,%3)
92 STCXL " %0,0,%3\n"
93 "bne- 1b"
94 : "=&r"(old), "=m"(*p)
95 : "r"(mask), "r"(p), "m"(*p)
96 : "cc" );
97}
98
99static __inline__ void change_bit(int nr, volatile unsigned long *addr)
100{
101 unsigned long old;
102 unsigned long mask = BITOP_MASK(nr);
103 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
104
105 __asm__ __volatile__(
106"1:" LARXL " %0,0,%3 # set_bit\n"
107 "xor %0,%0,%2\n"
108 PPC405_ERR77(0,%3)
109 STCXL " %0,0,%3\n"
110 "bne- 1b"
111 : "=&r"(old), "=m"(*p)
112 : "r"(mask), "r"(p), "m"(*p)
113 : "cc" );
114}
115
116static __inline__ int test_and_set_bit(unsigned long nr,
117 volatile unsigned long *addr)
118{
119 unsigned long old, t;
120 unsigned long mask = BITOP_MASK(nr);
121 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
122
123 __asm__ __volatile__(
124 EIEIO_ON_SMP
125"1:" LARXL " %0,0,%3 # test_and_set_bit\n"
126 "or %1,%0,%2 \n"
127 PPC405_ERR77(0,%3)
128 STCXL " %1,0,%3 \n"
129 "bne- 1b"
130 ISYNC_ON_SMP
131 : "=&r" (old), "=&r" (t)
132 : "r" (mask), "r" (p)
133 : "cc", "memory");
134
135 return (old & mask) != 0;
136}
137
138static __inline__ int test_and_clear_bit(unsigned long nr,
139 volatile unsigned long *addr)
140{
141 unsigned long old, t;
142 unsigned long mask = BITOP_MASK(nr);
143 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
144
145 __asm__ __volatile__(
146 EIEIO_ON_SMP
147"1:" LARXL " %0,0,%3 # test_and_clear_bit\n"
148 "andc %1,%0,%2 \n"
149 PPC405_ERR77(0,%3)
150 STCXL " %1,0,%3 \n"
151 "bne- 1b"
152 ISYNC_ON_SMP
153 : "=&r" (old), "=&r" (t)
154 : "r" (mask), "r" (p)
155 : "cc", "memory");
156
157 return (old & mask) != 0;
158}
159
160static __inline__ int test_and_change_bit(unsigned long nr,
161 volatile unsigned long *addr)
162{
163 unsigned long old, t;
164 unsigned long mask = BITOP_MASK(nr);
165 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
166
167 __asm__ __volatile__(
168 EIEIO_ON_SMP
169"1:" LARXL " %0,0,%3 # test_and_change_bit\n"
170 "xor %1,%0,%2 \n"
171 PPC405_ERR77(0,%3)
172 STCXL " %1,0,%3 \n"
173 "bne- 1b"
174 ISYNC_ON_SMP
175 : "=&r" (old), "=&r" (t)
176 : "r" (mask), "r" (p)
177 : "cc", "memory");
178
179 return (old & mask) != 0;
180}
181
182static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
183{
184 unsigned long old;
185
186 __asm__ __volatile__(
187"1:" LARXL " %0,0,%3 # set_bit\n"
188 "or %0,%0,%2\n"
189 STCXL " %0,0,%3\n"
190 "bne- 1b"
191 : "=&r" (old), "=m" (*addr)
192 : "r" (mask), "r" (addr), "m" (*addr)
193 : "cc");
194}
195
196/* Non-atomic versions */
197static __inline__ int test_bit(unsigned long nr,
198 __const__ volatile unsigned long *addr)
199{
200 return 1UL & (addr[BITOP_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
201}
202
203static __inline__ void __set_bit(unsigned long nr,
204 volatile unsigned long *addr)
205{
206 unsigned long mask = BITOP_MASK(nr);
207 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
208
209 *p |= mask;
210}
211
212static __inline__ void __clear_bit(unsigned long nr,
213 volatile unsigned long *addr)
214{
215 unsigned long mask = BITOP_MASK(nr);
216 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
217
218 *p &= ~mask;
219}
220
221static __inline__ void __change_bit(unsigned long nr,
222 volatile unsigned long *addr)
223{
224 unsigned long mask = BITOP_MASK(nr);
225 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
226
227 *p ^= mask;
228}
229
230static __inline__ int __test_and_set_bit(unsigned long nr,
231 volatile unsigned long *addr)
232{
233 unsigned long mask = BITOP_MASK(nr);
234 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
235 unsigned long old = *p;
236
237 *p = old | mask;
238 return (old & mask) != 0;
239}
240
241static __inline__ int __test_and_clear_bit(unsigned long nr,
242 volatile unsigned long *addr)
243{
244 unsigned long mask = BITOP_MASK(nr);
245 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
246 unsigned long old = *p;
247
248 *p = old & ~mask;
249 return (old & mask) != 0;
250}
251
252static __inline__ int __test_and_change_bit(unsigned long nr,
253 volatile unsigned long *addr)
254{
255 unsigned long mask = BITOP_MASK(nr);
256 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
257 unsigned long old = *p;
258
259 *p = old ^ mask;
260 return (old & mask) != 0;
261}
262
263/*
264 * Return the zero-based bit position (LE, not IBM bit numbering) of
265 * the most significant 1-bit in a double word.
266 */
267static __inline__ int __ilog2(unsigned long x)
268{
269 int lz;
270
271 asm (CNTLZL " %0,%1" : "=r" (lz) : "r" (x));
272 return BITS_PER_LONG - 1 - lz;
273}
274
275/*
276 * Determines the bit position of the least significant 0 bit in the
277 * specified double word. The returned bit position will be
278 * zero-based, starting from the right side (63/31 - 0).
279 */
280static __inline__ unsigned long ffz(unsigned long x)
281{
282 /* no zero exists anywhere in the 8 byte area. */
283 if ((x = ~x) == 0)
284 return BITS_PER_LONG;
285
286 /*
287 * Calculate the bit position of the least signficant '1' bit in x
288 * (since x has been changed this will actually be the least signficant
289 * '0' bit in * the original x). Note: (x & -x) gives us a mask that
290 * is the least significant * (RIGHT-most) 1-bit of the value in x.
291 */
292 return __ilog2(x & -x);
293}
294
295static __inline__ int __ffs(unsigned long x)
296{
297 return __ilog2(x & -x);
298}
299
300/*
301 * ffs: find first bit set. This is defined the same way as
302 * the libc and compiler builtin ffs routines, therefore
303 * differs in spirit from the above ffz (man ffs).
304 */
305static __inline__ int ffs(int x)
306{
307 unsigned long i = (unsigned long)x;
308 return __ilog2(i & -i) + 1;
309}
310
311/*
312 * fls: find last (most-significant) bit set.
313 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
314 */
315static __inline__ int fls(unsigned int x)
316{
317 int lz;
318
319 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
320 return 32 - lz;
321}
322
323/*
324 * hweightN: returns the hamming weight (i.e. the number
325 * of bits set) of a N-bit word
326 */
327#define hweight64(x) generic_hweight64(x)
328#define hweight32(x) generic_hweight32(x)
329#define hweight16(x) generic_hweight16(x)
330#define hweight8(x) generic_hweight8(x)
331
332#define find_first_zero_bit(addr, size) find_next_zero_bit((addr), (size), 0)
333unsigned long find_next_zero_bit(const unsigned long *addr,
334 unsigned long size, unsigned long offset);
335/**
336 * find_first_bit - find the first set bit in a memory region
337 * @addr: The address to start the search at
338 * @size: The maximum size to search
339 *
340 * Returns the bit-number of the first set bit, not the number of the byte
341 * containing a bit.
342 */
343#define find_first_bit(addr, size) find_next_bit((addr), (size), 0)
344unsigned long find_next_bit(const unsigned long *addr,
345 unsigned long size, unsigned long offset);
346
347/* Little-endian versions */
348
349static __inline__ int test_le_bit(unsigned long nr,
350 __const__ unsigned long *addr)
351{
352 __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
353 return (tmp[nr >> 3] >> (nr & 7)) & 1;
354}
355
356#define __set_le_bit(nr, addr) \
357 __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
358#define __clear_le_bit(nr, addr) \
359 __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
360
361#define test_and_set_le_bit(nr, addr) \
362 test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
363#define test_and_clear_le_bit(nr, addr) \
364 test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
365
366#define __test_and_set_le_bit(nr, addr) \
367 __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
368#define __test_and_clear_le_bit(nr, addr) \
369 __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
370
371#define find_first_zero_le_bit(addr, size) find_next_zero_le_bit((addr), (size), 0)
372unsigned long find_next_zero_le_bit(const unsigned long *addr,
373 unsigned long size, unsigned long offset);
374
375/* Bitmap functions for the ext2 filesystem */
376
377#define ext2_set_bit(nr,addr) \
378 __test_and_set_le_bit((nr), (unsigned long*)addr)
379#define ext2_clear_bit(nr, addr) \
380 __test_and_clear_le_bit((nr), (unsigned long*)addr)
381
382#define ext2_set_bit_atomic(lock, nr, addr) \
383 test_and_set_le_bit((nr), (unsigned long*)addr)
384#define ext2_clear_bit_atomic(lock, nr, addr) \
385 test_and_clear_le_bit((nr), (unsigned long*)addr)
386
387#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
388
389#define ext2_find_first_zero_bit(addr, size) \
390 find_first_zero_le_bit((unsigned long*)addr, size)
391#define ext2_find_next_zero_bit(addr, size, off) \
392 find_next_zero_le_bit((unsigned long*)addr, size, off)
393
394/* Bitmap functions for the minix filesystem. */
395
396#define minix_test_and_set_bit(nr,addr) \
397 __test_and_set_le_bit(nr, (unsigned long *)addr)
398#define minix_set_bit(nr,addr) \
399 __set_le_bit(nr, (unsigned long *)addr)
400#define minix_test_and_clear_bit(nr,addr) \
401 __test_and_clear_le_bit(nr, (unsigned long *)addr)
402#define minix_test_bit(nr,addr) \
403 test_le_bit(nr, (unsigned long *)addr)
404
405#define minix_find_first_zero_bit(addr,size) \
406 find_first_zero_le_bit((unsigned long *)addr, size)
407
408/*
409 * Every architecture must define this function. It's the fastest
410 * way of searching a 140-bit bitmap where the first 100 bits are
411 * unlikely to be set. It's guaranteed that at least one of the 140
412 * bits is cleared.
413 */
414static inline int sched_find_first_bit(const unsigned long *b)
415{
416#ifdef CONFIG_PPC64
417 if (unlikely(b[0]))
418 return __ffs(b[0]);
419 if (unlikely(b[1]))
420 return __ffs(b[1]) + 64;
421 return __ffs(b[2]) + 128;
422#else
423 if (unlikely(b[0]))
424 return __ffs(b[0]);
425 if (unlikely(b[1]))
426 return __ffs(b[1]) + 32;
427 if (unlikely(b[2]))
428 return __ffs(b[2]) + 64;
429 if (b[3])
430 return __ffs(b[3]) + 96;
431 return __ffs(b[4]) + 128;
432#endif
433}
434
435#endif /* __KERNEL__ */
436
437#endif /* _ASM_POWERPC_BITOPS_H */
diff --git a/include/asm-powerpc/bug.h b/include/asm-powerpc/bug.h
index e4d028e87020..d625ee55f957 100644
--- a/include/asm-powerpc/bug.h
+++ b/include/asm-powerpc/bug.h
@@ -12,20 +12,16 @@
12#ifndef __ASSEMBLY__ 12#ifndef __ASSEMBLY__
13 13
14#ifdef __powerpc64__ 14#ifdef __powerpc64__
15#define BUG_TABLE_ENTRY(label, line, file, func) \ 15#define BUG_TABLE_ENTRY ".llong"
16 ".llong " #label "\n .long " #line "\n .llong " #file ", " #func "\n" 16#define BUG_TRAP_OP "tdnei"
17#define TRAP_OP(ra, rb) "1: tdnei " #ra ", " #rb "\n"
18#define DATA_TYPE long long
19#else 17#else
20#define BUG_TABLE_ENTRY(label, line, file, func) \ 18#define BUG_TABLE_ENTRY ".long"
21 ".long " #label ", " #line ", " #file ", " #func "\n" 19#define BUG_TRAP_OP "twnei"
22#define TRAP_OP(ra, rb) "1: twnei " #ra ", " #rb "\n"
23#define DATA_TYPE int
24#endif /* __powerpc64__ */ 20#endif /* __powerpc64__ */
25 21
26struct bug_entry { 22struct bug_entry {
27 unsigned long bug_addr; 23 unsigned long bug_addr;
28 int line; 24 long line;
29 const char *file; 25 const char *file;
30 const char *function; 26 const char *function;
31}; 27};
@@ -43,29 +39,29 @@ struct bug_entry *find_bug(unsigned long bugaddr);
43#define BUG() do { \ 39#define BUG() do { \
44 __asm__ __volatile__( \ 40 __asm__ __volatile__( \
45 "1: twi 31,0,0\n" \ 41 "1: twi 31,0,0\n" \
46 ".section __bug_table,\"a\"\n\t" \ 42 ".section __bug_table,\"a\"\n" \
47 BUG_TABLE_ENTRY(1b,%0,%1,%2) \ 43 "\t"BUG_TABLE_ENTRY" 1b,%0,%1,%2\n" \
48 ".previous" \ 44 ".previous" \
49 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ 45 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
50} while (0) 46} while (0)
51 47
52#define BUG_ON(x) do { \ 48#define BUG_ON(x) do { \
53 __asm__ __volatile__( \ 49 __asm__ __volatile__( \
54 TRAP_OP(%0,0) \ 50 "1: "BUG_TRAP_OP" %0,0\n" \
55 ".section __bug_table,\"a\"\n\t" \ 51 ".section __bug_table,\"a\"\n" \
56 BUG_TABLE_ENTRY(1b,%1,%2,%3) \ 52 "\t"BUG_TABLE_ENTRY" 1b,%1,%2,%3\n" \
57 ".previous" \ 53 ".previous" \
58 : : "r" ((DATA_TYPE)(x)), "i" (__LINE__), \ 54 : : "r" ((long)(x)), "i" (__LINE__), \
59 "i" (__FILE__), "i" (__FUNCTION__)); \ 55 "i" (__FILE__), "i" (__FUNCTION__)); \
60} while (0) 56} while (0)
61 57
62#define WARN_ON(x) do { \ 58#define WARN_ON(x) do { \
63 __asm__ __volatile__( \ 59 __asm__ __volatile__( \
64 TRAP_OP(%0,0) \ 60 "1: "BUG_TRAP_OP" %0,0\n" \
65 ".section __bug_table,\"a\"\n\t" \ 61 ".section __bug_table,\"a\"\n" \
66 BUG_TABLE_ENTRY(1b,%1,%2,%3) \ 62 "\t"BUG_TABLE_ENTRY" 1b,%1,%2,%3\n" \
67 ".previous" \ 63 ".previous" \
68 : : "r" ((DATA_TYPE)(x)), \ 64 : : "r" ((long)(x)), \
69 "i" (__LINE__ + BUG_WARNING_TRAP), \ 65 "i" (__LINE__ + BUG_WARNING_TRAP), \
70 "i" (__FILE__), "i" (__FUNCTION__)); \ 66 "i" (__FILE__), "i" (__FUNCTION__)); \
71} while (0) 67} while (0)
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index d22b10021b5d..d140577d0a05 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -178,18 +178,22 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
178static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs, 178static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
179 struct pt_regs *regs) 179 struct pt_regs *regs)
180{ 180{
181 int i; 181 int i, nregs;
182 int gprs = sizeof(struct pt_regs)/sizeof(ELF_GREG_TYPE);
183 182
184 if (gprs > ELF_NGREG) 183 memset((void *)elf_regs, 0, sizeof(elf_gregset_t));
185 gprs = ELF_NGREG;
186 184
187 for (i=0; i < gprs; i++) 185 /* Our registers are always unsigned longs, whether we're a 32 bit
188 elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i]; 186 * process or 64 bit, on either a 64 bit or 32 bit kernel.
189 187 * Don't use ELF_GREG_TYPE here. */
190 memset((char *)(elf_regs) + sizeof(struct pt_regs), 0, \ 188 nregs = sizeof(struct pt_regs) / sizeof(unsigned long);
191 sizeof(elf_gregset_t) - sizeof(struct pt_regs)); 189 if (nregs > ELF_NGREG)
190 nregs = ELF_NGREG;
192 191
192 for (i = 0; i < nregs; i++) {
193 /* This will correctly truncate 64 bit registers to 32 bits
194 * for a 32 bit process on a 64 bit kernel. */
195 elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];
196 }
193} 197}
194#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs); 198#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
195 199
diff --git a/include/asm-ppc64/futex.h b/include/asm-powerpc/futex.h
index 266b460de44e..37c94e52ab6d 100644
--- a/include/asm-ppc64/futex.h
+++ b/include/asm-powerpc/futex.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_FUTEX_H 1#ifndef _ASM_POWERPC_FUTEX_H
2#define _ASM_FUTEX_H 2#define _ASM_POWERPC_FUTEX_H
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
@@ -7,28 +7,29 @@
7#include <asm/errno.h> 7#include <asm/errno.h>
8#include <asm/synch.h> 8#include <asm/synch.h>
9#include <asm/uaccess.h> 9#include <asm/uaccess.h>
10#include <asm/ppc_asm.h>
10 11
11#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 12#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
12 __asm__ __volatile (SYNC_ON_SMP \ 13 __asm__ __volatile ( \
13"1: lwarx %0,0,%2\n" \ 14 SYNC_ON_SMP \
14 insn \ 15"1: lwarx %0,0,%2\n" \
15"2: stwcx. %1,0,%2\n\ 16 insn \
16 bne- 1b\n\ 17"2: stwcx. %1,0,%2\n" \
17 li %1,0\n\ 18 "bne- 1b\n" \
183: .section .fixup,\"ax\"\n\ 19 "li %1,0\n" \
194: li %1,%3\n\ 20"3: .section .fixup,\"ax\"\n" \
20 b 3b\n\ 21"4: li %1,%3\n" \
21 .previous\n\ 22 "b 3b\n" \
22 .section __ex_table,\"a\"\n\ 23 ".previous\n" \
23 .align 3\n\ 24 ".section __ex_table,\"a\"\n" \
24 .llong 1b,4b,2b,4b\n\ 25 ".align 3\n" \
25 .previous" \ 26 DATAL " 1b,4b,2b,4b\n" \
26 : "=&r" (oldval), "=&r" (ret) \ 27 ".previous" \
27 : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ 28 : "=&r" (oldval), "=&r" (ret) \
29 : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \
28 : "cr0", "memory") 30 : "cr0", "memory")
29 31
30static inline int 32static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
31futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
32{ 33{
33 int op = (encoded_op >> 28) & 7; 34 int op = (encoded_op >> 28) & 7;
34 int cmp = (encoded_op >> 24) & 15; 35 int cmp = (encoded_op >> 24) & 15;
@@ -79,5 +80,5 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
79 return ret; 80 return ret;
80} 81}
81 82
82#endif 83#endif /* __KERNEL__ */
83#endif 84#endif /* _ASM_POWERPC_FUTEX_H */
diff --git a/include/asm-powerpc/ioctls.h b/include/asm-powerpc/ioctls.h
index 5b94ff489b8b..279a6229584b 100644
--- a/include/asm-powerpc/ioctls.h
+++ b/include/asm-powerpc/ioctls.h
@@ -62,6 +62,9 @@
62# define TIOCM_DSR 0x100 62# define TIOCM_DSR 0x100
63# define TIOCM_CD TIOCM_CAR 63# define TIOCM_CD TIOCM_CAR
64# define TIOCM_RI TIOCM_RNG 64# define TIOCM_RI TIOCM_RNG
65#define TIOCM_OUT1 0x2000
66#define TIOCM_OUT2 0x4000
67#define TIOCM_LOOP 0x8000
65 68
66#define TIOCGSOFTCAR 0x5419 69#define TIOCGSOFTCAR 0x5419
67#define TIOCSSOFTCAR 0x541A 70#define TIOCSSOFTCAR 0x541A
diff --git a/include/asm-powerpc/ipcbuf.h b/include/asm-powerpc/ipcbuf.h
new file mode 100644
index 000000000000..2c3e1d94db1d
--- /dev/null
+++ b/include/asm-powerpc/ipcbuf.h
@@ -0,0 +1,34 @@
1#ifndef _ASM_POWERPC_IPCBUF_H
2#define _ASM_POWERPC_IPCBUF_H
3
4/*
5 * The ipc64_perm structure for the powerpc is identical to
6 * kern_ipc_perm as we have always had 32-bit UIDs and GIDs in the
7 * kernel. Note extra padding because this structure is passed back
8 * and forth between kernel and user space. Pad space is left for:
9 * - 1 32-bit value to fill up for 8-byte alignment
10 * - 2 miscellaneous 64-bit values
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#include <linux/types.h>
19
20struct ipc64_perm
21{
22 __kernel_key_t key;
23 __kernel_uid_t uid;
24 __kernel_gid_t gid;
25 __kernel_uid_t cuid;
26 __kernel_gid_t cgid;
27 __kernel_mode_t mode;
28 unsigned int seq;
29 unsigned int __pad1;
30 unsigned long long __unused1;
31 unsigned long long __unused2;
32};
33
34#endif /* _ASM_POWERPC_IPCBUF_H */
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index c7c3f912a3c2..b3935ea28fff 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -73,7 +73,7 @@ extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq);
73#define IC_INVALID 0 73#define IC_INVALID 0
74#define IC_OPEN_PIC 1 74#define IC_OPEN_PIC 1
75#define IC_PPC_XIC 2 75#define IC_PPC_XIC 2
76#define IC_BPA_IIC 3 76#define IC_CELL_PIC 3
77#define IC_ISERIES 4 77#define IC_ISERIES 4
78 78
79extern u64 ppc64_interrupt_controller; 79extern u64 ppc64_interrupt_controller;
diff --git a/include/asm-ppc64/iSeries/HvCall.h b/include/asm-powerpc/iseries/hv_call.h
index c3f19475c0d9..e9f831c9a5e5 100644
--- a/include/asm-ppc64/iSeries/HvCall.h
+++ b/include/asm-powerpc/iseries/hv_call.h
@@ -20,11 +20,11 @@
20 * This file contains the "hypervisor call" interface which is used to 20 * This file contains the "hypervisor call" interface which is used to
21 * drive the hypervisor from the OS. 21 * drive the hypervisor from the OS.
22 */ 22 */
23#ifndef _HVCALL_H 23#ifndef _ASM_POWERPC_ISERIES_HV_CALL_H
24#define _HVCALL_H 24#define _ASM_POWERPC_ISERIES_HV_CALL_H
25 25
26#include <asm/iSeries/HvCallSc.h> 26#include <asm/iseries/hv_call_sc.h>
27#include <asm/iSeries/HvTypes.h> 27#include <asm/iseries/hv_types.h>
28#include <asm/paca.h> 28#include <asm/paca.h>
29 29
30/* Type of yield for HvCallBaseYieldProcessor */ 30/* Type of yield for HvCallBaseYieldProcessor */
@@ -110,4 +110,4 @@ static inline void HvCall_sendIPI(struct paca_struct *targetPaca)
110 HvCall1(HvCallBaseSendIPI, targetPaca->paca_index); 110 HvCall1(HvCallBaseSendIPI, targetPaca->paca_index);
111} 111}
112 112
113#endif /* _HVCALL_H */ 113#endif /* _ASM_POWERPC_ISERIES_HV_CALL_H */
diff --git a/include/asm-ppc64/iSeries/HvCallEvent.h b/include/asm-powerpc/iseries/hv_call_event.h
index 5d9a327d0122..46763a30590a 100644
--- a/include/asm-ppc64/iSeries/HvCallEvent.h
+++ b/include/asm-powerpc/iseries/hv_call_event.h
@@ -20,11 +20,11 @@
20 * This file contains the "hypervisor call" interface which is used to 20 * This file contains the "hypervisor call" interface which is used to
21 * drive the hypervisor from the OS. 21 * drive the hypervisor from the OS.
22 */ 22 */
23#ifndef _HVCALLEVENT_H 23#ifndef _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H
24#define _HVCALLEVENT_H 24#define _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H
25 25
26#include <asm/iSeries/HvCallSc.h> 26#include <asm/iseries/hv_call_sc.h>
27#include <asm/iSeries/HvTypes.h> 27#include <asm/iseries/hv_types.h>
28#include <asm/abs_addr.h> 28#include <asm/abs_addr.h>
29 29
30struct HvLpEvent; 30struct HvLpEvent;
@@ -250,4 +250,4 @@ static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote,
250 return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir); 250 return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir);
251} 251}
252 252
253#endif /* _HVCALLEVENT_H */ 253#endif /* _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H */
diff --git a/include/asm-ppc64/iSeries/HvCallSc.h b/include/asm-powerpc/iseries/hv_call_sc.h
index a62cef3822f9..dec7e9d9ab78 100644
--- a/include/asm-ppc64/iSeries/HvCallSc.h
+++ b/include/asm-powerpc/iseries/hv_call_sc.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _HVCALLSC_H 19#ifndef _ASM_POWERPC_ISERIES_HV_CALL_SC_H
20#define _HVCALLSC_H 20#define _ASM_POWERPC_ISERIES_HV_CALL_SC_H
21 21
22#include <linux/types.h> 22#include <linux/types.h>
23 23
@@ -48,4 +48,4 @@ extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64);
48extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64); 48extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64);
49extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64); 49extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64);
50 50
51#endif /* _HVCALLSC_H */ 51#endif /* _ASM_POWERPC_ISERIES_HV_CALL_SC_H */
diff --git a/include/asm-ppc64/iSeries/HvCallXm.h b/include/asm-powerpc/iseries/hv_call_xm.h
index 8b9ba608daaf..ca9202cb01ed 100644
--- a/include/asm-ppc64/iSeries/HvCallXm.h
+++ b/include/asm-powerpc/iseries/hv_call_xm.h
@@ -2,11 +2,11 @@
2 * This file contains the "hypervisor call" interface which is used to 2 * This file contains the "hypervisor call" interface which is used to
3 * drive the hypervisor from SLIC. 3 * drive the hypervisor from SLIC.
4 */ 4 */
5#ifndef _HVCALLXM_H 5#ifndef _ASM_POWERPC_ISERIES_HV_CALL_XM_H
6#define _HVCALLXM_H 6#define _ASM_POWERPC_ISERIES_HV_CALL_XM_H
7 7
8#include <asm/iSeries/HvCallSc.h> 8#include <asm/iseries/hv_call_sc.h>
9#include <asm/iSeries/HvTypes.h> 9#include <asm/iseries/hv_types.h>
10 10
11#define HvCallXmGetTceTableParms HvCallXm + 0 11#define HvCallXmGetTceTableParms HvCallXm + 0
12#define HvCallXmTestBus HvCallXm + 1 12#define HvCallXmTestBus HvCallXm + 1
@@ -75,4 +75,4 @@ static inline u64 HvCallXm_loadTod(void)
75 return HvCall0(HvCallXmLoadTod); 75 return HvCall0(HvCallXmLoadTod);
76} 76}
77 77
78#endif /* _HVCALLXM_H */ 78#endif /* _ASM_POWERPC_ISERIES_HV_CALL_XM_H */
diff --git a/include/asm-ppc64/iSeries/HvLpConfig.h b/include/asm-powerpc/iseries/hv_lp_config.h
index f1cf1e70ca3c..bc00f036bca0 100644
--- a/include/asm-ppc64/iSeries/HvLpConfig.h
+++ b/include/asm-powerpc/iseries/hv_lp_config.h
@@ -16,17 +16,17 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _HVLPCONFIG_H 19#ifndef _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H
20#define _HVLPCONFIG_H 20#define _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H
21 21
22/* 22/*
23 * This file contains the interface to the LPAR configuration data 23 * This file contains the interface to the LPAR configuration data
24 * to determine which resources should be allocated to each partition. 24 * to determine which resources should be allocated to each partition.
25 */ 25 */
26 26
27#include <asm/iSeries/HvCallSc.h> 27#include <asm/iseries/hv_call_sc.h>
28#include <asm/iSeries/HvTypes.h> 28#include <asm/iseries/hv_types.h>
29#include <asm/iSeries/ItLpNaca.h> 29#include <asm/iseries/it_lp_naca.h>
30 30
31enum { 31enum {
32 HvCallCfg_Cur = 0, 32 HvCallCfg_Cur = 0,
@@ -135,4 +135,4 @@ static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp)
135 return HvCall1(HvCallCfgGetHostingLpIndex, lp); 135 return HvCall1(HvCallCfgGetHostingLpIndex, lp);
136} 136}
137 137
138#endif /* _HVLPCONFIG_H */ 138#endif /* _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H */
diff --git a/include/asm-ppc64/iSeries/HvLpEvent.h b/include/asm-powerpc/iseries/hv_lp_event.h
index 865000de79b6..499ab1ad0185 100644
--- a/include/asm-ppc64/iSeries/HvLpEvent.h
+++ b/include/asm-powerpc/iseries/hv_lp_event.h
@@ -19,13 +19,13 @@
19 19
20/* This file contains the class for HV events in the system. */ 20/* This file contains the class for HV events in the system. */
21 21
22#ifndef _HVLPEVENT_H 22#ifndef _ASM_POWERPC_ISERIES_HV_LP_EVENT_H
23#define _HVLPEVENT_H 23#define _ASM_POWERPC_ISERIES_HV_LP_EVENT_H
24 24
25#include <asm/types.h> 25#include <asm/types.h>
26#include <asm/ptrace.h> 26#include <asm/ptrace.h>
27#include <asm/iSeries/HvTypes.h> 27#include <asm/iseries/hv_types.h>
28#include <asm/iSeries/HvCallEvent.h> 28#include <asm/iseries/hv_call_event.h>
29 29
30/* 30/*
31 * HvLpEvent is the structure for Lp Event messages passed between 31 * HvLpEvent is the structure for Lp Event messages passed between
@@ -139,4 +139,4 @@ extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex);
139#define HvLpDma_Rc_InvalidAddress 4 139#define HvLpDma_Rc_InvalidAddress 4
140#define HvLpDma_Rc_InvalidLength 5 140#define HvLpDma_Rc_InvalidLength 5
141 141
142#endif /* _HVLPEVENT_H */ 142#endif /* _ASM_POWERPC_ISERIES_HV_LP_EVENT_H */
diff --git a/include/asm-ppc64/iSeries/HvTypes.h b/include/asm-powerpc/iseries/hv_types.h
index b1ef2b4cb3e3..c38f7e3d01dc 100644
--- a/include/asm-ppc64/iSeries/HvTypes.h
+++ b/include/asm-powerpc/iseries/hv_types.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _HVTYPES_H 19#ifndef _ASM_POWERPC_ISERIES_HV_TYPES_H
20#define _HVTYPES_H 20#define _ASM_POWERPC_ISERIES_HV_TYPES_H
21 21
22/* 22/*
23 * General typedefs for the hypervisor. 23 * General typedefs for the hypervisor.
@@ -110,4 +110,4 @@ struct HvLpBufferList {
110 u64 len; 110 u64 len;
111}; 111};
112 112
113#endif /* _HVTYPES_H */ 113#endif /* _ASM_POWERPC_ISERIES_HV_TYPES_H */
diff --git a/include/asm-ppc64/iSeries/iSeries_io.h b/include/asm-powerpc/iseries/iseries_io.h
index 9f79413342b3..56b2113ff0f5 100644
--- a/include/asm-ppc64/iSeries/iSeries_io.h
+++ b/include/asm-powerpc/iseries/iseries_io.h
@@ -1,5 +1,5 @@
1#ifndef _ISERIES_IO_H 1#ifndef _ASM_POWERPC_ISERIES_ISERIES_IO_H
2#define _ISERIES_IO_H 2#define _ASM_POWERPC_ISERIES_ISERIES_IO_H
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5 5
@@ -46,4 +46,4 @@ extern void iSeries_memcpy_fromio(void *dest,
46 const volatile void __iomem *source, size_t n); 46 const volatile void __iomem *source, size_t n);
47 47
48#endif /* CONFIG_PPC_ISERIES */ 48#endif /* CONFIG_PPC_ISERIES */
49#endif /* _ISERIES_IO_H */ 49#endif /* _ASM_POWERPC_ISERIES_ISERIES_IO_H */
diff --git a/include/asm-ppc64/iSeries/ItExtVpdPanel.h b/include/asm-powerpc/iseries/it_exp_vpd_panel.h
index 4c546a8802b4..66a17a230c52 100644
--- a/include/asm-ppc64/iSeries/ItExtVpdPanel.h
+++ b/include/asm-powerpc/iseries/it_exp_vpd_panel.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ITEXTVPDPANEL_H 19#ifndef _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H
20#define _ITEXTVPDPANEL_H 20#define _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H
21 21
22/* 22/*
23 * This struct maps the panel information 23 * This struct maps the panel information
@@ -49,4 +49,4 @@ struct ItExtVpdPanel {
49 49
50extern struct ItExtVpdPanel xItExtVpdPanel; 50extern struct ItExtVpdPanel xItExtVpdPanel;
51 51
52#endif /* _ITEXTVPDPANEL_H */ 52#endif /* _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H */
diff --git a/include/asm-ppc64/iSeries/ItLpNaca.h b/include/asm-powerpc/iseries/it_lp_naca.h
index 225d0176779d..c3ef1de45d82 100644
--- a/include/asm-ppc64/iSeries/ItLpNaca.h
+++ b/include/asm-powerpc/iseries/it_lp_naca.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ITLPNACA_H 19#ifndef _ASM_POWERPC_ISERIES_IT_LP_NACA_H
20#define _ITLPNACA_H 20#define _ASM_POWERPC_ISERIES_IT_LP_NACA_H
21 21
22#include <linux/types.h> 22#include <linux/types.h>
23 23
@@ -77,4 +77,4 @@ struct ItLpNaca {
77 77
78extern struct ItLpNaca itLpNaca; 78extern struct ItLpNaca itLpNaca;
79 79
80#endif /* _ITLPNACA_H */ 80#endif /* _ASM_POWERPC_ISERIES_IT_LP_NACA_H */
diff --git a/include/asm-ppc64/iSeries/ItLpQueue.h b/include/asm-powerpc/iseries/it_lp_queue.h
index 69b26ad74135..a60d03afbf95 100644
--- a/include/asm-ppc64/iSeries/ItLpQueue.h
+++ b/include/asm-powerpc/iseries/it_lp_queue.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ITLPQUEUE_H 19#ifndef _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H
20#define _ITLPQUEUE_H 20#define _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H
21 21
22/* 22/*
23 * This control block defines the simple LP queue structure that is 23 * This control block defines the simple LP queue structure that is
@@ -78,4 +78,4 @@ extern int hvlpevent_is_pending(void);
78extern void process_hvlpevents(struct pt_regs *); 78extern void process_hvlpevents(struct pt_regs *);
79extern void setup_hvlpevent_queue(void); 79extern void setup_hvlpevent_queue(void);
80 80
81#endif /* _ITLPQUEUE_H */ 81#endif /* _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H */
diff --git a/include/asm-ppc64/iSeries/ItLpRegSave.h b/include/asm-powerpc/iseries/it_lp_reg_save.h
index 1b3087e76205..288044b702de 100644
--- a/include/asm-ppc64/iSeries/ItLpRegSave.h
+++ b/include/asm-powerpc/iseries/it_lp_reg_save.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ITLPREGSAVE_H 19#ifndef _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H
20#define _ITLPREGSAVE_H 20#define _ASM_POWERPC_ISERIES_IT_LP_REG_SAVE_H
21 21
22/* 22/*
23 * This control block contains the data that is shared between PLIC 23 * This control block contains the data that is shared between PLIC
diff --git a/include/asm-ppc64/iSeries/LparMap.h b/include/asm-powerpc/iseries/lpar_map.h
index a6840b186d03..84fc321615bf 100644
--- a/include/asm-ppc64/iSeries/LparMap.h
+++ b/include/asm-powerpc/iseries/lpar_map.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _LPARMAP_H 19#ifndef _ASM_POWERPC_ISERIES_LPAR_MAP_H
20#define _LPARMAP_H 20#define _ASM_POWERPC_ISERIES_LPAR_MAP_H
21 21
22#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
23 23
@@ -80,4 +80,4 @@ extern const struct LparMap xLparMap;
80/* the fixed address where the LparMap exists */ 80/* the fixed address where the LparMap exists */
81#define LPARMAP_PHYS 0x7000 81#define LPARMAP_PHYS 0x7000
82 82
83#endif /* _LPARMAP_H */ 83#endif /* _ASM_POWERPC_ISERIES_LPAR_MAP_H */
diff --git a/include/asm-ppc64/iSeries/mf.h b/include/asm-powerpc/iseries/mf.h
index 7e6a0d936999..e7bd57a03fb1 100644
--- a/include/asm-ppc64/iSeries/mf.h
+++ b/include/asm-powerpc/iseries/mf.h
@@ -23,13 +23,13 @@
23 * along with this program; if not, write to the Free Software 23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */ 25 */
26#ifndef _ASM_PPC64_ISERIES_MF_H 26#ifndef _ASM_POWERPC_ISERIES_MF_H
27#define _ASM_PPC64_ISERIES_MF_H 27#define _ASM_POWERPC_ISERIES_MF_H
28 28
29#include <linux/types.h> 29#include <linux/types.h>
30 30
31#include <asm/iSeries/HvTypes.h> 31#include <asm/iseries/hv_types.h>
32#include <asm/iSeries/HvCallEvent.h> 32#include <asm/iseries/hv_call_event.h>
33 33
34struct rtc_time; 34struct rtc_time;
35 35
@@ -54,4 +54,4 @@ extern int mf_get_rtc(struct rtc_time *tm);
54extern int mf_get_boot_rtc(struct rtc_time *tm); 54extern int mf_get_boot_rtc(struct rtc_time *tm);
55extern int mf_set_rtc(struct rtc_time *tm); 55extern int mf_set_rtc(struct rtc_time *tm);
56 56
57#endif /* _ASM_PPC64_ISERIES_MF_H */ 57#endif /* _ASM_POWERPC_ISERIES_MF_H */
diff --git a/include/asm-ppc64/iSeries/vio.h b/include/asm-powerpc/iseries/vio.h
index 6c05e6257f53..7e3a469420dd 100644
--- a/include/asm-ppc64/iSeries/vio.h
+++ b/include/asm-powerpc/iseries/vio.h
@@ -38,11 +38,11 @@
38 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 38 * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 * 39 *
40 */ 40 */
41#ifndef _ISERIES_VIO_H 41#ifndef _ASM_POWERPC_ISERIES_VIO_H
42#define _ISERIES_VIO_H 42#define _ASM_POWERPC_ISERIES_VIO_H
43 43
44#include <asm/iSeries/HvTypes.h> 44#include <asm/iseries/hv_types.h>
45#include <asm/iSeries/HvLpEvent.h> 45#include <asm/iseries/hv_lp_event.h>
46 46
47/* 47/*
48 * iSeries virtual I/O events use the subtype field in 48 * iSeries virtual I/O events use the subtype field in
@@ -127,4 +127,4 @@ struct device;
127 127
128extern struct device *iSeries_vio_dev; 128extern struct device *iSeries_vio_dev;
129 129
130#endif /* _ISERIES_VIO_H */ 130#endif /* _ASM_POWERPC_ISERIES_VIO_H */
diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h
new file mode 100644
index 000000000000..062ab9ba68eb
--- /dev/null
+++ b/include/asm-powerpc/kexec.h
@@ -0,0 +1,49 @@
1#ifndef _ASM_POWERPC_KEXEC_H
2#define _ASM_POWERPC_KEXEC_H
3
4/*
5 * Maximum page that is mapped directly into kernel memory.
6 * XXX: Since we copy virt we can use any page we allocate
7 */
8#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
9
10/*
11 * Maximum address we can reach in physical address mode.
12 * XXX: I want to allow initrd in highmem. Otherwise set to rmo on LPAR.
13 */
14#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
15
16/* Maximum address we can use for the control code buffer */
17#ifdef __powerpc64__
18#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
19#else
20/* TASK_SIZE, probably left over from use_mm ?? */
21#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
22#endif
23
24#define KEXEC_CONTROL_CODE_SIZE 4096
25
26/* The native architecture */
27#ifdef __powerpc64__
28#define KEXEC_ARCH KEXEC_ARCH_PPC64
29#else
30#define KEXEC_ARCH KEXEC_ARCH_PPC
31#endif
32
33#ifndef __ASSEMBLY__
34
35#define MAX_NOTE_BYTES 1024
36typedef u32 note_buf_t[MAX_NOTE_BYTES / sizeof(u32)];
37
38extern note_buf_t crash_notes[];
39
40#ifdef __powerpc64__
41extern void kexec_smp_wait(void); /* get and clear naca physid, wait for
42 master to copy new code to 0 */
43#else
44struct kimage;
45extern void machine_kexec_simple(struct kimage *image);
46#endif
47
48#endif /* ! __ASSEMBLY__ */
49#endif /* _ASM_POWERPC_KEXEC_H */
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index 451b345cfc78..629ca964b974 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -80,6 +80,7 @@ struct machdep_calls {
80 void (*iommu_dev_setup)(struct pci_dev *dev); 80 void (*iommu_dev_setup)(struct pci_dev *dev);
81 void (*iommu_bus_setup)(struct pci_bus *bus); 81 void (*iommu_bus_setup)(struct pci_bus *bus);
82 void (*irq_bus_setup)(struct pci_bus *bus); 82 void (*irq_bus_setup)(struct pci_bus *bus);
83 int (*set_dabr)(unsigned long dabr);
83#endif 84#endif
84 85
85 int (*probe)(int platform); 86 int (*probe)(int platform);
diff --git a/include/asm-powerpc/numnodes.h b/include/asm-powerpc/numnodes.h
new file mode 100644
index 000000000000..795533aca095
--- /dev/null
+++ b/include/asm-powerpc/numnodes.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_POWERPC_MAX_NUMNODES_H
2#define _ASM_POWERPC_MAX_NUMNODES_H
3
4/* Max 16 Nodes */
5#define NODES_SHIFT 4
6
7#endif /* _ASM_POWERPC_MAX_NUMNODES_H */
diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h
index f99f2af82ca5..c534ca41224b 100644
--- a/include/asm-powerpc/ppc_asm.h
+++ b/include/asm-powerpc/ppc_asm.h
@@ -506,6 +506,13 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
506#else 506#else
507 #define __ASM_CONST(x) x##UL 507 #define __ASM_CONST(x) x##UL
508 #define ASM_CONST(x) __ASM_CONST(x) 508 #define ASM_CONST(x) __ASM_CONST(x)
509
510#ifdef CONFIG_PPC64
511#define DATAL ".llong"
512#else
513#define DATAL ".long"
514#endif
515
509#endif /* __ASSEMBLY__ */ 516#endif /* __ASSEMBLY__ */
510 517
511#endif /* _ASM_POWERPC_PPC_ASM_H */ 518#endif /* _ASM_POWERPC_PPC_ASM_H */
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
index eee954a001fd..1dc4bf7b52b3 100644
--- a/include/asm-powerpc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -70,7 +70,7 @@ extern unsigned char ucBoardRevMaj, ucBoardRevMin;
70#define PLATFORM_LPAR 0x0001 70#define PLATFORM_LPAR 0x0001
71#define PLATFORM_POWERMAC 0x0400 71#define PLATFORM_POWERMAC 0x0400
72#define PLATFORM_MAPLE 0x0500 72#define PLATFORM_MAPLE 0x0500
73#define PLATFORM_BPA 0x1000 73#define PLATFORM_CELL 0x1000
74 74
75/* Compatibility with drivers coming from PPC32 world */ 75/* Compatibility with drivers coming from PPC32 world */
76#define _machine (systemcfg->platform) 76#define _machine (systemcfg->platform)
diff --git a/include/asm-ppc64/ptrace.h b/include/asm-powerpc/ptrace.h
index 3a55377f1fd3..1f7ecdb0b6ce 100644
--- a/include/asm-ppc64/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_PTRACE_H 1#ifndef _ASM_POWERPC_PTRACE_H
2#define _PPC64_PTRACE_H 2#define _ASM_POWERPC_PTRACE_H
3 3
4/* 4/*
5 * Copyright (C) 2001 PPC64 Team, IBM Corp 5 * Copyright (C) 2001 PPC64 Team, IBM Corp
@@ -16,7 +16,7 @@
16 * that the overall structure is a multiple of 16 bytes in length. 16 * that the overall structure is a multiple of 16 bytes in length.
17 * 17 *
18 * Note that the offsets of the fields in this struct correspond with 18 * Note that the offsets of the fields in this struct correspond with
19 * the PT_* values below. This simplifies arch/ppc64/kernel/ptrace.c. 19 * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c.
20 * 20 *
21 * This program is free software; you can redistribute it and/or 21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License 22 * modify it under the terms of the GNU General Public License
@@ -30,70 +30,96 @@ struct pt_regs {
30 unsigned long gpr[32]; 30 unsigned long gpr[32];
31 unsigned long nip; 31 unsigned long nip;
32 unsigned long msr; 32 unsigned long msr;
33 unsigned long orig_gpr3; /* Used for restarting system calls */ 33 unsigned long orig_gpr3; /* Used for restarting system calls */
34 unsigned long ctr; 34 unsigned long ctr;
35 unsigned long link; 35 unsigned long link;
36 unsigned long xer; 36 unsigned long xer;
37 unsigned long ccr; 37 unsigned long ccr;
38 unsigned long softe; /* Soft enabled/disabled */ 38#ifdef __powerpc64__
39 unsigned long trap; /* Reason for being here */ 39 unsigned long softe; /* Soft enabled/disabled */
40 unsigned long dar; /* Fault registers */ 40#else
41 unsigned long dsisr; 41 unsigned long mq; /* 601 only (not used at present) */
42 unsigned long result; /* Result of a system call */ 42 /* Used on APUS to hold IPL value. */
43#endif
44 unsigned long trap; /* Reason for being here */
45 /* N.B. for critical exceptions on 4xx, the dar and dsisr
46 fields are overloaded to hold srr0 and srr1. */
47 unsigned long dar; /* Fault registers */
48 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
49 unsigned long result; /* Result of a system call */
43}; 50};
44 51
45struct pt_regs32 { 52#endif /* __ASSEMBLY__ */
46 unsigned int gpr[32];
47 unsigned int nip;
48 unsigned int msr;
49 unsigned int orig_gpr3; /* Used for restarting system calls */
50 unsigned int ctr;
51 unsigned int link;
52 unsigned int xer;
53 unsigned int ccr;
54 unsigned int mq; /* 601 only (not used at present) */
55 unsigned int trap; /* Reason for being here */
56 unsigned int dar; /* Fault registers */
57 unsigned int dsisr;
58 unsigned int result; /* Result of a system call */
59};
60 53
61#ifdef __KERNEL__ 54#ifdef __KERNEL__
62 55
63#define instruction_pointer(regs) ((regs)->nip) 56#ifdef __powerpc64__
57
58#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
59
60/* Size of dummy stack frame allocated when calling signal handler. */
61#define __SIGNAL_FRAMESIZE 128
62#define __SIGNAL_FRAMESIZE32 64
63
64#else /* __powerpc64__ */
65
66#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
67
68/* Size of stack frame allocated when calling signal handler. */
69#define __SIGNAL_FRAMESIZE 64
70
71#endif /* __powerpc64__ */
64 72
73#ifndef __ASSEMBLY__
74
75#define instruction_pointer(regs) ((regs)->nip)
65#ifdef CONFIG_SMP 76#ifdef CONFIG_SMP
66extern unsigned long profile_pc(struct pt_regs *regs); 77extern unsigned long profile_pc(struct pt_regs *regs);
67#else 78#else
68#define profile_pc(regs) instruction_pointer(regs) 79#define profile_pc(regs) instruction_pointer(regs)
69#endif 80#endif
70 81
82#ifdef __powerpc64__
71#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1) 83#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
84#else
85#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
86#endif
72 87
73#define force_successful_syscall_return() \ 88#define force_successful_syscall_return() \
74 (current_thread_info()->syscall_noerror = 1) 89 do { \
90 current_thread_info()->syscall_noerror = 1; \
91 } while(0)
75 92
76/* 93/*
77 * We use the least-significant bit of the trap field to indicate 94 * We use the least-significant bit of the trap field to indicate
78 * whether we have saved the full set of registers, or only a 95 * whether we have saved the full set of registers, or only a
79 * partial set. A 1 there means the partial set. 96 * partial set. A 1 there means the partial set.
97 * On 4xx we use the next bit to indicate whether the exception
98 * is a critical exception (1 means it is).
80 */ 99 */
81#define FULL_REGS(regs) (((regs)->trap & 1) == 0) 100#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
101#ifndef __powerpc64__
102#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0)
103#endif /* ! __powerpc64__ */
82#define TRAP(regs) ((regs)->trap & ~0xF) 104#define TRAP(regs) ((regs)->trap & ~0xF)
105#ifdef __powerpc64__
83#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1) 106#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
84 107#else
85#endif /* __KERNEL__ */ 108#define CHECK_FULL_REGS(regs) \
109do { \
110 if ((regs)->trap & 1) \
111 printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
112} while (0)
113#endif /* __powerpc64__ */
86 114
87#endif /* __ASSEMBLY__ */ 115#endif /* __ASSEMBLY__ */
88 116
89#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ 117#endif /* __KERNEL__ */
90
91/* Size of dummy stack frame allocated when calling signal handler. */
92#define __SIGNAL_FRAMESIZE 128
93#define __SIGNAL_FRAMESIZE32 64
94 118
95/* 119/*
96 * Offsets used by 'ptrace' system call interface. 120 * Offsets used by 'ptrace' system call interface.
121 * These can't be changed without breaking binary compatibility
122 * with MkLinux, etc.
97 */ 123 */
98#define PT_R0 0 124#define PT_R0 0
99#define PT_R1 1 125#define PT_R1 1
@@ -137,18 +163,25 @@ extern unsigned long profile_pc(struct pt_regs *regs);
137#define PT_LNK 36 163#define PT_LNK 36
138#define PT_XER 37 164#define PT_XER 37
139#define PT_CCR 38 165#define PT_CCR 38
166#ifndef __powerpc64__
167#define PT_MQ 39
168#else
140#define PT_SOFTE 39 169#define PT_SOFTE 39
141#define PT_TRAP 40 170#define PT_TRAP 40
142#define PT_DAR 41 171#define PT_DAR 41
143#define PT_DSISR 42 172#define PT_DSISR 42
144#define PT_RESULT 43 173#define PT_RESULT 43
174#endif
145 175
146#define PT_FPR0 48 176#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
177
178#ifndef __powerpc64__
179
180#define PT_FPR31 (PT_FPR0 + 2*31)
181#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
182
183#else /* __powerpc64__ */
147 184
148/*
149 * Kernel and userspace will both use this PT_FPSCR value. 32-bit apps will
150 * have visibility to the asm-ppc/ptrace.h header instead of this one.
151 */
152#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ 185#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
153 186
154#ifdef __KERNEL__ 187#ifdef __KERNEL__
@@ -165,29 +198,29 @@ extern unsigned long profile_pc(struct pt_regs *regs);
165#define PT_VRSAVE_32 (PT_VR0 + 33*4) 198#define PT_VRSAVE_32 (PT_VR0 + 33*4)
166#endif 199#endif
167 200
201#endif /* __powerpc64__ */
202
168/* 203/*
169 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. 204 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
170 * The transfer totals 34 quadword. Quadwords 0-31 contain the 205 * The transfer totals 34 quadword. Quadwords 0-31 contain the
171 * corresponding vector registers. Quadword 32 contains the vscr as the 206 * corresponding vector registers. Quadword 32 contains the vscr as the
172 * last word (offset 12) within that quadword. Quadword 33 contains the 207 * last word (offset 12) within that quadword. Quadword 33 contains the
173 * vrsave as the first word (offset 0) within the quadword. 208 * vrsave as the first word (offset 0) within the quadword.
174 * 209 *
175 * This definition of the VMX state is compatible with the current PPC32 210 * This definition of the VMX state is compatible with the current PPC32
176 * ptrace interface. This allows signal handling and ptrace to use the same 211 * ptrace interface. This allows signal handling and ptrace to use the same
177 * structures. This also simplifies the implementation of a bi-arch 212 * structures. This also simplifies the implementation of a bi-arch
178 * (combined (32- and 64-bit) gdb. 213 * (combined (32- and 64-bit) gdb.
179 */ 214 */
180#define PTRACE_GETVRREGS 18 215#define PTRACE_GETVRREGS 18
181#define PTRACE_SETVRREGS 19 216#define PTRACE_SETVRREGS 19
182 217
183/* 218#ifndef __powerpc64__
184 * While we dont have 64bit book E processors, we need to reserve the 219/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
185 * relevant ptrace calls for 32bit compatibility. 220 * spefscr, in one go */
186 */ 221#define PTRACE_GETEVRREGS 20
187#if 0 222#define PTRACE_SETEVRREGS 21
188#define PTRACE_GETEVRREGS 20 223#endif /* __powerpc64__ */
189#define PTRACE_SETEVRREGS 21
190#endif
191 224
192/* 225/*
193 * Get or set a debug register. The first 16 are DABR registers and the 226 * Get or set a debug register. The first 16 are DABR registers and the
@@ -196,6 +229,7 @@ extern unsigned long profile_pc(struct pt_regs *regs);
196#define PTRACE_GET_DEBUGREG 25 229#define PTRACE_GET_DEBUGREG 25
197#define PTRACE_SET_DEBUGREG 26 230#define PTRACE_SET_DEBUGREG 26
198 231
232#ifdef __powerpc64__
199/* Additional PTRACE requests implemented on PowerPC. */ 233/* Additional PTRACE requests implemented on PowerPC. */
200#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */ 234#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
201#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */ 235#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
@@ -209,5 +243,6 @@ extern unsigned long profile_pc(struct pt_regs *regs);
209#define PPC_PTRACE_POKEDATA_3264 0x92 243#define PPC_PTRACE_POKEDATA_3264 0x92
210#define PPC_PTRACE_PEEKUSR_3264 0x91 244#define PPC_PTRACE_PEEKUSR_3264 0x91
211#define PPC_PTRACE_POKEUSR_3264 0x90 245#define PPC_PTRACE_POKEUSR_3264 0x90
246#endif /* __powerpc64__ */
212 247
213#endif /* _PPC64_PTRACE_H */ 248#endif /* _ASM_POWERPC_PTRACE_H */
diff --git a/include/asm-powerpc/rtas.h b/include/asm-powerpc/rtas.h
index 2c050332471d..d1bb611ea626 100644
--- a/include/asm-powerpc/rtas.h
+++ b/include/asm-powerpc/rtas.h
@@ -149,28 +149,11 @@ struct rtas_error_log {
149 unsigned char buffer[1]; 149 unsigned char buffer[1];
150}; 150};
151 151
152struct flash_block { 152/*
153 char *data; 153 * This can be set by the rtas_flash module so that it can get called
154 unsigned long length; 154 * as the absolutely last thing before the kernel terminates.
155};
156
157/* This struct is very similar but not identical to
158 * that needed by the rtas flash update.
159 * All we need to do for rtas is rewrite num_blocks
160 * into a version/length and translate the pointers
161 * to absolute.
162 */ 155 */
163#define FLASH_BLOCKS_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct flash_block)) 156extern void (*rtas_flash_term_hook)(int);
164struct flash_block_list {
165 unsigned long num_blocks;
166 struct flash_block_list *next;
167 struct flash_block blocks[FLASH_BLOCKS_PER_NODE];
168};
169struct flash_block_list_header { /* just the header of flash_block_list */
170 unsigned long num_blocks;
171 struct flash_block_list *next;
172};
173extern struct flash_block_list_header rtas_firmware_flash_list;
174 157
175extern struct rtas_t rtas; 158extern struct rtas_t rtas;
176 159
diff --git a/include/asm-ppc64/sigcontext.h b/include/asm-powerpc/sigcontext.h
index 6f8aee768c5e..165d630e1cf3 100644
--- a/include/asm-ppc64/sigcontext.h
+++ b/include/asm-powerpc/sigcontext.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_PPC64_SIGCONTEXT_H 1#ifndef _ASM_POWERPC_SIGCONTEXT_H
2#define _ASM_PPC64_SIGCONTEXT_H 2#define _ASM_POWERPC_SIGCONTEXT_H
3 3
4/* 4/*
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -9,39 +9,44 @@
9 */ 9 */
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <asm/ptrace.h> 11#include <asm/ptrace.h>
12#ifdef __powerpc64__
12#include <asm/elf.h> 13#include <asm/elf.h>
13 14#endif
14 15
15struct sigcontext { 16struct sigcontext {
16 unsigned long _unused[4]; 17 unsigned long _unused[4];
17 int signal; 18 int signal;
19#ifdef __powerpc64__
18 int _pad0; 20 int _pad0;
21#endif
19 unsigned long handler; 22 unsigned long handler;
20 unsigned long oldmask; 23 unsigned long oldmask;
21 struct pt_regs __user *regs; 24 struct pt_regs __user *regs;
25#ifdef __powerpc64__
22 elf_gregset_t gp_regs; 26 elf_gregset_t gp_regs;
23 elf_fpregset_t fp_regs; 27 elf_fpregset_t fp_regs;
24/* 28/*
25 * To maintain compatibility with current implementations the sigcontext is 29 * To maintain compatibility with current implementations the sigcontext is
26 * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) 30 * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t)
27 * followed by an unstructured (vmx_reserve) field of 69 doublewords. This 31 * followed by an unstructured (vmx_reserve) field of 69 doublewords. This
28 * allows the array of vector registers to be quadword aligned independent of 32 * allows the array of vector registers to be quadword aligned independent of
29 * the alignment of the containing sigcontext or ucontext. It is the 33 * the alignment of the containing sigcontext or ucontext. It is the
30 * responsibility of the code setting the sigcontext to set this pointer to 34 * responsibility of the code setting the sigcontext to set this pointer to
31 * either NULL (if this processor does not support the VMX feature) or the 35 * either NULL (if this processor does not support the VMX feature) or the
32 * address of the first quadword within the allocated (vmx_reserve) area. 36 * address of the first quadword within the allocated (vmx_reserve) area.
33 * 37 *
34 * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with 38 * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with
35 * an array of 34 quadword entries (elf_vrregset_t). The entries with 39 * an array of 34 quadword entries (elf_vrregset_t). The entries with
36 * indexes 0-31 contain the corresponding vector registers. The entry with 40 * indexes 0-31 contain the corresponding vector registers. The entry with
37 * index 32 contains the vscr as the last word (offset 12) within the 41 * index 32 contains the vscr as the last word (offset 12) within the
38 * quadword. This allows the vscr to be stored as either a quadword (since 42 * quadword. This allows the vscr to be stored as either a quadword (since
39 * it must be copied via a vector register to/from storage) or as a word. 43 * it must be copied via a vector register to/from storage) or as a word.
40 * The entry with index 33 contains the vrsave as the first word (offset 0) 44 * The entry with index 33 contains the vrsave as the first word (offset 0)
41 * within the quadword. 45 * within the quadword.
42 */ 46 */
43 elf_vrreg_t __user *v_regs; 47 elf_vrreg_t __user *v_regs;
44 long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1]; 48 long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1];
49#endif
45}; 50};
46 51
47#endif /* _ASM_PPC64_SIGCONTEXT_H */ 52#endif /* _ASM_POWERPC_SIGCONTEXT_H */
diff --git a/include/asm-ppc64/smp.h b/include/asm-powerpc/smp.h
index c5e9052e7967..8bcdd0faefea 100644
--- a/include/asm-ppc64/smp.h
+++ b/include/asm-powerpc/smp.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * smp.h: PPC64 specific SMP code. 2 * smp.h: PowerPC-specific SMP code.
3 * 3 *
4 * Original was a copy of sparc smp.h. Now heavily modified 4 * Original was a copy of sparc smp.h. Now heavily modified
5 * for PPC. 5 * for PPC.
@@ -13,9 +13,9 @@
13 * 2 of the License, or (at your option) any later version. 13 * 2 of the License, or (at your option) any later version.
14 */ 14 */
15 15
16#ifndef _ASM_POWERPC_SMP_H
17#define _ASM_POWERPC_SMP_H
16#ifdef __KERNEL__ 18#ifdef __KERNEL__
17#ifndef _PPC64_SMP_H
18#define _PPC64_SMP_H
19 19
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/threads.h> 21#include <linux/threads.h>
@@ -24,7 +24,9 @@
24 24
25#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
26 26
27#ifdef CONFIG_PPC64
27#include <asm/paca.h> 28#include <asm/paca.h>
29#endif
28 30
29extern int boot_cpuid; 31extern int boot_cpuid;
30extern int boot_cpuid_phys; 32extern int boot_cpuid_phys;
@@ -45,8 +47,19 @@ void generic_cpu_die(unsigned int cpu);
45void generic_mach_cpu_die(void); 47void generic_mach_cpu_die(void);
46#endif 48#endif
47 49
50#ifdef CONFIG_PPC64
48#define raw_smp_processor_id() (get_paca()->paca_index) 51#define raw_smp_processor_id() (get_paca()->paca_index)
49#define hard_smp_processor_id() (get_paca()->hw_cpu_id) 52#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
53#else
54/* 32-bit */
55extern int smp_hw_index[];
56
57#define raw_smp_processor_id() (current_thread_info()->cpu)
58#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
59#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)])
60#define set_hard_smp_processor_id(cpu, phys)\
61 (smp_hw_index[(cpu)] = (phys))
62#endif
50 63
51extern cpumask_t cpu_sibling_map[NR_CPUS]; 64extern cpumask_t cpu_sibling_map[NR_CPUS];
52 65
@@ -64,14 +77,30 @@ extern cpumask_t cpu_sibling_map[NR_CPUS];
64 77
65void smp_init_iSeries(void); 78void smp_init_iSeries(void);
66void smp_init_pSeries(void); 79void smp_init_pSeries(void);
80void smp_init_cell(void);
81void smp_setup_cpu_maps(void);
67 82
68extern int __cpu_disable(void); 83extern int __cpu_disable(void);
69extern void __cpu_die(unsigned int cpu); 84extern void __cpu_die(unsigned int cpu);
85
86#else
87/* for UP */
88#define smp_setup_cpu_maps()
89#define smp_release_cpus()
90
70#endif /* CONFIG_SMP */ 91#endif /* CONFIG_SMP */
71 92
93#ifdef CONFIG_PPC64
72#define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id) 94#define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id)
73#define set_hard_smp_processor_id(CPU, VAL) \ 95#define set_hard_smp_processor_id(CPU, VAL) \
74 do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0) 96 do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0)
97#else
98/* 32-bit */
99#ifndef CONFIG_SMP
100#define get_hard_smp_processor_id(cpu) boot_cpuid_phys
101#define set_hard_smp_processor_id(cpu, phys)
102#endif
103#endif
75 104
76extern int smt_enabled_at_boot; 105extern int smt_enabled_at_boot;
77 106
@@ -84,15 +113,7 @@ extern void smp_generic_take_timebase(void);
84 113
85extern struct smp_ops_t *smp_ops; 114extern struct smp_ops_t *smp_ops;
86 115
87#ifdef CONFIG_PPC_PSERIES
88void vpa_init(int cpu);
89#else
90static inline void vpa_init(int cpu)
91{
92}
93#endif /* CONFIG_PPC_PSERIES */
94
95#endif /* __ASSEMBLY__ */ 116#endif /* __ASSEMBLY__ */
96 117
97#endif /* !(_PPC64_SMP_H) */
98#endif /* __KERNEL__ */ 118#endif /* __KERNEL__ */
119#endif /* _ASM_POWERPC_SMP_H) */
diff --git a/include/asm-ppc64/sparsemem.h b/include/asm-powerpc/sparsemem.h
index c5bd47e57f17..1c95ab99deb3 100644
--- a/include/asm-ppc64/sparsemem.h
+++ b/include/asm-powerpc/sparsemem.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_PPC64_SPARSEMEM_H 1#ifndef _ASM_POWERPC_SPARSEMEM_H
2#define _ASM_PPC64_SPARSEMEM_H 1 2#define _ASM_POWERPC_SPARSEMEM_H 1
3 3
4#ifdef CONFIG_SPARSEMEM 4#ifdef CONFIG_SPARSEMEM
5/* 5/*
@@ -13,4 +13,4 @@
13 13
14#endif /* CONFIG_SPARSEMEM */ 14#endif /* CONFIG_SPARSEMEM */
15 15
16#endif /* _ASM_PPC64_SPARSEMEM_H */ 16#endif /* _ASM_POWERPC_SPARSEMEM_H */
diff --git a/include/asm-powerpc/stat.h b/include/asm-powerpc/stat.h
new file mode 100644
index 000000000000..e4edc510b530
--- /dev/null
+++ b/include/asm-powerpc/stat.h
@@ -0,0 +1,81 @@
1#ifndef _ASM_POWERPC_STAT_H
2#define _ASM_POWERPC_STAT_H
3/*
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#include <linux/types.h>
10
11#define STAT_HAVE_NSEC 1
12
13#ifndef __powerpc64__
14struct __old_kernel_stat {
15 unsigned short st_dev;
16 unsigned short st_ino;
17 unsigned short st_mode;
18 unsigned short st_nlink;
19 unsigned short st_uid;
20 unsigned short st_gid;
21 unsigned short st_rdev;
22 unsigned long st_size;
23 unsigned long st_atime;
24 unsigned long st_mtime;
25 unsigned long st_ctime;
26};
27#endif /* !__powerpc64__ */
28
29struct stat {
30 unsigned long st_dev;
31 ino_t st_ino;
32#ifdef __powerpc64__
33 nlink_t st_nlink;
34 mode_t st_mode;
35#else
36 mode_t st_mode;
37 nlink_t st_nlink;
38#endif
39 uid_t st_uid;
40 gid_t st_gid;
41 unsigned long st_rdev;
42 off_t st_size;
43 unsigned long st_blksize;
44 unsigned long st_blocks;
45 unsigned long st_atime;
46 unsigned long st_atime_nsec;
47 unsigned long st_mtime;
48 unsigned long st_mtime_nsec;
49 unsigned long st_ctime;
50 unsigned long st_ctime_nsec;
51 unsigned long __unused4;
52 unsigned long __unused5;
53#ifdef __powerpc64__
54 unsigned long __unused6;
55#endif
56};
57
58/* This matches struct stat64 in glibc2.1. Only used for 32 bit. */
59struct stat64 {
60 unsigned long long st_dev; /* Device. */
61 unsigned long long st_ino; /* File serial number. */
62 unsigned int st_mode; /* File mode. */
63 unsigned int st_nlink; /* Link count. */
64 unsigned int st_uid; /* User ID of the file's owner. */
65 unsigned int st_gid; /* Group ID of the file's group. */
66 unsigned long long st_rdev; /* Device number, if device. */
67 unsigned short __pad2;
68 long long st_size; /* Size of file, in bytes. */
69 int st_blksize; /* Optimal block size for I/O. */
70 long long st_blocks; /* Number 512-byte blocks allocated. */
71 int st_atime; /* Time of last access. */
72 unsigned int st_atime_nsec;
73 int st_mtime; /* Time of last modification. */
74 unsigned int st_mtime_nsec;
75 int st_ctime; /* Time of last status change. */
76 unsigned int st_ctime_nsec;
77 unsigned int __unused4;
78 unsigned int __unused5;
79};
80
81#endif /* _ASM_POWERPC_STAT_H */
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 5b2ecbc47907..b5da0b851e02 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -359,5 +359,53 @@ extern void reloc_got2(unsigned long);
359 359
360#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x))) 360#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
361 361
362static inline void create_instruction(unsigned long addr, unsigned int instr)
363{
364 unsigned int *p;
365 p = (unsigned int *)addr;
366 *p = instr;
367 asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (p));
368}
369
370/* Flags for create_branch:
371 * "b" == create_branch(addr, target, 0);
372 * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE);
373 * "bl" == create_branch(addr, target, BRANCH_SET_LINK);
374 * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
375 */
376#define BRANCH_SET_LINK 0x1
377#define BRANCH_ABSOLUTE 0x2
378
379static inline void create_branch(unsigned long addr,
380 unsigned long target, int flags)
381{
382 unsigned int instruction;
383
384 if (! (flags & BRANCH_ABSOLUTE))
385 target = target - addr;
386
387 /* Mask out the flags and target, so they don't step on each other. */
388 instruction = 0x48000000 | (flags & 0x3) | (target & 0x03FFFFFC);
389
390 create_instruction(addr, instruction);
391}
392
393static inline void create_function_call(unsigned long addr, void * func)
394{
395 unsigned long func_addr;
396
397#ifdef CONFIG_PPC64
398 /*
399 * On PPC64 the function pointer actually points to the function's
400 * descriptor. The first entry in the descriptor is the address
401 * of the function text.
402 */
403 func_addr = *(unsigned long *)func;
404#else
405 func_addr = (unsigned long)func;
406#endif
407 create_branch(addr, func_addr, BRANCH_SET_LINK);
408}
409
362#endif /* __KERNEL__ */ 410#endif /* __KERNEL__ */
363#endif /* _ASM_POWERPC_SYSTEM_H */ 411#endif /* _ASM_POWERPC_SYSTEM_H */
diff --git a/include/asm-powerpc/termios.h b/include/asm-powerpc/termios.h
index c5b8e5358f83..7f80a019b6a0 100644
--- a/include/asm-powerpc/termios.h
+++ b/include/asm-powerpc/termios.h
@@ -94,142 +94,9 @@ struct termio {
94#define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025" 94#define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025"
95#endif 95#endif
96 96
97#define FIOCLEX _IO('f', 1)
98#define FIONCLEX _IO('f', 2)
99#define FIOASYNC _IOW('f', 125, int)
100#define FIONBIO _IOW('f', 126, int)
101#define FIONREAD _IOR('f', 127, int)
102#define TIOCINQ FIONREAD
103
104#define TIOCGETP _IOR('t', 8, struct sgttyb)
105#define TIOCSETP _IOW('t', 9, struct sgttyb)
106#define TIOCSETN _IOW('t', 10, struct sgttyb) /* TIOCSETP wo flush */
107
108#define TIOCSETC _IOW('t', 17, struct tchars)
109#define TIOCGETC _IOR('t', 18, struct tchars)
110#define TCGETS _IOR('t', 19, struct termios)
111#define TCSETS _IOW('t', 20, struct termios)
112#define TCSETSW _IOW('t', 21, struct termios)
113#define TCSETSF _IOW('t', 22, struct termios)
114
115#define TCGETA _IOR('t', 23, struct termio)
116#define TCSETA _IOW('t', 24, struct termio)
117#define TCSETAW _IOW('t', 25, struct termio)
118#define TCSETAF _IOW('t', 28, struct termio)
119
120#define TCSBRK _IO('t', 29)
121#define TCXONC _IO('t', 30)
122#define TCFLSH _IO('t', 31)
123
124#define TIOCSWINSZ _IOW('t', 103, struct winsize)
125#define TIOCGWINSZ _IOR('t', 104, struct winsize)
126#define TIOCSTART _IO('t', 110) /* start output, like ^Q */
127#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */
128#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */
129
130#define TIOCGLTC _IOR('t', 116, struct ltchars)
131#define TIOCSLTC _IOW('t', 117, struct ltchars)
132#define TIOCSPGRP _IOW('t', 118, int)
133#define TIOCGPGRP _IOR('t', 119, int)
134
135#define TIOCEXCL 0x540C
136#define TIOCNXCL 0x540D
137#define TIOCSCTTY 0x540E
138
139#define TIOCSTI 0x5412
140#define TIOCMGET 0x5415
141#define TIOCMBIS 0x5416
142#define TIOCMBIC 0x5417
143#define TIOCMSET 0x5418
144#define TIOCGSOFTCAR 0x5419
145#define TIOCSSOFTCAR 0x541A
146#define TIOCLINUX 0x541C
147#define TIOCCONS 0x541D
148#define TIOCGSERIAL 0x541E
149#define TIOCSSERIAL 0x541F
150#define TIOCPKT 0x5420
151
152#define TIOCNOTTY 0x5422
153#define TIOCSETD 0x5423
154#define TIOCGETD 0x5424
155#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
156
157#define TIOCSERCONFIG 0x5453
158#define TIOCSERGWILD 0x5454
159#define TIOCSERSWILD 0x5455
160#define TIOCGLCKTRMIOS 0x5456
161#define TIOCSLCKTRMIOS 0x5457
162#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
163#define TIOCSERGETLSR 0x5459 /* Get line status register */
164#define TIOCSERGETMULTI 0x545A /* Get multiport config */
165#define TIOCSERSETMULTI 0x545B /* Set multiport config */
166
167#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
168#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
169
170/* Used for packet mode */
171#define TIOCPKT_DATA 0
172#define TIOCPKT_FLUSHREAD 1
173#define TIOCPKT_FLUSHWRITE 2
174#define TIOCPKT_STOP 4
175#define TIOCPKT_START 8
176#define TIOCPKT_NOSTOP 16
177#define TIOCPKT_DOSTOP 32
178
179/* modem lines */
180#define TIOCM_LE 0x001
181#define TIOCM_DTR 0x002
182#define TIOCM_RTS 0x004
183#define TIOCM_ST 0x008
184#define TIOCM_SR 0x010
185#define TIOCM_CTS 0x020
186#define TIOCM_CAR 0x040
187#define TIOCM_RNG 0x080
188#define TIOCM_DSR 0x100
189#define TIOCM_CD TIOCM_CAR
190#define TIOCM_RI TIOCM_RNG
191#define TIOCM_OUT1 0x2000
192#define TIOCM_OUT2 0x4000
193#define TIOCM_LOOP 0x8000
194
195/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
196#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
197
198#ifdef __KERNEL__ 97#ifdef __KERNEL__
199 98
200/* 99#include <asm-generic/termios.h>
201 * Translate a "termio" structure into a "termios". Ugh.
202 */
203#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
204 unsigned short __tmp; \
205 get_user(__tmp,&(termio)->x); \
206 (termios)->x = (0xffff0000 & (termios)->x) | __tmp; \
207}
208
209#define user_termio_to_kernel_termios(termios, termio) \
210({ \
211 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
212 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
213 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
214 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
215 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
216})
217
218/*
219 * Translate a "termios" structure into a "termio". Ugh.
220 */
221#define kernel_termios_to_user_termio(termio, termios) \
222({ \
223 put_user((termios)->c_iflag, &(termio)->c_iflag); \
224 put_user((termios)->c_oflag, &(termio)->c_oflag); \
225 put_user((termios)->c_cflag, &(termio)->c_cflag); \
226 put_user((termios)->c_lflag, &(termio)->c_lflag); \
227 put_user((termios)->c_line, &(termio)->c_line); \
228 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
229})
230
231#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
232#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
233 100
234#endif /* __KERNEL__ */ 101#endif /* __KERNEL__ */
235 102
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
index 410e795f7d43..d9b86a17271b 100644
--- a/include/asm-powerpc/time.h
+++ b/include/asm-powerpc/time.h
@@ -21,7 +21,7 @@
21#include <asm/processor.h> 21#include <asm/processor.h>
22#ifdef CONFIG_PPC64 22#ifdef CONFIG_PPC64
23#include <asm/paca.h> 23#include <asm/paca.h>
24#include <asm/iSeries/HvCall.h> 24#include <asm/iseries/hv_call.h>
25#endif 25#endif
26 26
27/* time.c */ 27/* time.c */
diff --git a/include/asm-ppc/tlb.h b/include/asm-powerpc/tlb.h
index 2c142c5d8584..56659f121779 100644
--- a/include/asm-ppc/tlb.h
+++ b/include/asm-powerpc/tlb.h
@@ -1,6 +1,7 @@
1/* 1/*
2 * TLB shootdown specifics for PPC 2 * TLB shootdown specifics for powerpc
3 * 3 *
4 * Copyright (C) 2002 Anton Blanchard, IBM Corp.
4 * Copyright (C) 2002 Paul Mackerras, IBM Corp. 5 * Copyright (C) 2002 Paul Mackerras, IBM Corp.
5 * 6 *
6 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
@@ -8,29 +9,53 @@
8 * as published by the Free Software Foundation; either version 9 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version. 10 * 2 of the License, or (at your option) any later version.
10 */ 11 */
11#ifndef _PPC_TLB_H 12#ifndef _ASM_POWERPC_TLB_H
12#define _PPC_TLB_H 13#define _ASM_POWERPC_TLB_H
13 14
14#include <linux/config.h> 15#include <linux/config.h>
16#ifndef __powerpc64__
15#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#endif
16#include <asm/pgalloc.h> 19#include <asm/pgalloc.h>
17#include <asm/tlbflush.h> 20#include <asm/tlbflush.h>
21#ifndef __powerpc64__
18#include <asm/page.h> 22#include <asm/page.h>
19#include <asm/mmu.h> 23#include <asm/mmu.h>
20 24#endif
21#ifdef CONFIG_PPC_STD_MMU
22/* Classic PPC with hash-table based MMU... */
23 25
24struct mmu_gather; 26struct mmu_gather;
27
28#define tlb_start_vma(tlb, vma) do { } while (0)
29#define tlb_end_vma(tlb, vma) do { } while (0)
30
31#if !defined(CONFIG_PPC_STD_MMU)
32
33#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
34
35#elif defined(__powerpc64__)
36
37extern void pte_free_finish(void);
38
39static inline void tlb_flush(struct mmu_gather *tlb)
40{
41 flush_tlb_pending();
42 pte_free_finish();
43}
44
45#else
46
25extern void tlb_flush(struct mmu_gather *tlb); 47extern void tlb_flush(struct mmu_gather *tlb);
26 48
49#endif
50
27/* Get the generic bits... */ 51/* Get the generic bits... */
28#include <asm-generic/tlb.h> 52#include <asm-generic/tlb.h>
29 53
30/* Nothing needed here in fact... */ 54#if !defined(CONFIG_PPC_STD_MMU) || defined(__powerpc64__)
31#define tlb_start_vma(tlb, vma) do { } while (0) 55
32#define tlb_end_vma(tlb, vma) do { } while (0) 56#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
33 57
58#else
34extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, 59extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep,
35 unsigned long address); 60 unsigned long address);
36 61
@@ -41,17 +66,5 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
41 flush_hash_entry(tlb->mm, ptep, address); 66 flush_hash_entry(tlb->mm, ptep, address);
42} 67}
43 68
44#else 69#endif
45/* Embedded PPC with software-loaded TLB, very simple... */ 70#endif /* __ASM_POWERPC_TLB_H */
46
47#define tlb_start_vma(tlb, vma) do { } while (0)
48#define tlb_end_vma(tlb, vma) do { } while (0)
49#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
50#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
51
52/* Get the generic bits... */
53#include <asm-generic/tlb.h>
54
55#endif /* CONFIG_PPC_STD_MMU */
56
57#endif /* __PPC_TLB_H */
diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h
new file mode 100644
index 000000000000..ca3655672bbc
--- /dev/null
+++ b/include/asm-powerpc/tlbflush.h
@@ -0,0 +1,146 @@
1#ifndef _ASM_POWERPC_TLBFLUSH_H
2#define _ASM_POWERPC_TLBFLUSH_H
3/*
4 * TLB flushing:
5 *
6 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
7 * - flush_tlb_page(vma, vmaddr) flushes one page
8 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
9 * - flush_tlb_range(vma, start, end) flushes a range of pages
10 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
11 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
18#ifdef __KERNEL__
19
20#include <linux/config.h>
21
22struct mm_struct;
23
24#ifdef CONFIG_PPC64
25
26#include <linux/percpu.h>
27#include <asm/page.h>
28
29#define PPC64_TLB_BATCH_NR 192
30
31struct ppc64_tlb_batch {
32 unsigned long index;
33 struct mm_struct *mm;
34 pte_t pte[PPC64_TLB_BATCH_NR];
35 unsigned long vaddr[PPC64_TLB_BATCH_NR];
36 unsigned int large;
37};
38DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
39
40extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
41
42static inline void flush_tlb_pending(void)
43{
44 struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
45
46 if (batch->index)
47 __flush_tlb_pending(batch);
48 put_cpu_var(ppc64_tlb_batch);
49}
50
51extern void flush_hash_page(unsigned long va, pte_t pte, int local);
52void flush_hash_range(unsigned long number, int local);
53
54#else /* CONFIG_PPC64 */
55
56#include <linux/mm.h>
57
58extern void _tlbie(unsigned long address);
59extern void _tlbia(void);
60
61/*
62 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
63 * flush_tlb_kernel_range are best implemented as tlbia vs
64 * specific tlbie's
65 */
66
67#if (defined(CONFIG_4xx) && !defined(CONFIG_44x)) || defined(CONFIG_8xx)
68#define flush_tlb_pending() asm volatile ("tlbia; sync" : : : "memory")
69#elif defined(CONFIG_4xx) || defined(CONFIG_FSL_BOOKE)
70#define flush_tlb_pending() _tlbia()
71#endif
72
73/*
74 * This gets called at the end of handling a page fault, when
75 * the kernel has put a new PTE into the page table for the process.
76 * We use it to ensure coherency between the i-cache and d-cache
77 * for the page which has just been mapped in.
78 * On machines which use an MMU hash table, we use this to put a
79 * corresponding HPTE into the hash table ahead of time, instead of
80 * waiting for the inevitable extra hash-table miss exception.
81 */
82extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
83
84#endif /* CONFIG_PPC64 */
85
86#if defined(CONFIG_PPC64) || defined(CONFIG_4xx) || \
87 defined(CONFIG_FSL_BOOKE) || defined(CONFIG_8xx)
88
89static inline void flush_tlb_mm(struct mm_struct *mm)
90{
91 flush_tlb_pending();
92}
93
94static inline void flush_tlb_page(struct vm_area_struct *vma,
95 unsigned long vmaddr)
96{
97#ifdef CONFIG_PPC64
98 flush_tlb_pending();
99#else
100 _tlbie(vmaddr);
101#endif
102}
103
104static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
105 unsigned long vmaddr)
106{
107#ifndef CONFIG_PPC64
108 _tlbie(vmaddr);
109#endif
110}
111
112static inline void flush_tlb_range(struct vm_area_struct *vma,
113 unsigned long start, unsigned long end)
114{
115 flush_tlb_pending();
116}
117
118static inline void flush_tlb_kernel_range(unsigned long start,
119 unsigned long end)
120{
121 flush_tlb_pending();
122}
123
124#else /* 6xx, 7xx, 7xxx cpus */
125
126extern void flush_tlb_mm(struct mm_struct *mm);
127extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
128extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
129extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
130 unsigned long end);
131extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
132
133#endif
134
135/*
136 * This is called in munmap when we have freed up some page-table
137 * pages. We don't need to do anything here, there's nothing special
138 * about our page-table pages. -- paulus
139 */
140static inline void flush_tlb_pgtables(struct mm_struct *mm,
141 unsigned long start, unsigned long end)
142{
143}
144
145#endif /*__KERNEL__ */
146#endif /* _ASM_POWERPC_TLBFLUSH_H */
diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h
new file mode 100644
index 000000000000..33af730f0d19
--- /dev/null
+++ b/include/asm-powerpc/uaccess.h
@@ -0,0 +1,468 @@
1#ifndef _ARCH_POWERPC_UACCESS_H
2#define _ARCH_POWERPC_UACCESS_H
3
4#ifdef __KERNEL__
5#ifndef __ASSEMBLY__
6
7#include <linux/sched.h>
8#include <linux/errno.h>
9#include <asm/processor.h>
10
11#define VERIFY_READ 0
12#define VERIFY_WRITE 1
13
14/*
15 * The fs value determines whether argument validity checking should be
16 * performed or not. If get_fs() == USER_DS, checking is performed, with
17 * get_fs() == KERNEL_DS, checking is bypassed.
18 *
19 * For historical reasons, these macros are grossly misnamed.
20 *
21 * The fs/ds values are now the highest legal address in the "segment".
22 * This simplifies the checking in the routines below.
23 */
24
25#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
26
27#define KERNEL_DS MAKE_MM_SEG(~0UL)
28#ifdef __powerpc64__
29/* We use TASK_SIZE_USER64 as TASK_SIZE is not constant */
30#define USER_DS MAKE_MM_SEG(TASK_SIZE_USER64 - 1)
31#else
32#define USER_DS MAKE_MM_SEG(TASK_SIZE - 1)
33#endif
34
35#define get_ds() (KERNEL_DS)
36#define get_fs() (current->thread.fs)
37#define set_fs(val) (current->thread.fs = (val))
38
39#define segment_eq(a, b) ((a).seg == (b).seg)
40
41#ifdef __powerpc64__
42/*
43 * This check is sufficient because there is a large enough
44 * gap between user addresses and the kernel addresses
45 */
46#define __access_ok(addr, size, segment) \
47 (((addr) <= (segment).seg) && ((size) <= (segment).seg))
48
49#else
50
51#define __access_ok(addr, size, segment) \
52 (((addr) <= (segment).seg) && \
53 (((size) == 0) || (((size) - 1) <= ((segment).seg - (addr)))))
54
55#endif
56
57#define access_ok(type, addr, size) \
58 (__chk_user_ptr(addr), \
59 __access_ok((__force unsigned long)(addr), (size), get_fs()))
60
61/*
62 * The exception table consists of pairs of addresses: the first is the
63 * address of an instruction that is allowed to fault, and the second is
64 * the address at which the program should continue. No registers are
65 * modified, so it is entirely up to the continuation code to figure out
66 * what to do.
67 *
68 * All the routines below use bits of fixup code that are out of line
69 * with the main instruction path. This means when everything is well,
70 * we don't even have to jump over them. Further, they do not intrude
71 * on our cache or tlb entries.
72 */
73
74struct exception_table_entry {
75 unsigned long insn;
76 unsigned long fixup;
77};
78
79/*
80 * These are the main single-value transfer routines. They automatically
81 * use the right size if we just have the right pointer type.
82 *
83 * This gets kind of ugly. We want to return _two_ values in "get_user()"
84 * and yet we don't want to do any pointers, because that is too much
85 * of a performance impact. Thus we have a few rather ugly macros here,
86 * and hide all the ugliness from the user.
87 *
88 * The "__xxx" versions of the user access functions are versions that
89 * do not verify the address space, that must have been done previously
90 * with a separate "access_ok()" call (this is used when we do multiple
91 * accesses to the same area of user memory).
92 *
93 * As we use the same address space for kernel and user data on the
94 * PowerPC, we can just do these as direct assignments. (Of course, the
95 * exception handling means that it's no longer "just"...)
96 *
97 * The "user64" versions of the user access functions are versions that
98 * allow access of 64-bit data. The "get_user" functions do not
99 * properly handle 64-bit data because the value gets down cast to a long.
100 * The "put_user" functions already handle 64-bit data properly but we add
101 * "user64" versions for completeness
102 */
103#define get_user(x, ptr) \
104 __get_user_check((x), (ptr), sizeof(*(ptr)))
105#define put_user(x, ptr) \
106 __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
107
108#define __get_user(x, ptr) \
109 __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
110#define __put_user(x, ptr) \
111 __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr)))
112#ifndef __powerpc64__
113#define __get_user64(x, ptr) \
114 __get_user64_nocheck((x), (ptr), sizeof(*(ptr)))
115#define __put_user64(x, ptr) __put_user(x, ptr)
116#endif
117
118#define __get_user_unaligned __get_user
119#define __put_user_unaligned __put_user
120
121extern long __put_user_bad(void);
122
123#ifdef __powerpc64__
124#define __EX_TABLE_ALIGN "3"
125#define __EX_TABLE_TYPE "llong"
126#else
127#define __EX_TABLE_ALIGN "2"
128#define __EX_TABLE_TYPE "long"
129#endif
130
131/*
132 * We don't tell gcc that we are accessing memory, but this is OK
133 * because we do not write to any memory gcc knows about, so there
134 * are no aliasing issues.
135 */
136#define __put_user_asm(x, addr, err, op) \
137 __asm__ __volatile__( \
138 "1: " op " %1,0(%2) # put_user\n" \
139 "2:\n" \
140 ".section .fixup,\"ax\"\n" \
141 "3: li %0,%3\n" \
142 " b 2b\n" \
143 ".previous\n" \
144 ".section __ex_table,\"a\"\n" \
145 " .align " __EX_TABLE_ALIGN "\n" \
146 " ."__EX_TABLE_TYPE" 1b,3b\n" \
147 ".previous" \
148 : "=r" (err) \
149 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
150
151#ifdef __powerpc64__
152#define __put_user_asm2(x, ptr, retval) \
153 __put_user_asm(x, ptr, retval, "std")
154#else /* __powerpc64__ */
155#define __put_user_asm2(x, addr, err) \
156 __asm__ __volatile__( \
157 "1: stw %1,0(%2)\n" \
158 "2: stw %1+1,4(%2)\n" \
159 "3:\n" \
160 ".section .fixup,\"ax\"\n" \
161 "4: li %0,%3\n" \
162 " b 3b\n" \
163 ".previous\n" \
164 ".section __ex_table,\"a\"\n" \
165 " .align " __EX_TABLE_ALIGN "\n" \
166 " ." __EX_TABLE_TYPE " 1b,4b\n" \
167 " ." __EX_TABLE_TYPE " 2b,4b\n" \
168 ".previous" \
169 : "=r" (err) \
170 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
171#endif /* __powerpc64__ */
172
173#define __put_user_size(x, ptr, size, retval) \
174do { \
175 retval = 0; \
176 switch (size) { \
177 case 1: __put_user_asm(x, ptr, retval, "stb"); break; \
178 case 2: __put_user_asm(x, ptr, retval, "sth"); break; \
179 case 4: __put_user_asm(x, ptr, retval, "stw"); break; \
180 case 8: __put_user_asm2(x, ptr, retval); break; \
181 default: __put_user_bad(); \
182 } \
183} while (0)
184
185#define __put_user_nocheck(x, ptr, size) \
186({ \
187 long __pu_err; \
188 might_sleep(); \
189 __chk_user_ptr(ptr); \
190 __put_user_size((x), (ptr), (size), __pu_err); \
191 __pu_err; \
192})
193
194#define __put_user_check(x, ptr, size) \
195({ \
196 long __pu_err = -EFAULT; \
197 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
198 might_sleep(); \
199 if (access_ok(VERIFY_WRITE, __pu_addr, size)) \
200 __put_user_size((x), __pu_addr, (size), __pu_err); \
201 __pu_err; \
202})
203
204extern long __get_user_bad(void);
205
206#define __get_user_asm(x, addr, err, op) \
207 __asm__ __volatile__( \
208 "1: "op" %1,0(%2) # get_user\n" \
209 "2:\n" \
210 ".section .fixup,\"ax\"\n" \
211 "3: li %0,%3\n" \
212 " li %1,0\n" \
213 " b 2b\n" \
214 ".previous\n" \
215 ".section __ex_table,\"a\"\n" \
216 " .align "__EX_TABLE_ALIGN "\n" \
217 " ." __EX_TABLE_TYPE " 1b,3b\n" \
218 ".previous" \
219 : "=r" (err), "=r" (x) \
220 : "b" (addr), "i" (-EFAULT), "0" (err))
221
222#ifdef __powerpc64__
223#define __get_user_asm2(x, addr, err) \
224 __get_user_asm(x, addr, err, "ld")
225#else /* __powerpc64__ */
226#define __get_user_asm2(x, addr, err) \
227 __asm__ __volatile__( \
228 "1: lwz %1,0(%2)\n" \
229 "2: lwz %1+1,4(%2)\n" \
230 "3:\n" \
231 ".section .fixup,\"ax\"\n" \
232 "4: li %0,%3\n" \
233 " li %1,0\n" \
234 " li %1+1,0\n" \
235 " b 3b\n" \
236 ".previous\n" \
237 ".section __ex_table,\"a\"\n" \
238 " .align " __EX_TABLE_ALIGN "\n" \
239 " ." __EX_TABLE_TYPE " 1b,4b\n" \
240 " ." __EX_TABLE_TYPE " 2b,4b\n" \
241 ".previous" \
242 : "=r" (err), "=&r" (x) \
243 : "b" (addr), "i" (-EFAULT), "0" (err))
244#endif /* __powerpc64__ */
245
246#define __get_user_size(x, ptr, size, retval) \
247do { \
248 retval = 0; \
249 __chk_user_ptr(ptr); \
250 if (size > sizeof(x)) \
251 (x) = __get_user_bad(); \
252 switch (size) { \
253 case 1: __get_user_asm(x, ptr, retval, "lbz"); break; \
254 case 2: __get_user_asm(x, ptr, retval, "lhz"); break; \
255 case 4: __get_user_asm(x, ptr, retval, "lwz"); break; \
256 case 8: __get_user_asm2(x, ptr, retval); break; \
257 default: (x) = __get_user_bad(); \
258 } \
259} while (0)
260
261#define __get_user_nocheck(x, ptr, size) \
262({ \
263 long __gu_err; \
264 unsigned long __gu_val; \
265 __chk_user_ptr(ptr); \
266 might_sleep(); \
267 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
268 (x) = (__typeof__(*(ptr)))__gu_val; \
269 __gu_err; \
270})
271
272#ifndef __powerpc64__
273#define __get_user64_nocheck(x, ptr, size) \
274({ \
275 long __gu_err; \
276 long long __gu_val; \
277 __chk_user_ptr(ptr); \
278 might_sleep(); \
279 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
280 (x) = (__typeof__(*(ptr)))__gu_val; \
281 __gu_err; \
282})
283#endif /* __powerpc64__ */
284
285#define __get_user_check(x, ptr, size) \
286({ \
287 long __gu_err = -EFAULT; \
288 unsigned long __gu_val = 0; \
289 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
290 might_sleep(); \
291 if (access_ok(VERIFY_READ, __gu_addr, (size))) \
292 __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
293 (x) = (__typeof__(*(ptr)))__gu_val; \
294 __gu_err; \
295})
296
297/* more complex routines */
298
299extern unsigned long __copy_tofrom_user(void __user *to,
300 const void __user *from, unsigned long size);
301
302#ifndef __powerpc64__
303
304extern inline unsigned long copy_from_user(void *to,
305 const void __user *from, unsigned long n)
306{
307 unsigned long over;
308
309 if (access_ok(VERIFY_READ, from, n))
310 return __copy_tofrom_user((__force void __user *)to, from, n);
311 if ((unsigned long)from < TASK_SIZE) {
312 over = (unsigned long)from + n - TASK_SIZE;
313 return __copy_tofrom_user((__force void __user *)to, from,
314 n - over) + over;
315 }
316 return n;
317}
318
319extern inline unsigned long copy_to_user(void __user *to,
320 const void *from, unsigned long n)
321{
322 unsigned long over;
323
324 if (access_ok(VERIFY_WRITE, to, n))
325 return __copy_tofrom_user(to, (__force void __user *)from, n);
326 if ((unsigned long)to < TASK_SIZE) {
327 over = (unsigned long)to + n - TASK_SIZE;
328 return __copy_tofrom_user(to, (__force void __user *)from,
329 n - over) + over;
330 }
331 return n;
332}
333
334#else /* __powerpc64__ */
335
336#define __copy_in_user(to, from, size) \
337 __copy_tofrom_user((to), (from), (size))
338
339extern unsigned long copy_from_user(void *to, const void __user *from,
340 unsigned long n);
341extern unsigned long copy_to_user(void __user *to, const void *from,
342 unsigned long n);
343extern unsigned long copy_in_user(void __user *to, const void __user *from,
344 unsigned long n);
345
346#endif /* __powerpc64__ */
347
348static inline unsigned long __copy_from_user_inatomic(void *to,
349 const void __user *from, unsigned long n)
350{
351 if (__builtin_constant_p(n) && (n <= 8)) {
352 unsigned long ret;
353
354 switch (n) {
355 case 1:
356 __get_user_size(*(u8 *)to, from, 1, ret);
357 break;
358 case 2:
359 __get_user_size(*(u16 *)to, from, 2, ret);
360 break;
361 case 4:
362 __get_user_size(*(u32 *)to, from, 4, ret);
363 break;
364 case 8:
365 __get_user_size(*(u64 *)to, from, 8, ret);
366 break;
367 }
368 if (ret == 0)
369 return 0;
370 }
371 return __copy_tofrom_user((__force void __user *)to, from, n);
372}
373
374static inline unsigned long __copy_to_user_inatomic(void __user *to,
375 const void *from, unsigned long n)
376{
377 if (__builtin_constant_p(n) && (n <= 8)) {
378 unsigned long ret;
379
380 switch (n) {
381 case 1:
382 __put_user_size(*(u8 *)from, (u8 __user *)to, 1, ret);
383 break;
384 case 2:
385 __put_user_size(*(u16 *)from, (u16 __user *)to, 2, ret);
386 break;
387 case 4:
388 __put_user_size(*(u32 *)from, (u32 __user *)to, 4, ret);
389 break;
390 case 8:
391 __put_user_size(*(u64 *)from, (u64 __user *)to, 8, ret);
392 break;
393 }
394 if (ret == 0)
395 return 0;
396 }
397 return __copy_tofrom_user(to, (__force const void __user *)from, n);
398}
399
400static inline unsigned long __copy_from_user(void *to,
401 const void __user *from, unsigned long size)
402{
403 might_sleep();
404 return __copy_from_user_inatomic(to, from, size);
405}
406
407static inline unsigned long __copy_to_user(void __user *to,
408 const void *from, unsigned long size)
409{
410 might_sleep();
411 return __copy_to_user_inatomic(to, from, size);
412}
413
414extern unsigned long __clear_user(void __user *addr, unsigned long size);
415
416static inline unsigned long clear_user(void __user *addr, unsigned long size)
417{
418 might_sleep();
419 if (likely(access_ok(VERIFY_WRITE, addr, size)))
420 return __clear_user(addr, size);
421 if ((unsigned long)addr < TASK_SIZE) {
422 unsigned long over = (unsigned long)addr + size - TASK_SIZE;
423 return __clear_user(addr, size - over) + over;
424 }
425 return size;
426}
427
428extern int __strncpy_from_user(char *dst, const char __user *src, long count);
429
430static inline long strncpy_from_user(char *dst, const char __user *src,
431 long count)
432{
433 might_sleep();
434 if (likely(access_ok(VERIFY_READ, src, 1)))
435 return __strncpy_from_user(dst, src, count);
436 return -EFAULT;
437}
438
439/*
440 * Return the size of a string (including the ending 0)
441 *
442 * Return 0 for error
443 */
444extern int __strnlen_user(const char __user *str, long len, unsigned long top);
445
446/*
447 * Returns the length of the string at str (including the null byte),
448 * or 0 if we hit a page we can't access,
449 * or something > len if we didn't find a null byte.
450 *
451 * The `top' parameter to __strnlen_user is to make sure that
452 * we can never overflow from the user area into kernel space.
453 */
454static inline int strnlen_user(const char __user *str, long len)
455{
456 unsigned long top = current->thread.fs.seg;
457
458 if ((unsigned long)str > top)
459 return 0;
460 return __strnlen_user(str, len, top);
461}
462
463#define strlen_user(str) strnlen_user((str), 0x7ffffffe)
464
465#endif /* __ASSEMBLY__ */
466#endif /* __KERNEL__ */
467
468#endif /* _ARCH_POWERPC_UACCESS_H */
diff --git a/include/asm-powerpc/ucontext.h b/include/asm-powerpc/ucontext.h
new file mode 100644
index 000000000000..d9a4ddf0cc86
--- /dev/null
+++ b/include/asm-powerpc/ucontext.h
@@ -0,0 +1,40 @@
1#ifndef _ASM_POWERPC_UCONTEXT_H
2#define _ASM_POWERPC_UCONTEXT_H
3
4#ifdef __powerpc64__
5#include <asm/sigcontext.h>
6#else
7#include <asm/elf.h>
8#endif
9#include <asm/signal.h>
10
11#ifndef __powerpc64__
12struct mcontext {
13 elf_gregset_t mc_gregs;
14 elf_fpregset_t mc_fregs;
15 unsigned long mc_pad[2];
16 elf_vrregset_t mc_vregs __attribute__((__aligned__(16)));
17};
18#endif
19
20struct ucontext {
21 unsigned long uc_flags;
22 struct ucontext __user *uc_link;
23 stack_t uc_stack;
24#ifndef __powerpc64__
25 int uc_pad[7];
26 struct mcontext __user *uc_regs;/* points to uc_mcontext field */
27#endif
28 sigset_t uc_sigmask;
29 /* glibc has 1024-bit signal masks, ours are 64-bit */
30#ifdef __powerpc64__
31 sigset_t __unused[15]; /* Allow for uc_sigmask growth */
32 struct sigcontext uc_mcontext; /* last for extensibility */
33#else
34 int uc_maskext[30];
35 int uc_pad2[3];
36 struct mcontext uc_mcontext;
37#endif
38};
39
40#endif /* _ASM_POWERPC_UCONTEXT_H */
diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h
deleted file mode 100644
index e30f536fd830..000000000000
--- a/include/asm-ppc/bitops.h
+++ /dev/null
@@ -1,460 +0,0 @@
1/*
2 * bitops.h: Bit string operations on the ppc
3 */
4
5#ifdef __KERNEL__
6#ifndef _PPC_BITOPS_H
7#define _PPC_BITOPS_H
8
9#include <linux/config.h>
10#include <linux/compiler.h>
11#include <asm/byteorder.h>
12#include <asm/atomic.h>
13
14/*
15 * The test_and_*_bit operations are taken to imply a memory barrier
16 * on SMP systems.
17 */
18#ifdef CONFIG_SMP
19#define SMP_WMB "eieio\n"
20#define SMP_MB "\nsync"
21#else
22#define SMP_WMB
23#define SMP_MB
24#endif /* CONFIG_SMP */
25
26static __inline__ void set_bit(int nr, volatile unsigned long * addr)
27{
28 unsigned long old;
29 unsigned long mask = 1 << (nr & 0x1f);
30 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
31
32 __asm__ __volatile__("\n\
331: lwarx %0,0,%3 \n\
34 or %0,%0,%2 \n"
35 PPC405_ERR77(0,%3)
36" stwcx. %0,0,%3 \n\
37 bne- 1b"
38 : "=&r" (old), "=m" (*p)
39 : "r" (mask), "r" (p), "m" (*p)
40 : "cc" );
41}
42
43/*
44 * non-atomic version
45 */
46static __inline__ void __set_bit(int nr, volatile unsigned long *addr)
47{
48 unsigned long mask = 1 << (nr & 0x1f);
49 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
50
51 *p |= mask;
52}
53
54/*
55 * clear_bit doesn't imply a memory barrier
56 */
57#define smp_mb__before_clear_bit() smp_mb()
58#define smp_mb__after_clear_bit() smp_mb()
59
60static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
61{
62 unsigned long old;
63 unsigned long mask = 1 << (nr & 0x1f);
64 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
65
66 __asm__ __volatile__("\n\
671: lwarx %0,0,%3 \n\
68 andc %0,%0,%2 \n"
69 PPC405_ERR77(0,%3)
70" stwcx. %0,0,%3 \n\
71 bne- 1b"
72 : "=&r" (old), "=m" (*p)
73 : "r" (mask), "r" (p), "m" (*p)
74 : "cc");
75}
76
77/*
78 * non-atomic version
79 */
80static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
81{
82 unsigned long mask = 1 << (nr & 0x1f);
83 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
84
85 *p &= ~mask;
86}
87
88static __inline__ void change_bit(int nr, volatile unsigned long *addr)
89{
90 unsigned long old;
91 unsigned long mask = 1 << (nr & 0x1f);
92 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
93
94 __asm__ __volatile__("\n\
951: lwarx %0,0,%3 \n\
96 xor %0,%0,%2 \n"
97 PPC405_ERR77(0,%3)
98" stwcx. %0,0,%3 \n\
99 bne- 1b"
100 : "=&r" (old), "=m" (*p)
101 : "r" (mask), "r" (p), "m" (*p)
102 : "cc");
103}
104
105/*
106 * non-atomic version
107 */
108static __inline__ void __change_bit(int nr, volatile unsigned long *addr)
109{
110 unsigned long mask = 1 << (nr & 0x1f);
111 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
112
113 *p ^= mask;
114}
115
116/*
117 * test_and_*_bit do imply a memory barrier (?)
118 */
119static __inline__ int test_and_set_bit(int nr, volatile unsigned long *addr)
120{
121 unsigned int old, t;
122 unsigned int mask = 1 << (nr & 0x1f);
123 volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
124
125 __asm__ __volatile__(SMP_WMB "\n\
1261: lwarx %0,0,%4 \n\
127 or %1,%0,%3 \n"
128 PPC405_ERR77(0,%4)
129" stwcx. %1,0,%4 \n\
130 bne 1b"
131 SMP_MB
132 : "=&r" (old), "=&r" (t), "=m" (*p)
133 : "r" (mask), "r" (p), "m" (*p)
134 : "cc", "memory");
135
136 return (old & mask) != 0;
137}
138
139/*
140 * non-atomic version
141 */
142static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr)
143{
144 unsigned long mask = 1 << (nr & 0x1f);
145 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
146 unsigned long old = *p;
147
148 *p = old | mask;
149 return (old & mask) != 0;
150}
151
152static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr)
153{
154 unsigned int old, t;
155 unsigned int mask = 1 << (nr & 0x1f);
156 volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
157
158 __asm__ __volatile__(SMP_WMB "\n\
1591: lwarx %0,0,%4 \n\
160 andc %1,%0,%3 \n"
161 PPC405_ERR77(0,%4)
162" stwcx. %1,0,%4 \n\
163 bne 1b"
164 SMP_MB
165 : "=&r" (old), "=&r" (t), "=m" (*p)
166 : "r" (mask), "r" (p), "m" (*p)
167 : "cc", "memory");
168
169 return (old & mask) != 0;
170}
171
172/*
173 * non-atomic version
174 */
175static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr)
176{
177 unsigned long mask = 1 << (nr & 0x1f);
178 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
179 unsigned long old = *p;
180
181 *p = old & ~mask;
182 return (old & mask) != 0;
183}
184
185static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr)
186{
187 unsigned int old, t;
188 unsigned int mask = 1 << (nr & 0x1f);
189 volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
190
191 __asm__ __volatile__(SMP_WMB "\n\
1921: lwarx %0,0,%4 \n\
193 xor %1,%0,%3 \n"
194 PPC405_ERR77(0,%4)
195" stwcx. %1,0,%4 \n\
196 bne 1b"
197 SMP_MB
198 : "=&r" (old), "=&r" (t), "=m" (*p)
199 : "r" (mask), "r" (p), "m" (*p)
200 : "cc", "memory");
201
202 return (old & mask) != 0;
203}
204
205/*
206 * non-atomic version
207 */
208static __inline__ int __test_and_change_bit(int nr, volatile unsigned long *addr)
209{
210 unsigned long mask = 1 << (nr & 0x1f);
211 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
212 unsigned long old = *p;
213
214 *p = old ^ mask;
215 return (old & mask) != 0;
216}
217
218static __inline__ int test_bit(int nr, __const__ volatile unsigned long *addr)
219{
220 return ((addr[nr >> 5] >> (nr & 0x1f)) & 1) != 0;
221}
222
223/* Return the bit position of the most significant 1 bit in a word */
224static __inline__ int __ilog2(unsigned long x)
225{
226 int lz;
227
228 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
229 return 31 - lz;
230}
231
232static __inline__ int ffz(unsigned long x)
233{
234 if ((x = ~x) == 0)
235 return 32;
236 return __ilog2(x & -x);
237}
238
239static inline int __ffs(unsigned long x)
240{
241 return __ilog2(x & -x);
242}
243
244/*
245 * ffs: find first bit set. This is defined the same way as
246 * the libc and compiler builtin ffs routines, therefore
247 * differs in spirit from the above ffz (man ffs).
248 */
249static __inline__ int ffs(int x)
250{
251 return __ilog2(x & -x) + 1;
252}
253
254/*
255 * fls: find last (most-significant) bit set.
256 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
257 */
258static __inline__ int fls(unsigned int x)
259{
260 int lz;
261
262 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
263 return 32 - lz;
264}
265
266/*
267 * hweightN: returns the hamming weight (i.e. the number
268 * of bits set) of a N-bit word
269 */
270
271#define hweight32(x) generic_hweight32(x)
272#define hweight16(x) generic_hweight16(x)
273#define hweight8(x) generic_hweight8(x)
274
275/*
276 * Find the first bit set in a 140-bit bitmap.
277 * The first 100 bits are unlikely to be set.
278 */
279static inline int sched_find_first_bit(const unsigned long *b)
280{
281 if (unlikely(b[0]))
282 return __ffs(b[0]);
283 if (unlikely(b[1]))
284 return __ffs(b[1]) + 32;
285 if (unlikely(b[2]))
286 return __ffs(b[2]) + 64;
287 if (b[3])
288 return __ffs(b[3]) + 96;
289 return __ffs(b[4]) + 128;
290}
291
292/**
293 * find_next_bit - find the next set bit in a memory region
294 * @addr: The address to base the search on
295 * @offset: The bitnumber to start searching at
296 * @size: The maximum size to search
297 */
298static __inline__ unsigned long find_next_bit(const unsigned long *addr,
299 unsigned long size, unsigned long offset)
300{
301 unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
302 unsigned int result = offset & ~31UL;
303 unsigned int tmp;
304
305 if (offset >= size)
306 return size;
307 size -= result;
308 offset &= 31UL;
309 if (offset) {
310 tmp = *p++;
311 tmp &= ~0UL << offset;
312 if (size < 32)
313 goto found_first;
314 if (tmp)
315 goto found_middle;
316 size -= 32;
317 result += 32;
318 }
319 while (size >= 32) {
320 if ((tmp = *p++) != 0)
321 goto found_middle;
322 result += 32;
323 size -= 32;
324 }
325 if (!size)
326 return result;
327 tmp = *p;
328
329found_first:
330 tmp &= ~0UL >> (32 - size);
331 if (tmp == 0UL) /* Are any bits set? */
332 return result + size; /* Nope. */
333found_middle:
334 return result + __ffs(tmp);
335}
336
337/**
338 * find_first_bit - find the first set bit in a memory region
339 * @addr: The address to start the search at
340 * @size: The maximum size to search
341 *
342 * Returns the bit-number of the first set bit, not the number of the byte
343 * containing a bit.
344 */
345#define find_first_bit(addr, size) \
346 find_next_bit((addr), (size), 0)
347
348/*
349 * This implementation of find_{first,next}_zero_bit was stolen from
350 * Linus' asm-alpha/bitops.h.
351 */
352#define find_first_zero_bit(addr, size) \
353 find_next_zero_bit((addr), (size), 0)
354
355static __inline__ unsigned long find_next_zero_bit(const unsigned long *addr,
356 unsigned long size, unsigned long offset)
357{
358 unsigned int * p = ((unsigned int *) addr) + (offset >> 5);
359 unsigned int result = offset & ~31UL;
360 unsigned int tmp;
361
362 if (offset >= size)
363 return size;
364 size -= result;
365 offset &= 31UL;
366 if (offset) {
367 tmp = *p++;
368 tmp |= ~0UL >> (32-offset);
369 if (size < 32)
370 goto found_first;
371 if (tmp != ~0U)
372 goto found_middle;
373 size -= 32;
374 result += 32;
375 }
376 while (size >= 32) {
377 if ((tmp = *p++) != ~0U)
378 goto found_middle;
379 result += 32;
380 size -= 32;
381 }
382 if (!size)
383 return result;
384 tmp = *p;
385found_first:
386 tmp |= ~0UL << size;
387 if (tmp == ~0UL) /* Are any bits zero? */
388 return result + size; /* Nope. */
389found_middle:
390 return result + ffz(tmp);
391}
392
393
394#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr))
395#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr))
396#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr))
397#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr))
398
399static __inline__ int ext2_test_bit(int nr, __const__ void * addr)
400{
401 __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
402
403 return (ADDR[nr >> 3] >> (nr & 7)) & 1;
404}
405
406/*
407 * This implementation of ext2_find_{first,next}_zero_bit was stolen from
408 * Linus' asm-alpha/bitops.h and modified for a big-endian machine.
409 */
410
411#define ext2_find_first_zero_bit(addr, size) \
412 ext2_find_next_zero_bit((addr), (size), 0)
413
414static __inline__ unsigned long ext2_find_next_zero_bit(const void *addr,
415 unsigned long size, unsigned long offset)
416{
417 unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
418 unsigned int result = offset & ~31UL;
419 unsigned int tmp;
420
421 if (offset >= size)
422 return size;
423 size -= result;
424 offset &= 31UL;
425 if (offset) {
426 tmp = cpu_to_le32p(p++);
427 tmp |= ~0UL >> (32-offset);
428 if (size < 32)
429 goto found_first;
430 if (tmp != ~0U)
431 goto found_middle;
432 size -= 32;
433 result += 32;
434 }
435 while (size >= 32) {
436 if ((tmp = cpu_to_le32p(p++)) != ~0U)
437 goto found_middle;
438 result += 32;
439 size -= 32;
440 }
441 if (!size)
442 return result;
443 tmp = cpu_to_le32p(p);
444found_first:
445 tmp |= ~0U << size;
446 if (tmp == ~0UL) /* Are any bits zero? */
447 return result + size; /* Nope. */
448found_middle:
449 return result + ffz(tmp);
450}
451
452/* Bitmap functions for the minix filesystem. */
453#define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr)
454#define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr))
455#define minix_test_and_clear_bit(nr,addr) ext2_clear_bit(nr,addr)
456#define minix_test_bit(nr,addr) ext2_test_bit(nr,addr)
457#define minix_find_first_zero_bit(addr,size) ext2_find_first_zero_bit(addr,size)
458
459#endif /* _PPC_BITOPS_H */
460#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h
index 5bbb8e2c1c6d..973e60908234 100644
--- a/include/asm-ppc/commproc.h
+++ b/include/asm-ppc/commproc.h
@@ -83,6 +83,8 @@ extern uint m8xx_cpm_hostalloc(uint size);
83extern int m8xx_cpm_hostfree(uint start); 83extern int m8xx_cpm_hostfree(uint start);
84extern void m8xx_cpm_hostdump(void); 84extern void m8xx_cpm_hostdump(void);
85 85
86extern void cpm_load_patch(volatile immap_t *immr);
87
86/* Buffer descriptors used by many of the CPM protocols. 88/* Buffer descriptors used by many of the CPM protocols.
87*/ 89*/
88typedef struct cpm_buf_desc { 90typedef struct cpm_buf_desc {
diff --git a/include/asm-ppc/futex.h b/include/asm-ppc/futex.h
deleted file mode 100644
index 9feff4ce1424..000000000000
--- a/include/asm-ppc/futex.h
+++ /dev/null
@@ -1,53 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <asm/errno.h>
8#include <asm/uaccess.h>
9
10static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
12{
13 int op = (encoded_op >> 28) & 7;
14 int cmp = (encoded_op >> 24) & 15;
15 int oparg = (encoded_op << 8) >> 20;
16 int cmparg = (encoded_op << 20) >> 20;
17 int oldval = 0, ret;
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg;
20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
22 return -EFAULT;
23
24 inc_preempt_count();
25
26 switch (op) {
27 case FUTEX_OP_SET:
28 case FUTEX_OP_ADD:
29 case FUTEX_OP_OR:
30 case FUTEX_OP_ANDN:
31 case FUTEX_OP_XOR:
32 default:
33 ret = -ENOSYS;
34 }
35
36 dec_preempt_count();
37
38 if (!ret) {
39 switch (cmp) {
40 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
41 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
42 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
43 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
44 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
45 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
46 default: ret = -ENOSYS;
47 }
48 }
49 return ret;
50}
51
52#endif
53#endif
diff --git a/include/asm-ppc/ipcbuf.h b/include/asm-ppc/ipcbuf.h
deleted file mode 100644
index fab6752c7480..000000000000
--- a/include/asm-ppc/ipcbuf.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __PPC_IPCBUF_H__
2#define __PPC_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for PPC architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 1 32-bit value to fill up for 8-byte alignment
11 * - 2 miscellaneous 64-bit values (so that this structure matches
12 * PPC64 ipc64_perm)
13 */
14
15struct ipc64_perm
16{
17 __kernel_key_t key;
18 __kernel_uid_t uid;
19 __kernel_gid_t gid;
20 __kernel_uid_t cuid;
21 __kernel_gid_t cgid;
22 __kernel_mode_t mode;
23 unsigned long seq;
24 unsigned int __pad2;
25 unsigned long long __unused1;
26 unsigned long long __unused2;
27};
28
29#endif /* __PPC_IPCBUF_H__ */
diff --git a/include/asm-ppc/kexec.h b/include/asm-ppc/kexec.h
deleted file mode 100644
index 6d2aa0aa4642..000000000000
--- a/include/asm-ppc/kexec.h
+++ /dev/null
@@ -1,40 +0,0 @@
1#ifndef _PPC_KEXEC_H
2#define _PPC_KEXEC_H
3
4#ifdef CONFIG_KEXEC
5
6/*
7 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
8 * I.e. Maximum page that is mapped directly into kernel memory,
9 * and kmap is not required.
10 *
11 * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct
12 * calculation for the amount of memory directly mappable into the
13 * kernel memory space.
14 */
15
16/* Maximum physical address we can use pages from */
17#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
18/* Maximum address we can reach in physical address mode */
19#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
20/* Maximum address we can use for the control code buffer */
21#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
22
23#define KEXEC_CONTROL_CODE_SIZE 4096
24
25/* The native architecture */
26#define KEXEC_ARCH KEXEC_ARCH_PPC
27
28#ifndef __ASSEMBLY__
29
30extern void *crash_notes;
31
32struct kimage;
33
34extern void machine_kexec_simple(struct kimage *image);
35
36#endif /* __ASSEMBLY__ */
37
38#endif /* CONFIG_KEXEC */
39
40#endif /* _PPC_KEXEC_H */
diff --git a/include/asm-ppc/mv64x60.h b/include/asm-ppc/mv64x60.h
index ee2f9188cc64..4f2405b83612 100644
--- a/include/asm-ppc/mv64x60.h
+++ b/include/asm-ppc/mv64x60.h
@@ -27,6 +27,8 @@
27#include <asm/pci-bridge.h> 27#include <asm/pci-bridge.h>
28#include <asm/mv64x60_defs.h> 28#include <asm/mv64x60_defs.h>
29 29
30struct platform_device;
31
30extern u8 mv64x60_pci_exclude_bridge; 32extern u8 mv64x60_pci_exclude_bridge;
31 33
32extern spinlock_t mv64x60_lock; 34extern spinlock_t mv64x60_lock;
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 549f44843c5e..bba5305c29ed 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -18,7 +18,7 @@
18#define __ASM_PPC_SYS_H 18#define __ASM_PPC_SYS_H
19 19
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/device.h> 21#include <linux/platform_device.h>
22#include <linux/types.h> 22#include <linux/types.h>
23 23
24#if defined(CONFIG_8260) 24#if defined(CONFIG_8260)
diff --git a/include/asm-ppc/ptrace.h b/include/asm-ppc/ptrace.h
deleted file mode 100644
index c34fb4e37a97..000000000000
--- a/include/asm-ppc/ptrace.h
+++ /dev/null
@@ -1,152 +0,0 @@
1#ifndef _PPC_PTRACE_H
2#define _PPC_PTRACE_H
3
4/*
5 * This struct defines the way the registers are stored on the
6 * kernel stack during a system call or other kernel entry.
7 *
8 * this should only contain volatile regs
9 * since we can keep non-volatile in the thread_struct
10 * should set this up when only volatiles are saved
11 * by intr code.
12 *
13 * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
14 * that the overall structure is a multiple of 16 bytes in length.
15 *
16 * Note that the offsets of the fields in this struct correspond with
17 * the PT_* values below. This simplifies arch/ppc/kernel/ptrace.c.
18 */
19
20#ifndef __ASSEMBLY__
21struct pt_regs {
22 unsigned long gpr[32];
23 unsigned long nip;
24 unsigned long msr;
25 unsigned long orig_gpr3; /* Used for restarting system calls */
26 unsigned long ctr;
27 unsigned long link;
28 unsigned long xer;
29 unsigned long ccr;
30 unsigned long mq; /* 601 only (not used at present) */
31 /* Used on APUS to hold IPL value. */
32 unsigned long trap; /* Reason for being here */
33 /* N.B. for critical exceptions on 4xx, the dar and dsisr
34 fields are overloaded to hold srr0 and srr1. */
35 unsigned long dar; /* Fault registers */
36 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
37 unsigned long result; /* Result of a system call */
38};
39
40#endif /* __ASSEMBLY__ */
41
42#ifdef __KERNEL__
43#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
44
45/* Size of stack frame allocated when calling signal handler. */
46#define __SIGNAL_FRAMESIZE 64
47
48#ifndef __ASSEMBLY__
49#define instruction_pointer(regs) ((regs)->nip)
50#ifdef CONFIG_SMP
51extern unsigned long profile_pc(struct pt_regs *regs);
52#else
53#define profile_pc(regs) instruction_pointer(regs)
54#endif
55
56#define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
57
58#define force_successful_syscall_return() \
59 do { \
60 current_thread_info()->syscall_noerror = 1; \
61 } while(0)
62
63/*
64 * We use the least-significant bit of the trap field to indicate
65 * whether we have saved the full set of registers, or only a
66 * partial set. A 1 there means the partial set.
67 * On 4xx we use the next bit to indicate whether the exception
68 * is a critical exception (1 means it is).
69 */
70#define FULL_REGS(regs) (((regs)->trap & 1) == 0)
71#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0)
72#define TRAP(regs) ((regs)->trap & ~0xF)
73
74#define CHECK_FULL_REGS(regs) \
75do { \
76 if ((regs)->trap & 1) \
77 printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
78} while (0)
79#endif /* __ASSEMBLY__ */
80
81#endif /* __KERNEL__ */
82
83/*
84 * Offsets used by 'ptrace' system call interface.
85 * These can't be changed without breaking binary compatibility
86 * with MkLinux, etc.
87 */
88#define PT_R0 0
89#define PT_R1 1
90#define PT_R2 2
91#define PT_R3 3
92#define PT_R4 4
93#define PT_R5 5
94#define PT_R6 6
95#define PT_R7 7
96#define PT_R8 8
97#define PT_R9 9
98#define PT_R10 10
99#define PT_R11 11
100#define PT_R12 12
101#define PT_R13 13
102#define PT_R14 14
103#define PT_R15 15
104#define PT_R16 16
105#define PT_R17 17
106#define PT_R18 18
107#define PT_R19 19
108#define PT_R20 20
109#define PT_R21 21
110#define PT_R22 22
111#define PT_R23 23
112#define PT_R24 24
113#define PT_R25 25
114#define PT_R26 26
115#define PT_R27 27
116#define PT_R28 28
117#define PT_R29 29
118#define PT_R30 30
119#define PT_R31 31
120
121#define PT_NIP 32
122#define PT_MSR 33
123#ifdef __KERNEL__
124#define PT_ORIG_R3 34
125#endif
126#define PT_CTR 35
127#define PT_LNK 36
128#define PT_XER 37
129#define PT_CCR 38
130#define PT_MQ 39
131
132#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
133#define PT_FPR31 (PT_FPR0 + 2*31)
134#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
135
136/* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go */
137#define PTRACE_GETVRREGS 18
138#define PTRACE_SETVRREGS 19
139
140/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
141 * spefscr, in one go */
142#define PTRACE_GETEVRREGS 20
143#define PTRACE_SETEVRREGS 21
144
145/*
146 * Get or set a debug register. The first 16 are DABR registers and the
147 * second 16 are IABR registers.
148 */
149#define PTRACE_GET_DEBUGREG 25
150#define PTRACE_SET_DEBUGREG 26
151
152#endif
diff --git a/include/asm-ppc/sigcontext.h b/include/asm-ppc/sigcontext.h
deleted file mode 100644
index b7a417e0a921..000000000000
--- a/include/asm-ppc/sigcontext.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _ASM_PPC_SIGCONTEXT_H
2#define _ASM_PPC_SIGCONTEXT_H
3
4#include <asm/ptrace.h>
5#include <linux/compiler.h>
6
7struct sigcontext {
8 unsigned long _unused[4];
9 int signal;
10 unsigned long handler;
11 unsigned long oldmask;
12 struct pt_regs __user *regs;
13};
14
15#endif
diff --git a/include/asm-ppc/stat.h b/include/asm-ppc/stat.h
deleted file mode 100644
index cadb34298496..000000000000
--- a/include/asm-ppc/stat.h
+++ /dev/null
@@ -1,69 +0,0 @@
1#ifndef _PPC_STAT_H
2#define _PPC_STAT_H
3
4#ifdef __KERNEL__
5#include <linux/types.h>
6#endif /* __KERNEL__ */
7
8struct __old_kernel_stat {
9 unsigned short st_dev;
10 unsigned short st_ino;
11 unsigned short st_mode;
12 unsigned short st_nlink;
13 unsigned short st_uid;
14 unsigned short st_gid;
15 unsigned short st_rdev;
16 unsigned long st_size;
17 unsigned long st_atime;
18 unsigned long st_mtime;
19 unsigned long st_ctime;
20};
21
22#define STAT_HAVE_NSEC 1
23
24struct stat {
25 unsigned st_dev;
26 ino_t st_ino;
27 mode_t st_mode;
28 nlink_t st_nlink;
29 uid_t st_uid;
30 gid_t st_gid;
31 unsigned st_rdev;
32 off_t st_size;
33 unsigned long st_blksize;
34 unsigned long st_blocks;
35 unsigned long st_atime;
36 unsigned long st_atime_nsec;
37 unsigned long st_mtime;
38 unsigned long st_mtime_nsec;
39 unsigned long st_ctime;
40 unsigned long st_ctime_nsec;
41 unsigned long __unused4;
42 unsigned long __unused5;
43};
44
45/* This matches struct stat64 in glibc2.1.
46 */
47struct stat64 {
48 unsigned long long st_dev; /* Device. */
49 unsigned long long st_ino; /* File serial number. */
50 unsigned int st_mode; /* File mode. */
51 unsigned int st_nlink; /* Link count. */
52 unsigned int st_uid; /* User ID of the file's owner. */
53 unsigned int st_gid; /* Group ID of the file's group. */
54 unsigned long long st_rdev; /* Device number, if device. */
55 unsigned short int __pad2;
56 long long st_size; /* Size of file, in bytes. */
57 long st_blksize; /* Optimal block size for I/O. */
58
59 long long st_blocks; /* Number 512-byte blocks allocated. */
60 long st_atime; /* Time of last access. */
61 unsigned long st_atime_nsec;
62 long st_mtime; /* Time of last modification. */
63 unsigned long int st_mtime_nsec;
64 long st_ctime; /* Time of last status change. */
65 unsigned long int st_ctime_nsec;
66 unsigned long int __unused4;
67 unsigned long int __unused5;
68};
69#endif
diff --git a/include/asm-ppc/tlbflush.h b/include/asm-ppc/tlbflush.h
deleted file mode 100644
index 9afee4ffc835..000000000000
--- a/include/asm-ppc/tlbflush.h
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * include/asm-ppc/tlbflush.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifdef __KERNEL__
10#ifndef _PPC_TLBFLUSH_H
11#define _PPC_TLBFLUSH_H
12
13#include <linux/config.h>
14#include <linux/mm.h>
15
16extern void _tlbie(unsigned long address);
17extern void _tlbia(void);
18
19#if defined(CONFIG_4xx)
20
21#ifndef CONFIG_44x
22#define __tlbia() asm volatile ("sync; tlbia; isync" : : : "memory")
23#else
24#define __tlbia _tlbia
25#endif
26
27static inline void flush_tlb_mm(struct mm_struct *mm)
28 { __tlbia(); }
29static inline void flush_tlb_page(struct vm_area_struct *vma,
30 unsigned long vmaddr)
31 { _tlbie(vmaddr); }
32static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
33 unsigned long vmaddr)
34 { _tlbie(vmaddr); }
35static inline void flush_tlb_range(struct vm_area_struct *vma,
36 unsigned long start, unsigned long end)
37 { __tlbia(); }
38static inline void flush_tlb_kernel_range(unsigned long start,
39 unsigned long end)
40 { __tlbia(); }
41
42#elif defined(CONFIG_FSL_BOOKE)
43
44/* TODO: determine if flush_tlb_range & flush_tlb_kernel_range
45 * are best implemented as tlbia vs specific tlbie's */
46
47#define __tlbia() _tlbia()
48
49static inline void flush_tlb_mm(struct mm_struct *mm)
50 { __tlbia(); }
51static inline void flush_tlb_page(struct vm_area_struct *vma,
52 unsigned long vmaddr)
53 { _tlbie(vmaddr); }
54static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
55 unsigned long vmaddr)
56 { _tlbie(vmaddr); }
57static inline void flush_tlb_range(struct vm_area_struct *vma,
58 unsigned long start, unsigned long end)
59 { __tlbia(); }
60static inline void flush_tlb_kernel_range(unsigned long start,
61 unsigned long end)
62 { __tlbia(); }
63
64#elif defined(CONFIG_8xx)
65#define __tlbia() asm volatile ("tlbia; sync" : : : "memory")
66
67static inline void flush_tlb_mm(struct mm_struct *mm)
68 { __tlbia(); }
69static inline void flush_tlb_page(struct vm_area_struct *vma,
70 unsigned long vmaddr)
71 { _tlbie(vmaddr); }
72static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
73 unsigned long vmaddr)
74 { _tlbie(vmaddr); }
75static inline void flush_tlb_range(struct vm_area_struct *vma,
76 unsigned long start, unsigned long end)
77 { __tlbia(); }
78static inline void flush_tlb_kernel_range(unsigned long start,
79 unsigned long end)
80 { __tlbia(); }
81
82#else /* 6xx, 7xx, 7xxx cpus */
83struct mm_struct;
84struct vm_area_struct;
85extern void flush_tlb_mm(struct mm_struct *mm);
86extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
87extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
88extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
89 unsigned long end);
90extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
91#endif
92
93/*
94 * This is called in munmap when we have freed up some page-table
95 * pages. We don't need to do anything here, there's nothing special
96 * about our page-table pages. -- paulus
97 */
98static inline void flush_tlb_pgtables(struct mm_struct *mm,
99 unsigned long start, unsigned long end)
100{
101}
102
103/*
104 * This gets called at the end of handling a page fault, when
105 * the kernel has put a new PTE into the page table for the process.
106 * We use it to ensure coherency between the i-cache and d-cache
107 * for the page which has just been mapped in.
108 * On machines which use an MMU hash table, we use this to put a
109 * corresponding HPTE into the hash table ahead of time, instead of
110 * waiting for the inevitable extra hash-table miss exception.
111 */
112extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
113
114#endif /* _PPC_TLBFLUSH_H */
115#endif /*__KERNEL__ */
diff --git a/include/asm-ppc/uaccess.h b/include/asm-ppc/uaccess.h
deleted file mode 100644
index 63f56224da8c..000000000000
--- a/include/asm-ppc/uaccess.h
+++ /dev/null
@@ -1,393 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _PPC_UACCESS_H
3#define _PPC_UACCESS_H
4
5#ifndef __ASSEMBLY__
6#include <linux/sched.h>
7#include <linux/errno.h>
8#include <asm/processor.h>
9
10#define VERIFY_READ 0
11#define VERIFY_WRITE 1
12
13/*
14 * The fs value determines whether argument validity checking should be
15 * performed or not. If get_fs() == USER_DS, checking is performed, with
16 * get_fs() == KERNEL_DS, checking is bypassed.
17 *
18 * For historical reasons, these macros are grossly misnamed.
19 *
20 * The fs/ds values are now the highest legal address in the "segment".
21 * This simplifies the checking in the routines below.
22 */
23
24#define KERNEL_DS ((mm_segment_t) { ~0UL })
25#define USER_DS ((mm_segment_t) { TASK_SIZE - 1 })
26
27#define get_ds() (KERNEL_DS)
28#define get_fs() (current->thread.fs)
29#define set_fs(val) (current->thread.fs = (val))
30
31#define segment_eq(a,b) ((a).seg == (b).seg)
32
33#define __access_ok(addr,size) \
34 ((addr) <= current->thread.fs.seg \
35 && ((size) == 0 || (size) - 1 <= current->thread.fs.seg - (addr)))
36
37#define access_ok(type, addr, size) \
38 (__chk_user_ptr(addr),__access_ok((unsigned long)(addr),(size)))
39
40/*
41 * The exception table consists of pairs of addresses: the first is the
42 * address of an instruction that is allowed to fault, and the second is
43 * the address at which the program should continue. No registers are
44 * modified, so it is entirely up to the continuation code to figure out
45 * what to do.
46 *
47 * All the routines below use bits of fixup code that are out of line
48 * with the main instruction path. This means when everything is well,
49 * we don't even have to jump over them. Further, they do not intrude
50 * on our cache or tlb entries.
51 */
52
53struct exception_table_entry
54{
55 unsigned long insn, fixup;
56};
57
58/*
59 * These are the main single-value transfer routines. They automatically
60 * use the right size if we just have the right pointer type.
61 *
62 * This gets kind of ugly. We want to return _two_ values in "get_user()"
63 * and yet we don't want to do any pointers, because that is too much
64 * of a performance impact. Thus we have a few rather ugly macros here,
65 * and hide all the ugliness from the user.
66 *
67 * The "__xxx" versions of the user access functions are versions that
68 * do not verify the address space, that must have been done previously
69 * with a separate "access_ok()" call (this is used when we do multiple
70 * accesses to the same area of user memory).
71 *
72 * As we use the same address space for kernel and user data on the
73 * PowerPC, we can just do these as direct assignments. (Of course, the
74 * exception handling means that it's no longer "just"...)
75 *
76 * The "user64" versions of the user access functions are versions that
77 * allow access of 64-bit data. The "get_user" functions do not
78 * properly handle 64-bit data because the value gets down cast to a long.
79 * The "put_user" functions already handle 64-bit data properly but we add
80 * "user64" versions for completeness
81 */
82#define get_user(x,ptr) \
83 __get_user_check((x),(ptr),sizeof(*(ptr)))
84#define get_user64(x,ptr) \
85 __get_user64_check((x),(ptr),sizeof(*(ptr)))
86#define put_user(x,ptr) \
87 __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
88#define put_user64(x,ptr) put_user(x,ptr)
89
90#define __get_user(x,ptr) \
91 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
92#define __get_user64(x,ptr) \
93 __get_user64_nocheck((x),(ptr),sizeof(*(ptr)))
94#define __put_user(x,ptr) \
95 __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
96#define __put_user64(x,ptr) __put_user(x,ptr)
97
98extern long __put_user_bad(void);
99
100#define __put_user_nocheck(x,ptr,size) \
101({ \
102 long __pu_err; \
103 __chk_user_ptr(ptr); \
104 __put_user_size((x),(ptr),(size),__pu_err); \
105 __pu_err; \
106})
107
108#define __put_user_check(x,ptr,size) \
109({ \
110 long __pu_err = -EFAULT; \
111 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
112 if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
113 __put_user_size((x),__pu_addr,(size),__pu_err); \
114 __pu_err; \
115})
116
117#define __put_user_size(x,ptr,size,retval) \
118do { \
119 retval = 0; \
120 switch (size) { \
121 case 1: \
122 __put_user_asm(x, ptr, retval, "stb"); \
123 break; \
124 case 2: \
125 __put_user_asm(x, ptr, retval, "sth"); \
126 break; \
127 case 4: \
128 __put_user_asm(x, ptr, retval, "stw"); \
129 break; \
130 case 8: \
131 __put_user_asm2(x, ptr, retval); \
132 break; \
133 default: \
134 __put_user_bad(); \
135 } \
136} while (0)
137
138/*
139 * We don't tell gcc that we are accessing memory, but this is OK
140 * because we do not write to any memory gcc knows about, so there
141 * are no aliasing issues.
142 */
143#define __put_user_asm(x, addr, err, op) \
144 __asm__ __volatile__( \
145 "1: "op" %1,0(%2)\n" \
146 "2:\n" \
147 ".section .fixup,\"ax\"\n" \
148 "3: li %0,%3\n" \
149 " b 2b\n" \
150 ".previous\n" \
151 ".section __ex_table,\"a\"\n" \
152 " .align 2\n" \
153 " .long 1b,3b\n" \
154 ".previous" \
155 : "=r" (err) \
156 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
157
158#define __put_user_asm2(x, addr, err) \
159 __asm__ __volatile__( \
160 "1: stw %1,0(%2)\n" \
161 "2: stw %1+1,4(%2)\n" \
162 "3:\n" \
163 ".section .fixup,\"ax\"\n" \
164 "4: li %0,%3\n" \
165 " b 3b\n" \
166 ".previous\n" \
167 ".section __ex_table,\"a\"\n" \
168 " .align 2\n" \
169 " .long 1b,4b\n" \
170 " .long 2b,4b\n" \
171 ".previous" \
172 : "=r" (err) \
173 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err))
174
175#define __get_user_nocheck(x, ptr, size) \
176({ \
177 long __gu_err; \
178 unsigned long __gu_val; \
179 __chk_user_ptr(ptr); \
180 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
181 (x) = (__typeof__(*(ptr)))__gu_val; \
182 __gu_err; \
183})
184
185#define __get_user64_nocheck(x, ptr, size) \
186({ \
187 long __gu_err; \
188 long long __gu_val; \
189 __chk_user_ptr(ptr); \
190 __get_user_size64(__gu_val, (ptr), (size), __gu_err); \
191 (x) = (__typeof__(*(ptr)))__gu_val; \
192 __gu_err; \
193})
194
195#define __get_user_check(x, ptr, size) \
196({ \
197 long __gu_err = -EFAULT; \
198 unsigned long __gu_val = 0; \
199 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
200 if (access_ok(VERIFY_READ, __gu_addr, (size))) \
201 __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
202 (x) = (__typeof__(*(ptr)))__gu_val; \
203 __gu_err; \
204})
205
206#define __get_user64_check(x, ptr, size) \
207({ \
208 long __gu_err = -EFAULT; \
209 long long __gu_val = 0; \
210 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
211 if (access_ok(VERIFY_READ, __gu_addr, (size))) \
212 __get_user_size64(__gu_val, __gu_addr, (size), __gu_err); \
213 (x) = (__typeof__(*(ptr)))__gu_val; \
214 __gu_err; \
215})
216
217extern long __get_user_bad(void);
218
219#define __get_user_size(x, ptr, size, retval) \
220do { \
221 retval = 0; \
222 switch (size) { \
223 case 1: \
224 __get_user_asm(x, ptr, retval, "lbz"); \
225 break; \
226 case 2: \
227 __get_user_asm(x, ptr, retval, "lhz"); \
228 break; \
229 case 4: \
230 __get_user_asm(x, ptr, retval, "lwz"); \
231 break; \
232 default: \
233 x = __get_user_bad(); \
234 } \
235} while (0)
236
237#define __get_user_size64(x, ptr, size, retval) \
238do { \
239 retval = 0; \
240 switch (size) { \
241 case 1: \
242 __get_user_asm(x, ptr, retval, "lbz"); \
243 break; \
244 case 2: \
245 __get_user_asm(x, ptr, retval, "lhz"); \
246 break; \
247 case 4: \
248 __get_user_asm(x, ptr, retval, "lwz"); \
249 break; \
250 case 8: \
251 __get_user_asm2(x, ptr, retval); \
252 break; \
253 default: \
254 x = __get_user_bad(); \
255 } \
256} while (0)
257
258#define __get_user_asm(x, addr, err, op) \
259 __asm__ __volatile__( \
260 "1: "op" %1,0(%2)\n" \
261 "2:\n" \
262 ".section .fixup,\"ax\"\n" \
263 "3: li %0,%3\n" \
264 " li %1,0\n" \
265 " b 2b\n" \
266 ".previous\n" \
267 ".section __ex_table,\"a\"\n" \
268 " .align 2\n" \
269 " .long 1b,3b\n" \
270 ".previous" \
271 : "=r"(err), "=r"(x) \
272 : "b"(addr), "i"(-EFAULT), "0"(err))
273
274#define __get_user_asm2(x, addr, err) \
275 __asm__ __volatile__( \
276 "1: lwz %1,0(%2)\n" \
277 "2: lwz %1+1,4(%2)\n" \
278 "3:\n" \
279 ".section .fixup,\"ax\"\n" \
280 "4: li %0,%3\n" \
281 " li %1,0\n" \
282 " li %1+1,0\n" \
283 " b 3b\n" \
284 ".previous\n" \
285 ".section __ex_table,\"a\"\n" \
286 " .align 2\n" \
287 " .long 1b,4b\n" \
288 " .long 2b,4b\n" \
289 ".previous" \
290 : "=r"(err), "=&r"(x) \
291 : "b"(addr), "i"(-EFAULT), "0"(err))
292
293/* more complex routines */
294
295extern int __copy_tofrom_user(void __user *to, const void __user *from,
296 unsigned long size);
297
298extern inline unsigned long
299copy_from_user(void *to, const void __user *from, unsigned long n)
300{
301 unsigned long over;
302
303 if (access_ok(VERIFY_READ, from, n))
304 return __copy_tofrom_user((__force void __user *)to, from, n);
305 if ((unsigned long)from < TASK_SIZE) {
306 over = (unsigned long)from + n - TASK_SIZE;
307 return __copy_tofrom_user((__force void __user *)to, from, n - over) + over;
308 }
309 return n;
310}
311
312extern inline unsigned long
313copy_to_user(void __user *to, const void *from, unsigned long n)
314{
315 unsigned long over;
316
317 if (access_ok(VERIFY_WRITE, to, n))
318 return __copy_tofrom_user(to, (__force void __user *) from, n);
319 if ((unsigned long)to < TASK_SIZE) {
320 over = (unsigned long)to + n - TASK_SIZE;
321 return __copy_tofrom_user(to, (__force void __user *) from, n - over) + over;
322 }
323 return n;
324}
325
326static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long size)
327{
328 return __copy_tofrom_user((__force void __user *)to, from, size);
329}
330
331static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long size)
332{
333 return __copy_tofrom_user(to, (__force void __user *)from, size);
334}
335
336#define __copy_to_user_inatomic __copy_to_user
337#define __copy_from_user_inatomic __copy_from_user
338
339extern unsigned long __clear_user(void __user *addr, unsigned long size);
340
341extern inline unsigned long
342clear_user(void __user *addr, unsigned long size)
343{
344 if (access_ok(VERIFY_WRITE, addr, size))
345 return __clear_user(addr, size);
346 if ((unsigned long)addr < TASK_SIZE) {
347 unsigned long over = (unsigned long)addr + size - TASK_SIZE;
348 return __clear_user(addr, size - over) + over;
349 }
350 return size;
351}
352
353extern int __strncpy_from_user(char *dst, const char __user *src, long count);
354
355extern inline long
356strncpy_from_user(char *dst, const char __user *src, long count)
357{
358 if (access_ok(VERIFY_READ, src, 1))
359 return __strncpy_from_user(dst, src, count);
360 return -EFAULT;
361}
362
363/*
364 * Return the size of a string (including the ending 0)
365 *
366 * Return 0 for error
367 */
368
369extern int __strnlen_user(const char __user *str, long len, unsigned long top);
370
371/*
372 * Returns the length of the string at str (including the null byte),
373 * or 0 if we hit a page we can't access,
374 * or something > len if we didn't find a null byte.
375 *
376 * The `top' parameter to __strnlen_user is to make sure that
377 * we can never overflow from the user area into kernel space.
378 */
379extern __inline__ int strnlen_user(const char __user *str, long len)
380{
381 unsigned long top = current->thread.fs.seg;
382
383 if ((unsigned long)str > top)
384 return 0;
385 return __strnlen_user(str, len, top);
386}
387
388#define strlen_user(str) strnlen_user((str), 0x7ffffffe)
389
390#endif /* __ASSEMBLY__ */
391
392#endif /* _PPC_UACCESS_H */
393#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ucontext.h b/include/asm-ppc/ucontext.h
deleted file mode 100644
index 664bc984d51f..000000000000
--- a/include/asm-ppc/ucontext.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef _ASMPPC_UCONTEXT_H
2#define _ASMPPC_UCONTEXT_H
3
4#include <asm/elf.h>
5#include <asm/signal.h>
6
7struct mcontext {
8 elf_gregset_t mc_gregs;
9 elf_fpregset_t mc_fregs;
10 unsigned long mc_pad[2];
11 elf_vrregset_t mc_vregs __attribute__((__aligned__(16)));
12};
13
14struct ucontext {
15 unsigned long uc_flags;
16 struct ucontext __user *uc_link;
17 stack_t uc_stack;
18 int uc_pad[7];
19 struct mcontext __user *uc_regs;/* points to uc_mcontext field */
20 sigset_t uc_sigmask;
21 /* glibc has 1024-bit signal masks, ours are 64-bit */
22 int uc_maskext[30];
23 int uc_pad2[3];
24 struct mcontext uc_mcontext;
25};
26
27#endif /* !_ASMPPC_UCONTEXT_H */
diff --git a/include/asm-ppc64/bitops.h b/include/asm-ppc64/bitops.h
deleted file mode 100644
index dbfa42ef4a99..000000000000
--- a/include/asm-ppc64/bitops.h
+++ /dev/null
@@ -1,360 +0,0 @@
1/*
2 * PowerPC64 atomic bit operations.
3 * Dave Engebretsen, Todd Inglett, Don Reed, Pat McCarthy, Peter Bergner,
4 * Anton Blanchard
5 *
6 * Originally taken from the 32b PPC code. Modified to use 64b values for
7 * the various counters & memory references.
8 *
9 * Bitops are odd when viewed on big-endian systems. They were designed
10 * on little endian so the size of the bitset doesn't matter (low order bytes
11 * come first) as long as the bit in question is valid.
12 *
13 * Bits are "tested" often using the C expression (val & (1<<nr)) so we do
14 * our best to stay compatible with that. The assumption is that val will
15 * be unsigned long for such tests. As such, we assume the bits are stored
16 * as an array of unsigned long (the usual case is a single unsigned long,
17 * of course). Here's an example bitset with bit numbering:
18 *
19 * |63..........0|127........64|195.......128|255.......196|
20 *
21 * This leads to a problem. If an int, short or char is passed as a bitset
22 * it will be a bad memory reference since we want to store in chunks
23 * of unsigned long (64 bits here) size.
24 *
25 * There are a few little-endian macros used mostly for filesystem bitmaps,
26 * these work on similar bit arrays layouts, but byte-oriented:
27 *
28 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
29 *
30 * The main difference is that bit 3-5 in the bit number field needs to be
31 * reversed compared to the big-endian bit fields. This can be achieved
32 * by XOR with 0b111000 (0x38).
33 *
34 * This program is free software; you can redistribute it and/or
35 * modify it under the terms of the GNU General Public License
36 * as published by the Free Software Foundation; either version
37 * 2 of the License, or (at your option) any later version.
38 */
39
40#ifndef _PPC64_BITOPS_H
41#define _PPC64_BITOPS_H
42
43#ifdef __KERNEL__
44
45#include <asm/synch.h>
46
47/*
48 * clear_bit doesn't imply a memory barrier
49 */
50#define smp_mb__before_clear_bit() smp_mb()
51#define smp_mb__after_clear_bit() smp_mb()
52
53static __inline__ int test_bit(unsigned long nr, __const__ volatile unsigned long *addr)
54{
55 return (1UL & (addr[nr >> 6] >> (nr & 63)));
56}
57
58static __inline__ void set_bit(unsigned long nr, volatile unsigned long *addr)
59{
60 unsigned long old;
61 unsigned long mask = 1UL << (nr & 0x3f);
62 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
63
64 __asm__ __volatile__(
65"1: ldarx %0,0,%3 # set_bit\n\
66 or %0,%0,%2\n\
67 stdcx. %0,0,%3\n\
68 bne- 1b"
69 : "=&r" (old), "=m" (*p)
70 : "r" (mask), "r" (p), "m" (*p)
71 : "cc");
72}
73
74static __inline__ void clear_bit(unsigned long nr, volatile unsigned long *addr)
75{
76 unsigned long old;
77 unsigned long mask = 1UL << (nr & 0x3f);
78 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
79
80 __asm__ __volatile__(
81"1: ldarx %0,0,%3 # clear_bit\n\
82 andc %0,%0,%2\n\
83 stdcx. %0,0,%3\n\
84 bne- 1b"
85 : "=&r" (old), "=m" (*p)
86 : "r" (mask), "r" (p), "m" (*p)
87 : "cc");
88}
89
90static __inline__ void change_bit(unsigned long nr, volatile unsigned long *addr)
91{
92 unsigned long old;
93 unsigned long mask = 1UL << (nr & 0x3f);
94 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
95
96 __asm__ __volatile__(
97"1: ldarx %0,0,%3 # change_bit\n\
98 xor %0,%0,%2\n\
99 stdcx. %0,0,%3\n\
100 bne- 1b"
101 : "=&r" (old), "=m" (*p)
102 : "r" (mask), "r" (p), "m" (*p)
103 : "cc");
104}
105
106static __inline__ int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
107{
108 unsigned long old, t;
109 unsigned long mask = 1UL << (nr & 0x3f);
110 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
111
112 __asm__ __volatile__(
113 EIEIO_ON_SMP
114"1: ldarx %0,0,%3 # test_and_set_bit\n\
115 or %1,%0,%2 \n\
116 stdcx. %1,0,%3 \n\
117 bne- 1b"
118 ISYNC_ON_SMP
119 : "=&r" (old), "=&r" (t)
120 : "r" (mask), "r" (p)
121 : "cc", "memory");
122
123 return (old & mask) != 0;
124}
125
126static __inline__ int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
127{
128 unsigned long old, t;
129 unsigned long mask = 1UL << (nr & 0x3f);
130 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
131
132 __asm__ __volatile__(
133 EIEIO_ON_SMP
134"1: ldarx %0,0,%3 # test_and_clear_bit\n\
135 andc %1,%0,%2\n\
136 stdcx. %1,0,%3\n\
137 bne- 1b"
138 ISYNC_ON_SMP
139 : "=&r" (old), "=&r" (t)
140 : "r" (mask), "r" (p)
141 : "cc", "memory");
142
143 return (old & mask) != 0;
144}
145
146static __inline__ int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
147{
148 unsigned long old, t;
149 unsigned long mask = 1UL << (nr & 0x3f);
150 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
151
152 __asm__ __volatile__(
153 EIEIO_ON_SMP
154"1: ldarx %0,0,%3 # test_and_change_bit\n\
155 xor %1,%0,%2\n\
156 stdcx. %1,0,%3\n\
157 bne- 1b"
158 ISYNC_ON_SMP
159 : "=&r" (old), "=&r" (t)
160 : "r" (mask), "r" (p)
161 : "cc", "memory");
162
163 return (old & mask) != 0;
164}
165
166static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
167{
168 unsigned long old;
169
170 __asm__ __volatile__(
171"1: ldarx %0,0,%3 # set_bit\n\
172 or %0,%0,%2\n\
173 stdcx. %0,0,%3\n\
174 bne- 1b"
175 : "=&r" (old), "=m" (*addr)
176 : "r" (mask), "r" (addr), "m" (*addr)
177 : "cc");
178}
179
180/*
181 * non-atomic versions
182 */
183static __inline__ void __set_bit(unsigned long nr, volatile unsigned long *addr)
184{
185 unsigned long mask = 1UL << (nr & 0x3f);
186 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
187
188 *p |= mask;
189}
190
191static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long *addr)
192{
193 unsigned long mask = 1UL << (nr & 0x3f);
194 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
195
196 *p &= ~mask;
197}
198
199static __inline__ void __change_bit(unsigned long nr, volatile unsigned long *addr)
200{
201 unsigned long mask = 1UL << (nr & 0x3f);
202 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
203
204 *p ^= mask;
205}
206
207static __inline__ int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
208{
209 unsigned long mask = 1UL << (nr & 0x3f);
210 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
211 unsigned long old = *p;
212
213 *p = old | mask;
214 return (old & mask) != 0;
215}
216
217static __inline__ int __test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
218{
219 unsigned long mask = 1UL << (nr & 0x3f);
220 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
221 unsigned long old = *p;
222
223 *p = old & ~mask;
224 return (old & mask) != 0;
225}
226
227static __inline__ int __test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
228{
229 unsigned long mask = 1UL << (nr & 0x3f);
230 unsigned long *p = ((unsigned long *)addr) + (nr >> 6);
231 unsigned long old = *p;
232
233 *p = old ^ mask;
234 return (old & mask) != 0;
235}
236
237/*
238 * Return the zero-based bit position (from RIGHT TO LEFT, 63 -> 0) of the
239 * most significant (left-most) 1-bit in a double word.
240 */
241static __inline__ int __ilog2(unsigned long x)
242{
243 int lz;
244
245 asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
246 return 63 - lz;
247}
248
249/*
250 * Determines the bit position of the least significant (rightmost) 0 bit
251 * in the specified double word. The returned bit position will be zero-based,
252 * starting from the right side (63 - 0).
253 */
254static __inline__ unsigned long ffz(unsigned long x)
255{
256 /* no zero exists anywhere in the 8 byte area. */
257 if ((x = ~x) == 0)
258 return 64;
259
260 /*
261 * Calculate the bit position of the least signficant '1' bit in x
262 * (since x has been changed this will actually be the least signficant
263 * '0' bit in * the original x). Note: (x & -x) gives us a mask that
264 * is the least significant * (RIGHT-most) 1-bit of the value in x.
265 */
266 return __ilog2(x & -x);
267}
268
269static __inline__ int __ffs(unsigned long x)
270{
271 return __ilog2(x & -x);
272}
273
274/*
275 * ffs: find first bit set. This is defined the same way as
276 * the libc and compiler builtin ffs routines, therefore
277 * differs in spirit from the above ffz (man ffs).
278 */
279static __inline__ int ffs(int x)
280{
281 unsigned long i = (unsigned long)x;
282 return __ilog2(i & -i) + 1;
283}
284
285/*
286 * fls: find last (most-significant) bit set.
287 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
288 */
289#define fls(x) generic_fls(x)
290
291/*
292 * hweightN: returns the hamming weight (i.e. the number
293 * of bits set) of a N-bit word
294 */
295#define hweight64(x) generic_hweight64(x)
296#define hweight32(x) generic_hweight32(x)
297#define hweight16(x) generic_hweight16(x)
298#define hweight8(x) generic_hweight8(x)
299
300extern unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
301#define find_first_zero_bit(addr, size) \
302 find_next_zero_bit((addr), (size), 0)
303
304extern unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
305#define find_first_bit(addr, size) \
306 find_next_bit((addr), (size), 0)
307
308extern unsigned long find_next_zero_le_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
309#define find_first_zero_le_bit(addr, size) \
310 find_next_zero_le_bit((addr), (size), 0)
311
312static __inline__ int test_le_bit(unsigned long nr, __const__ unsigned long * addr)
313{
314 __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
315 return (ADDR[nr >> 3] >> (nr & 7)) & 1;
316}
317
318#define test_and_clear_le_bit(nr, addr) \
319 test_and_clear_bit((nr) ^ 0x38, (addr))
320#define test_and_set_le_bit(nr, addr) \
321 test_and_set_bit((nr) ^ 0x38, (addr))
322
323/*
324 * non-atomic versions
325 */
326
327#define __set_le_bit(nr, addr) \
328 __set_bit((nr) ^ 0x38, (addr))
329#define __clear_le_bit(nr, addr) \
330 __clear_bit((nr) ^ 0x38, (addr))
331#define __test_and_clear_le_bit(nr, addr) \
332 __test_and_clear_bit((nr) ^ 0x38, (addr))
333#define __test_and_set_le_bit(nr, addr) \
334 __test_and_set_bit((nr) ^ 0x38, (addr))
335
336#define ext2_set_bit(nr,addr) \
337 __test_and_set_le_bit((nr), (unsigned long*)addr)
338#define ext2_clear_bit(nr, addr) \
339 __test_and_clear_le_bit((nr), (unsigned long*)addr)
340
341#define ext2_set_bit_atomic(lock, nr, addr) \
342 test_and_set_le_bit((nr), (unsigned long*)addr)
343#define ext2_clear_bit_atomic(lock, nr, addr) \
344 test_and_clear_le_bit((nr), (unsigned long*)addr)
345
346
347#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
348#define ext2_find_first_zero_bit(addr, size) \
349 find_first_zero_le_bit((unsigned long*)addr, size)
350#define ext2_find_next_zero_bit(addr, size, off) \
351 find_next_zero_le_bit((unsigned long*)addr, size, off)
352
353#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
354#define minix_set_bit(nr,addr) set_bit(nr,addr)
355#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
356#define minix_test_bit(nr,addr) test_bit(nr,addr)
357#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
358
359#endif /* __KERNEL__ */
360#endif /* _PPC64_BITOPS_H */
diff --git a/include/asm-ppc64/dart.h b/include/asm-ppc64/dart.h
deleted file mode 100644
index cdf8a2dec05f..000000000000
--- a/include/asm-ppc64/dart.h
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef _ASM_DART_H
20#define _ASM_DART_H
21
22
23/* physical base of DART registers */
24#define DART_BASE 0xf8033000UL
25
26/* Offset from base to control register */
27#define DARTCNTL 0
28/* Offset from base to exception register */
29#define DARTEXCP 0x10
30/* Offset from base to TLB tag registers */
31#define DARTTAG 0x1000
32
33
34/* Control Register fields */
35
36/* base address of table (pfn) */
37#define DARTCNTL_BASE_MASK 0xfffff
38#define DARTCNTL_BASE_SHIFT 12
39
40#define DARTCNTL_FLUSHTLB 0x400
41#define DARTCNTL_ENABLE 0x200
42
43/* size of table in pages */
44#define DARTCNTL_SIZE_MASK 0x1ff
45#define DARTCNTL_SIZE_SHIFT 0
46
47
48/* DART table fields */
49
50#define DARTMAP_VALID 0x80000000
51#define DARTMAP_RPNMASK 0x00ffffff
52
53
54#define DART_PAGE_SHIFT 12
55#define DART_PAGE_SIZE (1 << DART_PAGE_SHIFT)
56#define DART_PAGE_FACTOR (PAGE_SHIFT - DART_PAGE_SHIFT)
57
58
59#endif
diff --git a/include/asm-ppc64/io.h b/include/asm-ppc64/io.h
index bd7c9532d77b..77fc07c3c6bd 100644
--- a/include/asm-ppc64/io.h
+++ b/include/asm-ppc64/io.h
@@ -13,7 +13,7 @@
13#include <asm/page.h> 13#include <asm/page.h>
14#include <asm/byteorder.h> 14#include <asm/byteorder.h>
15#ifdef CONFIG_PPC_ISERIES 15#ifdef CONFIG_PPC_ISERIES
16#include <asm/iSeries/iSeries_io.h> 16#include <asm/iseries/iseries_io.h>
17#endif 17#endif
18#include <asm/synch.h> 18#include <asm/synch.h>
19#include <asm/delay.h> 19#include <asm/delay.h>
diff --git a/include/asm-ppc64/ipcbuf.h b/include/asm-ppc64/ipcbuf.h
deleted file mode 100644
index fa393c8342af..000000000000
--- a/include/asm-ppc64/ipcbuf.h
+++ /dev/null
@@ -1,28 +0,0 @@
1#ifndef __PPC64_IPCBUF_H__
2#define __PPC64_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for the PPC is identical to kern_ipc_perm
6 * as we have always had 32-bit UIDs and GIDs in the kernel.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid_t uid;
18 __kernel_gid_t gid;
19 __kernel_uid_t cuid;
20 __kernel_gid_t cgid;
21 __kernel_mode_t mode;
22 unsigned int seq;
23 unsigned int __pad1;
24 unsigned long __unused1;
25 unsigned long __unused2;
26};
27
28#endif /* __PPC64_IPCBUF_H__ */
diff --git a/include/asm-ppc64/kexec.h b/include/asm-ppc64/kexec.h
deleted file mode 100644
index 511908afaeeb..000000000000
--- a/include/asm-ppc64/kexec.h
+++ /dev/null
@@ -1,41 +0,0 @@
1#ifndef _PPC64_KEXEC_H
2#define _PPC64_KEXEC_H
3
4/*
5 * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
6 * I.e. Maximum page that is mapped directly into kernel memory,
7 * and kmap is not required.
8 */
9
10/* Maximum physical address we can use pages from */
11/* XXX: since we copy virt we can use any page we allocate */
12#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
13
14/* Maximum address we can reach in physical address mode */
15/* XXX: I want to allow initrd in highmem. otherwise set to rmo on lpar */
16#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
17
18/* Maximum address we can use for the control code buffer */
19/* XXX: unused today, ppc32 uses TASK_SIZE, probably left over from use_mm */
20#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
21
22/* XXX: today we don't use this at all, althogh we have a static stack */
23#define KEXEC_CONTROL_CODE_SIZE 4096
24
25/* The native architecture */
26#define KEXEC_ARCH KEXEC_ARCH_PPC64
27
28#define MAX_NOTE_BYTES 1024
29
30#ifndef __ASSEMBLY__
31
32typedef u32 note_buf_t[MAX_NOTE_BYTES/4];
33
34extern note_buf_t crash_notes[];
35
36extern void kexec_smp_wait(void); /* get and clear naca physid, wait for
37 master to copy new code to 0 */
38
39#endif /* __ASSEMBLY__ */
40#endif /* _PPC_KEXEC_H */
41
diff --git a/include/asm-ppc64/mmu_context.h b/include/asm-ppc64/mmu_context.h
index 77a743402db4..820dd729b895 100644
--- a/include/asm-ppc64/mmu_context.h
+++ b/include/asm-ppc64/mmu_context.h
@@ -16,21 +16,6 @@
16 * 2 of the License, or (at your option) any later version. 16 * 2 of the License, or (at your option) any later version.
17 */ 17 */
18 18
19/*
20 * Every architecture must define this function. It's the fastest
21 * way of searching a 140-bit bitmap where the first 100 bits are
22 * unlikely to be set. It's guaranteed that at least one of the 140
23 * bits is cleared.
24 */
25static inline int sched_find_first_bit(unsigned long *b)
26{
27 if (unlikely(b[0]))
28 return __ffs(b[0]);
29 if (unlikely(b[1]))
30 return __ffs(b[1]) + 64;
31 return __ffs(b[2]) + 128;
32}
33
34static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 19static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
35{ 20{
36} 21}
diff --git a/include/asm-ppc64/naca.h b/include/asm-ppc64/naca.h
deleted file mode 100644
index d2afe6447597..000000000000
--- a/include/asm-ppc64/naca.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef _NACA_H
2#define _NACA_H
3
4/*
5 * c 2001 PPC 64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <asm/types.h>
14
15struct naca_struct {
16 /* Kernel only data - undefined for user space */
17 void *xItVpdAreas; /* VPD Data 0x00 */
18 void *xRamDisk; /* iSeries ramdisk 0x08 */
19 u64 xRamDiskSize; /* In pages 0x10 */
20};
21
22extern struct naca_struct naca;
23
24#endif /* _NACA_H */
diff --git a/include/asm-ppc64/numnodes.h b/include/asm-ppc64/numnodes.h
deleted file mode 100644
index 75ae0b906708..000000000000
--- a/include/asm-ppc64/numnodes.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef _ASM_MAX_NUMNODES_H
2#define _ASM_MAX_NUMNODES_H
3
4/* Max 16 Nodes */
5#define NODES_SHIFT 4
6
7#endif /* _ASM_MAX_NUMNODES_H */
diff --git a/include/asm-ppc64/nvram.h b/include/asm-ppc64/nvram.h
index dfaa21566c9a..def47d720d3d 100644
--- a/include/asm-ppc64/nvram.h
+++ b/include/asm-ppc64/nvram.h
@@ -70,7 +70,7 @@ extern struct nvram_partition *nvram_find_partition(int sig, const char *name);
70 70
71extern int pSeries_nvram_init(void); 71extern int pSeries_nvram_init(void);
72extern int pmac_nvram_init(void); 72extern int pmac_nvram_init(void);
73extern int bpa_nvram_init(void); 73extern int mmio_nvram_init(void);
74 74
75/* PowerMac specific nvram stuffs */ 75/* PowerMac specific nvram stuffs */
76 76
diff --git a/include/asm-ppc64/paca.h b/include/asm-ppc64/paca.h
index 2f0f36f73d38..f68fe91debaf 100644
--- a/include/asm-ppc64/paca.h
+++ b/include/asm-ppc64/paca.h
@@ -19,7 +19,7 @@
19#include <linux/config.h> 19#include <linux/config.h>
20#include <asm/types.h> 20#include <asm/types.h>
21#include <asm/lppaca.h> 21#include <asm/lppaca.h>
22#include <asm/iSeries/ItLpRegSave.h> 22#include <asm/iseries/it_lp_reg_save.h>
23#include <asm/mmu.h> 23#include <asm/mmu.h>
24 24
25register struct paca_struct *local_paca asm("r13"); 25register struct paca_struct *local_paca asm("r13");
diff --git a/include/asm-ppc64/plpar_wrappers.h b/include/asm-ppc64/plpar_wrappers.h
deleted file mode 100644
index 72dd2449ee76..000000000000
--- a/include/asm-ppc64/plpar_wrappers.h
+++ /dev/null
@@ -1,120 +0,0 @@
1#ifndef _PPC64_PLPAR_WRAPPERS_H
2#define _PPC64_PLPAR_WRAPPERS_H
3
4#include <asm/hvcall.h>
5
6static inline long poll_pending(void)
7{
8 unsigned long dummy;
9 return plpar_hcall(H_POLL_PENDING, 0, 0, 0, 0,
10 &dummy, &dummy, &dummy);
11}
12
13static inline long prod_processor(void)
14{
15 plpar_hcall_norets(H_PROD);
16 return(0);
17}
18
19static inline long cede_processor(void)
20{
21 plpar_hcall_norets(H_CEDE);
22 return(0);
23}
24
25static inline long register_vpa(unsigned long flags, unsigned long proc,
26 unsigned long vpa)
27{
28 return plpar_hcall_norets(H_REGISTER_VPA, flags, proc, vpa);
29}
30
31void vpa_init(int cpu);
32
33static inline long plpar_pte_remove(unsigned long flags,
34 unsigned long ptex,
35 unsigned long avpn,
36 unsigned long *old_pteh_ret,
37 unsigned long *old_ptel_ret)
38{
39 unsigned long dummy;
40 return plpar_hcall(H_REMOVE, flags, ptex, avpn, 0,
41 old_pteh_ret, old_ptel_ret, &dummy);
42}
43
44static inline long plpar_pte_read(unsigned long flags,
45 unsigned long ptex,
46 unsigned long *old_pteh_ret, unsigned long *old_ptel_ret)
47{
48 unsigned long dummy;
49 return plpar_hcall(H_READ, flags, ptex, 0, 0,
50 old_pteh_ret, old_ptel_ret, &dummy);
51}
52
53static inline long plpar_pte_protect(unsigned long flags,
54 unsigned long ptex,
55 unsigned long avpn)
56{
57 return plpar_hcall_norets(H_PROTECT, flags, ptex, avpn);
58}
59
60static inline long plpar_tce_get(unsigned long liobn,
61 unsigned long ioba,
62 unsigned long *tce_ret)
63{
64 unsigned long dummy;
65 return plpar_hcall(H_GET_TCE, liobn, ioba, 0, 0,
66 tce_ret, &dummy, &dummy);
67}
68
69static inline long plpar_tce_put(unsigned long liobn,
70 unsigned long ioba,
71 unsigned long tceval)
72{
73 return plpar_hcall_norets(H_PUT_TCE, liobn, ioba, tceval);
74}
75
76static inline long plpar_tce_put_indirect(unsigned long liobn,
77 unsigned long ioba,
78 unsigned long page,
79 unsigned long count)
80{
81 return plpar_hcall_norets(H_PUT_TCE_INDIRECT, liobn, ioba, page, count);
82}
83
84static inline long plpar_tce_stuff(unsigned long liobn,
85 unsigned long ioba,
86 unsigned long tceval,
87 unsigned long count)
88{
89 return plpar_hcall_norets(H_STUFF_TCE, liobn, ioba, tceval, count);
90}
91
92static inline long plpar_get_term_char(unsigned long termno,
93 unsigned long *len_ret,
94 char *buf_ret)
95{
96 unsigned long *lbuf = (unsigned long *)buf_ret; /* ToDo: alignment? */
97 return plpar_hcall(H_GET_TERM_CHAR, termno, 0, 0, 0,
98 len_ret, lbuf+0, lbuf+1);
99}
100
101static inline long plpar_put_term_char(unsigned long termno,
102 unsigned long len,
103 const char *buffer)
104{
105 unsigned long *lbuf = (unsigned long *)buffer; /* ToDo: alignment? */
106 return plpar_hcall_norets(H_PUT_TERM_CHAR, termno, len, lbuf[0],
107 lbuf[1]);
108}
109
110static inline long plpar_set_xdabr(unsigned long address, unsigned long flags)
111{
112 return plpar_hcall_norets(H_SET_XDABR, address, flags);
113}
114
115static inline long plpar_set_dabr(unsigned long val)
116{
117 return plpar_hcall_norets(H_SET_DABR, val);
118}
119
120#endif /* _PPC64_PLPAR_WRAPPERS_H */
diff --git a/include/asm-ppc64/ppc32.h b/include/asm-ppc64/ppc32.h
deleted file mode 100644
index 3945a55d112a..000000000000
--- a/include/asm-ppc64/ppc32.h
+++ /dev/null
@@ -1,122 +0,0 @@
1#ifndef _PPC64_PPC32_H
2#define _PPC64_PPC32_H
3
4#include <linux/compat.h>
5#include <asm/siginfo.h>
6#include <asm/signal.h>
7
8/*
9 * Data types and macros for providing 32b PowerPC support.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17/* These are here to support 32-bit syscalls on a 64-bit kernel. */
18
19typedef struct compat_siginfo {
20 int si_signo;
21 int si_errno;
22 int si_code;
23
24 union {
25 int _pad[SI_PAD_SIZE32];
26
27 /* kill() */
28 struct {
29 compat_pid_t _pid; /* sender's pid */
30 compat_uid_t _uid; /* sender's uid */
31 } _kill;
32
33 /* POSIX.1b timers */
34 struct {
35 compat_timer_t _tid; /* timer id */
36 int _overrun; /* overrun count */
37 compat_sigval_t _sigval; /* same as below */
38 int _sys_private; /* not to be passed to user */
39 } _timer;
40
41 /* POSIX.1b signals */
42 struct {
43 compat_pid_t _pid; /* sender's pid */
44 compat_uid_t _uid; /* sender's uid */
45 compat_sigval_t _sigval;
46 } _rt;
47
48 /* SIGCHLD */
49 struct {
50 compat_pid_t _pid; /* which child */
51 compat_uid_t _uid; /* sender's uid */
52 int _status; /* exit code */
53 compat_clock_t _utime;
54 compat_clock_t _stime;
55 } _sigchld;
56
57 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS, SIGEMT */
58 struct {
59 unsigned int _addr; /* faulting insn/memory ref. */
60 } _sigfault;
61
62 /* SIGPOLL */
63 struct {
64 int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
65 int _fd;
66 } _sigpoll;
67 } _sifields;
68} compat_siginfo_t;
69
70#define __old_sigaction32 old_sigaction32
71
72struct __old_sigaction32 {
73 compat_uptr_t sa_handler;
74 compat_old_sigset_t sa_mask;
75 unsigned int sa_flags;
76 compat_uptr_t sa_restorer; /* not used by Linux/SPARC yet */
77};
78
79
80
81struct sigaction32 {
82 compat_uptr_t sa_handler; /* Really a pointer, but need to deal with 32 bits */
83 unsigned int sa_flags;
84 compat_uptr_t sa_restorer; /* Another 32 bit pointer */
85 compat_sigset_t sa_mask; /* A 32 bit mask */
86};
87
88typedef struct sigaltstack_32 {
89 unsigned int ss_sp;
90 int ss_flags;
91 compat_size_t ss_size;
92} stack_32_t;
93
94struct sigcontext32 {
95 unsigned int _unused[4];
96 int signal;
97 compat_uptr_t handler;
98 unsigned int oldmask;
99 compat_uptr_t regs; /* 4 byte pointer to the pt_regs32 structure. */
100};
101
102struct mcontext32 {
103 elf_gregset_t32 mc_gregs;
104 elf_fpregset_t mc_fregs;
105 unsigned int mc_pad[2];
106 elf_vrregset_t32 mc_vregs __attribute__((__aligned__(16)));
107};
108
109struct ucontext32 {
110 unsigned int uc_flags;
111 unsigned int uc_link;
112 stack_32_t uc_stack;
113 int uc_pad[7];
114 compat_uptr_t uc_regs; /* points to uc_mcontext field */
115 compat_sigset_t uc_sigmask; /* mask last for extensibility */
116 /* glibc has 1024-bit signal masks, ours are 64-bit */
117 int uc_maskext[30];
118 int uc_pad2[3];
119 struct mcontext32 uc_mcontext;
120};
121
122#endif /* _PPC64_PPC32_H */
diff --git a/include/asm-ppc64/spinlock.h b/include/asm-ppc64/spinlock.h
index 14cb895bb607..7d84fb5e39f1 100644
--- a/include/asm-ppc64/spinlock.h
+++ b/include/asm-ppc64/spinlock.h
@@ -21,7 +21,7 @@
21#include <linux/config.h> 21#include <linux/config.h>
22#include <asm/paca.h> 22#include <asm/paca.h>
23#include <asm/hvcall.h> 23#include <asm/hvcall.h>
24#include <asm/iSeries/HvCall.h> 24#include <asm/iseries/hv_call.h>
25 25
26#define __raw_spin_is_locked(x) ((x)->slock != 0) 26#define __raw_spin_is_locked(x) ((x)->slock != 0)
27 27
diff --git a/include/asm-ppc64/stat.h b/include/asm-ppc64/stat.h
deleted file mode 100644
index 973a5f97951d..000000000000
--- a/include/asm-ppc64/stat.h
+++ /dev/null
@@ -1,60 +0,0 @@
1#ifndef _PPC64_STAT_H
2#define _PPC64_STAT_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/types.h>
12
13struct stat {
14 unsigned long st_dev;
15 ino_t st_ino;
16 nlink_t st_nlink;
17 mode_t st_mode;
18 uid_t st_uid;
19 gid_t st_gid;
20 unsigned long st_rdev;
21 off_t st_size;
22 unsigned long st_blksize;
23 unsigned long st_blocks;
24 unsigned long st_atime;
25 unsigned long st_atime_nsec;
26 unsigned long st_mtime;
27 unsigned long st_mtime_nsec;
28 unsigned long st_ctime;
29 unsigned long st_ctime_nsec;
30 unsigned long __unused4;
31 unsigned long __unused5;
32 unsigned long __unused6;
33};
34
35#define STAT_HAVE_NSEC 1
36
37/* This matches struct stat64 in glibc2.1. Only used for 32 bit. */
38struct stat64 {
39 unsigned long st_dev; /* Device. */
40 unsigned long st_ino; /* File serial number. */
41 unsigned int st_mode; /* File mode. */
42 unsigned int st_nlink; /* Link count. */
43 unsigned int st_uid; /* User ID of the file's owner. */
44 unsigned int st_gid; /* Group ID of the file's group. */
45 unsigned long st_rdev; /* Device number, if device. */
46 unsigned short __pad2;
47 long st_size; /* Size of file, in bytes. */
48 int st_blksize; /* Optimal block size for I/O. */
49
50 long st_blocks; /* Number 512-byte blocks allocated. */
51 int st_atime; /* Time of last access. */
52 int st_atime_nsec;
53 int st_mtime; /* Time of last modification. */
54 int st_mtime_nsec;
55 int st_ctime; /* Time of last status change. */
56 int st_ctime_nsec;
57 unsigned int __unused4;
58 unsigned int __unused5;
59};
60#endif
diff --git a/include/asm-ppc64/tlb.h b/include/asm-ppc64/tlb.h
deleted file mode 100644
index 97cb696ce68d..000000000000
--- a/include/asm-ppc64/tlb.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * TLB shootdown specifics for PPC64
3 *
4 * Copyright (C) 2002 Anton Blanchard, IBM Corp.
5 * Copyright (C) 2002 Paul Mackerras, IBM Corp.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12#ifndef _PPC64_TLB_H
13#define _PPC64_TLB_H
14
15#include <asm/tlbflush.h>
16
17struct mmu_gather;
18
19extern void pte_free_finish(void);
20
21static inline void tlb_flush(struct mmu_gather *tlb)
22{
23 flush_tlb_pending();
24 pte_free_finish();
25}
26
27/* Avoid pulling in another include just for this */
28#define check_pgt_cache() do { } while (0)
29
30/* Get the generic bits... */
31#include <asm-generic/tlb.h>
32
33/* Nothing needed here in fact... */
34#define tlb_start_vma(tlb, vma) do { } while (0)
35#define tlb_end_vma(tlb, vma) do { } while (0)
36
37#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
38
39#endif /* _PPC64_TLB_H */
diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h
deleted file mode 100644
index 626f505c6ee3..000000000000
--- a/include/asm-ppc64/tlbflush.h
+++ /dev/null
@@ -1,52 +0,0 @@
1#ifndef _PPC64_TLBFLUSH_H
2#define _PPC64_TLBFLUSH_H
3
4/*
5 * TLB flushing:
6 *
7 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
8 * - flush_tlb_page(vma, vmaddr) flushes one page
9 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
10 * - flush_tlb_range(vma, start, end) flushes a range of pages
11 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
12 * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
13 */
14
15#include <linux/percpu.h>
16#include <asm/page.h>
17
18#define PPC64_TLB_BATCH_NR 192
19
20struct mm_struct;
21struct ppc64_tlb_batch {
22 unsigned long index;
23 struct mm_struct *mm;
24 pte_t pte[PPC64_TLB_BATCH_NR];
25 unsigned long vaddr[PPC64_TLB_BATCH_NR];
26 unsigned int large;
27};
28DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
29
30extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
31
32static inline void flush_tlb_pending(void)
33{
34 struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
35
36 if (batch->index)
37 __flush_tlb_pending(batch);
38 put_cpu_var(ppc64_tlb_batch);
39}
40
41#define flush_tlb_mm(mm) flush_tlb_pending()
42#define flush_tlb_page(vma, addr) flush_tlb_pending()
43#define flush_tlb_page_nohash(vma, addr) do { } while (0)
44#define flush_tlb_range(vma, start, end) \
45 do { (void)(start); flush_tlb_pending(); } while (0)
46#define flush_tlb_kernel_range(start, end) flush_tlb_pending()
47#define flush_tlb_pgtables(mm, start, end) do { } while (0)
48
49extern void flush_hash_page(unsigned long va, pte_t pte, int local);
50void flush_hash_range(unsigned long number, int local);
51
52#endif /* _PPC64_TLBFLUSH_H */
diff --git a/include/asm-ppc64/uaccess.h b/include/asm-ppc64/uaccess.h
deleted file mode 100644
index 132c1276547b..000000000000
--- a/include/asm-ppc64/uaccess.h
+++ /dev/null
@@ -1,341 +0,0 @@
1#ifndef _PPC64_UACCESS_H
2#define _PPC64_UACCESS_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#ifndef __ASSEMBLY__
12#include <linux/sched.h>
13#include <linux/errno.h>
14#include <asm/processor.h>
15
16#define VERIFY_READ 0
17#define VERIFY_WRITE 1
18
19/*
20 * The fs value determines whether argument validity checking should be
21 * performed or not. If get_fs() == USER_DS, checking is performed, with
22 * get_fs() == KERNEL_DS, checking is bypassed.
23 *
24 * For historical reasons, these macros are grossly misnamed.
25 */
26
27#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
28
29#define KERNEL_DS MAKE_MM_SEG(0UL)
30#define USER_DS MAKE_MM_SEG(0xf000000000000000UL)
31
32#define get_ds() (KERNEL_DS)
33#define get_fs() (current->thread.fs)
34#define set_fs(val) (current->thread.fs = (val))
35
36#define segment_eq(a,b) ((a).seg == (b).seg)
37
38/*
39 * Use the alpha trick for checking ranges:
40 *
41 * Is a address valid? This does a straightforward calculation rather
42 * than tests.
43 *
44 * Address valid if:
45 * - "addr" doesn't have any high-bits set
46 * - AND "size" doesn't have any high-bits set
47 * - OR we are in kernel mode.
48 *
49 * We dont have to check for high bits in (addr+size) because the first
50 * two checks force the maximum result to be below the start of the
51 * kernel region.
52 */
53#define __access_ok(addr,size,segment) \
54 (((segment).seg & (addr | size )) == 0)
55
56#define access_ok(type,addr,size) \
57 __access_ok(((__force unsigned long)(addr)),(size),get_fs())
58
59/*
60 * The exception table consists of pairs of addresses: the first is the
61 * address of an instruction that is allowed to fault, and the second is
62 * the address at which the program should continue. No registers are
63 * modified, so it is entirely up to the continuation code to figure out
64 * what to do.
65 *
66 * All the routines below use bits of fixup code that are out of line
67 * with the main instruction path. This means when everything is well,
68 * we don't even have to jump over them. Further, they do not intrude
69 * on our cache or tlb entries.
70 */
71
72struct exception_table_entry
73{
74 unsigned long insn, fixup;
75};
76
77/* Returns 0 if exception not found and fixup otherwise. */
78extern unsigned long search_exception_table(unsigned long);
79
80/*
81 * These are the main single-value transfer routines. They automatically
82 * use the right size if we just have the right pointer type.
83 *
84 * This gets kind of ugly. We want to return _two_ values in "get_user()"
85 * and yet we don't want to do any pointers, because that is too much
86 * of a performance impact. Thus we have a few rather ugly macros here,
87 * and hide all the ugliness from the user.
88 *
89 * The "__xxx" versions of the user access functions are versions that
90 * do not verify the address space, that must have been done previously
91 * with a separate "access_ok()" call (this is used when we do multiple
92 * accesses to the same area of user memory).
93 *
94 * As we use the same address space for kernel and user data on the
95 * PowerPC, we can just do these as direct assignments. (Of course, the
96 * exception handling means that it's no longer "just"...)
97 */
98#define get_user(x,ptr) \
99 __get_user_check((x),(ptr),sizeof(*(ptr)))
100#define put_user(x,ptr) \
101 __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
102
103#define __get_user(x,ptr) \
104 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
105#define __put_user(x,ptr) \
106 __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
107
108#define __get_user_unaligned __get_user
109#define __put_user_unaligned __put_user
110
111extern long __put_user_bad(void);
112
113#define __put_user_nocheck(x,ptr,size) \
114({ \
115 long __pu_err; \
116 might_sleep(); \
117 __chk_user_ptr(ptr); \
118 __put_user_size((x),(ptr),(size),__pu_err,-EFAULT); \
119 __pu_err; \
120})
121
122#define __put_user_check(x,ptr,size) \
123({ \
124 long __pu_err = -EFAULT; \
125 void __user *__pu_addr = (ptr); \
126 might_sleep(); \
127 if (access_ok(VERIFY_WRITE,__pu_addr,size)) \
128 __put_user_size((x),__pu_addr,(size),__pu_err,-EFAULT); \
129 __pu_err; \
130})
131
132#define __put_user_size(x,ptr,size,retval,errret) \
133do { \
134 retval = 0; \
135 switch (size) { \
136 case 1: __put_user_asm(x,ptr,retval,"stb",errret); break; \
137 case 2: __put_user_asm(x,ptr,retval,"sth",errret); break; \
138 case 4: __put_user_asm(x,ptr,retval,"stw",errret); break; \
139 case 8: __put_user_asm(x,ptr,retval,"std",errret); break; \
140 default: __put_user_bad(); \
141 } \
142} while (0)
143
144/*
145 * We don't tell gcc that we are accessing memory, but this is OK
146 * because we do not write to any memory gcc knows about, so there
147 * are no aliasing issues.
148 */
149#define __put_user_asm(x, addr, err, op, errret) \
150 __asm__ __volatile__( \
151 "1: "op" %1,0(%2) # put_user\n" \
152 "2:\n" \
153 ".section .fixup,\"ax\"\n" \
154 "3: li %0,%3\n" \
155 " b 2b\n" \
156 ".previous\n" \
157 ".section __ex_table,\"a\"\n" \
158 " .align 3\n" \
159 " .llong 1b,3b\n" \
160 ".previous" \
161 : "=r"(err) \
162 : "r"(x), "b"(addr), "i"(errret), "0"(err))
163
164
165#define __get_user_nocheck(x,ptr,size) \
166({ \
167 long __gu_err; \
168 unsigned long __gu_val; \
169 might_sleep(); \
170 __get_user_size(__gu_val,(ptr),(size),__gu_err,-EFAULT);\
171 (x) = (__typeof__(*(ptr)))__gu_val; \
172 __gu_err; \
173})
174
175#define __get_user_check(x,ptr,size) \
176({ \
177 long __gu_err = -EFAULT; \
178 unsigned long __gu_val = 0; \
179 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
180 might_sleep(); \
181 if (access_ok(VERIFY_READ,__gu_addr,size)) \
182 __get_user_size(__gu_val,__gu_addr,(size),__gu_err,-EFAULT);\
183 (x) = (__typeof__(*(ptr)))__gu_val; \
184 __gu_err; \
185})
186
187extern long __get_user_bad(void);
188
189#define __get_user_size(x,ptr,size,retval,errret) \
190do { \
191 retval = 0; \
192 __chk_user_ptr(ptr); \
193 switch (size) { \
194 case 1: __get_user_asm(x,ptr,retval,"lbz",errret); break; \
195 case 2: __get_user_asm(x,ptr,retval,"lhz",errret); break; \
196 case 4: __get_user_asm(x,ptr,retval,"lwz",errret); break; \
197 case 8: __get_user_asm(x,ptr,retval,"ld",errret); break; \
198 default: (x) = __get_user_bad(); \
199 } \
200} while (0)
201
202#define __get_user_asm(x, addr, err, op, errret) \
203 __asm__ __volatile__( \
204 "1: "op" %1,0(%2) # get_user\n" \
205 "2:\n" \
206 ".section .fixup,\"ax\"\n" \
207 "3: li %0,%3\n" \
208 " li %1,0\n" \
209 " b 2b\n" \
210 ".previous\n" \
211 ".section __ex_table,\"a\"\n" \
212 " .align 3\n" \
213 " .llong 1b,3b\n" \
214 ".previous" \
215 : "=r"(err), "=r"(x) \
216 : "b"(addr), "i"(errret), "0"(err))
217
218/* more complex routines */
219
220extern unsigned long __copy_tofrom_user(void __user *to, const void __user *from,
221 unsigned long size);
222
223static inline unsigned long
224__copy_from_user_inatomic(void *to, const void __user *from, unsigned long n)
225{
226 if (__builtin_constant_p(n)) {
227 unsigned long ret;
228
229 switch (n) {
230 case 1:
231 __get_user_size(*(u8 *)to, from, 1, ret, 1);
232 return ret;
233 case 2:
234 __get_user_size(*(u16 *)to, from, 2, ret, 2);
235 return ret;
236 case 4:
237 __get_user_size(*(u32 *)to, from, 4, ret, 4);
238 return ret;
239 case 8:
240 __get_user_size(*(u64 *)to, from, 8, ret, 8);
241 return ret;
242 }
243 }
244 return __copy_tofrom_user((__force void __user *) to, from, n);
245}
246
247static inline unsigned long
248__copy_from_user(void *to, const void __user *from, unsigned long n)
249{
250 might_sleep();
251 return __copy_from_user_inatomic(to, from, n);
252}
253
254static inline unsigned long
255__copy_to_user_inatomic(void __user *to, const void *from, unsigned long n)
256{
257 if (__builtin_constant_p(n)) {
258 unsigned long ret;
259
260 switch (n) {
261 case 1:
262 __put_user_size(*(u8 *)from, (u8 __user *)to, 1, ret, 1);
263 return ret;
264 case 2:
265 __put_user_size(*(u16 *)from, (u16 __user *)to, 2, ret, 2);
266 return ret;
267 case 4:
268 __put_user_size(*(u32 *)from, (u32 __user *)to, 4, ret, 4);
269 return ret;
270 case 8:
271 __put_user_size(*(u64 *)from, (u64 __user *)to, 8, ret, 8);
272 return ret;
273 }
274 }
275 return __copy_tofrom_user(to, (__force const void __user *) from, n);
276}
277
278static inline unsigned long
279__copy_to_user(void __user *to, const void *from, unsigned long n)
280{
281 might_sleep();
282 return __copy_to_user_inatomic(to, from, n);
283}
284
285#define __copy_in_user(to, from, size) \
286 __copy_tofrom_user((to), (from), (size))
287
288extern unsigned long copy_from_user(void *to, const void __user *from,
289 unsigned long n);
290extern unsigned long copy_to_user(void __user *to, const void *from,
291 unsigned long n);
292extern unsigned long copy_in_user(void __user *to, const void __user *from,
293 unsigned long n);
294
295extern unsigned long __clear_user(void __user *addr, unsigned long size);
296
297static inline unsigned long
298clear_user(void __user *addr, unsigned long size)
299{
300 might_sleep();
301 if (likely(access_ok(VERIFY_WRITE, addr, size)))
302 size = __clear_user(addr, size);
303 return size;
304}
305
306extern int __strncpy_from_user(char *dst, const char __user *src, long count);
307
308static inline long
309strncpy_from_user(char *dst, const char __user *src, long count)
310{
311 might_sleep();
312 if (likely(access_ok(VERIFY_READ, src, 1)))
313 return __strncpy_from_user(dst, src, count);
314 return -EFAULT;
315}
316
317/*
318 * Return the size of a string (including the ending 0)
319 *
320 * Return 0 for error
321 */
322extern int __strnlen_user(const char __user *str, long len);
323
324/*
325 * Returns the length of the string at str (including the null byte),
326 * or 0 if we hit a page we can't access,
327 * or something > len if we didn't find a null byte.
328 */
329static inline int strnlen_user(const char __user *str, long len)
330{
331 might_sleep();
332 if (likely(access_ok(VERIFY_READ, str, 1)))
333 return __strnlen_user(str, len);
334 return 0;
335}
336
337#define strlen_user(str) strnlen_user((str), 0x7ffffffe)
338
339#endif /* __ASSEMBLY__ */
340
341#endif /* _PPC64_UACCESS_H */
diff --git a/include/asm-ppc64/ucontext.h b/include/asm-ppc64/ucontext.h
deleted file mode 100644
index ef8cc5b37542..000000000000
--- a/include/asm-ppc64/ucontext.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef _ASMPPC64_UCONTEXT_H
2#define _ASMPPC64_UCONTEXT_H
3
4#include <asm/sigcontext.h>
5
6/*
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13struct ucontext {
14 unsigned long uc_flags;
15 struct ucontext *uc_link;
16 stack_t uc_stack;
17 sigset_t uc_sigmask;
18 sigset_t __unsued[15]; /* Allow for uc_sigmask growth */
19 struct sigcontext uc_mcontext; /* last for extensibility */
20};
21
22#endif /* _ASMPPC64_UCONTEXT_H */
diff --git a/include/asm-x86_64/dma-mapping.h b/include/asm-x86_64/dma-mapping.h
index 54a380efed41..36d16dfbac88 100644
--- a/include/asm-x86_64/dma-mapping.h
+++ b/include/asm-x86_64/dma-mapping.h
@@ -85,10 +85,33 @@ static inline void dma_sync_single_for_device(struct device *hwdev,
85 flush_write_buffers(); 85 flush_write_buffers();
86} 86}
87 87
88#define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir) \ 88static inline void dma_sync_single_range_for_cpu(struct device *hwdev,
89 dma_sync_single_for_cpu(dev, dma_handle, size, dir) 89 dma_addr_t dma_handle,
90#define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir) \ 90 unsigned long offset,
91 dma_sync_single_for_device(dev, dma_handle, size, dir) 91 size_t size, int direction)
92{
93 if (direction == DMA_NONE)
94 out_of_line_bug();
95
96 if (swiotlb)
97 return swiotlb_sync_single_range_for_cpu(hwdev,dma_handle,offset,size,direction);
98
99 flush_write_buffers();
100}
101
102static inline void dma_sync_single_range_for_device(struct device *hwdev,
103 dma_addr_t dma_handle,
104 unsigned long offset,
105 size_t size, int direction)
106{
107 if (direction == DMA_NONE)
108 out_of_line_bug();
109
110 if (swiotlb)
111 return swiotlb_sync_single_range_for_device(hwdev,dma_handle,offset,size,direction);
112
113 flush_write_buffers();
114}
92 115
93static inline void dma_sync_sg_for_cpu(struct device *hwdev, 116static inline void dma_sync_sg_for_cpu(struct device *hwdev,
94 struct scatterlist *sg, 117 struct scatterlist *sg,
diff --git a/include/asm-x86_64/swiotlb.h b/include/asm-x86_64/swiotlb.h
index 7cbfd10ecc3c..dddf1b218681 100644
--- a/include/asm-x86_64/swiotlb.h
+++ b/include/asm-x86_64/swiotlb.h
@@ -15,6 +15,14 @@ extern void swiotlb_sync_single_for_cpu(struct device *hwdev,
15extern void swiotlb_sync_single_for_device(struct device *hwdev, 15extern void swiotlb_sync_single_for_device(struct device *hwdev,
16 dma_addr_t dev_addr, 16 dma_addr_t dev_addr,
17 size_t size, int dir); 17 size_t size, int dir);
18extern void swiotlb_sync_single_range_for_cpu(struct device *hwdev,
19 dma_addr_t dev_addr,
20 unsigned long offset,
21 size_t size, int dir);
22extern void swiotlb_sync_single_range_for_device(struct device *hwdev,
23 dma_addr_t dev_addr,
24 unsigned long offset,
25 size_t size, int dir);
18extern void swiotlb_sync_sg_for_cpu(struct device *hwdev, 26extern void swiotlb_sync_sg_for_cpu(struct device *hwdev,
19 struct scatterlist *sg, int nelems, 27 struct scatterlist *sg, int nelems,
20 int dir); 28 int dir);
diff --git a/include/linux/device.h b/include/linux/device.h
index a9e72ac3fb9f..17cbc6db67b4 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -396,32 +396,6 @@ extern struct device * get_device(struct device * dev);
396extern void put_device(struct device * dev); 396extern void put_device(struct device * dev);
397 397
398 398
399/* drivers/base/platform.c */
400
401struct platform_device {
402 const char * name;
403 u32 id;
404 struct device dev;
405 u32 num_resources;
406 struct resource * resource;
407};
408
409#define to_platform_device(x) container_of((x), struct platform_device, dev)
410
411extern int platform_device_register(struct platform_device *);
412extern void platform_device_unregister(struct platform_device *);
413
414extern struct bus_type platform_bus_type;
415extern struct device platform_bus;
416
417extern struct resource *platform_get_resource(struct platform_device *, unsigned int, unsigned int);
418extern int platform_get_irq(struct platform_device *, unsigned int);
419extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, char *);
420extern int platform_get_irq_byname(struct platform_device *, char *);
421extern int platform_add_devices(struct platform_device **, int);
422
423extern struct platform_device *platform_device_register_simple(char *, unsigned int, struct resource *, unsigned int);
424
425/* drivers/base/power.c */ 399/* drivers/base/power.c */
426extern void device_shutdown(void); 400extern void device_shutdown(void);
427 401
diff --git a/include/linux/dqblk_xfs.h b/include/linux/dqblk_xfs.h
index cb31719ee192..2fda1b2aabd9 100644
--- a/include/linux/dqblk_xfs.h
+++ b/include/linux/dqblk_xfs.h
@@ -1,22 +1,18 @@
1/* 1/*
2 * Copyright (c) 1995-2001,2004 Silicon Graphics, Inc. All Rights Reserved. 2 * Copyright (c) 1995-2001,2004 Silicon Graphics, Inc. All Rights Reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or
5 * under the terms of version 2.1 of the GNU Lesser General Public License 5 * modify it under the terms of the GNU Lesser General Public License
6 * as published by the Free Software Foundation. 6 * as published by the Free Software Foundation.
7 * 7 *
8 * This program is distributed in the hope that it will be useful, 8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details. 11 * GNU Lesser General Public License for more details.
12 * 12 *
13 * You should have received a copy of the GNU General Public License 13 * You should have received a copy of the GNU Lesset General Public License
14 * along with this program; if not, write to the Free Software 14 * along with this program; if not, write to the Free Software Foundation,
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 15 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
16 * USA
17 *
18 * Contact information: Silicon Graphics, Inc., 1500 Crittenden Lane,
19 * Mountain View, CA 94043, USA, or: http://www.sgi.com
20 */ 16 */
21#ifndef _LINUX_DQBLK_XFS_H 17#ifndef _LINUX_DQBLK_XFS_H
22#define _LINUX_DQBLK_XFS_H 18#define _LINUX_DQBLK_XFS_H
@@ -32,7 +28,8 @@
32 28
33#define XQM_USRQUOTA 0 /* system call user quota type */ 29#define XQM_USRQUOTA 0 /* system call user quota type */
34#define XQM_GRPQUOTA 1 /* system call group quota type */ 30#define XQM_GRPQUOTA 1 /* system call group quota type */
35#define XQM_MAXQUOTAS 2 31#define XQM_PRJQUOTA 2 /* system call project quota type */
32#define XQM_MAXQUOTAS 3
36 33
37#define Q_XQUOTAON XQM_CMD(1) /* enable accounting/enforcement */ 34#define Q_XQUOTAON XQM_CMD(1) /* enable accounting/enforcement */
38#define Q_XQUOTAOFF XQM_CMD(2) /* disable accounting/enforcement */ 35#define Q_XQUOTAOFF XQM_CMD(2) /* disable accounting/enforcement */
@@ -40,6 +37,7 @@
40#define Q_XSETQLIM XQM_CMD(4) /* set disk limits */ 37#define Q_XSETQLIM XQM_CMD(4) /* set disk limits */
41#define Q_XGETQSTAT XQM_CMD(5) /* get quota subsystem status */ 38#define Q_XGETQSTAT XQM_CMD(5) /* get quota subsystem status */
42#define Q_XQUOTARM XQM_CMD(6) /* free disk space used by dquots */ 39#define Q_XQUOTARM XQM_CMD(6) /* free disk space used by dquots */
40#define Q_XQUOTASYNC XQM_CMD(7) /* delalloc flush, updates dquots */
43 41
44/* 42/*
45 * fs_disk_quota structure: 43 * fs_disk_quota structure:
diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h
index cc84934f9059..5f49a30eb6f2 100644
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -48,8 +48,10 @@ static inline void eth_copy_and_sum (struct sk_buff *dest,
48} 48}
49 49
50/** 50/**
51 * is_zero_ether_addr - Determine if give Ethernet address is all 51 * is_zero_ether_addr - Determine if give Ethernet address is all zeros.
52 * zeros. 52 * @addr: Pointer to a six-byte array containing the Ethernet address
53 *
54 * Return true if the address is all zeroes.
53 */ 55 */
54static inline int is_zero_ether_addr(const u8 *addr) 56static inline int is_zero_ether_addr(const u8 *addr)
55{ 57{
@@ -57,9 +59,7 @@ static inline int is_zero_ether_addr(const u8 *addr)
57} 59}
58 60
59/** 61/**
60 * is_multicast_ether_addr - Determine if the given Ethernet address is a 62 * is_multicast_ether_addr - Determine if the Ethernet address is a multicast.
61 * multicast address.
62 *
63 * @addr: Pointer to a six-byte array containing the Ethernet address 63 * @addr: Pointer to a six-byte array containing the Ethernet address
64 * 64 *
65 * Return true if the address is a multicast address. 65 * Return true if the address is a multicast address.
@@ -69,10 +69,15 @@ static inline int is_multicast_ether_addr(const u8 *addr)
69 return ((addr[0] != 0xff) && (0x01 & addr[0])); 69 return ((addr[0] != 0xff) && (0x01 & addr[0]));
70} 70}
71 71
72/**
73 * is_broadcast_ether_addr - Determine if the Ethernet address is broadcast
74 * @addr: Pointer to a six-byte array containing the Ethernet address
75 *
76 * Return true if the address is the broadcast address.
77 */
72static inline int is_broadcast_ether_addr(const u8 *addr) 78static inline int is_broadcast_ether_addr(const u8 *addr)
73{ 79{
74 return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && 80 return (addr[0] & addr[1] & addr[2] & addr[3] & addr[4] & addr[5]) == 0xff;
75 (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff));
76} 81}
77 82
78/** 83/**
@@ -108,14 +113,14 @@ static inline void random_ether_addr(u8 *addr)
108/** 113/**
109 * compare_ether_addr - Compare two Ethernet addresses 114 * compare_ether_addr - Compare two Ethernet addresses
110 * @addr1: Pointer to a six-byte array containing the Ethernet address 115 * @addr1: Pointer to a six-byte array containing the Ethernet address
111 * @addr2 Pointer other six-byte array containing the Ethernet address 116 * @addr2: Pointer other six-byte array containing the Ethernet address
112 * 117 *
113 * Compare two ethernet addresses, returns 0 if equal 118 * Compare two ethernet addresses, returns 0 if equal
114 */ 119 */
115static inline unsigned compare_ether_addr(const u8 *_a, const u8 *_b) 120static inline unsigned compare_ether_addr(const u8 *addr1, const u8 *addr2)
116{ 121{
117 const u16 *a = (const u16 *) _a; 122 const u16 *a = (const u16 *) addr1;
118 const u16 *b = (const u16 *) _b; 123 const u16 *b = (const u16 *) addr2;
119 124
120 BUILD_BUG_ON(ETH_ALEN != 6); 125 BUILD_BUG_ON(ETH_ALEN != 6);
121 return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0; 126 return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0;
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index eabdb5cce357..8eeaa53a68c9 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -78,7 +78,7 @@ struct hd_struct {
78 sector_t start_sect; 78 sector_t start_sect;
79 sector_t nr_sects; 79 sector_t nr_sects;
80 struct kobject kobj; 80 struct kobject kobj;
81 unsigned reads, read_sectors, writes, write_sectors; 81 unsigned ios[2], sectors[2];
82 int policy, partno; 82 int policy, partno;
83}; 83};
84 84
@@ -89,10 +89,10 @@ struct hd_struct {
89#define GENHD_FL_SUPPRESS_PARTITION_INFO 32 89#define GENHD_FL_SUPPRESS_PARTITION_INFO 32
90 90
91struct disk_stats { 91struct disk_stats {
92 unsigned read_sectors, write_sectors; 92 unsigned sectors[2];
93 unsigned reads, writes; 93 unsigned ios[2];
94 unsigned read_merges, write_merges; 94 unsigned merges[2];
95 unsigned read_ticks, write_ticks; 95 unsigned ticks[2];
96 unsigned io_ticks; 96 unsigned io_ticks;
97 unsigned time_in_queue; 97 unsigned time_in_queue;
98}; 98};
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 0ba3af7a1236..dcd17e7458ab 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -155,6 +155,10 @@ enum {
155 ATA_SHIFT_UDMA = 0, 155 ATA_SHIFT_UDMA = 0,
156 ATA_SHIFT_MWDMA = 8, 156 ATA_SHIFT_MWDMA = 8,
157 ATA_SHIFT_PIO = 11, 157 ATA_SHIFT_PIO = 11,
158
159 /* size of buffer to pad xfers ending on unaligned boundaries */
160 ATA_DMA_PAD_SZ = 4,
161 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE,
158 162
159 /* Masks for port functions */ 163 /* Masks for port functions */
160 ATA_PORT_PRIMARY = (1 << 0), 164 ATA_PORT_PRIMARY = (1 << 0),
@@ -249,9 +253,12 @@ struct ata_queued_cmd {
249 unsigned long flags; /* ATA_QCFLAG_xxx */ 253 unsigned long flags; /* ATA_QCFLAG_xxx */
250 unsigned int tag; 254 unsigned int tag;
251 unsigned int n_elem; 255 unsigned int n_elem;
256 unsigned int orig_n_elem;
252 257
253 int dma_dir; 258 int dma_dir;
254 259
260 unsigned int pad_len;
261
255 unsigned int nsect; 262 unsigned int nsect;
256 unsigned int cursect; 263 unsigned int cursect;
257 264
@@ -262,9 +269,11 @@ struct ata_queued_cmd {
262 unsigned int cursg_ofs; 269 unsigned int cursg_ofs;
263 270
264 struct scatterlist sgent; 271 struct scatterlist sgent;
272 struct scatterlist pad_sgent;
265 void *buf_virt; 273 void *buf_virt;
266 274
267 struct scatterlist *sg; 275 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */
276 struct scatterlist *__sg;
268 277
269 ata_qc_cb_t complete_fn; 278 ata_qc_cb_t complete_fn;
270 279
@@ -310,6 +319,9 @@ struct ata_port {
310 struct ata_prd *prd; /* our SG list */ 319 struct ata_prd *prd; /* our SG list */
311 dma_addr_t prd_dma; /* and its DMA mapping */ 320 dma_addr_t prd_dma; /* and its DMA mapping */
312 321
322 void *pad; /* array of DMA pad buffers */
323 dma_addr_t pad_dma;
324
313 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */ 325 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */
314 326
315 u8 ctl; /* cache of ATA control register */ 327 u8 ctl; /* cache of ATA control register */
@@ -512,6 +524,31 @@ extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bit
512#endif /* CONFIG_PCI */ 524#endif /* CONFIG_PCI */
513 525
514 526
527static inline int
528ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc)
529{
530 if (sg == &qc->pad_sgent)
531 return 1;
532 if (qc->pad_len)
533 return 0;
534 if (((sg - qc->__sg) + 1) == qc->n_elem)
535 return 1;
536 return 0;
537}
538
539static inline struct scatterlist *
540ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc)
541{
542 if (sg == &qc->pad_sgent)
543 return NULL;
544 if (++sg - qc->__sg < qc->n_elem)
545 return sg;
546 return qc->pad_len ? &qc->pad_sgent : NULL;
547}
548
549#define ata_for_each_sg(sg, qc) \
550 for (sg = qc->__sg; sg; sg = ata_qc_next_sg(sg, qc))
551
515static inline unsigned int ata_tag_valid(unsigned int tag) 552static inline unsigned int ata_tag_valid(unsigned int tag)
516{ 553{
517 return (tag < ATA_MAX_QUEUE) ? 1 : 0; 554 return (tag < ATA_MAX_QUEUE) ? 1 : 0;
@@ -740,4 +777,17 @@ static inline unsigned int __ac_err_mask(u8 status)
740 return mask; 777 return mask;
741} 778}
742 779
780static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev)
781{
782 ap->pad_dma = 0;
783 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ,
784 &ap->pad_dma, GFP_KERNEL);
785 return (ap->pad == NULL) ? -ENOMEM : 0;
786}
787
788static inline void ata_pad_free(struct ata_port *ap, struct device *dev)
789{
790 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
791}
792
743#endif /* __LINUX_LIBATA_H__ */ 793#endif /* __LINUX_LIBATA_H__ */
diff --git a/include/linux/netfilter_arp/arp_tables.h b/include/linux/netfilter_arp/arp_tables.h
index d759a637bded..e98a870a20be 100644
--- a/include/linux/netfilter_arp/arp_tables.h
+++ b/include/linux/netfilter_arp/arp_tables.h
@@ -68,7 +68,8 @@ struct arpt_entry_target
68 u_int16_t target_size; 68 u_int16_t target_size;
69 69
70 /* Used by userspace */ 70 /* Used by userspace */
71 char name[ARPT_FUNCTION_MAXNAMELEN]; 71 char name[ARPT_FUNCTION_MAXNAMELEN-1];
72 u_int8_t revision;
72 } user; 73 } user;
73 struct { 74 struct {
74 u_int16_t target_size; 75 u_int16_t target_size;
@@ -148,7 +149,9 @@ struct arpt_entry
148 149
149#define ARPT_SO_GET_INFO (ARPT_BASE_CTL) 150#define ARPT_SO_GET_INFO (ARPT_BASE_CTL)
150#define ARPT_SO_GET_ENTRIES (ARPT_BASE_CTL + 1) 151#define ARPT_SO_GET_ENTRIES (ARPT_BASE_CTL + 1)
151#define ARPT_SO_GET_MAX ARPT_SO_GET_ENTRIES 152/* #define ARPT_SO_GET_REVISION_MATCH (ARPT_BASE_CTL + 2)*/
153#define ARPT_SO_GET_REVISION_TARGET (ARPT_BASE_CTL + 3)
154#define ARPT_SO_GET_MAX ARPT_SO_GET_REVISION_TARGET
152 155
153/* CONTINUE verdict for targets */ 156/* CONTINUE verdict for targets */
154#define ARPT_CONTINUE 0xFFFFFFFF 157#define ARPT_CONTINUE 0xFFFFFFFF
@@ -236,6 +239,15 @@ struct arpt_get_entries
236 struct arpt_entry entrytable[0]; 239 struct arpt_entry entrytable[0];
237}; 240};
238 241
242/* The argument to ARPT_SO_GET_REVISION_*. Returns highest revision
243 * kernel supports, if >= revision. */
244struct arpt_get_revision
245{
246 char name[ARPT_FUNCTION_MAXNAMELEN-1];
247
248 u_int8_t revision;
249};
250
239/* Standard return verdict, or do jump. */ 251/* Standard return verdict, or do jump. */
240#define ARPT_STANDARD_TARGET "" 252#define ARPT_STANDARD_TARGET ""
241/* Error verdict. */ 253/* Error verdict. */
@@ -274,7 +286,9 @@ struct arpt_target
274{ 286{
275 struct list_head list; 287 struct list_head list;
276 288
277 const char name[ARPT_FUNCTION_MAXNAMELEN]; 289 const char name[ARPT_FUNCTION_MAXNAMELEN-1];
290
291 u_int8_t revision;
278 292
279 /* Returns verdict. */ 293 /* Returns verdict. */
280 unsigned int (*target)(struct sk_buff **pskb, 294 unsigned int (*target)(struct sk_buff **pskb,
diff --git a/include/linux/netfilter_ipv6/ip6_tables.h b/include/linux/netfilter_ipv6/ip6_tables.h
index 59f70b34e029..2efc046d9e94 100644
--- a/include/linux/netfilter_ipv6/ip6_tables.h
+++ b/include/linux/netfilter_ipv6/ip6_tables.h
@@ -57,7 +57,8 @@ struct ip6t_entry_match
57 u_int16_t match_size; 57 u_int16_t match_size;
58 58
59 /* Used by userspace */ 59 /* Used by userspace */
60 char name[IP6T_FUNCTION_MAXNAMELEN]; 60 char name[IP6T_FUNCTION_MAXNAMELEN-1];
61 u_int8_t revision;
61 } user; 62 } user;
62 struct { 63 struct {
63 u_int16_t match_size; 64 u_int16_t match_size;
@@ -80,7 +81,8 @@ struct ip6t_entry_target
80 u_int16_t target_size; 81 u_int16_t target_size;
81 82
82 /* Used by userspace */ 83 /* Used by userspace */
83 char name[IP6T_FUNCTION_MAXNAMELEN]; 84 char name[IP6T_FUNCTION_MAXNAMELEN-1];
85 u_int8_t revision;
84 } user; 86 } user;
85 struct { 87 struct {
86 u_int16_t target_size; 88 u_int16_t target_size;
@@ -161,7 +163,9 @@ struct ip6t_entry
161 163
162#define IP6T_SO_GET_INFO (IP6T_BASE_CTL) 164#define IP6T_SO_GET_INFO (IP6T_BASE_CTL)
163#define IP6T_SO_GET_ENTRIES (IP6T_BASE_CTL + 1) 165#define IP6T_SO_GET_ENTRIES (IP6T_BASE_CTL + 1)
164#define IP6T_SO_GET_MAX IP6T_SO_GET_ENTRIES 166#define IP6T_SO_GET_REVISION_MATCH (IP6T_BASE_CTL + 2)
167#define IP6T_SO_GET_REVISION_TARGET (IP6T_BASE_CTL + 3)
168#define IP6T_SO_GET_MAX IP6T_SO_GET_REVISION_TARGET
165 169
166/* CONTINUE verdict for targets */ 170/* CONTINUE verdict for targets */
167#define IP6T_CONTINUE 0xFFFFFFFF 171#define IP6T_CONTINUE 0xFFFFFFFF
@@ -291,6 +295,15 @@ struct ip6t_get_entries
291 struct ip6t_entry entrytable[0]; 295 struct ip6t_entry entrytable[0];
292}; 296};
293 297
298/* The argument to IP6T_SO_GET_REVISION_*. Returns highest revision
299 * kernel supports, if >= revision. */
300struct ip6t_get_revision
301{
302 char name[IP6T_FUNCTION_MAXNAMELEN-1];
303
304 u_int8_t revision;
305};
306
294/* Standard return verdict, or do jump. */ 307/* Standard return verdict, or do jump. */
295#define IP6T_STANDARD_TARGET "" 308#define IP6T_STANDARD_TARGET ""
296/* Error verdict. */ 309/* Error verdict. */
@@ -352,7 +365,9 @@ struct ip6t_match
352{ 365{
353 struct list_head list; 366 struct list_head list;
354 367
355 const char name[IP6T_FUNCTION_MAXNAMELEN]; 368 const char name[IP6T_FUNCTION_MAXNAMELEN-1];
369
370 u_int8_t revision;
356 371
357 /* Return true or false: return FALSE and set *hotdrop = 1 to 372 /* Return true or false: return FALSE and set *hotdrop = 1 to
358 force immediate packet drop. */ 373 force immediate packet drop. */
@@ -387,7 +402,9 @@ struct ip6t_target
387{ 402{
388 struct list_head list; 403 struct list_head list;
389 404
390 const char name[IP6T_FUNCTION_MAXNAMELEN]; 405 const char name[IP6T_FUNCTION_MAXNAMELEN-1];
406
407 u_int8_t revision;
391 408
392 /* Returns verdict. Argument order changed since 2.6.9, as this 409 /* Returns verdict. Argument order changed since 2.6.9, as this
393 must now handle non-linear skbs, using skb_copy_bits and 410 must now handle non-linear skbs, using skb_copy_bits and
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 325fe7ae49bb..12787a9b0259 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -316,7 +316,7 @@ extern struct nfs_open_context *alloc_nfs_open_context(struct dentry *dentry, st
316extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx); 316extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx);
317extern void put_nfs_open_context(struct nfs_open_context *ctx); 317extern void put_nfs_open_context(struct nfs_open_context *ctx);
318extern void nfs_file_set_open_context(struct file *filp, struct nfs_open_context *ctx); 318extern void nfs_file_set_open_context(struct file *filp, struct nfs_open_context *ctx);
319extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, int mode); 319extern struct nfs_open_context *nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, int mode);
320extern void nfs_file_clear_open_context(struct file *filp); 320extern void nfs_file_clear_open_context(struct file *filp);
321 321
322/* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */ 322/* linux/net/ipv4/ipconfig.c: trims ip addr off front of name, too. */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 56192005fa4d..88de3f8ce1a2 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -990,6 +990,10 @@
990#define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO 0x008a 990#define PCI_DEVICE_ID_NVIDIA_CK8_AUDIO 0x008a
991#define PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c 991#define PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c
992#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e 992#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e
993#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GT 0x0090
994#define PCI_DEVICE_ID_NVIDIA_GEFORCE_7800_GTX 0x0091
995#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800 0x0098
996#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_7800_GTX 0x0099
993#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 997#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0
994#define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1 998#define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1
995#define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2 999#define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 72cb67b66e0c..92a9696fdebe 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -72,6 +72,9 @@ struct mii_bus {
72 /* list of all PHYs on bus */ 72 /* list of all PHYs on bus */
73 struct phy_device *phy_map[PHY_MAX_ADDR]; 73 struct phy_device *phy_map[PHY_MAX_ADDR];
74 74
75 /* Phy addresses to be ignored when probing */
76 u32 phy_mask;
77
75 /* Pointer to an array of interrupts, each PHY's 78 /* Pointer to an array of interrupts, each PHY's
76 * interrupt at the index matching its address */ 79 * interrupt at the index matching its address */
77 int *irq; 80 int *irq;
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
new file mode 100644
index 000000000000..a726225e0afe
--- /dev/null
+++ b/include/linux/platform_device.h
@@ -0,0 +1,40 @@
1/*
2 * platform_device.h - generic, centralized driver model
3 *
4 * Copyright (c) 2001-2003 Patrick Mochel <mochel@osdl.org>
5 *
6 * This file is released under the GPLv2
7 *
8 * See Documentation/driver-model/ for more information.
9 */
10
11#ifndef _PLATFORM_DEVICE_H_
12#define _PLATFORM_DEVICE_H_
13
14#include <linux/device.h>
15
16struct platform_device {
17 const char * name;
18 u32 id;
19 struct device dev;
20 u32 num_resources;
21 struct resource * resource;
22};
23
24#define to_platform_device(x) container_of((x), struct platform_device, dev)
25
26extern int platform_device_register(struct platform_device *);
27extern void platform_device_unregister(struct platform_device *);
28
29extern struct bus_type platform_bus_type;
30extern struct device platform_bus;
31
32extern struct resource *platform_get_resource(struct platform_device *, unsigned int, unsigned int);
33extern int platform_get_irq(struct platform_device *, unsigned int);
34extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, char *);
35extern int platform_get_irq_byname(struct platform_device *, char *);
36extern int platform_add_devices(struct platform_device **, int);
37
38extern struct platform_device *platform_device_register_simple(char *, unsigned int, struct resource *, unsigned int);
39
40#endif /* _PLATFORM_DEVICE_H_ */
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index 317a979b24de..2b799d40d669 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -12,7 +12,7 @@
12#define _LINUX_SERIAL_8250_H 12#define _LINUX_SERIAL_8250_H
13 13
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/device.h> 15#include <linux/platform_device.h>
16 16
17/* 17/*
18 * This is the platform device platform_data structure 18 * This is the platform device platform_data structure
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 2b0401b93f2b..9d2579230689 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -39,8 +39,7 @@
39#define PORT_RSA 13 39#define PORT_RSA 13
40#define PORT_NS16550A 14 40#define PORT_NS16550A 14
41#define PORT_XSCALE 15 41#define PORT_XSCALE 15
42#define PORT_IP3106 16 42#define PORT_MAX_8250 15 /* max port ID */
43#define PORT_MAX_8250 16 /* max port ID */
44 43
45/* 44/*
46 * ARM specific type numbers. These are not currently guaranteed 45 * ARM specific type numbers. These are not currently guaranteed
@@ -118,7 +117,9 @@
118#define PORT_M32R_SIO 68 117#define PORT_M32R_SIO 68
119 118
120/*Digi jsm */ 119/*Digi jsm */
121#define PORT_JSM 65 120#define PORT_JSM 69
121
122#define PORT_IP3106 70
122 123
123#ifdef __KERNEL__ 124#ifdef __KERNEL__
124 125
diff --git a/include/rdma/ib_user_cm.h b/include/rdma/ib_user_cm.h
index 3037588b8464..19be116047f6 100644
--- a/include/rdma/ib_user_cm.h
+++ b/include/rdma/ib_user_cm.h
@@ -38,7 +38,7 @@
38 38
39#include <linux/types.h> 39#include <linux/types.h>
40 40
41#define IB_USER_CM_ABI_VERSION 3 41#define IB_USER_CM_ABI_VERSION 4
42 42
43enum { 43enum {
44 IB_USER_CM_CMD_CREATE_ID, 44 IB_USER_CM_CMD_CREATE_ID,
@@ -84,6 +84,7 @@ struct ib_ucm_create_id_resp {
84struct ib_ucm_destroy_id { 84struct ib_ucm_destroy_id {
85 __u64 response; 85 __u64 response;
86 __u32 id; 86 __u32 id;
87 __u32 reserved;
87}; 88};
88 89
89struct ib_ucm_destroy_id_resp { 90struct ib_ucm_destroy_id_resp {
@@ -93,6 +94,7 @@ struct ib_ucm_destroy_id_resp {
93struct ib_ucm_attr_id { 94struct ib_ucm_attr_id {
94 __u64 response; 95 __u64 response;
95 __u32 id; 96 __u32 id;
97 __u32 reserved;
96}; 98};
97 99
98struct ib_ucm_attr_id_resp { 100struct ib_ucm_attr_id_resp {
@@ -164,6 +166,7 @@ struct ib_ucm_listen {
164 __be64 service_id; 166 __be64 service_id;
165 __be64 service_mask; 167 __be64 service_mask;
166 __u32 id; 168 __u32 id;
169 __u32 reserved;
167}; 170};
168 171
169struct ib_ucm_establish { 172struct ib_ucm_establish {
@@ -219,7 +222,7 @@ struct ib_ucm_req {
219 __u8 rnr_retry_count; 222 __u8 rnr_retry_count;
220 __u8 max_cm_retries; 223 __u8 max_cm_retries;
221 __u8 srq; 224 __u8 srq;
222 __u8 reserved[1]; 225 __u8 reserved[5];
223}; 226};
224 227
225struct ib_ucm_rep { 228struct ib_ucm_rep {
@@ -236,6 +239,7 @@ struct ib_ucm_rep {
236 __u8 flow_control; 239 __u8 flow_control;
237 __u8 rnr_retry_count; 240 __u8 rnr_retry_count;
238 __u8 srq; 241 __u8 srq;
242 __u8 reserved[4];
239}; 243};
240 244
241struct ib_ucm_info { 245struct ib_ucm_info {
@@ -245,7 +249,7 @@ struct ib_ucm_info {
245 __u64 data; 249 __u64 data;
246 __u8 info_len; 250 __u8 info_len;
247 __u8 data_len; 251 __u8 data_len;
248 __u8 reserved[2]; 252 __u8 reserved[6];
249}; 253};
250 254
251struct ib_ucm_mra { 255struct ib_ucm_mra {
@@ -273,6 +277,7 @@ struct ib_ucm_sidr_req {
273 __u16 pkey; 277 __u16 pkey;
274 __u8 len; 278 __u8 len;
275 __u8 max_cm_retries; 279 __u8 max_cm_retries;
280 __u8 reserved[4];
276}; 281};
277 282
278struct ib_ucm_sidr_rep { 283struct ib_ucm_sidr_rep {
@@ -284,7 +289,7 @@ struct ib_ucm_sidr_rep {
284 __u64 data; 289 __u64 data;
285 __u8 info_len; 290 __u8 info_len;
286 __u8 data_len; 291 __u8 data_len;
287 __u8 reserved[2]; 292 __u8 reserved[6];
288}; 293};
289/* 294/*
290 * event notification ABI structures. 295 * event notification ABI structures.
@@ -295,7 +300,7 @@ struct ib_ucm_event_get {
295 __u64 info; 300 __u64 info;
296 __u8 data_len; 301 __u8 data_len;
297 __u8 info_len; 302 __u8 info_len;
298 __u8 reserved[2]; 303 __u8 reserved[6];
299}; 304};
300 305
301struct ib_ucm_req_event_resp { 306struct ib_ucm_req_event_resp {
@@ -315,6 +320,7 @@ struct ib_ucm_req_event_resp {
315 __u8 rnr_retry_count; 320 __u8 rnr_retry_count;
316 __u8 srq; 321 __u8 srq;
317 __u8 port; 322 __u8 port;
323 __u8 reserved[7];
318}; 324};
319 325
320struct ib_ucm_rep_event_resp { 326struct ib_ucm_rep_event_resp {
@@ -329,7 +335,7 @@ struct ib_ucm_rep_event_resp {
329 __u8 flow_control; 335 __u8 flow_control;
330 __u8 rnr_retry_count; 336 __u8 rnr_retry_count;
331 __u8 srq; 337 __u8 srq;
332 __u8 reserved[1]; 338 __u8 reserved[5];
333}; 339};
334 340
335struct ib_ucm_rej_event_resp { 341struct ib_ucm_rej_event_resp {
@@ -374,6 +380,7 @@ struct ib_ucm_event_resp {
374 __u32 id; 380 __u32 id;
375 __u32 event; 381 __u32 event;
376 __u32 present; 382 __u32 present;
383 __u32 reserved;
377 union { 384 union {
378 struct ib_ucm_req_event_resp req_resp; 385 struct ib_ucm_req_event_resp req_resp;
379 struct ib_ucm_rep_event_resp rep_resp; 386 struct ib_ucm_rep_event_resp rep_resp;
diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h
new file mode 100644
index 000000000000..be1bc792ab18
--- /dev/null
+++ b/include/scsi/iscsi_if.h
@@ -0,0 +1,245 @@
1/*
2 * iSCSI User/Kernel Shares (Defines, Constants, Protocol definitions, etc)
3 *
4 * Copyright (C) 2005 Dmitry Yusupov
5 * Copyright (C) 2005 Alex Aizman
6 * maintained by open-iscsi@googlegroups.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published
10 * by the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * See the file COPYING included with this distribution for more details.
19 */
20
21#ifndef ISCSI_IF_H
22#define ISCSI_IF_H
23
24#include <scsi/iscsi_proto.h>
25
26#define UEVENT_BASE 10
27#define KEVENT_BASE 100
28#define ISCSI_ERR_BASE 1000
29
30enum iscsi_uevent_e {
31 ISCSI_UEVENT_UNKNOWN = 0,
32
33 /* down events */
34 ISCSI_UEVENT_CREATE_SESSION = UEVENT_BASE + 1,
35 ISCSI_UEVENT_DESTROY_SESSION = UEVENT_BASE + 2,
36 ISCSI_UEVENT_CREATE_CONN = UEVENT_BASE + 3,
37 ISCSI_UEVENT_DESTROY_CONN = UEVENT_BASE + 4,
38 ISCSI_UEVENT_BIND_CONN = UEVENT_BASE + 5,
39 ISCSI_UEVENT_SET_PARAM = UEVENT_BASE + 6,
40 ISCSI_UEVENT_START_CONN = UEVENT_BASE + 7,
41 ISCSI_UEVENT_STOP_CONN = UEVENT_BASE + 8,
42 ISCSI_UEVENT_SEND_PDU = UEVENT_BASE + 9,
43 ISCSI_UEVENT_GET_STATS = UEVENT_BASE + 10,
44 ISCSI_UEVENT_GET_PARAM = UEVENT_BASE + 11,
45
46 /* up events */
47 ISCSI_KEVENT_RECV_PDU = KEVENT_BASE + 1,
48 ISCSI_KEVENT_CONN_ERROR = KEVENT_BASE + 2,
49 ISCSI_KEVENT_IF_ERROR = KEVENT_BASE + 3,
50};
51
52struct iscsi_uevent {
53 uint32_t type; /* k/u events type */
54 uint32_t iferror; /* carries interface or resource errors */
55 uint64_t transport_handle;
56
57 union {
58 /* messages u -> k */
59 struct msg_create_session {
60 uint32_t initial_cmdsn;
61 } c_session;
62 struct msg_destroy_session {
63 uint64_t session_handle;
64 uint32_t sid;
65 } d_session;
66 struct msg_create_conn {
67 uint64_t session_handle;
68 uint32_t cid;
69 uint32_t sid;
70 } c_conn;
71 struct msg_bind_conn {
72 uint64_t session_handle;
73 uint64_t conn_handle;
74 uint32_t transport_fd;
75 uint32_t is_leading;
76 } b_conn;
77 struct msg_destroy_conn {
78 uint64_t conn_handle;
79 uint32_t cid;
80 } d_conn;
81 struct msg_send_pdu {
82 uint32_t hdr_size;
83 uint32_t data_size;
84 uint64_t conn_handle;
85 } send_pdu;
86 struct msg_set_param {
87 uint64_t conn_handle;
88 uint32_t param; /* enum iscsi_param */
89 uint32_t value;
90 } set_param;
91 struct msg_start_conn {
92 uint64_t conn_handle;
93 } start_conn;
94 struct msg_stop_conn {
95 uint64_t conn_handle;
96 uint32_t flag;
97 } stop_conn;
98 struct msg_get_stats {
99 uint64_t conn_handle;
100 } get_stats;
101 } u;
102 union {
103 /* messages k -> u */
104 uint64_t handle;
105 int retcode;
106 struct msg_create_session_ret {
107 uint64_t session_handle;
108 uint32_t sid;
109 } c_session_ret;
110 struct msg_recv_req {
111 uint64_t recv_handle;
112 uint64_t conn_handle;
113 } recv_req;
114 struct msg_conn_error {
115 uint64_t conn_handle;
116 uint32_t error; /* enum iscsi_err */
117 } connerror;
118 } r;
119} __attribute__ ((aligned (sizeof(uint64_t))));
120
121/*
122 * Common error codes
123 */
124enum iscsi_err {
125 ISCSI_OK = 0,
126
127 ISCSI_ERR_DATASN = ISCSI_ERR_BASE + 1,
128 ISCSI_ERR_DATA_OFFSET = ISCSI_ERR_BASE + 2,
129 ISCSI_ERR_MAX_CMDSN = ISCSI_ERR_BASE + 3,
130 ISCSI_ERR_EXP_CMDSN = ISCSI_ERR_BASE + 4,
131 ISCSI_ERR_BAD_OPCODE = ISCSI_ERR_BASE + 5,
132 ISCSI_ERR_DATALEN = ISCSI_ERR_BASE + 6,
133 ISCSI_ERR_AHSLEN = ISCSI_ERR_BASE + 7,
134 ISCSI_ERR_PROTO = ISCSI_ERR_BASE + 8,
135 ISCSI_ERR_LUN = ISCSI_ERR_BASE + 9,
136 ISCSI_ERR_BAD_ITT = ISCSI_ERR_BASE + 10,
137 ISCSI_ERR_CONN_FAILED = ISCSI_ERR_BASE + 11,
138 ISCSI_ERR_R2TSN = ISCSI_ERR_BASE + 12,
139 ISCSI_ERR_SESSION_FAILED = ISCSI_ERR_BASE + 13,
140 ISCSI_ERR_HDR_DGST = ISCSI_ERR_BASE + 14,
141 ISCSI_ERR_DATA_DGST = ISCSI_ERR_BASE + 15,
142 ISCSI_ERR_PARAM_NOT_FOUND = ISCSI_ERR_BASE + 16
143};
144
145/*
146 * iSCSI Parameters (RFC3720)
147 */
148enum iscsi_param {
149 ISCSI_PARAM_MAX_RECV_DLENGTH = 0,
150 ISCSI_PARAM_MAX_XMIT_DLENGTH = 1,
151 ISCSI_PARAM_HDRDGST_EN = 2,
152 ISCSI_PARAM_DATADGST_EN = 3,
153 ISCSI_PARAM_INITIAL_R2T_EN = 4,
154 ISCSI_PARAM_MAX_R2T = 5,
155 ISCSI_PARAM_IMM_DATA_EN = 6,
156 ISCSI_PARAM_FIRST_BURST = 7,
157 ISCSI_PARAM_MAX_BURST = 8,
158 ISCSI_PARAM_PDU_INORDER_EN = 9,
159 ISCSI_PARAM_DATASEQ_INORDER_EN = 10,
160 ISCSI_PARAM_ERL = 11,
161 ISCSI_PARAM_IFMARKER_EN = 12,
162 ISCSI_PARAM_OFMARKER_EN = 13,
163};
164#define ISCSI_PARAM_MAX 14
165
166typedef uint64_t iscsi_sessionh_t; /* iSCSI Data-Path session handle */
167typedef uint64_t iscsi_connh_t; /* iSCSI Data-Path connection handle */
168
169#define iscsi_ptr(_handle) ((void*)(unsigned long)_handle)
170#define iscsi_handle(_ptr) ((uint64_t)(unsigned long)_ptr)
171#define iscsi_hostdata(_hostdata) ((void*)_hostdata + sizeof(unsigned long))
172
173/*
174 * These flags presents iSCSI Data-Path capabilities.
175 */
176#define CAP_RECOVERY_L0 0x1
177#define CAP_RECOVERY_L1 0x2
178#define CAP_RECOVERY_L2 0x4
179#define CAP_MULTI_R2T 0x8
180#define CAP_HDRDGST 0x10
181#define CAP_DATADGST 0x20
182#define CAP_MULTI_CONN 0x40
183#define CAP_TEXT_NEGO 0x80
184#define CAP_MARKERS 0x100
185
186/*
187 * These flags describes reason of stop_conn() call
188 */
189#define STOP_CONN_TERM 0x1
190#define STOP_CONN_SUSPEND 0x2
191#define STOP_CONN_RECOVER 0x3
192
193#define ISCSI_STATS_CUSTOM_MAX 32
194#define ISCSI_STATS_CUSTOM_DESC_MAX 64
195struct iscsi_stats_custom {
196 char desc[ISCSI_STATS_CUSTOM_DESC_MAX];
197 uint64_t value;
198};
199
200/*
201 * struct iscsi_stats - iSCSI Statistics (iSCSI MIB)
202 *
203 * Note: this structure contains counters collected on per-connection basis.
204 */
205struct iscsi_stats {
206 /* octets */
207 uint64_t txdata_octets;
208 uint64_t rxdata_octets;
209
210 /* xmit pdus */
211 uint32_t noptx_pdus;
212 uint32_t scsicmd_pdus;
213 uint32_t tmfcmd_pdus;
214 uint32_t login_pdus;
215 uint32_t text_pdus;
216 uint32_t dataout_pdus;
217 uint32_t logout_pdus;
218 uint32_t snack_pdus;
219
220 /* recv pdus */
221 uint32_t noprx_pdus;
222 uint32_t scsirsp_pdus;
223 uint32_t tmfrsp_pdus;
224 uint32_t textrsp_pdus;
225 uint32_t datain_pdus;
226 uint32_t logoutrsp_pdus;
227 uint32_t r2t_pdus;
228 uint32_t async_pdus;
229 uint32_t rjt_pdus;
230
231 /* errors */
232 uint32_t digest_err;
233 uint32_t timeout_err;
234
235 /*
236 * iSCSI Custom Statistics support, i.e. Transport could
237 * extend existing MIB statistics with its own specific statistics
238 * up to ISCSI_STATS_CUSTOM_MAX
239 */
240 uint32_t custom_length;
241 struct iscsi_stats_custom custom[0]
242 __attribute__ ((aligned (sizeof(uint64_t))));
243};
244
245#endif
diff --git a/include/scsi/iscsi_proto.h b/include/scsi/iscsi_proto.h
new file mode 100644
index 000000000000..4feda05fdf25
--- /dev/null
+++ b/include/scsi/iscsi_proto.h
@@ -0,0 +1,589 @@
1/*
2 * RFC 3720 (iSCSI) protocol data types
3 *
4 * Copyright (C) 2005 Dmitry Yusupov
5 * Copyright (C) 2005 Alex Aizman
6 * maintained by open-iscsi@googlegroups.com
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published
10 * by the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * See the file COPYING included with this distribution for more details.
19 */
20
21#ifndef ISCSI_PROTO_H
22#define ISCSI_PROTO_H
23
24#define ISCSI_VERSION_STR "0.3"
25#define ISCSI_DATE_STR "22-Apr-2005"
26#define ISCSI_DRAFT20_VERSION 0x00
27
28/* default iSCSI listen port for incoming connections */
29#define ISCSI_LISTEN_PORT 3260
30
31/* Padding word length */
32#define PAD_WORD_LEN 4
33
34/*
35 * useful common(control and data pathes) macro
36 */
37#define ntoh24(p) (((p)[0] << 16) | ((p)[1] << 8) | ((p)[2]))
38#define hton24(p, v) { \
39 p[0] = (((v) >> 16) & 0xFF); \
40 p[1] = (((v) >> 8) & 0xFF); \
41 p[2] = ((v) & 0xFF); \
42}
43#define zero_data(p) {p[0]=0;p[1]=0;p[2]=0;}
44
45/*
46 * iSCSI Template Message Header
47 */
48struct iscsi_hdr {
49 uint8_t opcode;
50 uint8_t flags; /* Final bit */
51 uint8_t rsvd2[2];
52 uint8_t hlength; /* AHSs total length */
53 uint8_t dlength[3]; /* Data length */
54 uint8_t lun[8];
55 __be32 itt; /* Initiator Task Tag */
56 __be32 ttt; /* Target Task Tag */
57 __be32 statsn;
58 __be32 exp_statsn;
59 __be32 max_statsn;
60 uint8_t other[12];
61};
62
63/************************* RFC 3720 Begin *****************************/
64
65#define ISCSI_RESERVED_TAG 0xffffffff
66
67/* Opcode encoding bits */
68#define ISCSI_OP_RETRY 0x80
69#define ISCSI_OP_IMMEDIATE 0x40
70#define ISCSI_OPCODE_MASK 0x3F
71
72/* Initiator Opcode values */
73#define ISCSI_OP_NOOP_OUT 0x00
74#define ISCSI_OP_SCSI_CMD 0x01
75#define ISCSI_OP_SCSI_TMFUNC 0x02
76#define ISCSI_OP_LOGIN 0x03
77#define ISCSI_OP_TEXT 0x04
78#define ISCSI_OP_SCSI_DATA_OUT 0x05
79#define ISCSI_OP_LOGOUT 0x06
80#define ISCSI_OP_SNACK 0x10
81
82#define ISCSI_OP_VENDOR1_CMD 0x1c
83#define ISCSI_OP_VENDOR2_CMD 0x1d
84#define ISCSI_OP_VENDOR3_CMD 0x1e
85#define ISCSI_OP_VENDOR4_CMD 0x1f
86
87/* Target Opcode values */
88#define ISCSI_OP_NOOP_IN 0x20
89#define ISCSI_OP_SCSI_CMD_RSP 0x21
90#define ISCSI_OP_SCSI_TMFUNC_RSP 0x22
91#define ISCSI_OP_LOGIN_RSP 0x23
92#define ISCSI_OP_TEXT_RSP 0x24
93#define ISCSI_OP_SCSI_DATA_IN 0x25
94#define ISCSI_OP_LOGOUT_RSP 0x26
95#define ISCSI_OP_R2T 0x31
96#define ISCSI_OP_ASYNC_EVENT 0x32
97#define ISCSI_OP_REJECT 0x3f
98
99struct iscsi_ahs_hdr {
100 __be16 ahslength;
101 uint8_t ahstype;
102 uint8_t ahspec[5];
103};
104
105#define ISCSI_AHSTYPE_CDB 1
106#define ISCSI_AHSTYPE_RLENGTH 2
107
108/* iSCSI PDU Header */
109struct iscsi_cmd {
110 uint8_t opcode;
111 uint8_t flags;
112 __be16 rsvd2;
113 uint8_t hlength;
114 uint8_t dlength[3];
115 uint8_t lun[8];
116 __be32 itt; /* Initiator Task Tag */
117 __be32 data_length;
118 __be32 cmdsn;
119 __be32 exp_statsn;
120 uint8_t cdb[16]; /* SCSI Command Block */
121 /* Additional Data (Command Dependent) */
122};
123
124/* Command PDU flags */
125#define ISCSI_FLAG_CMD_FINAL 0x80
126#define ISCSI_FLAG_CMD_READ 0x40
127#define ISCSI_FLAG_CMD_WRITE 0x20
128#define ISCSI_FLAG_CMD_ATTR_MASK 0x07 /* 3 bits */
129
130/* SCSI Command Attribute values */
131#define ISCSI_ATTR_UNTAGGED 0
132#define ISCSI_ATTR_SIMPLE 1
133#define ISCSI_ATTR_ORDERED 2
134#define ISCSI_ATTR_HEAD_OF_QUEUE 3
135#define ISCSI_ATTR_ACA 4
136
137struct iscsi_rlength_ahdr {
138 __be16 ahslength;
139 uint8_t ahstype;
140 uint8_t reserved;
141 __be32 read_length;
142};
143
144/* SCSI Response Header */
145struct iscsi_cmd_rsp {
146 uint8_t opcode;
147 uint8_t flags;
148 uint8_t response;
149 uint8_t cmd_status;
150 uint8_t hlength;
151 uint8_t dlength[3];
152 uint8_t rsvd[8];
153 __be32 itt; /* Initiator Task Tag */
154 __be32 rsvd1;
155 __be32 statsn;
156 __be32 exp_cmdsn;
157 __be32 max_cmdsn;
158 __be32 exp_datasn;
159 __be32 bi_residual_count;
160 __be32 residual_count;
161 /* Response or Sense Data (optional) */
162};
163
164/* Command Response PDU flags */
165#define ISCSI_FLAG_CMD_BIDI_OVERFLOW 0x10
166#define ISCSI_FLAG_CMD_BIDI_UNDERFLOW 0x08
167#define ISCSI_FLAG_CMD_OVERFLOW 0x04
168#define ISCSI_FLAG_CMD_UNDERFLOW 0x02
169
170/* iSCSI Status values. Valid if Rsp Selector bit is not set */
171#define ISCSI_STATUS_CMD_COMPLETED 0
172#define ISCSI_STATUS_TARGET_FAILURE 1
173#define ISCSI_STATUS_SUBSYS_FAILURE 2
174
175/* Asynchronous Event Header */
176struct iscsi_async {
177 uint8_t opcode;
178 uint8_t flags;
179 uint8_t rsvd2[2];
180 uint8_t rsvd3;
181 uint8_t dlength[3];
182 uint8_t lun[8];
183 uint8_t rsvd4[8];
184 __be32 statsn;
185 __be32 exp_cmdsn;
186 __be32 max_cmdsn;
187 uint8_t async_event;
188 uint8_t async_vcode;
189 __be16 param1;
190 __be16 param2;
191 __be16 param3;
192 uint8_t rsvd5[4];
193};
194
195/* iSCSI Event Codes */
196#define ISCSI_ASYNC_MSG_SCSI_EVENT 0
197#define ISCSI_ASYNC_MSG_REQUEST_LOGOUT 1
198#define ISCSI_ASYNC_MSG_DROPPING_CONNECTION 2
199#define ISCSI_ASYNC_MSG_DROPPING_ALL_CONNECTIONS 3
200#define ISCSI_ASYNC_MSG_PARAM_NEGOTIATION 4
201#define ISCSI_ASYNC_MSG_VENDOR_SPECIFIC 255
202
203/* NOP-Out Message */
204struct iscsi_nopout {
205 uint8_t opcode;
206 uint8_t flags;
207 __be16 rsvd2;
208 uint8_t rsvd3;
209 uint8_t dlength[3];
210 uint8_t lun[8];
211 __be32 itt; /* Initiator Task Tag */
212 __be32 ttt; /* Target Transfer Tag */
213 __be32 cmdsn;
214 __be32 exp_statsn;
215 uint8_t rsvd4[16];
216};
217
218/* NOP-In Message */
219struct iscsi_nopin {
220 uint8_t opcode;
221 uint8_t flags;
222 __be16 rsvd2;
223 uint8_t rsvd3;
224 uint8_t dlength[3];
225 uint8_t lun[8];
226 __be32 itt; /* Initiator Task Tag */
227 __be32 ttt; /* Target Transfer Tag */
228 __be32 statsn;
229 __be32 exp_cmdsn;
230 __be32 max_cmdsn;
231 uint8_t rsvd4[12];
232};
233
234/* SCSI Task Management Message Header */
235struct iscsi_tm {
236 uint8_t opcode;
237 uint8_t flags;
238 uint8_t rsvd1[2];
239 uint8_t hlength;
240 uint8_t dlength[3];
241 uint8_t lun[8];
242 __be32 itt; /* Initiator Task Tag */
243 __be32 rtt; /* Reference Task Tag */
244 __be32 cmdsn;
245 __be32 exp_statsn;
246 __be32 refcmdsn;
247 __be32 exp_datasn;
248 uint8_t rsvd2[8];
249};
250
251#define ISCSI_FLAG_TM_FUNC_MASK 0x7F
252
253/* Function values */
254#define ISCSI_TM_FUNC_ABORT_TASK 1
255#define ISCSI_TM_FUNC_ABORT_TASK_SET 2
256#define ISCSI_TM_FUNC_CLEAR_ACA 3
257#define ISCSI_TM_FUNC_CLEAR_TASK_SET 4
258#define ISCSI_TM_FUNC_LOGICAL_UNIT_RESET 5
259#define ISCSI_TM_FUNC_TARGET_WARM_RESET 6
260#define ISCSI_TM_FUNC_TARGET_COLD_RESET 7
261#define ISCSI_TM_FUNC_TASK_REASSIGN 8
262
263/* SCSI Task Management Response Header */
264struct iscsi_tm_rsp {
265 uint8_t opcode;
266 uint8_t flags;
267 uint8_t response; /* see Response values below */
268 uint8_t qualifier;
269 uint8_t hlength;
270 uint8_t dlength[3];
271 uint8_t rsvd2[8];
272 __be32 itt; /* Initiator Task Tag */
273 __be32 rtt; /* Reference Task Tag */
274 __be32 statsn;
275 __be32 exp_cmdsn;
276 __be32 max_cmdsn;
277 uint8_t rsvd3[12];
278};
279
280/* Response values */
281#define ISCSI_TMF_RSP_COMPLETE 0x00
282#define ISCSI_TMF_RSP_NO_TASK 0x01
283#define ISCSI_TMF_RSP_NO_LUN 0x02
284#define ISCSI_TMF_RSP_TASK_ALLEGIANT 0x03
285#define ISCSI_TMF_RSP_NO_FAILOVER 0x04
286#define ISCSI_TMF_RSP_NOT_SUPPORTED 0x05
287#define ISCSI_TMF_RSP_AUTH_FAILED 0x06
288#define ISCSI_TMF_RSP_REJECTED 0xff
289
290/* Ready To Transfer Header */
291struct iscsi_r2t_rsp {
292 uint8_t opcode;
293 uint8_t flags;
294 uint8_t rsvd2[2];
295 uint8_t hlength;
296 uint8_t dlength[3];
297 uint8_t lun[8];
298 __be32 itt; /* Initiator Task Tag */
299 __be32 ttt; /* Target Transfer Tag */
300 __be32 statsn;
301 __be32 exp_cmdsn;
302 __be32 max_cmdsn;
303 __be32 r2tsn;
304 __be32 data_offset;
305 __be32 data_length;
306};
307
308/* SCSI Data Hdr */
309struct iscsi_data {
310 uint8_t opcode;
311 uint8_t flags;
312 uint8_t rsvd2[2];
313 uint8_t rsvd3;
314 uint8_t dlength[3];
315 uint8_t lun[8];
316 __be32 itt;
317 __be32 ttt;
318 __be32 rsvd4;
319 __be32 exp_statsn;
320 __be32 rsvd5;
321 __be32 datasn;
322 __be32 offset;
323 __be32 rsvd6;
324 /* Payload */
325};
326
327/* SCSI Data Response Hdr */
328struct iscsi_data_rsp {
329 uint8_t opcode;
330 uint8_t flags;
331 uint8_t rsvd2;
332 uint8_t cmd_status;
333 uint8_t hlength;
334 uint8_t dlength[3];
335 uint8_t lun[8];
336 __be32 itt;
337 __be32 ttt;
338 __be32 statsn;
339 __be32 exp_cmdsn;
340 __be32 max_cmdsn;
341 __be32 datasn;
342 __be32 offset;
343 __be32 residual_count;
344};
345
346/* Data Response PDU flags */
347#define ISCSI_FLAG_DATA_ACK 0x40
348#define ISCSI_FLAG_DATA_OVERFLOW 0x04
349#define ISCSI_FLAG_DATA_UNDERFLOW 0x02
350#define ISCSI_FLAG_DATA_STATUS 0x01
351
352/* Text Header */
353struct iscsi_text {
354 uint8_t opcode;
355 uint8_t flags;
356 uint8_t rsvd2[2];
357 uint8_t hlength;
358 uint8_t dlength[3];
359 uint8_t rsvd4[8];
360 __be32 itt;
361 __be32 ttt;
362 __be32 cmdsn;
363 __be32 exp_statsn;
364 uint8_t rsvd5[16];
365 /* Text - key=value pairs */
366};
367
368#define ISCSI_FLAG_TEXT_CONTINUE 0x40
369
370/* Text Response Header */
371struct iscsi_text_rsp {
372 uint8_t opcode;
373 uint8_t flags;
374 uint8_t rsvd2[2];
375 uint8_t hlength;
376 uint8_t dlength[3];
377 uint8_t rsvd4[8];
378 __be32 itt;
379 __be32 ttt;
380 __be32 statsn;
381 __be32 exp_cmdsn;
382 __be32 max_cmdsn;
383 uint8_t rsvd5[12];
384 /* Text Response - key:value pairs */
385};
386
387/* Login Header */
388struct iscsi_login {
389 uint8_t opcode;
390 uint8_t flags;
391 uint8_t max_version; /* Max. version supported */
392 uint8_t min_version; /* Min. version supported */
393 uint8_t hlength;
394 uint8_t dlength[3];
395 uint8_t isid[6]; /* Initiator Session ID */
396 __be16 tsih; /* Target Session Handle */
397 __be32 itt; /* Initiator Task Tag */
398 __be16 cid;
399 __be16 rsvd3;
400 __be32 cmdsn;
401 __be32 exp_statsn;
402 uint8_t rsvd5[16];
403};
404
405/* Login PDU flags */
406#define ISCSI_FLAG_LOGIN_TRANSIT 0x80
407#define ISCSI_FLAG_LOGIN_CONTINUE 0x40
408#define ISCSI_FLAG_LOGIN_CURRENT_STAGE_MASK 0x0C /* 2 bits */
409#define ISCSI_FLAG_LOGIN_NEXT_STAGE_MASK 0x03 /* 2 bits */
410
411#define ISCSI_LOGIN_CURRENT_STAGE(flags) \
412 ((flags & ISCSI_FLAG_LOGIN_CURRENT_STAGE_MASK) >> 2)
413#define ISCSI_LOGIN_NEXT_STAGE(flags) \
414 (flags & ISCSI_FLAG_LOGIN_NEXT_STAGE_MASK)
415
416/* Login Response Header */
417struct iscsi_login_rsp {
418 uint8_t opcode;
419 uint8_t flags;
420 uint8_t max_version; /* Max. version supported */
421 uint8_t active_version; /* Active version */
422 uint8_t hlength;
423 uint8_t dlength[3];
424 uint8_t isid[6]; /* Initiator Session ID */
425 __be16 tsih; /* Target Session Handle */
426 __be32 itt; /* Initiator Task Tag */
427 __be32 rsvd3;
428 __be32 statsn;
429 __be32 exp_cmdsn;
430 __be32 max_cmdsn;
431 uint8_t status_class; /* see Login RSP ststus classes below */
432 uint8_t status_detail; /* see Login RSP Status details below */
433 uint8_t rsvd4[10];
434};
435
436/* Login stage (phase) codes for CSG, NSG */
437#define ISCSI_INITIAL_LOGIN_STAGE -1
438#define ISCSI_SECURITY_NEGOTIATION_STAGE 0
439#define ISCSI_OP_PARMS_NEGOTIATION_STAGE 1
440#define ISCSI_FULL_FEATURE_PHASE 3
441
442/* Login Status response classes */
443#define ISCSI_STATUS_CLS_SUCCESS 0x00
444#define ISCSI_STATUS_CLS_REDIRECT 0x01
445#define ISCSI_STATUS_CLS_INITIATOR_ERR 0x02
446#define ISCSI_STATUS_CLS_TARGET_ERR 0x03
447
448/* Login Status response detail codes */
449/* Class-0 (Success) */
450#define ISCSI_LOGIN_STATUS_ACCEPT 0x00
451
452/* Class-1 (Redirection) */
453#define ISCSI_LOGIN_STATUS_TGT_MOVED_TEMP 0x01
454#define ISCSI_LOGIN_STATUS_TGT_MOVED_PERM 0x02
455
456/* Class-2 (Initiator Error) */
457#define ISCSI_LOGIN_STATUS_INIT_ERR 0x00
458#define ISCSI_LOGIN_STATUS_AUTH_FAILED 0x01
459#define ISCSI_LOGIN_STATUS_TGT_FORBIDDEN 0x02
460#define ISCSI_LOGIN_STATUS_TGT_NOT_FOUND 0x03
461#define ISCSI_LOGIN_STATUS_TGT_REMOVED 0x04
462#define ISCSI_LOGIN_STATUS_NO_VERSION 0x05
463#define ISCSI_LOGIN_STATUS_ISID_ERROR 0x06
464#define ISCSI_LOGIN_STATUS_MISSING_FIELDS 0x07
465#define ISCSI_LOGIN_STATUS_CONN_ADD_FAILED 0x08
466#define ISCSI_LOGIN_STATUS_NO_SESSION_TYPE 0x09
467#define ISCSI_LOGIN_STATUS_NO_SESSION 0x0a
468#define ISCSI_LOGIN_STATUS_INVALID_REQUEST 0x0b
469
470/* Class-3 (Target Error) */
471#define ISCSI_LOGIN_STATUS_TARGET_ERROR 0x00
472#define ISCSI_LOGIN_STATUS_SVC_UNAVAILABLE 0x01
473#define ISCSI_LOGIN_STATUS_NO_RESOURCES 0x02
474
475/* Logout Header */
476struct iscsi_logout {
477 uint8_t opcode;
478 uint8_t flags;
479 uint8_t rsvd1[2];
480 uint8_t hlength;
481 uint8_t dlength[3];
482 uint8_t rsvd2[8];
483 __be32 itt; /* Initiator Task Tag */
484 __be16 cid;
485 uint8_t rsvd3[2];
486 __be32 cmdsn;
487 __be32 exp_statsn;
488 uint8_t rsvd4[16];
489};
490
491/* Logout PDU flags */
492#define ISCSI_FLAG_LOGOUT_REASON_MASK 0x7F
493
494/* logout reason_code values */
495
496#define ISCSI_LOGOUT_REASON_CLOSE_SESSION 0
497#define ISCSI_LOGOUT_REASON_CLOSE_CONNECTION 1
498#define ISCSI_LOGOUT_REASON_RECOVERY 2
499#define ISCSI_LOGOUT_REASON_AEN_REQUEST 3
500
501/* Logout Response Header */
502struct iscsi_logout_rsp {
503 uint8_t opcode;
504 uint8_t flags;
505 uint8_t response; /* see Logout response values below */
506 uint8_t rsvd2;
507 uint8_t hlength;
508 uint8_t dlength[3];
509 uint8_t rsvd3[8];
510 __be32 itt; /* Initiator Task Tag */
511 __be32 rsvd4;
512 __be32 statsn;
513 __be32 exp_cmdsn;
514 __be32 max_cmdsn;
515 __be32 rsvd5;
516 __be16 t2wait;
517 __be16 t2retain;
518 __be32 rsvd6;
519};
520
521/* logout response status values */
522
523#define ISCSI_LOGOUT_SUCCESS 0
524#define ISCSI_LOGOUT_CID_NOT_FOUND 1
525#define ISCSI_LOGOUT_RECOVERY_UNSUPPORTED 2
526#define ISCSI_LOGOUT_CLEANUP_FAILED 3
527
528/* SNACK Header */
529struct iscsi_snack {
530 uint8_t opcode;
531 uint8_t flags;
532 uint8_t rsvd2[14];
533 __be32 itt;
534 __be32 begrun;
535 __be32 runlength;
536 __be32 exp_statsn;
537 __be32 rsvd3;
538 __be32 exp_datasn;
539 uint8_t rsvd6[8];
540};
541
542/* SNACK PDU flags */
543#define ISCSI_FLAG_SNACK_TYPE_MASK 0x0F /* 4 bits */
544
545/* Reject Message Header */
546struct iscsi_reject {
547 uint8_t opcode;
548 uint8_t flags;
549 uint8_t reason;
550 uint8_t rsvd2;
551 uint8_t hlength;
552 uint8_t dlength[3];
553 uint8_t rsvd3[8];
554 __be32 ffffffff;
555 uint8_t rsvd4[4];
556 __be32 statsn;
557 __be32 exp_cmdsn;
558 __be32 max_cmdsn;
559 __be32 datasn;
560 uint8_t rsvd5[8];
561 /* Text - Rejected hdr */
562};
563
564/* Reason for Reject */
565#define ISCSI_REASON_CMD_BEFORE_LOGIN 1
566#define ISCSI_REASON_DATA_DIGEST_ERROR 2
567#define ISCSI_REASON_DATA_SNACK_REJECT 3
568#define ISCSI_REASON_PROTOCOL_ERROR 4
569#define ISCSI_REASON_CMD_NOT_SUPPORTED 5
570#define ISCSI_REASON_IMM_CMD_REJECT 6
571#define ISCSI_REASON_TASK_IN_PROGRESS 7
572#define ISCSI_REASON_INVALID_SNACK 8
573#define ISCSI_REASON_BOOKMARK_INVALID 9
574#define ISCSI_REASON_BOOKMARK_NO_RESOURCES 10
575#define ISCSI_REASON_NEGOTIATION_RESET 11
576
577/* Max. number of Key=Value pairs in a text message */
578#define MAX_KEY_VALUE_PAIRS 8192
579
580/* maximum length for text keys/values */
581#define KEY_MAXLEN 64
582#define VALUE_MAXLEN 255
583#define TARGET_NAME_MAXLEN VALUE_MAXLEN
584
585#define DEFAULT_MAX_RECV_DATA_SEGMENT_LENGTH 8192
586
587/************************* RFC 3720 End *****************************/
588
589#endif /* ISCSI_PROTO_H */
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 7ece05666feb..85cfd88461c8 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -148,6 +148,12 @@ struct scsi_device {
148#define transport_class_to_sdev(class_dev) \ 148#define transport_class_to_sdev(class_dev) \
149 to_scsi_device(class_dev->dev) 149 to_scsi_device(class_dev->dev)
150 150
151#define sdev_printk(prefix, sdev, fmt, a...) \
152 dev_printk(prefix, &(sdev)->sdev_gendev, fmt, ##a)
153
154#define scmd_printk(prefix, scmd, fmt, a...) \
155 dev_printk(prefix, &(scmd)->device->sdev_gendev, fmt, ##a)
156
151/* 157/*
152 * scsi_target: representation of a scsi target, for now, this is only 158 * scsi_target: representation of a scsi target, for now, this is only
153 * used for single_lun devices. If no one has active IO to the target, 159 * used for single_lun devices. If no one has active IO to the target,
@@ -177,6 +183,9 @@ static inline struct scsi_target *scsi_target(struct scsi_device *sdev)
177#define transport_class_to_starget(class_dev) \ 183#define transport_class_to_starget(class_dev) \
178 to_scsi_target(class_dev->dev) 184 to_scsi_target(class_dev->dev)
179 185
186#define starget_printk(prefix, starget, fmt, a...) \
187 dev_printk(prefix, &(starget)->dev, fmt, ##a)
188
180extern struct scsi_device *__scsi_add_device(struct Scsi_Host *, 189extern struct scsi_device *__scsi_add_device(struct Scsi_Host *,
181 uint, uint, uint, void *hostdata); 190 uint, uint, uint, void *hostdata);
182extern int scsi_add_device(struct Scsi_Host *host, uint channel, 191extern int scsi_add_device(struct Scsi_Host *host, uint channel,
@@ -266,6 +275,19 @@ extern int scsi_execute_req(struct scsi_device *sdev, const unsigned char *cmd,
266 int data_direction, void *buffer, unsigned bufflen, 275 int data_direction, void *buffer, unsigned bufflen,
267 struct scsi_sense_hdr *, int timeout, int retries); 276 struct scsi_sense_hdr *, int timeout, int retries);
268 277
278static inline unsigned int sdev_channel(struct scsi_device *sdev)
279{
280 return sdev->channel;
281}
282
283static inline unsigned int sdev_id(struct scsi_device *sdev)
284{
285 return sdev->id;
286}
287
288#define scmd_id(scmd) sdev_id((scmd)->device)
289#define scmd_channel(scmd) sdev_channel((scmd)->device)
290
269static inline int scsi_device_online(struct scsi_device *sdev) 291static inline int scsi_device_online(struct scsi_device *sdev)
270{ 292{
271 return sdev->sdev_state != SDEV_OFFLINE; 293 return sdev->sdev_state != SDEV_OFFLINE;
diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h
index 69313ba7505b..ecd53d7872d2 100644
--- a/include/scsi/scsi_host.h
+++ b/include/scsi/scsi_host.h
@@ -609,6 +609,10 @@ struct Scsi_Host {
609#define class_to_shost(d) \ 609#define class_to_shost(d) \
610 container_of(d, struct Scsi_Host, shost_classdev) 610 container_of(d, struct Scsi_Host, shost_classdev)
611 611
612#define shost_printk(prefix, shost, fmt, a...) \
613 dev_printk(prefix, &(shost)->shost_gendev, fmt, ##a)
614
615
612int scsi_is_host_device(const struct device *); 616int scsi_is_host_device(const struct device *);
613 617
614static inline struct Scsi_Host *dev_to_shost(struct device *dev) 618static inline struct Scsi_Host *dev_to_shost(struct device *dev)
@@ -634,8 +638,6 @@ extern void scsi_flush_work(struct Scsi_Host *);
634extern struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *, int); 638extern struct Scsi_Host *scsi_host_alloc(struct scsi_host_template *, int);
635extern int __must_check scsi_add_host(struct Scsi_Host *, struct device *); 639extern int __must_check scsi_add_host(struct Scsi_Host *, struct device *);
636extern void scsi_scan_host(struct Scsi_Host *); 640extern void scsi_scan_host(struct Scsi_Host *);
637extern void scsi_scan_single_target(struct Scsi_Host *, unsigned int,
638 unsigned int);
639extern void scsi_rescan_device(struct device *); 641extern void scsi_rescan_device(struct device *);
640extern void scsi_remove_host(struct Scsi_Host *); 642extern void scsi_remove_host(struct Scsi_Host *);
641extern struct Scsi_Host *scsi_host_get(struct Scsi_Host *); 643extern struct Scsi_Host *scsi_host_get(struct Scsi_Host *);
diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h
index c04405bead2d..fac547d32a98 100644
--- a/include/scsi/scsi_transport_fc.h
+++ b/include/scsi/scsi_transport_fc.h
@@ -29,6 +29,7 @@
29 29
30#include <linux/config.h> 30#include <linux/config.h>
31#include <linux/sched.h> 31#include <linux/sched.h>
32#include <scsi/scsi.h>
32 33
33struct scsi_transport_template; 34struct scsi_transport_template;
34 35
@@ -385,6 +386,8 @@ struct fc_function_template {
385 struct fc_host_statistics * (*get_fc_host_stats)(struct Scsi_Host *); 386 struct fc_host_statistics * (*get_fc_host_stats)(struct Scsi_Host *);
386 void (*reset_fc_host_stats)(struct Scsi_Host *); 387 void (*reset_fc_host_stats)(struct Scsi_Host *);
387 388
389 int (*issue_fc_host_lip)(struct Scsi_Host *);
390
388 /* allocation lengths for host-specific data */ 391 /* allocation lengths for host-specific data */
389 u32 dd_fcrport_size; 392 u32 dd_fcrport_size;
390 393
@@ -428,6 +431,34 @@ struct fc_function_template {
428}; 431};
429 432
430 433
434/**
435 * fc_remote_port_chkready - called to validate the remote port state
436 * prior to initiating io to the port.
437 *
438 * Returns a scsi result code that can be returned by the LLDD.
439 *
440 * @rport: remote port to be checked
441 **/
442static inline int
443fc_remote_port_chkready(struct fc_rport *rport)
444{
445 int result;
446
447 switch (rport->port_state) {
448 case FC_PORTSTATE_ONLINE:
449 result = 0;
450 break;
451 case FC_PORTSTATE_BLOCKED:
452 result = DID_BUS_BUSY << 16;
453 break;
454 default:
455 result = DID_NO_CONNECT << 16;
456 break;
457 }
458 return result;
459}
460
461
431struct scsi_transport_template *fc_attach_transport( 462struct scsi_transport_template *fc_attach_transport(
432 struct fc_function_template *); 463 struct fc_function_template *);
433void fc_release_transport(struct scsi_transport_template *); 464void fc_release_transport(struct scsi_transport_template *);
@@ -436,8 +467,6 @@ struct fc_rport *fc_remote_port_add(struct Scsi_Host *shost,
436 int channel, struct fc_rport_identifiers *ids); 467 int channel, struct fc_rport_identifiers *ids);
437void fc_remote_port_delete(struct fc_rport *rport); 468void fc_remote_port_delete(struct fc_rport *rport);
438void fc_remote_port_rolechg(struct fc_rport *rport, u32 roles); 469void fc_remote_port_rolechg(struct fc_rport *rport, u32 roles);
439int fc_remote_port_block(struct fc_rport *rport);
440void fc_remote_port_unblock(struct fc_rport *rport);
441int scsi_is_fc_rport(const struct device *); 470int scsi_is_fc_rport(const struct device *);
442 471
443static inline u64 wwn_to_u64(u8 *wwn) 472static inline u64 wwn_to_u64(u8 *wwn)
diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h
index 1b26a6c0aa2a..f25041c386ec 100644
--- a/include/scsi/scsi_transport_iscsi.h
+++ b/include/scsi/scsi_transport_iscsi.h
@@ -1,8 +1,10 @@
1/* 1/*
2 * iSCSI transport class definitions 2 * iSCSI transport class definitions
3 * 3 *
4 * Copyright (C) IBM Corporation, 2004 4 * Copyright (C) IBM Corporation, 2004
5 * Copyright (C) Mike Christie, 2004 5 * Copyright (C) Mike Christie, 2004 - 2005
6 * Copyright (C) Dmitry Yusupov, 2004 - 2005
7 * Copyright (C) Alex Aizman, 2004 - 2005
6 * 8 *
7 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -21,158 +23,64 @@
21#ifndef SCSI_TRANSPORT_ISCSI_H 23#ifndef SCSI_TRANSPORT_ISCSI_H
22#define SCSI_TRANSPORT_ISCSI_H 24#define SCSI_TRANSPORT_ISCSI_H
23 25
24#include <linux/config.h> 26#include <scsi/iscsi_if.h>
25#include <linux/in6.h>
26#include <linux/in.h>
27
28struct scsi_transport_template;
29 27
30struct iscsi_class_session { 28/**
31 uint8_t isid[6]; 29 * struct iscsi_transport - iSCSI Transport template
32 uint16_t tsih; 30 *
33 int header_digest; /* 1 CRC32, 0 None */ 31 * @name: transport name
34 int data_digest; /* 1 CRC32, 0 None */ 32 * @caps: iSCSI Data-Path capabilities
35 uint16_t tpgt; 33 * @create_session: create new iSCSI session object
36 union { 34 * @destroy_session: destroy existing iSCSI session object
37 struct in6_addr sin6_addr; 35 * @create_conn: create new iSCSI connection
38 struct in_addr sin_addr; 36 * @bind_conn: associate this connection with existing iSCSI session
39 } u; 37 * and specified transport descriptor
40 sa_family_t addr_type; /* must be AF_INET or AF_INET6 */ 38 * @destroy_conn: destroy inactive iSCSI connection
41 uint16_t port; /* must be in network byte order */ 39 * @set_param: set iSCSI Data-Path operational parameter
42 int initial_r2t; /* 1 Yes, 0 No */ 40 * @start_conn: set connection to be operational
43 int immediate_data; /* 1 Yes, 0 No */ 41 * @stop_conn: suspend/recover/terminate connection
44 uint32_t max_recv_data_segment_len; 42 * @send_pdu: send iSCSI PDU, Login, Logout, NOP-Out, Reject, Text.
45 uint32_t max_burst_len; 43 *
46 uint32_t first_burst_len; 44 * Template API provided by iSCSI Transport
47 uint16_t def_time2wait; 45 */
48 uint16_t def_time2retain; 46struct iscsi_transport {
49 uint16_t max_outstanding_r2t; 47 struct module *owner;
50 int data_pdu_in_order; /* 1 Yes, 0 No */ 48 char *name;
51 int data_sequence_in_order; /* 1 Yes, 0 No */ 49 unsigned int caps;
52 int erl; 50 struct scsi_host_template *host_template;
51 int hostdata_size;
52 int max_lun;
53 unsigned int max_conn;
54 unsigned int max_cmd_len;
55 iscsi_sessionh_t (*create_session) (uint32_t initial_cmdsn,
56 struct Scsi_Host *shost);
57 void (*destroy_session) (iscsi_sessionh_t session);
58 iscsi_connh_t (*create_conn) (iscsi_sessionh_t session, uint32_t cid);
59 int (*bind_conn) (iscsi_sessionh_t session, iscsi_connh_t conn,
60 uint32_t transport_fd, int is_leading);
61 int (*start_conn) (iscsi_connh_t conn);
62 void (*stop_conn) (iscsi_connh_t conn, int flag);
63 void (*destroy_conn) (iscsi_connh_t conn);
64 int (*set_param) (iscsi_connh_t conn, enum iscsi_param param,
65 uint32_t value);
66 int (*get_param) (iscsi_connh_t conn, enum iscsi_param param,
67 uint32_t *value);
68 int (*send_pdu) (iscsi_connh_t conn, struct iscsi_hdr *hdr,
69 char *data, uint32_t data_size);
70 void (*get_stats) (iscsi_connh_t conn, struct iscsi_stats *stats);
53}; 71};
54 72
55/* 73/*
56 * accessor macros 74 * transport registration upcalls
57 */ 75 */
58#define iscsi_isid(x) \ 76extern int iscsi_register_transport(struct iscsi_transport *tt);
59 (((struct iscsi_class_session *)&(x)->starget_data)->isid) 77extern int iscsi_unregister_transport(struct iscsi_transport *tt);
60#define iscsi_tsih(x) \
61 (((struct iscsi_class_session *)&(x)->starget_data)->tsih)
62#define iscsi_header_digest(x) \
63 (((struct iscsi_class_session *)&(x)->starget_data)->header_digest)
64#define iscsi_data_digest(x) \
65 (((struct iscsi_class_session *)&(x)->starget_data)->data_digest)
66#define iscsi_port(x) \
67 (((struct iscsi_class_session *)&(x)->starget_data)->port)
68#define iscsi_addr_type(x) \
69 (((struct iscsi_class_session *)&(x)->starget_data)->addr_type)
70#define iscsi_sin_addr(x) \
71 (((struct iscsi_class_session *)&(x)->starget_data)->u.sin_addr)
72#define iscsi_sin6_addr(x) \
73 (((struct iscsi_class_session *)&(x)->starget_data)->u.sin6_addr)
74#define iscsi_tpgt(x) \
75 (((struct iscsi_class_session *)&(x)->starget_data)->tpgt)
76#define iscsi_initial_r2t(x) \
77 (((struct iscsi_class_session *)&(x)->starget_data)->initial_r2t)
78#define iscsi_immediate_data(x) \
79 (((struct iscsi_class_session *)&(x)->starget_data)->immediate_data)
80#define iscsi_max_recv_data_segment_len(x) \
81 (((struct iscsi_class_session *)&(x)->starget_data)->max_recv_data_segment_len)
82#define iscsi_max_burst_len(x) \
83 (((struct iscsi_class_session *)&(x)->starget_data)->max_burst_len)
84#define iscsi_first_burst_len(x) \
85 (((struct iscsi_class_session *)&(x)->starget_data)->first_burst_len)
86#define iscsi_def_time2wait(x) \
87 (((struct iscsi_class_session *)&(x)->starget_data)->def_time2wait)
88#define iscsi_def_time2retain(x) \
89 (((struct iscsi_class_session *)&(x)->starget_data)->def_time2retain)
90#define iscsi_max_outstanding_r2t(x) \
91 (((struct iscsi_class_session *)&(x)->starget_data)->max_outstanding_r2t)
92#define iscsi_data_pdu_in_order(x) \
93 (((struct iscsi_class_session *)&(x)->starget_data)->data_pdu_in_order)
94#define iscsi_data_sequence_in_order(x) \
95 (((struct iscsi_class_session *)&(x)->starget_data)->data_sequence_in_order)
96#define iscsi_erl(x) \
97 (((struct iscsi_class_session *)&(x)->starget_data)->erl)
98 78
99/* 79/*
100 * The functions by which the transport class and the driver communicate 80 * control plane upcalls
101 */ 81 */
102struct iscsi_function_template { 82extern void iscsi_conn_error(iscsi_connh_t conn, enum iscsi_err error);
103 /* 83extern int iscsi_recv_pdu(iscsi_connh_t conn, struct iscsi_hdr *hdr,
104 * target attrs 84 char *data, uint32_t data_size);
105 */
106 void (*get_isid)(struct scsi_target *);
107 void (*get_tsih)(struct scsi_target *);
108 void (*get_header_digest)(struct scsi_target *);
109 void (*get_data_digest)(struct scsi_target *);
110 void (*get_port)(struct scsi_target *);
111 void (*get_tpgt)(struct scsi_target *);
112 /*
113 * In get_ip_address the lld must set the address and
114 * the address type
115 */
116 void (*get_ip_address)(struct scsi_target *);
117 /*
118 * The lld should snprintf the name or alias to the buffer
119 */
120 ssize_t (*get_target_name)(struct scsi_target *, char *, ssize_t);
121 ssize_t (*get_target_alias)(struct scsi_target *, char *, ssize_t);
122 void (*get_initial_r2t)(struct scsi_target *);
123 void (*get_immediate_data)(struct scsi_target *);
124 void (*get_max_recv_data_segment_len)(struct scsi_target *);
125 void (*get_max_burst_len)(struct scsi_target *);
126 void (*get_first_burst_len)(struct scsi_target *);
127 void (*get_def_time2wait)(struct scsi_target *);
128 void (*get_def_time2retain)(struct scsi_target *);
129 void (*get_max_outstanding_r2t)(struct scsi_target *);
130 void (*get_data_pdu_in_order)(struct scsi_target *);
131 void (*get_data_sequence_in_order)(struct scsi_target *);
132 void (*get_erl)(struct scsi_target *);
133
134 /*
135 * host atts
136 */
137
138 /*
139 * The lld should snprintf the name or alias to the buffer
140 */
141 ssize_t (*get_initiator_alias)(struct Scsi_Host *, char *, ssize_t);
142 ssize_t (*get_initiator_name)(struct Scsi_Host *, char *, ssize_t);
143 /*
144 * The driver sets these to tell the transport class it
145 * wants the attributes displayed in sysfs. If the show_ flag
146 * is not set, the attribute will be private to the transport
147 * class. We could probably just test if a get_ fn was set
148 * since we only use the values for sysfs but this is how
149 * fc does it too.
150 */
151 unsigned long show_isid:1;
152 unsigned long show_tsih:1;
153 unsigned long show_header_digest:1;
154 unsigned long show_data_digest:1;
155 unsigned long show_port:1;
156 unsigned long show_tpgt:1;
157 unsigned long show_ip_address:1;
158 unsigned long show_target_name:1;
159 unsigned long show_target_alias:1;
160 unsigned long show_initial_r2t:1;
161 unsigned long show_immediate_data:1;
162 unsigned long show_max_recv_data_segment_len:1;
163 unsigned long show_max_burst_len:1;
164 unsigned long show_first_burst_len:1;
165 unsigned long show_def_time2wait:1;
166 unsigned long show_def_time2retain:1;
167 unsigned long show_max_outstanding_r2t:1;
168 unsigned long show_data_pdu_in_order:1;
169 unsigned long show_data_sequence_in_order:1;
170 unsigned long show_erl:1;
171 unsigned long show_initiator_name:1;
172 unsigned long show_initiator_alias:1;
173};
174
175struct scsi_transport_template *iscsi_attach_transport(struct iscsi_function_template *);
176void iscsi_release_transport(struct scsi_transport_template *);
177 85
178#endif 86#endif
diff --git a/include/scsi/scsi_transport_sas.h b/include/scsi/scsi_transport_sas.h
index bc4aeb660dd3..b91400bfb02a 100644
--- a/include/scsi/scsi_transport_sas.h
+++ b/include/scsi/scsi_transport_sas.h
@@ -41,20 +41,31 @@ struct sas_identify {
41 u8 phy_identifier; 41 u8 phy_identifier;
42}; 42};
43 43
44/* The functions by which the transport class and the driver communicate */
45struct sas_function_template {
46};
47
48struct sas_phy { 44struct sas_phy {
49 struct device dev; 45 struct device dev;
50 int number; 46 int number;
47
48 /* phy identification */
51 struct sas_identify identify; 49 struct sas_identify identify;
50
51 /* phy attributes */
52 enum sas_linkrate negotiated_linkrate; 52 enum sas_linkrate negotiated_linkrate;
53 enum sas_linkrate minimum_linkrate_hw; 53 enum sas_linkrate minimum_linkrate_hw;
54 enum sas_linkrate minimum_linkrate; 54 enum sas_linkrate minimum_linkrate;
55 enum sas_linkrate maximum_linkrate_hw; 55 enum sas_linkrate maximum_linkrate_hw;
56 enum sas_linkrate maximum_linkrate; 56 enum sas_linkrate maximum_linkrate;
57 u8 port_identifier; 57 u8 port_identifier;
58
59 /* internal state */
60 unsigned int local_attached : 1;
61
62 /* link error statistics */
63 u32 invalid_dword_count;
64 u32 running_disparity_error_count;
65 u32 loss_of_dword_sync_count;
66 u32 phy_reset_problem_count;
67
68 /* the other end of the link */
58 struct sas_rphy *rphy; 69 struct sas_rphy *rphy;
59}; 70};
60 71
@@ -79,6 +90,14 @@ struct sas_rphy {
79#define rphy_to_shost(rphy) \ 90#define rphy_to_shost(rphy) \
80 dev_to_shost((rphy)->dev.parent) 91 dev_to_shost((rphy)->dev.parent)
81 92
93
94/* The functions by which the transport class and the driver communicate */
95struct sas_function_template {
96 int (*get_linkerrors)(struct sas_phy *);
97 int (*phy_reset)(struct sas_phy *, int);
98};
99
100
82extern void sas_remove_host(struct Scsi_Host *); 101extern void sas_remove_host(struct Scsi_Host *);
83 102
84extern struct sas_phy *sas_phy_alloc(struct device *, int); 103extern struct sas_phy *sas_phy_alloc(struct device *, int);
diff --git a/include/scsi/srp.h b/include/scsi/srp.h
new file mode 100644
index 000000000000..6c2681dc5b46
--- /dev/null
+++ b/include/scsi/srp.h
@@ -0,0 +1,226 @@
1/*
2 * Copyright (c) 2005 Cisco Systems. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 * $Id$
33 */
34
35#ifndef SCSI_SRP_H
36#define SCSI_SRP_H
37
38/*
39 * Structures and constants for the SCSI RDMA Protocol (SRP) as
40 * defined by the INCITS T10 committee. This file was written using
41 * draft Revision 16a of the SRP standard.
42 */
43
44#include <linux/types.h>
45
46enum {
47 SRP_LOGIN_REQ = 0x00,
48 SRP_TSK_MGMT = 0x01,
49 SRP_CMD = 0x02,
50 SRP_I_LOGOUT = 0x03,
51 SRP_LOGIN_RSP = 0xc0,
52 SRP_RSP = 0xc1,
53 SRP_LOGIN_REJ = 0xc2,
54 SRP_T_LOGOUT = 0x80,
55 SRP_CRED_REQ = 0x81,
56 SRP_AER_REQ = 0x82,
57 SRP_CRED_RSP = 0x41,
58 SRP_AER_RSP = 0x42
59};
60
61enum {
62 SRP_BUF_FORMAT_DIRECT = 1 << 1,
63 SRP_BUF_FORMAT_INDIRECT = 1 << 2
64};
65
66enum {
67 SRP_NO_DATA_DESC = 0,
68 SRP_DATA_DESC_DIRECT = 1,
69 SRP_DATA_DESC_INDIRECT = 2
70};
71
72enum {
73 SRP_TSK_ABORT_TASK = 0x01,
74 SRP_TSK_ABORT_TASK_SET = 0x02,
75 SRP_TSK_CLEAR_TASK_SET = 0x04,
76 SRP_TSK_LUN_RESET = 0x08,
77 SRP_TSK_CLEAR_ACA = 0x40
78};
79
80enum srp_login_rej_reason {
81 SRP_LOGIN_REJ_UNABLE_ESTABLISH_CHANNEL = 0x00010000,
82 SRP_LOGIN_REJ_INSUFFICIENT_RESOURCES = 0x00010001,
83 SRP_LOGIN_REJ_REQ_IT_IU_LENGTH_TOO_LARGE = 0x00010002,
84 SRP_LOGIN_REJ_UNABLE_ASSOCIATE_CHANNEL = 0x00010003,
85 SRP_LOGIN_REJ_UNSUPPORTED_DESCRIPTOR_FMT = 0x00010004,
86 SRP_LOGIN_REJ_MULTI_CHANNEL_UNSUPPORTED = 0x00010005,
87 SRP_LOGIN_REJ_CHANNEL_LIMIT_REACHED = 0x00010006
88};
89
90struct srp_direct_buf {
91 __be64 va;
92 __be32 key;
93 __be32 len;
94};
95
96/*
97 * We need the packed attribute because the SRP spec puts the list of
98 * descriptors at an offset of 20, which is not aligned to the size
99 * of struct srp_direct_buf.
100 */
101struct srp_indirect_buf {
102 struct srp_direct_buf table_desc;
103 __be32 len;
104 struct srp_direct_buf desc_list[0] __attribute__((packed));
105};
106
107enum {
108 SRP_MULTICHAN_SINGLE = 0,
109 SRP_MULTICHAN_MULTI = 1
110};
111
112struct srp_login_req {
113 u8 opcode;
114 u8 reserved1[7];
115 u64 tag;
116 __be32 req_it_iu_len;
117 u8 reserved2[4];
118 __be16 req_buf_fmt;
119 u8 req_flags;
120 u8 reserved3[5];
121 u8 initiator_port_id[16];
122 u8 target_port_id[16];
123};
124
125struct srp_login_rsp {
126 u8 opcode;
127 u8 reserved1[3];
128 __be32 req_lim_delta;
129 u64 tag;
130 __be32 max_it_iu_len;
131 __be32 max_ti_iu_len;
132 __be16 buf_fmt;
133 u8 rsp_flags;
134 u8 reserved2[25];
135};
136
137struct srp_login_rej {
138 u8 opcode;
139 u8 reserved1[3];
140 __be32 reason;
141 u64 tag;
142 u8 reserved2[8];
143 __be16 buf_fmt;
144 u8 reserved3[6];
145};
146
147struct srp_i_logout {
148 u8 opcode;
149 u8 reserved[7];
150 u64 tag;
151};
152
153struct srp_t_logout {
154 u8 opcode;
155 u8 sol_not;
156 u8 reserved[2];
157 __be32 reason;
158 u64 tag;
159};
160
161/*
162 * We need the packed attribute because the SRP spec only aligns the
163 * 8-byte LUN field to 4 bytes.
164 */
165struct srp_tsk_mgmt {
166 u8 opcode;
167 u8 sol_not;
168 u8 reserved1[6];
169 u64 tag;
170 u8 reserved2[4];
171 __be64 lun __attribute__((packed));
172 u8 reserved3[2];
173 u8 tsk_mgmt_func;
174 u8 reserved4;
175 u64 task_tag;
176 u8 reserved5[8];
177};
178
179/*
180 * We need the packed attribute because the SRP spec only aligns the
181 * 8-byte LUN field to 4 bytes.
182 */
183struct srp_cmd {
184 u8 opcode;
185 u8 sol_not;
186 u8 reserved1[3];
187 u8 buf_fmt;
188 u8 data_out_desc_cnt;
189 u8 data_in_desc_cnt;
190 u64 tag;
191 u8 reserved2[4];
192 __be64 lun __attribute__((packed));
193 u8 reserved3;
194 u8 task_attr;
195 u8 reserved4;
196 u8 add_cdb_len;
197 u8 cdb[16];
198 u8 add_data[0];
199};
200
201enum {
202 SRP_RSP_FLAG_RSPVALID = 1 << 0,
203 SRP_RSP_FLAG_SNSVALID = 1 << 1,
204 SRP_RSP_FLAG_DOOVER = 1 << 2,
205 SRP_RSP_FLAG_DOUNDER = 1 << 3,
206 SRP_RSP_FLAG_DIOVER = 1 << 4,
207 SRP_RSP_FLAG_DIUNDER = 1 << 5
208};
209
210struct srp_rsp {
211 u8 opcode;
212 u8 sol_not;
213 u8 reserved1[2];
214 __be32 req_lim_delta;
215 u64 tag;
216 u8 reserved2[2];
217 u8 flags;
218 u8 status;
219 __be32 data_out_res_cnt;
220 __be32 data_in_res_cnt;
221 __be32 sense_data_len;
222 __be32 resp_data_len;
223 u8 data[0];
224};
225
226#endif /* SCSI_SRP_H */
diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h
index 14cb2718cb77..46e3c0bf3c94 100644
--- a/include/sound/emu10k1.h
+++ b/include/sound/emu10k1.h
@@ -1055,6 +1055,7 @@ typedef struct {
1055 unsigned char emu10k2_chip; /* Audigy 1 or Audigy 2. */ 1055 unsigned char emu10k2_chip; /* Audigy 1 or Audigy 2. */
1056 unsigned char ca0102_chip; /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */ 1056 unsigned char ca0102_chip; /* Audigy 1 or Audigy 2. Not SB Audigy 2 Value. */
1057 unsigned char ca0108_chip; /* Audigy 2 Value */ 1057 unsigned char ca0108_chip; /* Audigy 2 Value */
1058 unsigned char ca_cardbus_chip; /* Audigy 2 ZS Notebook */
1058 unsigned char ca0151_chip; /* P16V */ 1059 unsigned char ca0151_chip; /* P16V */
1059 unsigned char spk71; /* Has 7.1 speakers */ 1060 unsigned char spk71; /* Has 7.1 speakers */
1060 unsigned char sblive51; /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */ 1061 unsigned char sblive51; /* SBLive! 5.1 - extout 0x11 -> center, 0x12 -> lfe */