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-rw-r--r--include/acpi/acglobal.h2
-rw-r--r--include/asm-alpha/atomic.h19
-rw-r--r--include/asm-arm/arch-clps711x/uncompress.h2
-rw-r--r--include/asm-arm/arch-ebsa110/io.h2
-rw-r--r--include/asm-arm/arch-epxa10db/uncompress.h2
-rw-r--r--include/asm-arm/arch-h720x/uncompress.h2
-rw-r--r--include/asm-arm/arch-imx/irqs.h2
-rw-r--r--include/asm-arm/arch-imx/timex.h2
-rw-r--r--include/asm-arm/arch-integrator/smp.h2
-rw-r--r--include/asm-arm/arch-iop3xx/timex.h2
-rw-r--r--include/asm-arm/arch-ixp4xx/hardware.h1
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h9
-rw-r--r--include/asm-arm/arch-ixp4xx/irqs.h7
-rw-r--r--include/asm-arm/arch-ixp4xx/ixp4xx-regs.h1
-rw-r--r--include/asm-arm/arch-ixp4xx/nslu2.h96
-rw-r--r--include/asm-arm/arch-l7200/aux_reg.h2
-rw-r--r--include/asm-arm/arch-l7200/gp_timers.h2
-rw-r--r--include/asm-arm/arch-omap/board-h4.h6
-rw-r--r--include/asm-arm/arch-omap/board-innovator.h4
-rw-r--r--include/asm-arm/arch-omap/clock.h91
-rw-r--r--include/asm-arm/arch-omap/common.h2
-rw-r--r--include/asm-arm/arch-omap/cpu.h82
-rw-r--r--include/asm-arm/arch-omap/dma.h261
-rw-r--r--include/asm-arm/arch-omap/entry-macro.S14
-rw-r--r--include/asm-arm/arch-omap/fpga.h4
-rw-r--r--include/asm-arm/arch-omap/gpio.h4
-rw-r--r--include/asm-arm/arch-omap/hardware.h8
-rw-r--r--include/asm-arm/arch-omap/io.h32
-rw-r--r--include/asm-arm/arch-omap/irqs.h15
-rw-r--r--include/asm-arm/arch-omap/mcbsp.h2
-rw-r--r--include/asm-arm/arch-omap/memory.h4
-rw-r--r--include/asm-arm/arch-omap/menelaus.h22
-rw-r--r--include/asm-arm/arch-omap/mux.h327
-rw-r--r--include/asm-arm/arch-omap/omap1510.h6
-rw-r--r--include/asm-arm/arch-omap/omap24xx.h17
-rw-r--r--include/asm-arm/arch-omap/omapfb.h281
-rw-r--r--include/asm-arm/arch-omap/pm.h40
-rw-r--r--include/asm-arm/arch-omap/prcm.h429
-rw-r--r--include/asm-arm/arch-omap/sram.h38
-rw-r--r--include/asm-arm/arch-omap/system.h37
-rw-r--r--include/asm-arm/arch-omap/timex.h8
-rw-r--r--include/asm-arm/arch-omap/uncompress.h6
-rw-r--r--include/asm-arm/arch-pxa/akita.h2
-rw-r--r--include/asm-arm/arch-pxa/irq.h5
-rw-r--r--include/asm-arm/arch-pxa/sharpsl.h8
-rw-r--r--include/asm-arm/arch-pxa/ssp.h8
-rw-r--r--include/asm-arm/arch-realview/hardware.h1
-rw-r--r--include/asm-arm/arch-realview/system.h2
-rw-r--r--include/asm-arm/arch-rpc/system.h2
-rw-r--r--include/asm-arm/arch-s3c2410/regs-gpio.h239
-rw-r--r--include/asm-arm/arch-sa1100/io.h2
-rw-r--r--include/asm-arm/arch-sa1100/memory.h14
-rw-r--r--include/asm-arm/atomic.h44
-rw-r--r--include/asm-arm/bitops.h1
-rw-r--r--include/asm-arm/elf.h2
-rw-r--r--include/asm-arm/hardware/amba_serial.h5
-rw-r--r--include/asm-arm/hardware/dec21285.h2
-rw-r--r--include/asm-arm/io.h27
-rw-r--r--include/asm-arm/memory.h1
-rw-r--r--include/asm-arm/mmu_context.h1
-rw-r--r--include/asm-arm/numnodes.h2
-rw-r--r--include/asm-arm/semaphore.h5
-rw-r--r--include/asm-arm/spinlock.h26
-rw-r--r--include/asm-arm/system.h4
-rw-r--r--include/asm-arm/thread_info.h1
-rw-r--r--include/asm-arm/uaccess.h8
-rw-r--r--include/asm-arm26/atomic.h29
-rw-r--r--include/asm-cris/atomic.h27
-rw-r--r--include/asm-frv/atomic.h12
-rw-r--r--include/asm-frv/hardirq.h1
-rw-r--r--include/asm-frv/ide.h8
-rw-r--r--include/asm-frv/page.h4
-rw-r--r--include/asm-frv/semaphore.h2
-rw-r--r--include/asm-frv/thread_info.h2
-rw-r--r--include/asm-generic/sections.h1
-rw-r--r--include/asm-h8300/atomic.h27
-rw-r--r--include/asm-i386/atomic.h21
-rw-r--r--include/asm-i386/mach-default/mach_reboot.h2
-rw-r--r--include/asm-i386/msi.h9
-rw-r--r--include/asm-i386/param.h3
-rw-r--r--include/asm-i386/processor.h4
-rw-r--r--include/asm-i386/signal.h31
-rw-r--r--include/asm-i386/smp.h6
-rw-r--r--include/asm-i386/system.h42
-rw-r--r--include/asm-ia64/atomic.h12
-rw-r--r--include/asm-ia64/delay.h10
-rw-r--r--include/asm-ia64/ia32.h2
-rw-r--r--include/asm-ia64/kdebug.h30
-rw-r--r--include/asm-ia64/local.h4
-rw-r--r--include/asm-ia64/mmu_context.h81
-rw-r--r--include/asm-ia64/msi.h3
-rw-r--r--include/asm-ia64/page.h11
-rw-r--r--include/asm-ia64/pgalloc.h19
-rw-r--r--include/asm-ia64/pgtable.h76
-rw-r--r--include/asm-ia64/sal.h3
-rw-r--r--include/asm-ia64/sn/pcidev.h20
-rw-r--r--include/asm-ia64/sn/sn_sal.h34
-rw-r--r--include/asm-ia64/sn/tioce.h26
-rw-r--r--include/asm-ia64/sn/tioce_provider.h17
-rw-r--r--include/asm-ia64/spinlock.h12
-rw-r--r--include/asm-ia64/tlbflush.h1
-rw-r--r--include/asm-ia64/topology.h2
-rw-r--r--include/asm-m32r/atomic.h21
-rw-r--r--include/asm-m32r/ide.h13
-rw-r--r--include/asm-m32r/mappi3/mappi3_pld.h2
-rw-r--r--include/asm-m32r/system.h64
-rw-r--r--include/asm-m68k/atomic.h12
-rw-r--r--include/asm-m68k/processor.h14
-rw-r--r--include/asm-m68k/thread_info.h91
-rw-r--r--include/asm-m68knommu/atomic.h12
-rw-r--r--include/asm-mips/atomic.h35
-rw-r--r--include/asm-mips/io.h6
-rw-r--r--include/asm-mips/ip32/crime.h2
-rw-r--r--include/asm-mips/ip32/mace.h44
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_ide.h22
-rw-r--r--include/asm-mips/mach-db1x00/db1200.h3
-rw-r--r--include/asm-mips/mach-db1x00/db1x00.h6
-rw-r--r--include/asm-mips/mach-ip32/mc146818rtc.h7
-rw-r--r--include/asm-mips/mach-jmr3927/ds1742.h (renamed from include/asm-mips/mach-jmr3927/asm/ds1742.h)6
-rw-r--r--include/asm-mips/mach-pb1x00/pb1200.h3
-rw-r--r--include/asm-mips/mach-pb1x00/pb1550.h7
-rw-r--r--include/asm-mips/mach-qemu/timex.h16
-rw-r--r--include/asm-mips/mips-boards/seadint.h11
-rw-r--r--include/asm-mips/signal.h21
-rw-r--r--include/asm-parisc/atomic.h20
-rw-r--r--include/asm-parisc/irq.h5
-rw-r--r--include/asm-parisc/smp.h7
-rw-r--r--include/asm-parisc/spinlock.h19
-rw-r--r--include/asm-parisc/tlbflush.h16
-rw-r--r--include/asm-powerpc/abs_addr.h (renamed from include/asm-ppc64/abs_addr.h)6
-rw-r--r--include/asm-powerpc/asm-compat.h55
-rw-r--r--include/asm-powerpc/atomic.h215
-rw-r--r--include/asm-powerpc/auxvec.h2
-rw-r--r--include/asm-powerpc/bitops.h41
-rw-r--r--include/asm-powerpc/btext.h (renamed from include/asm-ppc64/btext.h)0
-rw-r--r--include/asm-powerpc/bug.h19
-rw-r--r--include/asm-powerpc/cache.h40
-rw-r--r--include/asm-powerpc/cacheflush.h (renamed from include/asm-ppc64/cacheflush.h)52
-rw-r--r--include/asm-powerpc/compat.h (renamed from include/asm-ppc64/compat.h)8
-rw-r--r--include/asm-powerpc/cputable.h28
-rw-r--r--include/asm-powerpc/current.h27
-rw-r--r--include/asm-powerpc/delay.h19
-rw-r--r--include/asm-powerpc/dma-mapping.h (renamed from include/asm-ppc/dma-mapping.h)138
-rw-r--r--include/asm-powerpc/eeh.h (renamed from include/asm-ppc64/eeh.h)50
-rw-r--r--include/asm-powerpc/eeh_event.h52
-rw-r--r--include/asm-powerpc/elf.h10
-rw-r--r--include/asm-powerpc/firmware.h6
-rw-r--r--include/asm-powerpc/floppy.h (renamed from include/asm-ppc64/floppy.h)25
-rw-r--r--include/asm-powerpc/futex.h5
-rw-r--r--include/asm-powerpc/hvcall.h (renamed from include/asm-ppc64/hvcall.h)14
-rw-r--r--include/asm-powerpc/hvconsole.h (renamed from include/asm-ppc64/hvconsole.h)0
-rw-r--r--include/asm-powerpc/hvcserver.h (renamed from include/asm-ppc64/hvcserver.h)0
-rw-r--r--include/asm-powerpc/hw_irq.h1
-rw-r--r--include/asm-powerpc/io.h (renamed from include/asm-ppc64/io.h)12
-rw-r--r--include/asm-powerpc/iommu.h2
-rw-r--r--include/asm-powerpc/irq.h6
-rw-r--r--include/asm-powerpc/kexec.h1
-rw-r--r--include/asm-powerpc/lppaca.h (renamed from include/asm-ppc64/lppaca.h)9
-rw-r--r--include/asm-powerpc/machdep.h4
-rw-r--r--include/asm-powerpc/mmu.h (renamed from include/asm-ppc64/mmu.h)23
-rw-r--r--include/asm-powerpc/mmu_context.h (renamed from include/asm-ppc64/mmu_context.h)12
-rw-r--r--include/asm-powerpc/mmzone.h50
-rw-r--r--include/asm-powerpc/nvram.h (renamed from include/asm-ppc64/nvram.h)17
-rw-r--r--include/asm-powerpc/paca.h (renamed from include/asm-ppc64/paca.h)15
-rw-r--r--include/asm-powerpc/page.h179
-rw-r--r--include/asm-powerpc/page_32.h40
-rw-r--r--include/asm-powerpc/page_64.h183
-rw-r--r--include/asm-powerpc/pci-bridge.h (renamed from include/asm-ppc64/pci-bridge.h)27
-rw-r--r--include/asm-powerpc/pci.h (renamed from include/asm-ppc64/pci.h)110
-rw-r--r--include/asm-powerpc/pgalloc.h (renamed from include/asm-ppc64/pgalloc.h)15
-rw-r--r--include/asm-powerpc/pgtable-4k.h (renamed from include/asm-ppc64/pgtable-4k.h)0
-rw-r--r--include/asm-powerpc/pgtable-64k.h (renamed from include/asm-ppc64/pgtable-64k.h)0
-rw-r--r--include/asm-powerpc/pgtable.h (renamed from include/asm-ppc64/pgtable.h)20
-rw-r--r--include/asm-powerpc/ppc-pci.h55
-rw-r--r--include/asm-powerpc/ppc_asm.h39
-rw-r--r--include/asm-powerpc/processor.h72
-rw-r--r--include/asm-powerpc/reg.h7
-rw-r--r--include/asm-powerpc/reg_8xx.h (renamed from include/asm-ppc/cache.h)50
-rw-r--r--include/asm-powerpc/serial.h (renamed from include/asm-ppc64/serial.h)19
-rw-r--r--include/asm-powerpc/signal.h (renamed from include/asm-ppc/signal.h)41
-rw-r--r--include/asm-powerpc/sparsemem.h8
-rw-r--r--include/asm-powerpc/spinlock.h (renamed from include/asm-ppc64/spinlock.h)72
-rw-r--r--include/asm-powerpc/system.h2
-rw-r--r--include/asm-powerpc/tce.h (renamed from include/asm-ppc64/tce.h)8
-rw-r--r--include/asm-powerpc/topology.h16
-rw-r--r--include/asm-powerpc/uaccess.h40
-rw-r--r--include/asm-powerpc/udbg.h (renamed from include/asm-ppc64/udbg.h)14
-rw-r--r--include/asm-powerpc/vdso.h (renamed from include/asm-ppc64/vdso.h)2
-rw-r--r--include/asm-powerpc/vdso_datapage.h108
-rw-r--r--include/asm-powerpc/xmon.h1
-rw-r--r--include/asm-ppc/cacheflush.h49
-rw-r--r--include/asm-ppc/cpm2.h2
-rw-r--r--include/asm-ppc/current.h11
-rw-r--r--include/asm-ppc/immap_85xx.h2
-rw-r--r--include/asm-ppc/io.h17
-rw-r--r--include/asm-ppc/ipic.h2
-rw-r--r--include/asm-ppc/mpc83xx.h2
-rw-r--r--include/asm-ppc/mpc85xx.h2
-rw-r--r--include/asm-ppc/nvram.h73
-rw-r--r--include/asm-ppc/page.h8
-rw-r--r--include/asm-ppc/pgalloc.h2
-rw-r--r--include/asm-ppc/ppc4xx_dma.h3
-rw-r--r--include/asm-ppc/ppc_sys.h2
-rw-r--r--include/asm-ppc64/cache.h36
-rw-r--r--include/asm-ppc64/current.h16
-rw-r--r--include/asm-ppc64/delay.h48
-rw-r--r--include/asm-ppc64/dma-mapping.h136
-rw-r--r--include/asm-ppc64/imalloc.h26
-rw-r--r--include/asm-ppc64/mmzone.h105
-rw-r--r--include/asm-ppc64/page.h333
-rw-r--r--include/asm-ppc64/prom.h218
-rw-r--r--include/asm-ppc64/ptrace-common.h164
-rw-r--r--include/asm-ppc64/signal.h132
-rw-r--r--include/asm-ppc64/system.h308
-rw-r--r--include/asm-ppc64/systemcfg.h64
-rw-r--r--include/asm-s390/atomic.h12
-rw-r--r--include/asm-sh/atomic.h29
-rw-r--r--include/asm-sh64/atomic.h29
-rw-r--r--include/asm-sparc/atomic.h4
-rw-r--r--include/asm-sparc/memreg.h2
-rw-r--r--include/asm-sparc/pcic.h6
-rw-r--r--include/asm-sparc64/atomic.h13
-rw-r--r--include/asm-sparc64/pgtable.h10
-rw-r--r--include/asm-um/ldt-i386.h2
-rw-r--r--include/asm-um/ldt-x86_64.h (renamed from include/asm-um/ldt.h)7
-rw-r--r--include/asm-v850/atomic.h30
-rw-r--r--include/asm-v850/hardirq.h4
-rw-r--r--include/asm-x86_64/apic.h2
-rw-r--r--include/asm-x86_64/atomic.h70
-rw-r--r--include/asm-x86_64/cache.h2
-rw-r--r--include/asm-x86_64/desc.h16
-rw-r--r--include/asm-x86_64/dma.h11
-rw-r--r--include/asm-x86_64/hpet.h35
-rw-r--r--include/asm-x86_64/hw_irq.h2
-rw-r--r--include/asm-x86_64/ia32.h5
-rw-r--r--include/asm-x86_64/mce.h10
-rw-r--r--include/asm-x86_64/mmzone.h9
-rw-r--r--include/asm-x86_64/mpspec.h7
-rw-r--r--include/asm-x86_64/msi.h4
-rw-r--r--include/asm-x86_64/msr.h4
-rw-r--r--include/asm-x86_64/numa.h2
-rw-r--r--include/asm-x86_64/page.h2
-rw-r--r--include/asm-x86_64/param.h3
-rw-r--r--include/asm-x86_64/pda.h1
-rw-r--r--include/asm-x86_64/pgtable.h5
-rw-r--r--include/asm-x86_64/processor.h4
-rw-r--r--include/asm-x86_64/proto.h4
-rw-r--r--include/asm-x86_64/rwlock.h2
-rw-r--r--include/asm-x86_64/rwsem.h283
-rw-r--r--include/asm-x86_64/smp.h9
-rw-r--r--include/asm-x86_64/spinlock.h12
-rw-r--r--include/asm-x86_64/topology.h4
-rw-r--r--include/asm-x86_64/unistd.h3
-rw-r--r--include/asm-xtensa/atomic.h20
-rw-r--r--include/linux/acct.h2
-rw-r--r--include/linux/aio.h13
-rw-r--r--include/linux/atmdev.h18
-rw-r--r--include/linux/bitops.h10
-rw-r--r--include/linux/blkdev.h2
-rw-r--r--include/linux/cache.h2
-rw-r--r--include/linux/cciss_ioctl.h2
-rw-r--r--include/linux/cm4000_cs.h66
-rw-r--r--include/linux/cn_proc.h10
-rw-r--r--include/linux/compat_ioctl.h75
-rw-r--r--include/linux/connector.h2
-rw-r--r--include/linux/cpu.h7
-rw-r--r--include/linux/ds17287rtc.h67
-rw-r--r--include/linux/ds1742rtc.h53
-rw-r--r--include/linux/dvb/audio.h28
-rw-r--r--include/linux/dvb/ca.h36
-rw-r--r--include/linux/dvb/dmx.h20
-rw-r--r--include/linux/dvb/osd.h58
-rw-r--r--include/linux/dvb/video.h44
-rw-r--r--include/linux/fb.h30
-rw-r--r--include/linux/file.h10
-rw-r--r--include/linux/font.h2
-rw-r--r--include/linux/fsl_devices.h2
-rw-r--r--include/linux/genhd.h4
-rw-r--r--include/linux/gfp.h25
-rw-r--r--include/linux/hardirq.h2
-rw-r--r--include/linux/hdreg.h6
-rw-r--r--include/linux/hugetlb.h4
-rw-r--r--include/linux/i2c-id.h2
-rw-r--r--include/linux/ide.h164
-rw-r--r--include/linux/idr.h6
-rw-r--r--include/linux/if_ether.h4
-rw-r--r--include/linux/init_task.h1
-rw-r--r--include/linux/inotify.h2
-rw-r--r--include/linux/interrupt.h1
-rw-r--r--include/linux/ipv6_route.h1
-rw-r--r--include/linux/irq.h2
-rw-r--r--include/linux/jbd.h17
-rw-r--r--include/linux/kprobes.h8
-rw-r--r--include/linux/libata.h19
-rw-r--r--include/linux/list.h26
-rw-r--r--include/linux/memory.h1
-rw-r--r--include/linux/mm.h43
-rw-r--r--include/linux/mmc/protocol.h4
-rw-r--r--include/linux/mmzone.h40
-rw-r--r--include/linux/mtd/cfi.h18
-rw-r--r--include/linux/mtd/onenand.h5
-rw-r--r--include/linux/n_r3964.h20
-rw-r--r--include/linux/netdevice.h7
-rw-r--r--include/linux/netfilter/nfnetlink.h6
-rw-r--r--include/linux/netfilter_ipv4/ipt_sctp.h12
-rw-r--r--include/linux/nfs_fs.h1
-rw-r--r--include/linux/page-flags.h4
-rw-r--r--include/linux/pagemap.h4
-rw-r--r--include/linux/parport_pc.h2
-rw-r--r--include/linux/pci-acpi.h5
-rw-r--r--include/linux/pci.h13
-rw-r--r--include/linux/pci_ids.h11
-rw-r--r--include/linux/percpu.h2
-rw-r--r--include/linux/platform_device.h15
-rw-r--r--include/linux/pm.h49
-rw-r--r--include/linux/pm_legacy.h56
-rw-r--r--include/linux/preempt.h2
-rw-r--r--include/linux/raid_class.h32
-rw-r--r--include/linux/rcupdate.h2
-rw-r--r--include/linux/relayfs_fs.h5
-rw-r--r--include/linux/rmap.h4
-rw-r--r--include/linux/rtnetlink.h4
-rw-r--r--include/linux/sched.h33
-rw-r--r--include/linux/serial_core.h3
-rw-r--r--include/linux/skbuff.h34
-rw-r--r--include/linux/smp_lock.h3
-rw-r--r--include/linux/swap.h6
-rw-r--r--include/linux/sysctl.h7
-rw-r--r--include/linux/tcp.h16
-rw-r--r--include/linux/thread_info.h47
-rw-r--r--include/linux/time.h3
-rw-r--r--include/linux/uinput.h13
-rw-r--r--include/linux/usb.h7
-rw-r--r--include/linux/videodev2.h1
-rw-r--r--include/media/ir-common.h1
-rw-r--r--include/media/ir-kbd-i2c.h2
-rw-r--r--include/media/saa7146.h6
-rw-r--r--include/media/saa7146_vv.h10
-rw-r--r--include/media/tuner.h1
-rw-r--r--include/media/tveeprom.h4
-rw-r--r--include/media/v4l2-common.h110
-rw-r--r--include/net/dn.h4
-rw-r--r--include/net/ieee80211.h2
-rw-r--r--include/net/if_inet6.h2
-rw-r--r--include/net/ipv6.h2
-rw-r--r--include/net/llc_pdu.h2
-rw-r--r--include/net/route.h3
-rw-r--r--include/net/sctp/command.h7
-rw-r--r--include/net/sctp/structs.h19
-rw-r--r--include/net/sock.h6
-rw-r--r--include/net/tcp.h76
-rw-r--r--include/net/xfrm.h1
-rw-r--r--include/rdma/ib_user_verbs.h9
-rw-r--r--include/rdma/ib_verbs.h2
-rw-r--r--include/scsi/scsi_cmnd.h1
-rw-r--r--include/scsi/scsi_host.h7
-rw-r--r--include/scsi/scsi_request.h3
-rw-r--r--include/scsi/scsi_transport_fc.h11
358 files changed, 5682 insertions, 3920 deletions
diff --git a/include/acpi/acglobal.h b/include/acpi/acglobal.h
index e9c2790139ec..4ab2ca18b8df 100644
--- a/include/acpi/acglobal.h
+++ b/include/acpi/acglobal.h
@@ -211,7 +211,7 @@ ACPI_EXTERN u32 acpi_gbl_original_mode;
211ACPI_EXTERN u32 acpi_gbl_rsdp_original_location; 211ACPI_EXTERN u32 acpi_gbl_rsdp_original_location;
212ACPI_EXTERN u32 acpi_gbl_ns_lookup_count; 212ACPI_EXTERN u32 acpi_gbl_ns_lookup_count;
213ACPI_EXTERN u32 acpi_gbl_ps_find_count; 213ACPI_EXTERN u32 acpi_gbl_ps_find_count;
214ACPI_EXTERN u32 acpi_gbl_owner_id_mask; 214ACPI_EXTERN u64 acpi_gbl_owner_id_mask;
215ACPI_EXTERN u16 acpi_gbl_pm1_enable_register_save; 215ACPI_EXTERN u16 acpi_gbl_pm1_enable_register_save;
216ACPI_EXTERN u16 acpi_gbl_global_lock_handle; 216ACPI_EXTERN u16 acpi_gbl_global_lock_handle;
217ACPI_EXTERN u8 acpi_gbl_debugger_configuration; 217ACPI_EXTERN u8 acpi_gbl_debugger_configuration;
diff --git a/include/asm-alpha/atomic.h b/include/asm-alpha/atomic.h
index 20ac3d95ecd9..6183eab006d4 100644
--- a/include/asm-alpha/atomic.h
+++ b/include/asm-alpha/atomic.h
@@ -118,8 +118,6 @@ static __inline__ long atomic_add_return(int i, atomic_t * v)
118 return result; 118 return result;
119} 119}
120 120
121#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
122
123static __inline__ long atomic64_add_return(long i, atomic64_t * v) 121static __inline__ long atomic64_add_return(long i, atomic64_t * v)
124{ 122{
125 long temp, result; 123 long temp, result;
@@ -177,6 +175,21 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
177 return result; 175 return result;
178} 176}
179 177
178#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
179
180#define atomic_add_unless(v, a, u) \
181({ \
182 int c, old; \
183 c = atomic_read(v); \
184 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
185 c = old; \
186 c != (u); \
187})
188#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
189
190#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
191#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
192
180#define atomic_dec_return(v) atomic_sub_return(1,(v)) 193#define atomic_dec_return(v) atomic_sub_return(1,(v))
181#define atomic64_dec_return(v) atomic64_sub_return(1,(v)) 194#define atomic64_dec_return(v) atomic64_sub_return(1,(v))
182 195
@@ -187,6 +200,8 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
187#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0) 200#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0)
188 201
189#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) 202#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0)
203#define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0)
204
190#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) 205#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
191#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0) 206#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)
192 207
diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h
index 7d0ab791b16c..9fc4bcfa1681 100644
--- a/include/asm-arm/arch-clps711x/uncompress.h
+++ b/include/asm-arm/arch-clps711x/uncompress.h
@@ -19,7 +19,7 @@
19 */ 19 */
20#include <linux/config.h> 20#include <linux/config.h>
21#include <asm/arch/io.h> 21#include <asm/arch/io.h>
22#include <asm/arch/hardware.h> 22#include <asm/hardware.h>
23#include <asm/hardware/clps7111.h> 23#include <asm/hardware/clps7111.h>
24 24
25#undef CLPS7111_BASE 25#undef CLPS7111_BASE
diff --git a/include/asm-arm/arch-ebsa110/io.h b/include/asm-arm/arch-ebsa110/io.h
index 68e04c0bb3f7..ae048441c9ed 100644
--- a/include/asm-arm/arch-ebsa110/io.h
+++ b/include/asm-arm/arch-ebsa110/io.h
@@ -64,7 +64,7 @@ void __writel(u32 val, void __iomem *addr);
64#define writew(v,b) __writew(v,b) 64#define writew(v,b) __writew(v,b)
65#define writel(v,b) __writel(v,b) 65#define writel(v,b) __writel(v,b)
66 66
67#define __arch_ioremap(cookie,sz,c,a) ((void __iomem *)(cookie)) 67#define __arch_ioremap(cookie,sz,c) ((void __iomem *)(cookie))
68#define __arch_iounmap(cookie) do { } while (0) 68#define __arch_iounmap(cookie) do { } while (0)
69 69
70extern void insb(unsigned int port, void *buf, int sz); 70extern void insb(unsigned int port, void *buf, int sz);
diff --git a/include/asm-arm/arch-epxa10db/uncompress.h b/include/asm-arm/arch-epxa10db/uncompress.h
index d33ad6a93749..fdfe0e6848f8 100644
--- a/include/asm-arm/arch-epxa10db/uncompress.h
+++ b/include/asm-arm/arch-epxa10db/uncompress.h
@@ -19,7 +19,7 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21#include "asm/arch/platform.h" 21#include "asm/arch/platform.h"
22#include "asm/arch/hardware.h" 22#include "asm/hardware.h"
23#define UART00_TYPE (volatile unsigned int*) 23#define UART00_TYPE (volatile unsigned int*)
24#include "asm/arch/uart00.h" 24#include "asm/arch/uart00.h"
25 25
diff --git a/include/asm-arm/arch-h720x/uncompress.h b/include/asm-arm/arch-h720x/uncompress.h
index 2fffacf85a01..9535764bcc71 100644
--- a/include/asm-arm/arch-h720x/uncompress.h
+++ b/include/asm-arm/arch-h720x/uncompress.h
@@ -7,7 +7,7 @@
7#ifndef __ASM_ARCH_UNCOMPRESS_H 7#ifndef __ASM_ARCH_UNCOMPRESS_H
8#define __ASM_ARCH_UNCOMPRESS_H 8#define __ASM_ARCH_UNCOMPRESS_H
9 9
10#include <asm/arch/hardware.h> 10#include <asm/hardware.h>
11 11
12#define LSR 0x14 12#define LSR 0x14
13#define TEMPTY 0x40 13#define TEMPTY 0x40
diff --git a/include/asm-arm/arch-imx/irqs.h b/include/asm-arm/arch-imx/irqs.h
index 238197cfb9d9..f195542898e0 100644
--- a/include/asm-arm/arch-imx/irqs.h
+++ b/include/asm-arm/arch-imx/irqs.h
@@ -23,7 +23,7 @@
23#define __ARM_IRQS_H__ 23#define __ARM_IRQS_H__
24 24
25/* Use the imx definitions */ 25/* Use the imx definitions */
26#include <asm/arch/hardware.h> 26#include <asm/hardware.h>
27 27
28/* 28/*
29 * IMX Interrupt numbers 29 * IMX Interrupt numbers
diff --git a/include/asm-arm/arch-imx/timex.h b/include/asm-arm/arch-imx/timex.h
index d65ab3cd5d5d..8c91674706b1 100644
--- a/include/asm-arm/arch-imx/timex.h
+++ b/include/asm-arm/arch-imx/timex.h
@@ -21,7 +21,7 @@
21#ifndef __ASM_ARCH_TIMEX_H 21#ifndef __ASM_ARCH_TIMEX_H
22#define __ASM_ARCH_TIMEX_H 22#define __ASM_ARCH_TIMEX_H
23 23
24#include <asm/arch/hardware.h> 24#include <asm/hardware.h>
25#define CLOCK_TICK_RATE (CLK32) 25#define CLOCK_TICK_RATE (CLK32)
26 26
27#endif 27#endif
diff --git a/include/asm-arm/arch-integrator/smp.h b/include/asm-arm/arch-integrator/smp.h
index 0ec7093f7c37..da6981efdc39 100644
--- a/include/asm-arm/arch-integrator/smp.h
+++ b/include/asm-arm/arch-integrator/smp.h
@@ -3,7 +3,7 @@
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5 5
6#include <asm/arch/hardware.h> 6#include <asm/hardware.h>
7#include <asm/io.h> 7#include <asm/io.h>
8 8
9#define hard_smp_processor_id() \ 9#define hard_smp_processor_id() \
diff --git a/include/asm-arm/arch-iop3xx/timex.h b/include/asm-arm/arch-iop3xx/timex.h
index d4187fe9a85a..472badb451c4 100644
--- a/include/asm-arm/arch-iop3xx/timex.h
+++ b/include/asm-arm/arch-iop3xx/timex.h
@@ -4,7 +4,7 @@
4 * IOP3xx architecture timex specifications 4 * IOP3xx architecture timex specifications
5 */ 5 */
6#include <linux/config.h> 6#include <linux/config.h>
7 7#include <asm/hardware.h>
8 8
9#if defined(CONFIG_ARCH_IQ80321) || defined(CONFIG_ARCH_IQ31244) 9#if defined(CONFIG_ARCH_IQ80321) || defined(CONFIG_ARCH_IQ31244)
10 10
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
index 55d85eea8c1a..cfb413c845f7 100644
--- a/include/asm-arm/arch-ixp4xx/hardware.h
+++ b/include/asm-arm/arch-ixp4xx/hardware.h
@@ -44,5 +44,6 @@ extern unsigned int processor_id;
44#include "ixdp425.h" 44#include "ixdp425.h"
45#include "coyote.h" 45#include "coyote.h"
46#include "prpmc1100.h" 46#include "prpmc1100.h"
47#include "nslu2.h"
47 48
48#endif /* _ASM_ARCH_HARDWARE_H */ 49#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 688f7f90d93e..942b622455bc 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
59 * fallback to the default. 59 * fallback to the default.
60 */ 60 */
61static inline void __iomem * 61static inline void __iomem *
62__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align) 62__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
63{ 63{
64 extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
65 if((addr < 0x48000000) || (addr > 0x4fffffff)) 64 if((addr < 0x48000000) || (addr > 0x4fffffff))
66 return __ioremap(addr, size, flags, align); 65 return __ioremap(addr, size, flags);
67 66
68 return (void *)addr; 67 return (void *)addr;
69} 68}
@@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned
71static inline void 70static inline void
72__ixp4xx_iounmap(void __iomem *addr) 71__ixp4xx_iounmap(void __iomem *addr)
73{ 72{
74 extern void __iounmap(void __iomem *addr);
75
76 if ((u32)addr >= VMALLOC_START) 73 if ((u32)addr >= VMALLOC_START)
77 __iounmap(addr); 74 __iounmap(addr);
78} 75}
79 76
80#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x) 77#define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f)
81#define __arch_iounmap(a) __ixp4xx_iounmap(a) 78#define __arch_iounmap(a) __ixp4xx_iounmap(a)
82 79
83#define writeb(v, p) __ixp4xx_writeb(v, p) 80#define writeb(v, p) __ixp4xx_writeb(v, p)
diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h
index ca808281c7f9..2cf4930372bc 100644
--- a/include/asm-arm/arch-ixp4xx/irqs.h
+++ b/include/asm-arm/arch-ixp4xx/irqs.h
@@ -93,4 +93,11 @@
93#define IRQ_COYOTE_PCI_SLOT1 IRQ_IXP4XX_GPIO11 93#define IRQ_COYOTE_PCI_SLOT1 IRQ_IXP4XX_GPIO11
94#define IRQ_COYOTE_IDE IRQ_IXP4XX_GPIO5 94#define IRQ_COYOTE_IDE IRQ_IXP4XX_GPIO5
95 95
96/*
97 * NSLU2 board IRQs
98 */
99#define IRQ_NSLU2_PCI_INTA IRQ_IXP4XX_GPIO11
100#define IRQ_NSLU2_PCI_INTB IRQ_IXP4XX_GPIO10
101#define IRQ_NSLU2_PCI_INTC IRQ_IXP4XX_GPIO9
102
96#endif 103#endif
diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
index 2b149ed59149..9444958bec1e 100644
--- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
+++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
@@ -47,6 +47,7 @@
47 * Queue Manager 47 * Queue Manager
48 */ 48 */
49#define IXP4XX_QMGR_BASE_PHYS (0x60000000) 49#define IXP4XX_QMGR_BASE_PHYS (0x60000000)
50#define IXP4XX_QMGR_REGION_SIZE (0x00004000)
50 51
51/* 52/*
52 * Expansion BUS Configuration registers 53 * Expansion BUS Configuration registers
diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h
new file mode 100644
index 000000000000..b8b347a559c7
--- /dev/null
+++ b/include/asm-arm/arch-ixp4xx/nslu2.h
@@ -0,0 +1,96 @@
1/*
2 * include/asm-arm/arch-ixp4xx/nslu2.h
3 *
4 * NSLU2 platform specific definitions
5 *
6 * Author: Mark Rakes <mrakes AT mac.com>
7 * Maintainers: http://www.nslu2-linux.org
8 *
9 * based on ixdp425.h:
10 * Copyright 2004 (c) MontaVista, Software, Inc.
11 *
12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied.
15 */
16
17#ifndef __ASM_ARCH_HARDWARE_H__
18#error "Do not include this directly, instead #include <asm/hardware.h>"
19#endif
20
21#define NSLU2_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS
22#define NSLU2_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE
23
24#define NSLU2_SDA_PIN 7
25#define NSLU2_SCL_PIN 6
26
27/*
28 * NSLU2 PCI IRQs
29 */
30#define NSLU2_PCI_MAX_DEV 3
31#define NSLU2_PCI_IRQ_LINES 3
32
33
34/* PCI controller GPIO to IRQ pin mappings */
35#define NSLU2_PCI_INTA_PIN 11
36#define NSLU2_PCI_INTB_PIN 10
37#define NSLU2_PCI_INTC_PIN 9
38#define NSLU2_PCI_INTD_PIN 8
39
40
41/* NSLU2 Timer */
42#define NSLU2_FREQ 66000000
43#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
44#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
45
46/* GPIO */
47
48#define NSLU2_GPIO0 0
49#define NSLU2_GPIO1 1
50#define NSLU2_GPIO2 2
51#define NSLU2_GPIO3 3
52#define NSLU2_GPIO4 4
53#define NSLU2_GPIO5 5
54#define NSLU2_GPIO6 6
55#define NSLU2_GPIO7 7
56#define NSLU2_GPIO8 8
57#define NSLU2_GPIO9 9
58#define NSLU2_GPIO10 10
59#define NSLU2_GPIO11 11
60#define NSLU2_GPIO12 12
61#define NSLU2_GPIO13 13
62#define NSLU2_GPIO14 14
63#define NSLU2_GPIO15 15
64
65/* Buttons */
66
67#define NSLU2_PB_GPIO NSLU2_GPIO5
68#define NSLU2_PO_GPIO NSLU2_GPIO8 /* power off */
69#define NSLU2_RB_GPIO NSLU2_GPIO12
70
71#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
72#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
73
74#define NSLU2_PB_BM (1L << NSLU2_PB_GPIO)
75#define NSLU2_PO_BM (1L << NSLU2_PO_GPIO)
76#define NSLU2_RB_BM (1L << NSLU2_RB_GPIO)
77
78/* Buzzer */
79
80#define NSLU2_GPIO_BUZZ 4
81#define NSLU2_BZ_BM (1L << NSLU2_GPIO_BUZZ)
82/* LEDs */
83
84#define NSLU2_LED_RED NSLU2_GPIO0
85#define NSLU2_LED_GRN NSLU2_GPIO1
86
87#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED)
88#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN)
89
90#define NSLU2_LED_DISK1 NSLU2_GPIO2
91#define NSLU2_LED_DISK2 NSLU2_GPIO3
92
93#define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2)
94#define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3)
95
96
diff --git a/include/asm-arm/arch-l7200/aux_reg.h b/include/asm-arm/arch-l7200/aux_reg.h
index 762cbc76c501..5b4396de16a0 100644
--- a/include/asm-arm/arch-l7200/aux_reg.h
+++ b/include/asm-arm/arch-l7200/aux_reg.h
@@ -9,7 +9,7 @@
9#ifndef _ASM_ARCH_AUXREG_H 9#ifndef _ASM_ARCH_AUXREG_H
10#define _ASM_ARCH_AUXREG_H 10#define _ASM_ARCH_AUXREG_H
11 11
12#include <asm/arch/hardware.h> 12#include <asm/hardware.h>
13 13
14#define l7200aux_reg *((volatile unsigned int *) (AUX_BASE)) 14#define l7200aux_reg *((volatile unsigned int *) (AUX_BASE))
15 15
diff --git a/include/asm-arm/arch-l7200/gp_timers.h b/include/asm-arm/arch-l7200/gp_timers.h
index 6f20962df248..9c4804d13578 100644
--- a/include/asm-arm/arch-l7200/gp_timers.h
+++ b/include/asm-arm/arch-l7200/gp_timers.h
@@ -10,7 +10,7 @@
10#ifndef _ASM_ARCH_GPTIMERS_H 10#ifndef _ASM_ARCH_GPTIMERS_H
11#define _ASM_ARCH_GPTIMERS_H 11#define _ASM_ARCH_GPTIMERS_H
12 12
13#include <asm/arch/hardware.h> 13#include <asm/hardware.h>
14 14
15/* 15/*
16 * Layout of L7200 general purpose timer registers 16 * Layout of L7200 general purpose timer registers
diff --git a/include/asm-arm/arch-omap/board-h4.h b/include/asm-arm/arch-omap/board-h4.h
index d64ee9211eed..33ea29a41654 100644
--- a/include/asm-arm/arch-omap/board-h4.h
+++ b/include/asm-arm/arch-omap/board-h4.h
@@ -34,5 +34,11 @@
34#define OMAP24XX_ETHR_START 0x08000300 34#define OMAP24XX_ETHR_START 0x08000300
35#define OMAP24XX_ETHR_GPIO_IRQ 92 35#define OMAP24XX_ETHR_GPIO_IRQ 92
36 36
37#define H4_CS0_BASE 0x04000000
38
39#define H4_CS0_BASE 0x04000000
40
41#define H4_CS0_BASE 0x04000000
42
37#endif /* __ASM_ARCH_OMAP_H4_H */ 43#endif /* __ASM_ARCH_OMAP_H4_H */
38 44
diff --git a/include/asm-arm/arch-omap/board-innovator.h b/include/asm-arm/arch-omap/board-innovator.h
index 79574e0ed13d..b3cf33441f6e 100644
--- a/include/asm-arm/arch-omap/board-innovator.h
+++ b/include/asm-arm/arch-omap/board-innovator.h
@@ -26,7 +26,7 @@
26#ifndef __ASM_ARCH_OMAP_INNOVATOR_H 26#ifndef __ASM_ARCH_OMAP_INNOVATOR_H
27#define __ASM_ARCH_OMAP_INNOVATOR_H 27#define __ASM_ARCH_OMAP_INNOVATOR_H
28 28
29#if defined (CONFIG_ARCH_OMAP1510) 29#if defined (CONFIG_ARCH_OMAP15XX)
30 30
31#ifndef OMAP_SDRAM_DEVICE 31#ifndef OMAP_SDRAM_DEVICE
32#define OMAP_SDRAM_DEVICE D256M_1X16_4B 32#define OMAP_SDRAM_DEVICE D256M_1X16_4B
@@ -44,7 +44,7 @@ void fpga_write(unsigned char val, int reg);
44unsigned char fpga_read(int reg); 44unsigned char fpga_read(int reg);
45#endif 45#endif
46 46
47#endif /* CONFIG_ARCH_OMAP1510 */ 47#endif /* CONFIG_ARCH_OMAP15XX */
48 48
49#if defined (CONFIG_ARCH_OMAP16XX) 49#if defined (CONFIG_ARCH_OMAP16XX)
50 50
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h
new file mode 100644
index 000000000000..740c297eb11c
--- /dev/null
+++ b/include/asm-arm/arch-omap/clock.h
@@ -0,0 +1,91 @@
1/*
2 * linux/include/asm-arm/arch-omap/clock.h
3 *
4 * Copyright (C) 2004 - 2005 Nokia corporation
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ARCH_ARM_OMAP_CLOCK_H
14#define __ARCH_ARM_OMAP_CLOCK_H
15
16struct module;
17
18struct clk {
19 struct list_head node;
20 struct module *owner;
21 const char *name;
22 struct clk *parent;
23 unsigned long rate;
24 __u32 flags;
25 void __iomem *enable_reg;
26 __u8 enable_bit;
27 __u8 rate_offset;
28 __u8 src_offset;
29 __s8 usecount;
30 void (*recalc)(struct clk *);
31 int (*set_rate)(struct clk *, unsigned long);
32 long (*round_rate)(struct clk *, unsigned long);
33 void (*init)(struct clk *);
34 int (*enable)(struct clk *);
35 void (*disable)(struct clk *);
36};
37
38struct clk_functions {
39 int (*clk_enable)(struct clk *clk);
40 void (*clk_disable)(struct clk *clk);
41 int (*clk_use)(struct clk *clk);
42 void (*clk_unuse)(struct clk *clk);
43 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
44 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
45 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
46 struct clk * (*clk_get_parent)(struct clk *clk);
47 void (*clk_allow_idle)(struct clk *clk);
48 void (*clk_deny_idle)(struct clk *clk);
49};
50
51extern unsigned int mpurate;
52extern struct list_head clocks;
53extern spinlock_t clockfw_lock;
54
55extern int clk_init(struct clk_functions * custom_clocks);
56extern int clk_register(struct clk *clk);
57extern void clk_unregister(struct clk *clk);
58extern void propagate_rate(struct clk *clk);
59extern void followparent_recalc(struct clk * clk);
60extern void clk_allow_idle(struct clk *clk);
61extern void clk_deny_idle(struct clk *clk);
62
63/* Clock flags */
64#define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */
65#define RATE_FIXED (1 << 1) /* Fixed clock rate */
66#define RATE_PROPAGATES (1 << 2) /* Program children too */
67#define VIRTUAL_CLOCK (1 << 3) /* Composite clock from table */
68#define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */
69#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */
70#define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */
71#define CLOCK_IDLE_CONTROL (1 << 7)
72#define CLOCK_NO_IDLE_PARENT (1 << 8)
73#define DELAYED_APP (1 << 9) /* Delay application of clock */
74#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
75#define CM_MPU_SEL1 (1 << 11) /* Domain divider/source */
76#define CM_DSP_SEL1 (1 << 12)
77#define CM_GFX_SEL1 (1 << 13)
78#define CM_MODEM_SEL1 (1 << 14)
79#define CM_CORE_SEL1 (1 << 15) /* Sets divider for many */
80#define CM_CORE_SEL2 (1 << 16) /* sets parent for GPT */
81#define CM_WKUP_SEL1 (1 << 17)
82#define CM_PLL_SEL1 (1 << 18)
83#define CM_PLL_SEL2 (1 << 19)
84#define CM_SYSCLKOUT_SEL1 (1 << 20)
85#define CLOCK_IN_OMAP730 (1 << 21)
86#define CLOCK_IN_OMAP1510 (1 << 22)
87#define CLOCK_IN_OMAP16XX (1 << 23)
88#define CLOCK_IN_OMAP242X (1 << 24)
89#define CLOCK_IN_OMAP243X (1 << 25)
90
91#endif
diff --git a/include/asm-arm/arch-omap/common.h b/include/asm-arm/arch-omap/common.h
index 2a676b4f13b5..08d58abd8218 100644
--- a/include/asm-arm/arch-omap/common.h
+++ b/include/asm-arm/arch-omap/common.h
@@ -31,6 +31,6 @@ struct sys_timer;
31 31
32extern void omap_map_common_io(void); 32extern void omap_map_common_io(void);
33extern struct sys_timer omap_timer; 33extern struct sys_timer omap_timer;
34extern void omap_serial_init(int ports[]); 34extern void omap_serial_init(void);
35 35
36#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ 36#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/include/asm-arm/arch-omap/cpu.h b/include/asm-arm/arch-omap/cpu.h
index 1119e2b53e72..ec7eb675d922 100644
--- a/include/asm-arm/arch-omap/cpu.h
+++ b/include/asm-arm/arch-omap/cpu.h
@@ -28,12 +28,7 @@
28 28
29extern unsigned int system_rev; 29extern unsigned int system_rev;
30 30
31#define OMAP_DIE_ID_0 0xfffe1800 31#define omap2_cpu_rev() ((system_rev >> 8) & 0x0f)
32#define OMAP_DIE_ID_1 0xfffe1804
33#define OMAP_PRODUCTION_ID_0 0xfffe2000
34#define OMAP_PRODUCTION_ID_1 0xfffe2004
35#define OMAP32_ID_0 0xfffed400
36#define OMAP32_ID_1 0xfffed404
37 32
38/* 33/*
39 * Test if multicore OMAP support is needed 34 * Test if multicore OMAP support is needed
@@ -50,7 +45,7 @@ extern unsigned int system_rev;
50# define OMAP_NAME omap730 45# define OMAP_NAME omap730
51# endif 46# endif
52#endif 47#endif
53#ifdef CONFIG_ARCH_OMAP1510 48#ifdef CONFIG_ARCH_OMAP15XX
54# ifdef OMAP_NAME 49# ifdef OMAP_NAME
55# undef MULTI_OMAP1 50# undef MULTI_OMAP1
56# define MULTI_OMAP1 51# define MULTI_OMAP1
@@ -79,9 +74,11 @@ extern unsigned int system_rev;
79 * Macros to group OMAP into cpu classes. 74 * Macros to group OMAP into cpu classes.
80 * These can be used in most places. 75 * These can be used in most places.
81 * cpu_is_omap7xx(): True for OMAP730 76 * cpu_is_omap7xx(): True for OMAP730
82 * cpu_is_omap15xx(): True for OMAP1510 and OMAP5910 77 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
83 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 78 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
84 * cpu_is_omap24xx(): True for OMAP2420 79 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
80 * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
81 * cpu_is_omap243x(): True for OMAP2430
85 */ 82 */
86#define GET_OMAP_CLASS (system_rev & 0xff) 83#define GET_OMAP_CLASS (system_rev & 0xff)
87 84
@@ -91,22 +88,35 @@ static inline int is_omap ##class (void) \
91 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ 88 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
92} 89}
93 90
91#define GET_OMAP_SUBCLASS ((system_rev >> 20) & 0x0fff)
92
93#define IS_OMAP_SUBCLASS(subclass, id) \
94static inline int is_omap ##subclass (void) \
95{ \
96 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
97}
98
94IS_OMAP_CLASS(7xx, 0x07) 99IS_OMAP_CLASS(7xx, 0x07)
95IS_OMAP_CLASS(15xx, 0x15) 100IS_OMAP_CLASS(15xx, 0x15)
96IS_OMAP_CLASS(16xx, 0x16) 101IS_OMAP_CLASS(16xx, 0x16)
97IS_OMAP_CLASS(24xx, 0x24) 102IS_OMAP_CLASS(24xx, 0x24)
98 103
104IS_OMAP_SUBCLASS(242x, 0x242)
105IS_OMAP_SUBCLASS(243x, 0x243)
106
99#define cpu_is_omap7xx() 0 107#define cpu_is_omap7xx() 0
100#define cpu_is_omap15xx() 0 108#define cpu_is_omap15xx() 0
101#define cpu_is_omap16xx() 0 109#define cpu_is_omap16xx() 0
102#define cpu_is_omap24xx() 0 110#define cpu_is_omap24xx() 0
111#define cpu_is_omap242x() 0
112#define cpu_is_omap243x() 0
103 113
104#if defined(MULTI_OMAP1) 114#if defined(MULTI_OMAP1)
105# if defined(CONFIG_ARCH_OMAP730) 115# if defined(CONFIG_ARCH_OMAP730)
106# undef cpu_is_omap7xx 116# undef cpu_is_omap7xx
107# define cpu_is_omap7xx() is_omap7xx() 117# define cpu_is_omap7xx() is_omap7xx()
108# endif 118# endif
109# if defined(CONFIG_ARCH_OMAP1510) 119# if defined(CONFIG_ARCH_OMAP15XX)
110# undef cpu_is_omap15xx 120# undef cpu_is_omap15xx
111# define cpu_is_omap15xx() is_omap15xx() 121# define cpu_is_omap15xx() is_omap15xx()
112# endif 122# endif
@@ -119,7 +129,7 @@ IS_OMAP_CLASS(24xx, 0x24)
119# undef cpu_is_omap7xx 129# undef cpu_is_omap7xx
120# define cpu_is_omap7xx() 1 130# define cpu_is_omap7xx() 1
121# endif 131# endif
122# if defined(CONFIG_ARCH_OMAP1510) 132# if defined(CONFIG_ARCH_OMAP15XX)
123# undef cpu_is_omap15xx 133# undef cpu_is_omap15xx
124# define cpu_is_omap15xx() 1 134# define cpu_is_omap15xx() 1
125# endif 135# endif
@@ -129,13 +139,18 @@ IS_OMAP_CLASS(24xx, 0x24)
129# endif 139# endif
130# if defined(CONFIG_ARCH_OMAP24XX) 140# if defined(CONFIG_ARCH_OMAP24XX)
131# undef cpu_is_omap24xx 141# undef cpu_is_omap24xx
142# undef cpu_is_omap242x
143# undef cpu_is_omap243x
132# define cpu_is_omap24xx() 1 144# define cpu_is_omap24xx() 1
145# define cpu_is_omap242x() is_omap242x()
146# define cpu_is_omap243x() is_omap243x()
133# endif 147# endif
134#endif 148#endif
135 149
136/* 150/*
137 * Macros to detect individual cpu types. 151 * Macros to detect individual cpu types.
138 * These are only rarely needed. 152 * These are only rarely needed.
153 * cpu_is_omap330(): True for OMAP330
139 * cpu_is_omap730(): True for OMAP730 154 * cpu_is_omap730(): True for OMAP730
140 * cpu_is_omap1510(): True for OMAP1510 155 * cpu_is_omap1510(): True for OMAP1510
141 * cpu_is_omap1610(): True for OMAP1610 156 * cpu_is_omap1610(): True for OMAP1610
@@ -144,6 +159,9 @@ IS_OMAP_CLASS(24xx, 0x24)
144 * cpu_is_omap1621(): True for OMAP1621 159 * cpu_is_omap1621(): True for OMAP1621
145 * cpu_is_omap1710(): True for OMAP1710 160 * cpu_is_omap1710(): True for OMAP1710
146 * cpu_is_omap2420(): True for OMAP2420 161 * cpu_is_omap2420(): True for OMAP2420
162 * cpu_is_omap2422(): True for OMAP2422
163 * cpu_is_omap2423(): True for OMAP2423
164 * cpu_is_omap2430(): True for OMAP2430
147 */ 165 */
148#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff) 166#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff)
149 167
@@ -153,6 +171,7 @@ static inline int is_omap ##type (void) \
153 return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ 171 return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
154} 172}
155 173
174IS_OMAP_TYPE(310, 0x0310)
156IS_OMAP_TYPE(730, 0x0730) 175IS_OMAP_TYPE(730, 0x0730)
157IS_OMAP_TYPE(1510, 0x1510) 176IS_OMAP_TYPE(1510, 0x1510)
158IS_OMAP_TYPE(1610, 0x1610) 177IS_OMAP_TYPE(1610, 0x1610)
@@ -161,7 +180,11 @@ IS_OMAP_TYPE(5912, 0x1611)
161IS_OMAP_TYPE(1621, 0x1621) 180IS_OMAP_TYPE(1621, 0x1621)
162IS_OMAP_TYPE(1710, 0x1710) 181IS_OMAP_TYPE(1710, 0x1710)
163IS_OMAP_TYPE(2420, 0x2420) 182IS_OMAP_TYPE(2420, 0x2420)
183IS_OMAP_TYPE(2422, 0x2422)
184IS_OMAP_TYPE(2423, 0x2423)
185IS_OMAP_TYPE(2430, 0x2430)
164 186
187#define cpu_is_omap310() 0
165#define cpu_is_omap730() 0 188#define cpu_is_omap730() 0
166#define cpu_is_omap1510() 0 189#define cpu_is_omap1510() 0
167#define cpu_is_omap1610() 0 190#define cpu_is_omap1610() 0
@@ -170,31 +193,33 @@ IS_OMAP_TYPE(2420, 0x2420)
170#define cpu_is_omap1621() 0 193#define cpu_is_omap1621() 0
171#define cpu_is_omap1710() 0 194#define cpu_is_omap1710() 0
172#define cpu_is_omap2420() 0 195#define cpu_is_omap2420() 0
196#define cpu_is_omap2422() 0
197#define cpu_is_omap2423() 0
198#define cpu_is_omap2430() 0
173 199
174#if defined(MULTI_OMAP1) 200#if defined(MULTI_OMAP1)
175# if defined(CONFIG_ARCH_OMAP730) 201# if defined(CONFIG_ARCH_OMAP730)
176# undef cpu_is_omap730 202# undef cpu_is_omap730
177# define cpu_is_omap730() is_omap730() 203# define cpu_is_omap730() is_omap730()
178# endif 204# endif
179# if defined(CONFIG_ARCH_OMAP1510)
180# undef cpu_is_omap1510
181# define cpu_is_omap1510() is_omap1510()
182# endif
183#else 205#else
184# if defined(CONFIG_ARCH_OMAP730) 206# if defined(CONFIG_ARCH_OMAP730)
185# undef cpu_is_omap730 207# undef cpu_is_omap730
186# define cpu_is_omap730() 1 208# define cpu_is_omap730() 1
187# endif 209# endif
188# if defined(CONFIG_ARCH_OMAP1510)
189# undef cpu_is_omap1510
190# define cpu_is_omap1510() 1
191# endif
192#endif 210#endif
193 211
194/* 212/*
195 * Whether we have MULTI_OMAP1 or not, we still need to distinguish 213 * Whether we have MULTI_OMAP1 or not, we still need to distinguish
196 * between 1611B/5912 and 1710. 214 * between 330 vs. 1510 and 1611B/5912 vs. 1710.
197 */ 215 */
216#if defined(CONFIG_ARCH_OMAP15XX)
217# undef cpu_is_omap310
218# undef cpu_is_omap1510
219# define cpu_is_omap310() is_omap310()
220# define cpu_is_omap1510() is_omap1510()
221#endif
222
198#if defined(CONFIG_ARCH_OMAP16XX) 223#if defined(CONFIG_ARCH_OMAP16XX)
199# undef cpu_is_omap1610 224# undef cpu_is_omap1610
200# undef cpu_is_omap1611 225# undef cpu_is_omap1611
@@ -208,9 +233,20 @@ IS_OMAP_TYPE(2420, 0x2420)
208# define cpu_is_omap1710() is_omap1710() 233# define cpu_is_omap1710() is_omap1710()
209#endif 234#endif
210 235
211#if defined(CONFIG_ARCH_OMAP2420) 236#if defined(CONFIG_ARCH_OMAP24XX)
212# undef cpu_is_omap2420 237# undef cpu_is_omap2420
213# define cpu_is_omap2420() 1 238# undef cpu_is_omap2422
239# undef cpu_is_omap2423
240# undef cpu_is_omap2430
241# define cpu_is_omap2420() is_omap2420()
242# define cpu_is_omap2422() is_omap2422()
243# define cpu_is_omap2423() is_omap2423()
244# define cpu_is_omap2430() is_omap2430()
214#endif 245#endif
215 246
247/* Macros to detect if we have OMAP1 or OMAP2 */
248#define cpu_class_is_omap1() (cpu_is_omap730() || cpu_is_omap15xx() || \
249 cpu_is_omap16xx())
250#define cpu_class_is_omap2() cpu_is_omap24xx()
251
216#endif 252#endif
diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h
index 04ebef5c6e95..ccbcb580a5c1 100644
--- a/include/asm-arm/arch-omap/dma.h
+++ b/include/asm-arm/arch-omap/dma.h
@@ -22,9 +22,109 @@
22#define __ASM_ARCH_DMA_H 22#define __ASM_ARCH_DMA_H
23 23
24#define MAX_DMA_ADDRESS 0xffffffff 24#define MAX_DMA_ADDRESS 0xffffffff
25#define MAX_DMA_CHANNELS 0
26
27/* Hardware registers for omap1 */
28#define OMAP_DMA_BASE (0xfffed800)
29#define OMAP_DMA_GCR (OMAP_DMA_BASE + 0x400)
30#define OMAP_DMA_GSCR (OMAP_DMA_BASE + 0x404)
31#define OMAP_DMA_GRST (OMAP_DMA_BASE + 0x408)
32#define OMAP_DMA_HW_ID (OMAP_DMA_BASE + 0x442)
33#define OMAP_DMA_PCH2_ID (OMAP_DMA_BASE + 0x444)
34#define OMAP_DMA_PCH0_ID (OMAP_DMA_BASE + 0x446)
35#define OMAP_DMA_PCH1_ID (OMAP_DMA_BASE + 0x448)
36#define OMAP_DMA_PCHG_ID (OMAP_DMA_BASE + 0x44a)
37#define OMAP_DMA_PCHD_ID (OMAP_DMA_BASE + 0x44c)
38#define OMAP_DMA_CAPS_0_U (OMAP_DMA_BASE + 0x44e)
39#define OMAP_DMA_CAPS_0_L (OMAP_DMA_BASE + 0x450)
40#define OMAP_DMA_CAPS_1_U (OMAP_DMA_BASE + 0x452)
41#define OMAP_DMA_CAPS_1_L (OMAP_DMA_BASE + 0x454)
42#define OMAP_DMA_CAPS_2 (OMAP_DMA_BASE + 0x456)
43#define OMAP_DMA_CAPS_3 (OMAP_DMA_BASE + 0x458)
44#define OMAP_DMA_CAPS_4 (OMAP_DMA_BASE + 0x45a)
45#define OMAP_DMA_PCH2_SR (OMAP_DMA_BASE + 0x460)
46#define OMAP_DMA_PCH0_SR (OMAP_DMA_BASE + 0x480)
47#define OMAP_DMA_PCH1_SR (OMAP_DMA_BASE + 0x482)
48#define OMAP_DMA_PCHD_SR (OMAP_DMA_BASE + 0x4c0)
49
50/* Hardware registers for omap2 */
51#define OMAP24XX_DMA_BASE (L4_24XX_BASE + 0x56000)
52#define OMAP_DMA4_REVISION (OMAP24XX_DMA_BASE + 0x00)
53#define OMAP_DMA4_GCR_REG (OMAP24XX_DMA_BASE + 0x78)
54#define OMAP_DMA4_IRQSTATUS_L0 (OMAP24XX_DMA_BASE + 0x08)
55#define OMAP_DMA4_IRQSTATUS_L1 (OMAP24XX_DMA_BASE + 0x0c)
56#define OMAP_DMA4_IRQSTATUS_L2 (OMAP24XX_DMA_BASE + 0x10)
57#define OMAP_DMA4_IRQSTATUS_L3 (OMAP24XX_DMA_BASE + 0x14)
58#define OMAP_DMA4_IRQENABLE_L0 (OMAP24XX_DMA_BASE + 0x18)
59#define OMAP_DMA4_IRQENABLE_L1 (OMAP24XX_DMA_BASE + 0x1c)
60#define OMAP_DMA4_IRQENABLE_L2 (OMAP24XX_DMA_BASE + 0x20)
61#define OMAP_DMA4_IRQENABLE_L3 (OMAP24XX_DMA_BASE + 0x24)
62#define OMAP_DMA4_SYSSTATUS (OMAP24XX_DMA_BASE + 0x28)
63#define OMAP_DMA4_CAPS_0 (OMAP24XX_DMA_BASE + 0x64)
64#define OMAP_DMA4_CAPS_2 (OMAP24XX_DMA_BASE + 0x6c)
65#define OMAP_DMA4_CAPS_3 (OMAP24XX_DMA_BASE + 0x70)
66#define OMAP_DMA4_CAPS_4 (OMAP24XX_DMA_BASE + 0x74)
67
68#ifdef CONFIG_ARCH_OMAP1
25 69
26#define OMAP_LOGICAL_DMA_CH_COUNT 17 70#define OMAP_LOGICAL_DMA_CH_COUNT 17
27 71
72/* Common channel specific registers for omap1 */
73#define OMAP_DMA_CSDP_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x00)
74#define OMAP_DMA_CCR_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x02)
75#define OMAP_DMA_CICR_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x04)
76#define OMAP_DMA_CSR_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x06)
77#define OMAP_DMA_CEN_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x10)
78#define OMAP_DMA_CFN_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x12)
79#define OMAP_DMA_CSFI_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x14)
80#define OMAP_DMA_CSEI_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x16)
81#define OMAP_DMA_CSAC_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x18)
82#define OMAP_DMA_CDAC_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x1a)
83#define OMAP_DMA_CDEI_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x1c)
84#define OMAP_DMA_CDFI_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x1e)
85#define OMAP_DMA_CLNK_CTRL_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x28)
86
87#else
88
89#define OMAP_LOGICAL_DMA_CH_COUNT 32 /* REVISIT: Is this 32 + 2? */
90
91/* Common channel specific registers for omap2 */
92#define OMAP_DMA_CCR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x80)
93#define OMAP_DMA_CLNK_CTRL_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x84)
94#define OMAP_DMA_CICR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x88)
95#define OMAP_DMA_CSR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x8c)
96#define OMAP_DMA_CSDP_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x90)
97#define OMAP_DMA_CEN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x94)
98#define OMAP_DMA_CFN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x98)
99#define OMAP_DMA_CSEI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa4)
100#define OMAP_DMA_CSFI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa8)
101#define OMAP_DMA_CDEI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xac)
102#define OMAP_DMA_CDFI_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb0)
103#define OMAP_DMA_CSAC_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb4)
104#define OMAP_DMA_CDAC_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xb8)
105
106#endif
107
108/* Channel specific registers only on omap1 */
109#define OMAP1_DMA_CSSA_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x08)
110#define OMAP1_DMA_CSSA_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0a)
111#define OMAP1_DMA_CDSA_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0c)
112#define OMAP1_DMA_CDSA_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x0e)
113#define OMAP1_DMA_COLOR_L_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x20)
114#define OMAP1_DMA_CCR2_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x24)
115#define OMAP1_DMA_COLOR_U_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x22)
116#define OMAP1_DMA_LCH_CTRL_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x2a)
117
118/* Channel specific registers only on omap2 */
119#define OMAP2_DMA_CSSA_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0x9c)
120#define OMAP2_DMA_CDSA_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xa0)
121#define OMAP2_DMA_CCEN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xbc)
122#define OMAP2_DMA_CCFN_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xc0)
123#define OMAP2_DMA_COLOR_REG(n) __REG32(OMAP24XX_DMA_BASE + 0x60 * (n) + 0xc4)
124
125/*----------------------------------------------------------------------------*/
126
127/* DMA channels for omap1 */
28#define OMAP_DMA_NO_DEVICE 0 128#define OMAP_DMA_NO_DEVICE 0
29#define OMAP_DMA_MCSI1_TX 1 129#define OMAP_DMA_MCSI1_TX 1
30#define OMAP_DMA_MCSI1_RX 2 130#define OMAP_DMA_MCSI1_RX 2
@@ -85,29 +185,72 @@
85#define OMAP_DMA_MMC2_RX 55 185#define OMAP_DMA_MMC2_RX 55
86#define OMAP_DMA_CRYPTO_DES_OUT 56 186#define OMAP_DMA_CRYPTO_DES_OUT 56
87 187
188/* DMA channels for 24xx */
189#define OMAP24XX_DMA_NO_DEVICE 0
190#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */
191#define OMAP24XX_DMA_EXT_NDMA_REQ0 2 /* S_DMA_1 */
192#define OMAP24XX_DMA_EXT_NDMA_REQ1 3 /* S_DMA_2 */
193#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */
194#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */
195#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */
196#define OMAP24XX_DMA_VLYNQ_TX 7 /* S_DMA_6 */
197#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */
198#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */
199#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */
200#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */
201#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */
202#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */
88 203
89#define OMAP_DMA_BASE (0xfffed800) 204#define OMAP24XX_DMA_EAC_AC_RD 17 /* S_DMA_16 */
90#define OMAP_DMA_GCR (OMAP_DMA_BASE + 0x400) 205#define OMAP24XX_DMA_EAC_AC_WR 18 /* S_DMA_17 */
91#define OMAP_DMA_GSCR (OMAP_DMA_BASE + 0x404) 206#define OMAP24XX_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */
92#define OMAP_DMA_GRST (OMAP_DMA_BASE + 0x408) 207#define OMAP24XX_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */
93#define OMAP_DMA_HW_ID (OMAP_DMA_BASE + 0x442) 208#define OMAP24XX_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */
94#define OMAP_DMA_PCH2_ID (OMAP_DMA_BASE + 0x444) 209#define OMAP24XX_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */
95#define OMAP_DMA_PCH0_ID (OMAP_DMA_BASE + 0x446) 210#define OMAP24XX_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */
96#define OMAP_DMA_PCH1_ID (OMAP_DMA_BASE + 0x448) 211#define OMAP24XX_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */
97#define OMAP_DMA_PCHG_ID (OMAP_DMA_BASE + 0x44a) 212#define OMAP24XX_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */
98#define OMAP_DMA_PCHD_ID (OMAP_DMA_BASE + 0x44c) 213#define OMAP24XX_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */
99#define OMAP_DMA_CAPS_0_U (OMAP_DMA_BASE + 0x44e) 214#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */
100#define OMAP_DMA_CAPS_0_L (OMAP_DMA_BASE + 0x450) 215#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */
101#define OMAP_DMA_CAPS_1_U (OMAP_DMA_BASE + 0x452) 216#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */
102#define OMAP_DMA_CAPS_1_L (OMAP_DMA_BASE + 0x454) 217#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */
103#define OMAP_DMA_CAPS_2 (OMAP_DMA_BASE + 0x456) 218#define OMAP24XX_DMA_MCBSP1_TX 31 /* SDMA_30 */
104#define OMAP_DMA_CAPS_3 (OMAP_DMA_BASE + 0x458) 219#define OMAP24XX_DMA_MCBSP1_RX 32 /* SDMA_31 */
105#define OMAP_DMA_CAPS_4 (OMAP_DMA_BASE + 0x45a) 220#define OMAP24XX_DMA_MCBSP2_TX 33 /* SDMA_32 */
106#define OMAP_DMA_PCH2_SR (OMAP_DMA_BASE + 0x460) 221#define OMAP24XX_DMA_MCBSP2_RX 34 /* SDMA_33 */
107#define OMAP_DMA_PCH0_SR (OMAP_DMA_BASE + 0x480) 222#define OMAP24XX_DMA_SPI1_TX0 35 /* SDMA_34 */
108#define OMAP_DMA_PCH1_SR (OMAP_DMA_BASE + 0x482) 223#define OMAP24XX_DMA_SPI1_RX0 36 /* SDMA_35 */
109#define OMAP_DMA_PCHD_SR (OMAP_DMA_BASE + 0x4c0) 224#define OMAP24XX_DMA_SPI1_TX1 37 /* SDMA_36 */
225#define OMAP24XX_DMA_SPI1_RX1 38 /* SDMA_37 */
226#define OMAP24XX_DMA_SPI1_TX2 39 /* SDMA_38 */
227#define OMAP24XX_DMA_SPI1_RX2 40 /* SDMA_39 */
228#define OMAP24XX_DMA_SPI1_TX3 41 /* SDMA_40 */
229#define OMAP24XX_DMA_SPI1_RX3 42 /* SDMA_41 */
230#define OMAP24XX_DMA_SPI2_TX0 43 /* SDMA_42 */
231#define OMAP24XX_DMA_SPI2_RX0 44 /* SDMA_43 */
232#define OMAP24XX_DMA_SPI2_TX1 45 /* SDMA_44 */
233#define OMAP24XX_DMA_SPI2_RX1 46 /* SDMA_45 */
110 234
235#define OMAP24XX_DMA_UART1_TX 49 /* SDMA_48 */
236#define OMAP24XX_DMA_UART1_RX 50 /* SDMA_49 */
237#define OMAP24XX_DMA_UART2_TX 51 /* SDMA_50 */
238#define OMAP24XX_DMA_UART2_RX 52 /* SDMA_51 */
239#define OMAP24XX_DMA_UART3_TX 53 /* SDMA_52 */
240#define OMAP24XX_DMA_UART3_RX 54 /* SDMA_53 */
241#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* SDMA_54 */
242#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* SDMA_55 */
243#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* SDMA_56 */
244#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* SDMA_57 */
245#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* SDMA_58 */
246#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* SDMA_59 */
247#define OMAP24XX_DMA_MMC1_TX 61 /* SDMA_60 */
248#define OMAP24XX_DMA_MMC1_RX 62 /* SDMA_61 */
249#define OMAP24XX_DMA_MS 63 /* SDMA_62 */
250
251/*----------------------------------------------------------------------------*/
252
253/* Hardware registers for LCD DMA */
111#define OMAP1510_DMA_LCD_BASE (0xfffedb00) 254#define OMAP1510_DMA_LCD_BASE (0xfffedb00)
112#define OMAP1510_DMA_LCD_CTRL (OMAP1510_DMA_LCD_BASE + 0x00) 255#define OMAP1510_DMA_LCD_CTRL (OMAP1510_DMA_LCD_BASE + 0x00)
113#define OMAP1510_DMA_LCD_TOP_F1_L (OMAP1510_DMA_LCD_BASE + 0x02) 256#define OMAP1510_DMA_LCD_TOP_F1_L (OMAP1510_DMA_LCD_BASE + 0x02)
@@ -116,7 +259,7 @@
116#define OMAP1510_DMA_LCD_BOT_F1_U (OMAP1510_DMA_LCD_BASE + 0x08) 259#define OMAP1510_DMA_LCD_BOT_F1_U (OMAP1510_DMA_LCD_BASE + 0x08)
117 260
118#define OMAP1610_DMA_LCD_BASE (0xfffee300) 261#define OMAP1610_DMA_LCD_BASE (0xfffee300)
119#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0) 262#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0)
120#define OMAP1610_DMA_LCD_CCR (OMAP1610_DMA_LCD_BASE + 0xc2) 263#define OMAP1610_DMA_LCD_CCR (OMAP1610_DMA_LCD_BASE + 0xc2)
121#define OMAP1610_DMA_LCD_CTRL (OMAP1610_DMA_LCD_BASE + 0xc4) 264#define OMAP1610_DMA_LCD_CTRL (OMAP1610_DMA_LCD_BASE + 0xc4)
122#define OMAP1610_DMA_LCD_TOP_B1_L (OMAP1610_DMA_LCD_BASE + 0xc8) 265#define OMAP1610_DMA_LCD_TOP_B1_L (OMAP1610_DMA_LCD_BASE + 0xc8)
@@ -134,37 +277,18 @@
134#define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea) 277#define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea)
135#define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4) 278#define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4)
136 279
137 280#define OMAP_DMA_TOUT_IRQ (1 << 0) /* Only on omap1 */
138/* Every LCh has its own set of the registers below */
139#define OMAP_DMA_CSDP(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x00)
140#define OMAP_DMA_CCR(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x02)
141#define OMAP_DMA_CICR(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x04)
142#define OMAP_DMA_CSR(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x06)
143#define OMAP_DMA_CSSA_L(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x08)
144#define OMAP_DMA_CSSA_U(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0a)
145#define OMAP_DMA_CDSA_L(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0c)
146#define OMAP_DMA_CDSA_U(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x0e)
147#define OMAP_DMA_CEN(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x10)
148#define OMAP_DMA_CFN(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x12)
149#define OMAP_DMA_CSFI(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x14)
150#define OMAP_DMA_CSEI(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x16)
151#define OMAP_DMA_CSAC(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x18)
152#define OMAP_DMA_CDAC(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1a)
153#define OMAP_DMA_CDEI(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1c)
154#define OMAP_DMA_CDFI(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x1e)
155#define OMAP_DMA_COLOR_L(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x20)
156#define OMAP_DMA_COLOR_U(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x22)
157#define OMAP_DMA_CCR2(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x24)
158#define OMAP_DMA_CLNK_CTRL(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x28)
159#define OMAP_DMA_LCH_CTRL(n) (OMAP_DMA_BASE + 0x40 * (n) + 0x2a)
160
161#define OMAP_DMA_TOUT_IRQ (1 << 0)
162#define OMAP_DMA_DROP_IRQ (1 << 1) 281#define OMAP_DMA_DROP_IRQ (1 << 1)
163#define OMAP_DMA_HALF_IRQ (1 << 2) 282#define OMAP_DMA_HALF_IRQ (1 << 2)
164#define OMAP_DMA_FRAME_IRQ (1 << 3) 283#define OMAP_DMA_FRAME_IRQ (1 << 3)
165#define OMAP_DMA_LAST_IRQ (1 << 4) 284#define OMAP_DMA_LAST_IRQ (1 << 4)
166#define OMAP_DMA_BLOCK_IRQ (1 << 5) 285#define OMAP_DMA_BLOCK_IRQ (1 << 5)
167#define OMAP_DMA_SYNC_IRQ (1 << 6) 286#define OMAP1_DMA_SYNC_IRQ (1 << 6)
287#define OMAP2_DMA_PKT_IRQ (1 << 7)
288#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8)
289#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9)
290#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10)
291#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11)
168 292
169#define OMAP_DMA_DATA_TYPE_S8 0x00 293#define OMAP_DMA_DATA_TYPE_S8 0x00
170#define OMAP_DMA_DATA_TYPE_S16 0x01 294#define OMAP_DMA_DATA_TYPE_S16 0x01
@@ -194,6 +318,7 @@ enum {
194 OMAP_LCD_DMA_B2_BOTTOM 318 OMAP_LCD_DMA_B2_BOTTOM
195}; 319};
196 320
321/* REVISIT: Check if BURST_4 is really 1 (or 2) */
197enum omap_dma_burst_mode { 322enum omap_dma_burst_mode {
198 OMAP_DMA_DATA_BURST_DIS = 0, 323 OMAP_DMA_DATA_BURST_DIS = 0,
199 OMAP_DMA_DATA_BURST_4, 324 OMAP_DMA_DATA_BURST_4,
@@ -206,6 +331,31 @@ enum omap_dma_color_mode {
206 OMAP_DMA_TRANSPARENT_COPY 331 OMAP_DMA_TRANSPARENT_COPY
207}; 332};
208 333
334struct omap_dma_channel_params {
335 int data_type; /* data type 8,16,32 */
336 int elem_count; /* number of elements in a frame */
337 int frame_count; /* number of frames in a element */
338
339 int src_port; /* Only on OMAP1 REVISIT: Is this needed? */
340 int src_amode; /* constant , post increment, indexed , double indexed */
341 int src_start; /* source address : physical */
342 int src_ei; /* source element index */
343 int src_fi; /* source frame index */
344
345 int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */
346 int dst_amode; /* constant , post increment, indexed , double indexed */
347 int dst_start; /* source address : physical */
348 int dst_ei; /* source element index */
349 int dst_fi; /* source frame index */
350
351 int trigger; /* trigger attached if the channel is synchronized */
352 int sync_mode; /* sycn on element, frame , block or packet */
353 int src_or_dst_synch; /* source synch(1) or destination synch(0) */
354
355 int ie; /* interrupt enabled */
356};
357
358
209extern void omap_set_dma_priority(int dst_port, int priority); 359extern void omap_set_dma_priority(int dst_port, int priority);
210extern int omap_request_dma(int dev_id, const char *dev_name, 360extern int omap_request_dma(int dev_id, const char *dev_name,
211 void (* callback)(int lch, u16 ch_status, void *data), 361 void (* callback)(int lch, u16 ch_status, void *data),
@@ -217,24 +367,30 @@ extern void omap_start_dma(int lch);
217extern void omap_stop_dma(int lch); 367extern void omap_stop_dma(int lch);
218extern void omap_set_dma_transfer_params(int lch, int data_type, 368extern void omap_set_dma_transfer_params(int lch, int data_type,
219 int elem_count, int frame_count, 369 int elem_count, int frame_count,
220 int sync_mode); 370 int sync_mode,
371 int dma_trigger, int src_or_dst_synch);
221extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, 372extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
222 u32 color); 373 u32 color);
223 374
224extern void omap_set_dma_src_params(int lch, int src_port, int src_amode, 375extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
225 unsigned long src_start); 376 unsigned long src_start,
377 int src_ei, int src_fi);
226extern void omap_set_dma_src_index(int lch, int eidx, int fidx); 378extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
227extern void omap_set_dma_src_data_pack(int lch, int enable); 379extern void omap_set_dma_src_data_pack(int lch, int enable);
228extern void omap_set_dma_src_burst_mode(int lch, 380extern void omap_set_dma_src_burst_mode(int lch,
229 enum omap_dma_burst_mode burst_mode); 381 enum omap_dma_burst_mode burst_mode);
230 382
231extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode, 383extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
232 unsigned long dest_start); 384 unsigned long dest_start,
385 int dst_ei, int dst_fi);
233extern void omap_set_dma_dest_index(int lch, int eidx, int fidx); 386extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
234extern void omap_set_dma_dest_data_pack(int lch, int enable); 387extern void omap_set_dma_dest_data_pack(int lch, int enable);
235extern void omap_set_dma_dest_burst_mode(int lch, 388extern void omap_set_dma_dest_burst_mode(int lch,
236 enum omap_dma_burst_mode burst_mode); 389 enum omap_dma_burst_mode burst_mode);
237 390
391extern void omap_set_dma_params(int lch,
392 struct omap_dma_channel_params * params);
393
238extern void omap_dma_link_lch (int lch_head, int lch_queue); 394extern void omap_dma_link_lch (int lch_head, int lch_queue);
239extern void omap_dma_unlink_lch (int lch_head, int lch_queue); 395extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
240 396
@@ -244,9 +400,6 @@ extern int omap_get_dma_src_addr_counter(int lch);
244extern void omap_clear_dma(int lch); 400extern void omap_clear_dma(int lch);
245extern int omap_dma_running(void); 401extern int omap_dma_running(void);
246 402
247/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
248extern int omap_dma_in_1510_mode(void);
249
250/* LCD DMA functions */ 403/* LCD DMA functions */
251extern int omap_request_lcd_dma(void (* callback)(u16 status, void *data), 404extern int omap_request_lcd_dma(void (* callback)(u16 status, void *data),
252 void *data); 405 void *data);
diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S
index 0d29b9c56a95..f8814a84910e 100644
--- a/include/asm-arm/arch-omap/entry-macro.S
+++ b/include/asm-arm/arch-omap/entry-macro.S
@@ -10,6 +10,20 @@
10 10
11#if defined(CONFIG_ARCH_OMAP1) 11#if defined(CONFIG_ARCH_OMAP1)
12 12
13#if defined(CONFIG_ARCH_OMAP730) && \
14 (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
15#error "FIXME: OMAP730 doesn't support multiple-OMAP"
16#elif defined(CONFIG_ARCH_OMAP730)
17#define INT_IH2_IRQ INT_730_IH2_IRQ
18#elif defined(CONFIG_ARCH_OMAP15XX)
19#define INT_IH2_IRQ INT_1510_IH2_IRQ
20#elif defined(CONFIG_ARCH_OMAP16XX)
21#define INT_IH2_IRQ INT_1610_IH2_IRQ
22#else
23#warning "IH2 IRQ defaulted"
24#define INT_IH2_IRQ INT_1510_IH2_IRQ
25#endif
26
13 .macro disable_fiq 27 .macro disable_fiq
14 .endm 28 .endm
15 29
diff --git a/include/asm-arm/arch-omap/fpga.h b/include/asm-arm/arch-omap/fpga.h
index 676807dc50e1..6a883e0bdbb8 100644
--- a/include/asm-arm/arch-omap/fpga.h
+++ b/include/asm-arm/arch-omap/fpga.h
@@ -19,7 +19,7 @@
19#ifndef __ASM_ARCH_OMAP_FPGA_H 19#ifndef __ASM_ARCH_OMAP_FPGA_H
20#define __ASM_ARCH_OMAP_FPGA_H 20#define __ASM_ARCH_OMAP_FPGA_H
21 21
22#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP1510) 22#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
23extern void omap1510_fpga_init_irq(void); 23extern void omap1510_fpga_init_irq(void);
24#else 24#else
25#define omap1510_fpga_init_irq() (0) 25#define omap1510_fpga_init_irq() (0)
@@ -77,6 +77,8 @@ struct h2p2_dbg_fpga {
77#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 77#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11
78#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) 78#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1)
79 79
80#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0)
81#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1)
80 82
81/* 83/*
82 * --------------------------------------------------------------------------- 84 * ---------------------------------------------------------------------------
diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h
index 74cb2b93b700..f486b72070ea 100644
--- a/include/asm-arm/arch-omap/gpio.h
+++ b/include/asm-arm/arch-omap/gpio.h
@@ -26,7 +26,7 @@
26#ifndef __ASM_ARCH_OMAP_GPIO_H 26#ifndef __ASM_ARCH_OMAP_GPIO_H
27#define __ASM_ARCH_OMAP_GPIO_H 27#define __ASM_ARCH_OMAP_GPIO_H
28 28
29#include <asm/arch/hardware.h> 29#include <asm/hardware.h>
30#include <asm/arch/irqs.h> 30#include <asm/arch/irqs.h>
31#include <asm/io.h> 31#include <asm/io.h>
32 32
@@ -67,7 +67,7 @@
67 67
68#define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \ 68#define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \
69 IH_MPUIO_BASE + ((nr) & 0x0f) : \ 69 IH_MPUIO_BASE + ((nr) & 0x0f) : \
70 IH_GPIO_BASE + ((nr) & 0x3f)) 70 IH_GPIO_BASE + (nr))
71 71
72extern int omap_gpio_init(void); /* Call from board init only */ 72extern int omap_gpio_init(void); /* Call from board init only */
73extern int omap_request_gpio(int gpio); 73extern int omap_request_gpio(int gpio);
diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h
index 60201e1dd6ad..5406b875c422 100644
--- a/include/asm-arm/arch-omap/hardware.h
+++ b/include/asm-arm/arch-omap/hardware.h
@@ -267,8 +267,6 @@
267#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00) 267#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00)
268#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) 268#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04)
269 269
270#ifndef __ASSEMBLER__
271
272/* 270/*
273 * --------------------------------------------------------------------------- 271 * ---------------------------------------------------------------------------
274 * Processor specific defines 272 * Processor specific defines
@@ -277,13 +275,11 @@
277 275
278#include "omap730.h" 276#include "omap730.h"
279#include "omap1510.h" 277#include "omap1510.h"
280
281#ifdef CONFIG_ARCH_OMAP24XX
282#include "omap24xx.h" 278#include "omap24xx.h"
283#endif
284
285#include "omap16xx.h" 279#include "omap16xx.h"
286 280
281#ifndef __ASSEMBLER__
282
287/* 283/*
288 * --------------------------------------------------------------------------- 284 * ---------------------------------------------------------------------------
289 * Board specific defines 285 * Board specific defines
diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h
index 3d5bcd545082..f5bcc9a1aed6 100644
--- a/include/asm-arm/arch-omap/io.h
+++ b/include/asm-arm/arch-omap/io.h
@@ -52,23 +52,33 @@
52 * ---------------------------------------------------------------------------- 52 * ----------------------------------------------------------------------------
53 */ 53 */
54 54
55#define PCIO_BASE 0
56
55#if defined(CONFIG_ARCH_OMAP1) 57#if defined(CONFIG_ARCH_OMAP1)
58
56#define IO_PHYS 0xFFFB0000 59#define IO_PHYS 0xFFFB0000
57#define IO_OFFSET -0x01000000 /* Virtual IO = 0xfefb0000 */ 60#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
58#define IO_SIZE 0x40000 61#define IO_SIZE 0x40000
62#define IO_VIRT (IO_PHYS - IO_OFFSET)
63#define IO_ADDRESS(pa) ((pa) - IO_OFFSET)
64#define io_p2v(pa) ((pa) - IO_OFFSET)
65#define io_v2p(va) ((va) + IO_OFFSET)
59 66
60#elif defined(CONFIG_ARCH_OMAP2) 67#elif defined(CONFIG_ARCH_OMAP2)
61#define IO_PHYS 0x48000000 /* L4 peripherals; other stuff has to be mapped *
62 * manually. */
63#define IO_OFFSET 0x90000000 /* Virtual IO = 0xd8000000 */
64#define IO_SIZE 0x08000000
65#endif
66 68
67#define IO_VIRT (IO_PHYS + IO_OFFSET) 69/* We map both L3 and L4 on OMAP2 */
68#define IO_ADDRESS(x) ((x) + IO_OFFSET) 70#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */
69#define PCIO_BASE 0 71#define L3_24XX_VIRT 0xf8000000
70#define io_p2v(x) ((x) + IO_OFFSET) 72#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
71#define io_v2p(x) ((x) - IO_OFFSET) 73#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */
74#define L4_24XX_VIRT 0xd8000000
75#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
76#define IO_OFFSET 0x90000000
77#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
78#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
79#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
80
81#endif
72 82
73#ifndef __ASSEMBLER__ 83#ifndef __ASSEMBLER__
74 84
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h
index 74e108ccac16..4ffce1d77759 100644
--- a/include/asm-arm/arch-omap/irqs.h
+++ b/include/asm-arm/arch-omap/irqs.h
@@ -22,8 +22,8 @@
22 * are different. 22 * are different.
23 */ 23 */
24 24
25#ifndef __ASM_ARCH_OMAP1510_IRQS_H 25#ifndef __ASM_ARCH_OMAP15XX_IRQS_H
26#define __ASM_ARCH_OMAP1510_IRQS_H 26#define __ASM_ARCH_OMAP15XX_IRQS_H
27 27
28/* 28/*
29 * IRQ numbers for interrupt handler 1 29 * IRQ numbers for interrupt handler 1
@@ -31,7 +31,6 @@
31 * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below 31 * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
32 * 32 *
33 */ 33 */
34#define INT_IH2_IRQ 0
35#define INT_CAMERA 1 34#define INT_CAMERA 1
36#define INT_FIQ 3 35#define INT_FIQ 3
37#define INT_RTDX 6 36#define INT_RTDX 6
@@ -60,6 +59,7 @@
60/* 59/*
61 * OMAP-1510 specific IRQ numbers for interrupt handler 1 60 * OMAP-1510 specific IRQ numbers for interrupt handler 1
62 */ 61 */
62#define INT_1510_IH2_IRQ 0
63#define INT_1510_RES2 2 63#define INT_1510_RES2 2
64#define INT_1510_SPI_TX 4 64#define INT_1510_SPI_TX 4
65#define INT_1510_SPI_RX 5 65#define INT_1510_SPI_RX 5
@@ -71,6 +71,7 @@
71/* 71/*
72 * OMAP-1610 specific IRQ numbers for interrupt handler 1 72 * OMAP-1610 specific IRQ numbers for interrupt handler 1
73 */ 73 */
74#define INT_1610_IH2_IRQ 0
74#define INT_1610_IH2_FIQ 2 75#define INT_1610_IH2_FIQ 2
75#define INT_1610_McBSP2_TX 4 76#define INT_1610_McBSP2_TX 4
76#define INT_1610_McBSP2_RX 5 77#define INT_1610_McBSP2_RX 5
@@ -231,6 +232,12 @@
231#define INT_730_DMA_CH15 (62 + IH2_BASE) 232#define INT_730_DMA_CH15 (62 + IH2_BASE)
232#define INT_730_NAND (63 + IH2_BASE) 233#define INT_730_NAND (63 + IH2_BASE)
233 234
235#define INT_24XX_SYS_NIRQ 7
236#define INT_24XX_SDMA_IRQ0 12
237#define INT_24XX_SDMA_IRQ1 13
238#define INT_24XX_SDMA_IRQ2 14
239#define INT_24XX_SDMA_IRQ3 15
240#define INT_24XX_DSS_IRQ 25
234#define INT_24XX_GPIO_BANK1 29 241#define INT_24XX_GPIO_BANK1 29
235#define INT_24XX_GPIO_BANK2 30 242#define INT_24XX_GPIO_BANK2 30
236#define INT_24XX_GPIO_BANK3 31 243#define INT_24XX_GPIO_BANK3 31
@@ -253,7 +260,7 @@ extern void omap_init_irq(void);
253 * The definition of NR_IRQS is in board-specific header file, which is 260 * The definition of NR_IRQS is in board-specific header file, which is
254 * included via hardware.h 261 * included via hardware.h
255 */ 262 */
256#include <asm/arch/hardware.h> 263#include <asm/hardware.h>
257 264
258#ifndef NR_IRQS 265#ifndef NR_IRQS
259#define NR_IRQS IH_BOARD_BASE 266#define NR_IRQS IH_BOARD_BASE
diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h
index 305bdeb16ab8..e79d98ab2ab6 100644
--- a/include/asm-arm/arch-omap/mcbsp.h
+++ b/include/asm-arm/arch-omap/mcbsp.h
@@ -24,7 +24,7 @@
24#ifndef __ASM_ARCH_OMAP_MCBSP_H 24#ifndef __ASM_ARCH_OMAP_MCBSP_H
25#define __ASM_ARCH_OMAP_MCBSP_H 25#define __ASM_ARCH_OMAP_MCBSP_H
26 26
27#include <asm/arch/hardware.h> 27#include <asm/hardware.h>
28 28
29#define OMAP730_MCBSP1_BASE 0xfffb1000 29#define OMAP730_MCBSP1_BASE 0xfffb1000
30#define OMAP730_MCBSP2_BASE 0xfffb1800 30#define OMAP730_MCBSP2_BASE 0xfffb1800
diff --git a/include/asm-arm/arch-omap/memory.h b/include/asm-arm/arch-omap/memory.h
index bf545b6e0a26..df50dd53e1dd 100644
--- a/include/asm-arm/arch-omap/memory.h
+++ b/include/asm-arm/arch-omap/memory.h
@@ -61,7 +61,7 @@
61 * Note that the is_lbus_device() test is not very efficient on 1510 61 * Note that the is_lbus_device() test is not very efficient on 1510
62 * because of the strncmp(). 62 * because of the strncmp().
63 */ 63 */
64#ifdef CONFIG_ARCH_OMAP1510 64#ifdef CONFIG_ARCH_OMAP15XX
65 65
66/* 66/*
67 * OMAP-1510 Local Bus address offset 67 * OMAP-1510 Local Bus address offset
@@ -84,7 +84,7 @@
84 virt_to_lbus(addr) : \ 84 virt_to_lbus(addr) : \
85 __virt_to_bus(addr);}) 85 __virt_to_bus(addr);})
86 86
87#endif /* CONFIG_ARCH_OMAP1510 */ 87#endif /* CONFIG_ARCH_OMAP15XX */
88 88
89#endif 89#endif
90 90
diff --git a/include/asm-arm/arch-omap/menelaus.h b/include/asm-arm/arch-omap/menelaus.h
new file mode 100644
index 000000000000..46be8b8d6346
--- /dev/null
+++ b/include/asm-arm/arch-omap/menelaus.h
@@ -0,0 +1,22 @@
1/*
2 * linux/include/asm-arm/arch-omap/menelaus.h
3 *
4 * Functions to access Menelaus power management chip
5 */
6
7#ifndef __ASM_ARCH_MENELAUS_H
8#define __ASM_ARCH_MENELAUS_H
9
10extern void menelaus_mmc_register(void (*callback)(u8 card_mask),
11 unsigned long data);
12extern void menelaus_mmc_remove(void);
13extern void menelaus_mmc_opendrain(int enable);
14
15#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS)
16#define omap_has_menelaus() 1
17#else
18#define omap_has_menelaus() 0
19#endif
20
21#endif
22
diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h
index 1b1ad4105349..13415a9aab06 100644
--- a/include/asm-arm/arch-omap/mux.h
+++ b/include/asm-arm/arch-omap/mux.h
@@ -4,7 +4,7 @@
4 * Table of the Omap register configurations for the FUNC_MUX and 4 * Table of the Omap register configurations for the FUNC_MUX and
5 * PULL_DWN combinations. 5 * PULL_DWN combinations.
6 * 6 *
7 * Copyright (C) 2003 Nokia Corporation 7 * Copyright (C) 2003 - 2005 Nokia Corporation
8 * 8 *
9 * Written by Tony Lindgren <tony.lindgren@nokia.com> 9 * Written by Tony Lindgren <tony.lindgren@nokia.com>
10 * 10 *
@@ -58,6 +58,16 @@
58 .pu_pd_reg = PU_PD_SEL_##reg, \ 58 .pu_pd_reg = PU_PD_SEL_##reg, \
59 .pu_pd_val = status, 59 .pu_pd_val = status,
60 60
61#define MUX_REG_730(reg, mode_offset, mode) .mux_reg_name = "OMAP730_IO_CONF_"#reg, \
62 .mux_reg = OMAP730_IO_CONF_##reg, \
63 .mask_offset = mode_offset, \
64 .mask = mode,
65
66#define PULL_REG_730(reg, bit, status) .pull_name = "OMAP730_IO_CONF_"#reg, \
67 .pull_reg = OMAP730_IO_CONF_##reg, \
68 .pull_bit = bit, \
69 .pull_val = status,
70
61#else 71#else
62 72
63#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ 73#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
@@ -71,6 +81,15 @@
71#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \ 81#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \
72 .pu_pd_val = status, 82 .pu_pd_val = status,
73 83
84#define MUX_REG_730(reg, mode_offset, mode) \
85 .mux_reg = OMAP730_IO_CONF_##reg, \
86 .mask_offset = mode_offset, \
87 .mask = mode,
88
89#define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, \
90 .pull_bit = bit, \
91 .pull_val = status,
92
74#endif /* CONFIG_OMAP_MUX_DEBUG */ 93#endif /* CONFIG_OMAP_MUX_DEBUG */
75 94
76#define MUX_CFG(desc, mux_reg, mode_offset, mode, \ 95#define MUX_CFG(desc, mux_reg, mode_offset, mode, \
@@ -84,13 +103,44 @@
84 PU_PD_REG(pu_pd_reg, pu_pd_status) \ 103 PU_PD_REG(pu_pd_reg, pu_pd_status) \
85}, 104},
86 105
106
107/*
108 * OMAP730 has a slightly different config for the pin mux.
109 * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and
110 * not the FUNC_MUX_CTRL_x regs from hardware.h
111 * - for pull-up/down, only has one enable bit which is is in the same register
112 * as mux config
113 */
114#define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \
115 pull_reg, pull_bit, pull_status, \
116 pu_pd_reg, pu_pd_status, debug_status)\
117{ \
118 .name = desc, \
119 .debug = debug_status, \
120 MUX_REG_730(mux_reg, mode_offset, mode) \
121 PULL_REG_730(mux_reg, pull_bit, pull_status) \
122 PU_PD_REG(pu_pd_reg, pu_pd_status) \
123},
124
125#define MUX_CFG_24XX(desc, reg_offset, mode, \
126 pull_en, pull_mode, dbg) \
127{ \
128 .name = desc, \
129 .debug = dbg, \
130 .mux_reg = reg_offset, \
131 .mask = mode, \
132 .pull_val = pull_en, \
133 .pu_pd_val = pull_mode, \
134},
135
136
87#define PULL_DISABLED 0 137#define PULL_DISABLED 0
88#define PULL_ENABLED 1 138#define PULL_ENABLED 1
89 139
90#define PULL_DOWN 0 140#define PULL_DOWN 0
91#define PULL_UP 1 141#define PULL_UP 1
92 142
93typedef struct { 143struct pin_config {
94 char *name; 144 char *name;
95 unsigned char busy; 145 unsigned char busy;
96 unsigned char debug; 146 unsigned char debug;
@@ -108,13 +158,23 @@ typedef struct {
108 const char *pu_pd_name; 158 const char *pu_pd_name;
109 const unsigned int pu_pd_reg; 159 const unsigned int pu_pd_reg;
110 const unsigned char pu_pd_val; 160 const unsigned char pu_pd_val;
111} reg_cfg_set; 161};
112 162
113/* 163enum omap730_index {
114 * Lookup table for FUNC_MUX and PULL_DWN register combinations for each 164 /* OMAP 730 keyboard */
115 * device. See also reg_cfg_table below for the register values. 165 E2_730_KBR0,
116 */ 166 J7_730_KBR1,
117typedef enum { 167 E1_730_KBR2,
168 F3_730_KBR3,
169 D2_730_KBR4,
170 C2_730_KBC0,
171 D3_730_KBC1,
172 E4_730_KBC2,
173 F4_730_KBC3,
174 E3_730_KBC4,
175};
176
177enum omap1xxx_index {
118 /* UART1 (BT_UART_GATING)*/ 178 /* UART1 (BT_UART_GATING)*/
119 UART1_TX = 0, 179 UART1_TX = 0,
120 UART1_RTS, 180 UART1_RTS,
@@ -331,245 +391,34 @@ typedef enum {
331 V10_1610_CF_IREQ, 391 V10_1610_CF_IREQ,
332 W10_1610_CF_RESET, 392 W10_1610_CF_RESET,
333 W11_1610_CF_CD1, 393 W11_1610_CF_CD1,
334} reg_cfg_t; 394};
335 395
336#if defined(__MUX_C__) && defined(CONFIG_OMAP_MUX) 396enum omap24xx_index {
397 /* 24xx I2C */
398 M19_24XX_I2C1_SCL,
399 L15_24XX_I2C1_SDA,
400 J15_24XX_I2C2_SCL,
401 H19_24XX_I2C2_SDA,
337 402
338/* 403 /* 24xx Menelaus interrupt */
339 * Table of various FUNC_MUX and PULL_DWN combinations for each device. 404 W19_24XX_SYS_NIRQ,
340 * See also reg_cfg_t above for the lookup table.
341 */
342static const reg_cfg_set __initdata_or_module
343reg_cfg_table[] = {
344/*
345 * description mux mode mux pull pull pull pu_pd pu dbg
346 * reg offset mode reg bit ena reg
347 */
348MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
349MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
350
351/* UART2 (COM_UART_GATING), conflicts with USB2 */
352MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
353MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
354MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
355MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
356
357/* UART3 (GIGA_UART_GATING) */
358MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0)
359MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0)
360MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0)
361MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0)
362MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0)
363MUX_CFG("UART3_BCLK", A, 0, 0, 2, 6, 0, NA, 0, 0)
364MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0)
365
366/* PWT & PWL, conflicts with UART3 */
367MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0)
368MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0)
369
370/* USB internal master generic */
371MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1)
372MUX_CFG("R18_1510_USB_GPIO0", 7, 9, 0, 1, 11, 1, NA, 0, 1)
373/* works around erratum: W4_USB_PUEN and W4_USB_PUDIS are switched! */
374MUX_CFG("W4_USB_PUEN", D, 3, 3, 3, 5, 1, NA, 0, 1)
375MUX_CFG("W4_USB_CLKO", D, 3, 1, 3, 5, 0, NA, 0, 1)
376MUX_CFG("W4_USB_HIGHZ", D, 3, 4, 3, 5, 0, 3, 0, 1)
377MUX_CFG("W4_GPIO58", D, 3, 7, 3, 5, 0, 3, 0, 1)
378
379/* USB1 master */
380MUX_CFG("USB1_SUSP", 8, 27, 2, 1, 27, 0, NA, 0, 1)
381MUX_CFG("USB1_SE0", 9, 0, 2, 1, 28, 0, NA, 0, 1)
382MUX_CFG("W13_1610_USB1_SE0", 9, 0, 4, 1, 28, 0, NA, 0, 1)
383MUX_CFG("USB1_TXEN", 9, 3, 2, 1, 29, 0, NA, 0, 1)
384MUX_CFG("USB1_TXD", 9, 24, 1, 2, 4, 0, NA, 0, 1)
385MUX_CFG("USB1_VP", A, 3, 1, 2, 7, 0, NA, 0, 1)
386MUX_CFG("USB1_VM", A, 6, 1, 2, 8, 0, NA, 0, 1)
387MUX_CFG("USB1_RCV", A, 9, 1, 2, 9, 0, NA, 0, 1)
388MUX_CFG("USB1_SPEED", A, 12, 2, 2, 10, 0, NA, 0, 1)
389MUX_CFG("R13_1610_USB1_SPEED", A, 12, 5, 2, 10, 0, NA, 0, 1)
390MUX_CFG("R13_1710_USB1_SEO", A, 12, 5, 2, 10, 0, NA, 0, 1)
391
392/* USB2 master */
393MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1)
394MUX_CFG("USB2_VP", B, 6, 1, 2, 18, 0, NA, 0, 1)
395MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1)
396MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1)
397MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1)
398MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1)
399MUX_CFG("USB2_TXD", C, 27, 2, 3, 3, 0, NA, 0, 1)
400
401/* OMAP-1510 GPIO */
402MUX_CFG("R18_1510_GPIO0", 7, 9, 0, 1, 11, 1, 0, 0, 1)
403MUX_CFG("R19_1510_GPIO1", 7, 6, 0, 1, 10, 1, 0, 0, 1)
404MUX_CFG("M14_1510_GPIO2", 7, 3, 0, 1, 9, 1, 0, 0, 1)
405
406/* OMAP1610 GPIO */
407MUX_CFG("P18_1610_GPIO3", 7, 0, 0, 1, 8, 0, NA, 0, 1)
408MUX_CFG("Y15_1610_GPIO17", A, 0, 7, 2, 6, 0, NA, 0, 1)
409
410/* OMAP-1710 GPIO */
411MUX_CFG("R18_1710_GPIO0", 7, 9, 0, 1, 11, 1, 1, 1, 1)
412MUX_CFG("V2_1710_GPIO10", F, 27, 1, 4, 3, 1, 4, 1, 1)
413MUX_CFG("N21_1710_GPIO14", 6, 9, 0, 1, 1, 1, 1, 1, 1)
414MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1)
415
416/* MPUIO */
417MUX_CFG("MPUIO2", 7, 18, 0, 1, 14, 1, NA, 0, 1)
418MUX_CFG("N15_1610_MPUIO2", 7, 18, 0, 1, 14, 1, 1, 0, 1)
419MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1)
420MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1)
421
422MUX_CFG("T20_1610_MPUIO5", 7, 12, 0, 1, 12, 0, 3, 0, 1)
423MUX_CFG("W11_1610_MPUIO6", 10, 15, 2, 3, 8, 0, 3, 0, 1)
424MUX_CFG("V10_1610_MPUIO7", A, 24, 2, 2, 14, 0, 2, 0, 1)
425MUX_CFG("W11_1610_MPUIO9", 10, 15, 1, 3, 8, 0, 3, 0, 1)
426MUX_CFG("V10_1610_MPUIO10", A, 24, 1, 2, 14, 0, 2, 0, 1)
427MUX_CFG("W10_1610_MPUIO11", A, 18, 2, 2, 11, 0, 2, 0, 1)
428MUX_CFG("E20_1610_MPUIO13", 3, 21, 1, 0, 7, 0, 0, 0, 1)
429MUX_CFG("U20_1610_MPUIO14", 9, 6, 6, 0, 30, 0, 0, 0, 1)
430MUX_CFG("E19_1610_MPUIO15", 3, 18, 1, 0, 6, 0, 0, 0, 1)
431
432/* MCBSP2 */
433MUX_CFG("MCBSP2_CLKR", C, 6, 0, 2, 27, 1, NA, 0, 1)
434MUX_CFG("MCBSP2_CLKX", C, 9, 0, 2, 29, 1, NA, 0, 1)
435MUX_CFG("MCBSP2_DR", C, 0, 0, 2, 26, 1, NA, 0, 1)
436MUX_CFG("MCBSP2_DX", C, 15, 0, 2, 31, 1, NA, 0, 1)
437MUX_CFG("MCBSP2_FSR", C, 12, 0, 2, 30, 1, NA, 0, 1)
438MUX_CFG("MCBSP2_FSX", C, 3, 0, 2, 27, 1, NA, 0, 1)
439
440/* MCBSP3 NOTE: Mode must 1 for clock */
441MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1)
442
443/* Misc ballouts */
444MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
445MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0)
446
447/* OMAP-1610 MMC2 */
448MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
449MUX_CFG("V8_1610_MMC2_DAT1", B, 27, 6, 2, 25, 1, 2, 1, 1)
450MUX_CFG("W15_1610_MMC2_DAT2", 9, 12, 6, 2, 5, 1, 2, 1, 1)
451MUX_CFG("R10_1610_MMC2_DAT3", B, 18, 6, 2, 22, 1, 2, 1, 1)
452MUX_CFG("Y10_1610_MMC2_CLK", B, 3, 6, 2, 17, 0, 2, 0, 1)
453MUX_CFG("Y8_1610_MMC2_CMD", B, 24, 6, 2, 24, 1, 2, 1, 1)
454MUX_CFG("V9_1610_MMC2_CMDDIR", B, 12, 6, 2, 20, 0, 2, 1, 1)
455MUX_CFG("V5_1610_MMC2_DATDIR0", B, 15, 6, 2, 21, 0, 2, 1, 1)
456MUX_CFG("W19_1610_MMC2_DATDIR1", 8, 15, 6, 1, 23, 0, 1, 1, 1)
457MUX_CFG("R18_1610_MMC2_CLKIN", 7, 9, 6, 1, 11, 0, 1, 11, 1)
458
459/* OMAP-1610 External Trace Interface */
460MUX_CFG("M19_1610_ETM_PSTAT0", 5, 27, 1, 0, 29, 0, 0, 0, 1)
461MUX_CFG("L15_1610_ETM_PSTAT1", 5, 24, 1, 0, 28, 0, 0, 0, 1)
462MUX_CFG("L18_1610_ETM_PSTAT2", 5, 21, 1, 0, 27, 0, 0, 0, 1)
463MUX_CFG("L19_1610_ETM_D0", 5, 18, 1, 0, 26, 0, 0, 0, 1)
464MUX_CFG("J19_1610_ETM_D6", 5, 0, 1, 0, 20, 0, 0, 0, 1)
465MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1)
466
467/* OMAP16XX GPIO */
468MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1)
469MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1)
470MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1)
471MUX_CFG("N20_1610_GPIO11", 6, 18, 0, 1, 4, 0, 1, 1, 1)
472MUX_CFG("N19_1610_GPIO13", 6, 12, 0, 1, 2, 0, 1, 1, 1)
473MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1)
474MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1)
475MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1)
476MUX_CFG("W19_1610_GPIO48", 8, 15, 7, 1, 23, 1, 1, 0, 1)
477MUX_CFG("M7_1610_GPIO62", 10, 0, 0, 4, 24, 0, 4, 0, 1)
478MUX_CFG("V14_16XX_GPIO37", 9, 18, 7, 2, 2, 0, 2, 2, 0)
479MUX_CFG("R9_16XX_GPIO18", C, 18, 7, 3, 0, 0, 3, 0, 0)
480MUX_CFG("L14_16XX_GPIO49", 6, 3, 7, 0, 31, 0, 0, 31, 0)
481
482/* OMAP-1610 uWire */
483MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1)
484MUX_CFG("U18_1610_UWIRE_SDI", 8, 0, 0, 1, 18, 0, 1, 1, 1)
485MUX_CFG("W21_1610_UWIRE_SDO", 8, 3, 0, 1, 19, 0, 1, 1, 1)
486MUX_CFG("N14_1610_UWIRE_CS0", 8, 9, 1, 1, 21, 0, 1, 1, 1)
487MUX_CFG("P15_1610_UWIRE_CS3", 8, 12, 1, 1, 22, 0, 1, 1, 1)
488MUX_CFG("N15_1610_UWIRE_CS1", 7, 18, 2, 1, 14, 0, NA, 0, 1)
489
490/* OMAP-1610 Flash */
491MUX_CFG("L3_1610_FLASH_CS2B_OE",10, 6, 1, NA, 0, 0, NA, 0, 1)
492MUX_CFG("M8_1610_FLASH_CS2B_WE",10, 3, 1, NA, 0, 0, NA, 0, 1)
493
494/* First MMC interface, same on 1510, 1610 and 1710 */
495MUX_CFG("MMC_CMD", A, 27, 0, 2, 15, 1, 2, 1, 1)
496MUX_CFG("MMC_DAT1", A, 24, 0, 2, 14, 1, 2, 1, 1)
497MUX_CFG("MMC_DAT2", A, 18, 0, 2, 12, 1, 2, 1, 1)
498MUX_CFG("MMC_DAT0", B, 0, 0, 2, 16, 1, 2, 1, 1)
499MUX_CFG("MMC_CLK", A, 21, 0, NA, 0, 0, NA, 0, 1)
500MUX_CFG("MMC_DAT3", 10, 15, 0, 3, 8, 1, 3, 1, 1)
501MUX_CFG("M15_1710_MMC_CLKI", 6, 21, 2, 0, 0, 0, NA, 0, 1)
502MUX_CFG("P19_1710_MMC_CMDDIR", 6, 24, 6, 0, 0, 0, NA, 0, 1)
503MUX_CFG("P20_1710_MMC_DATDIR0", 6, 27, 5, 0, 0, 0, NA, 0, 1)
504
505/* OMAP-1610 USB0 alternate configuration */
506MUX_CFG("W9_USB0_TXEN", B, 9, 5, 2, 19, 0, 2, 0, 1)
507MUX_CFG("AA9_USB0_VP", B, 6, 5, 2, 18, 0, 2, 0, 1)
508MUX_CFG("Y5_USB0_RCV", C, 21, 5, 3, 1, 0, 1, 0, 1)
509MUX_CFG("R9_USB0_VM", C, 18, 5, 3, 0, 0, 3, 0, 1)
510MUX_CFG("V6_USB0_TXD", C, 27, 5, 3, 3, 0, 3, 0, 1)
511MUX_CFG("W5_USB0_SE0", C, 24, 5, 3, 2, 0, 3, 0, 1)
512MUX_CFG("V9_USB0_SPEED", B, 12, 5, 2, 20, 0, 2, 0, 1)
513MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1)
514
515/* USB2 interface */
516MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1)
517MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1)
518MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1)
519MUX_CFG("R9_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1)
520MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1)
521MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1)
522
523/* 16XX UART */
524MUX_CFG("R13_1610_UART1_TX", A, 12, 6, 2, 10, 0, 2, 10, 1)
525MUX_CFG("V14_16XX_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1)
526MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1)
527MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1)
528MUX_CFG("R9_16XX_UART2_RX", C, 18, 0, 3, 0, 0, 3, 0, 1)
529MUX_CFG("L14_16XX_UART3_RX", 6, 3, 0, 0, 31, 0, 0, 31, 1)
530
531/* I2C interface */
532MUX_CFG("I2C_SCL", 7, 24, 0, NA, 0, 0, NA, 0, 0)
533MUX_CFG("I2C_SDA", 7, 27, 0, NA, 0, 0, NA, 0, 0)
534
535/* Keypad */
536MUX_CFG("F18_1610_KBC0", 3, 15, 0, 0, 5, 1, 0, 0, 0)
537MUX_CFG("D20_1610_KBC1", 3, 12, 0, 0, 4, 1, 0, 0, 0)
538MUX_CFG("D19_1610_KBC2", 3, 9, 0, 0, 3, 1, 0, 0, 0)
539MUX_CFG("E18_1610_KBC3", 3, 6, 0, 0, 2, 1, 0, 0, 0)
540MUX_CFG("C21_1610_KBC4", 3, 3, 0, 0, 1, 1, 0, 0, 0)
541MUX_CFG("G18_1610_KBR0", 4, 0, 0, 0, 10, 1, 0, 1, 0)
542MUX_CFG("F19_1610_KBR1", 3, 27, 0, 0, 9, 1, 0, 1, 0)
543MUX_CFG("H14_1610_KBR2", 3, 24, 0, 0, 8, 1, 0, 1, 0)
544MUX_CFG("E20_1610_KBR3", 3, 21, 0, 0, 7, 1, 0, 1, 0)
545MUX_CFG("E19_1610_KBR4", 3, 18, 0, 0, 6, 1, 0, 1, 0)
546MUX_CFG("N19_1610_KBR5", 6, 12, 1, 1, 2, 1, 1, 1, 0)
547
548/* Power management */
549MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, NA, 0, 0, NA, 0, 0)
550
551/* MCLK Settings */
552MUX_CFG("V5_1710_MCLK_ON", B, 15, 0, NA, 0, 0, NA, 0, 0)
553MUX_CFG("V5_1710_MCLK_OFF", B, 15, 6, NA, 0, 0, NA, 0, 0)
554MUX_CFG("R10_1610_MCLK_ON", B, 18, 0, NA, 22, 0, NA, 1, 0)
555MUX_CFG("R10_1610_MCLK_OFF", B, 18, 6, 2, 22, 1, 2, 1, 1)
556
557/* CompactFlash controller, conflicts with MMC1 */
558MUX_CFG("P11_1610_CF_CD2", A, 27, 3, 2, 15, 1, 2, 1, 1)
559MUX_CFG("R11_1610_CF_IOIS16", B, 0, 3, 2, 16, 1, 2, 1, 1)
560MUX_CFG("V10_1610_CF_IREQ", A, 24, 3, 2, 14, 0, 2, 0, 1)
561MUX_CFG("W10_1610_CF_RESET", A, 18, 3, 2, 12, 1, 2, 1, 1)
562MUX_CFG("W11_1610_CF_CD1", 10, 15, 3, 3, 8, 1, 3, 1, 1)
563};
564 405
565#endif /* __MUX_C__ */ 406 /* 24xx GPIO */
407 Y20_24XX_GPIO60,
408 M15_24XX_GPIO92,
409};
566 410
567#ifdef CONFIG_OMAP_MUX 411#ifdef CONFIG_OMAP_MUX
568/* setup pin muxing in Linux */ 412/* setup pin muxing in Linux */
569extern int omap_cfg_reg(reg_cfg_t reg_cfg); 413extern int omap1_mux_init(void);
414extern int omap2_mux_init(void);
415extern int omap_mux_register(struct pin_config * pins, unsigned long size);
416extern int omap_cfg_reg(unsigned long reg_cfg);
570#else 417#else
571/* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ 418/* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */
572static inline int omap_cfg_reg(reg_cfg_t reg_cfg) { return 0; } 419static inline int omap1_mux_init(void) { return 0; }
420static inline int omap2_mux_init(void) { return 0; }
421static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; }
573#endif 422#endif
574 423
575#endif 424#endif
diff --git a/include/asm-arm/arch-omap/omap1510.h b/include/asm-arm/arch-omap/omap1510.h
index f086a3933906..c575d354850f 100644
--- a/include/asm-arm/arch-omap/omap1510.h
+++ b/include/asm-arm/arch-omap/omap1510.h
@@ -25,8 +25,8 @@
25 * 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */ 26 */
27 27
28#ifndef __ASM_ARCH_OMAP1510_H 28#ifndef __ASM_ARCH_OMAP15XX_H
29#define __ASM_ARCH_OMAP1510_H 29#define __ASM_ARCH_OMAP15XX_H
30 30
31/* 31/*
32 * ---------------------------------------------------------------------------- 32 * ----------------------------------------------------------------------------
@@ -44,5 +44,5 @@
44#define OMAP1510_DSPREG_SIZE SZ_128K 44#define OMAP1510_DSPREG_SIZE SZ_128K
45#define OMAP1510_DSPREG_START 0xE1000000 45#define OMAP1510_DSPREG_START 0xE1000000
46 46
47#endif /* __ASM_ARCH_OMAP1510_H */ 47#endif /* __ASM_ARCH_OMAP15XX_H */
48 48
diff --git a/include/asm-arm/arch-omap/omap24xx.h b/include/asm-arm/arch-omap/omap24xx.h
index a9105466a417..6e59805fa654 100644
--- a/include/asm-arm/arch-omap/omap24xx.h
+++ b/include/asm-arm/arch-omap/omap24xx.h
@@ -1,15 +1,24 @@
1#ifndef __ASM_ARCH_OMAP24XX_H 1#ifndef __ASM_ARCH_OMAP24XX_H
2#define __ASM_ARCH_OMAP24XX_H 2#define __ASM_ARCH_OMAP24XX_H
3 3
4#define OMAP24XX_L4_IO_BASE 0x48000000 4/*
5 * Please place only base defines here and put the rest in device
6 * specific headers. Note also that some of these defines are needed
7 * for omap1 to compile without adding ifdefs.
8 */
9
10#define L4_24XX_BASE 0x48000000
11#define L3_24XX_BASE 0x68000000
5 12
6/* interrupt controller */ 13/* interrupt controller */
7#define OMAP24XX_IC_BASE (OMAP24XX_L4_IO_BASE + 0xfe000) 14#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
8#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) 15#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE)
9
10#define OMAP24XX_IVA_INTC_BASE 0x40000000 16#define OMAP24XX_IVA_INTC_BASE 0x40000000
11
12#define IRQ_SIR_IRQ 0x0040 17#define IRQ_SIR_IRQ 0x0040
13 18
19#define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
20#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000)
21#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000)
22
14#endif /* __ASM_ARCH_OMAP24XX_H */ 23#endif /* __ASM_ARCH_OMAP24XX_H */
15 24
diff --git a/include/asm-arm/arch-omap/omapfb.h b/include/asm-arm/arch-omap/omapfb.h
new file mode 100644
index 000000000000..4ba2622cc142
--- /dev/null
+++ b/include/asm-arm/arch-omap/omapfb.h
@@ -0,0 +1,281 @@
1/*
2 * File: include/asm-arm/arch-omap/omapfb.h
3 *
4 * Framebuffer driver for TI OMAP boards
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 * Author: Imre Deak <imre.deak@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 */
23
24#ifndef __OMAPFB_H
25#define __OMAPFB_H
26
27/* IOCTL commands. */
28
29#define OMAP_IOW(num, dtype) _IOW('O', num, dtype)
30#define OMAP_IOR(num, dtype) _IOR('O', num, dtype)
31#define OMAP_IOWR(num, dtype) _IOWR('O', num, dtype)
32#define OMAP_IO(num) _IO('O', num)
33
34#define OMAPFB_MIRROR OMAP_IOW(31, int)
35#define OMAPFB_SYNC_GFX OMAP_IO(37)
36#define OMAPFB_VSYNC OMAP_IO(38)
37#define OMAPFB_SET_UPDATE_MODE OMAP_IOW(40, enum omapfb_update_mode)
38#define OMAPFB_GET_CAPS OMAP_IOR(42, unsigned long)
39#define OMAPFB_GET_UPDATE_MODE OMAP_IOW(43, enum omapfb_update_mode)
40#define OMAPFB_LCD_TEST OMAP_IOW(45, int)
41#define OMAPFB_CTRL_TEST OMAP_IOW(46, int)
42#define OMAPFB_UPDATE_WINDOW OMAP_IOW(47, struct omapfb_update_window)
43#define OMAPFB_SETUP_PLANE OMAP_IOW(48, struct omapfb_setup_plane)
44#define OMAPFB_ENABLE_PLANE OMAP_IOW(49, struct omapfb_enable_plane)
45#define OMAPFB_SET_COLOR_KEY OMAP_IOW(50, struct omapfb_color_key)
46
47#define OMAPFB_CAPS_GENERIC_MASK 0x00000fff
48#define OMAPFB_CAPS_LCDC_MASK 0x00fff000
49#define OMAPFB_CAPS_PANEL_MASK 0xff000000
50
51#define OMAPFB_CAPS_MANUAL_UPDATE 0x00001000
52#define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000
53
54/* Values from DSP must map to lower 16-bits */
55#define OMAPFB_FORMAT_MASK 0x00ff
56#define OMAPFB_FORMAT_FLAG_DOUBLE 0x0100
57
58enum omapfb_color_format {
59 OMAPFB_COLOR_RGB565 = 0,
60 OMAPFB_COLOR_YUV422,
61 OMAPFB_COLOR_YUV420,
62 OMAPFB_COLOR_CLUT_8BPP,
63 OMAPFB_COLOR_CLUT_4BPP,
64 OMAPFB_COLOR_CLUT_2BPP,
65 OMAPFB_COLOR_CLUT_1BPP,
66};
67
68struct omapfb_update_window {
69 u32 x, y;
70 u32 width, height;
71 u32 format;
72};
73
74enum omapfb_plane {
75 OMAPFB_PLANE_GFX = 0,
76 OMAPFB_PLANE_VID1,
77 OMAPFB_PLANE_VID2,
78};
79
80enum omapfb_channel_out {
81 OMAPFB_CHANNEL_OUT_LCD = 0,
82 OMAPFB_CHANNEL_OUT_DIGIT,
83};
84
85struct omapfb_setup_plane {
86 u8 plane;
87 u8 channel_out;
88 u32 offset;
89 u32 pos_x, pos_y;
90 u32 width, height;
91 u32 color_mode;
92};
93
94struct omapfb_enable_plane {
95 u8 plane;
96 u8 enable;
97};
98
99enum omapfb_color_key_type {
100 OMAPFB_COLOR_KEY_DISABLED = 0,
101 OMAPFB_COLOR_KEY_GFX_DST,
102 OMAPFB_COLOR_KEY_VID_SRC,
103};
104
105struct omapfb_color_key {
106 u8 channel_out;
107 u32 background;
108 u32 trans_key;
109 u8 key_type;
110};
111
112enum omapfb_update_mode {
113 OMAPFB_UPDATE_DISABLED = 0,
114 OMAPFB_AUTO_UPDATE,
115 OMAPFB_MANUAL_UPDATE
116};
117
118#ifdef __KERNEL__
119
120#include <linux/completion.h>
121#include <linux/interrupt.h>
122#include <linux/fb.h>
123
124#define OMAP_LCDC_INV_VSYNC 0x0001
125#define OMAP_LCDC_INV_HSYNC 0x0002
126#define OMAP_LCDC_INV_PIX_CLOCK 0x0004
127#define OMAP_LCDC_INV_OUTPUT_EN 0x0008
128#define OMAP_LCDC_HSVS_RISING_EDGE 0x0010
129#define OMAP_LCDC_HSVS_OPPOSITE 0x0020
130
131#define OMAP_LCDC_SIGNAL_MASK 0x003f
132
133#define OMAP_LCDC_PANEL_TFT 0x0100
134
135#ifdef CONFIG_ARCH_OMAP1
136#define OMAPFB_PLANE_NUM 1
137#else
138#define OMAPFB_PLANE_NUM 3
139#endif
140
141struct omapfb_device;
142
143struct lcd_panel {
144 const char *name;
145 int config; /* TFT/STN, signal inversion */
146 int bpp; /* Pixel format in fb mem */
147 int data_lines; /* Lines on LCD HW interface */
148
149 int x_res, y_res;
150 int pixel_clock; /* In kHz */
151 int hsw; /* Horizontal synchronization
152 pulse width */
153 int hfp; /* Horizontal front porch */
154 int hbp; /* Horizontal back porch */
155 int vsw; /* Vertical synchronization
156 pulse width */
157 int vfp; /* Vertical front porch */
158 int vbp; /* Vertical back porch */
159 int acb; /* ac-bias pin frequency */
160 int pcd; /* pixel clock divider.
161 Obsolete use pixel_clock instead */
162
163 int (*init) (struct omapfb_device *fbdev);
164 void (*cleanup) (void);
165 int (*enable) (void);
166 void (*disable) (void);
167 unsigned long (*get_caps) (void);
168 int (*set_bklight_level)(unsigned int level);
169 unsigned int (*get_bklight_level)(void);
170 unsigned int (*get_bklight_max) (void);
171 int (*run_test) (int test_num);
172};
173
174struct omapfb_device;
175
176struct extif_timings {
177 int cs_on_time;
178 int cs_off_time;
179 int we_on_time;
180 int we_off_time;
181 int re_on_time;
182 int re_off_time;
183 int we_cycle_time;
184 int re_cycle_time;
185 int cs_pulse_width;
186 int access_time;
187};
188
189struct lcd_ctrl_extif {
190 int (*init) (void);
191 void (*cleanup) (void);
192 void (*set_timings) (const struct extif_timings *timings);
193 void (*write_command) (u32 cmd);
194 u32 (*read_data) (void);
195 void (*write_data) (u32 data);
196 void (*transfer_area) (int width, int height,
197 void (callback)(void * data), void *data);
198};
199
200struct lcd_ctrl {
201 const char *name;
202 void *data;
203
204 int (*init) (struct omapfb_device *fbdev,
205 int ext_mode, int req_vram_size);
206 void (*cleanup) (void);
207 void (*get_vram_layout)(unsigned long *size,
208 void **virt_base,
209 dma_addr_t *phys_base);
210 unsigned long (*get_caps) (void);
211 int (*set_update_mode)(enum omapfb_update_mode mode);
212 enum omapfb_update_mode (*get_update_mode)(void);
213 int (*setup_plane) (int plane, int channel_out,
214 unsigned long offset,
215 int screen_width,
216 int pos_x, int pos_y, int width,
217 int height, int color_mode);
218 int (*enable_plane) (int plane, int enable);
219 int (*update_window) (struct omapfb_update_window *win,
220 void (*callback)(void *),
221 void *callback_data);
222 void (*sync) (void);
223 void (*suspend) (void);
224 void (*resume) (void);
225 int (*run_test) (int test_num);
226 int (*setcolreg) (u_int regno, u16 red, u16 green,
227 u16 blue, u16 transp,
228 int update_hw_mem);
229 int (*set_color_key) (struct omapfb_color_key *ck);
230
231};
232
233enum omapfb_state {
234 OMAPFB_DISABLED = 0,
235 OMAPFB_SUSPENDED= 99,
236 OMAPFB_ACTIVE = 100
237};
238
239struct omapfb_device {
240 int state;
241 int ext_lcdc; /* Using external
242 LCD controller */
243 struct semaphore rqueue_sema;
244
245 void *vram_virt_base;
246 dma_addr_t vram_phys_base;
247 unsigned long vram_size;
248
249 int color_mode;
250 int palette_size;
251 int mirror;
252 u32 pseudo_palette[17];
253
254 struct lcd_panel *panel; /* LCD panel */
255 struct lcd_ctrl *ctrl; /* LCD controller */
256 struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */
257 struct lcd_ctrl_extif *ext_if; /* LCD ctrl external
258 interface */
259 struct fb_info *fb_info;
260
261 struct device *dev;
262};
263
264extern struct lcd_panel h3_panel;
265extern struct lcd_panel h2_panel;
266extern struct lcd_panel p2_panel;
267extern struct lcd_panel osk_panel;
268extern struct lcd_panel innovator1610_panel;
269extern struct lcd_panel innovator1510_panel;
270
271#ifdef CONFIG_ARCH_OMAP1
272extern struct lcd_ctrl omap1_lcd_ctrl;
273#else
274extern struct lcd_ctrl omap2_disp_ctrl;
275#endif
276
277extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval);
278
279#endif /* __KERNEL__ */
280
281#endif /* __OMAPFB_H */
diff --git a/include/asm-arm/arch-omap/pm.h b/include/asm-arm/arch-omap/pm.h
index fbd742d0c499..7c790425e363 100644
--- a/include/asm-arm/arch-omap/pm.h
+++ b/include/asm-arm/arch-omap/pm.h
@@ -98,7 +98,14 @@
98#define OMAP1610_IDLECT3 0xfffece24 98#define OMAP1610_IDLECT3 0xfffece24
99#define OMAP1610_IDLE_LOOP_REQUEST 0x0400 99#define OMAP1610_IDLE_LOOP_REQUEST 0x0400
100 100
101#if !defined(CONFIG_ARCH_OMAP1510) && \ 101#define OMAP730_IDLECT1_SLEEP_VAL 0x16c7
102#define OMAP730_IDLECT2_SLEEP_VAL 0x09c7
103#define OMAP730_IDLECT3_VAL 0x3f
104#define OMAP730_IDLECT3 0xfffece24
105#define OMAP730_IDLE_LOOP_REQUEST 0x0C00
106
107#if !defined(CONFIG_ARCH_OMAP730) && \
108 !defined(CONFIG_ARCH_OMAP15XX) && \
102 !defined(CONFIG_ARCH_OMAP16XX) && \ 109 !defined(CONFIG_ARCH_OMAP16XX) && \
103 !defined(CONFIG_ARCH_OMAP24XX) 110 !defined(CONFIG_ARCH_OMAP24XX)
104#error "Power management for this processor not implemented yet" 111#error "Power management for this processor not implemented yet"
@@ -107,8 +114,10 @@
107#ifndef __ASSEMBLER__ 114#ifndef __ASSEMBLER__
108extern void omap_pm_idle(void); 115extern void omap_pm_idle(void);
109extern void omap_pm_suspend(void); 116extern void omap_pm_suspend(void);
117extern void omap730_cpu_suspend(unsigned short, unsigned short);
110extern void omap1510_cpu_suspend(unsigned short, unsigned short); 118extern void omap1510_cpu_suspend(unsigned short, unsigned short);
111extern void omap1610_cpu_suspend(unsigned short, unsigned short); 119extern void omap1610_cpu_suspend(unsigned short, unsigned short);
120extern void omap730_idle_loop_suspend(void);
112extern void omap1510_idle_loop_suspend(void); 121extern void omap1510_idle_loop_suspend(void);
113extern void omap1610_idle_loop_suspend(void); 122extern void omap1610_idle_loop_suspend(void);
114 123
@@ -118,6 +127,8 @@ extern void omap_serial_wake_trigger(int enable);
118#define omap_serial_wake_trigger(x) {} 127#define omap_serial_wake_trigger(x) {}
119#endif /* CONFIG_OMAP_SERIAL_WAKE */ 128#endif /* CONFIG_OMAP_SERIAL_WAKE */
120 129
130extern unsigned int omap730_cpu_suspend_sz;
131extern unsigned int omap730_idle_loop_suspend_sz;
121extern unsigned int omap1510_cpu_suspend_sz; 132extern unsigned int omap1510_cpu_suspend_sz;
122extern unsigned int omap1510_idle_loop_suspend_sz; 133extern unsigned int omap1510_idle_loop_suspend_sz;
123extern unsigned int omap1610_cpu_suspend_sz; 134extern unsigned int omap1610_cpu_suspend_sz;
@@ -131,6 +142,10 @@ extern unsigned int omap1610_idle_loop_suspend_sz;
131#define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) 142#define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x))
132#define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] 143#define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]
133 144
145#define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x)
146#define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x))
147#define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]
148
134#define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) 149#define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x)
135#define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) 150#define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x))
136#define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] 151#define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]
@@ -188,13 +203,34 @@ enum mpui1510_save_state {
188 MPUI1510_SLEEP_SAVE_EMIFS_CONFIG, 203 MPUI1510_SLEEP_SAVE_EMIFS_CONFIG,
189 MPUI1510_SLEEP_SAVE_OMAP_IH1_MIR, 204 MPUI1510_SLEEP_SAVE_OMAP_IH1_MIR,
190 MPUI1510_SLEEP_SAVE_OMAP_IH2_MIR, 205 MPUI1510_SLEEP_SAVE_OMAP_IH2_MIR,
191#if defined(CONFIG_ARCH_OMAP1510) 206#if defined(CONFIG_ARCH_OMAP15XX)
192 MPUI1510_SLEEP_SAVE_SIZE 207 MPUI1510_SLEEP_SAVE_SIZE
193#else 208#else
194 MPUI1510_SLEEP_SAVE_SIZE = 0 209 MPUI1510_SLEEP_SAVE_SIZE = 0
195#endif 210#endif
196}; 211};
197 212
213enum mpui730_save_state {
214 MPUI730_SLEEP_SAVE_START = 0,
215 /*
216 * MPUI registers 32 bits
217 */
218 MPUI730_SLEEP_SAVE_MPUI_CTRL,
219 MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG,
220 MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG,
221 MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS,
222 MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG,
223 MPUI730_SLEEP_SAVE_EMIFS_CONFIG,
224 MPUI730_SLEEP_SAVE_OMAP_IH1_MIR,
225 MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR,
226 MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR,
227#if defined(CONFIG_ARCH_OMAP730)
228 MPUI730_SLEEP_SAVE_SIZE
229#else
230 MPUI730_SLEEP_SAVE_SIZE = 0
231#endif
232};
233
198enum mpui1610_save_state { 234enum mpui1610_save_state {
199 MPUI1610_SLEEP_SAVE_START = 0, 235 MPUI1610_SLEEP_SAVE_START = 0,
200 /* 236 /*
diff --git a/include/asm-arm/arch-omap/prcm.h b/include/asm-arm/arch-omap/prcm.h
new file mode 100644
index 000000000000..7b48a5cbb15f
--- /dev/null
+++ b/include/asm-arm/arch-omap/prcm.h
@@ -0,0 +1,429 @@
1/*
2 * prcm.h - Access definations for use in OMAP24XX clock and power management
3 *
4 * Copyright (C) 2005 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARM_ARCH_DPM_PRCM_H
22#define __ASM_ARM_ARCH_DPM_PRCM_H
23
24/* SET_PERFORMANCE_LEVEL PARAMETERS */
25#define PRCM_HALF_SPEED 1
26#define PRCM_FULL_SPEED 2
27
28#ifndef __ASSEMBLER__
29
30#define PRCM_REG32(offset) __REG32(OMAP24XX_PRCM_BASE + (offset))
31
32#define PRCM_REVISION PRCM_REG32(0x000)
33#define PRCM_SYSCONFIG PRCM_REG32(0x010)
34#define PRCM_IRQSTATUS_MPU PRCM_REG32(0x018)
35#define PRCM_IRQENABLE_MPU PRCM_REG32(0x01C)
36#define PRCM_VOLTCTRL PRCM_REG32(0x050)
37#define PRCM_VOLTST PRCM_REG32(0x054)
38#define PRCM_CLKSRC_CTRL PRCM_REG32(0x060)
39#define PRCM_CLKOUT_CTRL PRCM_REG32(0x070)
40#define PRCM_CLKEMUL_CTRL PRCM_REG32(0x078)
41#define PRCM_CLKCFG_CTRL PRCM_REG32(0x080)
42#define PRCM_CLKCFG_STATUS PRCM_REG32(0x084)
43#define PRCM_VOLTSETUP PRCM_REG32(0x090)
44#define PRCM_CLKSSETUP PRCM_REG32(0x094)
45#define PRCM_POLCTRL PRCM_REG32(0x098)
46
47/* GENERAL PURPOSE */
48#define GENERAL_PURPOSE1 PRCM_REG32(0x0B0)
49#define GENERAL_PURPOSE2 PRCM_REG32(0x0B4)
50#define GENERAL_PURPOSE3 PRCM_REG32(0x0B8)
51#define GENERAL_PURPOSE4 PRCM_REG32(0x0BC)
52#define GENERAL_PURPOSE5 PRCM_REG32(0x0C0)
53#define GENERAL_PURPOSE6 PRCM_REG32(0x0C4)
54#define GENERAL_PURPOSE7 PRCM_REG32(0x0C8)
55#define GENERAL_PURPOSE8 PRCM_REG32(0x0CC)
56#define GENERAL_PURPOSE9 PRCM_REG32(0x0D0)
57#define GENERAL_PURPOSE10 PRCM_REG32(0x0D4)
58#define GENERAL_PURPOSE11 PRCM_REG32(0x0D8)
59#define GENERAL_PURPOSE12 PRCM_REG32(0x0DC)
60#define GENERAL_PURPOSE13 PRCM_REG32(0x0E0)
61#define GENERAL_PURPOSE14 PRCM_REG32(0x0E4)
62#define GENERAL_PURPOSE15 PRCM_REG32(0x0E8)
63#define GENERAL_PURPOSE16 PRCM_REG32(0x0EC)
64#define GENERAL_PURPOSE17 PRCM_REG32(0x0F0)
65#define GENERAL_PURPOSE18 PRCM_REG32(0x0F4)
66#define GENERAL_PURPOSE19 PRCM_REG32(0x0F8)
67#define GENERAL_PURPOSE20 PRCM_REG32(0x0FC)
68
69/* MPU */
70#define CM_CLKSEL_MPU PRCM_REG32(0x140)
71#define CM_CLKSTCTRL_MPU PRCM_REG32(0x148)
72#define RM_RSTST_MPU PRCM_REG32(0x158)
73#define PM_WKDEP_MPU PRCM_REG32(0x1C8)
74#define PM_EVGENCTRL_MPU PRCM_REG32(0x1D4)
75#define PM_EVEGENONTIM_MPU PRCM_REG32(0x1D8)
76#define PM_EVEGENOFFTIM_MPU PRCM_REG32(0x1DC)
77#define PM_PWSTCTRL_MPU PRCM_REG32(0x1E0)
78#define PM_PWSTST_MPU PRCM_REG32(0x1E4)
79
80/* CORE */
81#define CM_FCLKEN1_CORE PRCM_REG32(0x200)
82#define CM_FCLKEN2_CORE PRCM_REG32(0x204)
83#define CM_FCLKEN3_CORE PRCM_REG32(0x208)
84#define CM_ICLKEN1_CORE PRCM_REG32(0x210)
85#define CM_ICLKEN2_CORE PRCM_REG32(0x214)
86#define CM_ICLKEN3_CORE PRCM_REG32(0x218)
87#define CM_ICLKEN4_CORE PRCM_REG32(0x21C)
88#define CM_IDLEST1_CORE PRCM_REG32(0x220)
89#define CM_IDLEST2_CORE PRCM_REG32(0x224)
90#define CM_IDLEST3_CORE PRCM_REG32(0x228)
91#define CM_IDLEST4_CORE PRCM_REG32(0x22C)
92#define CM_AUTOIDLE1_CORE PRCM_REG32(0x230)
93#define CM_AUTOIDLE2_CORE PRCM_REG32(0x234)
94#define CM_AUTOIDLE3_CORE PRCM_REG32(0x238)
95#define CM_AUTOIDLE4_CORE PRCM_REG32(0x23C)
96#define CM_CLKSEL1_CORE PRCM_REG32(0x240)
97#define CM_CLKSEL2_CORE PRCM_REG32(0x244)
98#define CM_CLKSTCTRL_CORE PRCM_REG32(0x248)
99#define PM_WKEN1_CORE PRCM_REG32(0x2A0)
100#define PM_WKEN2_CORE PRCM_REG32(0x2A4)
101#define PM_WKST1_CORE PRCM_REG32(0x2B0)
102#define PM_WKST2_CORE PRCM_REG32(0x2B4)
103#define PM_WKDEP_CORE PRCM_REG32(0x2C8)
104#define PM_PWSTCTRL_CORE PRCM_REG32(0x2E0)
105#define PM_PWSTST_CORE PRCM_REG32(0x2E4)
106
107/* GFX */
108#define CM_FCLKEN_GFX PRCM_REG32(0x300)
109#define CM_ICLKEN_GFX PRCM_REG32(0x310)
110#define CM_IDLEST_GFX PRCM_REG32(0x320)
111#define CM_CLKSEL_GFX PRCM_REG32(0x340)
112#define CM_CLKSTCTRL_GFX PRCM_REG32(0x348)
113#define RM_RSTCTRL_GFX PRCM_REG32(0x350)
114#define RM_RSTST_GFX PRCM_REG32(0x358)
115#define PM_WKDEP_GFX PRCM_REG32(0x3C8)
116#define PM_PWSTCTRL_GFX PRCM_REG32(0x3E0)
117#define PM_PWSTST_GFX PRCM_REG32(0x3E4)
118
119/* WAKE-UP */
120#define CM_FCLKEN_WKUP PRCM_REG32(0x400)
121#define CM_ICLKEN_WKUP PRCM_REG32(0x410)
122#define CM_IDLEST_WKUP PRCM_REG32(0x420)
123#define CM_AUTOIDLE_WKUP PRCM_REG32(0x430)
124#define CM_CLKSEL_WKUP PRCM_REG32(0x440)
125#define RM_RSTCTRL_WKUP PRCM_REG32(0x450)
126#define RM_RSTTIME_WKUP PRCM_REG32(0x454)
127#define RM_RSTST_WKUP PRCM_REG32(0x458)
128#define PM_WKEN_WKUP PRCM_REG32(0x4A0)
129#define PM_WKST_WKUP PRCM_REG32(0x4B0)
130
131/* CLOCKS */
132#define CM_CLKEN_PLL PRCM_REG32(0x500)
133#define CM_IDLEST_CKGEN PRCM_REG32(0x520)
134#define CM_AUTOIDLE_PLL PRCM_REG32(0x530)
135#define CM_CLKSEL1_PLL PRCM_REG32(0x540)
136#define CM_CLKSEL2_PLL PRCM_REG32(0x544)
137
138/* DSP */
139#define CM_FCLKEN_DSP PRCM_REG32(0x800)
140#define CM_ICLKEN_DSP PRCM_REG32(0x810)
141#define CM_IDLEST_DSP PRCM_REG32(0x820)
142#define CM_AUTOIDLE_DSP PRCM_REG32(0x830)
143#define CM_CLKSEL_DSP PRCM_REG32(0x840)
144#define CM_CLKSTCTRL_DSP PRCM_REG32(0x848)
145#define RM_RSTCTRL_DSP PRCM_REG32(0x850)
146#define RM_RSTST_DSP PRCM_REG32(0x858)
147#define PM_WKEN_DSP PRCM_REG32(0x8A0)
148#define PM_WKDEP_DSP PRCM_REG32(0x8C8)
149#define PM_PWSTCTRL_DSP PRCM_REG32(0x8E0)
150#define PM_PWSTST_DSP PRCM_REG32(0x8E4)
151#define PRCM_IRQSTATUS_DSP PRCM_REG32(0x8F0)
152#define PRCM_IRQENABLE_DSP PRCM_REG32(0x8F4)
153
154/* IVA */
155#define PRCM_IRQSTATUS_IVA PRCM_REG32(0x8F8)
156#define PRCM_IRQENABLE_IVA PRCM_REG32(0x8FC)
157
158/* Modem on 2430 */
159#define CM_FCLKEN_MDM PRCM_REG32(0xC00)
160#define CM_ICLKEN_MDM PRCM_REG32(0xC10)
161#define CM_IDLEST_MDM PRCM_REG32(0xC20)
162#define CM_CLKSEL_MDM PRCM_REG32(0xC40)
163
164/* FIXME: Move to header for 2430 */
165#define DISP_BASE (OMAP24XX_L4_IO_BASE+0x50000)
166#define DISP_REG32(offset) __REG32(DISP_BASE + (offset))
167
168#define OMAP24XX_GPMC_BASE (L3_24XX_BASE + 0xa000)
169#define GPMC_BASE (OMAP24XX_GPMC_BASE)
170#define GPMC_REG32(offset) __REG32(GPMC_BASE + (offset))
171
172#define GPT1_BASE (OMAP24XX_GPT1)
173#define GPT1_REG32(offset) __REG32(GPT1_BASE + (offset))
174
175/* Misc sysconfig */
176#define DISPC_SYSCONFIG DISP_REG32(0x410)
177#define SPI_BASE (OMAP24XX_L4_IO_BASE+0x98000)
178#define MCSPI1_SYSCONFIG __REG32(SPI_BASE + 0x10)
179#define MCSPI2_SYSCONFIG __REG32(SPI_BASE+0x2000 + 0x10)
180
181//#define DSP_MMU_SYSCONFIG 0x5A000010
182#define CAMERA_MMU_SYSCONFIG __REG32(DISP_BASE+0x2C10)
183//#define IVA_MMU_SYSCONFIG 0x5D000010
184//#define DSP_DMA_SYSCONFIG 0x00FCC02C
185#define CAMERA_DMA_SYSCONFIG __REG32(DISP_BASE+0x282C)
186#define SYSTEM_DMA_SYSCONFIG __REG32(DISP_BASE+0x602C)
187#define GPMC_SYSCONFIG GPMC_REG32(0x010)
188#define MAILBOXES_SYSCONFIG __REG32(OMAP24XX_L4_IO_BASE+0x94010)
189#define UART1_SYSCONFIG __REG32(OMAP24XX_L4_IO_BASE+0x6A054)
190#define UART2_SYSCONFIG __REG32(OMAP24XX_L4_IO_BASE+0x6C054)
191#define UART3_SYSCONFIG __REG32(OMAP24XX_L4_IO_BASE+0x6E054)
192//#define IVA_SYSCONFIG 0x5C060010
193#define SDRC_SYSCONFIG __REG32(OMAP24XX_SDRC_BASE+0x10)
194#define SMS_SYSCONFIG __REG32(OMAP24XX_SMS_BASE+0x10)
195#define SSI_SYSCONFIG __REG32(DISP_BASE+0x8010)
196//#define VLYNQ_SYSCONFIG 0x67FFFE10
197
198/* rkw - good cannidates for PM_ to start what nm was trying */
199#define OMAP24XX_GPT2 (OMAP24XX_L4_IO_BASE+0x2A000)
200#define OMAP24XX_GPT3 (OMAP24XX_L4_IO_BASE+0x78000)
201#define OMAP24XX_GPT4 (OMAP24XX_L4_IO_BASE+0x7A000)
202#define OMAP24XX_GPT5 (OMAP24XX_L4_IO_BASE+0x7C000)
203#define OMAP24XX_GPT6 (OMAP24XX_L4_IO_BASE+0x7E000)
204#define OMAP24XX_GPT7 (OMAP24XX_L4_IO_BASE+0x80000)
205#define OMAP24XX_GPT8 (OMAP24XX_L4_IO_BASE+0x82000)
206#define OMAP24XX_GPT9 (OMAP24XX_L4_IO_BASE+0x84000)
207#define OMAP24XX_GPT10 (OMAP24XX_L4_IO_BASE+0x86000)
208#define OMAP24XX_GPT11 (OMAP24XX_L4_IO_BASE+0x88000)
209#define OMAP24XX_GPT12 (OMAP24XX_L4_IO_BASE+0x8A000)
210
211#define GPTIMER1_SYSCONFIG GPT1_REG32(0x010)
212#define GPTIMER2_SYSCONFIG __REG32(OMAP24XX_GPT2 + 0x10)
213#define GPTIMER3_SYSCONFIG __REG32(OMAP24XX_GPT3 + 0x10)
214#define GPTIMER4_SYSCONFIG __REG32(OMAP24XX_GPT4 + 0x10)
215#define GPTIMER5_SYSCONFIG __REG32(OMAP24XX_GPT5 + 0x10)
216#define GPTIMER6_SYSCONFIG __REG32(OMAP24XX_GPT6 + 0x10)
217#define GPTIMER7_SYSCONFIG __REG32(OMAP24XX_GPT7 + 0x10)
218#define GPTIMER8_SYSCONFIG __REG32(OMAP24XX_GPT8 + 0x10)
219#define GPTIMER9_SYSCONFIG __REG32(OMAP24XX_GPT9 + 0x10)
220#define GPTIMER10_SYSCONFIG __REG32(OMAP24XX_GPT10 + 0x10)
221#define GPTIMER11_SYSCONFIG __REG32(OMAP24XX_GPT11 + 0x10)
222#define GPTIMER12_SYSCONFIG __REG32(OMAP24XX_GPT12 + 0x10)
223
224#define GPIOX_BASE(X) (OMAP24XX_GPIO_BASE+(0x2000*((X)-1)))
225
226#define GPIO1_SYSCONFIG __REG32((GPIOX_BASE(1)+0x10))
227#define GPIO2_SYSCONFIG __REG32((GPIOX_BASE(2)+0x10))
228#define GPIO3_SYSCONFIG __REG32((GPIOX_BASE(3)+0x10))
229#define GPIO4_SYSCONFIG __REG32((GPIOX_BASE(4)+0x10))
230
231/* GP TIMER 1 */
232#define GPTIMER1_TISTAT GPT1_REG32(0x014)
233#define GPTIMER1_TISR GPT1_REG32(0x018)
234#define GPTIMER1_TIER GPT1_REG32(0x01C)
235#define GPTIMER1_TWER GPT1_REG32(0x020)
236#define GPTIMER1_TCLR GPT1_REG32(0x024)
237#define GPTIMER1_TCRR GPT1_REG32(0x028)
238#define GPTIMER1_TLDR GPT1_REG32(0x02C)
239#define GPTIMER1_TTGR GPT1_REG32(0x030)
240#define GPTIMER1_TWPS GPT1_REG32(0x034)
241#define GPTIMER1_TMAR GPT1_REG32(0x038)
242#define GPTIMER1_TCAR1 GPT1_REG32(0x03C)
243#define GPTIMER1_TSICR GPT1_REG32(0x040)
244#define GPTIMER1_TCAR2 GPT1_REG32(0x044)
245
246/* rkw -- base fix up please... */
247#define GPTIMER3_TISR __REG32(OMAP24XX_L4_IO_BASE+0x78018)
248
249/* SDRC */
250#define SDRC_DLLA_CTRL __REG32(OMAP24XX_SDRC_BASE+0x060)
251#define SDRC_DLLA_STATUS __REG32(OMAP24XX_SDRC_BASE+0x064)
252#define SDRC_DLLB_CTRL __REG32(OMAP24XX_SDRC_BASE+0x068)
253#define SDRC_DLLB_STATUS __REG32(OMAP24XX_SDRC_BASE+0x06C)
254#define SDRC_POWER __REG32(OMAP24XX_SDRC_BASE+0x070)
255#define SDRC_MR_0 __REG32(OMAP24XX_SDRC_BASE+0x084)
256
257/* GPIO 1 */
258#define GPIO1_BASE GPIOX_BASE(1)
259#define GPIO1_REG32(offset) __REG32(GPIO1_BASE + (offset))
260#define GPIO1_IRQENABLE1 GPIO1_REG32(0x01C)
261#define GPIO1_IRQSTATUS1 GPIO1_REG32(0x018)
262#define GPIO1_IRQENABLE2 GPIO1_REG32(0x02C)
263#define GPIO1_IRQSTATUS2 GPIO1_REG32(0x028)
264#define GPIO1_WAKEUPENABLE GPIO1_REG32(0x020)
265#define GPIO1_RISINGDETECT GPIO1_REG32(0x048)
266#define GPIO1_DATAIN GPIO1_REG32(0x038)
267#define GPIO1_OE GPIO1_REG32(0x034)
268#define GPIO1_DATAOUT GPIO1_REG32(0x03C)
269
270/* GPIO2 */
271#define GPIO2_BASE GPIOX_BASE(2)
272#define GPIO2_REG32(offset) __REG32(GPIO2_BASE + (offset))
273#define GPIO2_IRQENABLE1 GPIO2_REG32(0x01C)
274#define GPIO2_IRQSTATUS1 GPIO2_REG32(0x018)
275#define GPIO2_IRQENABLE2 GPIO2_REG32(0x02C)
276#define GPIO2_IRQSTATUS2 GPIO2_REG32(0x028)
277#define GPIO2_WAKEUPENABLE GPIO2_REG32(0x020)
278#define GPIO2_RISINGDETECT GPIO2_REG32(0x048)
279#define GPIO2_DATAIN GPIO2_REG32(0x038)
280#define GPIO2_OE GPIO2_REG32(0x034)
281#define GPIO2_DATAOUT GPIO2_REG32(0x03C)
282
283/* GPIO 3 */
284#define GPIO3_BASE GPIOX_BASE(3)
285#define GPIO3_REG32(offset) __REG32(GPIO3_BASE + (offset))
286#define GPIO3_IRQENABLE1 GPIO3_REG32(0x01C)
287#define GPIO3_IRQSTATUS1 GPIO3_REG32(0x018)
288#define GPIO3_IRQENABLE2 GPIO3_REG32(0x02C)
289#define GPIO3_IRQSTATUS2 GPIO3_REG32(0x028)
290#define GPIO3_WAKEUPENABLE GPIO3_REG32(0x020)
291#define GPIO3_RISINGDETECT GPIO3_REG32(0x048)
292#define GPIO3_FALLINGDETECT GPIO3_REG32(0x04C)
293#define GPIO3_DATAIN GPIO3_REG32(0x038)
294#define GPIO3_OE GPIO3_REG32(0x034)
295#define GPIO3_DATAOUT GPIO3_REG32(0x03C)
296#define GPIO3_DEBOUNCENABLE GPIO3_REG32(0x050)
297#define GPIO3_DEBOUNCINGTIME GPIO3_REG32(0x054)
298
299/* GPIO 4 */
300#define GPIO4_BASE GPIOX_BASE(4)
301#define GPIO4_REG32(offset) __REG32(GPIO4_BASE + (offset))
302#define GPIO4_IRQENABLE1 GPIO4_REG32(0x01C)
303#define GPIO4_IRQSTATUS1 GPIO4_REG32(0x018)
304#define GPIO4_IRQENABLE2 GPIO4_REG32(0x02C)
305#define GPIO4_IRQSTATUS2 GPIO4_REG32(0x028)
306#define GPIO4_WAKEUPENABLE GPIO4_REG32(0x020)
307#define GPIO4_RISINGDETECT GPIO4_REG32(0x048)
308#define GPIO4_FALLINGDETECT GPIO4_REG32(0x04C)
309#define GPIO4_DATAIN GPIO4_REG32(0x038)
310#define GPIO4_OE GPIO4_REG32(0x034)
311#define GPIO4_DATAOUT GPIO4_REG32(0x03C)
312#define GPIO4_DEBOUNCENABLE GPIO4_REG32(0x050)
313#define GPIO4_DEBOUNCINGTIME GPIO4_REG32(0x054)
314
315
316/* IO CONFIG */
317#define CONTROL_BASE (OMAP24XX_CTRL_BASE)
318#define CONTROL_REG32(offset) __REG32(CONTROL_BASE + (offset))
319
320#define CONTROL_PADCONF_SPI1_NCS2 CONTROL_REG32(0x104)
321#define CONTROL_PADCONF_SYS_XTALOUT CONTROL_REG32(0x134)
322#define CONTROL_PADCONF_UART1_RX CONTROL_REG32(0x0C8)
323#define CONTROL_PADCONF_MCBSP1_DX CONTROL_REG32(0x10C)
324#define CONTROL_PADCONF_GPMC_NCS4 CONTROL_REG32(0x090)
325#define CONTROL_PADCONF_DSS_D5 CONTROL_REG32(0x0B8)
326#define CONTROL_PADCONF_DSS_D9 CONTROL_REG32(0x0BC)
327#define CONTROL_PADCONF_DSS_D13 CONTROL_REG32(0x0C0)
328#define CONTROL_PADCONF_DSS_VSYNC CONTROL_REG32(0x0CC)
329
330/* CONTROL */
331#define CONTROL_DEVCONF CONTROL_REG32(0x274)
332
333/* INTERRUPT CONTROLLER */
334#define INTC_BASE (OMAP24XX_L4_IO_BASE+0xfe000)
335#define INTC_REG32(offset) __REG32(INTC_BASE + (offset))
336
337#define INTC1_U_BASE INTC_REG32(0x000)
338#define INTC_MIR0 INTC_REG32(0x084)
339#define INTC_MIR_SET0 INTC_REG32(0x08C)
340#define INTC_MIR_CLEAR0 INTC_REG32(0x088)
341#define INTC_ISR_CLEAR0 INTC_REG32(0x094)
342#define INTC_MIR1 INTC_REG32(0x0A4)
343#define INTC_MIR_SET1 INTC_REG32(0x0AC)
344#define INTC_MIR_CLEAR1 INTC_REG32(0x0A8)
345#define INTC_ISR_CLEAR1 INTC_REG32(0x0B4)
346#define INTC_MIR2 INTC_REG32(0x0C4)
347#define INTC_MIR_SET2 INTC_REG32(0x0CC)
348#define INTC_MIR_CLEAR2 INTC_REG32(0x0C8)
349#define INTC_ISR_CLEAR2 INTC_REG32(0x0D4)
350#define INTC_SIR_IRQ INTC_REG32(0x040)
351#define INTC_CONTROL INTC_REG32(0x048)
352#define INTC_ILR11 INTC_REG32(0x12C)
353#define INTC_ILR32 INTC_REG32(0x180)
354#define INTC_ILR37 INTC_REG32(0x194)
355#define INTC_SYSCONFIG INTC_REG32(0x010)
356
357/* RAM FIREWALL */
358#define RAMFW_BASE (0x68005000)
359#define RAMFW_REG32(offset) __REG32(RAMFW_BASE + (offset))
360
361#define RAMFW_REQINFOPERM0 RAMFW_REG32(0x048)
362#define RAMFW_READPERM0 RAMFW_REG32(0x050)
363#define RAMFW_WRITEPERM0 RAMFW_REG32(0x058)
364
365/* GPMC CS1 FPGA ON USER INTERFACE MODULE */
366//#define DEBUG_BOARD_LED_REGISTER 0x04000014
367
368/* GPMC CS0 */
369#define GPMC_CONFIG1_0 GPMC_REG32(0x060)
370#define GPMC_CONFIG2_0 GPMC_REG32(0x064)
371#define GPMC_CONFIG3_0 GPMC_REG32(0x068)
372#define GPMC_CONFIG4_0 GPMC_REG32(0x06C)
373#define GPMC_CONFIG5_0 GPMC_REG32(0x070)
374#define GPMC_CONFIG6_0 GPMC_REG32(0x074)
375#define GPMC_CONFIG7_0 GPMC_REG32(0x078)
376
377/* GPMC CS1 */
378#define GPMC_CONFIG1_1 GPMC_REG32(0x090)
379#define GPMC_CONFIG2_1 GPMC_REG32(0x094)
380#define GPMC_CONFIG3_1 GPMC_REG32(0x098)
381#define GPMC_CONFIG4_1 GPMC_REG32(0x09C)
382#define GPMC_CONFIG5_1 GPMC_REG32(0x0a0)
383#define GPMC_CONFIG6_1 GPMC_REG32(0x0a4)
384#define GPMC_CONFIG7_1 GPMC_REG32(0x0a8)
385
386/* DSS */
387#define DSS_CONTROL DISP_REG32(0x040)
388#define DISPC_CONTROL DISP_REG32(0x440)
389#define DISPC_SYSSTATUS DISP_REG32(0x414)
390#define DISPC_IRQSTATUS DISP_REG32(0x418)
391#define DISPC_IRQENABLE DISP_REG32(0x41C)
392#define DISPC_CONFIG DISP_REG32(0x444)
393#define DISPC_DEFAULT_COLOR0 DISP_REG32(0x44C)
394#define DISPC_DEFAULT_COLOR1 DISP_REG32(0x450)
395#define DISPC_TRANS_COLOR0 DISP_REG32(0x454)
396#define DISPC_TRANS_COLOR1 DISP_REG32(0x458)
397#define DISPC_LINE_NUMBER DISP_REG32(0x460)
398#define DISPC_TIMING_H DISP_REG32(0x464)
399#define DISPC_TIMING_V DISP_REG32(0x468)
400#define DISPC_POL_FREQ DISP_REG32(0x46C)
401#define DISPC_DIVISOR DISP_REG32(0x470)
402#define DISPC_SIZE_DIG DISP_REG32(0x478)
403#define DISPC_SIZE_LCD DISP_REG32(0x47C)
404#define DISPC_GFX_BA0 DISP_REG32(0x480)
405#define DISPC_GFX_BA1 DISP_REG32(0x484)
406#define DISPC_GFX_POSITION DISP_REG32(0x488)
407#define DISPC_GFX_SIZE DISP_REG32(0x48C)
408#define DISPC_GFX_ATTRIBUTES DISP_REG32(0x4A0)
409#define DISPC_GFX_FIFO_THRESHOLD DISP_REG32(0x4A4)
410#define DISPC_GFX_ROW_INC DISP_REG32(0x4AC)
411#define DISPC_GFX_PIXEL_INC DISP_REG32(0x4B0)
412#define DISPC_GFX_WINDOW_SKIP DISP_REG32(0x4B4)
413#define DISPC_GFX_TABLE_BA DISP_REG32(0x4B8)
414#define DISPC_DATA_CYCLE1 DISP_REG32(0x5D4)
415#define DISPC_DATA_CYCLE2 DISP_REG32(0x5D8)
416#define DISPC_DATA_CYCLE3 DISP_REG32(0x5DC)
417
418/* Wake up define for board */
419#define GPIO97 (1 << 1)
420#define GPIO88 (1 << 24)
421
422#endif /* __ASSEMBLER__ */
423
424#endif
425
426
427
428
429
diff --git a/include/asm-arm/arch-omap/sram.h b/include/asm-arm/arch-omap/sram.h
new file mode 100644
index 000000000000..e72ccbf0fe06
--- /dev/null
+++ b/include/asm-arm/arch-omap/sram.h
@@ -0,0 +1,38 @@
1/*
2 * linux/include/asm-arm/arch-omap/sram.h
3 *
4 * Interface for functions that need to be run in internal SRAM
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ARCH_ARM_OMAP_SRAM_H
12#define __ARCH_ARM_OMAP_SRAM_H
13
14extern void * omap_sram_push(void * start, unsigned long size);
15extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
16
17extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
18 u32 base_cs, u32 force_unlock);
19extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
20 u32 mem_type);
21extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
22
23
24/* Do not use these */
25extern void sram_reprogram_clock(u32 ckctl, u32 dpllctl);
26extern unsigned long sram_reprogram_clock_sz;
27
28extern void sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
29 u32 base_cs, u32 force_unlock);
30extern unsigned long sram_ddr_init_sz;
31
32extern u32 sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
33extern unsigned long sram_set_prcm_sz;
34
35extern void sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type);
36extern unsigned long sram_reprogram_sdrc_sz;
37
38#endif
diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h
index ff37bc27e603..9af415d2944a 100644
--- a/include/asm-arm/arch-omap/system.h
+++ b/include/asm-arm/arch-omap/system.h
@@ -6,18 +6,21 @@
6#define __ASM_ARCH_SYSTEM_H 6#define __ASM_ARCH_SYSTEM_H
7#include <linux/config.h> 7#include <linux/config.h>
8#include <asm/mach-types.h> 8#include <asm/mach-types.h>
9#include <asm/arch/hardware.h> 9#include <asm/hardware/clock.h>
10#include <asm/mach-types.h> 10#include <asm/hardware.h>
11#include <asm/arch/prcm.h>
12
13#ifndef CONFIG_MACH_VOICEBLUE
14#define voiceblue_reset() do {} while (0)
15#endif
11 16
12static inline void arch_idle(void) 17static inline void arch_idle(void)
13{ 18{
14 cpu_do_idle(); 19 cpu_do_idle();
15} 20}
16 21
17static inline void arch_reset(char mode) 22static inline void omap1_arch_reset(char mode)
18{ 23{
19
20#ifdef CONFIG_ARCH_OMAP16XX
21 /* 24 /*
22 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 25 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
23 * "Global Software Reset Affects Traffic Controller Frequency". 26 * "Global Software Reset Affects Traffic Controller Frequency".
@@ -27,13 +30,31 @@ static inline void arch_reset(char mode)
27 DPLL_CTL); 30 DPLL_CTL);
28 omap_writew(0x8, ARM_RSTCT1); 31 omap_writew(0x8, ARM_RSTCT1);
29 } 32 }
30#endif 33
31#ifdef CONFIG_MACH_VOICEBLUE
32 if (machine_is_voiceblue()) 34 if (machine_is_voiceblue())
33 voiceblue_reset(); 35 voiceblue_reset();
34 else 36 else
35#endif
36 omap_writew(1, ARM_RSTCT1); 37 omap_writew(1, ARM_RSTCT1);
37} 38}
38 39
40static inline void omap2_arch_reset(char mode)
41{
42 u32 rate;
43 struct clk *vclk, *sclk;
44
45 vclk = clk_get(NULL, "virt_prcm_set");
46 sclk = clk_get(NULL, "sys_ck");
47 rate = clk_get_rate(sclk);
48 clk_set_rate(vclk, rate); /* go to bypass for OMAP limitation */
49 RM_RSTCTRL_WKUP |= 2;
50}
51
52static inline void arch_reset(char mode)
53{
54 if (!cpu_is_omap24xx())
55 omap1_arch_reset(mode);
56 else
57 omap2_arch_reset(mode);
58}
59
39#endif 60#endif
diff --git a/include/asm-arm/arch-omap/timex.h b/include/asm-arm/arch-omap/timex.h
index b61ddb491e83..21f2e367185a 100644
--- a/include/asm-arm/arch-omap/timex.h
+++ b/include/asm-arm/arch-omap/timex.h
@@ -28,6 +28,14 @@
28#if !defined(__ASM_ARCH_OMAP_TIMEX_H) 28#if !defined(__ASM_ARCH_OMAP_TIMEX_H)
29#define __ASM_ARCH_OMAP_TIMEX_H 29#define __ASM_ARCH_OMAP_TIMEX_H
30 30
31/*
32 * OMAP 32KHz timer updates time one jiffie at a time from a secondary timer,
33 * and that's why the CLOCK_TICK_RATE is not 32768.
34 */
35#ifdef CONFIG_OMAP_32K_TIMER
36#define CLOCK_TICK_RATE (CONFIG_OMAP_32K_TIMER_HZ)
37#else
31#define CLOCK_TICK_RATE (HZ * 100000UL) 38#define CLOCK_TICK_RATE (HZ * 100000UL)
39#endif
32 40
33#endif /* __ASM_ARCH_OMAP_TIMEX_H */ 41#endif /* __ASM_ARCH_OMAP_TIMEX_H */
diff --git a/include/asm-arm/arch-omap/uncompress.h b/include/asm-arm/arch-omap/uncompress.h
index 3545c86859cc..c718264affbd 100644
--- a/include/asm-arm/arch-omap/uncompress.h
+++ b/include/asm-arm/arch-omap/uncompress.h
@@ -36,10 +36,14 @@ putstr(const char *s)
36 volatile u8 * uart = 0; 36 volatile u8 * uart = 0;
37 int shift = 2; 37 int shift = 2;
38 38
39#ifdef CONFIG_MACH_OMAP_PALMTE
40 return;
41#endif
42
39#ifdef CONFIG_ARCH_OMAP 43#ifdef CONFIG_ARCH_OMAP
40#ifdef CONFIG_OMAP_LL_DEBUG_UART3 44#ifdef CONFIG_OMAP_LL_DEBUG_UART3
41 uart = (volatile u8 *)(OMAP_UART3_BASE); 45 uart = (volatile u8 *)(OMAP_UART3_BASE);
42#elif CONFIG_OMAP_LL_DEBUG_UART2 46#elif defined(CONFIG_OMAP_LL_DEBUG_UART2)
43 uart = (volatile u8 *)(OMAP_UART2_BASE); 47 uart = (volatile u8 *)(OMAP_UART2_BASE);
44#else 48#else
45 uart = (volatile u8 *)(OMAP_UART1_BASE); 49 uart = (volatile u8 *)(OMAP_UART1_BASE);
diff --git a/include/asm-arm/arch-pxa/akita.h b/include/asm-arm/arch-pxa/akita.h
index 4a1fbcfccc39..5d8cc1d9cb10 100644
--- a/include/asm-arm/arch-pxa/akita.h
+++ b/include/asm-arm/arch-pxa/akita.h
@@ -25,6 +25,8 @@
25/* Default Values */ 25/* Default Values */
26#define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP) 26#define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP)
27 27
28extern struct platform_device akitaioexp_device;
29
28void akita_set_ioexp(struct device *dev, unsigned char bitmask); 30void akita_set_ioexp(struct device *dev, unsigned char bitmask);
29void akita_reset_ioexp(struct device *dev, unsigned char bitmask); 31void akita_reset_ioexp(struct device *dev, unsigned char bitmask);
30 32
diff --git a/include/asm-arm/arch-pxa/irq.h b/include/asm-arm/arch-pxa/irq.h
index d770e4b37ae1..48c60f5eff6a 100644
--- a/include/asm-arm/arch-pxa/irq.h
+++ b/include/asm-arm/arch-pxa/irq.h
@@ -12,8 +12,3 @@
12 12
13#define fixup_irq(x) (x) 13#define fixup_irq(x) (x)
14 14
15/*
16 * This prototype is required for cascading of multiplexed interrupts.
17 * Since it doesn't exist elsewhere, we'll put it here for now.
18 */
19extern void do_IRQ(int irq, struct pt_regs *regs);
diff --git a/include/asm-arm/arch-pxa/sharpsl.h b/include/asm-arm/arch-pxa/sharpsl.h
index 311f2bb5386a..0b43495d24b4 100644
--- a/include/asm-arm/arch-pxa/sharpsl.h
+++ b/include/asm-arm/arch-pxa/sharpsl.h
@@ -21,12 +21,18 @@ struct corgits_machinfo {
21 void (*wait_hsync)(void); 21 void (*wait_hsync)(void);
22}; 22};
23 23
24
24/* 25/*
25 * SharpSL Backlight 26 * SharpSL Backlight
26 */ 27 */
27
28struct corgibl_machinfo { 28struct corgibl_machinfo {
29 int max_intensity; 29 int max_intensity;
30 void (*set_bl_intensity)(int intensity); 30 void (*set_bl_intensity)(int intensity);
31}; 31};
32extern void corgibl_limit_intensity(int limit);
33
32 34
35/*
36 * SharpSL Battery/PM Driver
37 */
38extern void sharpsl_battery_kick(void);
diff --git a/include/asm-arm/arch-pxa/ssp.h b/include/asm-arm/arch-pxa/ssp.h
index 6ec67b018c09..949878c0d908 100644
--- a/include/asm-arm/arch-pxa/ssp.h
+++ b/include/asm-arm/arch-pxa/ssp.h
@@ -18,6 +18,11 @@
18#ifndef SSP_H 18#ifndef SSP_H
19#define SSP_H 19#define SSP_H
20 20
21/*
22 * SSP initialisation flags
23 */
24#define SSP_NO_IRQ 0x1 /* don't register an irq handler in SSP driver */
25
21struct ssp_state { 26struct ssp_state {
22 u32 cr0; 27 u32 cr0;
23 u32 cr1; 28 u32 cr1;
@@ -31,6 +36,7 @@ struct ssp_dev {
31 u32 flags; 36 u32 flags;
32 u32 psp_flags; 37 u32 psp_flags;
33 u32 speed; 38 u32 speed;
39 int irq;
34}; 40};
35 41
36int ssp_write_word(struct ssp_dev *dev, u32 data); 42int ssp_write_word(struct ssp_dev *dev, u32 data);
@@ -40,7 +46,7 @@ void ssp_enable(struct ssp_dev *dev);
40void ssp_disable(struct ssp_dev *dev); 46void ssp_disable(struct ssp_dev *dev);
41void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp); 47void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp);
42void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp); 48void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
43int ssp_init(struct ssp_dev *dev, u32 port); 49int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
44int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); 50int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
45void ssp_exit(struct ssp_dev *dev); 51void ssp_exit(struct ssp_dev *dev);
46 52
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
index 67879cdb6ef2..9ca76dc3a7af 100644
--- a/include/asm-arm/arch-realview/hardware.h
+++ b/include/asm-arm/arch-realview/hardware.h
@@ -27,5 +27,6 @@
27 27
28/* macro to get at IO space when running virtually */ 28/* macro to get at IO space when running virtually */
29#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 29#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
30#define __io_address(n) __io(IO_ADDRESS(n))
30 31
31#endif 32#endif
diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h
index 9f8fcbca0869..6f3d0ce0ca1e 100644
--- a/include/asm-arm/arch-realview/system.h
+++ b/include/asm-arm/arch-realview/system.h
@@ -36,7 +36,7 @@ static inline void arch_idle(void)
36 36
37static inline void arch_reset(char mode) 37static inline void arch_reset(char mode)
38{ 38{
39 unsigned int hdr_ctrl = (IO_ADDRESS(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET); 39 void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
40 unsigned int val; 40 unsigned int val;
41 41
42 /* 42 /*
diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h
index ca3277d1d5ea..729c2ae4b513 100644
--- a/include/asm-arm/arch-rpc/system.h
+++ b/include/asm-arm/arch-rpc/system.h
@@ -7,7 +7,7 @@
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <asm/arch/hardware.h> 10#include <asm/hardware.h>
11#include <asm/hardware/iomd.h> 11#include <asm/hardware/iomd.h>
12#include <asm/io.h> 12#include <asm/io.h>
13 13
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index cb33d57c146c..7f1be48ad67e 100644
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -21,6 +21,7 @@
21 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA 21 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
22 * 28-Mar-2005 LCVR Fixed definition of GPB10 22 * 28-Mar-2005 LCVR Fixed definition of GPB10
23 * 26-Oct-2005 BJD Added generic configuration types 23 * 26-Oct-2005 BJD Added generic configuration types
24 * 27-Nov-2005 LCVR Added definitions to S3C2400 registers
24*/ 25*/
25 26
26 27
@@ -54,12 +55,16 @@
54 55
55#define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO) 56#define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO)
56 57
57/* port A - 22bits, zero in bit X makes pin X output 58/* port A - S3C2410: 22bits, zero in bit X makes pin X output
59 * S3C2400: 18bits, zero in bit X makes pin X output
58 * 1 makes port special function, this is default 60 * 1 makes port special function, this is default
59*/ 61*/
60#define S3C2410_GPACON S3C2410_GPIOREG(0x00) 62#define S3C2410_GPACON S3C2410_GPIOREG(0x00)
61#define S3C2410_GPADAT S3C2410_GPIOREG(0x04) 63#define S3C2410_GPADAT S3C2410_GPIOREG(0x04)
62 64
65#define S3C2400_GPACON S3C2410_GPIOREG(0x00)
66#define S3C2400_GPADAT S3C2410_GPIOREG(0x04)
67
63#define S3C2410_GPA0 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 0) 68#define S3C2410_GPA0 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 0)
64#define S3C2410_GPA0_OUT (0<<0) 69#define S3C2410_GPA0_OUT (0<<0)
65#define S3C2410_GPA0_ADDR0 (1<<0) 70#define S3C2410_GPA0_ADDR0 (1<<0)
@@ -103,34 +108,42 @@
103#define S3C2410_GPA10 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 10) 108#define S3C2410_GPA10 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 10)
104#define S3C2410_GPA10_OUT (0<<10) 109#define S3C2410_GPA10_OUT (0<<10)
105#define S3C2410_GPA10_ADDR25 (1<<10) 110#define S3C2410_GPA10_ADDR25 (1<<10)
111#define S3C2400_GPA10_SCKE (1<<10)
106 112
107#define S3C2410_GPA11 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 11) 113#define S3C2410_GPA11 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 11)
108#define S3C2410_GPA11_OUT (0<<11) 114#define S3C2410_GPA11_OUT (0<<11)
109#define S3C2410_GPA11_ADDR26 (1<<11) 115#define S3C2410_GPA11_ADDR26 (1<<11)
116#define S3C2400_GPA11_nCAS0 (1<<11)
110 117
111#define S3C2410_GPA12 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 12) 118#define S3C2410_GPA12 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 12)
112#define S3C2410_GPA12_OUT (0<<12) 119#define S3C2410_GPA12_OUT (0<<12)
113#define S3C2410_GPA12_nGCS1 (1<<12) 120#define S3C2410_GPA12_nGCS1 (1<<12)
121#define S3C2400_GPA12_nCAS1 (1<<12)
114 122
115#define S3C2410_GPA13 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 13) 123#define S3C2410_GPA13 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 13)
116#define S3C2410_GPA13_OUT (0<<13) 124#define S3C2410_GPA13_OUT (0<<13)
117#define S3C2410_GPA13_nGCS2 (1<<13) 125#define S3C2410_GPA13_nGCS2 (1<<13)
126#define S3C2400_GPA13_nGCS1 (1<<13)
118 127
119#define S3C2410_GPA14 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 14) 128#define S3C2410_GPA14 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 14)
120#define S3C2410_GPA14_OUT (0<<14) 129#define S3C2410_GPA14_OUT (0<<14)
121#define S3C2410_GPA14_nGCS3 (1<<14) 130#define S3C2410_GPA14_nGCS3 (1<<14)
131#define S3C2400_GPA14_nGCS2 (1<<14)
122 132
123#define S3C2410_GPA15 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 15) 133#define S3C2410_GPA15 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 15)
124#define S3C2410_GPA15_OUT (0<<15) 134#define S3C2410_GPA15_OUT (0<<15)
125#define S3C2410_GPA15_nGCS4 (1<<15) 135#define S3C2410_GPA15_nGCS4 (1<<15)
136#define S3C2400_GPA15_nGCS3 (1<<15)
126 137
127#define S3C2410_GPA16 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 16) 138#define S3C2410_GPA16 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 16)
128#define S3C2410_GPA16_OUT (0<<16) 139#define S3C2410_GPA16_OUT (0<<16)
129#define S3C2410_GPA16_nGCS5 (1<<16) 140#define S3C2410_GPA16_nGCS5 (1<<16)
141#define S3C2400_GPA16_nGCS4 (1<<16)
130 142
131#define S3C2410_GPA17 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 17) 143#define S3C2410_GPA17 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 17)
132#define S3C2410_GPA17_OUT (0<<17) 144#define S3C2410_GPA17_OUT (0<<17)
133#define S3C2410_GPA17_CLE (1<<17) 145#define S3C2410_GPA17_CLE (1<<17)
146#define S3C2400_GPA17_nGCS5 (1<<17)
134 147
135#define S3C2410_GPA18 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 18) 148#define S3C2410_GPA18 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 18)
136#define S3C2410_GPA18_OUT (0<<18) 149#define S3C2410_GPA18_OUT (0<<18)
@@ -152,10 +165,16 @@
152#define S3C2410_GPA22_OUT (0<<22) 165#define S3C2410_GPA22_OUT (0<<22)
153#define S3C2410_GPA22_nFCE (1<<22) 166#define S3C2410_GPA22_nFCE (1<<22)
154 167
155/* 0x08 and 0x0c are reserved */ 168/* 0x08 and 0x0c are reserved on S3C2410 */
156 169
157/* GPB is 10 IO pins, each configured by 2 bits each in GPBCON. 170/* S3C2410:
171 * GPB is 10 IO pins, each configured by 2 bits each in GPBCON.
158 * 00 = input, 01 = output, 10=special function, 11=reserved 172 * 00 = input, 01 = output, 10=special function, 11=reserved
173
174 * S3C2400:
175 * GPB is 16 IO pins, each configured by 2 bits each in GPBCON.
176 * 00 = input, 01 = output, 10=data, 11=special function
177
159 * bit 0,1 = pin 0, 2,3= pin 1... 178 * bit 0,1 = pin 0, 2,3= pin 1...
160 * 179 *
161 * CPBUP = pull up resistor control, 1=disabled, 0=enabled 180 * CPBUP = pull up resistor control, 1=disabled, 0=enabled
@@ -165,63 +184,113 @@
165#define S3C2410_GPBDAT S3C2410_GPIOREG(0x14) 184#define S3C2410_GPBDAT S3C2410_GPIOREG(0x14)
166#define S3C2410_GPBUP S3C2410_GPIOREG(0x18) 185#define S3C2410_GPBUP S3C2410_GPIOREG(0x18)
167 186
187#define S3C2400_GPBCON S3C2410_GPIOREG(0x08)
188#define S3C2400_GPBDAT S3C2410_GPIOREG(0x0C)
189#define S3C2400_GPBUP S3C2410_GPIOREG(0x10)
190
168/* no i/o pin in port b can have value 3! */ 191/* no i/o pin in port b can have value 3! */
169 192
170#define S3C2410_GPB0 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 0) 193#define S3C2410_GPB0 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 0)
171#define S3C2410_GPB0_INP (0x00 << 0) 194#define S3C2410_GPB0_INP (0x00 << 0)
172#define S3C2410_GPB0_OUTP (0x01 << 0) 195#define S3C2410_GPB0_OUTP (0x01 << 0)
173#define S3C2410_GPB0_TOUT0 (0x02 << 0) 196#define S3C2410_GPB0_TOUT0 (0x02 << 0)
197#define S3C2400_GPB0_DATA16 (0x02 << 0)
174 198
175#define S3C2410_GPB1 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 1) 199#define S3C2410_GPB1 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 1)
176#define S3C2410_GPB1_INP (0x00 << 2) 200#define S3C2410_GPB1_INP (0x00 << 2)
177#define S3C2410_GPB1_OUTP (0x01 << 2) 201#define S3C2410_GPB1_OUTP (0x01 << 2)
178#define S3C2410_GPB1_TOUT1 (0x02 << 2) 202#define S3C2410_GPB1_TOUT1 (0x02 << 2)
203#define S3C2400_GPB1_DATA17 (0x02 << 2)
179 204
180#define S3C2410_GPB2 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 2) 205#define S3C2410_GPB2 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 2)
181#define S3C2410_GPB2_INP (0x00 << 4) 206#define S3C2410_GPB2_INP (0x00 << 4)
182#define S3C2410_GPB2_OUTP (0x01 << 4) 207#define S3C2410_GPB2_OUTP (0x01 << 4)
183#define S3C2410_GPB2_TOUT2 (0x02 << 4) 208#define S3C2410_GPB2_TOUT2 (0x02 << 4)
209#define S3C2400_GPB2_DATA18 (0x02 << 4)
210#define S3C2400_GPB2_TCLK1 (0x03 << 4)
184 211
185#define S3C2410_GPB3 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 3) 212#define S3C2410_GPB3 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 3)
186#define S3C2410_GPB3_INP (0x00 << 6) 213#define S3C2410_GPB3_INP (0x00 << 6)
187#define S3C2410_GPB3_OUTP (0x01 << 6) 214#define S3C2410_GPB3_OUTP (0x01 << 6)
188#define S3C2410_GPB3_TOUT3 (0x02 << 6) 215#define S3C2410_GPB3_TOUT3 (0x02 << 6)
216#define S3C2400_GPB3_DATA19 (0x02 << 6)
217#define S3C2400_GPB3_TXD1 (0x03 << 6)
189 218
190#define S3C2410_GPB4 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 4) 219#define S3C2410_GPB4 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 4)
191#define S3C2410_GPB4_INP (0x00 << 8) 220#define S3C2410_GPB4_INP (0x00 << 8)
192#define S3C2410_GPB4_OUTP (0x01 << 8) 221#define S3C2410_GPB4_OUTP (0x01 << 8)
193#define S3C2410_GPB4_TCLK0 (0x02 << 8) 222#define S3C2410_GPB4_TCLK0 (0x02 << 8)
223#define S3C2400_GPB4_DATA20 (0x02 << 8)
194#define S3C2410_GPB4_MASK (0x03 << 8) 224#define S3C2410_GPB4_MASK (0x03 << 8)
225#define S3C2400_GPB4_RXD1 (0x03 << 8)
226#define S3C2400_GPB4_MASK (0x03 << 8)
195 227
196#define S3C2410_GPB5 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 5) 228#define S3C2410_GPB5 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 5)
197#define S3C2410_GPB5_INP (0x00 << 10) 229#define S3C2410_GPB5_INP (0x00 << 10)
198#define S3C2410_GPB5_OUTP (0x01 << 10) 230#define S3C2410_GPB5_OUTP (0x01 << 10)
199#define S3C2410_GPB5_nXBACK (0x02 << 10) 231#define S3C2410_GPB5_nXBACK (0x02 << 10)
232#define S3C2400_GPB5_DATA21 (0x02 << 10)
233#define S3C2400_GPB5_nCTS1 (0x03 << 10)
200 234
201#define S3C2410_GPB6 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 6) 235#define S3C2410_GPB6 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 6)
202#define S3C2410_GPB6_INP (0x00 << 12) 236#define S3C2410_GPB6_INP (0x00 << 12)
203#define S3C2410_GPB6_OUTP (0x01 << 12) 237#define S3C2410_GPB6_OUTP (0x01 << 12)
204#define S3C2410_GPB6_nXBREQ (0x02 << 12) 238#define S3C2410_GPB6_nXBREQ (0x02 << 12)
239#define S3C2400_GPB6_DATA22 (0x02 << 12)
240#define S3C2400_GPB6_nRTS1 (0x03 << 12)
205 241
206#define S3C2410_GPB7 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 7) 242#define S3C2410_GPB7 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 7)
207#define S3C2410_GPB7_INP (0x00 << 14) 243#define S3C2410_GPB7_INP (0x00 << 14)
208#define S3C2410_GPB7_OUTP (0x01 << 14) 244#define S3C2410_GPB7_OUTP (0x01 << 14)
209#define S3C2410_GPB7_nXDACK1 (0x02 << 14) 245#define S3C2410_GPB7_nXDACK1 (0x02 << 14)
246#define S3C2400_GPB7_DATA23 (0x02 << 14)
210 247
211#define S3C2410_GPB8 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 8) 248#define S3C2410_GPB8 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 8)
212#define S3C2410_GPB8_INP (0x00 << 16) 249#define S3C2410_GPB8_INP (0x00 << 16)
213#define S3C2410_GPB8_OUTP (0x01 << 16) 250#define S3C2410_GPB8_OUTP (0x01 << 16)
214#define S3C2410_GPB8_nXDREQ1 (0x02 << 16) 251#define S3C2410_GPB8_nXDREQ1 (0x02 << 16)
252#define S3C2400_GPB8_DATA24 (0x02 << 16)
215 253
216#define S3C2410_GPB9 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 9) 254#define S3C2410_GPB9 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 9)
217#define S3C2410_GPB9_INP (0x00 << 18) 255#define S3C2410_GPB9_INP (0x00 << 18)
218#define S3C2410_GPB9_OUTP (0x01 << 18) 256#define S3C2410_GPB9_OUTP (0x01 << 18)
219#define S3C2410_GPB9_nXDACK0 (0x02 << 18) 257#define S3C2410_GPB9_nXDACK0 (0x02 << 18)
258#define S3C2400_GPB9_DATA25 (0x02 << 18)
259#define S3C2400_GPB9_I2SSDI (0x03 << 18)
220 260
221#define S3C2410_GPB10 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 10) 261#define S3C2410_GPB10 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 10)
222#define S3C2410_GPB10_INP (0x00 << 20) 262#define S3C2410_GPB10_INP (0x00 << 20)
223#define S3C2410_GPB10_OUTP (0x01 << 20) 263#define S3C2410_GPB10_OUTP (0x01 << 20)
224#define S3C2410_GPB10_nXDRE0 (0x02 << 20) 264#define S3C2410_GPB10_nXDRE0 (0x02 << 20)
265#define S3C2400_GPB10_DATA26 (0x02 << 20)
266#define S3C2400_GPB10_nSS (0x03 << 20)
267
268#define S3C2400_GPB11 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 11)
269#define S3C2400_GPB11_INP (0x00 << 22)
270#define S3C2400_GPB11_OUTP (0x01 << 22)
271#define S3C2400_GPB11_DATA27 (0x02 << 22)
272
273#define S3C2400_GPB12 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 12)
274#define S3C2400_GPB12_INP (0x00 << 24)
275#define S3C2400_GPB12_OUTP (0x01 << 24)
276#define S3C2400_GPB12_DATA28 (0x02 << 24)
277
278#define S3C2400_GPB13 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 13)
279#define S3C2400_GPB13_INP (0x00 << 26)
280#define S3C2400_GPB13_OUTP (0x01 << 26)
281#define S3C2400_GPB13_DATA29 (0x02 << 26)
282
283#define S3C2400_GPB14 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 14)
284#define S3C2400_GPB14_INP (0x00 << 28)
285#define S3C2400_GPB14_OUTP (0x01 << 28)
286#define S3C2400_GPB14_DATA30 (0x02 << 28)
287
288#define S3C2400_GPB15 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 15)
289#define S3C2400_GPB15_INP (0x00 << 30)
290#define S3C2400_GPB15_OUTP (0x01 << 30)
291#define S3C2400_GPB15_DATA31 (0x02 << 30)
292
293#define S3C2410_GPB_PUPDIS(x) (1<<(x))
225 294
226/* Port C consits of 16 GPIO/Special function 295/* Port C consits of 16 GPIO/Special function
227 * 296 *
@@ -233,150 +302,193 @@
233#define S3C2410_GPCDAT S3C2410_GPIOREG(0x24) 302#define S3C2410_GPCDAT S3C2410_GPIOREG(0x24)
234#define S3C2410_GPCUP S3C2410_GPIOREG(0x28) 303#define S3C2410_GPCUP S3C2410_GPIOREG(0x28)
235 304
305#define S3C2400_GPCCON S3C2410_GPIOREG(0x14)
306#define S3C2400_GPCDAT S3C2410_GPIOREG(0x18)
307#define S3C2400_GPCUP S3C2410_GPIOREG(0x1C)
308
236#define S3C2410_GPC0 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 0) 309#define S3C2410_GPC0 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 0)
237#define S3C2410_GPC0_INP (0x00 << 0) 310#define S3C2410_GPC0_INP (0x00 << 0)
238#define S3C2410_GPC0_OUTP (0x01 << 0) 311#define S3C2410_GPC0_OUTP (0x01 << 0)
239#define S3C2410_GPC0_LEND (0x02 << 0) 312#define S3C2410_GPC0_LEND (0x02 << 0)
313#define S3C2400_GPC0_VD0 (0x02 << 0)
240 314
241#define S3C2410_GPC1 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 1) 315#define S3C2410_GPC1 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 1)
242#define S3C2410_GPC1_INP (0x00 << 2) 316#define S3C2410_GPC1_INP (0x00 << 2)
243#define S3C2410_GPC1_OUTP (0x01 << 2) 317#define S3C2410_GPC1_OUTP (0x01 << 2)
244#define S3C2410_GPC1_VCLK (0x02 << 2) 318#define S3C2410_GPC1_VCLK (0x02 << 2)
319#define S3C2400_GPC1_VD1 (0x02 << 2)
245 320
246#define S3C2410_GPC2 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 2) 321#define S3C2410_GPC2 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 2)
247#define S3C2410_GPC2_INP (0x00 << 4) 322#define S3C2410_GPC2_INP (0x00 << 4)
248#define S3C2410_GPC2_OUTP (0x01 << 4) 323#define S3C2410_GPC2_OUTP (0x01 << 4)
249#define S3C2410_GPC2_VLINE (0x02 << 4) 324#define S3C2410_GPC2_VLINE (0x02 << 4)
325#define S3C2400_GPC2_VD2 (0x02 << 4)
250 326
251#define S3C2410_GPC3 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 3) 327#define S3C2410_GPC3 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 3)
252#define S3C2410_GPC3_INP (0x00 << 6) 328#define S3C2410_GPC3_INP (0x00 << 6)
253#define S3C2410_GPC3_OUTP (0x01 << 6) 329#define S3C2410_GPC3_OUTP (0x01 << 6)
254#define S3C2410_GPC3_VFRAME (0x02 << 6) 330#define S3C2410_GPC3_VFRAME (0x02 << 6)
331#define S3C2400_GPC3_VD3 (0x02 << 6)
255 332
256#define S3C2410_GPC4 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 4) 333#define S3C2410_GPC4 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 4)
257#define S3C2410_GPC4_INP (0x00 << 8) 334#define S3C2410_GPC4_INP (0x00 << 8)
258#define S3C2410_GPC4_OUTP (0x01 << 8) 335#define S3C2410_GPC4_OUTP (0x01 << 8)
259#define S3C2410_GPC4_VM (0x02 << 8) 336#define S3C2410_GPC4_VM (0x02 << 8)
337#define S3C2400_GPC4_VD4 (0x02 << 8)
260 338
261#define S3C2410_GPC5 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 5) 339#define S3C2410_GPC5 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 5)
262#define S3C2410_GPC5_INP (0x00 << 10) 340#define S3C2410_GPC5_INP (0x00 << 10)
263#define S3C2410_GPC5_OUTP (0x01 << 10) 341#define S3C2410_GPC5_OUTP (0x01 << 10)
264#define S3C2410_GPC5_LCDVF0 (0x02 << 10) 342#define S3C2410_GPC5_LCDVF0 (0x02 << 10)
343#define S3C2400_GPC5_VD5 (0x02 << 10)
265 344
266#define S3C2410_GPC6 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 6) 345#define S3C2410_GPC6 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 6)
267#define S3C2410_GPC6_INP (0x00 << 12) 346#define S3C2410_GPC6_INP (0x00 << 12)
268#define S3C2410_GPC6_OUTP (0x01 << 12) 347#define S3C2410_GPC6_OUTP (0x01 << 12)
269#define S3C2410_GPC6_LCDVF1 (0x02 << 12) 348#define S3C2410_GPC6_LCDVF1 (0x02 << 12)
349#define S3C2400_GPC6_VD6 (0x02 << 12)
270 350
271#define S3C2410_GPC7 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 7) 351#define S3C2410_GPC7 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 7)
272#define S3C2410_GPC7_INP (0x00 << 14) 352#define S3C2410_GPC7_INP (0x00 << 14)
273#define S3C2410_GPC7_OUTP (0x01 << 14) 353#define S3C2410_GPC7_OUTP (0x01 << 14)
274#define S3C2410_GPC7_LCDVF2 (0x02 << 14) 354#define S3C2410_GPC7_LCDVF2 (0x02 << 14)
355#define S3C2400_GPC7_VD7 (0x02 << 14)
275 356
276#define S3C2410_GPC8 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 8) 357#define S3C2410_GPC8 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 8)
277#define S3C2410_GPC8_INP (0x00 << 16) 358#define S3C2410_GPC8_INP (0x00 << 16)
278#define S3C2410_GPC8_OUTP (0x01 << 16) 359#define S3C2410_GPC8_OUTP (0x01 << 16)
279#define S3C2410_GPC8_VD0 (0x02 << 16) 360#define S3C2410_GPC8_VD0 (0x02 << 16)
361#define S3C2400_GPC8_VD8 (0x02 << 16)
280 362
281#define S3C2410_GPC9 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 9) 363#define S3C2410_GPC9 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 9)
282#define S3C2410_GPC9_INP (0x00 << 18) 364#define S3C2410_GPC9_INP (0x00 << 18)
283#define S3C2410_GPC9_OUTP (0x01 << 18) 365#define S3C2410_GPC9_OUTP (0x01 << 18)
284#define S3C2410_GPC9_VD1 (0x02 << 18) 366#define S3C2410_GPC9_VD1 (0x02 << 18)
367#define S3C2400_GPC9_VD9 (0x02 << 18)
285 368
286#define S3C2410_GPC10 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 10) 369#define S3C2410_GPC10 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 10)
287#define S3C2410_GPC10_INP (0x00 << 20) 370#define S3C2410_GPC10_INP (0x00 << 20)
288#define S3C2410_GPC10_OUTP (0x01 << 20) 371#define S3C2410_GPC10_OUTP (0x01 << 20)
289#define S3C2410_GPC10_VD2 (0x02 << 20) 372#define S3C2410_GPC10_VD2 (0x02 << 20)
373#define S3C2400_GPC10_VD10 (0x02 << 20)
290 374
291#define S3C2410_GPC11 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 11) 375#define S3C2410_GPC11 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 11)
292#define S3C2410_GPC11_INP (0x00 << 22) 376#define S3C2410_GPC11_INP (0x00 << 22)
293#define S3C2410_GPC11_OUTP (0x01 << 22) 377#define S3C2410_GPC11_OUTP (0x01 << 22)
294#define S3C2410_GPC11_VD3 (0x02 << 22) 378#define S3C2410_GPC11_VD3 (0x02 << 22)
379#define S3C2400_GPC11_VD11 (0x02 << 22)
295 380
296#define S3C2410_GPC12 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 12) 381#define S3C2410_GPC12 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 12)
297#define S3C2410_GPC12_INP (0x00 << 24) 382#define S3C2410_GPC12_INP (0x00 << 24)
298#define S3C2410_GPC12_OUTP (0x01 << 24) 383#define S3C2410_GPC12_OUTP (0x01 << 24)
299#define S3C2410_GPC12_VD4 (0x02 << 24) 384#define S3C2410_GPC12_VD4 (0x02 << 24)
385#define S3C2400_GPC12_VD12 (0x02 << 24)
300 386
301#define S3C2410_GPC13 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 13) 387#define S3C2410_GPC13 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 13)
302#define S3C2410_GPC13_INP (0x00 << 26) 388#define S3C2410_GPC13_INP (0x00 << 26)
303#define S3C2410_GPC13_OUTP (0x01 << 26) 389#define S3C2410_GPC13_OUTP (0x01 << 26)
304#define S3C2410_GPC13_VD5 (0x02 << 26) 390#define S3C2410_GPC13_VD5 (0x02 << 26)
391#define S3C2400_GPC13_VD13 (0x02 << 26)
305 392
306#define S3C2410_GPC14 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 14) 393#define S3C2410_GPC14 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 14)
307#define S3C2410_GPC14_INP (0x00 << 28) 394#define S3C2410_GPC14_INP (0x00 << 28)
308#define S3C2410_GPC14_OUTP (0x01 << 28) 395#define S3C2410_GPC14_OUTP (0x01 << 28)
309#define S3C2410_GPC14_VD6 (0x02 << 28) 396#define S3C2410_GPC14_VD6 (0x02 << 28)
397#define S3C2400_GPC14_VD14 (0x02 << 28)
310 398
311#define S3C2410_GPC15 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 15) 399#define S3C2410_GPC15 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 15)
312#define S3C2410_GPC15_INP (0x00 << 30) 400#define S3C2410_GPC15_INP (0x00 << 30)
313#define S3C2410_GPC15_OUTP (0x01 << 30) 401#define S3C2410_GPC15_OUTP (0x01 << 30)
314#define S3C2410_GPC15_VD7 (0x02 << 30) 402#define S3C2410_GPC15_VD7 (0x02 << 30)
403#define S3C2400_GPC15_VD15 (0x02 << 30)
404
405#define S3C2410_GPC_PUPDIS(x) (1<<(x))
315 406
316/* Port D consists of 16 GPIO/Special function 407/*
408 * S3C2410: Port D consists of 16 GPIO/Special function
317 * 409 *
318 * almost identical setup to port b, but the special functions are mostly 410 * almost identical setup to port b, but the special functions are mostly
319 * to do with the video system's data. 411 * to do with the video system's data.
412 *
413 * S3C2400: Port D consists of 11 GPIO/Special function
414 *
415 * almost identical setup to port c
320*/ 416*/
321 417
322#define S3C2410_GPDCON S3C2410_GPIOREG(0x30) 418#define S3C2410_GPDCON S3C2410_GPIOREG(0x30)
323#define S3C2410_GPDDAT S3C2410_GPIOREG(0x34) 419#define S3C2410_GPDDAT S3C2410_GPIOREG(0x34)
324#define S3C2410_GPDUP S3C2410_GPIOREG(0x38) 420#define S3C2410_GPDUP S3C2410_GPIOREG(0x38)
325 421
422#define S3C2400_GPDCON S3C2410_GPIOREG(0x20)
423#define S3C2400_GPDDAT S3C2410_GPIOREG(0x24)
424#define S3C2400_GPDUP S3C2410_GPIOREG(0x28)
425
326#define S3C2410_GPD0 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 0) 426#define S3C2410_GPD0 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 0)
327#define S3C2410_GPD0_INP (0x00 << 0) 427#define S3C2410_GPD0_INP (0x00 << 0)
328#define S3C2410_GPD0_OUTP (0x01 << 0) 428#define S3C2410_GPD0_OUTP (0x01 << 0)
329#define S3C2410_GPD0_VD8 (0x02 << 0) 429#define S3C2410_GPD0_VD8 (0x02 << 0)
430#define S3C2400_GPD0_VFRAME (0x02 << 0)
330 431
331#define S3C2410_GPD1 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 1) 432#define S3C2410_GPD1 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 1)
332#define S3C2410_GPD1_INP (0x00 << 2) 433#define S3C2410_GPD1_INP (0x00 << 2)
333#define S3C2410_GPD1_OUTP (0x01 << 2) 434#define S3C2410_GPD1_OUTP (0x01 << 2)
334#define S3C2410_GPD1_VD9 (0x02 << 2) 435#define S3C2410_GPD1_VD9 (0x02 << 2)
436#define S3C2400_GPD1_VM (0x02 << 2)
335 437
336#define S3C2410_GPD2 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 2) 438#define S3C2410_GPD2 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 2)
337#define S3C2410_GPD2_INP (0x00 << 4) 439#define S3C2410_GPD2_INP (0x00 << 4)
338#define S3C2410_GPD2_OUTP (0x01 << 4) 440#define S3C2410_GPD2_OUTP (0x01 << 4)
339#define S3C2410_GPD2_VD10 (0x02 << 4) 441#define S3C2410_GPD2_VD10 (0x02 << 4)
442#define S3C2400_GPD2_VLINE (0x02 << 4)
340 443
341#define S3C2410_GPD3 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 3) 444#define S3C2410_GPD3 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 3)
342#define S3C2410_GPD3_INP (0x00 << 6) 445#define S3C2410_GPD3_INP (0x00 << 6)
343#define S3C2410_GPD3_OUTP (0x01 << 6) 446#define S3C2410_GPD3_OUTP (0x01 << 6)
344#define S3C2410_GPD3_VD11 (0x02 << 6) 447#define S3C2410_GPD3_VD11 (0x02 << 6)
448#define S3C2400_GPD3_VCLK (0x02 << 6)
345 449
346#define S3C2410_GPD4 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 4) 450#define S3C2410_GPD4 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 4)
347#define S3C2410_GPD4_INP (0x00 << 8) 451#define S3C2410_GPD4_INP (0x00 << 8)
348#define S3C2410_GPD4_OUTP (0x01 << 8) 452#define S3C2410_GPD4_OUTP (0x01 << 8)
349#define S3C2410_GPD4_VD12 (0x02 << 8) 453#define S3C2410_GPD4_VD12 (0x02 << 8)
454#define S3C2400_GPD4_LEND (0x02 << 8)
350 455
351#define S3C2410_GPD5 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 5) 456#define S3C2410_GPD5 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 5)
352#define S3C2410_GPD5_INP (0x00 << 10) 457#define S3C2410_GPD5_INP (0x00 << 10)
353#define S3C2410_GPD5_OUTP (0x01 << 10) 458#define S3C2410_GPD5_OUTP (0x01 << 10)
354#define S3C2410_GPD5_VD13 (0x02 << 10) 459#define S3C2410_GPD5_VD13 (0x02 << 10)
460#define S3C2400_GPD5_TOUT0 (0x02 << 10)
355 461
356#define S3C2410_GPD6 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 6) 462#define S3C2410_GPD6 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 6)
357#define S3C2410_GPD6_INP (0x00 << 12) 463#define S3C2410_GPD6_INP (0x00 << 12)
358#define S3C2410_GPD6_OUTP (0x01 << 12) 464#define S3C2410_GPD6_OUTP (0x01 << 12)
359#define S3C2410_GPD6_VD14 (0x02 << 12) 465#define S3C2410_GPD6_VD14 (0x02 << 12)
466#define S3C2400_GPD6_TOUT1 (0x02 << 12)
360 467
361#define S3C2410_GPD7 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 7) 468#define S3C2410_GPD7 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 7)
362#define S3C2410_GPD7_INP (0x00 << 14) 469#define S3C2410_GPD7_INP (0x00 << 14)
363#define S3C2410_GPD7_OUTP (0x01 << 14) 470#define S3C2410_GPD7_OUTP (0x01 << 14)
364#define S3C2410_GPD7_VD15 (0x02 << 14) 471#define S3C2410_GPD7_VD15 (0x02 << 14)
472#define S3C2400_GPD7_TOUT2 (0x02 << 14)
365 473
366#define S3C2410_GPD8 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 8) 474#define S3C2410_GPD8 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 8)
367#define S3C2410_GPD8_INP (0x00 << 16) 475#define S3C2410_GPD8_INP (0x00 << 16)
368#define S3C2410_GPD8_OUTP (0x01 << 16) 476#define S3C2410_GPD8_OUTP (0x01 << 16)
369#define S3C2410_GPD8_VD16 (0x02 << 16) 477#define S3C2410_GPD8_VD16 (0x02 << 16)
478#define S3C2400_GPD8_TOUT3 (0x02 << 16)
370 479
371#define S3C2410_GPD9 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 9) 480#define S3C2410_GPD9 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 9)
372#define S3C2410_GPD9_INP (0x00 << 18) 481#define S3C2410_GPD9_INP (0x00 << 18)
373#define S3C2410_GPD9_OUTP (0x01 << 18) 482#define S3C2410_GPD9_OUTP (0x01 << 18)
374#define S3C2410_GPD9_VD17 (0x02 << 18) 483#define S3C2410_GPD9_VD17 (0x02 << 18)
484#define S3C2400_GPD9_TCLK0 (0x02 << 18)
485#define S3C2410_GPD9_MASK (0x03 << 18)
375 486
376#define S3C2410_GPD10 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 10) 487#define S3C2410_GPD10 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 10)
377#define S3C2410_GPD10_INP (0x00 << 20) 488#define S3C2410_GPD10_INP (0x00 << 20)
378#define S3C2410_GPD10_OUTP (0x01 << 20) 489#define S3C2410_GPD10_OUTP (0x01 << 20)
379#define S3C2410_GPD10_VD18 (0x02 << 20) 490#define S3C2410_GPD10_VD18 (0x02 << 20)
491#define S3C2400_GPD10_nWAIT (0x02 << 20)
380 492
381#define S3C2410_GPD11 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 11) 493#define S3C2410_GPD11 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 11)
382#define S3C2410_GPD11_INP (0x00 << 22) 494#define S3C2410_GPD11_INP (0x00 << 22)
@@ -403,37 +515,56 @@
403#define S3C2410_GPD15_OUTP (0x01 << 30) 515#define S3C2410_GPD15_OUTP (0x01 << 30)
404#define S3C2410_GPD15_VD23 (0x02 << 30) 516#define S3C2410_GPD15_VD23 (0x02 << 30)
405 517
406/* Port E consists of 16 GPIO/Special function 518#define S3C2410_GPD_PUPDIS(x) (1<<(x))
519
520/* S3C2410:
521 * Port E consists of 16 GPIO/Special function
407 * 522 *
408 * again, the same as port B, but dealing with I2S, SDI, and 523 * again, the same as port B, but dealing with I2S, SDI, and
409 * more miscellaneous functions 524 * more miscellaneous functions
525 *
526 * S3C2400:
527 * Port E consists of 12 GPIO/Special function
528 *
529 * GPIO / interrupt inputs
410*/ 530*/
411 531
412#define S3C2410_GPECON S3C2410_GPIOREG(0x40) 532#define S3C2410_GPECON S3C2410_GPIOREG(0x40)
413#define S3C2410_GPEDAT S3C2410_GPIOREG(0x44) 533#define S3C2410_GPEDAT S3C2410_GPIOREG(0x44)
414#define S3C2410_GPEUP S3C2410_GPIOREG(0x48) 534#define S3C2410_GPEUP S3C2410_GPIOREG(0x48)
415 535
536#define S3C2400_GPECON S3C2410_GPIOREG(0x2C)
537#define S3C2400_GPEDAT S3C2410_GPIOREG(0x30)
538#define S3C2400_GPEUP S3C2410_GPIOREG(0x34)
539
416#define S3C2410_GPE0 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 0) 540#define S3C2410_GPE0 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 0)
417#define S3C2410_GPE0_INP (0x00 << 0) 541#define S3C2410_GPE0_INP (0x00 << 0)
418#define S3C2410_GPE0_OUTP (0x01 << 0) 542#define S3C2410_GPE0_OUTP (0x01 << 0)
419#define S3C2410_GPE0_I2SLRCK (0x02 << 0) 543#define S3C2410_GPE0_I2SLRCK (0x02 << 0)
544#define S3C2400_GPE0_EINT0 (0x02 << 0)
420#define S3C2410_GPE0_MASK (0x03 << 0) 545#define S3C2410_GPE0_MASK (0x03 << 0)
421 546
422#define S3C2410_GPE1 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 1) 547#define S3C2410_GPE1 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 1)
423#define S3C2410_GPE1_INP (0x00 << 2) 548#define S3C2410_GPE1_INP (0x00 << 2)
424#define S3C2410_GPE1_OUTP (0x01 << 2) 549#define S3C2410_GPE1_OUTP (0x01 << 2)
425#define S3C2410_GPE1_I2SSCLK (0x02 << 2) 550#define S3C2410_GPE1_I2SSCLK (0x02 << 2)
551#define S3C2400_GPE1_EINT1 (0x02 << 2)
552#define S3C2400_GPE1_nSS (0x03 << 2)
426#define S3C2410_GPE1_MASK (0x03 << 2) 553#define S3C2410_GPE1_MASK (0x03 << 2)
427 554
428#define S3C2410_GPE2 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 2) 555#define S3C2410_GPE2 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 2)
429#define S3C2410_GPE2_INP (0x00 << 4) 556#define S3C2410_GPE2_INP (0x00 << 4)
430#define S3C2410_GPE2_OUTP (0x01 << 4) 557#define S3C2410_GPE2_OUTP (0x01 << 4)
431#define S3C2410_GPE2_CDCLK (0x02 << 4) 558#define S3C2410_GPE2_CDCLK (0x02 << 4)
559#define S3C2400_GPE2_EINT2 (0x02 << 4)
560#define S3C2400_GPE2_I2SSDI (0x03 << 4)
432 561
433#define S3C2410_GPE3 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 3) 562#define S3C2410_GPE3 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 3)
434#define S3C2410_GPE3_INP (0x00 << 6) 563#define S3C2410_GPE3_INP (0x00 << 6)
435#define S3C2410_GPE3_OUTP (0x01 << 6) 564#define S3C2410_GPE3_OUTP (0x01 << 6)
436#define S3C2410_GPE3_I2SSDI (0x02 << 6) 565#define S3C2410_GPE3_I2SSDI (0x02 << 6)
566#define S3C2400_GPE3_EINT3 (0x02 << 6)
567#define S3C2400_GPE3_nCTS1 (0x03 << 6)
437#define S3C2410_GPE3_nSS0 (0x03 << 6) 568#define S3C2410_GPE3_nSS0 (0x03 << 6)
438#define S3C2410_GPE3_MASK (0x03 << 6) 569#define S3C2410_GPE3_MASK (0x03 << 6)
439 570
@@ -441,6 +572,8 @@
441#define S3C2410_GPE4_INP (0x00 << 8) 572#define S3C2410_GPE4_INP (0x00 << 8)
442#define S3C2410_GPE4_OUTP (0x01 << 8) 573#define S3C2410_GPE4_OUTP (0x01 << 8)
443#define S3C2410_GPE4_I2SSDO (0x02 << 8) 574#define S3C2410_GPE4_I2SSDO (0x02 << 8)
575#define S3C2400_GPE4_EINT4 (0x02 << 8)
576#define S3C2400_GPE4_nRTS1 (0x03 << 8)
444#define S3C2410_GPE4_I2SSDI (0x03 << 8) 577#define S3C2410_GPE4_I2SSDI (0x03 << 8)
445#define S3C2410_GPE4_MASK (0x03 << 8) 578#define S3C2410_GPE4_MASK (0x03 << 8)
446 579
@@ -448,36 +581,46 @@
448#define S3C2410_GPE5_INP (0x00 << 10) 581#define S3C2410_GPE5_INP (0x00 << 10)
449#define S3C2410_GPE5_OUTP (0x01 << 10) 582#define S3C2410_GPE5_OUTP (0x01 << 10)
450#define S3C2410_GPE5_SDCLK (0x02 << 10) 583#define S3C2410_GPE5_SDCLK (0x02 << 10)
584#define S3C2400_GPE5_EINT5 (0x02 << 10)
585#define S3C2400_GPE5_TCLK1 (0x03 << 10)
451 586
452#define S3C2410_GPE6 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 6) 587#define S3C2410_GPE6 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 6)
453#define S3C2410_GPE6_INP (0x00 << 12) 588#define S3C2410_GPE6_INP (0x00 << 12)
454#define S3C2410_GPE6_OUTP (0x01 << 12) 589#define S3C2410_GPE6_OUTP (0x01 << 12)
455#define S3C2410_GPE6_SDCMD (0x02 << 12) 590#define S3C2410_GPE6_SDCMD (0x02 << 12)
591#define S3C2400_GPE6_EINT6 (0x02 << 12)
456 592
457#define S3C2410_GPE7 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 7) 593#define S3C2410_GPE7 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 7)
458#define S3C2410_GPE7_INP (0x00 << 14) 594#define S3C2410_GPE7_INP (0x00 << 14)
459#define S3C2410_GPE7_OUTP (0x01 << 14) 595#define S3C2410_GPE7_OUTP (0x01 << 14)
460#define S3C2410_GPE7_SDDAT0 (0x02 << 14) 596#define S3C2410_GPE7_SDDAT0 (0x02 << 14)
597#define S3C2400_GPE7_EINT7 (0x02 << 14)
461 598
462#define S3C2410_GPE8 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 8) 599#define S3C2410_GPE8 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 8)
463#define S3C2410_GPE8_INP (0x00 << 16) 600#define S3C2410_GPE8_INP (0x00 << 16)
464#define S3C2410_GPE8_OUTP (0x01 << 16) 601#define S3C2410_GPE8_OUTP (0x01 << 16)
465#define S3C2410_GPE8_SDDAT1 (0x02 << 16) 602#define S3C2410_GPE8_SDDAT1 (0x02 << 16)
603#define S3C2400_GPE8_nXDACK0 (0x02 << 16)
466 604
467#define S3C2410_GPE9 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 9) 605#define S3C2410_GPE9 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 9)
468#define S3C2410_GPE9_INP (0x00 << 18) 606#define S3C2410_GPE9_INP (0x00 << 18)
469#define S3C2410_GPE9_OUTP (0x01 << 18) 607#define S3C2410_GPE9_OUTP (0x01 << 18)
470#define S3C2410_GPE9_SDDAT2 (0x02 << 18) 608#define S3C2410_GPE9_SDDAT2 (0x02 << 18)
609#define S3C2400_GPE9_nXDACK1 (0x02 << 18)
610#define S3C2400_GPE9_nXBACK (0x03 << 18)
471 611
472#define S3C2410_GPE10 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 10) 612#define S3C2410_GPE10 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 10)
473#define S3C2410_GPE10_INP (0x00 << 20) 613#define S3C2410_GPE10_INP (0x00 << 20)
474#define S3C2410_GPE10_OUTP (0x01 << 20) 614#define S3C2410_GPE10_OUTP (0x01 << 20)
475#define S3C2410_GPE10_SDDAT3 (0x02 << 20) 615#define S3C2410_GPE10_SDDAT3 (0x02 << 20)
616#define S3C2400_GPE10_nXDREQ0 (0x02 << 20)
476 617
477#define S3C2410_GPE11 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 11) 618#define S3C2410_GPE11 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 11)
478#define S3C2410_GPE11_INP (0x00 << 22) 619#define S3C2410_GPE11_INP (0x00 << 22)
479#define S3C2410_GPE11_OUTP (0x01 << 22) 620#define S3C2410_GPE11_OUTP (0x01 << 22)
480#define S3C2410_GPE11_SPIMISO0 (0x02 << 22) 621#define S3C2410_GPE11_SPIMISO0 (0x02 << 22)
622#define S3C2400_GPE11_nXDREQ1 (0x02 << 22)
623#define S3C2400_GPE11_nXBREQ (0x03 << 22)
481 624
482#define S3C2410_GPE12 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 12) 625#define S3C2410_GPE12 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 12)
483#define S3C2410_GPE12_INP (0x00 << 24) 626#define S3C2410_GPE12_INP (0x00 << 24)
@@ -509,7 +652,8 @@
509 652
510#define S3C2410_GPE_PUPDIS(x) (1<<(x)) 653#define S3C2410_GPE_PUPDIS(x) (1<<(x))
511 654
512/* Port F consists of 8 GPIO/Special function 655/* S3C2410:
656 * Port F consists of 8 GPIO/Special function
513 * 657 *
514 * GPIO / interrupt inputs 658 * GPIO / interrupt inputs
515 * 659 *
@@ -517,100 +661,141 @@
517 * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 undefined 661 * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 undefined
518 * 662 *
519 * pull up works like all other ports. 663 * pull up works like all other ports.
664 *
665 * S3C2400:
666 * Port F consists of 7 GPIO/Special function
667 *
668 * GPIO/serial/misc pins
520*/ 669*/
521 670
522#define S3C2410_GPFCON S3C2410_GPIOREG(0x50) 671#define S3C2410_GPFCON S3C2410_GPIOREG(0x50)
523#define S3C2410_GPFDAT S3C2410_GPIOREG(0x54) 672#define S3C2410_GPFDAT S3C2410_GPIOREG(0x54)
524#define S3C2410_GPFUP S3C2410_GPIOREG(0x58) 673#define S3C2410_GPFUP S3C2410_GPIOREG(0x58)
525 674
675#define S3C2400_GPFCON S3C2410_GPIOREG(0x38)
676#define S3C2400_GPFDAT S3C2410_GPIOREG(0x3C)
677#define S3C2400_GPFUP S3C2410_GPIOREG(0x40)
678
526#define S3C2410_GPF0 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 0) 679#define S3C2410_GPF0 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 0)
527#define S3C2410_GPF0_INP (0x00 << 0) 680#define S3C2410_GPF0_INP (0x00 << 0)
528#define S3C2410_GPF0_OUTP (0x01 << 0) 681#define S3C2410_GPF0_OUTP (0x01 << 0)
529#define S3C2410_GPF0_EINT0 (0x02 << 0) 682#define S3C2410_GPF0_EINT0 (0x02 << 0)
683#define S3C2400_GPF0_RXD0 (0x02 << 0)
530 684
531#define S3C2410_GPF1 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 1) 685#define S3C2410_GPF1 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 1)
532#define S3C2410_GPF1_INP (0x00 << 2) 686#define S3C2410_GPF1_INP (0x00 << 2)
533#define S3C2410_GPF1_OUTP (0x01 << 2) 687#define S3C2410_GPF1_OUTP (0x01 << 2)
534#define S3C2410_GPF1_EINT1 (0x02 << 2) 688#define S3C2410_GPF1_EINT1 (0x02 << 2)
689#define S3C2400_GPF1_RXD1 (0x02 << 2)
690#define S3C2400_GPF1_IICSDA (0x03 << 2)
535 691
536#define S3C2410_GPF2 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 2) 692#define S3C2410_GPF2 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 2)
537#define S3C2410_GPF2_INP (0x00 << 4) 693#define S3C2410_GPF2_INP (0x00 << 4)
538#define S3C2410_GPF2_OUTP (0x01 << 4) 694#define S3C2410_GPF2_OUTP (0x01 << 4)
539#define S3C2410_GPF2_EINT2 (0x02 << 4) 695#define S3C2410_GPF2_EINT2 (0x02 << 4)
696#define S3C2400_GPF2_TXD0 (0x02 << 4)
540 697
541#define S3C2410_GPF3 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 3) 698#define S3C2410_GPF3 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 3)
542#define S3C2410_GPF3_INP (0x00 << 6) 699#define S3C2410_GPF3_INP (0x00 << 6)
543#define S3C2410_GPF3_OUTP (0x01 << 6) 700#define S3C2410_GPF3_OUTP (0x01 << 6)
544#define S3C2410_GPF3_EINT3 (0x02 << 6) 701#define S3C2410_GPF3_EINT3 (0x02 << 6)
702#define S3C2400_GPF3_TXD1 (0x02 << 6)
703#define S3C2400_GPF3_IICSCL (0x03 << 6)
545 704
546#define S3C2410_GPF4 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 4) 705#define S3C2410_GPF4 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 4)
547#define S3C2410_GPF4_INP (0x00 << 8) 706#define S3C2410_GPF4_INP (0x00 << 8)
548#define S3C2410_GPF4_OUTP (0x01 << 8) 707#define S3C2410_GPF4_OUTP (0x01 << 8)
549#define S3C2410_GPF4_EINT4 (0x02 << 8) 708#define S3C2410_GPF4_EINT4 (0x02 << 8)
709#define S3C2400_GPF4_nRTS0 (0x02 << 8)
710#define S3C2400_GPF4_nXBACK (0x03 << 8)
550 711
551#define S3C2410_GPF5 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 5) 712#define S3C2410_GPF5 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 5)
552#define S3C2410_GPF5_INP (0x00 << 10) 713#define S3C2410_GPF5_INP (0x00 << 10)
553#define S3C2410_GPF5_OUTP (0x01 << 10) 714#define S3C2410_GPF5_OUTP (0x01 << 10)
554#define S3C2410_GPF5_EINT5 (0x02 << 10) 715#define S3C2410_GPF5_EINT5 (0x02 << 10)
716#define S3C2400_GPF5_nCTS0 (0x02 << 10)
717#define S3C2400_GPF5_nXBREQ (0x03 << 10)
555 718
556#define S3C2410_GPF6 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 6) 719#define S3C2410_GPF6 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 6)
557#define S3C2410_GPF6_INP (0x00 << 12) 720#define S3C2410_GPF6_INP (0x00 << 12)
558#define S3C2410_GPF6_OUTP (0x01 << 12) 721#define S3C2410_GPF6_OUTP (0x01 << 12)
559#define S3C2410_GPF6_EINT6 (0x02 << 12) 722#define S3C2410_GPF6_EINT6 (0x02 << 12)
723#define S3C2400_GPF6_CLKOUT (0x02 << 12)
560 724
561#define S3C2410_GPF7 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 7) 725#define S3C2410_GPF7 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 7)
562#define S3C2410_GPF7_INP (0x00 << 14) 726#define S3C2410_GPF7_INP (0x00 << 14)
563#define S3C2410_GPF7_OUTP (0x01 << 14) 727#define S3C2410_GPF7_OUTP (0x01 << 14)
564#define S3C2410_GPF7_EINT7 (0x02 << 14) 728#define S3C2410_GPF7_EINT7 (0x02 << 14)
565 729
566/* Port G consists of 8 GPIO/IRQ/Special function 730#define S3C2410_GPF_PUPDIS(x) (1<<(x))
731
732/* S3C2410:
733 * Port G consists of 8 GPIO/IRQ/Special function
567 * 734 *
568 * GPGCON has 2 bits for each of the input pins on port F 735 * GPGCON has 2 bits for each of the input pins on port F
569 * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func 736 * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func
570 * 737 *
571 * pull up works like all other ports. 738 * pull up works like all other ports.
739 *
740 * S3C2400:
741 * Port G consists of 10 GPIO/Special function
572*/ 742*/
573 743
574#define S3C2410_GPGCON S3C2410_GPIOREG(0x60) 744#define S3C2410_GPGCON S3C2410_GPIOREG(0x60)
575#define S3C2410_GPGDAT S3C2410_GPIOREG(0x64) 745#define S3C2410_GPGDAT S3C2410_GPIOREG(0x64)
576#define S3C2410_GPGUP S3C2410_GPIOREG(0x68) 746#define S3C2410_GPGUP S3C2410_GPIOREG(0x68)
577 747
748#define S3C2400_GPGCON S3C2410_GPIOREG(0x44)
749#define S3C2400_GPGDAT S3C2410_GPIOREG(0x48)
750#define S3C2400_GPGUP S3C2410_GPIOREG(0x4C)
751
578#define S3C2410_GPG0 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 0) 752#define S3C2410_GPG0 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 0)
579#define S3C2410_GPG0_INP (0x00 << 0) 753#define S3C2410_GPG0_INP (0x00 << 0)
580#define S3C2410_GPG0_OUTP (0x01 << 0) 754#define S3C2410_GPG0_OUTP (0x01 << 0)
581#define S3C2410_GPG0_EINT8 (0x02 << 0) 755#define S3C2410_GPG0_EINT8 (0x02 << 0)
756#define S3C2400_GPG0_I2SLRCK (0x02 << 0)
582 757
583#define S3C2410_GPG1 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 1) 758#define S3C2410_GPG1 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 1)
584#define S3C2410_GPG1_INP (0x00 << 2) 759#define S3C2410_GPG1_INP (0x00 << 2)
585#define S3C2410_GPG1_OUTP (0x01 << 2) 760#define S3C2410_GPG1_OUTP (0x01 << 2)
586#define S3C2410_GPG1_EINT9 (0x02 << 2) 761#define S3C2410_GPG1_EINT9 (0x02 << 2)
762#define S3C2400_GPG1_I2SSCLK (0x02 << 2)
587 763
588#define S3C2410_GPG2 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 2) 764#define S3C2410_GPG2 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 2)
589#define S3C2410_GPG2_INP (0x00 << 4) 765#define S3C2410_GPG2_INP (0x00 << 4)
590#define S3C2410_GPG2_OUTP (0x01 << 4) 766#define S3C2410_GPG2_OUTP (0x01 << 4)
591#define S3C2410_GPG2_EINT10 (0x02 << 4) 767#define S3C2410_GPG2_EINT10 (0x02 << 4)
768#define S3C2400_GPG2_CDCLK (0x02 << 4)
592 769
593#define S3C2410_GPG3 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 3) 770#define S3C2410_GPG3 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 3)
594#define S3C2410_GPG3_INP (0x00 << 6) 771#define S3C2410_GPG3_INP (0x00 << 6)
595#define S3C2410_GPG3_OUTP (0x01 << 6) 772#define S3C2410_GPG3_OUTP (0x01 << 6)
596#define S3C2410_GPG3_EINT11 (0x02 << 6) 773#define S3C2410_GPG3_EINT11 (0x02 << 6)
774#define S3C2400_GPG3_I2SSDO (0x02 << 6)
775#define S3C2400_GPG3_I2SSDI (0x03 << 6)
597 776
598#define S3C2410_GPG4 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 4) 777#define S3C2410_GPG4 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 4)
599#define S3C2410_GPG4_INP (0x00 << 8) 778#define S3C2410_GPG4_INP (0x00 << 8)
600#define S3C2410_GPG4_OUTP (0x01 << 8) 779#define S3C2410_GPG4_OUTP (0x01 << 8)
601#define S3C2410_GPG4_EINT12 (0x02 << 8) 780#define S3C2410_GPG4_EINT12 (0x02 << 8)
781#define S3C2400_GPG4_MMCCLK (0x02 << 8)
782#define S3C2400_GPG4_I2SSDI (0x03 << 8)
602#define S3C2410_GPG4_LCDPWREN (0x03 << 8) 783#define S3C2410_GPG4_LCDPWREN (0x03 << 8)
603 784
604#define S3C2410_GPG5 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 5) 785#define S3C2410_GPG5 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 5)
605#define S3C2410_GPG5_INP (0x00 << 10) 786#define S3C2410_GPG5_INP (0x00 << 10)
606#define S3C2410_GPG5_OUTP (0x01 << 10) 787#define S3C2410_GPG5_OUTP (0x01 << 10)
607#define S3C2410_GPG5_EINT13 (0x02 << 10) 788#define S3C2410_GPG5_EINT13 (0x02 << 10)
789#define S3C2400_GPG5_MMCCMD (0x02 << 10)
790#define S3C2400_GPG5_IICSDA (0x03 << 10)
608#define S3C2410_GPG5_SPIMISO1 (0x03 << 10) 791#define S3C2410_GPG5_SPIMISO1 (0x03 << 10)
609 792
610#define S3C2410_GPG6 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 6) 793#define S3C2410_GPG6 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 6)
611#define S3C2410_GPG6_INP (0x00 << 12) 794#define S3C2410_GPG6_INP (0x00 << 12)
612#define S3C2410_GPG6_OUTP (0x01 << 12) 795#define S3C2410_GPG6_OUTP (0x01 << 12)
613#define S3C2410_GPG6_EINT14 (0x02 << 12) 796#define S3C2410_GPG6_EINT14 (0x02 << 12)
797#define S3C2400_GPG6_MMCDAT (0x02 << 12)
798#define S3C2400_GPG6_IICSCL (0x03 << 12)
614#define S3C2410_GPG6_SPIMOSI1 (0x03 << 12) 799#define S3C2410_GPG6_SPIMOSI1 (0x03 << 12)
615 800
616#define S3C2410_GPG7 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 7) 801#define S3C2410_GPG7 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 7)
@@ -618,16 +803,22 @@
618#define S3C2410_GPG7_OUTP (0x01 << 14) 803#define S3C2410_GPG7_OUTP (0x01 << 14)
619#define S3C2410_GPG7_EINT15 (0x02 << 14) 804#define S3C2410_GPG7_EINT15 (0x02 << 14)
620#define S3C2410_GPG7_SPICLK1 (0x03 << 14) 805#define S3C2410_GPG7_SPICLK1 (0x03 << 14)
806#define S3C2400_GPG7_SPIMISO (0x02 << 14)
807#define S3C2400_GPG7_IICSDA (0x03 << 14)
621 808
622#define S3C2410_GPG8 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 8) 809#define S3C2410_GPG8 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 8)
623#define S3C2410_GPG8_INP (0x00 << 16) 810#define S3C2410_GPG8_INP (0x00 << 16)
624#define S3C2410_GPG8_OUTP (0x01 << 16) 811#define S3C2410_GPG8_OUTP (0x01 << 16)
625#define S3C2410_GPG8_EINT16 (0x02 << 16) 812#define S3C2410_GPG8_EINT16 (0x02 << 16)
813#define S3C2400_GPG8_SPIMOSI (0x02 << 16)
814#define S3C2400_GPG8_IICSCL (0x03 << 16)
626 815
627#define S3C2410_GPG9 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 9) 816#define S3C2410_GPG9 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 9)
628#define S3C2410_GPG9_INP (0x00 << 18) 817#define S3C2410_GPG9_INP (0x00 << 18)
629#define S3C2410_GPG9_OUTP (0x01 << 18) 818#define S3C2410_GPG9_OUTP (0x01 << 18)
630#define S3C2410_GPG9_EINT17 (0x02 << 18) 819#define S3C2410_GPG9_EINT17 (0x02 << 18)
820#define S3C2400_GPG9_SPICLK (0x02 << 18)
821#define S3C2400_GPG9_MMCCLK (0x03 << 18)
631 822
632#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10) 823#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10)
633#define S3C2410_GPG10_INP (0x00 << 20) 824#define S3C2410_GPG10_INP (0x00 << 20)
@@ -737,19 +928,27 @@
737#define S3C2410_GPH10_CLKOUT1 (0x02 << 20) 928#define S3C2410_GPH10_CLKOUT1 (0x02 << 20)
738 929
739/* miscellaneous control */ 930/* miscellaneous control */
740 931#define S3C2400_MISCCR S3C2410_GPIOREG(0x54)
741#define S3C2410_MISCCR S3C2410_GPIOREG(0x80) 932#define S3C2410_MISCCR S3C2410_GPIOREG(0x80)
742#define S3C2410_DCLKCON S3C2410_GPIOREG(0x84) 933#define S3C2410_DCLKCON S3C2410_GPIOREG(0x84)
743 934
744/* see clock.h for dclk definitions */ 935/* see clock.h for dclk definitions */
745 936
746/* pullup control on databus */ 937/* pullup control on databus */
747#define S3C2410_MISCCR_SPUCR_HEN (0) 938#define S3C2410_MISCCR_SPUCR_HEN (0<<0)
748#define S3C2410_MISCCR_SPUCR_HDIS (1<<0) 939#define S3C2410_MISCCR_SPUCR_HDIS (1<<0)
749#define S3C2410_MISCCR_SPUCR_LEN (0) 940#define S3C2410_MISCCR_SPUCR_LEN (0<<1)
750#define S3C2410_MISCCR_SPUCR_LDIS (1<<1) 941#define S3C2410_MISCCR_SPUCR_LDIS (1<<1)
751 942
752#define S3C2410_MISCCR_USBDEV (0) 943#define S3C2400_MISCCR_SPUCR_LEN (0<<0)
944#define S3C2400_MISCCR_SPUCR_LDIS (1<<0)
945#define S3C2400_MISCCR_SPUCR_HEN (0<<1)
946#define S3C2400_MISCCR_SPUCR_HDIS (1<<1)
947
948#define S3C2400_MISCCR_HZ_STOPEN (0<<2)
949#define S3C2400_MISCCR_HZ_STOPPREV (1<<2)
950
951#define S3C2410_MISCCR_USBDEV (0<<3)
753#define S3C2410_MISCCR_USBHOST (1<<3) 952#define S3C2410_MISCCR_USBHOST (1<<3)
754 953
755#define S3C2410_MISCCR_CLK0_MPLL (0<<4) 954#define S3C2410_MISCCR_CLK0_MPLL (0<<4)
@@ -785,7 +984,7 @@
785 * 984 *
786 * Samsung datasheet p9-25 985 * Samsung datasheet p9-25
787*/ 986*/
788 987#define S3C2400_EXTINT0 S3C2410_GPIOREG(0x58)
789#define S3C2410_EXTINT0 S3C2410_GPIOREG(0x88) 988#define S3C2410_EXTINT0 S3C2410_GPIOREG(0x88)
790#define S3C2410_EXTINT1 S3C2410_GPIOREG(0x8C) 989#define S3C2410_EXTINT1 S3C2410_GPIOREG(0x8C)
791#define S3C2410_EXTINT2 S3C2410_GPIOREG(0x90) 990#define S3C2410_EXTINT2 S3C2410_GPIOREG(0x90)
@@ -833,5 +1032,21 @@
833#define S3C2410_GSTATUS2_OFFRESET (1<<1) 1032#define S3C2410_GSTATUS2_OFFRESET (1<<1)
834#define S3C2410_GSTATUS2_PONRESET (1<<0) 1033#define S3C2410_GSTATUS2_PONRESET (1<<0)
835 1034
1035/* open drain control register */
1036#define S3C2400_OPENCR S3C2410_GPIOREG(0x50)
1037
1038#define S3C2400_OPENCR_OPC_RXD1DIS (0<<0)
1039#define S3C2400_OPENCR_OPC_RXD1EN (1<<0)
1040#define S3C2400_OPENCR_OPC_TXD1DIS (0<<1)
1041#define S3C2400_OPENCR_OPC_TXD1EN (1<<1)
1042#define S3C2400_OPENCR_OPC_CMDDIS (0<<2)
1043#define S3C2400_OPENCR_OPC_CMDEN (1<<2)
1044#define S3C2400_OPENCR_OPC_DATDIS (0<<3)
1045#define S3C2400_OPENCR_OPC_DATEN (1<<3)
1046#define S3C2400_OPENCR_OPC_MISODIS (0<<4)
1047#define S3C2400_OPENCR_OPC_MISOEN (1<<4)
1048#define S3C2400_OPENCR_OPC_MOSIDIS (0<<5)
1049#define S3C2400_OPENCR_OPC_MOSIEN (1<<5)
1050
836#endif /* __ASM_ARCH_REGS_GPIO_H */ 1051#endif /* __ASM_ARCH_REGS_GPIO_H */
837 1052
diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h
index 9d4fe6cf205b..040ccde7a11e 100644
--- a/include/asm-arm/arch-sa1100/io.h
+++ b/include/asm-arm/arch-sa1100/io.h
@@ -10,8 +10,6 @@
10#ifndef __ASM_ARM_ARCH_IO_H 10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H 11#define __ASM_ARM_ARCH_IO_H
12 12
13#include <asm/hardware.h>
14
15#define IO_SPACE_LIMIT 0xffffffff 13#define IO_SPACE_LIMIT 0xffffffff
16 14
17/* 15/*
diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 0fc555b4c912..018a9f0e3986 100644
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -18,20 +18,10 @@
18#ifndef __ASSEMBLY__ 18#ifndef __ASSEMBLY__
19 19
20#ifdef CONFIG_SA1111 20#ifdef CONFIG_SA1111
21static inline void 21void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
22__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
23{
24 unsigned int sz = SZ_1M >> PAGE_SHIFT;
25
26 if (node != 0)
27 sz = 0;
28
29 size[1] = size[0] - sz;
30 size[0] = sz;
31}
32 22
33#define arch_adjust_zones(node, size, holes) \ 23#define arch_adjust_zones(node, size, holes) \
34 __arch_adjust_zones(node, size, holes) 24 sa1111_adjust_zones(node, size, holes)
35 25
36#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_1M - 1) 26#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_1M - 1)
37 27
diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h
index 2885972b0855..d586f65c8228 100644
--- a/include/asm-arm/atomic.h
+++ b/include/asm-arm/atomic.h
@@ -12,6 +12,7 @@
12#define __ASM_ARM_ATOMIC_H 12#define __ASM_ARM_ATOMIC_H
13 13
14#include <linux/config.h> 14#include <linux/config.h>
15#include <linux/compiler.h>
15 16
16typedef struct { volatile int counter; } atomic_t; 17typedef struct { volatile int counter; } atomic_t;
17 18
@@ -80,6 +81,24 @@ static inline int atomic_sub_return(int i, atomic_t *v)
80 return result; 81 return result;
81} 82}
82 83
84static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
85{
86 unsigned long oldval, res;
87
88 do {
89 __asm__ __volatile__("@ atomic_cmpxchg\n"
90 "ldrex %1, [%2]\n"
91 "mov %0, #0\n"
92 "teq %1, %3\n"
93 "strexeq %0, %4, [%2]\n"
94 : "=&r" (res), "=&r" (oldval)
95 : "r" (&ptr->counter), "Ir" (old), "r" (new)
96 : "cc");
97 } while (res);
98
99 return oldval;
100}
101
83static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) 102static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
84{ 103{
85 unsigned long tmp, tmp2; 104 unsigned long tmp, tmp2;
@@ -131,6 +150,20 @@ static inline int atomic_sub_return(int i, atomic_t *v)
131 return val; 150 return val;
132} 151}
133 152
153static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
154{
155 int ret;
156 unsigned long flags;
157
158 local_irq_save(flags);
159 ret = v->counter;
160 if (likely(ret == old))
161 v->counter = new;
162 local_irq_restore(flags);
163
164 return ret;
165}
166
134static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) 167static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
135{ 168{
136 unsigned long flags; 169 unsigned long flags;
@@ -142,6 +175,17 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
142 175
143#endif /* __LINUX_ARM_ARCH__ */ 176#endif /* __LINUX_ARM_ARCH__ */
144 177
178static inline int atomic_add_unless(atomic_t *v, int a, int u)
179{
180 int c, old;
181
182 c = atomic_read(v);
183 while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c)
184 c = old;
185 return c != u;
186}
187#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
188
145#define atomic_add(i, v) (void) atomic_add_return(i, v) 189#define atomic_add(i, v) (void) atomic_add_return(i, v)
146#define atomic_inc(v) (void) atomic_add_return(1, v) 190#define atomic_inc(v) (void) atomic_add_return(1, v)
147#define atomic_sub(i, v) (void) atomic_sub_return(i, v) 191#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
index e007dd990da5..7399d431edfe 100644
--- a/include/asm-arm/bitops.h
+++ b/include/asm-arm/bitops.h
@@ -19,6 +19,7 @@
19 19
20#ifdef __KERNEL__ 20#ifdef __KERNEL__
21 21
22#include <linux/compiler.h>
22#include <asm/system.h> 23#include <asm/system.h>
23 24
24#define smp_mb__before_clear_bit() mb() 25#define smp_mb__before_clear_bit() mb()
diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h
index 7da97a937548..2d44b42d1847 100644
--- a/include/asm-arm/elf.h
+++ b/include/asm-arm/elf.h
@@ -22,6 +22,8 @@ typedef unsigned long elf_freg_t[3];
22#define R_ARM_NONE 0 22#define R_ARM_NONE 0
23#define R_ARM_PC24 1 23#define R_ARM_PC24 1
24#define R_ARM_ABS32 2 24#define R_ARM_ABS32 2
25#define R_ARM_CALL 28
26#define R_ARM_JUMP24 29
25 27
26#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) 28#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
27typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 29typedef elf_greg_t elf_gregset_t[ELF_NGREG];
diff --git a/include/asm-arm/hardware/amba_serial.h b/include/asm-arm/hardware/amba_serial.h
index 71770aa6389f..dc726ffccebd 100644
--- a/include/asm-arm/hardware/amba_serial.h
+++ b/include/asm-arm/hardware/amba_serial.h
@@ -50,6 +50,11 @@
50#define UART011_ICR 0x44 /* Interrupt clear register. */ 50#define UART011_ICR 0x44 /* Interrupt clear register. */
51#define UART011_DMACR 0x48 /* DMA control register. */ 51#define UART011_DMACR 0x48 /* DMA control register. */
52 52
53#define UART011_DR_OE (1 << 11)
54#define UART011_DR_BE (1 << 10)
55#define UART011_DR_PE (1 << 9)
56#define UART011_DR_FE (1 << 8)
57
53#define UART01x_RSR_OE 0x08 58#define UART01x_RSR_OE 0x08
54#define UART01x_RSR_BE 0x04 59#define UART01x_RSR_BE 0x04
55#define UART01x_RSR_PE 0x02 60#define UART01x_RSR_PE 0x02
diff --git a/include/asm-arm/hardware/dec21285.h b/include/asm-arm/hardware/dec21285.h
index 9049f0ddaecf..6685e3fb97b1 100644
--- a/include/asm-arm/hardware/dec21285.h
+++ b/include/asm-arm/hardware/dec21285.h
@@ -20,7 +20,7 @@
20 20
21#include <linux/config.h> 21#include <linux/config.h>
22#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
23#include <asm/arch/hardware.h> 23#include <asm/hardware.h>
24#define DC21285_IO(x) ((volatile unsigned long *)(ARMCSR_BASE+(x))) 24#define DC21285_IO(x) ((volatile unsigned long *)(ARMCSR_BASE+(x)))
25#else 25#else
26#define DC21285_IO(x) (x) 26#define DC21285_IO(x) (x)
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 2e6799632f12..0cf4d4f99600 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -42,9 +42,9 @@ extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
42extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen); 42extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
43extern void __raw_writesl(void __iomem *addr, const void *data, int longlen); 43extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
44 44
45extern void __raw_readsb(void __iomem *addr, void *data, int bytelen); 45extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
46extern void __raw_readsw(void __iomem *addr, void *data, int wordlen); 46extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
47extern void __raw_readsl(void __iomem *addr, void *data, int longlen); 47extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
48 48
49#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v)) 49#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))
50#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)) 50#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
@@ -55,6 +55,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
55#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) 55#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
56 56
57/* 57/*
58 * Architecture ioremap implementation.
59 */
60extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
61extern void __iounmap(void __iomem *addr);
62
63/*
58 * Bad read/write accesses... 64 * Bad read/write accesses...
59 */ 65 */
60extern void __readwrite_bug(const char *fn); 66extern void __readwrite_bug(const char *fn);
@@ -256,18 +262,15 @@ out:
256 * ioremap takes a PCI memory address, as specified in 262 * ioremap takes a PCI memory address, as specified in
257 * Documentation/IO-mapping.txt. 263 * Documentation/IO-mapping.txt.
258 */ 264 */
259extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
260extern void __iounmap(void __iomem *addr);
261
262#ifndef __arch_ioremap 265#ifndef __arch_ioremap
263#define ioremap(cookie,size) __ioremap(cookie,size,0,1) 266#define ioremap(cookie,size) __ioremap(cookie,size,0)
264#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1) 267#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0)
265#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1) 268#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE)
266#define iounmap(cookie) __iounmap(cookie) 269#define iounmap(cookie) __iounmap(cookie)
267#else 270#else
268#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1) 271#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0)
269#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1) 272#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0)
270#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1) 273#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
271#define iounmap(cookie) __arch_iounmap(cookie) 274#define iounmap(cookie) __arch_iounmap(cookie)
272#endif 275#endif
273 276
diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h
index a547ee598c6c..3e572364ee73 100644
--- a/include/asm-arm/memory.h
+++ b/include/asm-arm/memory.h
@@ -122,6 +122,7 @@ static inline void *phys_to_virt(unsigned long x)
122 */ 122 */
123#define __pa(x) __virt_to_phys((unsigned long)(x)) 123#define __pa(x) __virt_to_phys((unsigned long)(x))
124#define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) 124#define __va(x) ((void *)__phys_to_virt((unsigned long)(x)))
125#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
125 126
126/* 127/*
127 * Virtual <-> DMA view memory address translations 128 * Virtual <-> DMA view memory address translations
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
index 3d4b810d8c38..81c59facea3b 100644
--- a/include/asm-arm/mmu_context.h
+++ b/include/asm-arm/mmu_context.h
@@ -13,6 +13,7 @@
13#ifndef __ASM_ARM_MMU_CONTEXT_H 13#ifndef __ASM_ARM_MMU_CONTEXT_H
14#define __ASM_ARM_MMU_CONTEXT_H 14#define __ASM_ARM_MMU_CONTEXT_H
15 15
16#include <linux/compiler.h>
16#include <asm/cacheflush.h> 17#include <asm/cacheflush.h>
17#include <asm/proc-fns.h> 18#include <asm/proc-fns.h>
18 19
diff --git a/include/asm-arm/numnodes.h b/include/asm-arm/numnodes.h
index 5d2a1034a02e..8df36818ebc9 100644
--- a/include/asm-arm/numnodes.h
+++ b/include/asm-arm/numnodes.h
@@ -17,6 +17,8 @@
17#ifndef __ASM_ARM_NUMNODES_H 17#ifndef __ASM_ARM_NUMNODES_H
18#define __ASM_ARM_NUMNODES_H 18#define __ASM_ARM_NUMNODES_H
19 19
20#include <asm/memory.h>
21
20#ifndef NODES_SHIFT 22#ifndef NODES_SHIFT
21# define NODES_SHIFT 2 /* Normally, Max 4 Nodes */ 23# define NODES_SHIFT 2 /* Normally, Max 4 Nodes */
22#endif 24#endif
diff --git a/include/asm-arm/semaphore.h b/include/asm-arm/semaphore.h
index 71ca7d412687..d5dc624f452a 100644
--- a/include/asm-arm/semaphore.h
+++ b/include/asm-arm/semaphore.h
@@ -47,11 +47,6 @@ static inline void init_MUTEX_LOCKED(struct semaphore *sem)
47 sema_init(sem, 0); 47 sema_init(sem, 0);
48} 48}
49 49
50static inline int sema_count(struct semaphore *sem)
51{
52 return atomic_read(&sem->count);
53}
54
55/* 50/*
56 * special register calling convention 51 * special register calling convention
57 */ 52 */
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index 6ed4f916b166..43ad4e55878c 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -30,6 +30,9 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
30 __asm__ __volatile__( 30 __asm__ __volatile__(
31"1: ldrex %0, [%1]\n" 31"1: ldrex %0, [%1]\n"
32" teq %0, #0\n" 32" teq %0, #0\n"
33#ifdef CONFIG_CPU_32v6K
34" wfene\n"
35#endif
33" strexeq %0, %2, [%1]\n" 36" strexeq %0, %2, [%1]\n"
34" teqeq %0, #0\n" 37" teqeq %0, #0\n"
35" bne 1b" 38" bne 1b"
@@ -65,7 +68,11 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
65 smp_mb(); 68 smp_mb();
66 69
67 __asm__ __volatile__( 70 __asm__ __volatile__(
68" str %1, [%0]" 71" str %1, [%0]\n"
72#ifdef CONFIG_CPU_32v6K
73" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */
74" sev"
75#endif
69 : 76 :
70 : "r" (&lock->lock), "r" (0) 77 : "r" (&lock->lock), "r" (0)
71 : "cc"); 78 : "cc");
@@ -87,6 +94,9 @@ static inline void __raw_write_lock(raw_rwlock_t *rw)
87 __asm__ __volatile__( 94 __asm__ __volatile__(
88"1: ldrex %0, [%1]\n" 95"1: ldrex %0, [%1]\n"
89" teq %0, #0\n" 96" teq %0, #0\n"
97#ifdef CONFIG_CPU_32v6K
98" wfene\n"
99#endif
90" strexeq %0, %2, [%1]\n" 100" strexeq %0, %2, [%1]\n"
91" teq %0, #0\n" 101" teq %0, #0\n"
92" bne 1b" 102" bne 1b"
@@ -122,7 +132,11 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
122 smp_mb(); 132 smp_mb();
123 133
124 __asm__ __volatile__( 134 __asm__ __volatile__(
125 "str %1, [%0]" 135 "str %1, [%0]\n"
136#ifdef CONFIG_CPU_32v6K
137" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */
138" sev\n"
139#endif
126 : 140 :
127 : "r" (&rw->lock), "r" (0) 141 : "r" (&rw->lock), "r" (0)
128 : "cc"); 142 : "cc");
@@ -148,6 +162,9 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
148"1: ldrex %0, [%2]\n" 162"1: ldrex %0, [%2]\n"
149" adds %0, %0, #1\n" 163" adds %0, %0, #1\n"
150" strexpl %1, %0, [%2]\n" 164" strexpl %1, %0, [%2]\n"
165#ifdef CONFIG_CPU_32v6K
166" wfemi\n"
167#endif
151" rsbpls %0, %1, #0\n" 168" rsbpls %0, %1, #0\n"
152" bmi 1b" 169" bmi 1b"
153 : "=&r" (tmp), "=&r" (tmp2) 170 : "=&r" (tmp), "=&r" (tmp2)
@@ -169,6 +186,11 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
169" strex %1, %0, [%2]\n" 186" strex %1, %0, [%2]\n"
170" teq %1, #0\n" 187" teq %1, #0\n"
171" bne 1b" 188" bne 1b"
189#ifdef CONFIG_CPU_32v6K
190"\n cmp %0, #0\n"
191" mcreq p15, 0, %0, c7, c10, 4\n"
192" seveq"
193#endif
172 : "=&r" (tmp), "=&r" (tmp2) 194 : "=&r" (tmp), "=&r" (tmp2)
173 : "r" (&rw->lock) 195 : "r" (&rw->lock)
174 : "cc"); 196 : "cc");
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 8efa4ebdcacb..5621d61ebc07 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -93,8 +93,6 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
93 struct pt_regs *), 93 struct pt_regs *),
94 int sig, const char *name); 94 int sig, const char *name);
95 95
96#include <asm/proc-fns.h>
97
98#define xchg(ptr,x) \ 96#define xchg(ptr,x) \
99 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) 97 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
100 98
@@ -102,6 +100,8 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
102 100
103extern asmlinkage void __backtrace(void); 101extern asmlinkage void __backtrace(void);
104extern asmlinkage void c_backtrace(unsigned long fp, int pmode); 102extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
103
104struct mm_struct;
105extern void show_pte(struct mm_struct *mm, unsigned long addr); 105extern void show_pte(struct mm_struct *mm, unsigned long addr);
106extern void __show_regs(struct pt_regs *); 106extern void __show_regs(struct pt_regs *);
107 107
diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h
index 8252a4cd860f..7c98557b717f 100644
--- a/include/asm-arm/thread_info.h
+++ b/include/asm-arm/thread_info.h
@@ -12,6 +12,7 @@
12 12
13#ifdef __KERNEL__ 13#ifdef __KERNEL__
14 14
15#include <linux/compiler.h>
15#include <asm/fpstate.h> 16#include <asm/fpstate.h>
16 17
17#define THREAD_SIZE_ORDER 1 18#define THREAD_SIZE_ORDER 1
diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h
index a2fdad0138b3..064f0f5e8e2b 100644
--- a/include/asm-arm/uaccess.h
+++ b/include/asm-arm/uaccess.h
@@ -100,7 +100,6 @@ static inline void set_fs (mm_segment_t fs)
100extern int __get_user_1(void *); 100extern int __get_user_1(void *);
101extern int __get_user_2(void *); 101extern int __get_user_2(void *);
102extern int __get_user_4(void *); 102extern int __get_user_4(void *);
103extern int __get_user_8(void *);
104extern int __get_user_bad(void); 103extern int __get_user_bad(void);
105 104
106#define __get_user_x(__r2,__p,__e,__s,__i...) \ 105#define __get_user_x(__r2,__p,__e,__s,__i...) \
@@ -114,7 +113,7 @@ extern int __get_user_bad(void);
114#define get_user(x,p) \ 113#define get_user(x,p) \
115 ({ \ 114 ({ \
116 const register typeof(*(p)) __user *__p asm("r0") = (p);\ 115 const register typeof(*(p)) __user *__p asm("r0") = (p);\
117 register typeof(*(p)) __r2 asm("r2"); \ 116 register unsigned int __r2 asm("r2"); \
118 register int __e asm("r0"); \ 117 register int __e asm("r0"); \
119 switch (sizeof(*(__p))) { \ 118 switch (sizeof(*(__p))) { \
120 case 1: \ 119 case 1: \
@@ -126,12 +125,9 @@ extern int __get_user_bad(void);
126 case 4: \ 125 case 4: \
127 __get_user_x(__r2, __p, __e, 4, "lr"); \ 126 __get_user_x(__r2, __p, __e, 4, "lr"); \
128 break; \ 127 break; \
129 case 8: \
130 __get_user_x(__r2, __p, __e, 8, "lr"); \
131 break; \
132 default: __e = __get_user_bad(); break; \ 128 default: __e = __get_user_bad(); break; \
133 } \ 129 } \
134 x = __r2; \ 130 x = (typeof(*(p))) __r2; \
135 __e; \ 131 __e; \
136 }) 132 })
137 133
diff --git a/include/asm-arm26/atomic.h b/include/asm-arm26/atomic.h
index 4a88235c0e76..a47cadc59686 100644
--- a/include/asm-arm26/atomic.h
+++ b/include/asm-arm26/atomic.h
@@ -62,6 +62,35 @@ static inline int atomic_sub_return(int i, atomic_t *v)
62 return val; 62 return val;
63} 63}
64 64
65static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
66{
67 int ret;
68 unsigned long flags;
69
70 local_irq_save(flags);
71 ret = v->counter;
72 if (likely(ret == old))
73 v->counter = new;
74 local_irq_restore(flags);
75
76 return ret;
77}
78
79static inline int atomic_add_unless(atomic_t *v, int a, int u)
80{
81 int ret;
82 unsigned long flags;
83
84 local_irq_save(flags);
85 ret = v->counter;
86 if (ret != u)
87 v->counter += a;
88 local_irq_restore(flags);
89
90 return ret != u;
91}
92#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
93
65static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) 94static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
66{ 95{
67 unsigned long flags; 96 unsigned long flags;
diff --git a/include/asm-cris/atomic.h b/include/asm-cris/atomic.h
index 8c2e78304523..683b05a57d88 100644
--- a/include/asm-cris/atomic.h
+++ b/include/asm-cris/atomic.h
@@ -123,6 +123,33 @@ static inline int atomic_inc_and_test(volatile atomic_t *v)
123 return retval; 123 return retval;
124} 124}
125 125
126static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
127{
128 int ret;
129 unsigned long flags;
130
131 cris_atomic_save(v, flags);
132 ret = v->counter;
133 if (likely(ret == old))
134 v->counter = new;
135 cris_atomic_restore(v, flags);
136 return ret;
137}
138
139static inline int atomic_add_unless(atomic_t *v, int a, int u)
140{
141 int ret;
142 unsigned long flags;
143
144 cris_atomic_save(v, flags);
145 ret = v->counter;
146 if (ret != u)
147 v->counter += a;
148 cris_atomic_restore(v, flags);
149 return ret != u;
150}
151#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
152
126/* Atomic operations are already serializing */ 153/* Atomic operations are already serializing */
127#define smp_mb__before_atomic_dec() barrier() 154#define smp_mb__before_atomic_dec() barrier()
128#define smp_mb__after_atomic_dec() barrier() 155#define smp_mb__after_atomic_dec() barrier()
diff --git a/include/asm-frv/atomic.h b/include/asm-frv/atomic.h
index e75968463428..f6539ff569c5 100644
--- a/include/asm-frv/atomic.h
+++ b/include/asm-frv/atomic.h
@@ -414,4 +414,16 @@ extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
414 414
415#endif 415#endif
416 416
417#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new))
418
419#define atomic_add_unless(v, a, u) \
420({ \
421 int c, old; \
422 c = atomic_read(v); \
423 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
424 c = old; \
425 c != (u); \
426})
427#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
428
417#endif /* _ASM_ATOMIC_H */ 429#endif /* _ASM_ATOMIC_H */
diff --git a/include/asm-frv/hardirq.h b/include/asm-frv/hardirq.h
index 5248ca054909..685123981e8b 100644
--- a/include/asm-frv/hardirq.h
+++ b/include/asm-frv/hardirq.h
@@ -14,6 +14,7 @@
14 14
15#include <linux/config.h> 15#include <linux/config.h>
16#include <linux/threads.h> 16#include <linux/threads.h>
17#include <linux/irq.h>
17 18
18typedef struct { 19typedef struct {
19 unsigned int __softirq_pending; 20 unsigned int __softirq_pending;
diff --git a/include/asm-frv/ide.h b/include/asm-frv/ide.h
index f9caecf7e3c0..ae031eaa3dd2 100644
--- a/include/asm-frv/ide.h
+++ b/include/asm-frv/ide.h
@@ -33,10 +33,10 @@
33/* 33/*
34 * some bits needed for parts of the IDE subsystem to compile 34 * some bits needed for parts of the IDE subsystem to compile
35 */ 35 */
36#define __ide_mm_insw(port, addr, n) insw(port, addr, n) 36#define __ide_mm_insw(port, addr, n) insw((unsigned long) (port), addr, n)
37#define __ide_mm_insl(port, addr, n) insl(port, addr, n) 37#define __ide_mm_insl(port, addr, n) insl((unsigned long) (port), addr, n)
38#define __ide_mm_outsw(port, addr, n) outsw(port, addr, n) 38#define __ide_mm_outsw(port, addr, n) outsw((unsigned long) (port), addr, n)
39#define __ide_mm_outsl(port, addr, n) outsl(port, addr, n) 39#define __ide_mm_outsl(port, addr, n) outsl((unsigned long) (port), addr, n)
40 40
41 41
42#endif /* __KERNEL__ */ 42#endif /* __KERNEL__ */
diff --git a/include/asm-frv/page.h b/include/asm-frv/page.h
index 4feba567e7fd..b8221b611b5c 100644
--- a/include/asm-frv/page.h
+++ b/include/asm-frv/page.h
@@ -47,8 +47,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
47 47
48#define devmem_is_allowed(pfn) 1 48#define devmem_is_allowed(pfn) 1
49 49
50#define __pa(vaddr) virt_to_phys((void *) vaddr) 50#define __pa(vaddr) virt_to_phys((void *) (unsigned long) (vaddr))
51#define __va(paddr) phys_to_virt((unsigned long) paddr) 51#define __va(paddr) phys_to_virt((unsigned long) (paddr))
52 52
53#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 53#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
54 54
diff --git a/include/asm-frv/semaphore.h b/include/asm-frv/semaphore.h
index b18396288df1..907c5c3643cc 100644
--- a/include/asm-frv/semaphore.h
+++ b/include/asm-frv/semaphore.h
@@ -20,7 +20,7 @@
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <linux/rwsem.h> 21#include <linux/rwsem.h>
22 22
23#define SEMAPHORE_DEBUG WAITQUEUE_DEBUG 23#define SEMAPHORE_DEBUG 0
24 24
25/* 25/*
26 * the semaphore definition 26 * the semaphore definition
diff --git a/include/asm-frv/thread_info.h b/include/asm-frv/thread_info.h
index c8cba7836f0d..60f6b2aee76d 100644
--- a/include/asm-frv/thread_info.h
+++ b/include/asm-frv/thread_info.h
@@ -58,7 +58,7 @@ struct thread_info {
58 58
59#endif 59#endif
60 60
61#define PREEMPT_ACTIVE 0x4000000 61#define PREEMPT_ACTIVE 0x10000000
62 62
63/* 63/*
64 * macros/functions for gaining access to the thread information structure 64 * macros/functions for gaining access to the thread information structure
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index 886dbd116899..0b49f9e070f1 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -13,5 +13,6 @@ extern char _eextratext[] __attribute__((weak));
13extern char _end[]; 13extern char _end[];
14extern char __per_cpu_start[], __per_cpu_end[]; 14extern char __per_cpu_start[], __per_cpu_end[];
15extern char __kprobes_text_start[], __kprobes_text_end[]; 15extern char __kprobes_text_start[], __kprobes_text_end[];
16extern char __initdata_begin[], __initdata_end[];
16 17
17#endif /* _ASM_GENERIC_SECTIONS_H_ */ 18#endif /* _ASM_GENERIC_SECTIONS_H_ */
diff --git a/include/asm-h8300/atomic.h b/include/asm-h8300/atomic.h
index 7230f6507995..f23d86819ea8 100644
--- a/include/asm-h8300/atomic.h
+++ b/include/asm-h8300/atomic.h
@@ -82,6 +82,33 @@ static __inline__ int atomic_dec_and_test(atomic_t *v)
82 return ret == 0; 82 return ret == 0;
83} 83}
84 84
85static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
86{
87 int ret;
88 unsigned long flags;
89
90 local_irq_save(flags);
91 ret = v->counter;
92 if (likely(ret == old))
93 v->counter = new;
94 local_irq_restore(flags);
95 return ret;
96}
97
98static inline int atomic_add_unless(atomic_t *v, int a, int u)
99{
100 int ret;
101 unsigned long flags;
102
103 local_irq_save(flags);
104 ret = v->counter;
105 if (ret != u)
106 v->counter += a;
107 local_irq_restore(flags);
108 return ret != u;
109}
110#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
111
85static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v) 112static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v)
86{ 113{
87 __asm__ __volatile__("stc ccr,r1l\n\t" 114 __asm__ __volatile__("stc ccr,r1l\n\t"
diff --git a/include/asm-i386/atomic.h b/include/asm-i386/atomic.h
index 509720be772a..c68557aa04b2 100644
--- a/include/asm-i386/atomic.h
+++ b/include/asm-i386/atomic.h
@@ -215,6 +215,27 @@ static __inline__ int atomic_sub_return(int i, atomic_t *v)
215 return atomic_add_return(-i,v); 215 return atomic_add_return(-i,v);
216} 216}
217 217
218#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new))
219
220/**
221 * atomic_add_unless - add unless the number is a given value
222 * @v: pointer of type atomic_t
223 * @a: the amount to add to v...
224 * @u: ...unless v is equal to u.
225 *
226 * Atomically adds @a to @v, so long as it was not @u.
227 * Returns non-zero if @v was not @u, and zero otherwise.
228 */
229#define atomic_add_unless(v, a, u) \
230({ \
231 int c, old; \
232 c = atomic_read(v); \
233 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
234 c = old; \
235 c != (u); \
236})
237#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
238
218#define atomic_inc_return(v) (atomic_add_return(1,v)) 239#define atomic_inc_return(v) (atomic_add_return(1,v))
219#define atomic_dec_return(v) (atomic_sub_return(1,v)) 240#define atomic_dec_return(v) (atomic_sub_return(1,v))
220 241
diff --git a/include/asm-i386/mach-default/mach_reboot.h b/include/asm-i386/mach-default/mach_reboot.h
index 06ae4d81ba6a..a955e57ad016 100644
--- a/include/asm-i386/mach-default/mach_reboot.h
+++ b/include/asm-i386/mach-default/mach_reboot.h
@@ -19,7 +19,7 @@ static inline void kb_wait(void)
19static inline void mach_reboot(void) 19static inline void mach_reboot(void)
20{ 20{
21 int i; 21 int i;
22 for (i = 0; i < 100; i++) { 22 for (i = 0; i < 10; i++) {
23 kb_wait(); 23 kb_wait();
24 udelay(50); 24 udelay(50);
25 outb(0x60, 0x64); /* write Controller Command Byte */ 25 outb(0x60, 0x64); /* write Controller Command Byte */
diff --git a/include/asm-i386/msi.h b/include/asm-i386/msi.h
index b85393094c83..f041d4495faf 100644
--- a/include/asm-i386/msi.h
+++ b/include/asm-i386/msi.h
@@ -10,13 +10,6 @@
10#include <mach_apic.h> 10#include <mach_apic.h>
11 11
12#define LAST_DEVICE_VECTOR 232 12#define LAST_DEVICE_VECTOR 232
13#define MSI_DEST_MODE MSI_LOGICAL_MODE 13#define MSI_TARGET_CPU_SHIFT 12
14#define MSI_TARGET_CPU_SHIFT 12
15
16#ifdef CONFIG_SMP
17#define MSI_TARGET_CPU logical_smp_processor_id()
18#else
19#define MSI_TARGET_CPU cpu_to_logical_apicid(first_cpu(cpu_online_map))
20#endif
21 14
22#endif /* ASM_MSI_H */ 15#endif /* ASM_MSI_H */
diff --git a/include/asm-i386/param.h b/include/asm-i386/param.h
index fa02e67ea86b..095580f3a45c 100644
--- a/include/asm-i386/param.h
+++ b/include/asm-i386/param.h
@@ -1,9 +1,8 @@
1#include <linux/config.h>
2
3#ifndef _ASMi386_PARAM_H 1#ifndef _ASMi386_PARAM_H
4#define _ASMi386_PARAM_H 2#define _ASMi386_PARAM_H
5 3
6#ifdef __KERNEL__ 4#ifdef __KERNEL__
5# include <linux/config.h>
7# define HZ CONFIG_HZ /* Internal kernel timer frequency */ 6# define HZ CONFIG_HZ /* Internal kernel timer frequency */
8# define USER_HZ 100 /* .. some user interfaces are in "ticks" */ 7# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
9# define CLOCKS_PER_SEC (USER_HZ) /* like times() */ 8# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 8c02b0318703..5c96cf6dcb39 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -65,7 +65,9 @@ struct cpuinfo_x86 {
65 int f00f_bug; 65 int f00f_bug;
66 int coma_bug; 66 int coma_bug;
67 unsigned long loops_per_jiffy; 67 unsigned long loops_per_jiffy;
68 unsigned char x86_num_cores; 68 unsigned char x86_max_cores; /* cpuid returned max cores value */
69 unsigned char booted_cores; /* number of cores as seen by OS */
70 unsigned char apicid;
69} __attribute__((__aligned__(SMP_CACHE_BYTES))); 71} __attribute__((__aligned__(SMP_CACHE_BYTES)));
70 72
71#define X86_VENDOR_INTEL 0 73#define X86_VENDOR_INTEL 0
diff --git a/include/asm-i386/signal.h b/include/asm-i386/signal.h
index cbb47d34aa31..76524b4052ac 100644
--- a/include/asm-i386/signal.h
+++ b/include/asm-i386/signal.h
@@ -159,14 +159,37 @@ typedef struct sigaltstack {
159 159
160#define __HAVE_ARCH_SIG_BITOPS 160#define __HAVE_ARCH_SIG_BITOPS
161 161
162static __inline__ void sigaddset(sigset_t *set, int _sig) 162#define sigaddset(set,sig) \
163 (__builtin_constant_p(sig) ? \
164 __const_sigaddset((set),(sig)) : \
165 __gen_sigaddset((set),(sig)))
166
167static __inline__ void __gen_sigaddset(sigset_t *set, int _sig)
163{ 168{
164 __asm__("btsl %1,%0" : "=m"(*set) : "Ir"(_sig - 1) : "cc"); 169 __asm__("btsl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc");
165} 170}
166 171
167static __inline__ void sigdelset(sigset_t *set, int _sig) 172static __inline__ void __const_sigaddset(sigset_t *set, int _sig)
168{ 173{
169 __asm__("btrl %1,%0" : "=m"(*set) : "Ir"(_sig - 1) : "cc"); 174 unsigned long sig = _sig - 1;
175 set->sig[sig / _NSIG_BPW] |= 1 << (sig % _NSIG_BPW);
176}
177
178#define sigdelset(set,sig) \
179 (__builtin_constant_p(sig) ? \
180 __const_sigdelset((set),(sig)) : \
181 __gen_sigdelset((set),(sig)))
182
183
184static __inline__ void __gen_sigdelset(sigset_t *set, int _sig)
185{
186 __asm__("btrl %1,%0" : "+m"(*set) : "Ir"(_sig - 1) : "cc");
187}
188
189static __inline__ void __const_sigdelset(sigset_t *set, int _sig)
190{
191 unsigned long sig = _sig - 1;
192 set->sig[sig / _NSIG_BPW] &= ~(1 << (sig % _NSIG_BPW));
170} 193}
171 194
172static __inline__ int __const_sigismember(sigset_t *set, int _sig) 195static __inline__ int __const_sigismember(sigset_t *set, int _sig)
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index 13250199976d..61d3ab9db70c 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -45,6 +45,8 @@ extern void unlock_ipi_call_lock(void);
45#define MAX_APICID 256 45#define MAX_APICID 256
46extern u8 x86_cpu_to_apicid[]; 46extern u8 x86_cpu_to_apicid[];
47 47
48#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
49
48#ifdef CONFIG_HOTPLUG_CPU 50#ifdef CONFIG_HOTPLUG_CPU
49extern void cpu_exit_clear(void); 51extern void cpu_exit_clear(void);
50extern void cpu_uninit(void); 52extern void cpu_uninit(void);
@@ -92,6 +94,10 @@ extern int __cpu_disable(void);
92extern void __cpu_die(unsigned int cpu); 94extern void __cpu_die(unsigned int cpu);
93#endif /* !__ASSEMBLY__ */ 95#endif /* !__ASSEMBLY__ */
94 96
97#else /* CONFIG_SMP */
98
99#define cpu_physical_id(cpu) boot_cpu_physical_apicid
100
95#define NO_PROC_ID 0xFF /* No processor magic marker */ 101#define NO_PROC_ID 0xFF /* No processor magic marker */
96 102
97#endif 103#endif
diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h
index 97d52ac49e46..772f85da1206 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-i386/system.h
@@ -263,6 +263,10 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
263 263
264#ifdef CONFIG_X86_CMPXCHG 264#ifdef CONFIG_X86_CMPXCHG
265#define __HAVE_ARCH_CMPXCHG 1 265#define __HAVE_ARCH_CMPXCHG 1
266#define cmpxchg(ptr,o,n)\
267 ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
268 (unsigned long)(n),sizeof(*(ptr))))
269#endif
266 270
267static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, 271static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
268 unsigned long new, int size) 272 unsigned long new, int size)
@@ -291,10 +295,42 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
291 return old; 295 return old;
292} 296}
293 297
294#define cmpxchg(ptr,o,n)\ 298#ifndef CONFIG_X86_CMPXCHG
295 ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\ 299/*
296 (unsigned long)(n),sizeof(*(ptr)))) 300 * Building a kernel capable running on 80386. It may be necessary to
301 * simulate the cmpxchg on the 80386 CPU. For that purpose we define
302 * a function for each of the sizes we support.
303 */
297 304
305extern unsigned long cmpxchg_386_u8(volatile void *, u8, u8);
306extern unsigned long cmpxchg_386_u16(volatile void *, u16, u16);
307extern unsigned long cmpxchg_386_u32(volatile void *, u32, u32);
308
309static inline unsigned long cmpxchg_386(volatile void *ptr, unsigned long old,
310 unsigned long new, int size)
311{
312 switch (size) {
313 case 1:
314 return cmpxchg_386_u8(ptr, old, new);
315 case 2:
316 return cmpxchg_386_u16(ptr, old, new);
317 case 4:
318 return cmpxchg_386_u32(ptr, old, new);
319 }
320 return old;
321}
322
323#define cmpxchg(ptr,o,n) \
324({ \
325 __typeof__(*(ptr)) __ret; \
326 if (likely(boot_cpu_data.x86 > 3)) \
327 __ret = __cmpxchg((ptr), (unsigned long)(o), \
328 (unsigned long)(n), sizeof(*(ptr))); \
329 else \
330 __ret = cmpxchg_386((ptr), (unsigned long)(o), \
331 (unsigned long)(n), sizeof(*(ptr))); \
332 __ret; \
333})
298#endif 334#endif
299 335
300#ifdef CONFIG_X86_CMPXCHG64 336#ifdef CONFIG_X86_CMPXCHG64
diff --git a/include/asm-ia64/atomic.h b/include/asm-ia64/atomic.h
index 874a6f890e75..2fbebf85c31d 100644
--- a/include/asm-ia64/atomic.h
+++ b/include/asm-ia64/atomic.h
@@ -88,6 +88,18 @@ ia64_atomic64_sub (__s64 i, atomic64_t *v)
88 return new; 88 return new;
89} 89}
90 90
91#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new))
92
93#define atomic_add_unless(v, a, u) \
94({ \
95 int c, old; \
96 c = atomic_read(v); \
97 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
98 c = old; \
99 c != (u); \
100})
101#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
102
91#define atomic_add_return(i,v) \ 103#define atomic_add_return(i,v) \
92({ \ 104({ \
93 int __ia64_aar_i = (i); \ 105 int __ia64_aar_i = (i); \
diff --git a/include/asm-ia64/delay.h b/include/asm-ia64/delay.h
index 57182d6f2b9a..bba702076391 100644
--- a/include/asm-ia64/delay.h
+++ b/include/asm-ia64/delay.h
@@ -84,14 +84,6 @@ __delay (unsigned long loops)
84 ia64_delay_loop (loops - 1); 84 ia64_delay_loop (loops - 1);
85} 85}
86 86
87static __inline__ void 87extern void udelay (unsigned long usecs);
88udelay (unsigned long usecs)
89{
90 unsigned long start = ia64_get_itc();
91 unsigned long cycles = usecs*local_cpu_data->cyc_per_usec;
92
93 while (ia64_get_itc() - start < cycles)
94 cpu_relax();
95}
96 88
97#endif /* _ASM_IA64_DELAY_H */ 89#endif /* _ASM_IA64_DELAY_H */
diff --git a/include/asm-ia64/ia32.h b/include/asm-ia64/ia32.h
index 8e746b2413a6..f8044a1169cd 100644
--- a/include/asm-ia64/ia32.h
+++ b/include/asm-ia64/ia32.h
@@ -13,6 +13,8 @@
13 13
14# ifdef CONFIG_IA32_SUPPORT 14# ifdef CONFIG_IA32_SUPPORT
15 15
16#define IA32_PAGE_OFFSET 0xc0000000
17
16extern void ia32_cpu_init (void); 18extern void ia32_cpu_init (void);
17extern void ia32_mem_init (void); 19extern void ia32_mem_init (void);
18extern void ia32_gdt_init (void); 20extern void ia32_gdt_init (void);
diff --git a/include/asm-ia64/kdebug.h b/include/asm-ia64/kdebug.h
index 4d376e1663f7..8b01a083dde6 100644
--- a/include/asm-ia64/kdebug.h
+++ b/include/asm-ia64/kdebug.h
@@ -22,6 +22,9 @@
22 * 2005-Apr Rusty Lynch <rusty.lynch@intel.com> and Anil S Keshavamurthy 22 * 2005-Apr Rusty Lynch <rusty.lynch@intel.com> and Anil S Keshavamurthy
23 * <anil.s.keshavamurthy@intel.com> adopted from 23 * <anil.s.keshavamurthy@intel.com> adopted from
24 * include/asm-x86_64/kdebug.h 24 * include/asm-x86_64/kdebug.h
25 *
26 * 2005-Oct Keith Owens <kaos@sgi.com>. Expand notify_die to cover more
27 * events.
25 */ 28 */
26#include <linux/notifier.h> 29#include <linux/notifier.h>
27 30
@@ -35,13 +38,36 @@ struct die_args {
35 int signr; 38 int signr;
36}; 39};
37 40
38int register_die_notifier(struct notifier_block *nb); 41extern int register_die_notifier(struct notifier_block *);
42extern int unregister_die_notifier(struct notifier_block *);
39extern struct notifier_block *ia64die_chain; 43extern struct notifier_block *ia64die_chain;
40 44
41enum die_val { 45enum die_val {
42 DIE_BREAK = 1, 46 DIE_BREAK = 1,
43 DIE_SS, 47 DIE_FAULT,
48 DIE_OOPS,
44 DIE_PAGE_FAULT, 49 DIE_PAGE_FAULT,
50 DIE_MACHINE_HALT,
51 DIE_MACHINE_RESTART,
52 DIE_MCA_MONARCH_ENTER,
53 DIE_MCA_MONARCH_PROCESS,
54 DIE_MCA_MONARCH_LEAVE,
55 DIE_MCA_SLAVE_ENTER,
56 DIE_MCA_SLAVE_PROCESS,
57 DIE_MCA_SLAVE_LEAVE,
58 DIE_MCA_RENDZVOUS_ENTER,
59 DIE_MCA_RENDZVOUS_PROCESS,
60 DIE_MCA_RENDZVOUS_LEAVE,
61 DIE_INIT_MONARCH_ENTER,
62 DIE_INIT_MONARCH_PROCESS,
63 DIE_INIT_MONARCH_LEAVE,
64 DIE_INIT_SLAVE_ENTER,
65 DIE_INIT_SLAVE_PROCESS,
66 DIE_INIT_SLAVE_LEAVE,
67 DIE_KDEBUG_ENTER,
68 DIE_KDEBUG_LEAVE,
69 DIE_KDUMP_ENTER,
70 DIE_KDUMP_LEAVE,
45}; 71};
46 72
47static inline int notify_die(enum die_val val, char *str, struct pt_regs *regs, 73static inline int notify_die(enum die_val val, char *str, struct pt_regs *regs,
diff --git a/include/asm-ia64/local.h b/include/asm-ia64/local.h
index 1dbd584ad851..dc519092ef4d 100644
--- a/include/asm-ia64/local.h
+++ b/include/asm-ia64/local.h
@@ -17,8 +17,8 @@ typedef struct {
17#define local_set(l, i) atomic64_set(&(l)->val, i) 17#define local_set(l, i) atomic64_set(&(l)->val, i)
18#define local_inc(l) atomic64_inc(&(l)->val) 18#define local_inc(l) atomic64_inc(&(l)->val)
19#define local_dec(l) atomic64_dec(&(l)->val) 19#define local_dec(l) atomic64_dec(&(l)->val)
20#define local_add(l) atomic64_add(&(l)->val) 20#define local_add(i, l) atomic64_add((i), &(l)->val)
21#define local_sub(l) atomic64_sub(&(l)->val) 21#define local_sub(i, l) atomic64_sub((i), &(l)->val)
22 22
23/* Non-atomic variants, i.e., preemption disabled and won't be touched in interrupt, etc. */ 23/* Non-atomic variants, i.e., preemption disabled and won't be touched in interrupt, etc. */
24 24
diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h
index 8d6e72f7b08e..b5c65081a3aa 100644
--- a/include/asm-ia64/mmu_context.h
+++ b/include/asm-ia64/mmu_context.h
@@ -7,12 +7,13 @@
7 */ 7 */
8 8
9/* 9/*
10 * Routines to manage the allocation of task context numbers. Task context numbers are 10 * Routines to manage the allocation of task context numbers. Task context
11 * used to reduce or eliminate the need to perform TLB flushes due to context switches. 11 * numbers are used to reduce or eliminate the need to perform TLB flushes
12 * Context numbers are implemented using ia-64 region ids. Since the IA-64 TLB does not 12 * due to context switches. Context numbers are implemented using ia-64
13 * consider the region number when performing a TLB lookup, we need to assign a unique 13 * region ids. Since the IA-64 TLB does not consider the region number when
14 * region id to each region in a process. We use the least significant three bits in a 14 * performing a TLB lookup, we need to assign a unique region id to each
15 * region id for this purpose. 15 * region in a process. We use the least significant three bits in aregion
16 * id for this purpose.
16 */ 17 */
17 18
18#define IA64_REGION_ID_KERNEL 0 /* the kernel's region id (tlb.c depends on this being 0) */ 19#define IA64_REGION_ID_KERNEL 0 /* the kernel's region id (tlb.c depends on this being 0) */
@@ -32,13 +33,17 @@
32struct ia64_ctx { 33struct ia64_ctx {
33 spinlock_t lock; 34 spinlock_t lock;
34 unsigned int next; /* next context number to use */ 35 unsigned int next; /* next context number to use */
35 unsigned int limit; /* next >= limit => must call wrap_mmu_context() */ 36 unsigned int limit; /* available free range */
36 unsigned int max_ctx; /* max. context value supported by all CPUs */ 37 unsigned int max_ctx; /* max. context value supported by all CPUs */
38 /* call wrap_mmu_context when next >= max */
39 unsigned long *bitmap; /* bitmap size is max_ctx+1 */
40 unsigned long *flushmap;/* pending rid to be flushed */
37}; 41};
38 42
39extern struct ia64_ctx ia64_ctx; 43extern struct ia64_ctx ia64_ctx;
40DECLARE_PER_CPU(u8, ia64_need_tlb_flush); 44DECLARE_PER_CPU(u8, ia64_need_tlb_flush);
41 45
46extern void mmu_context_init (void);
42extern void wrap_mmu_context (struct mm_struct *mm); 47extern void wrap_mmu_context (struct mm_struct *mm);
43 48
44static inline void 49static inline void
@@ -47,10 +52,10 @@ enter_lazy_tlb (struct mm_struct *mm, struct task_struct *tsk)
47} 52}
48 53
49/* 54/*
50 * When the context counter wraps around all TLBs need to be flushed because an old 55 * When the context counter wraps around all TLBs need to be flushed because
51 * context number might have been reused. This is signalled by the ia64_need_tlb_flush 56 * an old context number might have been reused. This is signalled by the
52 * per-CPU variable, which is checked in the routine below. Called by activate_mm(). 57 * ia64_need_tlb_flush per-CPU variable, which is checked in the routine
53 * <efocht@ess.nec.de> 58 * below. Called by activate_mm(). <efocht@ess.nec.de>
54 */ 59 */
55static inline void 60static inline void
56delayed_tlb_flush (void) 61delayed_tlb_flush (void)
@@ -60,11 +65,9 @@ delayed_tlb_flush (void)
60 65
61 if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) { 66 if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) {
62 spin_lock_irqsave(&ia64_ctx.lock, flags); 67 spin_lock_irqsave(&ia64_ctx.lock, flags);
63 { 68 if (__ia64_per_cpu_var(ia64_need_tlb_flush)) {
64 if (__ia64_per_cpu_var(ia64_need_tlb_flush)) { 69 local_flush_tlb_all();
65 local_flush_tlb_all(); 70 __ia64_per_cpu_var(ia64_need_tlb_flush) = 0;
66 __ia64_per_cpu_var(ia64_need_tlb_flush) = 0;
67 }
68 } 71 }
69 spin_unlock_irqrestore(&ia64_ctx.lock, flags); 72 spin_unlock_irqrestore(&ia64_ctx.lock, flags);
70 } 73 }
@@ -76,20 +79,27 @@ get_mmu_context (struct mm_struct *mm)
76 unsigned long flags; 79 unsigned long flags;
77 nv_mm_context_t context = mm->context; 80 nv_mm_context_t context = mm->context;
78 81
79 if (unlikely(!context)) { 82 if (likely(context))
80 spin_lock_irqsave(&ia64_ctx.lock, flags); 83 goto out;
81 { 84
82 /* re-check, now that we've got the lock: */ 85 spin_lock_irqsave(&ia64_ctx.lock, flags);
83 context = mm->context; 86 /* re-check, now that we've got the lock: */
84 if (context == 0) { 87 context = mm->context;
85 cpus_clear(mm->cpu_vm_mask); 88 if (context == 0) {
86 if (ia64_ctx.next >= ia64_ctx.limit) 89 cpus_clear(mm->cpu_vm_mask);
87 wrap_mmu_context(mm); 90 if (ia64_ctx.next >= ia64_ctx.limit) {
88 mm->context = context = ia64_ctx.next++; 91 ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap,
89 } 92 ia64_ctx.max_ctx, ia64_ctx.next);
93 ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap,
94 ia64_ctx.max_ctx, ia64_ctx.next);
95 if (ia64_ctx.next >= ia64_ctx.max_ctx)
96 wrap_mmu_context(mm);
90 } 97 }
91 spin_unlock_irqrestore(&ia64_ctx.lock, flags); 98 mm->context = context = ia64_ctx.next++;
99 __set_bit(context, ia64_ctx.bitmap);
92 } 100 }
101 spin_unlock_irqrestore(&ia64_ctx.lock, flags);
102out:
93 /* 103 /*
94 * Ensure we're not starting to use "context" before any old 104 * Ensure we're not starting to use "context" before any old
95 * uses of it are gone from our TLB. 105 * uses of it are gone from our TLB.
@@ -100,8 +110,8 @@ get_mmu_context (struct mm_struct *mm)
100} 110}
101 111
102/* 112/*
103 * Initialize context number to some sane value. MM is guaranteed to be a brand-new 113 * Initialize context number to some sane value. MM is guaranteed to be a
104 * address-space, so no TLB flushing is needed, ever. 114 * brand-new address-space, so no TLB flushing is needed, ever.
105 */ 115 */
106static inline int 116static inline int
107init_new_context (struct task_struct *p, struct mm_struct *mm) 117init_new_context (struct task_struct *p, struct mm_struct *mm)
@@ -162,7 +172,10 @@ activate_context (struct mm_struct *mm)
162 if (!cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) 172 if (!cpu_isset(smp_processor_id(), mm->cpu_vm_mask))
163 cpu_set(smp_processor_id(), mm->cpu_vm_mask); 173 cpu_set(smp_processor_id(), mm->cpu_vm_mask);
164 reload_context(context); 174 reload_context(context);
165 /* in the unlikely event of a TLB-flush by another thread, redo the load: */ 175 /*
176 * in the unlikely event of a TLB-flush by another thread,
177 * redo the load.
178 */
166 } while (unlikely(context != mm->context)); 179 } while (unlikely(context != mm->context));
167} 180}
168 181
@@ -175,8 +188,8 @@ static inline void
175activate_mm (struct mm_struct *prev, struct mm_struct *next) 188activate_mm (struct mm_struct *prev, struct mm_struct *next)
176{ 189{
177 /* 190 /*
178 * We may get interrupts here, but that's OK because interrupt handlers cannot 191 * We may get interrupts here, but that's OK because interrupt
179 * touch user-space. 192 * handlers cannot touch user-space.
180 */ 193 */
181 ia64_set_kr(IA64_KR_PT_BASE, __pa(next->pgd)); 194 ia64_set_kr(IA64_KR_PT_BASE, __pa(next->pgd));
182 activate_context(next); 195 activate_context(next);
diff --git a/include/asm-ia64/msi.h b/include/asm-ia64/msi.h
index 60f2137f9278..97890f7762b3 100644
--- a/include/asm-ia64/msi.h
+++ b/include/asm-ia64/msi.h
@@ -12,9 +12,6 @@
12static inline void set_intr_gate (int nr, void *func) {} 12static inline void set_intr_gate (int nr, void *func) {}
13#define IO_APIC_VECTOR(irq) (irq) 13#define IO_APIC_VECTOR(irq) (irq)
14#define ack_APIC_irq ia64_eoi 14#define ack_APIC_irq ia64_eoi
15#define cpu_mask_to_apicid(mask) cpu_physical_id(first_cpu(mask))
16#define MSI_DEST_MODE MSI_PHYSICAL_MODE
17#define MSI_TARGET_CPU ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff)
18#define MSI_TARGET_CPU_SHIFT 4 15#define MSI_TARGET_CPU_SHIFT 4
19 16
20#endif /* ASM_MSI_H */ 17#endif /* ASM_MSI_H */
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 9d41548b7fef..5e6362a786b7 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -47,8 +47,6 @@
47#define PERCPU_PAGE_SHIFT 16 /* log2() of max. size of per-CPU area */ 47#define PERCPU_PAGE_SHIFT 16 /* log2() of max. size of per-CPU area */
48#define PERCPU_PAGE_SIZE (__IA64_UL_CONST(1) << PERCPU_PAGE_SHIFT) 48#define PERCPU_PAGE_SIZE (__IA64_UL_CONST(1) << PERCPU_PAGE_SHIFT)
49 49
50#define RGN_MAP_LIMIT ((1UL << (4*PAGE_SHIFT - 12)) - PAGE_SIZE) /* per region addr limit */
51
52 50
53#ifdef CONFIG_HUGETLB_PAGE 51#ifdef CONFIG_HUGETLB_PAGE
54# define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE) 52# define HPAGE_REGION_BASE RGN_BASE(RGN_HPAGE)
@@ -112,8 +110,9 @@ extern int ia64_pfn_valid (unsigned long pfn);
112# define pfn_to_page(pfn) (mem_map + (pfn)) 110# define pfn_to_page(pfn) (mem_map + (pfn))
113#elif defined(CONFIG_DISCONTIGMEM) 111#elif defined(CONFIG_DISCONTIGMEM)
114extern struct page *vmem_map; 112extern struct page *vmem_map;
113extern unsigned long min_low_pfn;
115extern unsigned long max_low_pfn; 114extern unsigned long max_low_pfn;
116# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn)) 115# define pfn_valid(pfn) (((pfn) >= min_low_pfn) && ((pfn) < max_low_pfn) && ia64_pfn_valid(pfn))
117# define page_to_pfn(page) ((unsigned long) (page - vmem_map)) 116# define page_to_pfn(page) ((unsigned long) (page - vmem_map))
118# define pfn_to_page(pfn) (vmem_map + (pfn)) 117# define pfn_to_page(pfn) (vmem_map + (pfn))
119#endif 118#endif
@@ -175,11 +174,17 @@ get_order (unsigned long size)
175 */ 174 */
176 typedef struct { unsigned long pte; } pte_t; 175 typedef struct { unsigned long pte; } pte_t;
177 typedef struct { unsigned long pmd; } pmd_t; 176 typedef struct { unsigned long pmd; } pmd_t;
177#ifdef CONFIG_PGTABLE_4
178 typedef struct { unsigned long pud; } pud_t;
179#endif
178 typedef struct { unsigned long pgd; } pgd_t; 180 typedef struct { unsigned long pgd; } pgd_t;
179 typedef struct { unsigned long pgprot; } pgprot_t; 181 typedef struct { unsigned long pgprot; } pgprot_t;
180 182
181# define pte_val(x) ((x).pte) 183# define pte_val(x) ((x).pte)
182# define pmd_val(x) ((x).pmd) 184# define pmd_val(x) ((x).pmd)
185#ifdef CONFIG_PGTABLE_4
186# define pud_val(x) ((x).pud)
187#endif
183# define pgd_val(x) ((x).pgd) 188# define pgd_val(x) ((x).pgd)
184# define pgprot_val(x) ((x).pgprot) 189# define pgprot_val(x) ((x).pgprot)
185 190
diff --git a/include/asm-ia64/pgalloc.h b/include/asm-ia64/pgalloc.h
index a5f214554afd..f2f233846476 100644
--- a/include/asm-ia64/pgalloc.h
+++ b/include/asm-ia64/pgalloc.h
@@ -86,6 +86,25 @@ static inline void pgd_free(pgd_t * pgd)
86 pgtable_quicklist_free(pgd); 86 pgtable_quicklist_free(pgd);
87} 87}
88 88
89#ifdef CONFIG_PGTABLE_4
90static inline void
91pgd_populate(struct mm_struct *mm, pgd_t * pgd_entry, pud_t * pud)
92{
93 pgd_val(*pgd_entry) = __pa(pud);
94}
95
96static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
97{
98 return pgtable_quicklist_alloc();
99}
100
101static inline void pud_free(pud_t * pud)
102{
103 pgtable_quicklist_free(pud);
104}
105#define __pud_free_tlb(tlb, pud) pud_free(pud)
106#endif /* CONFIG_PGTABLE_4 */
107
89static inline void 108static inline void
90pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd) 109pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd)
91{ 110{
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index c34ba80c1c31..e2560c58384b 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -84,32 +84,55 @@
84#define __DIRTY_BITS _PAGE_ED | __DIRTY_BITS_NO_ED 84#define __DIRTY_BITS _PAGE_ED | __DIRTY_BITS_NO_ED
85 85
86/* 86/*
87 * Definitions for first level: 87 * How many pointers will a page table level hold expressed in shift
88 *
89 * PGDIR_SHIFT determines what a first-level page table entry can map.
90 */ 88 */
91#define PGDIR_SHIFT (PAGE_SHIFT + 2*(PAGE_SHIFT-3)) 89#define PTRS_PER_PTD_SHIFT (PAGE_SHIFT-3)
92#define PGDIR_SIZE (__IA64_UL(1) << PGDIR_SHIFT)
93#define PGDIR_MASK (~(PGDIR_SIZE-1))
94#define PTRS_PER_PGD (1UL << (PAGE_SHIFT-3))
95#define USER_PTRS_PER_PGD (5*PTRS_PER_PGD/8) /* regions 0-4 are user regions */
96#define FIRST_USER_ADDRESS 0
97 90
98/* 91/*
99 * Definitions for second level: 92 * Definitions for fourth level:
93 */
94#define PTRS_PER_PTE (__IA64_UL(1) << (PTRS_PER_PTD_SHIFT))
95
96/*
97 * Definitions for third level:
100 * 98 *
101 * PMD_SHIFT determines the size of the area a second-level page table 99 * PMD_SHIFT determines the size of the area a third-level page table
102 * can map. 100 * can map.
103 */ 101 */
104#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) 102#define PMD_SHIFT (PAGE_SHIFT + (PTRS_PER_PTD_SHIFT))
105#define PMD_SIZE (1UL << PMD_SHIFT) 103#define PMD_SIZE (1UL << PMD_SHIFT)
106#define PMD_MASK (~(PMD_SIZE-1)) 104#define PMD_MASK (~(PMD_SIZE-1))
107#define PTRS_PER_PMD (1UL << (PAGE_SHIFT-3)) 105#define PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT))
108 106
107#ifdef CONFIG_PGTABLE_4
109/* 108/*
110 * Definitions for third level: 109 * Definitions for second level:
110 *
111 * PUD_SHIFT determines the size of the area a second-level page table
112 * can map.
111 */ 113 */
112#define PTRS_PER_PTE (__IA64_UL(1) << (PAGE_SHIFT-3)) 114#define PUD_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT))
115#define PUD_SIZE (1UL << PUD_SHIFT)
116#define PUD_MASK (~(PUD_SIZE-1))
117#define PTRS_PER_PUD (1UL << (PTRS_PER_PTD_SHIFT))
118#endif
119
120/*
121 * Definitions for first level:
122 *
123 * PGDIR_SHIFT determines what a first-level page table entry can map.
124 */
125#ifdef CONFIG_PGTABLE_4
126#define PGDIR_SHIFT (PUD_SHIFT + (PTRS_PER_PTD_SHIFT))
127#else
128#define PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT))
129#endif
130#define PGDIR_SIZE (__IA64_UL(1) << PGDIR_SHIFT)
131#define PGDIR_MASK (~(PGDIR_SIZE-1))
132#define PTRS_PER_PGD_SHIFT PTRS_PER_PTD_SHIFT
133#define PTRS_PER_PGD (1UL << PTRS_PER_PGD_SHIFT)
134#define USER_PTRS_PER_PGD (5*PTRS_PER_PGD/8) /* regions 0-4 are user regions */
135#define FIRST_USER_ADDRESS 0
113 136
114/* 137/*
115 * All the normal masks have the "page accessed" bits on, as any time 138 * All the normal masks have the "page accessed" bits on, as any time
@@ -161,6 +184,9 @@
161#define __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX) 184#define __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX)
162 185
163#define pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) 186#define pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
187#ifdef CONFIG_PGTABLE_4
188#define pud_ERROR(e) printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e))
189#endif
164#define pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) 190#define pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
165#define pte_ERROR(e) printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e)) 191#define pte_ERROR(e) printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
166 192
@@ -218,6 +244,9 @@ ia64_phys_addr_valid (unsigned long addr)
218#define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE)) 244#define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE))
219#define kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE)) 245#define kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE))
220 246
247#define RGN_MAP_SHIFT (PGDIR_SHIFT + PTRS_PER_PGD_SHIFT - 3)
248#define RGN_MAP_LIMIT ((1UL << RGN_MAP_SHIFT) - PAGE_SIZE) /* per region addr limit */
249
221/* 250/*
222 * Conversion functions: convert page frame number (pfn) and a protection value to a page 251 * Conversion functions: convert page frame number (pfn) and a protection value to a page
223 * table entry (pte). 252 * table entry (pte).
@@ -254,9 +283,16 @@ ia64_phys_addr_valid (unsigned long addr)
254#define pud_bad(pud) (!ia64_phys_addr_valid(pud_val(pud))) 283#define pud_bad(pud) (!ia64_phys_addr_valid(pud_val(pud)))
255#define pud_present(pud) (pud_val(pud) != 0UL) 284#define pud_present(pud) (pud_val(pud) != 0UL)
256#define pud_clear(pudp) (pud_val(*(pudp)) = 0UL) 285#define pud_clear(pudp) (pud_val(*(pudp)) = 0UL)
257
258#define pud_page(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK)) 286#define pud_page(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK))
259 287
288#ifdef CONFIG_PGTABLE_4
289#define pgd_none(pgd) (!pgd_val(pgd))
290#define pgd_bad(pgd) (!ia64_phys_addr_valid(pgd_val(pgd)))
291#define pgd_present(pgd) (pgd_val(pgd) != 0UL)
292#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0UL)
293#define pgd_page(pgd) ((unsigned long) __va(pgd_val(pgd) & _PFN_MASK))
294#endif
295
260/* 296/*
261 * The following have defined behavior only work if pte_present() is true. 297 * The following have defined behavior only work if pte_present() is true.
262 */ 298 */
@@ -324,7 +360,13 @@ pgd_offset (struct mm_struct *mm, unsigned long address)
324 here. */ 360 here. */
325#define pgd_offset_gate(mm, addr) pgd_offset_k(addr) 361#define pgd_offset_gate(mm, addr) pgd_offset_k(addr)
326 362
363#ifdef CONFIG_PGTABLE_4
327/* Find an entry in the second-level page table.. */ 364/* Find an entry in the second-level page table.. */
365#define pud_offset(dir,addr) \
366 ((pud_t *) pgd_page(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)))
367#endif
368
369/* Find an entry in the third-level page table.. */
328#define pmd_offset(dir,addr) \ 370#define pmd_offset(dir,addr) \
329 ((pmd_t *) pud_page(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) 371 ((pmd_t *) pud_page(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
330 372
@@ -557,7 +599,9 @@ do { \
557#define __HAVE_ARCH_PGD_OFFSET_GATE 599#define __HAVE_ARCH_PGD_OFFSET_GATE
558#define __HAVE_ARCH_LAZY_MMU_PROT_UPDATE 600#define __HAVE_ARCH_LAZY_MMU_PROT_UPDATE
559 601
602#ifndef CONFIG_PGTABLE_4
560#include <asm-generic/pgtable-nopud.h> 603#include <asm-generic/pgtable-nopud.h>
604#endif
561#include <asm-generic/pgtable.h> 605#include <asm-generic/pgtable.h>
562 606
563#endif /* _ASM_IA64_PGTABLE_H */ 607#endif /* _ASM_IA64_PGTABLE_H */
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 29df88bdd2bc..313cad0628d0 100644
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -320,7 +320,8 @@ typedef struct sal_log_timestamp {
320typedef struct sal_log_record_header { 320typedef struct sal_log_record_header {
321 u64 id; /* Unique monotonically increasing ID */ 321 u64 id; /* Unique monotonically increasing ID */
322 sal_log_revision_t revision; /* Major and Minor revision of header */ 322 sal_log_revision_t revision; /* Major and Minor revision of header */
323 u16 severity; /* Error Severity */ 323 u8 severity; /* Error Severity */
324 u8 validation_bits; /* 0: platform_guid, 1: !timestamp */
324 u32 len; /* Length of this error log in bytes */ 325 u32 len; /* Length of this error log in bytes */
325 sal_log_timestamp_t timestamp; /* Timestamp */ 326 sal_log_timestamp_t timestamp; /* Timestamp */
326 efi_guid_t platform_guid; /* Unique OEM Platform ID */ 327 efi_guid_t platform_guid; /* Unique OEM Platform ID */
diff --git a/include/asm-ia64/sn/pcidev.h b/include/asm-ia64/sn/pcidev.h
index 49711d00ad04..f65d222ca5e8 100644
--- a/include/asm-ia64/sn/pcidev.h
+++ b/include/asm-ia64/sn/pcidev.h
@@ -3,15 +3,27 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8#ifndef _ASM_IA64_SN_PCI_PCIDEV_H 8#ifndef _ASM_IA64_SN_PCI_PCIDEV_H
9#define _ASM_IA64_SN_PCI_PCIDEV_H 9#define _ASM_IA64_SN_PCI_PCIDEV_H
10 10
11#include <linux/pci.h> 11#include <linux/pci.h>
12 12
13#define SN_PCIDEV_INFO(pci_dev) \ 13/*
14 ((struct pcidev_info *)(pci_dev)->sysdata) 14 * In ia64, pci_dev->sysdata must be a *pci_controller. To provide access to
15 * the pcidev_info structs for all devices under a controller, we extend the
16 * definition of pci_controller, via sn_pci_controller, to include a list
17 * of pcidev_info.
18 */
19struct sn_pci_controller {
20 struct pci_controller pci_controller;
21 struct list_head pcidev_info;
22};
23
24#define SN_PCI_CONTROLLER(dev) ((struct sn_pci_controller *) dev->sysdata)
25
26#define SN_PCIDEV_INFO(dev) sn_pcidev_info_get(dev)
15 27
16#define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \ 28#define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \
17 (struct pcibus_info *)((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data)) 29 (struct pcibus_info *)((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data))
@@ -53,11 +65,13 @@ struct pcidev_info {
53 struct sn_irq_info *pdi_sn_irq_info; 65 struct sn_irq_info *pdi_sn_irq_info;
54 struct sn_pcibus_provider *pdi_provider; /* sn pci ops */ 66 struct sn_pcibus_provider *pdi_provider; /* sn pci ops */
55 struct pci_dev *host_pci_dev; /* host bus link */ 67 struct pci_dev *host_pci_dev; /* host bus link */
68 struct list_head pdi_list; /* List of pcidev_info */
56}; 69};
57 70
58extern void sn_irq_fixup(struct pci_dev *pci_dev, 71extern void sn_irq_fixup(struct pci_dev *pci_dev,
59 struct sn_irq_info *sn_irq_info); 72 struct sn_irq_info *sn_irq_info);
60extern void sn_irq_unfixup(struct pci_dev *pci_dev); 73extern void sn_irq_unfixup(struct pci_dev *pci_dev);
74extern struct pcidev_info * sn_pcidev_info_get(struct pci_dev *);
61extern void sn_pci_controller_fixup(int segment, int busnum, 75extern void sn_pci_controller_fixup(int segment, int busnum,
62 struct pci_bus *bus); 76 struct pci_bus *bus);
63extern void sn_bus_store_sysdata(struct pci_dev *dev); 77extern void sn_bus_store_sysdata(struct pci_dev *dev);
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index 3f7564dc0aa9..2a8b0d92a5d6 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -56,6 +56,7 @@
56#define SN_SAL_BUS_CONFIG 0x02000037 56#define SN_SAL_BUS_CONFIG 0x02000037
57#define SN_SAL_SYS_SERIAL_GET 0x02000038 57#define SN_SAL_SYS_SERIAL_GET 0x02000038
58#define SN_SAL_PARTITION_SERIAL_GET 0x02000039 58#define SN_SAL_PARTITION_SERIAL_GET 0x02000039
59#define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
59#define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b 60#define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
60#define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c 61#define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
61#define SN_SAL_COHERENCE 0x0200003d 62#define SN_SAL_COHERENCE 0x0200003d
@@ -581,6 +582,21 @@ sn_partition_serial_number_val(void) {
581} 582}
582 583
583/* 584/*
585 * Returns the partition id of the nasid passed in as an argument,
586 * or INVALID_PARTID if the partition id cannot be retrieved.
587 */
588static inline partid_t
589ia64_sn_sysctl_partition_get(nasid_t nasid)
590{
591 struct ia64_sal_retval ret_stuff;
592 SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
593 0, 0, 0, 0, 0, 0);
594 if (ret_stuff.status != 0)
595 return -1;
596 return ((partid_t)ret_stuff.v0);
597}
598
599/*
584 * Returns the physical address of the partition's reserved page through 600 * Returns the physical address of the partition's reserved page through
585 * an iterative number of calls. 601 * an iterative number of calls.
586 * 602 *
@@ -1018,6 +1034,24 @@ ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
1018 ret_stuff.v2 = 0; 1034 ret_stuff.v2 = 0;
1019 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0); 1035 SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
1020 1036
1037/***** BEGIN HACK - temp til old proms no longer supported ********/
1038 if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
1039 int nasid = get_sapicid() & 0xfff;;
1040#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
1041#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
1042 if (shubtype) *shubtype = 0;
1043 if (nasid_bitmask) *nasid_bitmask = 0x7ff;
1044 if (nasid_shift) *nasid_shift = 38;
1045 if (systemsize) *systemsize = 10;
1046 if (sharing_domain_size) *sharing_domain_size = 8;
1047 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
1048 if (coher) *coher = nasid >> 9;
1049 if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
1050 SH_SHUB_ID_NODES_PER_BIT_SHFT;
1051 return 0;
1052 }
1053/***** END HACK *******/
1054
1021 if (ret_stuff.status < 0) 1055 if (ret_stuff.status < 0)
1022 return ret_stuff.status; 1056 return ret_stuff.status;
1023 1057
diff --git a/include/asm-ia64/sn/tioce.h b/include/asm-ia64/sn/tioce.h
index 22879853e46c..ecaddf960086 100644
--- a/include/asm-ia64/sn/tioce.h
+++ b/include/asm-ia64/sn/tioce.h
@@ -1,22 +1,10 @@
1/************************************************************************** 1/*
2 * * 2 * This file is subject to the terms and conditions of the GNU General Public
3 * Unpublished copyright (c) 2005, Silicon Graphics, Inc. * 3 * License. See the file "COPYING" in the main directory of this archive
4 * THIS IS UNPUBLISHED CONFIDENTIAL AND PROPRIETARY SOURCE CODE OF SGI. * 4 * for more details.
5 * * 5 *
6 * The copyright notice above does not evidence any actual or intended * 6 * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved.
7 * publication or disclosure of this source code, which includes * 7 */
8 * information that is confidential and/or proprietary, and is a trade *
9 * secret, of Silicon Graphics, Inc. ANY REPRODUCTION, MODIFICATION, *
10 * DISTRIBUTION, PUBLIC PERFORMANCE, OR PUBLIC DISPLAY OF OR THROUGH *
11 * USE OF THIS SOURCE CODE WITHOUT THE EXPRESS WRITTEN CONSENT OF *
12 * SILICON GRAPHICS, INC. IS STRICTLY PROHIBITED, AND IN VIOLATION OF *
13 * APPLICABLE LAWS AND INTERNATIONAL TREATIES. THE RECEIPT OR *
14 * POSSESSION OF THIS SOURCE CODE AND/OR RELATED INFORMATION DOES NOT *
15 * CONVEY OR IMPLY ANY RIGHTS TO REPRODUCE, DISCLOSE OR DISTRIBUTE ITS *
16 * CONTENTS, OR TO MANUFACTURE, USE, OR SELL ANYTHING THAT IT MAY *
17 * DESCRIBE, IN WHOLE OR IN PART. *
18 * *
19 **************************************************************************/
20 8
21#ifndef __ASM_IA64_SN_TIOCE_H__ 9#ifndef __ASM_IA64_SN_TIOCE_H__
22#define __ASM_IA64_SN_TIOCE_H__ 10#define __ASM_IA64_SN_TIOCE_H__
diff --git a/include/asm-ia64/sn/tioce_provider.h b/include/asm-ia64/sn/tioce_provider.h
index 7f63dec0a79a..cb414908671d 100644
--- a/include/asm-ia64/sn/tioce_provider.h
+++ b/include/asm-ia64/sn/tioce_provider.h
@@ -1,13 +1,10 @@
1/************************************************************************** 1/*
2 * Copyright (C) 2005, Silicon Graphics, Inc. * 2 * This file is subject to the terms and conditions of the GNU General Public
3 * * 3 * License. See the file "COPYING" in the main directory of this archive
4 * These coded instructions, statements, and computer programs contain * 4 * for more details.
5 * unpublished proprietary information of Silicon Graphics, Inc., and * 5 *
6 * are protected by Federal copyright law. They may not be disclosed * 6 * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved.
7 * to third parties or copied or duplicated in any form, in whole or * 7 */
8 * in part, without the prior written consent of Silicon Graphics, Inc. *
9 * *
10 **************************************************************************/
11 8
12#ifndef _ASM_IA64_SN_CE_PROVIDER_H 9#ifndef _ASM_IA64_SN_CE_PROVIDER_H
13#define _ASM_IA64_SN_CE_PROVIDER_H 10#define _ASM_IA64_SN_CE_PROVIDER_H
diff --git a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h
index 5b78611411c3..0c91a76c5ea3 100644
--- a/include/asm-ia64/spinlock.h
+++ b/include/asm-ia64/spinlock.h
@@ -201,6 +201,16 @@ static inline void __raw_write_unlock(raw_rwlock_t *x)
201 201
202#endif /* !ASM_SUPPORTED */ 202#endif /* !ASM_SUPPORTED */
203 203
204#define __raw_read_trylock(lock) generic__raw_read_trylock(lock) 204static inline int __raw_read_trylock(raw_rwlock_t *x)
205{
206 union {
207 raw_rwlock_t lock;
208 __u32 word;
209 } old, new;
210 old.lock = new.lock = *x;
211 old.lock.write_lock = new.lock.write_lock = 0;
212 ++new.lock.read_counter;
213 return (u32)ia64_cmpxchg4_acq((__u32 *)(x), new.word, old.word) == old.word;
214}
205 215
206#endif /* _ASM_IA64_SPINLOCK_H */ 216#endif /* _ASM_IA64_SPINLOCK_H */
diff --git a/include/asm-ia64/tlbflush.h b/include/asm-ia64/tlbflush.h
index b65c62702724..a35b323bae4c 100644
--- a/include/asm-ia64/tlbflush.h
+++ b/include/asm-ia64/tlbflush.h
@@ -51,6 +51,7 @@ flush_tlb_mm (struct mm_struct *mm)
51 if (!mm) 51 if (!mm)
52 return; 52 return;
53 53
54 set_bit(mm->context, ia64_ctx.flushmap);
54 mm->context = 0; 55 mm->context = 0;
55 56
56 if (atomic_read(&mm->mm_users) == 0) 57 if (atomic_read(&mm->mm_users) == 0)
diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h
index a9f738bf18a7..f7c330467e7e 100644
--- a/include/asm-ia64/topology.h
+++ b/include/asm-ia64/topology.h
@@ -38,7 +38,7 @@
38/* 38/*
39 * Returns the number of the first CPU on Node 'node'. 39 * Returns the number of the first CPU on Node 'node'.
40 */ 40 */
41#define node_to_first_cpu(node) (__ffs(node_to_cpumask(node))) 41#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node)))
42 42
43/* 43/*
44 * Determines the node for a given pci bus 44 * Determines the node for a given pci bus
diff --git a/include/asm-m32r/atomic.h b/include/asm-m32r/atomic.h
index bfff69a49936..ef1fb8ea4726 100644
--- a/include/asm-m32r/atomic.h
+++ b/include/asm-m32r/atomic.h
@@ -242,6 +242,27 @@ static __inline__ int atomic_dec_return(atomic_t *v)
242 */ 242 */
243#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0) 243#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
244 244
245#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
246
247/**
248 * atomic_add_unless - add unless the number is a given value
249 * @v: pointer of type atomic_t
250 * @a: the amount to add to v...
251 * @u: ...unless v is equal to u.
252 *
253 * Atomically adds @a to @v, so long as it was not @u.
254 * Returns non-zero if @v was not @u, and zero otherwise.
255 */
256#define atomic_add_unless(v, a, u) \
257({ \
258 int c, old; \
259 c = atomic_read(v); \
260 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
261 c = old; \
262 c != (u); \
263})
264#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
265
245static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr) 266static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
246{ 267{
247 unsigned long flags; 268 unsigned long flags;
diff --git a/include/asm-m32r/ide.h b/include/asm-m32r/ide.h
index 194393bd8beb..f7aa96970d18 100644
--- a/include/asm-m32r/ide.h
+++ b/include/asm-m32r/ide.h
@@ -25,18 +25,21 @@
25# endif 25# endif
26#endif 26#endif
27 27
28#if defined(CONFIG_PLAT_M32700UT) 28#include <asm/m32r.h>
29#include <asm/irq.h> 29
30#include <asm/m32700ut/m32700ut_pld.h>
31#endif
32 30
33#define IDE_ARCH_OBSOLETE_DEFAULTS 31#define IDE_ARCH_OBSOLETE_DEFAULTS
34 32
35static __inline__ int ide_default_irq(unsigned long base) 33static __inline__ int ide_default_irq(unsigned long base)
36{ 34{
37 switch (base) { 35 switch (base) {
38#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2) || defined(CONFIG_PLAT_MAPPI3) 36#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_MAPPI2)
37 case 0x1f0: return PLD_IRQ_CFIREQ;
38 default:
39 return 0;
40#elif defined(CONFIG_PLAT_MAPPI3)
39 case 0x1f0: return PLD_IRQ_CFIREQ; 41 case 0x1f0: return PLD_IRQ_CFIREQ;
42 case 0x170: return PLD_IRQ_IDEIREQ;
40 default: 43 default:
41 return 0; 44 return 0;
42#else 45#else
diff --git a/include/asm-m32r/mappi3/mappi3_pld.h b/include/asm-m32r/mappi3/mappi3_pld.h
index 3f1551f7f01f..1d3c25d61bcb 100644
--- a/include/asm-m32r/mappi3/mappi3_pld.h
+++ b/include/asm-m32r/mappi3/mappi3_pld.h
@@ -59,7 +59,7 @@
59#define M32R_IRQ_I2C (28) /* I2C-BUS */ 59#define M32R_IRQ_I2C (28) /* I2C-BUS */
60#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */ 60#define PLD_IRQ_CFIREQ (6) /* INT5 CFC Card Interrupt */
61#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert */ 61#define PLD_IRQ_CFC_INSERT (7) /* INT6 CFC Card Insert */
62#define PLD_IRQ_CFC_EJECT (8) /* INT7 CFC Card Eject */ 62#define PLD_IRQ_IDEIREQ (8) /* INT7 IDE Interrupt */
63#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */ 63#define PLD_IRQ_MMCCARD (43) /* MMC Card Insert */
64#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */ 64#define PLD_IRQ_MMCIRQ (44) /* MMC Transfer Done */
65 65
diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h
index 73348c3f858b..5eee832b73a0 100644
--- a/include/asm-m32r/system.h
+++ b/include/asm-m32r/system.h
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14#include <asm/assembler.h>
14 15
15#ifdef __KERNEL__ 16#ifdef __KERNEL__
16 17
@@ -132,8 +133,6 @@ static inline void local_irq_disable(void)
132 !(flags & 0x40); \ 133 !(flags & 0x40); \
133 }) 134 })
134 135
135#endif /* __KERNEL__ */
136
137#define nop() __asm__ __volatile__ ("nop" : : ) 136#define nop() __asm__ __volatile__ ("nop" : : )
138 137
139#define xchg(ptr,x) \ 138#define xchg(ptr,x) \
@@ -213,6 +212,67 @@ static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr,
213 return (tmp); 212 return (tmp);
214} 213}
215 214
215#define __HAVE_ARCH_CMPXCHG 1
216
217static __inline__ unsigned long
218__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
219{
220 unsigned long flags;
221 unsigned int retval;
222
223 local_irq_save(flags);
224 __asm__ __volatile__ (
225 DCACHE_CLEAR("%0", "r4", "%1")
226 M32R_LOCK" %0, @%1; \n"
227 " bne %0, %2, 1f; \n"
228 M32R_UNLOCK" %3, @%1; \n"
229 " bra 2f; \n"
230 " .fillinsn \n"
231 "1:"
232 M32R_UNLOCK" %2, @%1; \n"
233 " .fillinsn \n"
234 "2:"
235 : "=&r" (retval)
236 : "r" (p), "r" (old), "r" (new)
237 : "cbit", "memory"
238#ifdef CONFIG_CHIP_M32700_TS1
239 , "r4"
240#endif /* CONFIG_CHIP_M32700_TS1 */
241 );
242 local_irq_restore(flags);
243
244 return retval;
245}
246
247/* This function doesn't exist, so you'll get a linker error
248 if something tries to do an invalid cmpxchg(). */
249extern void __cmpxchg_called_with_bad_pointer(void);
250
251static __inline__ unsigned long
252__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
253{
254 switch (size) {
255 case 4:
256 return __cmpxchg_u32(ptr, old, new);
257#if 0 /* we don't have __cmpxchg_u64 */
258 case 8:
259 return __cmpxchg_u64(ptr, old, new);
260#endif /* 0 */
261 }
262 __cmpxchg_called_with_bad_pointer();
263 return old;
264}
265
266#define cmpxchg(ptr,o,n) \
267 ({ \
268 __typeof__(*(ptr)) _o_ = (o); \
269 __typeof__(*(ptr)) _n_ = (n); \
270 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
271 (unsigned long)_n_, sizeof(*(ptr))); \
272 })
273
274#endif /* __KERNEL__ */
275
216/* 276/*
217 * Memory barrier. 277 * Memory barrier.
218 * 278 *
diff --git a/include/asm-m68k/atomic.h b/include/asm-m68k/atomic.h
index 38f3043e7fe1..e3c962eeabf3 100644
--- a/include/asm-m68k/atomic.h
+++ b/include/asm-m68k/atomic.h
@@ -139,6 +139,18 @@ static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
139 __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask)); 139 __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
140} 140}
141 141
142#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
143
144#define atomic_add_unless(v, a, u) \
145({ \
146 int c, old; \
147 c = atomic_read(v); \
148 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
149 c = old; \
150 c != (u); \
151})
152#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
153
142/* Atomic operations are already serializing */ 154/* Atomic operations are already serializing */
143#define smp_mb__before_atomic_dec() barrier() 155#define smp_mb__before_atomic_dec() barrier()
144#define smp_mb__after_atomic_dec() barrier() 156#define smp_mb__after_atomic_dec() barrier()
diff --git a/include/asm-m68k/processor.h b/include/asm-m68k/processor.h
index df1575db32af..7982285e84ed 100644
--- a/include/asm-m68k/processor.h
+++ b/include/asm-m68k/processor.h
@@ -14,6 +14,7 @@
14#define current_text_addr() ({ __label__ _l; _l: &&_l;}) 14#define current_text_addr() ({ __label__ _l; _l: &&_l;})
15 15
16#include <linux/config.h> 16#include <linux/config.h>
17#include <linux/thread_info.h>
17#include <asm/segment.h> 18#include <asm/segment.h>
18#include <asm/fpu.h> 19#include <asm/fpu.h>
19#include <asm/ptrace.h> 20#include <asm/ptrace.h>
@@ -55,17 +56,6 @@ static inline void wrusp(unsigned long usp)
55#endif 56#endif
56#define TASK_UNMAPPED_ALIGN(addr, off) PAGE_ALIGN(addr) 57#define TASK_UNMAPPED_ALIGN(addr, off) PAGE_ALIGN(addr)
57 58
58struct task_work {
59 unsigned char sigpending;
60 unsigned char notify_resume; /* request for notification on
61 userspace execution resumption */
62 char need_resched;
63 unsigned char delayed_trace; /* single step a syscall */
64 unsigned char syscall_trace; /* count of syscall interceptors */
65 unsigned char memdie; /* task was selected to be killed */
66 unsigned char pad[2];
67};
68
69struct thread_struct { 59struct thread_struct {
70 unsigned long ksp; /* kernel stack pointer */ 60 unsigned long ksp; /* kernel stack pointer */
71 unsigned long usp; /* user stack pointer */ 61 unsigned long usp; /* user stack pointer */
@@ -78,7 +68,7 @@ struct thread_struct {
78 unsigned long fp[8*3]; 68 unsigned long fp[8*3];
79 unsigned long fpcntl[3]; /* fp control regs */ 69 unsigned long fpcntl[3]; /* fp control regs */
80 unsigned char fpstate[FPSTATESIZE]; /* floating point state */ 70 unsigned char fpstate[FPSTATESIZE]; /* floating point state */
81 struct task_work work; 71 struct thread_info info;
82}; 72};
83 73
84#define INIT_THREAD { \ 74#define INIT_THREAD { \
diff --git a/include/asm-m68k/thread_info.h b/include/asm-m68k/thread_info.h
index 2aed24f6fd2e..9532ca3c45cb 100644
--- a/include/asm-m68k/thread_info.h
+++ b/include/asm-m68k/thread_info.h
@@ -2,17 +2,15 @@
2#define _ASM_M68K_THREAD_INFO_H 2#define _ASM_M68K_THREAD_INFO_H
3 3
4#include <asm/types.h> 4#include <asm/types.h>
5#include <asm/processor.h>
6#include <asm/page.h> 5#include <asm/page.h>
7 6
8struct thread_info { 7struct thread_info {
9 struct task_struct *task; /* main task structure */ 8 struct task_struct *task; /* main task structure */
9 unsigned long flags;
10 struct exec_domain *exec_domain; /* execution domain */ 10 struct exec_domain *exec_domain; /* execution domain */
11 int preempt_count; /* 0 => preemptable, <0 => BUG */ 11 int preempt_count; /* 0 => preemptable, <0 => BUG */
12 __u32 cpu; /* should always be 0 on m68k */ 12 __u32 cpu; /* should always be 0 on m68k */
13 struct restart_block restart_block; 13 struct restart_block restart_block;
14
15 __u8 supervisor_stack[0];
16}; 14};
17 15
18#define PREEMPT_ACTIVE 0x4000000 16#define PREEMPT_ACTIVE 0x4000000
@@ -35,84 +33,29 @@ struct thread_info {
35#define free_thread_info(ti) free_pages((unsigned long)(ti),1) 33#define free_thread_info(ti) free_pages((unsigned long)(ti),1)
36#endif /* PAGE_SHIFT == 13 */ 34#endif /* PAGE_SHIFT == 13 */
37 35
38//#define init_thread_info (init_task.thread.info) 36#define init_thread_info (init_task.thread.info)
39#define init_stack (init_thread_union.stack) 37#define init_stack (init_thread_union.stack)
40 38
41#define current_thread_info() (current->thread_info) 39#define task_thread_info(tsk) (&(tsk)->thread.info)
42 40#define current_thread_info() task_thread_info(current)
43 41
44#define __HAVE_THREAD_FUNCTIONS 42#define __HAVE_THREAD_FUNCTIONS
45 43
46#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ 44#define setup_thread_stack(p, org) ({ \
47#define TIF_DELAYED_TRACE 1 /* single step a syscall */ 45 *(struct task_struct **)(p)->thread_info = (p); \
48#define TIF_NOTIFY_RESUME 2 /* resumption notification requested */ 46 task_thread_info(p)->task = (p); \
49#define TIF_SIGPENDING 3 /* signal pending */
50#define TIF_NEED_RESCHED 4 /* rescheduling necessary */
51#define TIF_MEMDIE 5
52
53extern int thread_flag_fixme(void);
54
55/*
56 * flag set/clear/test wrappers
57 * - pass TIF_xxxx constants to these functions
58 */
59
60#define __set_tsk_thread_flag(tsk, flag, val) ({ \
61 switch (flag) { \
62 case TIF_SIGPENDING: \
63 tsk->thread.work.sigpending = val; \
64 break; \
65 case TIF_NEED_RESCHED: \
66 tsk->thread.work.need_resched = val; \
67 break; \
68 case TIF_SYSCALL_TRACE: \
69 tsk->thread.work.syscall_trace = val; \
70 break; \
71 case TIF_MEMDIE: \
72 tsk->thread.work.memdie = val; \
73 break; \
74 default: \
75 thread_flag_fixme(); \
76 } \
77}) 47})
78 48
79#define __get_tsk_thread_flag(tsk, flag) ({ \ 49#define end_of_stack(p) ((unsigned long *)(p)->thread_info + 1)
80 int ___res; \
81 switch (flag) { \
82 case TIF_SIGPENDING: \
83 ___res = tsk->thread.work.sigpending; \
84 break; \
85 case TIF_NEED_RESCHED: \
86 ___res = tsk->thread.work.need_resched; \
87 break; \
88 case TIF_SYSCALL_TRACE: \
89 ___res = tsk->thread.work.syscall_trace;\
90 break; \
91 case TIF_MEMDIE: \
92 ___res = tsk->thread.work.memdie;\
93 break; \
94 default: \
95 ___res = thread_flag_fixme(); \
96 } \
97 ___res; \
98})
99
100#define __get_set_tsk_thread_flag(tsk, flag, val) ({ \
101 int __res = __get_tsk_thread_flag(tsk, flag); \
102 __set_tsk_thread_flag(tsk, flag, val); \
103 __res; \
104})
105 50
106#define set_tsk_thread_flag(tsk, flag) __set_tsk_thread_flag(tsk, flag, ~0) 51/* entry.S relies on these definitions!
107#define clear_tsk_thread_flag(tsk, flag) __set_tsk_thread_flag(tsk, flag, 0) 52 * bits 0-7 are tested at every exception exit
108#define test_and_set_tsk_thread_flag(tsk, flag) __get_set_tsk_thread_flag(tsk, flag, ~0) 53 * bits 8-15 are also tested at syscall exit
109#define test_tsk_thread_flag(tsk, flag) __get_tsk_thread_flag(tsk, flag) 54 */
110 55#define TIF_SIGPENDING 6 /* signal pending */
111#define set_thread_flag(flag) set_tsk_thread_flag(current, flag) 56#define TIF_NEED_RESCHED 7 /* rescheduling necessary */
112#define clear_thread_flag(flag) clear_tsk_thread_flag(current, flag) 57#define TIF_DELAYED_TRACE 14 /* single step a syscall */
113#define test_thread_flag(flag) test_tsk_thread_flag(current, flag) 58#define TIF_SYSCALL_TRACE 15 /* syscall trace active */
114 59#define TIF_MEMDIE 16
115#define set_need_resched() set_thread_flag(TIF_NEED_RESCHED)
116#define clear_need_resched() clear_thread_flag(TIF_NEED_RESCHED)
117 60
118#endif /* _ASM_M68K_THREAD_INFO_H */ 61#endif /* _ASM_M68K_THREAD_INFO_H */
diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h
index a83631ed8c8f..3c1cc153c415 100644
--- a/include/asm-m68knommu/atomic.h
+++ b/include/asm-m68knommu/atomic.h
@@ -128,6 +128,18 @@ static inline int atomic_sub_return(int i, atomic_t * v)
128 return temp; 128 return temp;
129} 129}
130 130
131#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
132
133#define atomic_add_unless(v, a, u) \
134({ \
135 int c, old; \
136 c = atomic_read(v); \
137 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
138 c = old; \
139 c != (u); \
140})
141#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
142
131#define atomic_dec_return(v) atomic_sub_return(1,(v)) 143#define atomic_dec_return(v) atomic_sub_return(1,(v))
132#define atomic_inc_return(v) atomic_add_return(1,(v)) 144#define atomic_inc_return(v) atomic_add_return(1,(v))
133 145
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 6202eb8a14b7..55c37c106ef0 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -231,11 +231,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
231} 231}
232 232
233/* 233/*
234 * atomic_sub_if_positive - add integer to atomic variable 234 * atomic_sub_if_positive - conditionally subtract integer from atomic variable
235 * @i: integer value to subtract
235 * @v: pointer of type atomic_t 236 * @v: pointer of type atomic_t
236 * 237 *
237 * Atomically test @v and decrement if it is greater than 0. 238 * Atomically test @v and subtract @i if @v is greater or equal than @i.
238 * The function returns the old value of @v minus 1. 239 * The function returns the old value of @v minus @i.
239 */ 240 */
240static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) 241static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
241{ 242{
@@ -287,6 +288,27 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
287 return result; 288 return result;
288} 289}
289 290
291#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
292
293/**
294 * atomic_add_unless - add unless the number is a given value
295 * @v: pointer of type atomic_t
296 * @a: the amount to add to v...
297 * @u: ...unless v is equal to u.
298 *
299 * Atomically adds @a to @v, so long as it was not @u.
300 * Returns non-zero if @v was not @u, and zero otherwise.
301 */
302#define atomic_add_unless(v, a, u) \
303({ \
304 int c, old; \
305 c = atomic_read(v); \
306 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
307 c = old; \
308 c != (u); \
309})
310#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
311
290#define atomic_dec_return(v) atomic_sub_return(1,(v)) 312#define atomic_dec_return(v) atomic_sub_return(1,(v))
291#define atomic_inc_return(v) atomic_add_return(1,(v)) 313#define atomic_inc_return(v) atomic_add_return(1,(v))
292 314
@@ -556,11 +578,12 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
556} 578}
557 579
558/* 580/*
559 * atomic64_sub_if_positive - add integer to atomic variable 581 * atomic64_sub_if_positive - conditionally subtract integer from atomic variable
582 * @i: integer value to subtract
560 * @v: pointer of type atomic64_t 583 * @v: pointer of type atomic64_t
561 * 584 *
562 * Atomically test @v and decrement if it is greater than 0. 585 * Atomically test @v and subtract @i if @v is greater or equal than @i.
563 * The function returns the old value of @v minus 1. 586 * The function returns the old value of @v minus @i.
564 */ 587 */
565static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) 588static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
566{ 589{
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index 3061870b7f6c..d42685747e7d 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -459,10 +459,10 @@ __BUILDIO(q, u64)
459 459
460#define __BUILD_MEMORY_STRING(bwlq, type) \ 460#define __BUILD_MEMORY_STRING(bwlq, type) \
461 \ 461 \
462static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \ 462static inline void writes##bwlq(volatile void __iomem *mem, \
463 unsigned int count) \ 463 const void *addr, unsigned int count) \
464{ \ 464{ \
465 volatile type *__addr = addr; \ 465 const volatile type *__addr = addr; \
466 \ 466 \
467 while (count--) { \ 467 while (count--) { \
468 mem_write##bwlq(*__addr, mem); \ 468 mem_write##bwlq(*__addr, mem); \
diff --git a/include/asm-mips/ip32/crime.h b/include/asm-mips/ip32/crime.h
index 152879bae20f..a13702fafa85 100644
--- a/include/asm-mips/ip32/crime.h
+++ b/include/asm-mips/ip32/crime.h
@@ -154,7 +154,7 @@ struct sgi_crime {
154#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff 154#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
155}; 155};
156 156
157extern struct sgi_crime *crime; 157extern struct sgi_crime __iomem *crime;
158 158
159#define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */ 159#define CRIME_HI_MEM_BASE 0x40000000 /* this is where whole 1G of RAM is mapped */
160 160
diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
index 5bdc51d85b6c..990082c81f39 100644
--- a/include/asm-mips/ip32/mace.h
+++ b/include/asm-mips/ip32/mace.h
@@ -150,24 +150,34 @@ struct mace_audio {
150 150
151/* register definitions for parallel port DMA */ 151/* register definitions for parallel port DMA */
152struct mace_parport { 152struct mace_parport {
153/* 0 - do nothing, 1 - pulse terminal count to the device after buffer is drained */ 153 /* 0 - do nothing,
154#define MACEPAR_CONTEXT_LASTFLAG BIT(63) 154 * 1 - pulse terminal count to the device after buffer is drained */
155/* Should not cross 4K page boundary */ 155#define MACEPAR_CONTEXT_LASTFLAG BIT(63)
156#define MACEPAR_CONTEXT_DATALEN_MASK 0xfff00000000 156 /* Should not cross 4K page boundary */
157/* Can be arbitrarily aligned on any byte boundary on output, 64 byte aligned on input */ 157#define MACEPAR_CONTEXT_DATA_BOUND 0x0000000000001000UL
158#define MACEPAR_CONTEXT_BASEADDR_MASK 0xffffffff 158#define MACEPAR_CONTEXT_DATALEN_MASK 0x00000fff00000000UL
159#define MACEPAR_CONTEXT_DATALEN_SHIFT 32
160 /* Can be arbitrarily aligned on any byte boundary on output,
161 * 64 byte aligned on input */
162#define MACEPAR_CONTEXT_BASEADDR_MASK 0x00000000ffffffffUL
159 volatile u64 context_a; 163 volatile u64 context_a;
160 volatile u64 context_b; 164 volatile u64 context_b;
161#define MACEPAR_CTLSTAT_DIRECTION BIT(0) /* 0 - mem->device, 1 - device->mem */ 165 /* 0 - mem->device, 1 - device->mem */
162#define MACEPAR_CTLSTAT_ENABLE BIT(1) /* 0 - channel frozen, 1 - channel enabled */ 166#define MACEPAR_CTLSTAT_DIRECTION BIT(0)
163#define MACEPAR_CTLSTAT_RESET BIT(2) /* 0 - channel active, 1 - complete channel reset */ 167 /* 0 - channel frozen, 1 - channel enabled */
164#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3) 168#define MACEPAR_CTLSTAT_ENABLE BIT(1)
165#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4) 169 /* 0 - channel active, 1 - complete channel reset */
166 volatile u64 cntlstat; /* Control/Status register */ 170#define MACEPAR_CTLSTAT_RESET BIT(2)
167#define MACEPAR_DIAG_CTXINUSE BIT(1) 171#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3)
168#define MACEPAR_DIAG_DMACTIVE BIT(2) /* 1 - Dma engine is enabled and processing something */ 172#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4)
169#define MACEPAR_DIAG_CTRMASK 0x3ffc /* Counter of bytes left */ 173 volatile u64 cntlstat; /* Control/Status register */
170 volatile u64 diagnostic; /* RO: diagnostic register */ 174#define MACEPAR_DIAG_CTXINUSE BIT(0)
175 /* 1 - Dma engine is enabled and processing something */
176#define MACEPAR_DIAG_DMACTIVE BIT(1)
177 /* Counter of bytes left */
178#define MACEPAR_DIAG_CTRMASK 0x0000000000003ffcUL
179#define MACEPAR_DIAG_CTRSHIFT 2
180 volatile u64 diagnostic; /* RO: diagnostic register */
171}; 181};
172 182
173/* ISA Control and DMA registers */ 183/* ISA Control and DMA registers */
@@ -353,6 +363,6 @@ struct sgi_mace {
353 char _pad6[0x80000 - sizeof(struct mace_isa)]; 363 char _pad6[0x80000 - sizeof(struct mace_isa)];
354}; 364};
355 365
356extern struct sgi_mace *mace; 366extern struct sgi_mace __iomem *mace;
357 367
358#endif /* __ASM_MACE_H__ */ 368#endif /* __ASM_MACE_H__ */
diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h
index 33d275c3b84c..e867b4ef96d1 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_ide.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h
@@ -74,9 +74,6 @@ typedef struct
74 u8 white_list, black_list; 74 u8 white_list, black_list;
75 struct dbdma_cmd *dma_table_cpu; 75 struct dbdma_cmd *dma_table_cpu;
76 dma_addr_t dma_table_dma; 76 dma_addr_t dma_table_dma;
77 struct scatterlist *sg_table;
78 int sg_nents;
79 int sg_dma_direction;
80#endif 77#endif
81 struct device *dev; 78 struct device *dev;
82 int irq; 79 int irq;
@@ -87,11 +84,6 @@ typedef struct
87} _auide_hwif; 84} _auide_hwif;
88 85
89#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 86#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
90struct drive_list_entry {
91 const char * id_model;
92 const char * id_firmware;
93};
94
95/* HD white list */ 87/* HD white list */
96static const struct drive_list_entry dma_white_list [] = { 88static const struct drive_list_entry dma_white_list [] = {
97/* 89/*
@@ -167,13 +159,9 @@ int __init auide_probe(void);
167 * Multi-Word DMA + DbDMA functions 159 * Multi-Word DMA + DbDMA functions
168 */ 160 */
169#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 161#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
170
171 static int in_drive_list(struct hd_driveid *id,
172 const struct drive_list_entry *drive_table);
173 static int auide_build_sglist(ide_drive_t *drive, struct request *rq); 162 static int auide_build_sglist(ide_drive_t *drive, struct request *rq);
174 static int auide_build_dmatable(ide_drive_t *drive); 163 static int auide_build_dmatable(ide_drive_t *drive);
175 static int auide_dma_end(ide_drive_t *drive); 164 static int auide_dma_end(ide_drive_t *drive);
176 static void auide_dma_start(ide_drive_t *drive );
177 ide_startstop_t auide_dma_intr (ide_drive_t *drive); 165 ide_startstop_t auide_dma_intr (ide_drive_t *drive);
178 static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command); 166 static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command);
179 static int auide_dma_setup(ide_drive_t *drive); 167 static int auide_dma_setup(ide_drive_t *drive);
@@ -188,8 +176,6 @@ int __init auide_probe(void);
188 static void auide_ddma_rx_callback(int irq, void *param, 176 static void auide_ddma_rx_callback(int irq, void *param,
189 struct pt_regs *regs); 177 struct pt_regs *regs);
190 static int auide_dma_off_quietly(ide_drive_t *drive); 178 static int auide_dma_off_quietly(ide_drive_t *drive);
191 static int auide_dma_timeout(ide_drive_t *drive);
192
193#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */ 179#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
194 180
195/******************************************************************************* 181/*******************************************************************************
@@ -299,3 +285,11 @@ int __init auide_probe(void);
299#define SBC_IDE_MDMA2_TPM (0x00<<6) 285#define SBC_IDE_MDMA2_TPM (0x00<<6)
300#define SBC_IDE_MDMA2_TA (0x12<<0) 286#define SBC_IDE_MDMA2_TA (0x12<<0)
301 287
288#define SBC_IDE_TIMING(mode) \
289 SBC_IDE_##mode##_TWCS | \
290 SBC_IDE_##mode##_TCSH | \
291 SBC_IDE_##mode##_TCSOFF | \
292 SBC_IDE_##mode##_TWP | \
293 SBC_IDE_##mode##_TCSW | \
294 SBC_IDE_##mode##_TPM | \
295 SBC_IDE_##mode##_TA
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index 5d894376fc1a..647fdb54cc1d 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -220,5 +220,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
220#define BOARD_PC1_INT DB1200_PC1_INT 220#define BOARD_PC1_INT DB1200_PC1_INT
221#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) 221#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
222 222
223/* Nand chip select */
224#define NAND_CS 1
225
223#endif /* __ASM_DB1200_H */ 226#endif /* __ASM_DB1200_H */
224 227
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index efafe65258b6..7b28b23f91ce 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -200,6 +200,12 @@ typedef volatile struct
200 ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ 200 ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
201 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ 201 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
202 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) 202 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
203#define NAND_CS 1
204
205/* should be done by yamon */
206#define NAND_STCFG 0x00400005 /* 8-bit NAND */
207#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
208#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
203 209
204#endif /* __ASM_DB1X00_H */ 210#endif /* __ASM_DB1X00_H */
205 211
diff --git a/include/asm-mips/mach-ip32/mc146818rtc.h b/include/asm-mips/mach-ip32/mc146818rtc.h
index f5d780ff843f..c28ba8d84076 100644
--- a/include/asm-mips/mach-ip32/mc146818rtc.h
+++ b/include/asm-mips/mach-ip32/mc146818rtc.h
@@ -11,7 +11,6 @@
11#ifndef __ASM_MACH_IP32_MC146818RTC_H 11#ifndef __ASM_MACH_IP32_MC146818RTC_H
12#define __ASM_MACH_IP32_MC146818RTC_H 12#define __ASM_MACH_IP32_MC146818RTC_H
13 13
14#include <asm/io.h>
15#include <asm/ip32/mace.h> 14#include <asm/ip32/mace.h>
16 15
17#define RTC_PORT(x) (0x70 + (x)) 16#define RTC_PORT(x) (0x70 + (x))
@@ -26,8 +25,10 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
26 mace->isa.rtc[addr << 8] = data; 25 mace->isa.rtc[addr << 8] = data;
27} 26}
28 27
29/* FIXME: Do it right. For now just assume that noone lives in 20th century 28/*
30 * and no O2 user in 22th century ;-) */ 29 * FIXME: Do it right. For now just assume that noone lives in 20th century
30 * and no O2 user in 22th century ;-)
31 */
31#define mc146818_decode_year(year) ((year) + 2000) 32#define mc146818_decode_year(year) ((year) + 2000)
32 33
33#define RTC_ALWAYS_BCD 0 34#define RTC_ALWAYS_BCD 0
diff --git a/include/asm-mips/mach-jmr3927/asm/ds1742.h b/include/asm-mips/mach-jmr3927/ds1742.h
index 134a4b6c334a..cff6192d4bdb 100644
--- a/include/asm-mips/mach-jmr3927/asm/ds1742.h
+++ b/include/asm-mips/mach-jmr3927/ds1742.h
@@ -5,12 +5,12 @@
5 * 5 *
6 * Copyright (C) 2003 by Ralf Baechle 6 * Copyright (C) 2003 by Ralf Baechle
7 */ 7 */
8#ifndef __ASM_MACH_JMR3927_ASM_DS1742_H 8#ifndef __ASM_MACH_JMR3927_DS1742_H
9#define __ASM_MACH_JMR3927_ASM_DS1742_H 9#define __ASM_MACH_JMR3927_DS1742_H
10 10
11#include <asm/jmr3927/jmr3927.h> 11#include <asm/jmr3927/jmr3927.h>
12 12
13#define rtc_read(reg) (jmr3927_nvram_in(addr)) 13#define rtc_read(reg) (jmr3927_nvram_in(addr))
14#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg))) 14#define rtc_write(data, reg) (jmr3927_nvram_out((data),(reg)))
15 15
16#endif /* __ASM_MACH_JMR3927_ASM_DS1742_H */ 16#endif /* __ASM_MACH_JMR3927_DS1742_H */
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index 9a3088b19bf3..409d443322c1 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -248,5 +248,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
248#define BOARD_PC1_INT PB1200_PC1_INT 248#define BOARD_PC1_INT PB1200_PC1_INT
249#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) 249#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
250 250
251/* Nand chip select */
252#define NAND_CS 1
253
251#endif /* __ASM_PB1200_H */ 254#endif /* __ASM_PB1200_H */
252 255
diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h
index 431d6088ea96..9578ead11e8a 100644
--- a/include/asm-mips/mach-pb1x00/pb1550.h
+++ b/include/asm-mips/mach-pb1x00/pb1550.h
@@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
166 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ 166 ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
167 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) 167 ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
168 168
169#define NAND_CS 1
170
171/* should be done by yamon */
172#define NAND_STCFG 0x00400005 /* 8-bit NAND */
173#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
174#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
175
169#endif /* __ASM_PB1550_H */ 176#endif /* __ASM_PB1550_H */
diff --git a/include/asm-mips/mach-qemu/timex.h b/include/asm-mips/mach-qemu/timex.h
new file mode 100644
index 000000000000..cd543693fb0a
--- /dev/null
+++ b/include/asm-mips/mach-qemu/timex.h
@@ -0,0 +1,16 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 Daniel Jacobowitz
7 */
8#ifndef __ASM_MACH_QEMU_TIMEX_H
9#define __ASM_MACH_QEMU_TIMEX_H
10
11/*
12 * We use a simulated i8254 PIC...
13 */
14#define CLOCK_TICK_RATE 1193182
15
16#endif /* __ASM_MACH_QEMU_TIMEX_H */
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index c3dcfcb928b6..365c2a3c64f5 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -20,9 +20,14 @@
20#ifndef _MIPS_SEADINT_H 20#ifndef _MIPS_SEADINT_H
21#define _MIPS_SEADINT_H 21#define _MIPS_SEADINT_H
22 22
23#define SEADINT_UART0 2 23/*
24#define SEADINT_UART1 3 24 * Interrupts 0..7 are used for SEAD CPU interrupts
25 */
26#define MIPSCPU_INT_BASE 0
27
28#define MIPSCPU_INT_UART0 2
29#define MIPSCPU_INT_UART1 3
25 30
26extern void seadint_init(void); 31#define MIPSCPU_INT_CPUCTR 7
27 32
28#endif /* !(_MIPS_SEADINT_H) */ 33#endif /* !(_MIPS_SEADINT_H) */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 8ca539e80d87..6fe903e09c62 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -155,27 +155,6 @@ typedef struct sigaltstack {
155#ifdef __KERNEL__ 155#ifdef __KERNEL__
156#include <asm/sigcontext.h> 156#include <asm/sigcontext.h>
157 157
158/*
159 * The following break codes are or were in use for specific purposes in
160 * other MIPS operating systems. Linux/MIPS doesn't use all of them. The
161 * unused ones are here as placeholders; we might encounter them in
162 * non-Linux/MIPS object files or make use of them in the future.
163 */
164#define BRK_USERBP 0 /* User bp (used by debuggers) */
165#define BRK_KERNELBP 1 /* Break in the kernel */
166#define BRK_ABORT 2 /* Sometimes used by abort(3) to SIGIOT */
167#define BRK_BD_TAKEN 3 /* For bd slot emulation - not implemented */
168#define BRK_BD_NOTTAKEN 4 /* For bd slot emulation - not implemented */
169#define BRK_SSTEPBP 5 /* User bp (used by debuggers) */
170#define BRK_OVERFLOW 6 /* Overflow check */
171#define BRK_DIVZERO 7 /* Divide by zero check */
172#define BRK_RANGE 8 /* Range error check */
173#define BRK_STACKOVERFLOW 9 /* For Ada stackchecking */
174#define BRK_NORLD 10 /* No rld found - not used by Linux/MIPS */
175#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
176#define BRK_MULOVF 1023 /* Multiply overflow */
177#define BRK_BUG 512 /* Used by BUG() */
178
179#define ptrace_signal_deliver(regs, cookie) do { } while (0) 158#define ptrace_signal_deliver(regs, cookie) do { } while (0)
180 159
181#endif /* __KERNEL__ */ 160#endif /* __KERNEL__ */
diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h
index 048a2c7fd0c0..983e9a2b6042 100644
--- a/include/asm-parisc/atomic.h
+++ b/include/asm-parisc/atomic.h
@@ -164,6 +164,26 @@ static __inline__ int atomic_read(const atomic_t *v)
164} 164}
165 165
166/* exported interface */ 166/* exported interface */
167#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
168
169/**
170 * atomic_add_unless - add unless the number is a given value
171 * @v: pointer of type atomic_t
172 * @a: the amount to add to v...
173 * @u: ...unless v is equal to u.
174 *
175 * Atomically adds @a to @v, so long as it was not @u.
176 * Returns non-zero if @v was not @u, and zero otherwise.
177 */
178#define atomic_add_unless(v, a, u) \
179({ \
180 int c, old; \
181 c = atomic_read(v); \
182 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
183 c = old; \
184 c != (u); \
185})
186#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
167 187
168#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v)))) 188#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v))))
169#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v)))) 189#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v))))
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
index f876bdf22056..b0a30e2c9813 100644
--- a/include/asm-parisc/irq.h
+++ b/include/asm-parisc/irq.h
@@ -8,6 +8,7 @@
8#define _ASM_PARISC_IRQ_H 8#define _ASM_PARISC_IRQ_H
9 9
10#include <linux/config.h> 10#include <linux/config.h>
11#include <linux/cpumask.h>
11#include <asm/types.h> 12#include <asm/types.h>
12 13
13#define NO_IRQ (-1) 14#define NO_IRQ (-1)
@@ -49,10 +50,10 @@ extern int txn_alloc_irq(unsigned int nbits);
49extern int txn_claim_irq(int); 50extern int txn_claim_irq(int);
50extern unsigned int txn_alloc_data(unsigned int); 51extern unsigned int txn_alloc_data(unsigned int);
51extern unsigned long txn_alloc_addr(unsigned int); 52extern unsigned long txn_alloc_addr(unsigned int);
53extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
52 54
53extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *); 55extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
54 56extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
55extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
56 57
57/* soft power switch support (power.c) */ 58/* soft power switch support (power.c) */
58extern struct tasklet_struct power_tasklet; 59extern struct tasklet_struct power_tasklet;
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index 9413f67a540b..dbdbd2e9fdf9 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -29,6 +29,7 @@ extern cpumask_t cpu_online_map;
29#define cpu_logical_map(cpu) (cpu) 29#define cpu_logical_map(cpu) (cpu)
30 30
31extern void smp_send_reschedule(int cpu); 31extern void smp_send_reschedule(int cpu);
32extern void smp_send_all_nop(void);
32 33
33#endif /* !ASSEMBLY */ 34#endif /* !ASSEMBLY */
34 35
@@ -53,7 +54,11 @@ extern unsigned long cpu_present_mask;
53 54
54#define raw_smp_processor_id() (current_thread_info()->cpu) 55#define raw_smp_processor_id() (current_thread_info()->cpu)
55 56
56#endif /* CONFIG_SMP */ 57#else /* CONFIG_SMP */
58
59static inline void smp_send_all_nop(void) { return; }
60
61#endif
57 62
58#define NO_PROC_ID 0xFF /* No processor magic marker */ 63#define NO_PROC_ID 0xFF /* No processor magic marker */
59#define ANY_PROC_ID 0xFF /* Any processor magic marker */ 64#define ANY_PROC_ID 0xFF /* Any processor magic marker */
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h
index 7c3f406a746a..16c2ac075fc5 100644
--- a/include/asm-parisc/spinlock.h
+++ b/include/asm-parisc/spinlock.h
@@ -11,18 +11,25 @@ static inline int __raw_spin_is_locked(raw_spinlock_t *x)
11 return *a == 0; 11 return *a == 0;
12} 12}
13 13
14#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) 14#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0)
15#define __raw_spin_unlock_wait(x) \ 15#define __raw_spin_unlock_wait(x) \
16 do { cpu_relax(); } while (__raw_spin_is_locked(x)) 16 do { cpu_relax(); } while (__raw_spin_is_locked(x))
17 17
18static inline void __raw_spin_lock(raw_spinlock_t *x) 18static inline void __raw_spin_lock_flags(raw_spinlock_t *x,
19 unsigned long flags)
19{ 20{
20 volatile unsigned int *a; 21 volatile unsigned int *a;
21 22
22 mb(); 23 mb();
23 a = __ldcw_align(x); 24 a = __ldcw_align(x);
24 while (__ldcw(a) == 0) 25 while (__ldcw(a) == 0)
25 while (*a == 0); 26 while (*a == 0)
27 if (flags & PSW_SM_I) {
28 local_irq_enable();
29 cpu_relax();
30 local_irq_disable();
31 } else
32 cpu_relax();
26 mb(); 33 mb();
27} 34}
28 35
@@ -60,26 +67,20 @@ static inline int __raw_spin_trylock(raw_spinlock_t *x)
60 67
61static __inline__ void __raw_read_lock(raw_rwlock_t *rw) 68static __inline__ void __raw_read_lock(raw_rwlock_t *rw)
62{ 69{
63 unsigned long flags;
64 local_irq_save(flags);
65 __raw_spin_lock(&rw->lock); 70 __raw_spin_lock(&rw->lock);
66 71
67 rw->counter++; 72 rw->counter++;
68 73
69 __raw_spin_unlock(&rw->lock); 74 __raw_spin_unlock(&rw->lock);
70 local_irq_restore(flags);
71} 75}
72 76
73static __inline__ void __raw_read_unlock(raw_rwlock_t *rw) 77static __inline__ void __raw_read_unlock(raw_rwlock_t *rw)
74{ 78{
75 unsigned long flags;
76 local_irq_save(flags);
77 __raw_spin_lock(&rw->lock); 79 __raw_spin_lock(&rw->lock);
78 80
79 rw->counter--; 81 rw->counter--;
80 82
81 __raw_spin_unlock(&rw->lock); 83 __raw_spin_unlock(&rw->lock);
82 local_irq_restore(flags);
83} 84}
84 85
85/* write_lock is less trivial. We optimistically grab the lock and check 86/* write_lock is less trivial. We optimistically grab the lock and check
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index e97aa8d1eff5..c9ec39c6fc6c 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -12,21 +12,15 @@
12 * N class systems, only one PxTLB inter processor broadcast can be 12 * N class systems, only one PxTLB inter processor broadcast can be
13 * active at any one time on the Merced bus. This tlb purge 13 * active at any one time on the Merced bus. This tlb purge
14 * synchronisation is fairly lightweight and harmless so we activate 14 * synchronisation is fairly lightweight and harmless so we activate
15 * it on all SMP systems not just the N class. */ 15 * it on all SMP systems not just the N class. We also need to have
16#ifdef CONFIG_SMP 16 * preemption disabled on uniprocessor machines, and spin_lock does that
17 * nicely.
18 */
17extern spinlock_t pa_tlb_lock; 19extern spinlock_t pa_tlb_lock;
18 20
19#define purge_tlb_start(x) spin_lock(&pa_tlb_lock) 21#define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
20#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock) 22#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
21 23
22#else
23
24#define purge_tlb_start(x) do { } while(0)
25#define purge_tlb_end(x) do { } while (0)
26
27#endif
28
29
30extern void flush_tlb_all(void); 24extern void flush_tlb_all(void);
31 25
32/* 26/*
@@ -88,7 +82,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
88 if (npages >= 512) /* 2MB of space: arbitrary, should be tuned */ 82 if (npages >= 512) /* 2MB of space: arbitrary, should be tuned */
89 flush_tlb_all(); 83 flush_tlb_all();
90 else { 84 else {
91 preempt_disable();
92 mtsp(vma->vm_mm->context,1); 85 mtsp(vma->vm_mm->context,1);
93 purge_tlb_start(); 86 purge_tlb_start();
94 if (split_tlb) { 87 if (split_tlb) {
@@ -102,7 +95,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
102 pdtlb(start); 95 pdtlb(start);
103 start += PAGE_SIZE; 96 start += PAGE_SIZE;
104 } 97 }
105 preempt_enable();
106 } 98 }
107 purge_tlb_end(); 99 purge_tlb_end();
108 } 100 }
diff --git a/include/asm-ppc64/abs_addr.h b/include/asm-powerpc/abs_addr.h
index dc3fc3fefef2..18415108fc56 100644
--- a/include/asm-ppc64/abs_addr.h
+++ b/include/asm-powerpc/abs_addr.h
@@ -1,5 +1,5 @@
1#ifndef _ABS_ADDR_H 1#ifndef _ASM_POWERPC_ABS_ADDR_H
2#define _ABS_ADDR_H 2#define _ASM_POWERPC_ABS_ADDR_H
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5 5
@@ -70,4 +70,4 @@ static inline unsigned long phys_to_abs(unsigned long pa)
70#define iseries_hv_addr(virtaddr) \ 70#define iseries_hv_addr(virtaddr) \
71 (0x8000000000000000 | virt_to_abs(virtaddr)) 71 (0x8000000000000000 | virt_to_abs(virtaddr))
72 72
73#endif /* _ABS_ADDR_H */ 73#endif /* _ASM_POWERPC_ABS_ADDR_H */
diff --git a/include/asm-powerpc/asm-compat.h b/include/asm-powerpc/asm-compat.h
new file mode 100644
index 000000000000..8b133efc9f79
--- /dev/null
+++ b/include/asm-powerpc/asm-compat.h
@@ -0,0 +1,55 @@
1#ifndef _ASM_POWERPC_ASM_COMPAT_H
2#define _ASM_POWERPC_ASM_COMPAT_H
3
4#include <linux/config.h>
5#include <asm/types.h>
6
7#ifdef __ASSEMBLY__
8# define stringify_in_c(...) __VA_ARGS__
9# define ASM_CONST(x) x
10#else
11/* This version of stringify will deal with commas... */
12# define __stringify_in_c(...) #__VA_ARGS__
13# define stringify_in_c(...) __stringify_in_c(__VA_ARGS__) " "
14# define __ASM_CONST(x) x##UL
15# define ASM_CONST(x) __ASM_CONST(x)
16#endif
17
18#ifdef __powerpc64__
19
20/* operations for longs and pointers */
21#define PPC_LL stringify_in_c(ld)
22#define PPC_STL stringify_in_c(std)
23#define PPC_LCMPI stringify_in_c(cmpdi)
24#define PPC_LONG stringify_in_c(.llong)
25#define PPC_TLNEI stringify_in_c(tdnei)
26#define PPC_LLARX stringify_in_c(ldarx)
27#define PPC_STLCX stringify_in_c(stdcx.)
28#define PPC_CNTLZL stringify_in_c(cntlzd)
29
30#else /* 32-bit */
31
32/* operations for longs and pointers */
33#define PPC_LL stringify_in_c(lwz)
34#define PPC_STL stringify_in_c(stw)
35#define PPC_LCMPI stringify_in_c(cmpwi)
36#define PPC_LONG stringify_in_c(.long)
37#define PPC_TLNEI stringify_in_c(twnei)
38#define PPC_LLARX stringify_in_c(lwarx)
39#define PPC_STLCX stringify_in_c(stwcx.)
40#define PPC_CNTLZL stringify_in_c(cntlzw)
41
42#endif
43
44#ifdef CONFIG_IBM405_ERR77
45/* Erratum #77 on the 405 means we need a sync or dcbt before every
46 * stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this.
47 */
48#define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;)
49#define PPC405_ERR77_SYNC stringify_in_c(sync;)
50#else
51#define PPC405_ERR77(ra,rb)
52#define PPC405_ERR77_SYNC
53#endif
54
55#endif /* _ASM_POWERPC_ASM_COMPAT_H */
diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h
index ed4b345ed75d..ec4b14468959 100644
--- a/include/asm-powerpc/atomic.h
+++ b/include/asm-powerpc/atomic.h
@@ -9,21 +9,13 @@ typedef struct { volatile int counter; } atomic_t;
9 9
10#ifdef __KERNEL__ 10#ifdef __KERNEL__
11#include <asm/synch.h> 11#include <asm/synch.h>
12#include <asm/asm-compat.h>
12 13
13#define ATOMIC_INIT(i) { (i) } 14#define ATOMIC_INIT(i) { (i) }
14 15
15#define atomic_read(v) ((v)->counter) 16#define atomic_read(v) ((v)->counter)
16#define atomic_set(v,i) (((v)->counter) = (i)) 17#define atomic_set(v,i) (((v)->counter) = (i))
17 18
18/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
19 * The old ATOMIC_SYNC_FIX covered some but not all of this.
20 */
21#ifdef CONFIG_IBM405_ERR77
22#define PPC405_ERR77(ra,rb) "dcbt " #ra "," #rb ";"
23#else
24#define PPC405_ERR77(ra,rb)
25#endif
26
27static __inline__ void atomic_add(int a, atomic_t *v) 19static __inline__ void atomic_add(int a, atomic_t *v)
28{ 20{
29 int t; 21 int t;
@@ -172,6 +164,33 @@ static __inline__ int atomic_dec_return(atomic_t *v)
172 return t; 164 return t;
173} 165}
174 166
167#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
168
169/**
170 * atomic_add_unless - add unless the number is a given value
171 * @v: pointer of type atomic_t
172 * @a: the amount to add to v...
173 * @u: ...unless v is equal to u.
174 *
175 * Atomically adds @a to @v, so long as it was not @u.
176 * Returns non-zero if @v was not @u, and zero otherwise.
177 */
178#define atomic_add_unless(v, a, u) \
179({ \
180 int c, old; \
181 c = atomic_read(v); \
182 for (;;) { \
183 if (unlikely(c == (u))) \
184 break; \
185 old = atomic_cmpxchg((v), c, c + (a)); \
186 if (likely(old == c)) \
187 break; \
188 c = old; \
189 } \
190 c != (u); \
191})
192#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
193
175#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0) 194#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
176#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0) 195#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
177 196
@@ -205,5 +224,183 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
205#define smp_mb__before_atomic_inc() smp_mb() 224#define smp_mb__before_atomic_inc() smp_mb()
206#define smp_mb__after_atomic_inc() smp_mb() 225#define smp_mb__after_atomic_inc() smp_mb()
207 226
227#ifdef __powerpc64__
228
229typedef struct { volatile long counter; } atomic64_t;
230
231#define ATOMIC64_INIT(i) { (i) }
232
233#define atomic64_read(v) ((v)->counter)
234#define atomic64_set(v,i) (((v)->counter) = (i))
235
236static __inline__ void atomic64_add(long a, atomic64_t *v)
237{
238 long t;
239
240 __asm__ __volatile__(
241"1: ldarx %0,0,%3 # atomic64_add\n\
242 add %0,%2,%0\n\
243 stdcx. %0,0,%3 \n\
244 bne- 1b"
245 : "=&r" (t), "=m" (v->counter)
246 : "r" (a), "r" (&v->counter), "m" (v->counter)
247 : "cc");
248}
249
250static __inline__ long atomic64_add_return(long a, atomic64_t *v)
251{
252 long t;
253
254 __asm__ __volatile__(
255 EIEIO_ON_SMP
256"1: ldarx %0,0,%2 # atomic64_add_return\n\
257 add %0,%1,%0\n\
258 stdcx. %0,0,%2 \n\
259 bne- 1b"
260 ISYNC_ON_SMP
261 : "=&r" (t)
262 : "r" (a), "r" (&v->counter)
263 : "cc", "memory");
264
265 return t;
266}
267
268#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
269
270static __inline__ void atomic64_sub(long a, atomic64_t *v)
271{
272 long t;
273
274 __asm__ __volatile__(
275"1: ldarx %0,0,%3 # atomic64_sub\n\
276 subf %0,%2,%0\n\
277 stdcx. %0,0,%3 \n\
278 bne- 1b"
279 : "=&r" (t), "=m" (v->counter)
280 : "r" (a), "r" (&v->counter), "m" (v->counter)
281 : "cc");
282}
283
284static __inline__ long atomic64_sub_return(long a, atomic64_t *v)
285{
286 long t;
287
288 __asm__ __volatile__(
289 EIEIO_ON_SMP
290"1: ldarx %0,0,%2 # atomic64_sub_return\n\
291 subf %0,%1,%0\n\
292 stdcx. %0,0,%2 \n\
293 bne- 1b"
294 ISYNC_ON_SMP
295 : "=&r" (t)
296 : "r" (a), "r" (&v->counter)
297 : "cc", "memory");
298
299 return t;
300}
301
302static __inline__ void atomic64_inc(atomic64_t *v)
303{
304 long t;
305
306 __asm__ __volatile__(
307"1: ldarx %0,0,%2 # atomic64_inc\n\
308 addic %0,%0,1\n\
309 stdcx. %0,0,%2 \n\
310 bne- 1b"
311 : "=&r" (t), "=m" (v->counter)
312 : "r" (&v->counter), "m" (v->counter)
313 : "cc");
314}
315
316static __inline__ long atomic64_inc_return(atomic64_t *v)
317{
318 long t;
319
320 __asm__ __volatile__(
321 EIEIO_ON_SMP
322"1: ldarx %0,0,%1 # atomic64_inc_return\n\
323 addic %0,%0,1\n\
324 stdcx. %0,0,%1 \n\
325 bne- 1b"
326 ISYNC_ON_SMP
327 : "=&r" (t)
328 : "r" (&v->counter)
329 : "cc", "memory");
330
331 return t;
332}
333
334/*
335 * atomic64_inc_and_test - increment and test
336 * @v: pointer of type atomic64_t
337 *
338 * Atomically increments @v by 1
339 * and returns true if the result is zero, or false for all
340 * other cases.
341 */
342#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
343
344static __inline__ void atomic64_dec(atomic64_t *v)
345{
346 long t;
347
348 __asm__ __volatile__(
349"1: ldarx %0,0,%2 # atomic64_dec\n\
350 addic %0,%0,-1\n\
351 stdcx. %0,0,%2\n\
352 bne- 1b"
353 : "=&r" (t), "=m" (v->counter)
354 : "r" (&v->counter), "m" (v->counter)
355 : "cc");
356}
357
358static __inline__ long atomic64_dec_return(atomic64_t *v)
359{
360 long t;
361
362 __asm__ __volatile__(
363 EIEIO_ON_SMP
364"1: ldarx %0,0,%1 # atomic64_dec_return\n\
365 addic %0,%0,-1\n\
366 stdcx. %0,0,%1\n\
367 bne- 1b"
368 ISYNC_ON_SMP
369 : "=&r" (t)
370 : "r" (&v->counter)
371 : "cc", "memory");
372
373 return t;
374}
375
376#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0)
377#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
378
379/*
380 * Atomically test *v and decrement if it is greater than 0.
381 * The function returns the old value of *v minus 1.
382 */
383static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
384{
385 long t;
386
387 __asm__ __volatile__(
388 EIEIO_ON_SMP
389"1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\
390 addic. %0,%0,-1\n\
391 blt- 2f\n\
392 stdcx. %0,0,%1\n\
393 bne- 1b"
394 ISYNC_ON_SMP
395 "\n\
3962:" : "=&r" (t)
397 : "r" (&v->counter)
398 : "cc", "memory");
399
400 return t;
401}
402
403#endif /* __powerpc64__ */
404
208#endif /* __KERNEL__ */ 405#endif /* __KERNEL__ */
209#endif /* _ASM_POWERPC_ATOMIC_H_ */ 406#endif /* _ASM_POWERPC_ATOMIC_H_ */
diff --git a/include/asm-powerpc/auxvec.h b/include/asm-powerpc/auxvec.h
index 79d8c4732309..19a099b62cd6 100644
--- a/include/asm-powerpc/auxvec.h
+++ b/include/asm-powerpc/auxvec.h
@@ -14,8 +14,6 @@
14/* The vDSO location. We have to use the same value as x86 for glibc's 14/* The vDSO location. We have to use the same value as x86 for glibc's
15 * sake :-) 15 * sake :-)
16 */ 16 */
17#ifdef __powerpc64__
18#define AT_SYSINFO_EHDR 33 17#define AT_SYSINFO_EHDR 33
19#endif
20 18
21#endif 19#endif
diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h
index dc25c53704d5..5727229b0444 100644
--- a/include/asm-powerpc/bitops.h
+++ b/include/asm-powerpc/bitops.h
@@ -40,6 +40,7 @@
40 40
41#include <linux/compiler.h> 41#include <linux/compiler.h>
42#include <asm/atomic.h> 42#include <asm/atomic.h>
43#include <asm/asm-compat.h>
43#include <asm/synch.h> 44#include <asm/synch.h>
44 45
45/* 46/*
@@ -52,16 +53,6 @@
52#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG) 53#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
53#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7) 54#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
54 55
55#ifdef CONFIG_PPC64
56#define LARXL "ldarx"
57#define STCXL "stdcx."
58#define CNTLZL "cntlzd"
59#else
60#define LARXL "lwarx"
61#define STCXL "stwcx."
62#define CNTLZL "cntlzw"
63#endif
64
65static __inline__ void set_bit(int nr, volatile unsigned long *addr) 56static __inline__ void set_bit(int nr, volatile unsigned long *addr)
66{ 57{
67 unsigned long old; 58 unsigned long old;
@@ -69,10 +60,10 @@ static __inline__ void set_bit(int nr, volatile unsigned long *addr)
69 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); 60 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
70 61
71 __asm__ __volatile__( 62 __asm__ __volatile__(
72"1:" LARXL " %0,0,%3 # set_bit\n" 63"1:" PPC_LLARX "%0,0,%3 # set_bit\n"
73 "or %0,%0,%2\n" 64 "or %0,%0,%2\n"
74 PPC405_ERR77(0,%3) 65 PPC405_ERR77(0,%3)
75 STCXL " %0,0,%3\n" 66 PPC_STLCX "%0,0,%3\n"
76 "bne- 1b" 67 "bne- 1b"
77 : "=&r"(old), "=m"(*p) 68 : "=&r"(old), "=m"(*p)
78 : "r"(mask), "r"(p), "m"(*p) 69 : "r"(mask), "r"(p), "m"(*p)
@@ -86,10 +77,10 @@ static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
86 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); 77 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
87 78
88 __asm__ __volatile__( 79 __asm__ __volatile__(
89"1:" LARXL " %0,0,%3 # set_bit\n" 80"1:" PPC_LLARX "%0,0,%3 # clear_bit\n"
90 "andc %0,%0,%2\n" 81 "andc %0,%0,%2\n"
91 PPC405_ERR77(0,%3) 82 PPC405_ERR77(0,%3)
92 STCXL " %0,0,%3\n" 83 PPC_STLCX "%0,0,%3\n"
93 "bne- 1b" 84 "bne- 1b"
94 : "=&r"(old), "=m"(*p) 85 : "=&r"(old), "=m"(*p)
95 : "r"(mask), "r"(p), "m"(*p) 86 : "r"(mask), "r"(p), "m"(*p)
@@ -103,10 +94,10 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr)
103 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); 94 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
104 95
105 __asm__ __volatile__( 96 __asm__ __volatile__(
106"1:" LARXL " %0,0,%3 # set_bit\n" 97"1:" PPC_LLARX "%0,0,%3 # change_bit\n"
107 "xor %0,%0,%2\n" 98 "xor %0,%0,%2\n"
108 PPC405_ERR77(0,%3) 99 PPC405_ERR77(0,%3)
109 STCXL " %0,0,%3\n" 100 PPC_STLCX "%0,0,%3\n"
110 "bne- 1b" 101 "bne- 1b"
111 : "=&r"(old), "=m"(*p) 102 : "=&r"(old), "=m"(*p)
112 : "r"(mask), "r"(p), "m"(*p) 103 : "r"(mask), "r"(p), "m"(*p)
@@ -122,10 +113,10 @@ static __inline__ int test_and_set_bit(unsigned long nr,
122 113
123 __asm__ __volatile__( 114 __asm__ __volatile__(
124 EIEIO_ON_SMP 115 EIEIO_ON_SMP
125"1:" LARXL " %0,0,%3 # test_and_set_bit\n" 116"1:" PPC_LLARX "%0,0,%3 # test_and_set_bit\n"
126 "or %1,%0,%2 \n" 117 "or %1,%0,%2 \n"
127 PPC405_ERR77(0,%3) 118 PPC405_ERR77(0,%3)
128 STCXL " %1,0,%3 \n" 119 PPC_STLCX "%1,0,%3 \n"
129 "bne- 1b" 120 "bne- 1b"
130 ISYNC_ON_SMP 121 ISYNC_ON_SMP
131 : "=&r" (old), "=&r" (t) 122 : "=&r" (old), "=&r" (t)
@@ -144,10 +135,10 @@ static __inline__ int test_and_clear_bit(unsigned long nr,
144 135
145 __asm__ __volatile__( 136 __asm__ __volatile__(
146 EIEIO_ON_SMP 137 EIEIO_ON_SMP
147"1:" LARXL " %0,0,%3 # test_and_clear_bit\n" 138"1:" PPC_LLARX "%0,0,%3 # test_and_clear_bit\n"
148 "andc %1,%0,%2 \n" 139 "andc %1,%0,%2 \n"
149 PPC405_ERR77(0,%3) 140 PPC405_ERR77(0,%3)
150 STCXL " %1,0,%3 \n" 141 PPC_STLCX "%1,0,%3 \n"
151 "bne- 1b" 142 "bne- 1b"
152 ISYNC_ON_SMP 143 ISYNC_ON_SMP
153 : "=&r" (old), "=&r" (t) 144 : "=&r" (old), "=&r" (t)
@@ -166,10 +157,10 @@ static __inline__ int test_and_change_bit(unsigned long nr,
166 157
167 __asm__ __volatile__( 158 __asm__ __volatile__(
168 EIEIO_ON_SMP 159 EIEIO_ON_SMP
169"1:" LARXL " %0,0,%3 # test_and_change_bit\n" 160"1:" PPC_LLARX "%0,0,%3 # test_and_change_bit\n"
170 "xor %1,%0,%2 \n" 161 "xor %1,%0,%2 \n"
171 PPC405_ERR77(0,%3) 162 PPC405_ERR77(0,%3)
172 STCXL " %1,0,%3 \n" 163 PPC_STLCX "%1,0,%3 \n"
173 "bne- 1b" 164 "bne- 1b"
174 ISYNC_ON_SMP 165 ISYNC_ON_SMP
175 : "=&r" (old), "=&r" (t) 166 : "=&r" (old), "=&r" (t)
@@ -184,9 +175,9 @@ static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
184 unsigned long old; 175 unsigned long old;
185 176
186 __asm__ __volatile__( 177 __asm__ __volatile__(
187"1:" LARXL " %0,0,%3 # set_bit\n" 178"1:" PPC_LLARX "%0,0,%3 # set_bits\n"
188 "or %0,%0,%2\n" 179 "or %0,%0,%2\n"
189 STCXL " %0,0,%3\n" 180 PPC_STLCX "%0,0,%3\n"
190 "bne- 1b" 181 "bne- 1b"
191 : "=&r" (old), "=m" (*addr) 182 : "=&r" (old), "=m" (*addr)
192 : "r" (mask), "r" (addr), "m" (*addr) 183 : "r" (mask), "r" (addr), "m" (*addr)
@@ -268,7 +259,7 @@ static __inline__ int __ilog2(unsigned long x)
268{ 259{
269 int lz; 260 int lz;
270 261
271 asm (CNTLZL " %0,%1" : "=r" (lz) : "r" (x)); 262 asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x));
272 return BITS_PER_LONG - 1 - lz; 263 return BITS_PER_LONG - 1 - lz;
273} 264}
274 265
diff --git a/include/asm-ppc64/btext.h b/include/asm-powerpc/btext.h
index 71cce36bc630..71cce36bc630 100644
--- a/include/asm-ppc64/btext.h
+++ b/include/asm-powerpc/btext.h
diff --git a/include/asm-powerpc/bug.h b/include/asm-powerpc/bug.h
index d625ee55f957..b001ecb3cd99 100644
--- a/include/asm-powerpc/bug.h
+++ b/include/asm-powerpc/bug.h
@@ -1,6 +1,7 @@
1#ifndef _ASM_POWERPC_BUG_H 1#ifndef _ASM_POWERPC_BUG_H
2#define _ASM_POWERPC_BUG_H 2#define _ASM_POWERPC_BUG_H
3 3
4#include <asm/asm-compat.h>
4/* 5/*
5 * Define an illegal instr to trap on the bug. 6 * Define an illegal instr to trap on the bug.
6 * We don't use 0 because that marks the end of a function 7 * We don't use 0 because that marks the end of a function
@@ -11,14 +12,6 @@
11 12
12#ifndef __ASSEMBLY__ 13#ifndef __ASSEMBLY__
13 14
14#ifdef __powerpc64__
15#define BUG_TABLE_ENTRY ".llong"
16#define BUG_TRAP_OP "tdnei"
17#else
18#define BUG_TABLE_ENTRY ".long"
19#define BUG_TRAP_OP "twnei"
20#endif /* __powerpc64__ */
21
22struct bug_entry { 15struct bug_entry {
23 unsigned long bug_addr; 16 unsigned long bug_addr;
24 long line; 17 long line;
@@ -40,16 +33,16 @@ struct bug_entry *find_bug(unsigned long bugaddr);
40 __asm__ __volatile__( \ 33 __asm__ __volatile__( \
41 "1: twi 31,0,0\n" \ 34 "1: twi 31,0,0\n" \
42 ".section __bug_table,\"a\"\n" \ 35 ".section __bug_table,\"a\"\n" \
43 "\t"BUG_TABLE_ENTRY" 1b,%0,%1,%2\n" \ 36 "\t"PPC_LONG" 1b,%0,%1,%2\n" \
44 ".previous" \ 37 ".previous" \
45 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ 38 : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
46} while (0) 39} while (0)
47 40
48#define BUG_ON(x) do { \ 41#define BUG_ON(x) do { \
49 __asm__ __volatile__( \ 42 __asm__ __volatile__( \
50 "1: "BUG_TRAP_OP" %0,0\n" \ 43 "1: "PPC_TLNEI" %0,0\n" \
51 ".section __bug_table,\"a\"\n" \ 44 ".section __bug_table,\"a\"\n" \
52 "\t"BUG_TABLE_ENTRY" 1b,%1,%2,%3\n" \ 45 "\t"PPC_LONG" 1b,%1,%2,%3\n" \
53 ".previous" \ 46 ".previous" \
54 : : "r" ((long)(x)), "i" (__LINE__), \ 47 : : "r" ((long)(x)), "i" (__LINE__), \
55 "i" (__FILE__), "i" (__FUNCTION__)); \ 48 "i" (__FILE__), "i" (__FUNCTION__)); \
@@ -57,9 +50,9 @@ struct bug_entry *find_bug(unsigned long bugaddr);
57 50
58#define WARN_ON(x) do { \ 51#define WARN_ON(x) do { \
59 __asm__ __volatile__( \ 52 __asm__ __volatile__( \
60 "1: "BUG_TRAP_OP" %0,0\n" \ 53 "1: "PPC_TLNEI" %0,0\n" \
61 ".section __bug_table,\"a\"\n" \ 54 ".section __bug_table,\"a\"\n" \
62 "\t"BUG_TABLE_ENTRY" 1b,%1,%2,%3\n" \ 55 "\t"PPC_LONG" 1b,%1,%2,%3\n" \
63 ".previous" \ 56 ".previous" \
64 : : "r" ((long)(x)), \ 57 : : "r" ((long)(x)), \
65 "i" (__LINE__ + BUG_WARNING_TRAP), \ 58 "i" (__LINE__ + BUG_WARNING_TRAP), \
diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h
new file mode 100644
index 000000000000..26ce502e76e8
--- /dev/null
+++ b/include/asm-powerpc/cache.h
@@ -0,0 +1,40 @@
1#ifndef _ASM_POWERPC_CACHE_H
2#define _ASM_POWERPC_CACHE_H
3
4#ifdef __KERNEL__
5
6#include <linux/config.h>
7
8/* bytes per L1 cache line */
9#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
10#define L1_CACHE_SHIFT 4
11#define MAX_COPY_PREFETCH 1
12#elif defined(CONFIG_PPC32)
13#define L1_CACHE_SHIFT 5
14#define MAX_COPY_PREFETCH 4
15#else /* CONFIG_PPC64 */
16#define L1_CACHE_SHIFT 7
17#endif
18
19#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
20
21#define SMP_CACHE_BYTES L1_CACHE_BYTES
22#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
23
24#if defined(__powerpc64__) && !defined(__ASSEMBLY__)
25struct ppc64_caches {
26 u32 dsize; /* L1 d-cache size */
27 u32 dline_size; /* L1 d-cache line size */
28 u32 log_dline_size;
29 u32 dlines_per_page;
30 u32 isize; /* L1 i-cache size */
31 u32 iline_size; /* L1 i-cache line size */
32 u32 log_iline_size;
33 u32 ilines_per_page;
34};
35
36extern struct ppc64_caches ppc64_caches;
37#endif /* __powerpc64__ && ! __ASSEMBLY__ */
38
39#endif /* __KERNEL__ */
40#endif /* _ASM_POWERPC_CACHE_H */
diff --git a/include/asm-ppc64/cacheflush.h b/include/asm-powerpc/cacheflush.h
index ffbc08be8e52..8a740c88d93d 100644
--- a/include/asm-ppc64/cacheflush.h
+++ b/include/asm-powerpc/cacheflush.h
@@ -1,13 +1,20 @@
1#ifndef _PPC64_CACHEFLUSH_H 1/*
2#define _PPC64_CACHEFLUSH_H 2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version
5 * 2 of the License, or (at your option) any later version.
6 */
7#ifndef _ASM_POWERPC_CACHEFLUSH_H
8#define _ASM_POWERPC_CACHEFLUSH_H
9
10#ifdef __KERNEL__
3 11
4#include <linux/mm.h> 12#include <linux/mm.h>
5#include <asm/cputable.h> 13#include <asm/cputable.h>
6 14
7/* 15/*
8 * No cache flushing is required when address mappings are 16 * No cache flushing is required when address mappings are changed,
9 * changed, because the caches on PowerPCs are physically 17 * because the caches on PowerPCs are physically addressed.
10 * addressed.
11 */ 18 */
12#define flush_cache_all() do { } while (0) 19#define flush_cache_all() do { } while (0)
13#define flush_cache_mm(mm) do { } while (0) 20#define flush_cache_mm(mm) do { } while (0)
@@ -22,27 +29,40 @@ extern void flush_dcache_page(struct page *page);
22#define flush_dcache_mmap_unlock(mapping) do { } while (0) 29#define flush_dcache_mmap_unlock(mapping) do { } while (0)
23 30
24extern void __flush_icache_range(unsigned long, unsigned long); 31extern void __flush_icache_range(unsigned long, unsigned long);
32static inline void flush_icache_range(unsigned long start, unsigned long stop)
33{
34 if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
35 __flush_icache_range(start, stop);
36}
37
25extern void flush_icache_user_range(struct vm_area_struct *vma, 38extern void flush_icache_user_range(struct vm_area_struct *vma,
26 struct page *page, unsigned long addr, 39 struct page *page, unsigned long addr,
27 int len); 40 int len);
41extern void __flush_dcache_icache(void *page_va);
42extern void flush_dcache_icache_page(struct page *page);
43#if defined(CONFIG_PPC32) && !defined(CONFIG_BOOKE)
44extern void __flush_dcache_icache_phys(unsigned long physaddr);
45#endif /* CONFIG_PPC32 && !CONFIG_BOOKE */
28 46
29extern void flush_dcache_range(unsigned long start, unsigned long stop); 47extern void flush_dcache_range(unsigned long start, unsigned long stop);
30extern void flush_dcache_phys_range(unsigned long start, unsigned long stop); 48#ifdef CONFIG_PPC32
49extern void clean_dcache_range(unsigned long start, unsigned long stop);
50extern void invalidate_dcache_range(unsigned long start, unsigned long stop);
51#endif /* CONFIG_PPC32 */
52#ifdef CONFIG_PPC64
31extern void flush_inval_dcache_range(unsigned long start, unsigned long stop); 53extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
54extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
55#endif
32 56
33#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 57#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
34do { memcpy(dst, src, len); \ 58 do { \
35 flush_icache_user_range(vma, page, vaddr, len); \ 59 memcpy(dst, src, len); \
36} while (0) 60 flush_icache_user_range(vma, page, vaddr, len); \
61 } while (0)
37#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ 62#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
38 memcpy(dst, src, len) 63 memcpy(dst, src, len)
39 64
40extern void __flush_dcache_icache(void *page_va);
41 65
42static inline void flush_icache_range(unsigned long start, unsigned long stop) 66#endif /* __KERNEL__ */
43{
44 if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
45 __flush_icache_range(start, stop);
46}
47 67
48#endif /* _PPC64_CACHEFLUSH_H */ 68#endif /* _ASM_POWERPC_CACHEFLUSH_H */
diff --git a/include/asm-ppc64/compat.h b/include/asm-powerpc/compat.h
index 6ec62cd2d1d1..4db4360c4d4a 100644
--- a/include/asm-ppc64/compat.h
+++ b/include/asm-powerpc/compat.h
@@ -1,5 +1,5 @@
1#ifndef _ASM_PPC64_COMPAT_H 1#ifndef _ASM_POWERPC_COMPAT_H
2#define _ASM_PPC64_COMPAT_H 2#define _ASM_POWERPC_COMPAT_H
3/* 3/*
4 * Architecture specific compatibility types 4 * Architecture specific compatibility types
5 */ 5 */
@@ -49,7 +49,7 @@ struct compat_stat {
49 compat_dev_t st_dev; 49 compat_dev_t st_dev;
50 compat_ino_t st_ino; 50 compat_ino_t st_ino;
51 compat_mode_t st_mode; 51 compat_mode_t st_mode;
52 compat_nlink_t st_nlink; 52 compat_nlink_t st_nlink;
53 __compat_uid32_t st_uid; 53 __compat_uid32_t st_uid;
54 __compat_gid32_t st_gid; 54 __compat_gid32_t st_gid;
55 compat_dev_t st_rdev; 55 compat_dev_t st_rdev;
@@ -202,4 +202,4 @@ struct compat_shmid64_ds {
202 compat_ulong_t __unused6; 202 compat_ulong_t __unused6;
203}; 203};
204 204
205#endif /* _ASM_PPC64_COMPAT_H */ 205#endif /* _ASM_POWERPC_COMPAT_H */
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 79a0556a0ab8..d1cfa3f515ea 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -2,7 +2,7 @@
2#define __ASM_POWERPC_CPUTABLE_H 2#define __ASM_POWERPC_CPUTABLE_H
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5#include <asm/ppc_asm.h> /* for ASM_CONST */ 5#include <asm/asm-compat.h>
6 6
7#define PPC_FEATURE_32 0x80000000 7#define PPC_FEATURE_32 0x80000000
8#define PPC_FEATURE_64 0x40000000 8#define PPC_FEATURE_64 0x40000000
@@ -16,6 +16,10 @@
16#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 16#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
17#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 17#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
18#define PPC_FEATURE_NO_TB 0x00100000 18#define PPC_FEATURE_NO_TB 0x00100000
19#define PPC_FEATURE_POWER4 0x00080000
20#define PPC_FEATURE_POWER5 0x00040000
21#define PPC_FEATURE_POWER5_PLUS 0x00020000
22#define PPC_FEATURE_CELL 0x00010000
19 23
20#ifdef __KERNEL__ 24#ifdef __KERNEL__
21#ifndef __ASSEMBLY__ 25#ifndef __ASSEMBLY__
@@ -86,6 +90,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
86#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) 90#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000)
87#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) 91#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000)
88#define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000) 92#define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000)
93#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000)
89 94
90#ifdef __powerpc64__ 95#ifdef __powerpc64__
91/* Add the 64b processor unique features in the top half of the word */ 96/* Add the 64b processor unique features in the top half of the word */
@@ -93,7 +98,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
93#define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) 98#define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000)
94#define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) 99#define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000)
95#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) 100#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000)
96#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000)
97#define CPU_FTR_IABR ASM_CONST(0x0000002000000000) 101#define CPU_FTR_IABR ASM_CONST(0x0000002000000000)
98#define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) 102#define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000)
99#define CPU_FTR_CTRL ASM_CONST(0x0000008000000000) 103#define CPU_FTR_CTRL ASM_CONST(0x0000008000000000)
@@ -109,7 +113,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
109#define CPU_FTR_16M_PAGE ASM_CONST(0x0) 113#define CPU_FTR_16M_PAGE ASM_CONST(0x0)
110#define CPU_FTR_TLBIEL ASM_CONST(0x0) 114#define CPU_FTR_TLBIEL ASM_CONST(0x0)
111#define CPU_FTR_NOEXECUTE ASM_CONST(0x0) 115#define CPU_FTR_NOEXECUTE ASM_CONST(0x0)
112#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0)
113#define CPU_FTR_IABR ASM_CONST(0x0) 116#define CPU_FTR_IABR ASM_CONST(0x0)
114#define CPU_FTR_MMCRA ASM_CONST(0x0) 117#define CPU_FTR_MMCRA ASM_CONST(0x0)
115#define CPU_FTR_CTRL ASM_CONST(0x0) 118#define CPU_FTR_CTRL ASM_CONST(0x0)
@@ -269,18 +272,21 @@ enum {
269 CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 272 CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
270 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, 273 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
271 CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 274 CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
272 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE, 275 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_NODSISRALIGN,
273 CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | 276 CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
274 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP | 277 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP |
275 CPU_FTR_MAYBE_CAN_NAP, 278 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN,
276 CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, 279 CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
277 CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, 280 CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
278 CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, 281 CPU_FTR_NODSISRALIGN,
279 CPU_FTRS_E200 = CPU_FTR_USE_TB, 282 CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
280 CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB, 283 CPU_FTR_NODSISRALIGN,
284 CPU_FTRS_E200 = CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN,
285 CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
286 CPU_FTR_NODSISRALIGN,
281 CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 287 CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
282 CPU_FTR_BIG_PHYS, 288 CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN,
283 CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON, 289 CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN,
284#ifdef __powerpc64__ 290#ifdef __powerpc64__
285 CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 291 CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
286 CPU_FTR_HPTE_TABLE | CPU_FTR_IABR, 292 CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
diff --git a/include/asm-powerpc/current.h b/include/asm-powerpc/current.h
new file mode 100644
index 000000000000..82cd4a9ca99a
--- /dev/null
+++ b/include/asm-powerpc/current.h
@@ -0,0 +1,27 @@
1#ifndef _ASM_POWERPC_CURRENT_H
2#define _ASM_POWERPC_CURRENT_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11struct task_struct;
12
13#ifdef __powerpc64__
14#include <asm/paca.h>
15
16#define current (get_paca()->__current)
17
18#else
19
20/*
21 * We keep `current' in r2 for speed.
22 */
23register struct task_struct *current asm ("r2");
24
25#endif
26
27#endif /* _ASM_POWERPC_CURRENT_H */
diff --git a/include/asm-powerpc/delay.h b/include/asm-powerpc/delay.h
new file mode 100644
index 000000000000..54fe1f4f8fd0
--- /dev/null
+++ b/include/asm-powerpc/delay.h
@@ -0,0 +1,19 @@
1#ifndef _ASM_POWERPC_DELAY_H
2#define _ASM_POWERPC_DELAY_H
3
4/*
5 * Copyright 1996, Paul Mackerras.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * PPC64 Support added by Dave Engebretsen, Todd Inglett, Mike Corrigan,
13 * Anton Blanchard.
14 */
15
16extern void __delay(unsigned long loops);
17extern void udelay(unsigned long usecs);
18
19#endif /* _ASM_POWERPC_DELAY_H */
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index 6e9635114433..59a80163f75f 100644
--- a/include/asm-ppc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -1,15 +1,22 @@
1/* 1/*
2 * This is based on both include/asm-sh/dma-mapping.h and 2 * Copyright (C) 2004 IBM
3 * include/asm-ppc/pci.h 3 *
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
4 */ 6 */
5#ifndef __ASM_PPC_DMA_MAPPING_H 7#ifndef _ASM_DMA_MAPPING_H
6#define __ASM_PPC_DMA_MAPPING_H 8#define _ASM_DMA_MAPPING_H
7 9
8#include <linux/config.h> 10#include <linux/config.h>
11#include <linux/types.h>
12#include <linux/cache.h>
9/* need struct page definitions */ 13/* need struct page definitions */
10#include <linux/mm.h> 14#include <linux/mm.h>
11#include <asm/scatterlist.h> 15#include <asm/scatterlist.h>
12#include <asm/io.h> 16#include <asm/io.h>
17#include <asm/bug.h>
18
19#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
13 20
14#ifdef CONFIG_NOT_COHERENT_CACHE 21#ifdef CONFIG_NOT_COHERENT_CACHE
15/* 22/*
@@ -24,22 +31,12 @@ extern void __dma_free_coherent(size_t size, void *vaddr);
24extern void __dma_sync(void *vaddr, size_t size, int direction); 31extern void __dma_sync(void *vaddr, size_t size, int direction);
25extern void __dma_sync_page(struct page *page, unsigned long offset, 32extern void __dma_sync_page(struct page *page, unsigned long offset,
26 size_t size, int direction); 33 size_t size, int direction);
27#define dma_cache_inv(_start,_size) \
28 invalidate_dcache_range(_start, (_start + _size))
29#define dma_cache_wback(_start,_size) \
30 clean_dcache_range(_start, (_start + _size))
31#define dma_cache_wback_inv(_start,_size) \
32 flush_dcache_range(_start, (_start + _size))
33 34
34#else /* ! CONFIG_NOT_COHERENT_CACHE */ 35#else /* ! CONFIG_NOT_COHERENT_CACHE */
35/* 36/*
36 * Cache coherent cores. 37 * Cache coherent cores.
37 */ 38 */
38 39
39#define dma_cache_inv(_start,_size) do { } while (0)
40#define dma_cache_wback(_start,_size) do { } while (0)
41#define dma_cache_wback_inv(_start,_size) do { } while (0)
42
43#define __dma_alloc_coherent(gfp, size, handle) NULL 40#define __dma_alloc_coherent(gfp, size, handle) NULL
44#define __dma_free_coherent(size, addr) do { } while (0) 41#define __dma_free_coherent(size, addr) do { } while (0)
45#define __dma_sync(addr, size, rw) do { } while (0) 42#define __dma_sync(addr, size, rw) do { } while (0)
@@ -47,6 +44,30 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
47 44
48#endif /* ! CONFIG_NOT_COHERENT_CACHE */ 45#endif /* ! CONFIG_NOT_COHERENT_CACHE */
49 46
47#ifdef CONFIG_PPC64
48
49extern int dma_supported(struct device *dev, u64 mask);
50extern int dma_set_mask(struct device *dev, u64 dma_mask);
51extern void *dma_alloc_coherent(struct device *dev, size_t size,
52 dma_addr_t *dma_handle, gfp_t flag);
53extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
54 dma_addr_t dma_handle);
55extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
56 size_t size, enum dma_data_direction direction);
57extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
58 size_t size, enum dma_data_direction direction);
59extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
60 unsigned long offset, size_t size,
61 enum dma_data_direction direction);
62extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
63 size_t size, enum dma_data_direction direction);
64extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
65 enum dma_data_direction direction);
66extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
67 int nhwentries, enum dma_data_direction direction);
68
69#else /* CONFIG_PPC64 */
70
50#define dma_supported(dev, mask) (1) 71#define dma_supported(dev, mask) (1)
51 72
52static inline int dma_set_mask(struct device *dev, u64 dma_mask) 73static inline int dma_set_mask(struct device *dev, u64 dma_mask)
@@ -144,29 +165,27 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
144/* We don't do anything here. */ 165/* We don't do anything here. */
145#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) 166#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0)
146 167
147static inline void 168#endif /* CONFIG_PPC64 */
148dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, 169
149 size_t size, 170static inline void dma_sync_single_for_cpu(struct device *dev,
150 enum dma_data_direction direction) 171 dma_addr_t dma_handle, size_t size,
172 enum dma_data_direction direction)
151{ 173{
152 BUG_ON(direction == DMA_NONE); 174 BUG_ON(direction == DMA_NONE);
153
154 __dma_sync(bus_to_virt(dma_handle), size, direction); 175 __dma_sync(bus_to_virt(dma_handle), size, direction);
155} 176}
156 177
157static inline void 178static inline void dma_sync_single_for_device(struct device *dev,
158dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, 179 dma_addr_t dma_handle, size_t size,
159 size_t size, 180 enum dma_data_direction direction)
160 enum dma_data_direction direction)
161{ 181{
162 BUG_ON(direction == DMA_NONE); 182 BUG_ON(direction == DMA_NONE);
163
164 __dma_sync(bus_to_virt(dma_handle), size, direction); 183 __dma_sync(bus_to_virt(dma_handle), size, direction);
165} 184}
166 185
167static inline void 186static inline void dma_sync_sg_for_cpu(struct device *dev,
168dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, 187 struct scatterlist *sg, int nents,
169 enum dma_data_direction direction) 188 enum dma_data_direction direction)
170{ 189{
171 int i; 190 int i;
172 191
@@ -176,9 +195,9 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
176 __dma_sync_page(sg->page, sg->offset, sg->length, direction); 195 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
177} 196}
178 197
179static inline void 198static inline void dma_sync_sg_for_device(struct device *dev,
180dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, 199 struct scatterlist *sg, int nents,
181 enum dma_data_direction direction) 200 enum dma_data_direction direction)
182{ 201{
183 int i; 202 int i;
184 203
@@ -188,6 +207,15 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
188 __dma_sync_page(sg->page, sg->offset, sg->length, direction); 207 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
189} 208}
190 209
210static inline int dma_mapping_error(dma_addr_t dma_addr)
211{
212#ifdef CONFIG_PPC64
213 return (dma_addr == DMA_ERROR_CODE);
214#else
215 return 0;
216#endif
217}
218
191#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 219#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
192#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 220#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
193#ifdef CONFIG_NOT_COHERENT_CACHE 221#ifdef CONFIG_NOT_COHERENT_CACHE
@@ -198,40 +226,60 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
198 226
199static inline int dma_get_cache_alignment(void) 227static inline int dma_get_cache_alignment(void)
200{ 228{
229#ifdef CONFIG_PPC64
230 /* no easy way to get cache size on all processors, so return
231 * the maximum possible, to be safe */
232 return (1 << L1_CACHE_SHIFT_MAX);
233#else
201 /* 234 /*
202 * Each processor family will define its own L1_CACHE_SHIFT, 235 * Each processor family will define its own L1_CACHE_SHIFT,
203 * L1_CACHE_BYTES wraps to this, so this is always safe. 236 * L1_CACHE_BYTES wraps to this, so this is always safe.
204 */ 237 */
205 return L1_CACHE_BYTES; 238 return L1_CACHE_BYTES;
239#endif
206} 240}
207 241
208static inline void 242static inline void dma_sync_single_range_for_cpu(struct device *dev,
209dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, 243 dma_addr_t dma_handle, unsigned long offset, size_t size,
210 unsigned long offset, size_t size, 244 enum dma_data_direction direction)
211 enum dma_data_direction direction)
212{ 245{
213 /* just sync everything for now */ 246 /* just sync everything for now */
214 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction); 247 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
215} 248}
216 249
217static inline void 250static inline void dma_sync_single_range_for_device(struct device *dev,
218dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, 251 dma_addr_t dma_handle, unsigned long offset, size_t size,
219 unsigned long offset, size_t size, 252 enum dma_data_direction direction)
220 enum dma_data_direction direction)
221{ 253{
222 /* just sync everything for now */ 254 /* just sync everything for now */
223 dma_sync_single_for_device(dev, dma_handle, offset + size, direction); 255 dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
224} 256}
225 257
226static inline void dma_cache_sync(void *vaddr, size_t size, 258static inline void dma_cache_sync(void *vaddr, size_t size,
227 enum dma_data_direction direction) 259 enum dma_data_direction direction)
228{ 260{
261 BUG_ON(direction == DMA_NONE);
229 __dma_sync(vaddr, size, (int)direction); 262 __dma_sync(vaddr, size, (int)direction);
230} 263}
231 264
232static inline int dma_mapping_error(dma_addr_t dma_addr) 265/*
233{ 266 * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
234 return 0; 267 */
235} 268struct dma_mapping_ops {
236 269 void * (*alloc_coherent)(struct device *dev, size_t size,
237#endif /* __ASM_PPC_DMA_MAPPING_H */ 270 dma_addr_t *dma_handle, gfp_t flag);
271 void (*free_coherent)(struct device *dev, size_t size,
272 void *vaddr, dma_addr_t dma_handle);
273 dma_addr_t (*map_single)(struct device *dev, void *ptr,
274 size_t size, enum dma_data_direction direction);
275 void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
276 size_t size, enum dma_data_direction direction);
277 int (*map_sg)(struct device *dev, struct scatterlist *sg,
278 int nents, enum dma_data_direction direction);
279 void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
280 int nents, enum dma_data_direction direction);
281 int (*dma_supported)(struct device *dev, u64 mask);
282 int (*dac_dma_supported)(struct device *dev, u64 mask);
283};
284
285#endif /* _ASM_DMA_MAPPING_H */
diff --git a/include/asm-ppc64/eeh.h b/include/asm-powerpc/eeh.h
index 40c8eb57493e..f8633aafe4ba 100644
--- a/include/asm-ppc64/eeh.h
+++ b/include/asm-powerpc/eeh.h
@@ -1,4 +1,4 @@
1/* 1/*
2 * eeh.h 2 * eeh.h
3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation. 3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
4 * 4 *
@@ -6,12 +6,12 @@
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -27,16 +27,20 @@
27 27
28struct pci_dev; 28struct pci_dev;
29struct device_node; 29struct device_node;
30struct device_node;
31struct notifier_block;
32 30
33#ifdef CONFIG_EEH 31#ifdef CONFIG_EEH
34 32
33extern int eeh_subsystem_enabled;
34
35/* Values for eeh_mode bits in device_node */ 35/* Values for eeh_mode bits in device_node */
36#define EEH_MODE_SUPPORTED (1<<0) 36#define EEH_MODE_SUPPORTED (1<<0)
37#define EEH_MODE_NOCHECK (1<<1) 37#define EEH_MODE_NOCHECK (1<<1)
38#define EEH_MODE_ISOLATED (1<<2) 38#define EEH_MODE_ISOLATED (1<<2)
39 39
40/* Max number of EEH freezes allowed before we consider the device
41 * to be permanently disabled. */
42#define EEH_MAX_ALLOWED_FREEZES 5
43
40void __init eeh_init(void); 44void __init eeh_init(void);
41unsigned long eeh_check_failure(const volatile void __iomem *token, 45unsigned long eeh_check_failure(const volatile void __iomem *token,
42 unsigned long val); 46 unsigned long val);
@@ -59,43 +63,21 @@ void eeh_add_device_late(struct pci_dev *);
59 * eeh_remove_device - undo EEH setup for the indicated pci device 63 * eeh_remove_device - undo EEH setup for the indicated pci device
60 * @dev: pci device to be removed 64 * @dev: pci device to be removed
61 * 65 *
62 * This routine should be when a device is removed from a running 66 * This routine should be called when a device is removed from
63 * system (e.g. by hotplug or dlpar). 67 * a running system (e.g. by hotplug or dlpar). It unregisters
68 * the PCI device from the EEH subsystem. I/O errors affecting
69 * this device will no longer be detected after this call; thus,
70 * i/o errors affecting this slot may leave this device unusable.
64 */ 71 */
65void eeh_remove_device(struct pci_dev *); 72void eeh_remove_device(struct pci_dev *);
66 73
67#define EEH_DISABLE 0
68#define EEH_ENABLE 1
69#define EEH_RELEASE_LOADSTORE 2
70#define EEH_RELEASE_DMA 3
71
72/**
73 * Notifier event flags.
74 */
75#define EEH_NOTIFY_FREEZE 1
76
77/** EEH event -- structure holding pci slot data that describes
78 * a change in the isolation status of a PCI slot. A pointer
79 * to this struct is passed as the data pointer in a notify callback.
80 */
81struct eeh_event {
82 struct list_head list;
83 struct pci_dev *dev;
84 struct device_node *dn;
85 int reset_state;
86};
87
88/** Register to find out about EEH events. */
89int eeh_register_notifier(struct notifier_block *nb);
90int eeh_unregister_notifier(struct notifier_block *nb);
91
92/** 74/**
93 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. 75 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
94 * 76 *
95 * If this macro yields TRUE, the caller relays to eeh_check_failure() 77 * If this macro yields TRUE, the caller relays to eeh_check_failure()
96 * which does further tests out of line. 78 * which does further tests out of line.
97 */ 79 */
98#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0) 80#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled)
99 81
100/* 82/*
101 * Reads from a device which has been isolated by EEH will return 83 * Reads from a device which has been isolated by EEH will return
@@ -129,7 +111,7 @@ static inline void eeh_remove_device(struct pci_dev *dev) { }
129#define EEH_IO_ERROR_VALUE(size) (-1UL) 111#define EEH_IO_ERROR_VALUE(size) (-1UL)
130#endif /* CONFIG_EEH */ 112#endif /* CONFIG_EEH */
131 113
132/* 114/*
133 * MMIO read/write operations with EEH support. 115 * MMIO read/write operations with EEH support.
134 */ 116 */
135static inline u8 eeh_readb(const volatile void __iomem *addr) 117static inline u8 eeh_readb(const volatile void __iomem *addr)
diff --git a/include/asm-powerpc/eeh_event.h b/include/asm-powerpc/eeh_event.h
new file mode 100644
index 000000000000..d168a30b3866
--- /dev/null
+++ b/include/asm-powerpc/eeh_event.h
@@ -0,0 +1,52 @@
1/*
2 * eeh_event.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 * Copyright (c) 2005 Linas Vepstas <linas@linas.org>
19 */
20
21#ifndef ASM_PPC64_EEH_EVENT_H
22#define ASM_PPC64_EEH_EVENT_H
23
24/** EEH event -- structure holding pci controller data that describes
25 * a change in the isolation status of a PCI slot. A pointer
26 * to this struct is passed as the data pointer in a notify callback.
27 */
28struct eeh_event {
29 struct list_head list;
30 struct device_node *dn; /* struct device node */
31 struct pci_dev *dev; /* affected device */
32 int state;
33 int time_unavail; /* milliseconds until device might be available */
34};
35
36/**
37 * eeh_send_failure_event - generate a PCI error event
38 * @dev pci device
39 *
40 * This routine builds a PCI error event which will be delivered
41 * to all listeners on the peh_notifier_chain.
42 *
43 * This routine can be called within an interrupt context;
44 * the actual event will be delivered in a normal context
45 * (from a workqueue).
46 */
47int eeh_send_failure_event (struct device_node *dn,
48 struct pci_dev *dev,
49 int reset_state,
50 int time_unavail);
51
52#endif /* ASM_PPC64_EEH_EVENT_H */
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index feac3458d71f..3dcd65edf978 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -269,14 +269,12 @@ extern int dcache_bsize;
269extern int icache_bsize; 269extern int icache_bsize;
270extern int ucache_bsize; 270extern int ucache_bsize;
271 271
272#ifdef __powerpc64__ 272/* vDSO has arch_setup_additional_pages */
273#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
273struct linux_binprm; 274struct linux_binprm;
274#define ARCH_HAS_SETUP_ADDITIONAL_PAGES /* vDSO has arch_setup_additional_pages */ 275extern int arch_setup_additional_pages(struct linux_binprm *bprm,
275extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack); 276 int executable_stack);
276#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b); 277#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
277#else
278#define VDSO_AUX_ENT(a,b)
279#endif /* __powerpc64__ */
280 278
281/* 279/*
282 * The requirements here are: 280 * The requirements here are:
diff --git a/include/asm-powerpc/firmware.h b/include/asm-powerpc/firmware.h
index 806c142ae9ea..12fabbcb04f0 100644
--- a/include/asm-powerpc/firmware.h
+++ b/include/asm-powerpc/firmware.h
@@ -43,6 +43,7 @@
43#define FW_FEATURE_ISERIES (1UL<<21) 43#define FW_FEATURE_ISERIES (1UL<<21)
44 44
45enum { 45enum {
46#ifdef CONFIG_PPC64
46 FW_FEATURE_PSERIES_POSSIBLE = FW_FEATURE_PFT | FW_FEATURE_TCE | 47 FW_FEATURE_PSERIES_POSSIBLE = FW_FEATURE_PFT | FW_FEATURE_TCE |
47 FW_FEATURE_SPRG0 | FW_FEATURE_DABR | FW_FEATURE_COPY | 48 FW_FEATURE_SPRG0 | FW_FEATURE_DABR | FW_FEATURE_COPY |
48 FW_FEATURE_ASR | FW_FEATURE_DEBUG | FW_FEATURE_TERM | 49 FW_FEATURE_ASR | FW_FEATURE_DEBUG | FW_FEATURE_TERM |
@@ -70,6 +71,11 @@ enum {
70 FW_FEATURE_ISERIES_ALWAYS & 71 FW_FEATURE_ISERIES_ALWAYS &
71#endif 72#endif
72 FW_FEATURE_POSSIBLE, 73 FW_FEATURE_POSSIBLE,
74
75#else /* CONFIG_PPC64 */
76 FW_FEATURE_POSSIBLE = 0,
77 FW_FEATURE_ALWAYS = 0,
78#endif
73}; 79};
74 80
75/* This is used to identify firmware features which are available 81/* This is used to identify firmware features which are available
diff --git a/include/asm-ppc64/floppy.h b/include/asm-powerpc/floppy.h
index 5c497b588e54..64276a3f6153 100644
--- a/include/asm-ppc64/floppy.h
+++ b/include/asm-powerpc/floppy.h
@@ -7,22 +7,22 @@
7 * 7 *
8 * Copyright (C) 1995 8 * Copyright (C) 1995
9 */ 9 */
10#ifndef __ASM_PPC64_FLOPPY_H 10#ifndef __ASM_POWERPC_FLOPPY_H
11#define __ASM_PPC64_FLOPPY_H 11#define __ASM_POWERPC_FLOPPY_H
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14#include <asm/machdep.h> 14#include <asm/machdep.h>
15 15
16#define fd_inb(port) inb_p(port) 16#define fd_inb(port) inb_p(port)
17#define fd_outb(value,port) outb_p(value,port) 17#define fd_outb(value,port) outb_p(value,port)
18 18
19#define fd_enable_dma() enable_dma(FLOPPY_DMA) 19#define fd_enable_dma() enable_dma(FLOPPY_DMA)
20#define fd_disable_dma() disable_dma(FLOPPY_DMA) 20#define fd_disable_dma() disable_dma(FLOPPY_DMA)
21#define fd_request_dma() request_dma(FLOPPY_DMA,"floppy") 21#define fd_request_dma() request_dma(FLOPPY_DMA, "floppy")
22#define fd_free_dma() free_dma(FLOPPY_DMA) 22#define fd_free_dma() free_dma(FLOPPY_DMA)
23#define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA) 23#define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA)
24#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA,mode) 24#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode)
25#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA,count) 25#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count)
26#define fd_enable_irq() enable_irq(FLOPPY_IRQ) 26#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
27#define fd_disable_irq() disable_irq(FLOPPY_IRQ) 27#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
28#define fd_cacheflush(addr,size) /* nothing */ 28#define fd_cacheflush(addr,size) /* nothing */
@@ -35,10 +35,10 @@
35 35
36#include <linux/pci.h> 36#include <linux/pci.h>
37 37
38#define fd_dma_setup(addr,size,mode,io) ppc64_fd_dma_setup(addr,size,mode,io) 38#define fd_dma_setup(addr,size,mode,io) powerpc_fd_dma_setup(addr,size,mode,io)
39 39
40static __inline__ int 40static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size,
41ppc64_fd_dma_setup(char *addr, unsigned long size, int mode, int io) 41 int mode, int io)
42{ 42{
43 static unsigned long prev_size; 43 static unsigned long prev_size;
44 static dma_addr_t bus_addr = 0; 44 static dma_addr_t bus_addr = 0;
@@ -55,9 +55,8 @@ ppc64_fd_dma_setup(char *addr, unsigned long size, int mode, int io)
55 bus_addr = 0; 55 bus_addr = 0;
56 } 56 }
57 57
58 if (!bus_addr) /* need to map it */ { 58 if (!bus_addr) /* need to map it */
59 bus_addr = pci_map_single(NULL, addr, size, dir); 59 bus_addr = pci_map_single(NULL, addr, size, dir);
60 }
61 60
62 /* remember this one as prev */ 61 /* remember this one as prev */
63 prev_addr = addr; 62 prev_addr = addr;
@@ -103,4 +102,4 @@ static int FDC2 = -1;
103 102
104#define EXTRA_FLOPPY_PARAMS 103#define EXTRA_FLOPPY_PARAMS
105 104
106#endif /* __ASM_PPC64_FLOPPY_H */ 105#endif /* __ASM_POWERPC_FLOPPY_H */
diff --git a/include/asm-powerpc/futex.h b/include/asm-powerpc/futex.h
index 37c94e52ab6d..f0319d50b129 100644
--- a/include/asm-powerpc/futex.h
+++ b/include/asm-powerpc/futex.h
@@ -7,13 +7,14 @@
7#include <asm/errno.h> 7#include <asm/errno.h>
8#include <asm/synch.h> 8#include <asm/synch.h>
9#include <asm/uaccess.h> 9#include <asm/uaccess.h>
10#include <asm/ppc_asm.h> 10#include <asm/asm-compat.h>
11 11
12#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 12#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
13 __asm__ __volatile ( \ 13 __asm__ __volatile ( \
14 SYNC_ON_SMP \ 14 SYNC_ON_SMP \
15"1: lwarx %0,0,%2\n" \ 15"1: lwarx %0,0,%2\n" \
16 insn \ 16 insn \
17 PPC405_ERR77(0, %2) \
17"2: stwcx. %1,0,%2\n" \ 18"2: stwcx. %1,0,%2\n" \
18 "bne- 1b\n" \ 19 "bne- 1b\n" \
19 "li %1,0\n" \ 20 "li %1,0\n" \
@@ -23,7 +24,7 @@
23 ".previous\n" \ 24 ".previous\n" \
24 ".section __ex_table,\"a\"\n" \ 25 ".section __ex_table,\"a\"\n" \
25 ".align 3\n" \ 26 ".align 3\n" \
26 DATAL " 1b,4b,2b,4b\n" \ 27 PPC_LONG "1b,4b,2b,4b\n" \
27 ".previous" \ 28 ".previous" \
28 : "=&r" (oldval), "=&r" (ret) \ 29 : "=&r" (oldval), "=&r" (ret) \
29 : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ 30 : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \
diff --git a/include/asm-ppc64/hvcall.h b/include/asm-powerpc/hvcall.h
index ab7c3cf24888..d36da61dbc53 100644
--- a/include/asm-ppc64/hvcall.h
+++ b/include/asm-powerpc/hvcall.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_HVCALL_H 1#ifndef _ASM_POWERPC_HVCALL_H
2#define _PPC64_HVCALL_H 2#define _ASM_POWERPC_HVCALL_H
3 3
4#define HVSC .long 0x44000022 4#define HVSC .long 0x44000022
5 5
@@ -138,7 +138,7 @@ long plpar_hcall(unsigned long opcode,
138 */ 138 */
139long plpar_hcall_norets(unsigned long opcode, ...); 139long plpar_hcall_norets(unsigned long opcode, ...);
140 140
141/* 141/*
142 * Special hcall interface for ibmveth support. 142 * Special hcall interface for ibmveth support.
143 * Takes 8 input parms. Returns a rc and stores the 143 * Takes 8 input parms. Returns a rc and stores the
144 * R4 return value in *out1. 144 * R4 return value in *out1.
@@ -153,11 +153,11 @@ long plpar_hcall_8arg_2ret(unsigned long opcode,
153 unsigned long arg7, 153 unsigned long arg7,
154 unsigned long arg8, 154 unsigned long arg8,
155 unsigned long *out1); 155 unsigned long *out1);
156 156
157/* plpar_hcall_4out() 157/* plpar_hcall_4out()
158 * 158 *
159 * same as plpar_hcall except with 4 output arguments. 159 * same as plpar_hcall except with 4 output arguments.
160 * 160 *
161 */ 161 */
162long plpar_hcall_4out(unsigned long opcode, 162long plpar_hcall_4out(unsigned long opcode,
163 unsigned long arg1, 163 unsigned long arg1,
@@ -170,4 +170,4 @@ long plpar_hcall_4out(unsigned long opcode,
170 unsigned long *out4); 170 unsigned long *out4);
171 171
172#endif /* __ASSEMBLY__ */ 172#endif /* __ASSEMBLY__ */
173#endif /* _PPC64_HVCALL_H */ 173#endif /* _ASM_POWERPC_HVCALL_H */
diff --git a/include/asm-ppc64/hvconsole.h b/include/asm-powerpc/hvconsole.h
index 6da93ce74dc0..6da93ce74dc0 100644
--- a/include/asm-ppc64/hvconsole.h
+++ b/include/asm-powerpc/hvconsole.h
diff --git a/include/asm-ppc64/hvcserver.h b/include/asm-powerpc/hvcserver.h
index aecba9665796..aecba9665796 100644
--- a/include/asm-ppc64/hvcserver.h
+++ b/include/asm-powerpc/hvcserver.h
diff --git a/include/asm-powerpc/hw_irq.h b/include/asm-powerpc/hw_irq.h
index c37b31b96337..26b89d859c56 100644
--- a/include/asm-powerpc/hw_irq.h
+++ b/include/asm-powerpc/hw_irq.h
@@ -12,7 +12,6 @@
12#include <asm/processor.h> 12#include <asm/processor.h>
13 13
14extern void timer_interrupt(struct pt_regs *); 14extern void timer_interrupt(struct pt_regs *);
15extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
16 15
17#ifdef CONFIG_PPC_ISERIES 16#ifdef CONFIG_PPC_ISERIES
18 17
diff --git a/include/asm-ppc64/io.h b/include/asm-powerpc/io.h
index 77fc07c3c6bd..48938d84d055 100644
--- a/include/asm-ppc64/io.h
+++ b/include/asm-powerpc/io.h
@@ -1,5 +1,5 @@
1#ifndef _PPC64_IO_H 1#ifndef _ASM_POWERPC_IO_H
2#define _PPC64_IO_H 2#define _ASM_POWERPC_IO_H
3 3
4/* 4/*
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
@@ -8,7 +8,10 @@
8 * 2 of the License, or (at your option) any later version. 8 * 2 of the License, or (at your option) any later version.
9 */ 9 */
10 10
11#include <linux/config.h> 11#ifndef CONFIG_PPC64
12#include <asm-ppc/io.h>
13#else
14
12#include <linux/compiler.h> 15#include <linux/compiler.h>
13#include <asm/page.h> 16#include <asm/page.h>
14#include <asm/byteorder.h> 17#include <asm/byteorder.h>
@@ -455,4 +458,5 @@ extern int check_legacy_ioport(unsigned long base_port);
455 458
456#endif /* __KERNEL__ */ 459#endif /* __KERNEL__ */
457 460
458#endif /* _PPC64_IO_H */ 461#endif /* CONFIG_PPC64 */
462#endif /* _ASM_POWERPC_IO_H */
diff --git a/include/asm-powerpc/iommu.h b/include/asm-powerpc/iommu.h
index 6a35e6570ccd..f89f06050893 100644
--- a/include/asm-powerpc/iommu.h
+++ b/include/asm-powerpc/iommu.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation 2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
3 * Rewrite, cleanup: 3 * Rewrite, cleanup:
4 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation 4 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index b3935ea28fff..8eb7e857ec4c 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -389,6 +389,7 @@ extern u64 ppc64_interrupt_controller;
389#define SIU_INT_TIMER4 ((uint)0x0f + CPM_IRQ_OFFSET) 389#define SIU_INT_TIMER4 ((uint)0x0f + CPM_IRQ_OFFSET)
390#define SIU_INT_TMCNT ((uint)0x10 + CPM_IRQ_OFFSET) 390#define SIU_INT_TMCNT ((uint)0x10 + CPM_IRQ_OFFSET)
391#define SIU_INT_PIT ((uint)0x11 + CPM_IRQ_OFFSET) 391#define SIU_INT_PIT ((uint)0x11 + CPM_IRQ_OFFSET)
392#define SIU_INT_PCI ((uint)0x12 + CPM_IRQ_OFFSET)
392#define SIU_INT_IRQ1 ((uint)0x13 + CPM_IRQ_OFFSET) 393#define SIU_INT_IRQ1 ((uint)0x13 + CPM_IRQ_OFFSET)
393#define SIU_INT_IRQ2 ((uint)0x14 + CPM_IRQ_OFFSET) 394#define SIU_INT_IRQ2 ((uint)0x14 + CPM_IRQ_OFFSET)
394#define SIU_INT_IRQ3 ((uint)0x15 + CPM_IRQ_OFFSET) 395#define SIU_INT_IRQ3 ((uint)0x15 + CPM_IRQ_OFFSET)
@@ -429,7 +430,6 @@ extern u64 ppc64_interrupt_controller;
429#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 430#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
430/* pedantic: these are long because they are used with set_bit --RR */ 431/* pedantic: these are long because they are used with set_bit --RR */
431extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; 432extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
432extern unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
433extern atomic_t ppc_n_lost_interrupts; 433extern atomic_t ppc_n_lost_interrupts;
434 434
435#define virt_irq_create_mapping(x) (x) 435#define virt_irq_create_mapping(x) (x)
@@ -488,8 +488,8 @@ extern struct thread_info *softirq_ctx[NR_CPUS];
488 488
489extern void irq_ctx_init(void); 489extern void irq_ctx_init(void);
490extern void call_do_softirq(struct thread_info *tp); 490extern void call_do_softirq(struct thread_info *tp);
491extern int call_handle_IRQ_event(int irq, struct pt_regs *regs, 491extern int call___do_IRQ(int irq, struct pt_regs *regs,
492 struct irqaction *action, struct thread_info *tp); 492 struct thread_info *tp);
493 493
494#define __ARCH_HAS_DO_SOFTIRQ 494#define __ARCH_HAS_DO_SOFTIRQ
495 495
diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h
index 062ab9ba68eb..c72ffc709ea8 100644
--- a/include/asm-powerpc/kexec.h
+++ b/include/asm-powerpc/kexec.h
@@ -40,6 +40,7 @@ extern note_buf_t crash_notes[];
40#ifdef __powerpc64__ 40#ifdef __powerpc64__
41extern void kexec_smp_wait(void); /* get and clear naca physid, wait for 41extern void kexec_smp_wait(void); /* get and clear naca physid, wait for
42 master to copy new code to 0 */ 42 master to copy new code to 0 */
43extern void __init kexec_setup(void);
43#else 44#else
44struct kimage; 45struct kimage;
45extern void machine_kexec_simple(struct kimage *image); 46extern void machine_kexec_simple(struct kimage *image);
diff --git a/include/asm-ppc64/lppaca.h b/include/asm-powerpc/lppaca.h
index 9e2a6c0649a0..c1bedab1515b 100644
--- a/include/asm-ppc64/lppaca.h
+++ b/include/asm-powerpc/lppaca.h
@@ -16,8 +16,8 @@
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */ 18 */
19#ifndef _ASM_LPPACA_H 19#ifndef _ASM_POWERPC_LPPACA_H
20#define _ASM_LPPACA_H 20#define _ASM_POWERPC_LPPACA_H
21 21
22//============================================================================= 22//=============================================================================
23// 23//
@@ -28,8 +28,7 @@
28//---------------------------------------------------------------------------- 28//----------------------------------------------------------------------------
29#include <asm/types.h> 29#include <asm/types.h>
30 30
31struct lppaca 31struct lppaca {
32{
33//============================================================================= 32//=============================================================================
34// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data 33// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
35// NOTE: The xDynXyz fields are fields that will be dynamically changed by 34// NOTE: The xDynXyz fields are fields that will be dynamically changed by
@@ -129,4 +128,4 @@ struct lppaca
129 u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF 128 u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF
130}; 129};
131 130
132#endif /* _ASM_LPPACA_H */ 131#endif /* _ASM_POWERPC_LPPACA_H */
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index 5670f0cd6143..c011abb8b600 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -93,7 +93,9 @@ struct machdep_calls {
93 93
94 void (*init_IRQ)(void); 94 void (*init_IRQ)(void);
95 int (*get_irq)(struct pt_regs *); 95 int (*get_irq)(struct pt_regs *);
96 void (*cpu_irq_down)(int secondary); 96#ifdef CONFIG_KEXEC
97 void (*kexec_cpu_down)(int crash_shutdown, int secondary);
98#endif
97 99
98 /* PCI stuff */ 100 /* PCI stuff */
99 /* Called after scanning the bus, before allocating resources */ 101 /* Called after scanning the bus, before allocating resources */
diff --git a/include/asm-ppc64/mmu.h b/include/asm-powerpc/mmu.h
index 4c18a5cb69f5..29b0bb0086d3 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-powerpc/mmu.h
@@ -1,3 +1,10 @@
1#ifndef _ASM_POWERPC_MMU_H_
2#define _ASM_POWERPC_MMU_H_
3
4#ifndef CONFIG_PPC64
5#include <asm-ppc/mmu.h>
6#else
7
1/* 8/*
2 * PowerPC memory management structures 9 * PowerPC memory management structures
3 * 10 *
@@ -10,11 +17,7 @@
10 * 2 of the License, or (at your option) any later version. 17 * 2 of the License, or (at your option) any later version.
11 */ 18 */
12 19
13#ifndef _PPC64_MMU_H_ 20#include <asm/asm-compat.h>
14#define _PPC64_MMU_H_
15
16#include <linux/config.h>
17#include <asm/ppc_asm.h> /* for ASM_CONST */
18#include <asm/page.h> 21#include <asm/page.h>
19 22
20/* 23/*
@@ -217,16 +220,20 @@ extern int __hash_page_64K(unsigned long ea, unsigned long access,
217 unsigned int local); 220 unsigned int local);
218struct mm_struct; 221struct mm_struct;
219extern int hash_huge_page(struct mm_struct *mm, unsigned long access, 222extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
220 unsigned long ea, unsigned long vsid, int local); 223 unsigned long ea, unsigned long vsid, int local,
224 unsigned long trap);
221 225
222extern void htab_finish_init(void); 226extern void htab_finish_init(void);
223extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend, 227extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
224 unsigned long pstart, unsigned long mode, 228 unsigned long pstart, unsigned long mode,
225 int psize); 229 int psize);
226 230
231extern void htab_initialize(void);
232extern void htab_initialize_secondary(void);
227extern void hpte_init_native(void); 233extern void hpte_init_native(void);
228extern void hpte_init_lpar(void); 234extern void hpte_init_lpar(void);
229extern void hpte_init_iSeries(void); 235extern void hpte_init_iSeries(void);
236extern void mm_init_ppc64(void);
230 237
231extern long pSeries_lpar_hpte_insert(unsigned long hpte_group, 238extern long pSeries_lpar_hpte_insert(unsigned long hpte_group,
232 unsigned long va, unsigned long prpn, 239 unsigned long va, unsigned long prpn,
@@ -245,6 +252,7 @@ extern long iSeries_hpte_insert(unsigned long hpte_group,
245 252
246extern void stabs_alloc(void); 253extern void stabs_alloc(void);
247extern void slb_initialize(void); 254extern void slb_initialize(void);
255extern void stab_initialize(unsigned long stab);
248 256
249#endif /* __ASSEMBLY__ */ 257#endif /* __ASSEMBLY__ */
250 258
@@ -388,4 +396,5 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
388 396
389#endif /* __ASSEMBLY */ 397#endif /* __ASSEMBLY */
390 398
391#endif /* _PPC64_MMU_H_ */ 399#endif /* CONFIG_PPC64 */
400#endif /* _ASM_POWERPC_MMU_H_ */
diff --git a/include/asm-ppc64/mmu_context.h b/include/asm-powerpc/mmu_context.h
index 4f512e9fa6b8..ea6798c7d5fc 100644
--- a/include/asm-ppc64/mmu_context.h
+++ b/include/asm-powerpc/mmu_context.h
@@ -1,7 +1,10 @@
1#ifndef __PPC64_MMU_CONTEXT_H 1#ifndef __ASM_POWERPC_MMU_CONTEXT_H
2#define __PPC64_MMU_CONTEXT_H 2#define __ASM_POWERPC_MMU_CONTEXT_H
3
4#ifndef CONFIG_PPC64
5#include <asm-ppc/mmu_context.h>
6#else
3 7
4#include <linux/config.h>
5#include <linux/kernel.h> 8#include <linux/kernel.h>
6#include <linux/mm.h> 9#include <linux/mm.h>
7#include <asm/mmu.h> 10#include <asm/mmu.h>
@@ -82,4 +85,5 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
82 local_irq_restore(flags); 85 local_irq_restore(flags);
83} 86}
84 87
85#endif /* __PPC64_MMU_CONTEXT_H */ 88#endif /* CONFIG_PPC64 */
89#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
diff --git a/include/asm-powerpc/mmzone.h b/include/asm-powerpc/mmzone.h
new file mode 100644
index 000000000000..54958d6cae04
--- /dev/null
+++ b/include/asm-powerpc/mmzone.h
@@ -0,0 +1,50 @@
1/*
2 * Written by Kanoj Sarcar (kanoj@sgi.com) Aug 99
3 *
4 * PowerPC64 port:
5 * Copyright (C) 2002 Anton Blanchard, IBM Corp.
6 */
7#ifndef _ASM_MMZONE_H_
8#define _ASM_MMZONE_H_
9
10#include <linux/config.h>
11
12/*
13 * generic non-linear memory support:
14 *
15 * 1) we will not split memory into more chunks than will fit into the
16 * flags field of the struct page
17 */
18
19#ifdef CONFIG_NEED_MULTIPLE_NODES
20
21extern struct pglist_data *node_data[];
22/*
23 * Return a pointer to the node data for node n.
24 */
25#define NODE_DATA(nid) (node_data[nid])
26
27/*
28 * Following are specific to this numa platform.
29 */
30
31extern int numa_cpu_lookup_table[];
32extern cpumask_t numa_cpumask_lookup_table[];
33#ifdef CONFIG_MEMORY_HOTPLUG
34extern unsigned long max_pfn;
35#endif
36
37/*
38 * Following are macros that each numa implmentation must define.
39 */
40
41#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
42#define node_end_pfn(nid) (NODE_DATA(nid)->node_end_pfn)
43
44#endif /* CONFIG_NEED_MULTIPLE_NODES */
45
46#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID
47extern int __init early_pfn_to_nid(unsigned long pfn);
48#endif
49
50#endif /* _ASM_MMZONE_H_ */
diff --git a/include/asm-ppc64/nvram.h b/include/asm-powerpc/nvram.h
index def47d720d3d..24bd8c2388ea 100644
--- a/include/asm-ppc64/nvram.h
+++ b/include/asm-powerpc/nvram.h
@@ -1,6 +1,5 @@
1/* 1/*
2 * PreP compliant NVRAM access 2 * NVRAM definitions and access functions.
3 * This needs to be updated for PPC64
4 * 3 *
5 * This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License 5 * modify it under the terms of the GNU General Public License
@@ -8,8 +7,8 @@
8 * 2 of the License, or (at your option) any later version. 7 * 2 of the License, or (at your option) any later version.
9 */ 8 */
10 9
11#ifndef _PPC64_NVRAM_H 10#ifndef _ASM_POWERPC_NVRAM_H
12#define _PPC64_NVRAM_H 11#define _ASM_POWERPC_NVRAM_H
13 12
14#define NVRW_CNT 0x20 13#define NVRW_CNT 0x20
15#define NVRAM_HEADER_LEN 16 /* sizeof(struct nvram_header) */ 14#define NVRAM_HEADER_LEN 16 /* sizeof(struct nvram_header) */
@@ -69,7 +68,6 @@ extern int nvram_clear_error_log(void);
69extern struct nvram_partition *nvram_find_partition(int sig, const char *name); 68extern struct nvram_partition *nvram_find_partition(int sig, const char *name);
70 69
71extern int pSeries_nvram_init(void); 70extern int pSeries_nvram_init(void);
72extern int pmac_nvram_init(void);
73extern int mmio_nvram_init(void); 71extern int mmio_nvram_init(void);
74 72
75/* PowerMac specific nvram stuffs */ 73/* PowerMac specific nvram stuffs */
@@ -88,7 +86,11 @@ extern u8 pmac_xpram_read(int xpaddr);
88extern void pmac_xpram_write(int xpaddr, u8 data); 86extern void pmac_xpram_write(int xpaddr, u8 data);
89 87
90/* Synchronize NVRAM */ 88/* Synchronize NVRAM */
91extern int nvram_sync(void); 89extern void nvram_sync(void);
90
91/* Normal access to NVRAM */
92extern unsigned char nvram_read_byte(int i);
93extern void nvram_write_byte(unsigned char c, int i);
92 94
93/* Some offsets in XPRAM */ 95/* Some offsets in XPRAM */
94#define PMAC_XPRAM_MACHINE_LOC 0xe4 96#define PMAC_XPRAM_MACHINE_LOC 0xe4
@@ -112,5 +114,6 @@ struct pmac_machine_location {
112 _IOWR('p', 0x40, int) 114 _IOWR('p', 0x40, int)
113 115
114#define IOC_NVRAM_GET_OFFSET _IOWR('p', 0x42, int) /* Get NVRAM partition offset */ 116#define IOC_NVRAM_GET_OFFSET _IOWR('p', 0x42, int) /* Get NVRAM partition offset */
117#define IOC_NVRAM_SYNC _IO('p', 0x43) /* Sync NVRAM image */
115 118
116#endif /* _PPC64_NVRAM_H */ 119#endif /* _ASM_POWERPC_NVRAM_H */
diff --git a/include/asm-ppc64/paca.h b/include/asm-powerpc/paca.h
index bccacd6aa93a..92c765c35bd0 100644
--- a/include/asm-ppc64/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -1,11 +1,8 @@
1#ifndef _PPC64_PACA_H
2#define _PPC64_PACA_H
3
4/* 1/*
5 * include/asm-ppc64/paca.h 2 * include/asm-powerpc/paca.h
6 * 3 *
7 * This control block defines the PACA which defines the processor 4 * This control block defines the PACA which defines the processor
8 * specific data for each logical processor on the system. 5 * specific data for each logical processor on the system.
9 * There are some pointers defined that are utilized by PLIC. 6 * There are some pointers defined that are utilized by PLIC.
10 * 7 *
11 * C 2001 PPC 64 Team, IBM Corp 8 * C 2001 PPC 64 Team, IBM Corp
@@ -14,7 +11,9 @@
14 * modify it under the terms of the GNU General Public License 11 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 12 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version. 13 * 2 of the License, or (at your option) any later version.
17 */ 14 */
15#ifndef _ASM_POWERPC_PACA_H
16#define _ASM_POWERPC_PACA_H
18 17
19#include <linux/config.h> 18#include <linux/config.h>
20#include <asm/types.h> 19#include <asm/types.h>
@@ -118,4 +117,4 @@ struct paca_struct {
118 117
119extern struct paca_struct paca[]; 118extern struct paca_struct paca[];
120 119
121#endif /* _PPC64_PACA_H */ 120#endif /* _ASM_POWERPC_PACA_H */
diff --git a/include/asm-powerpc/page.h b/include/asm-powerpc/page.h
new file mode 100644
index 000000000000..18c1e5ee81a3
--- /dev/null
+++ b/include/asm-powerpc/page.h
@@ -0,0 +1,179 @@
1#ifndef _ASM_POWERPC_PAGE_H
2#define _ASM_POWERPC_PAGE_H
3
4/*
5 * Copyright (C) 2001,2005 IBM Corporation.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#ifdef __KERNEL__
14#include <linux/config.h>
15#include <asm/asm-compat.h>
16
17/*
18 * On PPC32 page size is 4K. For PPC64 we support either 4K or 64K software
19 * page size. When using 64K pages however, whether we are really supporting
20 * 64K pages in HW or not is irrelevant to those definitions.
21 */
22#ifdef CONFIG_PPC_64K_PAGES
23#define PAGE_SHIFT 16
24#else
25#define PAGE_SHIFT 12
26#endif
27
28#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT)
29
30/* We do define AT_SYSINFO_EHDR but don't use the gate mechanism */
31#define __HAVE_ARCH_GATE_AREA 1
32
33/*
34 * Subtle: (1 << PAGE_SHIFT) is an int, not an unsigned long. So if we
35 * assign PAGE_MASK to a larger type it gets extended the way we want
36 * (i.e. with 1s in the high bits)
37 */
38#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
39
40#define PAGE_OFFSET ASM_CONST(CONFIG_KERNEL_START)
41#define KERNELBASE PAGE_OFFSET
42
43#ifdef CONFIG_DISCONTIGMEM
44#define page_to_pfn(page) discontigmem_page_to_pfn(page)
45#define pfn_to_page(pfn) discontigmem_pfn_to_page(pfn)
46#define pfn_valid(pfn) discontigmem_pfn_valid(pfn)
47#endif
48
49#ifdef CONFIG_FLATMEM
50#define pfn_to_page(pfn) (mem_map + (pfn))
51#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
52#define pfn_valid(pfn) ((pfn) < max_mapnr)
53#endif
54
55#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
56#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
57#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
58
59#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))
60#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
61
62/*
63 * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
64 * and needs to be executable. This means the whole heap ends
65 * up being executable.
66 */
67#define VM_DATA_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
68 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
69
70#define VM_DATA_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
71 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
72
73#ifdef __powerpc64__
74#include <asm/page_64.h>
75#else
76#include <asm/page_32.h>
77#endif
78
79/* align addr on a size boundary - adjust address up/down if needed */
80#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
81#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
82
83/* align addr on a size boundary - adjust address up if needed */
84#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
85
86/* to align the pointer to the (next) page boundary */
87#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
88
89#ifndef __ASSEMBLY__
90
91#undef STRICT_MM_TYPECHECKS
92
93#ifdef STRICT_MM_TYPECHECKS
94/* These are used to make use of C type-checking. */
95
96/* PTE level */
97typedef struct { pte_basic_t pte; } pte_t;
98#define pte_val(x) ((x).pte)
99#define __pte(x) ((pte_t) { (x) })
100
101/* 64k pages additionally define a bigger "real PTE" type that gathers
102 * the "second half" part of the PTE for pseudo 64k pages
103 */
104#ifdef CONFIG_PPC_64K_PAGES
105typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
106#else
107typedef struct { pte_t pte; } real_pte_t;
108#endif
109
110/* PMD level */
111typedef struct { unsigned long pmd; } pmd_t;
112#define pmd_val(x) ((x).pmd)
113#define __pmd(x) ((pmd_t) { (x) })
114
115/* PUD level exusts only on 4k pages */
116#ifndef CONFIG_PPC_64K_PAGES
117typedef struct { unsigned long pud; } pud_t;
118#define pud_val(x) ((x).pud)
119#define __pud(x) ((pud_t) { (x) })
120#endif
121
122/* PGD level */
123typedef struct { unsigned long pgd; } pgd_t;
124#define pgd_val(x) ((x).pgd)
125#define __pgd(x) ((pgd_t) { (x) })
126
127/* Page protection bits */
128typedef struct { unsigned long pgprot; } pgprot_t;
129#define pgprot_val(x) ((x).pgprot)
130#define __pgprot(x) ((pgprot_t) { (x) })
131
132#else
133
134/*
135 * .. while these make it easier on the compiler
136 */
137
138typedef pte_basic_t pte_t;
139#define pte_val(x) (x)
140#define __pte(x) (x)
141
142#ifdef CONFIG_PPC_64K_PAGES
143typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
144#else
145typedef unsigned long real_pte_t;
146#endif
147
148
149typedef unsigned long pmd_t;
150#define pmd_val(x) (x)
151#define __pmd(x) (x)
152
153#ifndef CONFIG_PPC_64K_PAGES
154typedef unsigned long pud_t;
155#define pud_val(x) (x)
156#define __pud(x) (x)
157#endif
158
159typedef unsigned long pgd_t;
160#define pgd_val(x) (x)
161#define pgprot_val(x) (x)
162
163typedef unsigned long pgprot_t;
164#define __pgd(x) (x)
165#define __pgprot(x) (x)
166
167#endif
168
169struct page;
170extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
171extern void copy_user_page(void *to, void *from, unsigned long vaddr,
172 struct page *p);
173extern int page_is_ram(unsigned long pfn);
174
175#endif /* __ASSEMBLY__ */
176
177#endif /* __KERNEL__ */
178
179#endif /* _ASM_POWERPC_PAGE_H */
diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h
new file mode 100644
index 000000000000..7259cfd85da9
--- /dev/null
+++ b/include/asm-powerpc/page_32.h
@@ -0,0 +1,40 @@
1#ifndef _ASM_POWERPC_PAGE_32_H
2#define _ASM_POWERPC_PAGE_32_H
3
4#define VM_DATA_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS32
5
6#define PPC_MEMSTART 0
7
8#ifndef __ASSEMBLY__
9/*
10 * The basic type of a PTE - 64 bits for those CPUs with > 32 bit
11 * physical addressing. For now this just the IBM PPC440.
12 */
13#ifdef CONFIG_PTE_64BIT
14typedef unsigned long long pte_basic_t;
15#define PTE_SHIFT (PAGE_SHIFT - 3) /* 512 ptes per page */
16#define PTE_FMT "%16Lx"
17#else
18typedef unsigned long pte_basic_t;
19#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */
20#define PTE_FMT "%.8lx"
21#endif
22
23struct page;
24extern void clear_pages(void *page, int order);
25static inline void clear_page(void *page) { clear_pages(page, 0); }
26extern void copy_page(void *to, void *from);
27
28/* Pure 2^n version of get_order */
29extern __inline__ int get_order(unsigned long size)
30{
31 int lz;
32
33 size = (size-1) >> PAGE_SHIFT;
34 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
35 return 32 - lz;
36}
37
38#endif /* __ASSEMBLY__ */
39
40#endif /* _ASM_POWERPC_PAGE_32_H */
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
new file mode 100644
index 000000000000..6642c0125001
--- /dev/null
+++ b/include/asm-powerpc/page_64.h
@@ -0,0 +1,183 @@
1#ifndef _ASM_POWERPC_PAGE_64_H
2#define _ASM_POWERPC_PAGE_64_H
3
4/*
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
15 * specific, every notion of page number shared with the firmware, TCEs,
16 * iommu, etc... still uses a page size of 4K.
17 */
18#define HW_PAGE_SHIFT 12
19#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
20#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
21
22/*
23 * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
24 * HW_PAGE_SHIFT, that is 4K pages.
25 */
26#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
27
28#define REGION_SIZE 4UL
29#define REGION_SHIFT 60UL
30#define REGION_MASK (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)
31
32#define VMALLOCBASE ASM_CONST(0xD000000000000000)
33#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
34#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
35#define USER_REGION_ID (0UL)
36#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
37
38/* Segment size */
39#define SID_SHIFT 28
40#define SID_MASK 0xfffffffffUL
41#define ESID_MASK 0xfffffffff0000000UL
42#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
43
44#ifndef __ASSEMBLY__
45#include <asm/cache.h>
46
47typedef unsigned long pte_basic_t;
48
49static __inline__ void clear_page(void *addr)
50{
51 unsigned long lines, line_size;
52
53 line_size = ppc64_caches.dline_size;
54 lines = ppc64_caches.dlines_per_page;
55
56 __asm__ __volatile__(
57 "mtctr %1 # clear_page\n\
581: dcbz 0,%0\n\
59 add %0,%0,%3\n\
60 bdnz+ 1b"
61 : "=r" (addr)
62 : "r" (lines), "0" (addr), "r" (line_size)
63 : "ctr", "memory");
64}
65
66extern void copy_4K_page(void *to, void *from);
67
68#ifdef CONFIG_PPC_64K_PAGES
69static inline void copy_page(void *to, void *from)
70{
71 unsigned int i;
72 for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
73 copy_4K_page(to, from);
74 to += 4096;
75 from += 4096;
76 }
77}
78#else /* CONFIG_PPC_64K_PAGES */
79static inline void copy_page(void *to, void *from)
80{
81 copy_4K_page(to, from);
82}
83#endif /* CONFIG_PPC_64K_PAGES */
84
85/* Log 2 of page table size */
86extern u64 ppc64_pft_size;
87
88/* Large pages size */
89#ifdef CONFIG_HUGETLB_PAGE
90extern unsigned int HPAGE_SHIFT;
91#else
92#define HPAGE_SHIFT PAGE_SHIFT
93#endif
94#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
95#define HPAGE_MASK (~(HPAGE_SIZE - 1))
96#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
97
98#endif /* __ASSEMBLY__ */
99
100#ifdef CONFIG_HUGETLB_PAGE
101
102#define HTLB_AREA_SHIFT 40
103#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT)
104#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT)
105
106#define LOW_ESID_MASK(addr, len) \
107 (((1U << (GET_ESID(min((addr)+(len)-1, 0x100000000UL))+1)) \
108 - (1U << GET_ESID(min((addr), 0x100000000UL)))) & 0xffff)
109#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \
110 - (1U << GET_HTLB_AREA(addr))) & 0xffff)
111
112#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
113#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
114#define ARCH_HAS_SETCLEAR_HUGE_PTE
115
116#define touches_hugepage_low_range(mm, addr, len) \
117 (((addr) < 0x100000000UL) \
118 && (LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas))
119#define touches_hugepage_high_range(mm, addr, len) \
120 ((((addr) + (len)) > 0x100000000UL) \
121 && (HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas))
122
123#define __within_hugepage_low_range(addr, len, segmask) \
124 ( (((addr)+(len)) <= 0x100000000UL) \
125 && ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask)))
126#define within_hugepage_low_range(addr, len) \
127 __within_hugepage_low_range((addr), (len), \
128 current->mm->context.low_htlb_areas)
129#define __within_hugepage_high_range(addr, len, zonemask) \
130 ( ((addr) >= 0x100000000UL) \
131 && ((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask)))
132#define within_hugepage_high_range(addr, len) \
133 __within_hugepage_high_range((addr), (len), \
134 current->mm->context.high_htlb_areas)
135
136#define is_hugepage_only_range(mm, addr, len) \
137 (touches_hugepage_high_range((mm), (addr), (len)) || \
138 touches_hugepage_low_range((mm), (addr), (len)))
139#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
140
141#define in_hugepage_area(context, addr) \
142 (cpu_has_feature(CPU_FTR_16M_PAGE) && \
143 ( ( (addr) >= 0x100000000UL) \
144 ? ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) \
145 : ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) )
146
147#else /* !CONFIG_HUGETLB_PAGE */
148
149#define in_hugepage_area(mm, addr) 0
150
151#endif /* !CONFIG_HUGETLB_PAGE */
152
153#ifdef MODULE
154#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
155#else
156#define __page_aligned \
157 __attribute__((__aligned__(PAGE_SIZE), \
158 __section__(".data.page_aligned")))
159#endif
160
161#define VM_DATA_DEFAULT_FLAGS \
162 (test_thread_flag(TIF_32BIT) ? \
163 VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
164
165/*
166 * This is the default if a program doesn't have a PT_GNU_STACK
167 * program header entry. The PPC64 ELF ABI has a non executable stack
168 * stack by default, so in the absense of a PT_GNU_STACK program header
169 * we turn execute permission off.
170 */
171#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
172 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
173
174#define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
175 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
176
177#define VM_STACK_DEFAULT_FLAGS \
178 (test_thread_flag(TIF_32BIT) ? \
179 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
180
181#include <asm-generic/page.h>
182
183#endif /* _ASM_POWERPC_PAGE_64_H */
diff --git a/include/asm-ppc64/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 60cf8c838af0..223ec7bd81da 100644
--- a/include/asm-ppc64/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -1,8 +1,10 @@
1#ifdef __KERNEL__ 1#ifndef _ASM_POWERPC_PCI_BRIDGE_H
2#ifndef _ASM_PCI_BRIDGE_H 2#define _ASM_POWERPC_PCI_BRIDGE_H
3#define _ASM_PCI_BRIDGE_H 3
4#ifndef CONFIG_PPC64
5#include <asm-ppc/pci-bridge.h>
6#else
4 7
5#include <linux/config.h>
6#include <linux/pci.h> 8#include <linux/pci.h>
7#include <linux/list.h> 9#include <linux/list.h>
8 10
@@ -61,13 +63,14 @@ struct pci_dn {
61 int busno; /* for pci devices */ 63 int busno; /* for pci devices */
62 int bussubno; /* for pci devices */ 64 int bussubno; /* for pci devices */
63 int devfn; /* for pci devices */ 65 int devfn; /* for pci devices */
66
67#ifdef CONFIG_PPC_PSERIES
64 int eeh_mode; /* See eeh.h for possible EEH_MODEs */ 68 int eeh_mode; /* See eeh.h for possible EEH_MODEs */
65 int eeh_config_addr; 69 int eeh_config_addr;
66 int eeh_capable; /* from firmware */
67 int eeh_check_count; /* # times driver ignored error */ 70 int eeh_check_count; /* # times driver ignored error */
68 int eeh_freeze_count; /* # times this device froze up. */ 71 int eeh_freeze_count; /* # times this device froze up. */
69 int eeh_is_bridge; /* device is pci-to-pci bridge */ 72 int eeh_is_bridge; /* device is pci-to-pci bridge */
70 73#endif
71 int pci_ext_config_space; /* for pci devices */ 74 int pci_ext_config_space; /* for pci devices */
72 struct pci_controller *phb; /* for pci devices */ 75 struct pci_controller *phb; /* for pci devices */
73 struct iommu_table *iommu_table; /* for phb's or bridges */ 76 struct iommu_table *iommu_table; /* for phb's or bridges */
@@ -75,9 +78,9 @@ struct pci_dn {
75 struct device_node *node; /* back-pointer to the device_node */ 78 struct device_node *node; /* back-pointer to the device_node */
76#ifdef CONFIG_PPC_ISERIES 79#ifdef CONFIG_PPC_ISERIES
77 struct list_head Device_List; 80 struct list_head Device_List;
78 int Irq; /* Assigned IRQ */ 81 int Irq; /* Assigned IRQ */
79 int Flags; /* Possible flags(disable/bist)*/ 82 int Flags; /* Possible flags(disable/bist)*/
80 u8 LogicalSlot; /* Hv Slot Index for Tces */ 83 u8 LogicalSlot; /* Hv Slot Index for Tces */
81#endif 84#endif
82 u32 config_space[16]; /* saved PCI config space */ 85 u32 config_space[16]; /* saved PCI config space */
83}; 86};
@@ -137,10 +140,14 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
137 return PCI_DN(busdn)->phb; 140 return PCI_DN(busdn)->phb;
138} 141}
139 142
143extern struct pci_controller *
144pcibios_alloc_controller(struct device_node *dev);
145extern void pcibios_free_controller(struct pci_controller *phb);
146
140/* Return values for ppc_md.pci_probe_mode function */ 147/* Return values for ppc_md.pci_probe_mode function */
141#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ 148#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
142#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ 149#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */
143#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ 150#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */
144 151
152#endif /* CONFIG_PPC64 */
145#endif 153#endif
146#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/pci.h b/include/asm-powerpc/pci.h
index fafdf885a3cc..d5934a076bd0 100644
--- a/include/asm-ppc64/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -1,5 +1,5 @@
1#ifndef __PPC64_PCI_H 1#ifndef __ASM_POWERPC_PCI_H
2#define __PPC64_PCI_H 2#define __ASM_POWERPC_PCI_H
3#ifdef __KERNEL__ 3#ifdef __KERNEL__
4 4
5/* 5/*
@@ -18,6 +18,7 @@
18#include <asm/scatterlist.h> 18#include <asm/scatterlist.h>
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/prom.h> 20#include <asm/prom.h>
21#include <asm/pci-bridge.h>
21 22
22#include <asm-generic/pci-dma-compat.h> 23#include <asm-generic/pci-dma-compat.h>
23 24
@@ -26,11 +27,21 @@
26 27
27struct pci_dev; 28struct pci_dev;
28 29
29#ifdef CONFIG_PPC_ISERIES 30/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
31#define IOBASE_BRIDGE_NUMBER 0
32#define IOBASE_MEMORY 1
33#define IOBASE_IO 2
34#define IOBASE_ISA_IO 3
35#define IOBASE_ISA_MEM 4
36
37/*
38 * Set this to 1 if you want the kernel to re-assign all PCI
39 * bus numbers
40 */
41extern int pci_assign_all_buses;
42#define pcibios_assign_all_busses() (pci_assign_all_buses)
43
30#define pcibios_scan_all_fns(a, b) 0 44#define pcibios_scan_all_fns(a, b) 0
31#else
32extern int pcibios_scan_all_fns(struct pci_bus *bus, int devfn);
33#endif
34 45
35static inline void pcibios_set_master(struct pci_dev *dev) 46static inline void pcibios_set_master(struct pci_dev *dev)
36{ 47{
@@ -50,6 +61,7 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
50 return channel ? 15 : 14; 61 return channel ? 15 : 14;
51} 62}
52 63
64#ifdef CONFIG_PPC64
53#define HAVE_ARCH_PCI_MWI 1 65#define HAVE_ARCH_PCI_MWI 1
54static inline int pcibios_prep_mwi(struct pci_dev *dev) 66static inline int pcibios_prep_mwi(struct pci_dev *dev)
55{ 67{
@@ -64,12 +76,10 @@ static inline int pcibios_prep_mwi(struct pci_dev *dev)
64 return 0; 76 return 0;
65} 77}
66 78
67extern unsigned int pcibios_assign_all_busses(void);
68
69extern struct dma_mapping_ops pci_dma_ops; 79extern struct dma_mapping_ops pci_dma_ops;
70 80
71/* For DAC DMA, we currently don't support it by default, but 81/* For DAC DMA, we currently don't support it by default, but
72 * we let the platform override this 82 * we let 64-bit platforms override this.
73 */ 83 */
74static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask) 84static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask)
75{ 85{
@@ -102,6 +112,35 @@ extern int pci_domain_nr(struct pci_bus *bus);
102/* Decide whether to display the domain number in /proc */ 112/* Decide whether to display the domain number in /proc */
103extern int pci_proc_domain(struct pci_bus *bus); 113extern int pci_proc_domain(struct pci_bus *bus);
104 114
115#else /* 32-bit */
116
117#ifdef CONFIG_PCI
118static inline void pci_dma_burst_advice(struct pci_dev *pdev,
119 enum pci_dma_burst_strategy *strat,
120 unsigned long *strategy_parameter)
121{
122 *strat = PCI_DMA_BURST_INFINITY;
123 *strategy_parameter = ~0UL;
124}
125#endif
126
127/*
128 * At present there are very few 32-bit PPC machines that can have
129 * memory above the 4GB point, and we don't support that.
130 */
131#define pci_dac_dma_supported(pci_dev, mask) (0)
132
133/* Return the index of the PCI controller for device PDEV. */
134#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
135
136/* Set the name of the bus as it appears in /proc/bus/pci */
137static inline int pci_proc_domain(struct pci_bus *bus)
138{
139 return 0;
140}
141
142#endif /* CONFIG_PPC64 */
143
105struct vm_area_struct; 144struct vm_area_struct;
106/* Map a range of PCI memory or I/O space for a device into user space */ 145/* Map a range of PCI memory or I/O space for a device into user space */
107int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, 146int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
@@ -110,6 +149,7 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
110/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ 149/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
111#define HAVE_PCI_MMAP 1 150#define HAVE_PCI_MMAP 1
112 151
152#ifdef CONFIG_PPC64
113/* pci_unmap_{single,page} is not a nop, thus... */ 153/* pci_unmap_{single,page} is not a nop, thus... */
114#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ 154#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
115 dma_addr_t ADDR_NAME; 155 dma_addr_t ADDR_NAME;
@@ -124,22 +164,40 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
124#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ 164#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
125 (((PTR)->LEN_NAME) = (VAL)) 165 (((PTR)->LEN_NAME) = (VAL))
126 166
127/* The PCI address space does equal the physical memory 167/* The PCI address space does not equal the physical memory address
128 * address space. The networking and block device layers use 168 * space (we have an IOMMU). The IDE and SCSI device layers use
129 * this boolean for bounce buffer decisions. 169 * this boolean for bounce buffer decisions.
130 */ 170 */
131#define PCI_DMA_BUS_IS_PHYS (0) 171#define PCI_DMA_BUS_IS_PHYS (0)
172
173#else /* 32-bit */
174
175/* The PCI address space does equal the physical memory
176 * address space (no IOMMU). The IDE and SCSI device layers use
177 * this boolean for bounce buffer decisions.
178 */
179#define PCI_DMA_BUS_IS_PHYS (1)
180
181/* pci_unmap_{page,single} is a nop so... */
182#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
183#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
184#define pci_unmap_addr(PTR, ADDR_NAME) (0)
185#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
186#define pci_unmap_len(PTR, LEN_NAME) (0)
187#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
188
189#endif /* CONFIG_PPC64 */
132 190
133extern void 191extern void pcibios_resource_to_bus(struct pci_dev *dev,
134pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 192 struct pci_bus_region *region,
135 struct resource *res); 193 struct resource *res);
136 194
137extern void 195extern void pcibios_bus_to_resource(struct pci_dev *dev,
138pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 196 struct resource *res,
139 struct pci_bus_region *region); 197 struct pci_bus_region *region);
140 198
141static inline struct resource * 199static inline struct resource *pcibios_select_root(struct pci_dev *pdev,
142pcibios_select_root(struct pci_dev *pdev, struct resource *res) 200 struct resource *res)
143{ 201{
144 struct resource *root = NULL; 202 struct resource *root = NULL;
145 203
@@ -151,14 +209,12 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
151 return root; 209 return root;
152} 210}
153 211
154extern int 212extern int unmap_bus_range(struct pci_bus *bus);
155unmap_bus_range(struct pci_bus *bus);
156 213
157extern int 214extern int remap_bus_range(struct pci_bus *bus);
158remap_bus_range(struct pci_bus *bus);
159 215
160extern void 216extern void pcibios_fixup_device_resources(struct pci_dev *dev,
161pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus); 217 struct pci_bus *bus);
162 218
163extern struct pci_controller *init_phb_dynamic(struct device_node *dn); 219extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
164 220
@@ -180,14 +236,12 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file,
180 unsigned long size, 236 unsigned long size,
181 pgprot_t prot); 237 pgprot_t prot);
182 238
183#ifdef CONFIG_PPC_MULTIPLATFORM 239#if defined(CONFIG_PPC_MULTIPLATFORM) || defined(CONFIG_PPC32)
184#define HAVE_ARCH_PCI_RESOURCE_TO_USER 240#define HAVE_ARCH_PCI_RESOURCE_TO_USER
185extern void pci_resource_to_user(const struct pci_dev *dev, int bar, 241extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
186 const struct resource *rsrc, 242 const struct resource *rsrc,
187 u64 *start, u64 *end); 243 u64 *start, u64 *end);
188#endif /* CONFIG_PPC_MULTIPLATFORM */ 244#endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */
189
190 245
191#endif /* __KERNEL__ */ 246#endif /* __KERNEL__ */
192 247#endif /* __ASM_POWERPC_PCI_H */
193#endif /* __PPC64_PCI_H */
diff --git a/include/asm-ppc64/pgalloc.h b/include/asm-powerpc/pgalloc.h
index 98da0e4262bd..bfc2113b3630 100644
--- a/include/asm-ppc64/pgalloc.h
+++ b/include/asm-powerpc/pgalloc.h
@@ -1,5 +1,9 @@
1#ifndef _PPC64_PGALLOC_H 1#ifndef _ASM_POWERPC_PGALLOC_H
2#define _PPC64_PGALLOC_H 2#define _ASM_POWERPC_PGALLOC_H
3
4#ifndef CONFIG_PPC64
5#include <asm-ppc/pgalloc.h>
6#else
3 7
4#include <linux/mm.h> 8#include <linux/mm.h>
5#include <linux/slab.h> 9#include <linux/slab.h>
@@ -10,8 +14,8 @@ extern kmem_cache_t *pgtable_cache[];
10 14
11#ifdef CONFIG_PPC_64K_PAGES 15#ifdef CONFIG_PPC_64K_PAGES
12#define PTE_CACHE_NUM 0 16#define PTE_CACHE_NUM 0
13#define PMD_CACHE_NUM 0 17#define PMD_CACHE_NUM 1
14#define PGD_CACHE_NUM 1 18#define PGD_CACHE_NUM 2
15#else 19#else
16#define PTE_CACHE_NUM 0 20#define PTE_CACHE_NUM 0
17#define PMD_CACHE_NUM 1 21#define PMD_CACHE_NUM 1
@@ -148,4 +152,5 @@ extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf);
148 152
149#define check_pgt_cache() do { } while (0) 153#define check_pgt_cache() do { } while (0)
150 154
151#endif /* _PPC64_PGALLOC_H */ 155#endif /* CONFIG_PPC64 */
156#endif /* _ASM_POWERPC_PGALLOC_H */
diff --git a/include/asm-ppc64/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h
index e9590c06ad92..e9590c06ad92 100644
--- a/include/asm-ppc64/pgtable-4k.h
+++ b/include/asm-powerpc/pgtable-4k.h
diff --git a/include/asm-ppc64/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h
index 154f1840ece4..154f1840ece4 100644
--- a/include/asm-ppc64/pgtable-64k.h
+++ b/include/asm-powerpc/pgtable-64k.h
diff --git a/include/asm-ppc64/pgtable.h b/include/asm-powerpc/pgtable.h
index a9783ba7fe98..0303f57366c1 100644
--- a/include/asm-ppc64/pgtable.h
+++ b/include/asm-powerpc/pgtable.h
@@ -1,5 +1,9 @@
1#ifndef _PPC64_PGTABLE_H 1#ifndef _ASM_POWERPC_PGTABLE_H
2#define _PPC64_PGTABLE_H 2#define _ASM_POWERPC_PGTABLE_H
3
4#ifndef CONFIG_PPC64
5#include <asm-ppc/pgtable.h>
6#else
3 7
4/* 8/*
5 * This file contains the functions and defines necessary to modify and use 9 * This file contains the functions and defines necessary to modify and use
@@ -47,6 +51,13 @@ struct mm_struct;
47#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) 51#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
48 52
49/* 53/*
54 * Define the address range of the imalloc VM area.
55 */
56#define PHBS_IO_BASE VMALLOC_END
57#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
58#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
59
60/*
50 * Common bits in a linux-style PTE. These match the bits in the 61 * Common bits in a linux-style PTE. These match the bits in the
51 * (hardware-defined) PowerPC PTE as closely as possible. Additional 62 * (hardware-defined) PowerPC PTE as closely as possible. Additional
52 * bits may be defined in pgtable-*.h 63 * bits may be defined in pgtable-*.h
@@ -69,7 +80,7 @@ struct mm_struct;
69 80
70#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY) 81#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
71 82
72/* __pgprot defined in asm-ppc64/page.h */ 83/* __pgprot defined in asm-powerpc/page.h */
73#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) 84#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
74 85
75#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER) 86#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
@@ -509,4 +520,5 @@ void pgtable_cache_init(void);
509 520
510#endif /* __ASSEMBLY__ */ 521#endif /* __ASSEMBLY__ */
511 522
512#endif /* _PPC64_PGTABLE_H */ 523#endif /* CONFIG_PPC64 */
524#endif /* _ASM_POWERPC_PGTABLE_H */
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index 13aacff755f3..36cdc869e580 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -14,7 +14,6 @@
14 14
15extern unsigned long isa_io_base; 15extern unsigned long isa_io_base;
16 16
17extern void pci_setup_pci_controller(struct pci_controller *hose);
18extern void pci_setup_phb_io(struct pci_controller *hose, int primary); 17extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
19extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary); 18extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
20 19
@@ -26,6 +25,10 @@ extern unsigned long find_and_init_phbs(void);
26 25
27extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */ 26extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */
28 27
28/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
29#define BUID_HI(buid) ((buid) >> 32)
30#define BUID_LO(buid) ((buid) & 0xffffffff)
31
29/* PCI device_node operations */ 32/* PCI device_node operations */
30struct device_node; 33struct device_node;
31typedef void *(*traverse_func)(struct device_node *me, void *data); 34typedef void *(*traverse_func)(struct device_node *me, void *data);
@@ -36,10 +39,6 @@ void pci_devs_phb_init(void);
36void pci_devs_phb_init_dynamic(struct pci_controller *phb); 39void pci_devs_phb_init_dynamic(struct pci_controller *phb);
37void __devinit scan_phb(struct pci_controller *hose); 40void __devinit scan_phb(struct pci_controller *hose);
38 41
39/* PCI address cache management routines */
40void pci_addr_cache_insert_device(struct pci_dev *dev);
41void pci_addr_cache_remove_device(struct pci_dev *dev);
42
43/* From rtas_pci.h */ 42/* From rtas_pci.h */
44void init_pci_config_tokens (void); 43void init_pci_config_tokens (void);
45unsigned long get_phb_buid (struct device_node *); 44unsigned long get_phb_buid (struct device_node *);
@@ -49,7 +48,49 @@ extern void pSeries_final_fixup(void);
49extern void pSeries_irq_bus_setup(struct pci_bus *bus); 48extern void pSeries_irq_bus_setup(struct pci_bus *bus);
50 49
51extern unsigned long pci_probe_only; 50extern unsigned long pci_probe_only;
52extern unsigned long pci_assign_all_buses; 51
53extern int pci_read_irq_line(struct pci_dev *pci_dev); 52/* ---- EEH internal-use-only related routines ---- */
53#ifdef CONFIG_EEH
54/**
55 * rtas_set_slot_reset -- unfreeze a frozen slot
56 *
57 * Clear the EEH-frozen condition on a slot. This routine
58 * does this by asserting the PCI #RST line for 1/8th of
59 * a second; this routine will sleep while the adapter is
60 * being reset.
61 */
62void rtas_set_slot_reset (struct pci_dn *);
63
64/**
65 * eeh_restore_bars - Restore device configuration info.
66 *
67 * A reset of a PCI device will clear out its config space.
68 * This routines will restore the config space for this
69 * device, and is children, to values previously obtained
70 * from the firmware.
71 */
72void eeh_restore_bars(struct pci_dn *);
73
74/**
75 * rtas_configure_bridge -- firmware initialization of pci bridge
76 *
77 * Ask the firmware to configure all PCI bridges devices
78 * located behind the indicated node. Required after a
79 * pci device reset. Does essentially the same hing as
80 * eeh_restore_bars, but for brdges, and lets firmware
81 * do the work.
82 */
83void rtas_configure_bridge(struct pci_dn *);
84
85int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
86
87/**
88 * mark and clear slots: find "partition endpoint" PE and set or
89 * clear the flags for each subnode of the PE.
90 */
91void eeh_mark_slot (struct device_node *dn, int mode_flag);
92void eeh_clear_slot (struct device_node *dn, int mode_flag);
93
94#endif
54 95
55#endif /* _ASM_POWERPC_PPC_PCI_H */ 96#endif /* _ASM_POWERPC_PPC_PCI_H */
diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h
index c534ca41224b..c27baa0563fe 100644
--- a/include/asm-powerpc/ppc_asm.h
+++ b/include/asm-powerpc/ppc_asm.h
@@ -6,8 +6,13 @@
6 6
7#include <linux/stringify.h> 7#include <linux/stringify.h>
8#include <linux/config.h> 8#include <linux/config.h>
9#include <asm/asm-compat.h>
9 10
10#ifdef __ASSEMBLY__ 11#ifndef __ASSEMBLY__
12#error __FILE__ should only be used in assembler files
13#else
14
15#define SZL (BITS_PER_LONG/8)
11 16
12/* 17/*
13 * Macros for storing registers into and loading registers from 18 * Macros for storing registers into and loading registers from
@@ -184,12 +189,6 @@ n:
184 oris reg,reg,(label)@h; \ 189 oris reg,reg,(label)@h; \
185 ori reg,reg,(label)@l; 190 ori reg,reg,(label)@l;
186 191
187/* operations for longs and pointers */
188#define LDL ld
189#define STL std
190#define CMPI cmpdi
191#define SZL 8
192
193/* offsets for stack frame layout */ 192/* offsets for stack frame layout */
194#define LRSAVE 16 193#define LRSAVE 16
195 194
@@ -203,12 +202,6 @@ n:
203 202
204#define OFF(name) name@l 203#define OFF(name) name@l
205 204
206/* operations for longs and pointers */
207#define LDL lwz
208#define STL stw
209#define CMPI cmpwi
210#define SZL 4
211
212/* offsets for stack frame layout */ 205/* offsets for stack frame layout */
213#define LRSAVE 4 206#define LRSAVE 4
214 207
@@ -266,15 +259,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
266#endif 259#endif
267 260
268 261
269#ifdef CONFIG_IBM405_ERR77
270#define PPC405_ERR77(ra,rb) dcbt ra, rb;
271#define PPC405_ERR77_SYNC sync;
272#else
273#define PPC405_ERR77(ra,rb)
274#define PPC405_ERR77_SYNC
275#endif
276
277
278#ifdef CONFIG_IBM440EP_ERR42 262#ifdef CONFIG_IBM440EP_ERR42
279#define PPC440EP_ERR42 isync 263#define PPC440EP_ERR42 isync
280#else 264#else
@@ -502,17 +486,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
502#define N_SLINE 68 486#define N_SLINE 68
503#define N_SO 100 487#define N_SO 100
504 488
505#define ASM_CONST(x) x
506#else
507 #define __ASM_CONST(x) x##UL
508 #define ASM_CONST(x) __ASM_CONST(x)
509
510#ifdef CONFIG_PPC64
511#define DATAL ".llong"
512#else
513#define DATAL ".long"
514#endif
515
516#endif /* __ASSEMBLY__ */ 489#endif /* __ASSEMBLY__ */
517 490
518#endif /* _ASM_POWERPC_PPC_ASM_H */ 491#endif /* _ASM_POWERPC_PPC_ASM_H */
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
index 1dc4bf7b52b3..d12382d292d4 100644
--- a/include/asm-powerpc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -17,65 +17,71 @@
17#include <linux/compiler.h> 17#include <linux/compiler.h>
18#include <asm/ptrace.h> 18#include <asm/ptrace.h>
19#include <asm/types.h> 19#include <asm/types.h>
20#ifdef CONFIG_PPC64
21#include <asm/systemcfg.h>
22#endif
23 20
24#ifdef CONFIG_PPC32 21/* We do _not_ want to define new machine types at all, those must die
25/* 32-bit platform types */ 22 * in favor of using the device-tree
26/* We only need to define a new _MACH_xxx for machines which are part of 23 * -- BenH.
27 * a configuration which supports more than one type of different machine.
28 * This is currently limited to CONFIG_PPC_MULTIPLATFORM and CHRP/PReP/PMac.
29 * -- Tom
30 */ 24 */
31#define _MACH_prep 0x00000001
32#define _MACH_Pmac 0x00000002 /* pmac or pmac clone (non-chrp) */
33#define _MACH_chrp 0x00000004 /* chrp machine */
34 25
35/* see residual.h for these */ 26/* Platforms codes (to be obsoleted) */
27#define PLATFORM_PSERIES 0x0100
28#define PLATFORM_PSERIES_LPAR 0x0101
29#define PLATFORM_ISERIES_LPAR 0x0201
30#define PLATFORM_LPAR 0x0001
31#define PLATFORM_POWERMAC 0x0400
32#define PLATFORM_MAPLE 0x0500
33#define PLATFORM_PREP 0x0600
34#define PLATFORM_CHRP 0x0700
35#define PLATFORM_CELL 0x1000
36
37/* Compat platform codes for 32 bits */
38#define _MACH_prep PLATFORM_PREP
39#define _MACH_Pmac PLATFORM_POWERMAC
40#define _MACH_chrp PLATFORM_CHRP
41
42/* PREP sub-platform types see residual.h for these */
36#define _PREP_Motorola 0x01 /* motorola prep */ 43#define _PREP_Motorola 0x01 /* motorola prep */
37#define _PREP_Firm 0x02 /* firmworks prep */ 44#define _PREP_Firm 0x02 /* firmworks prep */
38#define _PREP_IBM 0x00 /* ibm prep */ 45#define _PREP_IBM 0x00 /* ibm prep */
39#define _PREP_Bull 0x03 /* bull prep */ 46#define _PREP_Bull 0x03 /* bull prep */
40 47
41/* these are arbitrary */ 48/* CHRP sub-platform types. These are arbitrary */
42#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */ 49#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */
43#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */ 50#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
44#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */ 51#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
45 52
46#ifdef CONFIG_PPC_MULTIPLATFORM 53#define platform_is_pseries() (_machine == PLATFORM_PSERIES || \
54 _machine == PLATFORM_PSERIES_LPAR)
55#define platform_is_lpar() (!!(_machine & PLATFORM_LPAR))
56
57#if defined(CONFIG_PPC_MULTIPLATFORM)
47extern int _machine; 58extern int _machine;
48 59
60#ifdef CONFIG_PPC32
61
49/* what kind of prep workstation we are */ 62/* what kind of prep workstation we are */
50extern int _prep_type; 63extern int _prep_type;
51extern int _chrp_type; 64extern int _chrp_type;
52 65
53/* 66/*
54 * This is used to identify the board type from a given PReP board 67 * This is used to identify the board type from a given PReP board
55 * vendor. Board revision is also made available. 68 * vendor. Board revision is also made available. This will be moved
69 * elsewhere soon
56 */ 70 */
57extern unsigned char ucSystemType; 71extern unsigned char ucSystemType;
58extern unsigned char ucBoardRev; 72extern unsigned char ucBoardRev;
59extern unsigned char ucBoardRevMaj, ucBoardRevMin; 73extern unsigned char ucBoardRevMaj, ucBoardRevMin;
74
75#endif /* CONFIG_PPC32 */
76
77#elif defined(CONFIG_PPC_ISERIES)
78/*
79 * iSeries is soon to become MULTIPLATFORM hopefully ...
80 */
81#define _machine PLATFORM_ISERIES_LPAR
60#else 82#else
61#define _machine 0 83#define _machine 0
62#endif /* CONFIG_PPC_MULTIPLATFORM */ 84#endif /* CONFIG_PPC_MULTIPLATFORM */
63#endif /* CONFIG_PPC32 */
64
65#ifdef CONFIG_PPC64
66/* Platforms supported by PPC64 */
67#define PLATFORM_PSERIES 0x0100
68#define PLATFORM_PSERIES_LPAR 0x0101
69#define PLATFORM_ISERIES_LPAR 0x0201
70#define PLATFORM_LPAR 0x0001
71#define PLATFORM_POWERMAC 0x0400
72#define PLATFORM_MAPLE 0x0500
73#define PLATFORM_CELL 0x1000
74
75/* Compatibility with drivers coming from PPC32 world */
76#define _machine (systemcfg->platform)
77#define _MACH_Pmac PLATFORM_POWERMAC
78#endif
79 85
80/* 86/*
81 * Default implementation of macro that returns current 87 * Default implementation of macro that returns current
@@ -171,8 +177,8 @@ struct thread_struct {
171#ifdef CONFIG_PPC64 177#ifdef CONFIG_PPC64
172 unsigned long start_tb; /* Start purr when proc switched in */ 178 unsigned long start_tb; /* Start purr when proc switched in */
173 unsigned long accum_tb; /* Total accumilated purr for process */ 179 unsigned long accum_tb; /* Total accumilated purr for process */
174 unsigned long vdso_base; /* base of the vDSO library */
175#endif 180#endif
181 unsigned long vdso_base; /* base of the vDSO library */
176 unsigned long dabr; /* Data address breakpoint register */ 182 unsigned long dabr; /* Data address breakpoint register */
177#ifdef CONFIG_ALTIVEC 183#ifdef CONFIG_ALTIVEC
178 /* Complete AltiVec register set */ 184 /* Complete AltiVec register set */
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 489cf4c99c21..eb392d038ed7 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -16,7 +16,11 @@
16/* Pickup Book E specific registers. */ 16/* Pickup Book E specific registers. */
17#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 17#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
18#include <asm/reg_booke.h> 18#include <asm/reg_booke.h>
19#endif 19#endif /* CONFIG_BOOKE || CONFIG_40x */
20
21#ifdef CONFIG_8xx
22#include <asm/reg_8xx.h>
23#endif /* CONFIG_8xx */
20 24
21#define MSR_SF_LG 63 /* Enable 64 bit mode */ 25#define MSR_SF_LG 63 /* Enable 64 bit mode */
22#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ 26#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
@@ -359,6 +363,7 @@
359#define SPRN_RPA 0x3D6 /* Required Physical Address Register */ 363#define SPRN_RPA 0x3D6 /* Required Physical Address Register */
360#define SPRN_SDA 0x3BF /* Sampled Data Address Register */ 364#define SPRN_SDA 0x3BF /* Sampled Data Address Register */
361#define SPRN_SDR1 0x019 /* MMU Hash Base Register */ 365#define SPRN_SDR1 0x019 /* MMU Hash Base Register */
366#define SPRN_ASR 0x118 /* Address Space Register */
362#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */ 367#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */
363#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */ 368#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */
364#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */ 369#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */
diff --git a/include/asm-ppc/cache.h b/include/asm-powerpc/reg_8xx.h
index 7a157d0f4b5f..e8ea346b21d3 100644
--- a/include/asm-ppc/cache.h
+++ b/include/asm-powerpc/reg_8xx.h
@@ -1,49 +1,9 @@
1/* 1/*
2 * include/asm-ppc/cache.h 2 * Contains register definitions common to PowerPC 8xx CPUs. Notice
3 */ 3 */
4#ifdef __KERNEL__ 4#ifndef _ASM_POWERPC_REG_8xx_H
5#ifndef __ARCH_PPC_CACHE_H 5#define _ASM_POWERPC_REG_8xx_H
6#define __ARCH_PPC_CACHE_H
7 6
8#include <linux/config.h>
9
10/* bytes per L1 cache line */
11#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
12#define L1_CACHE_SHIFT 4
13#define MAX_COPY_PREFETCH 1
14#elif defined(CONFIG_PPC64BRIDGE)
15#define L1_CACHE_SHIFT 7
16#define MAX_COPY_PREFETCH 1
17#else
18#define L1_CACHE_SHIFT 5
19#define MAX_COPY_PREFETCH 4
20#endif
21
22#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
23
24#define SMP_CACHE_BYTES L1_CACHE_BYTES
25#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
26
27#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
28#define L1_CACHE_PAGES 8
29
30#ifndef __ASSEMBLY__
31extern void clean_dcache_range(unsigned long start, unsigned long stop);
32extern void flush_dcache_range(unsigned long start, unsigned long stop);
33extern void invalidate_dcache_range(unsigned long start, unsigned long stop);
34extern void flush_dcache_all(void);
35#endif /* __ASSEMBLY__ */
36
37/* prep registers for L2 */
38#define CACHECRBA 0x80000823 /* Cache configuration register address */
39#define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
40#define L2CACHE_512KB 0x00 /* 512KB */
41#define L2CACHE_256KB 0x01 /* 256KB */
42#define L2CACHE_1MB 0x02 /* 1MB */
43#define L2CACHE_NONE 0x03 /* NONE */
44#define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
45
46#ifdef CONFIG_8xx
47/* Cache control on the MPC8xx is provided through some additional 7/* Cache control on the MPC8xx is provided through some additional
48 * special purpose registers. 8 * special purpose registers.
49 */ 9 */
@@ -78,7 +38,5 @@ extern void flush_dcache_all(void);
78 38
79#define DC_DFWT 0x40000000 /* Data cache is forced write through */ 39#define DC_DFWT 0x40000000 /* Data cache is forced write through */
80#define DC_LES 0x20000000 /* Caches are little endian mode */ 40#define DC_LES 0x20000000 /* Caches are little endian mode */
81#endif /* CONFIG_8xx */
82 41
83#endif 42#endif /* _ASM_POWERPC_REG_8xx_H */
84#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/serial.h b/include/asm-powerpc/serial.h
index d6bcb79b7d7b..b273d630b32f 100644
--- a/include/asm-ppc64/serial.h
+++ b/include/asm-powerpc/serial.h
@@ -1,21 +1,16 @@
1/* 1/*
2 * include/asm-ppc64/serial.h
3 */
4#ifndef _PPC64_SERIAL_H
5#define _PPC64_SERIAL_H
6
7/*
8 * This assumes you have a 1.8432 MHz clock for your UART.
9 *
10 * It'd be nice if someone built a serial card with a 24.576 MHz
11 * clock, since the 16550A is capable of handling a top speed of 1.5
12 * megabits/second; but this requires the faster clock.
13 *
14 * This program is free software; you can redistribute it and/or 2 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License 3 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 4 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version. 5 * 2 of the License, or (at your option) any later version.
18 */ 6 */
7#ifndef _ASM_POWERPC_SERIAL_H
8#define _ASM_POWERPC_SERIAL_H
9
10/*
11 * Serial ports are not listed here, because they are discovered
12 * through the device tree.
13 */
19 14
20/* Default baud base if not found in device-tree */ 15/* Default baud base if not found in device-tree */
21#define BASE_BAUD ( 1843200 / 16 ) 16#define BASE_BAUD ( 1843200 / 16 )
diff --git a/include/asm-ppc/signal.h b/include/asm-powerpc/signal.h
index caf6ede3710f..694c8d2dab87 100644
--- a/include/asm-ppc/signal.h
+++ b/include/asm-powerpc/signal.h
@@ -1,18 +1,11 @@
1#ifndef _ASMPPC_SIGNAL_H 1#ifndef _ASM_POWERPC_SIGNAL_H
2#define _ASMPPC_SIGNAL_H 2#define _ASM_POWERPC_SIGNAL_H
3 3
4#ifdef __KERNEL__
5#include <linux/types.h> 4#include <linux/types.h>
6#endif /* __KERNEL__ */ 5#include <linux/config.h>
7
8/* Avoid too many header ordering problems. */
9struct siginfo;
10
11/* Most things should be clean enough to redefine this at will, if care
12 is taken to make libc match. */
13 6
14#define _NSIG 64 7#define _NSIG 64
15#define _NSIG_BPW 32 8#define _NSIG_BPW BITS_PER_LONG
16#define _NSIG_WORDS (_NSIG / _NSIG_BPW) 9#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
17 10
18typedef unsigned long old_sigset_t; /* at least 32 bits */ 11typedef unsigned long old_sigset_t; /* at least 32 bits */
@@ -77,19 +70,19 @@ typedef struct {
77 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single 70 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
78 * Unix names RESETHAND and NODEFER respectively. 71 * Unix names RESETHAND and NODEFER respectively.
79 */ 72 */
80#define SA_NOCLDSTOP 0x00000001 73#define SA_NOCLDSTOP 0x00000001U
81#define SA_NOCLDWAIT 0x00000002 74#define SA_NOCLDWAIT 0x00000002U
82#define SA_SIGINFO 0x00000004 75#define SA_SIGINFO 0x00000004U
83#define SA_ONSTACK 0x08000000 76#define SA_ONSTACK 0x08000000U
84#define SA_RESTART 0x10000000 77#define SA_RESTART 0x10000000U
85#define SA_NODEFER 0x40000000 78#define SA_NODEFER 0x40000000U
86#define SA_RESETHAND 0x80000000 79#define SA_RESETHAND 0x80000000U
87 80
88#define SA_NOMASK SA_NODEFER 81#define SA_NOMASK SA_NODEFER
89#define SA_ONESHOT SA_RESETHAND 82#define SA_ONESHOT SA_RESETHAND
90#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */ 83#define SA_INTERRUPT 0x20000000u /* dummy -- ignored */
91 84
92#define SA_RESTORER 0x04000000 85#define SA_RESTORER 0x04000000U
93 86
94/* 87/*
95 * sigaltstack controls 88 * sigaltstack controls
@@ -127,10 +120,13 @@ typedef struct sigaltstack {
127} stack_t; 120} stack_t;
128 121
129#ifdef __KERNEL__ 122#ifdef __KERNEL__
130#include <asm/sigcontext.h> 123struct pt_regs;
124extern int do_signal(sigset_t *oldset, struct pt_regs *regs);
125extern int do_signal32(sigset_t *oldset, struct pt_regs *regs);
131#define ptrace_signal_deliver(regs, cookie) do { } while (0) 126#define ptrace_signal_deliver(regs, cookie) do { } while (0)
132#endif /* __KERNEL__ */ 127#endif /* __KERNEL__ */
133 128
129#ifndef __powerpc64__
134/* 130/*
135 * These are parameters to dbg_sigreturn syscall. They enable or 131 * These are parameters to dbg_sigreturn syscall. They enable or
136 * disable certain debugging things that can be done from signal 132 * disable certain debugging things that can be done from signal
@@ -149,5 +145,6 @@ struct sig_dbg_op {
149 145
150/* Enable or disable branch tracing. The value sets the state. */ 146/* Enable or disable branch tracing. The value sets the state. */
151#define SIG_DBG_BRANCH_TRACING 2 147#define SIG_DBG_BRANCH_TRACING 2
148#endif /* ! __powerpc64__ */
152 149
153#endif 150#endif /* _ASM_POWERPC_SIGNAL_H */
diff --git a/include/asm-powerpc/sparsemem.h b/include/asm-powerpc/sparsemem.h
index 1c95ab99deb3..ba1b34fdb967 100644
--- a/include/asm-powerpc/sparsemem.h
+++ b/include/asm-powerpc/sparsemem.h
@@ -8,8 +8,12 @@
8 * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space 8 * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space
9 */ 9 */
10#define SECTION_SIZE_BITS 24 10#define SECTION_SIZE_BITS 24
11#define MAX_PHYSADDR_BITS 38 11#define MAX_PHYSADDR_BITS 44
12#define MAX_PHYSMEM_BITS 36 12#define MAX_PHYSMEM_BITS 44
13
14#ifdef CONFIG_MEMORY_HOTPLUG
15extern void create_section_mapping(unsigned long start, unsigned long end);
16#endif /* CONFIG_MEMORY_HOTPLUG */
13 17
14#endif /* CONFIG_SPARSEMEM */ 18#endif /* CONFIG_SPARSEMEM */
15 19
diff --git a/include/asm-ppc64/spinlock.h b/include/asm-powerpc/spinlock.h
index 7d84fb5e39f1..caa4b14e0e94 100644
--- a/include/asm-ppc64/spinlock.h
+++ b/include/asm-powerpc/spinlock.h
@@ -18,31 +18,41 @@
18 * 18 *
19 * (the type definitions are in asm/spinlock_types.h) 19 * (the type definitions are in asm/spinlock_types.h)
20 */ 20 */
21#include <linux/config.h> 21#ifdef CONFIG_PPC64
22#include <asm/paca.h> 22#include <asm/paca.h>
23#include <asm/hvcall.h> 23#include <asm/hvcall.h>
24#include <asm/iseries/hv_call.h> 24#include <asm/iseries/hv_call.h>
25#endif
26#include <asm/asm-compat.h>
27#include <asm/synch.h>
25 28
26#define __raw_spin_is_locked(x) ((x)->slock != 0) 29#define __raw_spin_is_locked(x) ((x)->slock != 0)
27 30
31#ifdef CONFIG_PPC64
32/* use 0x800000yy when locked, where yy == CPU number */
33#define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
34#else
35#define LOCK_TOKEN 1
36#endif
37
28/* 38/*
29 * This returns the old value in the lock, so we succeeded 39 * This returns the old value in the lock, so we succeeded
30 * in getting the lock if the return value is 0. 40 * in getting the lock if the return value is 0.
31 */ 41 */
32static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock) 42static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock)
33{ 43{
34 unsigned long tmp, tmp2; 44 unsigned long tmp, token;
35 45
46 token = LOCK_TOKEN;
36 __asm__ __volatile__( 47 __asm__ __volatile__(
37" lwz %1,%3(13) # __spin_trylock\n\ 48"1: lwarx %0,0,%2 # __spin_trylock\n\
381: lwarx %0,0,%2\n\
39 cmpwi 0,%0,0\n\ 49 cmpwi 0,%0,0\n\
40 bne- 2f\n\ 50 bne- 2f\n\
41 stwcx. %1,0,%2\n\ 51 stwcx. %1,0,%2\n\
42 bne- 1b\n\ 52 bne- 1b\n\
43 isync\n\ 53 isync\n\
442:" : "=&r" (tmp), "=&r" (tmp2) 542:" : "=&r" (tmp)
45 : "r" (&lock->slock), "i" (offsetof(struct paca_struct, lock_token)) 55 : "r" (token), "r" (&lock->slock)
46 : "cr0", "memory"); 56 : "cr0", "memory");
47 57
48 return tmp; 58 return tmp;
@@ -113,11 +123,17 @@ static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long
113 123
114static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock) 124static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
115{ 125{
116 __asm__ __volatile__("lwsync # __raw_spin_unlock": : :"memory"); 126 __asm__ __volatile__(SYNC_ON_SMP" # __raw_spin_unlock"
127 : : :"memory");
117 lock->slock = 0; 128 lock->slock = 0;
118} 129}
119 130
131#ifdef CONFIG_PPC64
120extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); 132extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
133#else
134#define __raw_spin_unlock_wait(lock) \
135 do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
136#endif
121 137
122/* 138/*
123 * Read-write spinlocks, allowing multiple readers 139 * Read-write spinlocks, allowing multiple readers
@@ -133,6 +149,14 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
133#define __raw_read_can_lock(rw) ((rw)->lock >= 0) 149#define __raw_read_can_lock(rw) ((rw)->lock >= 0)
134#define __raw_write_can_lock(rw) (!(rw)->lock) 150#define __raw_write_can_lock(rw) (!(rw)->lock)
135 151
152#ifdef CONFIG_PPC64
153#define __DO_SIGN_EXTEND "extsw %0,%0\n"
154#define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */
155#else
156#define __DO_SIGN_EXTEND
157#define WRLOCK_TOKEN (-1)
158#endif
159
136/* 160/*
137 * This returns the old value in the lock + 1, 161 * This returns the old value in the lock + 1,
138 * so we got a read lock if the return value is > 0. 162 * so we got a read lock if the return value is > 0.
@@ -142,11 +166,12 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
142 long tmp; 166 long tmp;
143 167
144 __asm__ __volatile__( 168 __asm__ __volatile__(
145"1: lwarx %0,0,%1 # read_trylock\n\ 169"1: lwarx %0,0,%1 # read_trylock\n"
146 extsw %0,%0\n\ 170 __DO_SIGN_EXTEND
147 addic. %0,%0,1\n\ 171" addic. %0,%0,1\n\
148 ble- 2f\n\ 172 ble- 2f\n"
149 stwcx. %0,0,%1\n\ 173 PPC405_ERR77(0,%1)
174" stwcx. %0,0,%1\n\
150 bne- 1b\n\ 175 bne- 1b\n\
151 isync\n\ 176 isync\n\
1522:" : "=&r" (tmp) 1772:" : "=&r" (tmp)
@@ -162,18 +187,19 @@ static long __inline__ __read_trylock(raw_rwlock_t *rw)
162 */ 187 */
163static __inline__ long __write_trylock(raw_rwlock_t *rw) 188static __inline__ long __write_trylock(raw_rwlock_t *rw)
164{ 189{
165 long tmp, tmp2; 190 long tmp, token;
166 191
192 token = WRLOCK_TOKEN;
167 __asm__ __volatile__( 193 __asm__ __volatile__(
168" lwz %1,%3(13) # write_trylock\n\ 194"1: lwarx %0,0,%2 # write_trylock\n\
1691: lwarx %0,0,%2\n\
170 cmpwi 0,%0,0\n\ 195 cmpwi 0,%0,0\n\
171 bne- 2f\n\ 196 bne- 2f\n"
172 stwcx. %1,0,%2\n\ 197 PPC405_ERR77(0,%1)
198" stwcx. %1,0,%2\n\
173 bne- 1b\n\ 199 bne- 1b\n\
174 isync\n\ 200 isync\n\
1752:" : "=&r" (tmp), "=&r" (tmp2) 2012:" : "=&r" (tmp)
176 : "r" (&rw->lock), "i" (offsetof(struct paca_struct, lock_token)) 202 : "r" (token), "r" (&rw->lock)
177 : "cr0", "memory"); 203 : "cr0", "memory");
178 204
179 return tmp; 205 return tmp;
@@ -224,8 +250,9 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
224 __asm__ __volatile__( 250 __asm__ __volatile__(
225 "eieio # read_unlock\n\ 251 "eieio # read_unlock\n\
2261: lwarx %0,0,%1\n\ 2521: lwarx %0,0,%1\n\
227 addic %0,%0,-1\n\ 253 addic %0,%0,-1\n"
228 stwcx. %0,0,%1\n\ 254 PPC405_ERR77(0,%1)
255" stwcx. %0,0,%1\n\
229 bne- 1b" 256 bne- 1b"
230 : "=&r"(tmp) 257 : "=&r"(tmp)
231 : "r"(&rw->lock) 258 : "r"(&rw->lock)
@@ -234,7 +261,8 @@ static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
234 261
235static __inline__ void __raw_write_unlock(raw_rwlock_t *rw) 262static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
236{ 263{
237 __asm__ __volatile__("lwsync # write_unlock": : :"memory"); 264 __asm__ __volatile__(SYNC_ON_SMP" # write_unlock"
265 : : :"memory");
238 rw->lock = 0; 266 rw->lock = 0;
239} 267}
240 268
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 3536a5cd7a2d..5341b75c75cb 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -8,7 +8,6 @@
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9 9
10#include <asm/hw_irq.h> 10#include <asm/hw_irq.h>
11#include <asm/ppc_asm.h>
12#include <asm/atomic.h> 11#include <asm/atomic.h>
13 12
14/* 13/*
@@ -180,6 +179,7 @@ extern struct task_struct *_switch(struct thread_struct *prev,
180extern unsigned int rtas_data; 179extern unsigned int rtas_data;
181extern int mem_init_done; /* set on boot once kmalloc can be called */ 180extern int mem_init_done; /* set on boot once kmalloc can be called */
182extern unsigned long memory_limit; 181extern unsigned long memory_limit;
182extern unsigned long klimit;
183 183
184extern int powersave_nap; /* set if nap mode can be used in idle loop */ 184extern int powersave_nap; /* set if nap mode can be used in idle loop */
185 185
diff --git a/include/asm-ppc64/tce.h b/include/asm-powerpc/tce.h
index d40b6b42ab35..980a094fd5a7 100644
--- a/include/asm-ppc64/tce.h
+++ b/include/asm-powerpc/tce.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation 2 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
3 * Rewrite, cleanup: 3 * Rewrite, cleanup:
4 * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation 4 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
@@ -18,8 +18,8 @@
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21#ifndef _ASM_TCE_H 21#ifndef _ASM_POWERPC_TCE_H
22#define _ASM_TCE_H 22#define _ASM_POWERPC_TCE_H
23 23
24/* 24/*
25 * Tces come in two formats, one for the virtual bus and a different 25 * Tces come in two formats, one for the virtual bus and a different
@@ -61,4 +61,4 @@ union tce_entry {
61}; 61};
62 62
63 63
64#endif 64#endif /* _ASM_POWERPC_TCE_H */
diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h
index 2512e3836bf4..db8095cbe09b 100644
--- a/include/asm-powerpc/topology.h
+++ b/include/asm-powerpc/topology.h
@@ -9,15 +9,7 @@
9 9
10static inline int cpu_to_node(int cpu) 10static inline int cpu_to_node(int cpu)
11{ 11{
12 int node; 12 return numa_cpu_lookup_table[cpu];
13
14 node = numa_cpu_lookup_table[cpu];
15
16#ifdef DEBUG_NUMA
17 BUG_ON(node == -1);
18#endif
19
20 return node;
21} 13}
22 14
23#define parent_node(node) (node) 15#define parent_node(node) (node)
@@ -37,8 +29,6 @@ static inline int node_to_first_cpu(int node)
37#define pcibus_to_node(node) (-1) 29#define pcibus_to_node(node) (-1)
38#define pcibus_to_cpumask(bus) (cpu_online_map) 30#define pcibus_to_cpumask(bus) (cpu_online_map)
39 31
40#define nr_cpus_node(node) (nr_cpus_in_node[node])
41
42/* sched_domains SD_NODE_INIT for PPC64 machines */ 32/* sched_domains SD_NODE_INIT for PPC64 machines */
43#define SD_NODE_INIT (struct sched_domain) { \ 33#define SD_NODE_INIT (struct sched_domain) { \
44 .span = CPU_MASK_NONE, \ 34 .span = CPU_MASK_NONE, \
@@ -51,6 +41,10 @@ static inline int node_to_first_cpu(int node)
51 .cache_hot_time = (10*1000000), \ 41 .cache_hot_time = (10*1000000), \
52 .cache_nice_tries = 1, \ 42 .cache_nice_tries = 1, \
53 .per_cpu_gain = 100, \ 43 .per_cpu_gain = 100, \
44 .busy_idx = 3, \
45 .idle_idx = 1, \
46 .newidle_idx = 2, \
47 .wake_idx = 1, \
54 .flags = SD_LOAD_BALANCE \ 48 .flags = SD_LOAD_BALANCE \
55 | SD_BALANCE_EXEC \ 49 | SD_BALANCE_EXEC \
56 | SD_BALANCE_NEWIDLE \ 50 | SD_BALANCE_NEWIDLE \
diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h
index 33af730f0d19..3872e924cdd6 100644
--- a/include/asm-powerpc/uaccess.h
+++ b/include/asm-powerpc/uaccess.h
@@ -120,14 +120,6 @@ struct exception_table_entry {
120 120
121extern long __put_user_bad(void); 121extern long __put_user_bad(void);
122 122
123#ifdef __powerpc64__
124#define __EX_TABLE_ALIGN "3"
125#define __EX_TABLE_TYPE "llong"
126#else
127#define __EX_TABLE_ALIGN "2"
128#define __EX_TABLE_TYPE "long"
129#endif
130
131/* 123/*
132 * We don't tell gcc that we are accessing memory, but this is OK 124 * We don't tell gcc that we are accessing memory, but this is OK
133 * because we do not write to any memory gcc knows about, so there 125 * because we do not write to any memory gcc knows about, so there
@@ -142,11 +134,12 @@ extern long __put_user_bad(void);
142 " b 2b\n" \ 134 " b 2b\n" \
143 ".previous\n" \ 135 ".previous\n" \
144 ".section __ex_table,\"a\"\n" \ 136 ".section __ex_table,\"a\"\n" \
145 " .align " __EX_TABLE_ALIGN "\n" \ 137 " .balign %5\n" \
146 " ."__EX_TABLE_TYPE" 1b,3b\n" \ 138 PPC_LONG "1b,3b\n" \
147 ".previous" \ 139 ".previous" \
148 : "=r" (err) \ 140 : "=r" (err) \
149 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err)) 141 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err),\
142 "i"(sizeof(unsigned long)))
150 143
151#ifdef __powerpc64__ 144#ifdef __powerpc64__
152#define __put_user_asm2(x, ptr, retval) \ 145#define __put_user_asm2(x, ptr, retval) \
@@ -162,12 +155,13 @@ extern long __put_user_bad(void);
162 " b 3b\n" \ 155 " b 3b\n" \
163 ".previous\n" \ 156 ".previous\n" \
164 ".section __ex_table,\"a\"\n" \ 157 ".section __ex_table,\"a\"\n" \
165 " .align " __EX_TABLE_ALIGN "\n" \ 158 " .balign %5\n" \
166 " ." __EX_TABLE_TYPE " 1b,4b\n" \ 159 PPC_LONG "1b,4b\n" \
167 " ." __EX_TABLE_TYPE " 2b,4b\n" \ 160 PPC_LONG "2b,4b\n" \
168 ".previous" \ 161 ".previous" \
169 : "=r" (err) \ 162 : "=r" (err) \
170 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err)) 163 : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err),\
164 "i"(sizeof(unsigned long)))
171#endif /* __powerpc64__ */ 165#endif /* __powerpc64__ */
172 166
173#define __put_user_size(x, ptr, size, retval) \ 167#define __put_user_size(x, ptr, size, retval) \
@@ -213,11 +207,12 @@ extern long __get_user_bad(void);
213 " b 2b\n" \ 207 " b 2b\n" \
214 ".previous\n" \ 208 ".previous\n" \
215 ".section __ex_table,\"a\"\n" \ 209 ".section __ex_table,\"a\"\n" \
216 " .align "__EX_TABLE_ALIGN "\n" \ 210 " .balign %5\n" \
217 " ." __EX_TABLE_TYPE " 1b,3b\n" \ 211 PPC_LONG "1b,3b\n" \
218 ".previous" \ 212 ".previous" \
219 : "=r" (err), "=r" (x) \ 213 : "=r" (err), "=r" (x) \
220 : "b" (addr), "i" (-EFAULT), "0" (err)) 214 : "b" (addr), "i" (-EFAULT), "0" (err), \
215 "i"(sizeof(unsigned long)))
221 216
222#ifdef __powerpc64__ 217#ifdef __powerpc64__
223#define __get_user_asm2(x, addr, err) \ 218#define __get_user_asm2(x, addr, err) \
@@ -235,12 +230,13 @@ extern long __get_user_bad(void);
235 " b 3b\n" \ 230 " b 3b\n" \
236 ".previous\n" \ 231 ".previous\n" \
237 ".section __ex_table,\"a\"\n" \ 232 ".section __ex_table,\"a\"\n" \
238 " .align " __EX_TABLE_ALIGN "\n" \ 233 " .balign %5\n" \
239 " ." __EX_TABLE_TYPE " 1b,4b\n" \ 234 PPC_LONG "1b,4b\n" \
240 " ." __EX_TABLE_TYPE " 2b,4b\n" \ 235 PPC_LONG "2b,4b\n" \
241 ".previous" \ 236 ".previous" \
242 : "=r" (err), "=&r" (x) \ 237 : "=r" (err), "=&r" (x) \
243 : "b" (addr), "i" (-EFAULT), "0" (err)) 238 : "b" (addr), "i" (-EFAULT), "0" (err), \
239 "i"(sizeof(unsigned long)))
244#endif /* __powerpc64__ */ 240#endif /* __powerpc64__ */
245 241
246#define __get_user_size(x, ptr, size, retval) \ 242#define __get_user_size(x, ptr, size, retval) \
diff --git a/include/asm-ppc64/udbg.h b/include/asm-powerpc/udbg.h
index e3b927991851..a383383bc4d4 100644
--- a/include/asm-ppc64/udbg.h
+++ b/include/asm-powerpc/udbg.h
@@ -1,9 +1,3 @@
1#ifndef __UDBG_HDR
2#define __UDBG_HDR
3
4#include <linux/compiler.h>
5#include <linux/init.h>
6
7/* 1/*
8 * c 2001 PPC 64 Team, IBM Corp 2 * c 2001 PPC 64 Team, IBM Corp
9 * 3 *
@@ -13,6 +7,12 @@
13 * 2 of the License, or (at your option) any later version. 7 * 2 of the License, or (at your option) any later version.
14 */ 8 */
15 9
10#ifndef _ASM_POWERPC_UDBG_H
11#define _ASM_POWERPC_UDBG_H
12
13#include <linux/compiler.h>
14#include <linux/init.h>
15
16extern void (*udbg_putc)(unsigned char c); 16extern void (*udbg_putc)(unsigned char c);
17extern unsigned char (*udbg_getc)(void); 17extern unsigned char (*udbg_getc)(void);
18extern int (*udbg_getc_poll)(void); 18extern int (*udbg_getc_poll)(void);
@@ -28,4 +28,4 @@ extern void udbg_init_uart(void __iomem *comport, unsigned int speed);
28 28
29struct device_node; 29struct device_node;
30extern void udbg_init_scc(struct device_node *np); 30extern void udbg_init_scc(struct device_node *np);
31#endif 31#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/include/asm-ppc64/vdso.h b/include/asm-powerpc/vdso.h
index 85d8a7be25c4..b9f9118b1607 100644
--- a/include/asm-ppc64/vdso.h
+++ b/include/asm-powerpc/vdso.h
@@ -11,7 +11,7 @@
11#define VDSO32_MBASE VDSO32_LBASE 11#define VDSO32_MBASE VDSO32_LBASE
12#define VDSO64_MBASE VDSO64_LBASE 12#define VDSO64_MBASE VDSO64_LBASE
13 13
14#define VDSO_VERSION_STRING LINUX_2.6.12 14#define VDSO_VERSION_STRING LINUX_2.6.15
15 15
16/* Define if 64 bits VDSO has procedure descriptors */ 16/* Define if 64 bits VDSO has procedure descriptors */
17#undef VDS64_HAS_DESCRIPTORS 17#undef VDS64_HAS_DESCRIPTORS
diff --git a/include/asm-powerpc/vdso_datapage.h b/include/asm-powerpc/vdso_datapage.h
new file mode 100644
index 000000000000..411832d5bbdb
--- /dev/null
+++ b/include/asm-powerpc/vdso_datapage.h
@@ -0,0 +1,108 @@
1#ifndef _VDSO_DATAPAGE_H
2#define _VDSO_DATAPAGE_H
3
4/*
5 * Copyright (C) 2002 Peter Bergner <bergner@vnet.ibm.com>, IBM
6 * Copyright (C) 2005 Benjamin Herrenschmidy <benh@kernel.crashing.org>,
7 * IBM Corp.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15
16/*
17 * Note about this structure:
18 *
19 * This structure was historically called systemcfg and exposed to
20 * userland via /proc/ppc64/systemcfg. Unfortunately, this became an
21 * ABI issue as some proprietary software started relying on being able
22 * to mmap() it, thus we have to keep the base layout at least for a
23 * few kernel versions.
24 *
25 * However, since ppc32 doesn't suffer from this backward handicap,
26 * a simpler version of the data structure is used there with only the
27 * fields actually used by the vDSO.
28 *
29 */
30
31/*
32 * If the major version changes we are incompatible.
33 * Minor version changes are a hint.
34 */
35#define SYSTEMCFG_MAJOR 1
36#define SYSTEMCFG_MINOR 1
37
38#ifndef __ASSEMBLY__
39
40#include <linux/unistd.h>
41
42#define SYSCALL_MAP_SIZE ((__NR_syscalls + 31) / 32)
43
44/*
45 * So here is the ppc64 backward compatible version
46 */
47
48#ifdef CONFIG_PPC64
49
50struct vdso_data {
51 __u8 eye_catcher[16]; /* Eyecatcher: SYSTEMCFG:PPC64 0x00 */
52 struct { /* Systemcfg version numbers */
53 __u32 major; /* Major number 0x10 */
54 __u32 minor; /* Minor number 0x14 */
55 } version;
56
57 __u32 platform; /* Platform flags 0x18 */
58 __u32 processor; /* Processor type 0x1C */
59 __u64 processorCount; /* # of physical processors 0x20 */
60 __u64 physicalMemorySize; /* Size of real memory(B) 0x28 */
61 __u64 tb_orig_stamp; /* Timebase at boot 0x30 */
62 __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */
63 __u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */
64 __u64 stamp_xsec; /* 0x48 */
65 __u64 tb_update_count; /* Timebase atomicity ctr 0x50 */
66 __u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */
67 __u32 tz_dsttime; /* Type of dst correction 0x5C */
68 __u32 dcache_size; /* L1 d-cache size 0x60 */
69 __u32 dcache_line_size; /* L1 d-cache line size 0x64 */
70 __u32 icache_size; /* L1 i-cache size 0x68 */
71 __u32 icache_line_size; /* L1 i-cache line size 0x6C */
72
73 /* those additional ones don't have to be located anywhere
74 * special as they were not part of the original systemcfg
75 */
76 __s32 wtom_clock_sec; /* Wall to monotonic clock */
77 __s32 wtom_clock_nsec;
78 __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */
79 __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
80};
81
82#else /* CONFIG_PPC64 */
83
84/*
85 * And here is the simpler 32 bits version
86 */
87struct vdso_data {
88 __u64 tb_orig_stamp; /* Timebase at boot 0x30 */
89 __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */
90 __u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */
91 __u64 stamp_xsec; /* 0x48 */
92 __u32 tb_update_count; /* Timebase atomicity ctr 0x50 */
93 __u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */
94 __u32 tz_dsttime; /* Type of dst correction 0x5C */
95 __s32 wtom_clock_sec; /* Wall to monotonic clock */
96 __s32 wtom_clock_nsec;
97 __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
98};
99
100#endif /* CONFIG_PPC64 */
101
102#ifdef __KERNEL__
103extern struct vdso_data *vdso_data;
104#endif
105
106#endif /* __ASSEMBLY__ */
107
108#endif /* _SYSTEMCFG_H */
diff --git a/include/asm-powerpc/xmon.h b/include/asm-powerpc/xmon.h
index ace2072d4a83..43f7129984c7 100644
--- a/include/asm-powerpc/xmon.h
+++ b/include/asm-powerpc/xmon.h
@@ -7,7 +7,6 @@ struct pt_regs;
7extern int xmon(struct pt_regs *excp); 7extern int xmon(struct pt_regs *excp);
8extern void xmon_printf(const char *fmt, ...); 8extern void xmon_printf(const char *fmt, ...);
9extern void xmon_init(int); 9extern void xmon_init(int);
10extern void xmon_map_scc(void);
11 10
12#endif 11#endif
13#endif 12#endif
diff --git a/include/asm-ppc/cacheflush.h b/include/asm-ppc/cacheflush.h
deleted file mode 100644
index 6a243efb3317..000000000000
--- a/include/asm-ppc/cacheflush.h
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * include/asm-ppc/cacheflush.h
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#ifdef __KERNEL__
10#ifndef _PPC_CACHEFLUSH_H
11#define _PPC_CACHEFLUSH_H
12
13#include <linux/mm.h>
14
15/*
16 * No cache flushing is required when address mappings are
17 * changed, because the caches on PowerPCs are physically
18 * addressed. -- paulus
19 * Also, when SMP we use the coherency (M) bit of the
20 * BATs and PTEs. -- Cort
21 */
22#define flush_cache_all() do { } while (0)
23#define flush_cache_mm(mm) do { } while (0)
24#define flush_cache_range(vma, a, b) do { } while (0)
25#define flush_cache_page(vma, p, pfn) do { } while (0)
26#define flush_icache_page(vma, page) do { } while (0)
27#define flush_cache_vmap(start, end) do { } while (0)
28#define flush_cache_vunmap(start, end) do { } while (0)
29
30extern void flush_dcache_page(struct page *page);
31#define flush_dcache_mmap_lock(mapping) do { } while (0)
32#define flush_dcache_mmap_unlock(mapping) do { } while (0)
33
34extern void flush_icache_range(unsigned long, unsigned long);
35extern void flush_icache_user_range(struct vm_area_struct *vma,
36 struct page *page, unsigned long addr, int len);
37
38#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
39do { memcpy(dst, src, len); \
40 flush_icache_user_range(vma, page, vaddr, len); \
41} while (0)
42#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
43 memcpy(dst, src, len)
44
45extern void __flush_dcache_icache(void *page_va);
46extern void __flush_dcache_icache_phys(unsigned long physaddr);
47extern void flush_dcache_icache_page(struct page *page);
48#endif /* _PPC_CACHEFLUSH_H */
49#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 43d2ebbc7748..b638b87cebe3 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1091,5 +1091,7 @@ typedef struct im_idma {
1091#define CPM_IMMR_OFFSET 0x101a8 1091#define CPM_IMMR_OFFSET 0x101a8
1092#endif 1092#endif
1093 1093
1094#define FCC_PSMR_RMII ((uint)0x00020000) /* Use RMII interface */
1095
1094#endif /* __CPM2__ */ 1096#endif /* __CPM2__ */
1095#endif /* __KERNEL__ */ 1097#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/current.h b/include/asm-ppc/current.h
deleted file mode 100644
index 8d41501ba10d..000000000000
--- a/include/asm-ppc/current.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifdef __KERNEL__
2#ifndef _PPC_CURRENT_H
3#define _PPC_CURRENT_H
4
5/*
6 * We keep `current' in r2 for speed.
7 */
8register struct task_struct *current asm ("r2");
9
10#endif /* !(_PPC_CURRENT_H) */
11#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 50fb5e47094a..9383d0c13ff8 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * MPC85xx Internal Memory Map 4 * MPC85xx Internal Memory Map
5 * 5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com> 6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 * 7 *
8 * Copyright 2004 Freescale Semiconductor, Inc 8 * Copyright 2004 Freescale Semiconductor, Inc
9 * 9 *
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index 2bfdf9c98459..84ac6e258eef 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -545,6 +545,23 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
545#include <asm/mpc8260_pci9.h> 545#include <asm/mpc8260_pci9.h>
546#endif 546#endif
547 547
548#ifdef CONFIG_NOT_COHERENT_CACHE
549
550#define dma_cache_inv(_start,_size) \
551 invalidate_dcache_range(_start, (_start + _size))
552#define dma_cache_wback(_start,_size) \
553 clean_dcache_range(_start, (_start + _size))
554#define dma_cache_wback_inv(_start,_size) \
555 flush_dcache_range(_start, (_start + _size))
556
557#else
558
559#define dma_cache_inv(_start,_size) do { } while (0)
560#define dma_cache_wback(_start,_size) do { } while (0)
561#define dma_cache_wback_inv(_start,_size) do { } while (0)
562
563#endif
564
548/* 565/*
549 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 566 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
550 * access 567 * access
diff --git a/include/asm-ppc/ipic.h b/include/asm-ppc/ipic.h
index 9092b920997a..0fe396a2b666 100644
--- a/include/asm-ppc/ipic.h
+++ b/include/asm-ppc/ipic.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * IPIC external definitions and structure. 4 * IPIC external definitions and structure.
5 * 5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com> 6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 * 7 *
8 * Copyright 2005 Freescale Semiconductor, Inc 8 * Copyright 2005 Freescale Semiconductor, Inc
9 * 9 *
diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h
index ce212201db2a..7cdf60fa69b6 100644
--- a/include/asm-ppc/mpc83xx.h
+++ b/include/asm-ppc/mpc83xx.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * MPC83xx definitions 4 * MPC83xx definitions
5 * 5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com> 6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 * 7 *
8 * Copyright 2005 Freescale Semiconductor, Inc 8 * Copyright 2005 Freescale Semiconductor, Inc
9 * 9 *
diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
index d98db980cd49..9d14baea3d71 100644
--- a/include/asm-ppc/mpc85xx.h
+++ b/include/asm-ppc/mpc85xx.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * MPC85xx definitions 4 * MPC85xx definitions
5 * 5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com> 6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 * 7 *
8 * Copyright 2004 Freescale Semiconductor, Inc 8 * Copyright 2004 Freescale Semiconductor, Inc
9 * 9 *
diff --git a/include/asm-ppc/nvram.h b/include/asm-ppc/nvram.h
deleted file mode 100644
index 31ef16e3fc4f..000000000000
--- a/include/asm-ppc/nvram.h
+++ /dev/null
@@ -1,73 +0,0 @@
1/*
2 * PreP compliant NVRAM access
3 */
4
5#ifdef __KERNEL__
6#ifndef _PPC_NVRAM_H
7#define _PPC_NVRAM_H
8
9#define NVRAM_AS0 0x74
10#define NVRAM_AS1 0x75
11#define NVRAM_DATA 0x77
12
13
14/* RTC Offsets */
15
16#define MOTO_RTC_SECONDS 0x1FF9
17#define MOTO_RTC_MINUTES 0x1FFA
18#define MOTO_RTC_HOURS 0x1FFB
19#define MOTO_RTC_DAY_OF_WEEK 0x1FFC
20#define MOTO_RTC_DAY_OF_MONTH 0x1FFD
21#define MOTO_RTC_MONTH 0x1FFE
22#define MOTO_RTC_YEAR 0x1FFF
23#define MOTO_RTC_CONTROLA 0x1FF8
24#define MOTO_RTC_CONTROLB 0x1FF9
25
26/* PowerMac specific nvram stuffs */
27
28enum {
29 pmac_nvram_OF, /* Open Firmware partition */
30 pmac_nvram_XPRAM, /* MacOS XPRAM partition */
31 pmac_nvram_NR /* MacOS Name Registry partition */
32};
33
34/* Return partition offset in nvram */
35extern int pmac_get_partition(int partition);
36
37/* Direct access to XPRAM on PowerMacs */
38extern u8 pmac_xpram_read(int xpaddr);
39extern void pmac_xpram_write(int xpaddr, u8 data);
40
41/* Synchronize NVRAM */
42extern void nvram_sync(void);
43
44/* Normal access to NVRAM */
45extern unsigned char nvram_read_byte(int i);
46extern void nvram_write_byte(unsigned char c, int i);
47
48/* Some offsets in XPRAM */
49#define PMAC_XPRAM_MACHINE_LOC 0xe4
50#define PMAC_XPRAM_SOUND_VOLUME 0x08
51
52/* Machine location structure in PowerMac XPRAM */
53struct pmac_machine_location {
54 unsigned int latitude; /* 2+30 bit Fractional number */
55 unsigned int longitude; /* 2+30 bit Fractional number */
56 unsigned int delta; /* mix of GMT delta and DLS */
57};
58
59/*
60 * /dev/nvram ioctls
61 *
62 * Note that PMAC_NVRAM_GET_OFFSET is still supported, but is
63 * definitely obsolete. Do not use it if you can avoid it
64 */
65
66#define OBSOLETE_PMAC_NVRAM_GET_OFFSET \
67 _IOWR('p', 0x40, int)
68
69#define IOC_NVRAM_GET_OFFSET _IOWR('p', 0x42, int) /* Get NVRAM partition offset */
70#define IOC_NVRAM_SYNC _IO('p', 0x43) /* Sync NVRAM image */
71
72#endif
73#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/page.h b/include/asm-ppc/page.h
index fc44f7ca62d7..538e0c8ab243 100644
--- a/include/asm-ppc/page.h
+++ b/include/asm-ppc/page.h
@@ -1,9 +1,12 @@
1#ifndef _PPC_PAGE_H 1#ifndef _PPC_PAGE_H
2#define _PPC_PAGE_H 2#define _PPC_PAGE_H
3 3
4#include <linux/config.h>
5#include <asm/asm-compat.h>
6
4/* PAGE_SHIFT determines the page size */ 7/* PAGE_SHIFT determines the page size */
5#define PAGE_SHIFT 12 8#define PAGE_SHIFT 12
6#define PAGE_SIZE (1UL << PAGE_SHIFT) 9#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT)
7 10
8/* 11/*
9 * Subtle: this is an int (not an unsigned long) and so it 12 * Subtle: this is an int (not an unsigned long) and so it
@@ -169,5 +172,8 @@ extern __inline__ int get_order(unsigned long size)
169#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 172#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
170 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 173 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
171 174
175/* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */
176#define __HAVE_ARCH_GATE_AREA 1
177
172#endif /* __KERNEL__ */ 178#endif /* __KERNEL__ */
173#endif /* _PPC_PAGE_H */ 179#endif /* _PPC_PAGE_H */
diff --git a/include/asm-ppc/pgalloc.h b/include/asm-ppc/pgalloc.h
index 931b6de7ef53..bdefd1c4a558 100644
--- a/include/asm-ppc/pgalloc.h
+++ b/include/asm-ppc/pgalloc.h
@@ -28,7 +28,7 @@ extern void pgd_free(pgd_t *pgd);
28#define pmd_populate_kernel(mm, pmd, pte) \ 28#define pmd_populate_kernel(mm, pmd, pte) \
29 (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT) 29 (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT)
30#define pmd_populate(mm, pmd, pte) \ 30#define pmd_populate(mm, pmd, pte) \
31 (pmd_val(*(pmd)) = (unsigned long)page_to_virt(pte) | _PMD_PRESENT) 31 (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT)
32#endif 32#endif
33 33
34extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); 34extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
diff --git a/include/asm-ppc/ppc4xx_dma.h b/include/asm-ppc/ppc4xx_dma.h
index a415001165fa..46a086fff816 100644
--- a/include/asm-ppc/ppc4xx_dma.h
+++ b/include/asm-ppc/ppc4xx_dma.h
@@ -33,9 +33,6 @@
33 33
34#define MAX_PPC4xx_DMA_CHANNELS 4 34#define MAX_PPC4xx_DMA_CHANNELS 4
35 35
36/* in arch/ppc/kernel/setup.c -- Cort */
37extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
38
39/* 36/*
40 * Function return status codes 37 * Function return status codes
41 * These values are used to indicate whether or not the function 38 * These values are used to indicate whether or not the function
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index bba5305c29ed..83d8c77c124d 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * PPC system definitions and library functions 4 * PPC system definitions and library functions
5 * 5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com> 6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 * 7 *
8 * Copyright 2005 Freescale Semiconductor, Inc 8 * Copyright 2005 Freescale Semiconductor, Inc
9 * 9 *
diff --git a/include/asm-ppc64/cache.h b/include/asm-ppc64/cache.h
deleted file mode 100644
index 92140a7efbd1..000000000000
--- a/include/asm-ppc64/cache.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version
5 * 2 of the License, or (at your option) any later version.
6 */
7#ifndef __ARCH_PPC64_CACHE_H
8#define __ARCH_PPC64_CACHE_H
9
10#include <asm/types.h>
11
12/* bytes per L1 cache line */
13#define L1_CACHE_SHIFT 7
14#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
15
16#define SMP_CACHE_BYTES L1_CACHE_BYTES
17#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
18
19#ifndef __ASSEMBLY__
20
21struct ppc64_caches {
22 u32 dsize; /* L1 d-cache size */
23 u32 dline_size; /* L1 d-cache line size */
24 u32 log_dline_size;
25 u32 dlines_per_page;
26 u32 isize; /* L1 i-cache size */
27 u32 iline_size; /* L1 i-cache line size */
28 u32 log_iline_size;
29 u32 ilines_per_page;
30};
31
32extern struct ppc64_caches ppc64_caches;
33
34#endif
35
36#endif
diff --git a/include/asm-ppc64/current.h b/include/asm-ppc64/current.h
deleted file mode 100644
index 52ddc60c8b65..000000000000
--- a/include/asm-ppc64/current.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef _PPC64_CURRENT_H
2#define _PPC64_CURRENT_H
3
4#include <asm/paca.h>
5
6/*
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#define get_current() (get_paca()->__current)
14#define current get_current()
15
16#endif /* !(_PPC64_CURRENT_H) */
diff --git a/include/asm-ppc64/delay.h b/include/asm-ppc64/delay.h
deleted file mode 100644
index 05f198cf73d9..000000000000
--- a/include/asm-ppc64/delay.h
+++ /dev/null
@@ -1,48 +0,0 @@
1#ifndef _PPC64_DELAY_H
2#define _PPC64_DELAY_H
3
4/*
5 * Copyright 1996, Paul Mackerras.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * PPC64 Support added by Dave Engebretsen, Todd Inglett, Mike Corrigan,
13 * Anton Blanchard.
14 */
15
16extern unsigned long tb_ticks_per_usec;
17
18/* define these here to prevent circular dependencies */
19#define __HMT_low() asm volatile("or 1,1,1")
20#define __HMT_medium() asm volatile("or 2,2,2")
21#define __barrier() asm volatile("":::"memory")
22
23static inline unsigned long __get_tb(void)
24{
25 unsigned long rval;
26
27 asm volatile("mftb %0" : "=r" (rval));
28 return rval;
29}
30
31static inline void __delay(unsigned long loops)
32{
33 unsigned long start = __get_tb();
34
35 while((__get_tb()-start) < loops)
36 __HMT_low();
37 __HMT_medium();
38 __barrier();
39}
40
41static inline void udelay(unsigned long usecs)
42{
43 unsigned long loops = tb_ticks_per_usec * usecs;
44
45 __delay(loops);
46}
47
48#endif /* _PPC64_DELAY_H */
diff --git a/include/asm-ppc64/dma-mapping.h b/include/asm-ppc64/dma-mapping.h
deleted file mode 100644
index fb68fa23bea8..000000000000
--- a/include/asm-ppc64/dma-mapping.h
+++ /dev/null
@@ -1,136 +0,0 @@
1/* Copyright (C) 2004 IBM
2 *
3 * Implements the generic device dma API for ppc64. Handles
4 * the pci and vio busses
5 */
6
7#ifndef _ASM_DMA_MAPPING_H
8#define _ASM_DMA_MAPPING_H
9
10#include <linux/types.h>
11#include <linux/cache.h>
12/* need struct page definitions */
13#include <linux/mm.h>
14#include <asm/scatterlist.h>
15#include <asm/bug.h>
16
17#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
18
19extern int dma_supported(struct device *dev, u64 mask);
20extern int dma_set_mask(struct device *dev, u64 dma_mask);
21extern void *dma_alloc_coherent(struct device *dev, size_t size,
22 dma_addr_t *dma_handle, gfp_t flag);
23extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
24 dma_addr_t dma_handle);
25extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
26 size_t size, enum dma_data_direction direction);
27extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
28 size_t size, enum dma_data_direction direction);
29extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
30 unsigned long offset, size_t size,
31 enum dma_data_direction direction);
32extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
33 size_t size, enum dma_data_direction direction);
34extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
35 enum dma_data_direction direction);
36extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
37 int nhwentries, enum dma_data_direction direction);
38
39static inline void
40dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
41 enum dma_data_direction direction)
42{
43 BUG_ON(direction == DMA_NONE);
44 /* nothing to do */
45}
46
47static inline void
48dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
49 enum dma_data_direction direction)
50{
51 BUG_ON(direction == DMA_NONE);
52 /* nothing to do */
53}
54
55static inline void
56dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
57 enum dma_data_direction direction)
58{
59 BUG_ON(direction == DMA_NONE);
60 /* nothing to do */
61}
62
63static inline void
64dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
65 enum dma_data_direction direction)
66{
67 BUG_ON(direction == DMA_NONE);
68 /* nothing to do */
69}
70
71static inline int dma_mapping_error(dma_addr_t dma_addr)
72{
73 return (dma_addr == DMA_ERROR_CODE);
74}
75
76/* Now for the API extensions over the pci_ one */
77
78#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
79#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
80#define dma_is_consistent(d) (1)
81
82static inline int
83dma_get_cache_alignment(void)
84{
85 /* no easy way to get cache size on all processors, so return
86 * the maximum possible, to be safe */
87 return (1 << L1_CACHE_SHIFT_MAX);
88}
89
90static inline void
91dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
92 unsigned long offset, size_t size,
93 enum dma_data_direction direction)
94{
95 BUG_ON(direction == DMA_NONE);
96 /* nothing to do */
97}
98
99static inline void
100dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
101 unsigned long offset, size_t size,
102 enum dma_data_direction direction)
103{
104 BUG_ON(direction == DMA_NONE);
105 /* nothing to do */
106}
107
108static inline void
109dma_cache_sync(void *vaddr, size_t size,
110 enum dma_data_direction direction)
111{
112 BUG_ON(direction == DMA_NONE);
113 /* nothing to do */
114}
115
116/*
117 * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
118 */
119struct dma_mapping_ops {
120 void * (*alloc_coherent)(struct device *dev, size_t size,
121 dma_addr_t *dma_handle, gfp_t flag);
122 void (*free_coherent)(struct device *dev, size_t size,
123 void *vaddr, dma_addr_t dma_handle);
124 dma_addr_t (*map_single)(struct device *dev, void *ptr,
125 size_t size, enum dma_data_direction direction);
126 void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
127 size_t size, enum dma_data_direction direction);
128 int (*map_sg)(struct device *dev, struct scatterlist *sg,
129 int nents, enum dma_data_direction direction);
130 void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
131 int nents, enum dma_data_direction direction);
132 int (*dma_supported)(struct device *dev, u64 mask);
133 int (*dac_dma_supported)(struct device *dev, u64 mask);
134};
135
136#endif /* _ASM_DMA_MAPPING_H */
diff --git a/include/asm-ppc64/imalloc.h b/include/asm-ppc64/imalloc.h
deleted file mode 100644
index 42adf7033a81..000000000000
--- a/include/asm-ppc64/imalloc.h
+++ /dev/null
@@ -1,26 +0,0 @@
1#ifndef _PPC64_IMALLOC_H
2#define _PPC64_IMALLOC_H
3
4/*
5 * Define the address range of the imalloc VM area.
6 */
7#define PHBS_IO_BASE VMALLOC_END
8#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
9#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
10
11
12/* imalloc region types */
13#define IM_REGION_UNUSED 0x1
14#define IM_REGION_SUBSET 0x2
15#define IM_REGION_EXISTS 0x4
16#define IM_REGION_OVERLAP 0x8
17#define IM_REGION_SUPERSET 0x10
18
19extern struct vm_struct * im_get_free_area(unsigned long size);
20extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size,
21 int region_type);
22extern void im_free(void *addr);
23
24extern unsigned long ioremap_bot;
25
26#endif /* _PPC64_IMALLOC_H */
diff --git a/include/asm-ppc64/mmzone.h b/include/asm-ppc64/mmzone.h
deleted file mode 100644
index 80a708e7093a..000000000000
--- a/include/asm-ppc64/mmzone.h
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * Written by Kanoj Sarcar (kanoj@sgi.com) Aug 99
3 *
4 * PowerPC64 port:
5 * Copyright (C) 2002 Anton Blanchard, IBM Corp.
6 */
7#ifndef _ASM_MMZONE_H_
8#define _ASM_MMZONE_H_
9
10#include <linux/config.h>
11#include <asm/smp.h>
12
13/* generic non-linear memory support:
14 *
15 * 1) we will not split memory into more chunks than will fit into the
16 * flags field of the struct page
17 */
18
19
20#ifdef CONFIG_NEED_MULTIPLE_NODES
21
22extern struct pglist_data *node_data[];
23/*
24 * Return a pointer to the node data for node n.
25 */
26#define NODE_DATA(nid) (node_data[nid])
27
28/*
29 * Following are specific to this numa platform.
30 */
31
32extern int numa_cpu_lookup_table[];
33extern char *numa_memory_lookup_table;
34extern cpumask_t numa_cpumask_lookup_table[];
35extern int nr_cpus_in_node[];
36
37/* 16MB regions */
38#define MEMORY_INCREMENT_SHIFT 24
39#define MEMORY_INCREMENT (1UL << MEMORY_INCREMENT_SHIFT)
40
41/* NUMA debugging, will not work on a DLPAR machine */
42#undef DEBUG_NUMA
43
44static inline int pa_to_nid(unsigned long pa)
45{
46 int nid;
47
48 nid = numa_memory_lookup_table[pa >> MEMORY_INCREMENT_SHIFT];
49
50#ifdef DEBUG_NUMA
51 /* the physical address passed in is not in the map for the system */
52 if (nid == -1) {
53 printk("bad address: %lx\n", pa);
54 BUG();
55 }
56#endif
57
58 return nid;
59}
60
61#define node_localnr(pfn, nid) ((pfn) - NODE_DATA(nid)->node_start_pfn)
62
63/*
64 * Following are macros that each numa implmentation must define.
65 */
66
67#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
68#define node_end_pfn(nid) (NODE_DATA(nid)->node_end_pfn)
69
70#ifdef CONFIG_DISCONTIGMEM
71
72/*
73 * Given a kernel address, find the home node of the underlying memory.
74 */
75#define kvaddr_to_nid(kaddr) pa_to_nid(__pa(kaddr))
76
77#define pfn_to_nid(pfn) pa_to_nid((unsigned long)(pfn) << PAGE_SHIFT)
78
79/* Written this way to avoid evaluating arguments twice */
80#define discontigmem_pfn_to_page(pfn) \
81({ \
82 unsigned long __tmp = pfn; \
83 (NODE_DATA(pfn_to_nid(__tmp))->node_mem_map + \
84 node_localnr(__tmp, pfn_to_nid(__tmp))); \
85})
86
87#define discontigmem_page_to_pfn(p) \
88({ \
89 struct page *__tmp = p; \
90 (((__tmp) - page_zone(__tmp)->zone_mem_map) + \
91 page_zone(__tmp)->zone_start_pfn); \
92})
93
94/* XXX fix for discontiguous physical memory */
95#define discontigmem_pfn_valid(pfn) ((pfn) < num_physpages)
96
97#endif /* CONFIG_DISCONTIGMEM */
98
99#endif /* CONFIG_NEED_MULTIPLE_NODES */
100
101#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID
102#define early_pfn_to_nid(pfn) pa_to_nid(((unsigned long)pfn) << PAGE_SHIFT)
103#endif
104
105#endif /* _ASM_MMZONE_H_ */
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
deleted file mode 100644
index 82ce187e5be8..000000000000
--- a/include/asm-ppc64/page.h
+++ /dev/null
@@ -1,333 +0,0 @@
1#ifndef _PPC64_PAGE_H
2#define _PPC64_PAGE_H
3
4/*
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <asm/ppc_asm.h> /* for ASM_CONST */
15
16/*
17 * We support either 4k or 64k software page size. When using 64k pages
18 * however, wether we are really supporting 64k pages in HW or not is
19 * irrelevant to those definitions. We always define HW_PAGE_SHIFT to 12
20 * as use of 64k pages remains a linux kernel specific, every notion of
21 * page number shared with the firmware, TCEs, iommu, etc... still assumes
22 * a page size of 4096.
23 */
24#ifdef CONFIG_PPC_64K_PAGES
25#define PAGE_SHIFT 16
26#else
27#define PAGE_SHIFT 12
28#endif
29
30#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT)
31#define PAGE_MASK (~(PAGE_SIZE-1))
32
33/* HW_PAGE_SHIFT is always 4k pages */
34#define HW_PAGE_SHIFT 12
35#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
36#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
37
38/* PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
39 * HW_PAGE_SHIFT, that is 4k pages
40 */
41#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
42
43/* Segment size */
44#define SID_SHIFT 28
45#define SID_MASK 0xfffffffffUL
46#define ESID_MASK 0xfffffffff0000000UL
47#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
48
49/* Large pages size */
50
51#ifndef __ASSEMBLY__
52extern unsigned int HPAGE_SHIFT;
53#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
54#define HPAGE_MASK (~(HPAGE_SIZE - 1))
55#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
56#endif /* __ASSEMBLY__ */
57
58#ifdef CONFIG_HUGETLB_PAGE
59
60
61#define HTLB_AREA_SHIFT 40
62#define HTLB_AREA_SIZE (1UL << HTLB_AREA_SHIFT)
63#define GET_HTLB_AREA(x) ((x) >> HTLB_AREA_SHIFT)
64
65#define LOW_ESID_MASK(addr, len) (((1U << (GET_ESID(addr+len-1)+1)) \
66 - (1U << GET_ESID(addr))) & 0xffff)
67#define HTLB_AREA_MASK(addr, len) (((1U << (GET_HTLB_AREA(addr+len-1)+1)) \
68 - (1U << GET_HTLB_AREA(addr))) & 0xffff)
69
70#define ARCH_HAS_HUGEPAGE_ONLY_RANGE
71#define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
72#define ARCH_HAS_SETCLEAR_HUGE_PTE
73
74#define touches_hugepage_low_range(mm, addr, len) \
75 (LOW_ESID_MASK((addr), (len)) & (mm)->context.low_htlb_areas)
76#define touches_hugepage_high_range(mm, addr, len) \
77 (HTLB_AREA_MASK((addr), (len)) & (mm)->context.high_htlb_areas)
78
79#define __within_hugepage_low_range(addr, len, segmask) \
80 ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask))
81#define within_hugepage_low_range(addr, len) \
82 __within_hugepage_low_range((addr), (len), \
83 current->mm->context.low_htlb_areas)
84#define __within_hugepage_high_range(addr, len, zonemask) \
85 ((HTLB_AREA_MASK((addr), (len)) | (zonemask)) == (zonemask))
86#define within_hugepage_high_range(addr, len) \
87 __within_hugepage_high_range((addr), (len), \
88 current->mm->context.high_htlb_areas)
89
90#define is_hugepage_only_range(mm, addr, len) \
91 (touches_hugepage_high_range((mm), (addr), (len)) || \
92 touches_hugepage_low_range((mm), (addr), (len)))
93#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
94
95#define in_hugepage_area(context, addr) \
96 (cpu_has_feature(CPU_FTR_16M_PAGE) && \
97 ( ((1 << GET_HTLB_AREA(addr)) & (context).high_htlb_areas) || \
98 ( ((addr) < 0x100000000L) && \
99 ((1 << GET_ESID(addr)) & (context).low_htlb_areas) ) ) )
100
101#else /* !CONFIG_HUGETLB_PAGE */
102
103#define in_hugepage_area(mm, addr) 0
104
105#endif /* !CONFIG_HUGETLB_PAGE */
106
107/* align addr on a size boundary - adjust address up/down if needed */
108#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
109#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
110
111/* align addr on a size boundary - adjust address up if needed */
112#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
113
114/* to align the pointer to the (next) page boundary */
115#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
116
117#ifdef __KERNEL__
118#ifndef __ASSEMBLY__
119#include <asm/cache.h>
120
121#undef STRICT_MM_TYPECHECKS
122
123#define REGION_SIZE 4UL
124#define REGION_SHIFT 60UL
125#define REGION_MASK (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)
126
127static __inline__ void clear_page(void *addr)
128{
129 unsigned long lines, line_size;
130
131 line_size = ppc64_caches.dline_size;
132 lines = ppc64_caches.dlines_per_page;
133
134 __asm__ __volatile__(
135 "mtctr %1 # clear_page\n\
1361: dcbz 0,%0\n\
137 add %0,%0,%3\n\
138 bdnz+ 1b"
139 : "=r" (addr)
140 : "r" (lines), "0" (addr), "r" (line_size)
141 : "ctr", "memory");
142}
143
144extern void copy_4K_page(void *to, void *from);
145
146#ifdef CONFIG_PPC_64K_PAGES
147static inline void copy_page(void *to, void *from)
148{
149 unsigned int i;
150 for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
151 copy_4K_page(to, from);
152 to += 4096;
153 from += 4096;
154 }
155}
156#else /* CONFIG_PPC_64K_PAGES */
157static inline void copy_page(void *to, void *from)
158{
159 copy_4K_page(to, from);
160}
161#endif /* CONFIG_PPC_64K_PAGES */
162
163struct page;
164extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
165extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *p);
166
167#ifdef STRICT_MM_TYPECHECKS
168/*
169 * These are used to make use of C type-checking.
170 * Entries in the pte table are 64b, while entries in the pgd & pmd are 32b.
171 */
172
173/* PTE level */
174typedef struct { unsigned long pte; } pte_t;
175#define pte_val(x) ((x).pte)
176#define __pte(x) ((pte_t) { (x) })
177
178/* 64k pages additionally define a bigger "real PTE" type that gathers
179 * the "second half" part of the PTE for pseudo 64k pages
180 */
181#ifdef CONFIG_PPC_64K_PAGES
182typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
183#else
184typedef struct { pte_t pte; } real_pte_t;
185#endif
186
187/* PMD level */
188typedef struct { unsigned long pmd; } pmd_t;
189#define pmd_val(x) ((x).pmd)
190#define __pmd(x) ((pmd_t) { (x) })
191
192/* PUD level exusts only on 4k pages */
193#ifndef CONFIG_PPC_64K_PAGES
194typedef struct { unsigned long pud; } pud_t;
195#define pud_val(x) ((x).pud)
196#define __pud(x) ((pud_t) { (x) })
197#endif
198
199/* PGD level */
200typedef struct { unsigned long pgd; } pgd_t;
201#define pgd_val(x) ((x).pgd)
202#define __pgd(x) ((pgd_t) { (x) })
203
204/* Page protection bits */
205typedef struct { unsigned long pgprot; } pgprot_t;
206#define pgprot_val(x) ((x).pgprot)
207#define __pgprot(x) ((pgprot_t) { (x) })
208
209#else
210
211/*
212 * .. while these make it easier on the compiler
213 */
214
215typedef unsigned long pte_t;
216#define pte_val(x) (x)
217#define __pte(x) (x)
218
219#ifdef CONFIG_PPC_64K_PAGES
220typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
221#else
222typedef unsigned long real_pte_t;
223#endif
224
225
226typedef unsigned long pmd_t;
227#define pmd_val(x) (x)
228#define __pmd(x) (x)
229
230#ifndef CONFIG_PPC_64K_PAGES
231typedef unsigned long pud_t;
232#define pud_val(x) (x)
233#define __pud(x) (x)
234#endif
235
236typedef unsigned long pgd_t;
237#define pgd_val(x) (x)
238#define pgprot_val(x) (x)
239
240typedef unsigned long pgprot_t;
241#define __pgd(x) (x)
242#define __pgprot(x) (x)
243
244#endif
245
246#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
247
248extern int page_is_ram(unsigned long pfn);
249
250extern u64 ppc64_pft_size; /* Log 2 of page table size */
251
252/* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */
253#define __HAVE_ARCH_GATE_AREA 1
254
255#endif /* __ASSEMBLY__ */
256
257#ifdef MODULE
258#define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
259#else
260#define __page_aligned \
261 __attribute__((__aligned__(PAGE_SIZE), \
262 __section__(".data.page_aligned")))
263#endif
264
265
266/* This must match the -Ttext linker address */
267/* Note: tophys & tovirt make assumptions about how */
268/* KERNELBASE is defined for performance reasons. */
269/* When KERNELBASE moves, those macros may have */
270/* to change! */
271#define PAGE_OFFSET ASM_CONST(0xC000000000000000)
272#define KERNELBASE PAGE_OFFSET
273#define VMALLOCBASE ASM_CONST(0xD000000000000000)
274
275#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
276#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
277#define USER_REGION_ID (0UL)
278#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
279
280#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))
281
282#ifdef CONFIG_DISCONTIGMEM
283#define page_to_pfn(page) discontigmem_page_to_pfn(page)
284#define pfn_to_page(pfn) discontigmem_pfn_to_page(pfn)
285#define pfn_valid(pfn) discontigmem_pfn_valid(pfn)
286#endif
287#ifdef CONFIG_FLATMEM
288#define pfn_to_page(pfn) (mem_map + (pfn))
289#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
290#define pfn_valid(pfn) ((pfn) < max_mapnr)
291#endif
292
293#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
294#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
295
296#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
297
298/*
299 * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
300 * and needs to be executable. This means the whole heap ends
301 * up being executable.
302 */
303#define VM_DATA_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
304 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
305
306#define VM_DATA_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
307 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
308
309#define VM_DATA_DEFAULT_FLAGS \
310 (test_thread_flag(TIF_32BIT) ? \
311 VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
312
313/*
314 * This is the default if a program doesn't have a PT_GNU_STACK
315 * program header entry. The PPC64 ELF ABI has a non executable stack
316 * stack by default, so in the absense of a PT_GNU_STACK program header
317 * we turn execute permission off.
318 */
319#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
320 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
321
322#define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
323 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
324
325#define VM_STACK_DEFAULT_FLAGS \
326 (test_thread_flag(TIF_32BIT) ? \
327 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
328
329#endif /* __KERNEL__ */
330
331#include <asm-generic/page.h>
332
333#endif /* _PPC64_PAGE_H */
diff --git a/include/asm-ppc64/prom.h b/include/asm-ppc64/prom.h
deleted file mode 100644
index 76bb0266d67c..000000000000
--- a/include/asm-ppc64/prom.h
+++ /dev/null
@@ -1,218 +0,0 @@
1#ifndef _PPC64_PROM_H
2#define _PPC64_PROM_H
3
4/*
5 * Definitions for talking to the Open Firmware PROM on
6 * Power Macintosh computers.
7 *
8 * Copyright (C) 1996 Paul Mackerras.
9 *
10 * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17#include <linux/config.h>
18#include <linux/proc_fs.h>
19#include <asm/atomic.h>
20
21#define PTRRELOC(x) ((typeof(x))((unsigned long)(x) - offset))
22#define PTRUNRELOC(x) ((typeof(x))((unsigned long)(x) + offset))
23#define RELOC(x) (*PTRRELOC(&(x)))
24
25/* Definitions used by the flattened device tree */
26#define OF_DT_HEADER 0xd00dfeed /* marker */
27#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
28#define OF_DT_END_NODE 0x2 /* End node */
29#define OF_DT_PROP 0x3 /* Property: name off, size,
30 * content */
31#define OF_DT_NOP 0x4 /* nop */
32#define OF_DT_END 0x9
33
34#define OF_DT_VERSION 0x10
35
36/*
37 * This is what gets passed to the kernel by prom_init or kexec
38 *
39 * The dt struct contains the device tree structure, full pathes and
40 * property contents. The dt strings contain a separate block with just
41 * the strings for the property names, and is fully page aligned and
42 * self contained in a page, so that it can be kept around by the kernel,
43 * each property name appears only once in this page (cheap compression)
44 *
45 * the mem_rsvmap contains a map of reserved ranges of physical memory,
46 * passing it here instead of in the device-tree itself greatly simplifies
47 * the job of everybody. It's just a list of u64 pairs (base/size) that
48 * ends when size is 0
49 */
50struct boot_param_header
51{
52 u32 magic; /* magic word OF_DT_HEADER */
53 u32 totalsize; /* total size of DT block */
54 u32 off_dt_struct; /* offset to structure */
55 u32 off_dt_strings; /* offset to strings */
56 u32 off_mem_rsvmap; /* offset to memory reserve map */
57 u32 version; /* format version */
58 u32 last_comp_version; /* last compatible version */
59 /* version 2 fields below */
60 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */
61 /* version 3 fields below */
62 u32 dt_strings_size; /* size of the DT strings block */
63};
64
65
66
67typedef u32 phandle;
68typedef u32 ihandle;
69
70struct address_range {
71 unsigned long space;
72 unsigned long address;
73 unsigned long size;
74};
75
76struct interrupt_info {
77 int line;
78 int sense; /* +ve/-ve logic, edge or level, etc. */
79};
80
81struct pci_address {
82 u32 a_hi;
83 u32 a_mid;
84 u32 a_lo;
85};
86
87struct isa_address {
88 u32 a_hi;
89 u32 a_lo;
90};
91
92struct isa_range {
93 struct isa_address isa_addr;
94 struct pci_address pci_addr;
95 unsigned int size;
96};
97
98struct reg_property {
99 unsigned long address;
100 unsigned long size;
101};
102
103struct reg_property32 {
104 unsigned int address;
105 unsigned int size;
106};
107
108struct reg_property64 {
109 unsigned long address;
110 unsigned long size;
111};
112
113struct property {
114 char *name;
115 int length;
116 unsigned char *value;
117 struct property *next;
118};
119
120struct device_node {
121 char *name;
122 char *type;
123 phandle node;
124 phandle linux_phandle;
125 int n_addrs;
126 struct address_range *addrs;
127 int n_intrs;
128 struct interrupt_info *intrs;
129 char *full_name;
130
131 struct property *properties;
132 struct device_node *parent;
133 struct device_node *child;
134 struct device_node *sibling;
135 struct device_node *next; /* next device of same type */
136 struct device_node *allnext; /* next in list of all nodes */
137 struct proc_dir_entry *pde; /* this node's proc directory */
138 struct kref kref;
139 unsigned long _flags;
140 void *data;
141#ifdef CONFIG_PPC_ISERIES
142 struct list_head Device_List;
143#endif
144};
145
146extern struct device_node *of_chosen;
147
148/* flag descriptions */
149#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */
150
151#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
152#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
153
154/*
155 * Until 32-bit ppc can add proc_dir_entries to its device_node
156 * definition, we cannot refer to pde, name_link, and addr_link
157 * in arch-independent code.
158 */
159#define HAVE_ARCH_DEVTREE_FIXUPS
160
161static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
162{
163 dn->pde = de;
164}
165
166
167/* OBSOLETE: Old stlye node lookup */
168extern struct device_node *find_devices(const char *name);
169extern struct device_node *find_type_devices(const char *type);
170extern struct device_node *find_path_device(const char *path);
171extern struct device_node *find_compatible_devices(const char *type,
172 const char *compat);
173extern struct device_node *find_all_nodes(void);
174
175/* New style node lookup */
176extern struct device_node *of_find_node_by_name(struct device_node *from,
177 const char *name);
178extern struct device_node *of_find_node_by_type(struct device_node *from,
179 const char *type);
180extern struct device_node *of_find_compatible_node(struct device_node *from,
181 const char *type, const char *compat);
182extern struct device_node *of_find_node_by_path(const char *path);
183extern struct device_node *of_find_node_by_phandle(phandle handle);
184extern struct device_node *of_find_all_nodes(struct device_node *prev);
185extern struct device_node *of_get_parent(const struct device_node *node);
186extern struct device_node *of_get_next_child(const struct device_node *node,
187 struct device_node *prev);
188extern struct device_node *of_node_get(struct device_node *node);
189extern void of_node_put(struct device_node *node);
190
191/* For scanning the flat device-tree at boot time */
192int __init of_scan_flat_dt(int (*it)(unsigned long node,
193 const char *uname, int depth,
194 void *data),
195 void *data);
196void* __init of_get_flat_dt_prop(unsigned long node, const char *name,
197 unsigned long *size);
198
199/* For updating the device tree at runtime */
200extern void of_attach_node(struct device_node *);
201extern void of_detach_node(const struct device_node *);
202
203/* Other Prototypes */
204extern unsigned long prom_init(unsigned long, unsigned long, unsigned long,
205 unsigned long, unsigned long);
206extern void finish_device_tree(void);
207extern int device_is_compatible(struct device_node *device, const char *);
208extern int machine_is_compatible(const char *compat);
209extern unsigned char *get_property(struct device_node *node, const char *name,
210 int *lenp);
211extern void print_properties(struct device_node *node);
212extern int prom_n_addr_cells(struct device_node* np);
213extern int prom_n_size_cells(struct device_node* np);
214extern int prom_n_intr_cells(struct device_node* np);
215extern void prom_get_irq_senses(unsigned char *senses, int off, int max);
216extern int prom_add_property(struct device_node* np, struct property* prop);
217
218#endif /* _PPC64_PROM_H */
diff --git a/include/asm-ppc64/ptrace-common.h b/include/asm-ppc64/ptrace-common.h
deleted file mode 100644
index b1babb729673..000000000000
--- a/include/asm-ppc64/ptrace-common.h
+++ /dev/null
@@ -1,164 +0,0 @@
1/*
2 * linux/arch/ppc64/kernel/ptrace-common.h
3 *
4 * Copyright (c) 2002 Stephen Rothwell, IBM Coproration
5 * Extracted from ptrace.c and ptrace32.c
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file README.legal in the main directory of
9 * this archive for more details.
10 */
11
12#ifndef _PPC64_PTRACE_COMMON_H
13#define _PPC64_PTRACE_COMMON_H
14
15#include <linux/config.h>
16#include <asm/system.h>
17
18/*
19 * Set of msr bits that gdb can change on behalf of a process.
20 */
21#define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1)
22
23/*
24 * Get contents of register REGNO in task TASK.
25 */
26static inline unsigned long get_reg(struct task_struct *task, int regno)
27{
28 unsigned long tmp = 0;
29
30 /*
31 * Put the correct FP bits in, they might be wrong as a result
32 * of our lazy FP restore.
33 */
34 if (regno == PT_MSR) {
35 tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
36 tmp |= task->thread.fpexc_mode;
37 } else if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
38 tmp = ((unsigned long *)task->thread.regs)[regno];
39 }
40
41 return tmp;
42}
43
44/*
45 * Write contents of register REGNO in task TASK.
46 */
47static inline int put_reg(struct task_struct *task, int regno,
48 unsigned long data)
49{
50 if (regno < PT_SOFTE) {
51 if (regno == PT_MSR)
52 data = (data & MSR_DEBUGCHANGE)
53 | (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
54 ((unsigned long *)task->thread.regs)[regno] = data;
55 return 0;
56 }
57 return -EIO;
58}
59
60static inline void set_single_step(struct task_struct *task)
61{
62 struct pt_regs *regs = task->thread.regs;
63 if (regs != NULL)
64 regs->msr |= MSR_SE;
65 set_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
66}
67
68static inline void clear_single_step(struct task_struct *task)
69{
70 struct pt_regs *regs = task->thread.regs;
71 if (regs != NULL)
72 regs->msr &= ~MSR_SE;
73 clear_ti_thread_flag(task->thread_info, TIF_SINGLESTEP);
74}
75
76#ifdef CONFIG_ALTIVEC
77/*
78 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
79 * The transfer totals 34 quadword. Quadwords 0-31 contain the
80 * corresponding vector registers. Quadword 32 contains the vscr as the
81 * last word (offset 12) within that quadword. Quadword 33 contains the
82 * vrsave as the first word (offset 0) within the quadword.
83 *
84 * This definition of the VMX state is compatible with the current PPC32
85 * ptrace interface. This allows signal handling and ptrace to use the
86 * same structures. This also simplifies the implementation of a bi-arch
87 * (combined (32- and 64-bit) gdb.
88 */
89
90/*
91 * Get contents of AltiVec register state in task TASK
92 */
93static inline int get_vrregs(unsigned long __user *data,
94 struct task_struct *task)
95{
96 unsigned long regsize;
97
98 /* copy AltiVec registers VR[0] .. VR[31] */
99 regsize = 32 * sizeof(vector128);
100 if (copy_to_user(data, task->thread.vr, regsize))
101 return -EFAULT;
102 data += (regsize / sizeof(unsigned long));
103
104 /* copy VSCR */
105 regsize = 1 * sizeof(vector128);
106 if (copy_to_user(data, &task->thread.vscr, regsize))
107 return -EFAULT;
108 data += (regsize / sizeof(unsigned long));
109
110 /* copy VRSAVE */
111 if (put_user(task->thread.vrsave, (u32 __user *)data))
112 return -EFAULT;
113
114 return 0;
115}
116
117/*
118 * Write contents of AltiVec register state into task TASK.
119 */
120static inline int set_vrregs(struct task_struct *task,
121 unsigned long __user *data)
122{
123 unsigned long regsize;
124
125 /* copy AltiVec registers VR[0] .. VR[31] */
126 regsize = 32 * sizeof(vector128);
127 if (copy_from_user(task->thread.vr, data, regsize))
128 return -EFAULT;
129 data += (regsize / sizeof(unsigned long));
130
131 /* copy VSCR */
132 regsize = 1 * sizeof(vector128);
133 if (copy_from_user(&task->thread.vscr, data, regsize))
134 return -EFAULT;
135 data += (regsize / sizeof(unsigned long));
136
137 /* copy VRSAVE */
138 if (get_user(task->thread.vrsave, (u32 __user *)data))
139 return -EFAULT;
140
141 return 0;
142}
143#endif
144
145static inline int ptrace_set_debugreg(struct task_struct *task,
146 unsigned long addr, unsigned long data)
147{
148 /* We only support one DABR and no IABRS at the moment */
149 if (addr > 0)
150 return -EINVAL;
151
152 /* The bottom 3 bits are flags */
153 if ((data & ~0x7UL) >= TASK_SIZE)
154 return -EIO;
155
156 /* Ensure translation is on */
157 if (data && !(data & DABR_TRANSLATION))
158 return -EIO;
159
160 task->thread.dabr = data;
161 return 0;
162}
163
164#endif /* _PPC64_PTRACE_COMMON_H */
diff --git a/include/asm-ppc64/signal.h b/include/asm-ppc64/signal.h
deleted file mode 100644
index 432df7dd355d..000000000000
--- a/include/asm-ppc64/signal.h
+++ /dev/null
@@ -1,132 +0,0 @@
1#ifndef _ASMPPC64_SIGNAL_H
2#define _ASMPPC64_SIGNAL_H
3
4#include <linux/types.h>
5#include <linux/compiler.h>
6#include <asm/siginfo.h>
7
8/* Avoid too many header ordering problems. */
9struct siginfo;
10
11#define _NSIG 64
12#define _NSIG_BPW 64
13#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
14
15typedef unsigned long old_sigset_t; /* at least 32 bits */
16
17typedef struct {
18 unsigned long sig[_NSIG_WORDS];
19} sigset_t;
20
21#define SIGHUP 1
22#define SIGINT 2
23#define SIGQUIT 3
24#define SIGILL 4
25#define SIGTRAP 5
26#define SIGABRT 6
27#define SIGIOT 6
28#define SIGBUS 7
29#define SIGFPE 8
30#define SIGKILL 9
31#define SIGUSR1 10
32#define SIGSEGV 11
33#define SIGUSR2 12
34#define SIGPIPE 13
35#define SIGALRM 14
36#define SIGTERM 15
37#define SIGSTKFLT 16
38#define SIGCHLD 17
39#define SIGCONT 18
40#define SIGSTOP 19
41#define SIGTSTP 20
42#define SIGTTIN 21
43#define SIGTTOU 22
44#define SIGURG 23
45#define SIGXCPU 24
46#define SIGXFSZ 25
47#define SIGVTALRM 26
48#define SIGPROF 27
49#define SIGWINCH 28
50#define SIGIO 29
51#define SIGPOLL SIGIO
52/*
53#define SIGLOST 29
54*/
55#define SIGPWR 30
56#define SIGSYS 31
57#define SIGUNUSED 31
58
59/* These should not be considered constants from userland. */
60#define SIGRTMIN 32
61#define SIGRTMAX _NSIG
62
63/*
64 * SA_FLAGS values:
65 *
66 * SA_ONSTACK is not currently supported, but will allow sigaltstack(2).
67 * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
68 * SA_RESTART flag to get restarting signals (which were the default long ago)
69 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
70 * SA_RESETHAND clears the handler when the signal is delivered.
71 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
72 * SA_NODEFER prevents the current signal from being masked in the handler.
73 *
74 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
75 * Unix names RESETHAND and NODEFER respectively.
76 */
77#define SA_NOCLDSTOP 0x00000001u
78#define SA_NOCLDWAIT 0x00000002u
79#define SA_SIGINFO 0x00000004u
80#define SA_ONSTACK 0x08000000u
81#define SA_RESTART 0x10000000u
82#define SA_NODEFER 0x40000000u
83#define SA_RESETHAND 0x80000000u
84
85#define SA_NOMASK SA_NODEFER
86#define SA_ONESHOT SA_RESETHAND
87#define SA_INTERRUPT 0x20000000u /* dummy -- ignored */
88
89#define SA_RESTORER 0x04000000u
90
91/*
92 * sigaltstack controls
93 */
94#define SS_ONSTACK 1
95#define SS_DISABLE 2
96
97#define MINSIGSTKSZ 2048
98#define SIGSTKSZ 8192
99
100#include <asm-generic/signal.h>
101
102struct old_sigaction {
103 __sighandler_t sa_handler;
104 old_sigset_t sa_mask;
105 unsigned long sa_flags;
106 __sigrestore_t sa_restorer;
107};
108
109struct sigaction {
110 __sighandler_t sa_handler;
111 unsigned long sa_flags;
112 __sigrestore_t sa_restorer;
113 sigset_t sa_mask; /* mask last for extensibility */
114};
115
116struct k_sigaction {
117 struct sigaction sa;
118};
119
120typedef struct sigaltstack {
121 void __user *ss_sp;
122 int ss_flags;
123 size_t ss_size;
124} stack_t;
125
126struct pt_regs;
127struct timespec;
128extern int do_signal(sigset_t *oldset, struct pt_regs *regs);
129extern int do_signal32(sigset_t *oldset, struct pt_regs *regs);
130#define ptrace_signal_deliver(regs, cookie) do { } while (0)
131
132#endif /* _ASMPPC64_SIGNAL_H */
diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h
deleted file mode 100644
index 0cdd66c9f4b7..000000000000
--- a/include/asm-ppc64/system.h
+++ /dev/null
@@ -1,308 +0,0 @@
1#ifndef __PPC64_SYSTEM_H
2#define __PPC64_SYSTEM_H
3
4/*
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <linux/config.h>
12#include <linux/compiler.h>
13#include <asm/page.h>
14#include <asm/processor.h>
15#include <asm/hw_irq.h>
16#include <asm/synch.h>
17
18/*
19 * Memory barrier.
20 * The sync instruction guarantees that all memory accesses initiated
21 * by this processor have been performed (with respect to all other
22 * mechanisms that access memory). The eieio instruction is a barrier
23 * providing an ordering (separately) for (a) cacheable stores and (b)
24 * loads and stores to non-cacheable memory (e.g. I/O devices).
25 *
26 * mb() prevents loads and stores being reordered across this point.
27 * rmb() prevents loads being reordered across this point.
28 * wmb() prevents stores being reordered across this point.
29 * read_barrier_depends() prevents data-dependent loads being reordered
30 * across this point (nop on PPC).
31 *
32 * We have to use the sync instructions for mb(), since lwsync doesn't
33 * order loads with respect to previous stores. Lwsync is fine for
34 * rmb(), though.
35 * For wmb(), we use sync since wmb is used in drivers to order
36 * stores to system memory with respect to writes to the device.
37 * However, smp_wmb() can be a lighter-weight eieio barrier on
38 * SMP since it is only used to order updates to system memory.
39 */
40#define mb() __asm__ __volatile__ ("sync" : : : "memory")
41#define rmb() __asm__ __volatile__ ("lwsync" : : : "memory")
42#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
43#define read_barrier_depends() do { } while(0)
44
45#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
46#define set_wmb(var, value) do { var = value; smp_wmb(); } while (0)
47
48#ifdef CONFIG_SMP
49#define smp_mb() mb()
50#define smp_rmb() rmb()
51#define smp_wmb() eieio()
52#define smp_read_barrier_depends() read_barrier_depends()
53#else
54#define smp_mb() __asm__ __volatile__("": : :"memory")
55#define smp_rmb() __asm__ __volatile__("": : :"memory")
56#define smp_wmb() __asm__ __volatile__("": : :"memory")
57#define smp_read_barrier_depends() do { } while(0)
58#endif /* CONFIG_SMP */
59
60#ifdef __KERNEL__
61struct task_struct;
62struct pt_regs;
63
64#ifdef CONFIG_DEBUGGER
65
66extern int (*__debugger)(struct pt_regs *regs);
67extern int (*__debugger_ipi)(struct pt_regs *regs);
68extern int (*__debugger_bpt)(struct pt_regs *regs);
69extern int (*__debugger_sstep)(struct pt_regs *regs);
70extern int (*__debugger_iabr_match)(struct pt_regs *regs);
71extern int (*__debugger_dabr_match)(struct pt_regs *regs);
72extern int (*__debugger_fault_handler)(struct pt_regs *regs);
73
74#define DEBUGGER_BOILERPLATE(__NAME) \
75static inline int __NAME(struct pt_regs *regs) \
76{ \
77 if (unlikely(__ ## __NAME)) \
78 return __ ## __NAME(regs); \
79 return 0; \
80}
81
82DEBUGGER_BOILERPLATE(debugger)
83DEBUGGER_BOILERPLATE(debugger_ipi)
84DEBUGGER_BOILERPLATE(debugger_bpt)
85DEBUGGER_BOILERPLATE(debugger_sstep)
86DEBUGGER_BOILERPLATE(debugger_iabr_match)
87DEBUGGER_BOILERPLATE(debugger_dabr_match)
88DEBUGGER_BOILERPLATE(debugger_fault_handler)
89
90#ifdef CONFIG_XMON
91extern void xmon_init(int enable);
92#endif
93
94#else
95static inline int debugger(struct pt_regs *regs) { return 0; }
96static inline int debugger_ipi(struct pt_regs *regs) { return 0; }
97static inline int debugger_bpt(struct pt_regs *regs) { return 0; }
98static inline int debugger_sstep(struct pt_regs *regs) { return 0; }
99static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; }
100static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; }
101static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
102#endif
103
104extern int set_dabr(unsigned long dabr);
105extern void _exception(int signr, struct pt_regs *regs, int code,
106 unsigned long addr);
107extern int fix_alignment(struct pt_regs *regs);
108extern void bad_page_fault(struct pt_regs *regs, unsigned long address,
109 int sig);
110extern void show_regs(struct pt_regs * regs);
111extern void low_hash_fault(struct pt_regs *regs, unsigned long address);
112extern int die(const char *str, struct pt_regs *regs, long err);
113
114extern int _get_PVR(void);
115extern void giveup_fpu(struct task_struct *);
116extern void disable_kernel_fp(void);
117extern void flush_fp_to_thread(struct task_struct *);
118extern void enable_kernel_fp(void);
119extern void giveup_altivec(struct task_struct *);
120extern void disable_kernel_altivec(void);
121extern void enable_kernel_altivec(void);
122extern int emulate_altivec(struct pt_regs *);
123extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
124extern void cvt_df(double *from, float *to, struct thread_struct *thread);
125
126#ifdef CONFIG_ALTIVEC
127extern void flush_altivec_to_thread(struct task_struct *);
128#else
129static inline void flush_altivec_to_thread(struct task_struct *t)
130{
131}
132#endif
133
134static inline void flush_spe_to_thread(struct task_struct *t)
135{
136}
137
138extern int mem_init_done; /* set on boot once kmalloc can be called */
139extern unsigned long memory_limit;
140
141/* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */
142extern unsigned char e2a(unsigned char);
143
144extern struct task_struct *__switch_to(struct task_struct *,
145 struct task_struct *);
146#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
147
148struct thread_struct;
149extern struct task_struct * _switch(struct thread_struct *prev,
150 struct thread_struct *next);
151
152extern int powersave_nap; /* set if nap mode can be used in idle loop */
153
154/*
155 * Atomic exchange
156 *
157 * Changes the memory location '*ptr' to be val and returns
158 * the previous value stored there.
159 *
160 * Inline asm pulled from arch/ppc/kernel/misc.S so ppc64
161 * is more like most of the other architectures.
162 */
163static __inline__ unsigned long
164__xchg_u32(volatile unsigned int *m, unsigned long val)
165{
166 unsigned long dummy;
167
168 __asm__ __volatile__(
169 EIEIO_ON_SMP
170"1: lwarx %0,0,%3 # __xchg_u32\n\
171 stwcx. %2,0,%3\n\
1722: bne- 1b"
173 ISYNC_ON_SMP
174 : "=&r" (dummy), "=m" (*m)
175 : "r" (val), "r" (m)
176 : "cc", "memory");
177
178 return (dummy);
179}
180
181static __inline__ unsigned long
182__xchg_u64(volatile long *m, unsigned long val)
183{
184 unsigned long dummy;
185
186 __asm__ __volatile__(
187 EIEIO_ON_SMP
188"1: ldarx %0,0,%3 # __xchg_u64\n\
189 stdcx. %2,0,%3\n\
1902: bne- 1b"
191 ISYNC_ON_SMP
192 : "=&r" (dummy), "=m" (*m)
193 : "r" (val), "r" (m)
194 : "cc", "memory");
195
196 return (dummy);
197}
198
199/*
200 * This function doesn't exist, so you'll get a linker error
201 * if something tries to do an invalid xchg().
202 */
203extern void __xchg_called_with_bad_pointer(void);
204
205static __inline__ unsigned long
206__xchg(volatile void *ptr, unsigned long x, unsigned int size)
207{
208 switch (size) {
209 case 4:
210 return __xchg_u32(ptr, x);
211 case 8:
212 return __xchg_u64(ptr, x);
213 }
214 __xchg_called_with_bad_pointer();
215 return x;
216}
217
218#define xchg(ptr,x) \
219 ({ \
220 __typeof__(*(ptr)) _x_ = (x); \
221 (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
222 })
223
224#define tas(ptr) (xchg((ptr),1))
225
226#define __HAVE_ARCH_CMPXCHG 1
227
228static __inline__ unsigned long
229__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
230{
231 unsigned int prev;
232
233 __asm__ __volatile__ (
234 EIEIO_ON_SMP
235"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
236 cmpw 0,%0,%3\n\
237 bne- 2f\n\
238 stwcx. %4,0,%2\n\
239 bne- 1b"
240 ISYNC_ON_SMP
241 "\n\
2422:"
243 : "=&r" (prev), "=m" (*p)
244 : "r" (p), "r" (old), "r" (new), "m" (*p)
245 : "cc", "memory");
246
247 return prev;
248}
249
250static __inline__ unsigned long
251__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
252{
253 unsigned long prev;
254
255 __asm__ __volatile__ (
256 EIEIO_ON_SMP
257"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
258 cmpd 0,%0,%3\n\
259 bne- 2f\n\
260 stdcx. %4,0,%2\n\
261 bne- 1b"
262 ISYNC_ON_SMP
263 "\n\
2642:"
265 : "=&r" (prev), "=m" (*p)
266 : "r" (p), "r" (old), "r" (new), "m" (*p)
267 : "cc", "memory");
268
269 return prev;
270}
271
272/* This function doesn't exist, so you'll get a linker error
273 if something tries to do an invalid cmpxchg(). */
274extern void __cmpxchg_called_with_bad_pointer(void);
275
276static __inline__ unsigned long
277__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
278 unsigned int size)
279{
280 switch (size) {
281 case 4:
282 return __cmpxchg_u32(ptr, old, new);
283 case 8:
284 return __cmpxchg_u64(ptr, old, new);
285 }
286 __cmpxchg_called_with_bad_pointer();
287 return old;
288}
289
290#define cmpxchg(ptr,o,n)\
291 ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
292 (unsigned long)(n),sizeof(*(ptr))))
293
294/*
295 * We handle most unaligned accesses in hardware. On the other hand
296 * unaligned DMA can be very expensive on some ppc64 IO chips (it does
297 * powers of 2 writes until it reaches sufficient alignment).
298 *
299 * Based on this we disable the IP header alignment in network drivers.
300 */
301#define NET_IP_ALIGN 0
302
303#define arch_align_stack(x) (x)
304
305extern unsigned long reloc_offset(void);
306
307#endif /* __KERNEL__ */
308#endif
diff --git a/include/asm-ppc64/systemcfg.h b/include/asm-ppc64/systemcfg.h
deleted file mode 100644
index 9b86b53129aa..000000000000
--- a/include/asm-ppc64/systemcfg.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef _SYSTEMCFG_H
2#define _SYSTEMCFG_H
3
4/*
5 * Copyright (C) 2002 Peter Bergner <bergner@vnet.ibm.com>, IBM
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/* Change Activity:
14 * 2002/09/30 : bergner : Created
15 * End Change Activity
16 */
17
18/*
19 * If the major version changes we are incompatible.
20 * Minor version changes are a hint.
21 */
22#define SYSTEMCFG_MAJOR 1
23#define SYSTEMCFG_MINOR 1
24
25#ifndef __ASSEMBLY__
26
27#include <linux/unistd.h>
28
29#define SYSCALL_MAP_SIZE ((__NR_syscalls + 31) / 32)
30
31struct systemcfg {
32 __u8 eye_catcher[16]; /* Eyecatcher: SYSTEMCFG:PPC64 0x00 */
33 struct { /* Systemcfg version numbers */
34 __u32 major; /* Major number 0x10 */
35 __u32 minor; /* Minor number 0x14 */
36 } version;
37
38 __u32 platform; /* Platform flags 0x18 */
39 __u32 processor; /* Processor type 0x1C */
40 __u64 processorCount; /* # of physical processors 0x20 */
41 __u64 physicalMemorySize; /* Size of real memory(B) 0x28 */
42 __u64 tb_orig_stamp; /* Timebase at boot 0x30 */
43 __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */
44 __u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */
45 __u64 stamp_xsec; /* 0x48 */
46 __u64 tb_update_count; /* Timebase atomicity ctr 0x50 */
47 __u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */
48 __u32 tz_dsttime; /* Type of dst correction 0x5C */
49 /* next four are no longer used except to be exported to /proc */
50 __u32 dcache_size; /* L1 d-cache size 0x60 */
51 __u32 dcache_line_size; /* L1 d-cache line size 0x64 */
52 __u32 icache_size; /* L1 i-cache size 0x68 */
53 __u32 icache_line_size; /* L1 i-cache line size 0x6C */
54 __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of available syscalls 0x70 */
55 __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of available syscalls */
56};
57
58#ifdef __KERNEL__
59extern struct systemcfg *systemcfg;
60#endif
61
62#endif /* __ASSEMBLY__ */
63
64#endif /* _SYSTEMCFG_H */
diff --git a/include/asm-s390/atomic.h b/include/asm-s390/atomic.h
index 9d86ba6f12d0..b3bd4f679f72 100644
--- a/include/asm-s390/atomic.h
+++ b/include/asm-s390/atomic.h
@@ -198,6 +198,18 @@ atomic_compare_and_swap(int expected_oldval,int new_val,atomic_t *v)
198 return retval; 198 return retval;
199} 199}
200 200
201#define atomic_cmpxchg(v, o, n) (atomic_compare_and_swap((o), (n), &((v)->counter)))
202
203#define atomic_add_unless(v, a, u) \
204({ \
205 int c, old; \
206 c = atomic_read(v); \
207 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
208 c = old; \
209 c != (u); \
210})
211#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
212
201#define smp_mb__before_atomic_dec() smp_mb() 213#define smp_mb__before_atomic_dec() smp_mb()
202#define smp_mb__after_atomic_dec() smp_mb() 214#define smp_mb__after_atomic_dec() smp_mb()
203#define smp_mb__before_atomic_inc() smp_mb() 215#define smp_mb__before_atomic_inc() smp_mb()
diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h
index 3c4f805da1ac..aabfd334462c 100644
--- a/include/asm-sh/atomic.h
+++ b/include/asm-sh/atomic.h
@@ -87,6 +87,35 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
87#define atomic_inc(v) atomic_add(1,(v)) 87#define atomic_inc(v) atomic_add(1,(v))
88#define atomic_dec(v) atomic_sub(1,(v)) 88#define atomic_dec(v) atomic_sub(1,(v))
89 89
90static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
91{
92 int ret;
93 unsigned long flags;
94
95 local_irq_save(flags);
96 ret = v->counter;
97 if (likely(ret == old))
98 v->counter = new;
99 local_irq_restore(flags);
100
101 return ret;
102}
103
104static inline int atomic_add_unless(atomic_t *v, int a, int u)
105{
106 int ret;
107 unsigned long flags;
108
109 local_irq_save(flags);
110 ret = v->counter;
111 if (ret != u)
112 v->counter += a;
113 local_irq_restore(flags);
114
115 return ret != u;
116}
117#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
118
90static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) 119static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v)
91{ 120{
92 unsigned long flags; 121 unsigned long flags;
diff --git a/include/asm-sh64/atomic.h b/include/asm-sh64/atomic.h
index 8c3872d3e65f..927a2bc27b30 100644
--- a/include/asm-sh64/atomic.h
+++ b/include/asm-sh64/atomic.h
@@ -99,6 +99,35 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
99#define atomic_inc(v) atomic_add(1,(v)) 99#define atomic_inc(v) atomic_add(1,(v))
100#define atomic_dec(v) atomic_sub(1,(v)) 100#define atomic_dec(v) atomic_sub(1,(v))
101 101
102static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
103{
104 int ret;
105 unsigned long flags;
106
107 local_irq_save(flags);
108 ret = v->counter;
109 if (likely(ret == old))
110 v->counter = new;
111 local_irq_restore(flags);
112
113 return ret;
114}
115
116static inline int atomic_add_unless(atomic_t *v, int a, int u)
117{
118 int ret;
119 unsigned long flags;
120
121 local_irq_save(flags);
122 ret = v->counter;
123 if (ret != u)
124 v->counter += a;
125 local_irq_restore(flags);
126
127 return ret != u;
128}
129#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
130
102static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) 131static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v)
103{ 132{
104 unsigned long flags; 133 unsigned long flags;
diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h
index 37f6ab601c3d..62bec7ad271c 100644
--- a/include/asm-sparc/atomic.h
+++ b/include/asm-sparc/atomic.h
@@ -19,6 +19,8 @@ typedef struct { volatile int counter; } atomic_t;
19#define ATOMIC_INIT(i) { (i) } 19#define ATOMIC_INIT(i) { (i) }
20 20
21extern int __atomic_add_return(int, atomic_t *); 21extern int __atomic_add_return(int, atomic_t *);
22extern int atomic_cmpxchg(atomic_t *, int, int);
23extern int atomic_add_unless(atomic_t *, int, int);
22extern void atomic_set(atomic_t *, int); 24extern void atomic_set(atomic_t *, int);
23 25
24#define atomic_read(v) ((v)->counter) 26#define atomic_read(v) ((v)->counter)
@@ -48,6 +50,8 @@ extern void atomic_set(atomic_t *, int);
48#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) 50#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
49#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) 51#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
50 52
53#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
54
51/* This is the old 24-bit implementation. It's still used internally 55/* This is the old 24-bit implementation. It's still used internally
52 * by some sparc-specific code, notably the semaphore implementation. 56 * by some sparc-specific code, notably the semaphore implementation.
53 */ 57 */
diff --git a/include/asm-sparc/memreg.h b/include/asm-sparc/memreg.h
index c0498d3baf93..5fb95c828da6 100644
--- a/include/asm-sparc/memreg.h
+++ b/include/asm-sparc/memreg.h
@@ -36,7 +36,7 @@
36 36
37/* Memory parity error register with associated bit constants. */ 37/* Memory parity error register with associated bit constants. */
38#ifndef __ASSEMBLY__ 38#ifndef __ASSEMBLY__
39extern __volatile__ unsigned long *sun4c_memerr_reg; 39extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;
40#endif 40#endif
41 41
42#define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */ 42#define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */
diff --git a/include/asm-sparc/pcic.h b/include/asm-sparc/pcic.h
index 301ae8022ddd..dedea14d87c8 100644
--- a/include/asm-sparc/pcic.h
+++ b/include/asm-sparc/pcic.h
@@ -16,10 +16,10 @@
16#include <asm/pbm.h> 16#include <asm/pbm.h>
17 17
18struct linux_pcic { 18struct linux_pcic {
19 void * __iomem pcic_regs; 19 void __iomem *pcic_regs;
20 unsigned long pcic_io; 20 unsigned long pcic_io;
21 void * __iomem pcic_config_space_addr; 21 void __iomem *pcic_config_space_addr;
22 void * __iomem pcic_config_space_data; 22 void __iomem *pcic_config_space_data;
23 struct resource pcic_res_regs; 23 struct resource pcic_res_regs;
24 struct resource pcic_res_io; 24 struct resource pcic_res_io;
25 struct resource pcic_res_cfg_addr; 25 struct resource pcic_res_cfg_addr;
diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h
index e175afcf2cde..3789fe315992 100644
--- a/include/asm-sparc64/atomic.h
+++ b/include/asm-sparc64/atomic.h
@@ -54,6 +54,7 @@ extern int atomic64_sub_ret(int, atomic64_t *);
54 * other cases. 54 * other cases.
55 */ 55 */
56#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) 56#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
57#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
57 58
58#define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0) 59#define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0)
59#define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0) 60#define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0)
@@ -70,6 +71,18 @@ extern int atomic64_sub_ret(int, atomic64_t *);
70#define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0) 71#define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0)
71#define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0) 72#define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0)
72 73
74#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
75
76#define atomic_add_unless(v, a, u) \
77({ \
78 int c, old; \
79 c = atomic_read(v); \
80 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
81 c = old; \
82 c != (u); \
83})
84#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
85
73/* Atomic operations are already serializing */ 86/* Atomic operations are already serializing */
74#ifdef CONFIG_SMP 87#ifdef CONFIG_SMP
75#define smp_mb__before_atomic_dec() membar_storeload_loadload(); 88#define smp_mb__before_atomic_dec() membar_storeload_loadload();
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 9a02879b235d..f0a9b44d3eb5 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -348,16 +348,6 @@ extern unsigned long find_ecache_flush_span(unsigned long size);
348struct vm_area_struct; 348struct vm_area_struct;
349extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); 349extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
350 350
351/* Make a non-present pseudo-TTE. */
352static inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space)
353{
354 pte_t pte;
355 pte_val(pte) = (((page) | pgprot_val(prot) | _PAGE_E) &
356 ~(unsigned long)_PAGE_CACHE);
357 pte_val(pte) |= (((unsigned long)space) << 32);
358 return pte;
359}
360
361/* Encode and de-code a swap entry */ 351/* Encode and de-code a swap entry */
362#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL) 352#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL)
363#define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL)) 353#define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL))
diff --git a/include/asm-um/ldt-i386.h b/include/asm-um/ldt-i386.h
index b42662929b6c..175722a91164 100644
--- a/include/asm-um/ldt-i386.h
+++ b/include/asm-um/ldt-i386.h
@@ -35,7 +35,7 @@ typedef struct uml_ldt {
35 union { 35 union {
36 struct ldt_entry * pages[LDT_PAGES_MAX]; 36 struct ldt_entry * pages[LDT_PAGES_MAX];
37 struct ldt_entry entries[LDT_DIRECT_ENTRIES]; 37 struct ldt_entry entries[LDT_DIRECT_ENTRIES];
38 }; 38 } u;
39} uml_ldt_t; 39} uml_ldt_t;
40 40
41/* 41/*
diff --git a/include/asm-um/ldt.h b/include/asm-um/ldt-x86_64.h
index 4466ff6de0fd..175722a91164 100644
--- a/include/asm-um/ldt.h
+++ b/include/asm-um/ldt-x86_64.h
@@ -35,7 +35,7 @@ typedef struct uml_ldt {
35 union { 35 union {
36 struct ldt_entry * pages[LDT_PAGES_MAX]; 36 struct ldt_entry * pages[LDT_PAGES_MAX];
37 struct ldt_entry entries[LDT_DIRECT_ENTRIES]; 37 struct ldt_entry entries[LDT_DIRECT_ENTRIES];
38 }; 38 } u;
39} uml_ldt_t; 39} uml_ldt_t;
40 40
41/* 41/*
@@ -67,8 +67,3 @@ typedef struct uml_ldt {
67 (info)->useable == 0 ) 67 (info)->useable == 0 )
68 68
69#endif 69#endif
70#ifndef __UM_LDT_H
71#define __UM_LDT_H
72
73#include "asm/arch/ldt.h"
74#endif
diff --git a/include/asm-v850/atomic.h b/include/asm-v850/atomic.h
index 395268a8c0de..bede3172ce7f 100644
--- a/include/asm-v850/atomic.h
+++ b/include/asm-v850/atomic.h
@@ -90,6 +90,36 @@ static __inline__ void atomic_clear_mask (unsigned long mask, unsigned long *add
90#define atomic_dec_and_test(v) (atomic_sub_return (1, (v)) == 0) 90#define atomic_dec_and_test(v) (atomic_sub_return (1, (v)) == 0)
91#define atomic_add_negative(i,v) (atomic_add_return ((i), (v)) < 0) 91#define atomic_add_negative(i,v) (atomic_add_return ((i), (v)) < 0)
92 92
93static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
94{
95 int ret;
96 unsigned long flags;
97
98 local_irq_save(flags);
99 ret = v->counter;
100 if (likely(ret == old))
101 v->counter = new;
102 local_irq_restore(flags);
103
104 return ret;
105}
106
107static inline int atomic_add_unless(atomic_t *v, int a, int u)
108{
109 int ret;
110 unsigned long flags;
111
112 local_irq_save(flags);
113 ret = v->counter;
114 if (ret != u)
115 v->counter += a;
116 local_irq_restore(flags);
117
118 return ret != u;
119}
120
121#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
122
93/* Atomic operations are already serializing on ARM */ 123/* Atomic operations are already serializing on ARM */
94#define smp_mb__before_atomic_dec() barrier() 124#define smp_mb__before_atomic_dec() barrier()
95#define smp_mb__after_atomic_dec() barrier() 125#define smp_mb__after_atomic_dec() barrier()
diff --git a/include/asm-v850/hardirq.h b/include/asm-v850/hardirq.h
index 5dfca8047cbe..d98488cd5af1 100644
--- a/include/asm-v850/hardirq.h
+++ b/include/asm-v850/hardirq.h
@@ -5,6 +5,8 @@
5#include <linux/threads.h> 5#include <linux/threads.h>
6#include <linux/cache.h> 6#include <linux/cache.h>
7 7
8#include <asm/irq.h>
9
8typedef struct { 10typedef struct {
9 unsigned int __softirq_pending; 11 unsigned int __softirq_pending;
10} ____cacheline_aligned irq_cpustat_t; 12} ____cacheline_aligned irq_cpustat_t;
@@ -22,4 +24,6 @@ typedef struct {
22# error HARDIRQ_BITS is too low! 24# error HARDIRQ_BITS is too low!
23#endif 25#endif
24 26
27void ack_bad_irq(unsigned int irq);
28
25#endif /* __V850_HARDIRQ_H__ */ 29#endif /* __V850_HARDIRQ_H__ */
diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h
index 6c5d5ca8383a..5647b7de1749 100644
--- a/include/asm-x86_64/apic.h
+++ b/include/asm-x86_64/apic.h
@@ -111,6 +111,8 @@ extern unsigned int nmi_watchdog;
111 111
112extern int disable_timer_pin_1; 112extern int disable_timer_pin_1;
113 113
114extern void setup_threshold_lvt(unsigned long lvt_off);
115
114#endif /* CONFIG_X86_LOCAL_APIC */ 116#endif /* CONFIG_X86_LOCAL_APIC */
115 117
116extern unsigned boot_cpu_id; 118extern unsigned boot_cpu_id;
diff --git a/include/asm-x86_64/atomic.h b/include/asm-x86_64/atomic.h
index fc4c5956e1ea..50db9f39274f 100644
--- a/include/asm-x86_64/atomic.h
+++ b/include/asm-x86_64/atomic.h
@@ -160,8 +160,8 @@ static __inline__ int atomic_inc_and_test(atomic_t *v)
160 160
161/** 161/**
162 * atomic_add_negative - add and test if negative 162 * atomic_add_negative - add and test if negative
163 * @v: pointer of type atomic_t
164 * @i: integer value to add 163 * @i: integer value to add
164 * @v: pointer of type atomic_t
165 * 165 *
166 * Atomically adds @i to @v and returns true 166 * Atomically adds @i to @v and returns true
167 * if the result is negative, or false when 167 * if the result is negative, or false when
@@ -178,6 +178,31 @@ static __inline__ int atomic_add_negative(int i, atomic_t *v)
178 return c; 178 return c;
179} 179}
180 180
181/**
182 * atomic_add_return - add and return
183 * @i: integer value to add
184 * @v: pointer of type atomic_t
185 *
186 * Atomically adds @i to @v and returns @i + @v
187 */
188static __inline__ int atomic_add_return(int i, atomic_t *v)
189{
190 int __i = i;
191 __asm__ __volatile__(
192 LOCK "xaddl %0, %1;"
193 :"=r"(i)
194 :"m"(v->counter), "0"(i));
195 return i + __i;
196}
197
198static __inline__ int atomic_sub_return(int i, atomic_t *v)
199{
200 return atomic_add_return(-i,v);
201}
202
203#define atomic_inc_return(v) (atomic_add_return(1,v))
204#define atomic_dec_return(v) (atomic_sub_return(1,v))
205
181/* An 64bit atomic type */ 206/* An 64bit atomic type */
182 207
183typedef struct { volatile long counter; } atomic64_t; 208typedef struct { volatile long counter; } atomic64_t;
@@ -320,14 +345,14 @@ static __inline__ int atomic64_inc_and_test(atomic64_t *v)
320 345
321/** 346/**
322 * atomic64_add_negative - add and test if negative 347 * atomic64_add_negative - add and test if negative
323 * @v: pointer to atomic64_t
324 * @i: integer value to add 348 * @i: integer value to add
349 * @v: pointer to type atomic64_t
325 * 350 *
326 * Atomically adds @i to @v and returns true 351 * Atomically adds @i to @v and returns true
327 * if the result is negative, or false when 352 * if the result is negative, or false when
328 * result is greater than or equal to zero. 353 * result is greater than or equal to zero.
329 */ 354 */
330static __inline__ long atomic64_add_negative(long i, atomic64_t *v) 355static __inline__ int atomic64_add_negative(long i, atomic64_t *v)
331{ 356{
332 unsigned char c; 357 unsigned char c;
333 358
@@ -339,29 +364,50 @@ static __inline__ long atomic64_add_negative(long i, atomic64_t *v)
339} 364}
340 365
341/** 366/**
342 * atomic_add_return - add and return 367 * atomic64_add_return - add and return
343 * @v: pointer of type atomic_t
344 * @i: integer value to add 368 * @i: integer value to add
369 * @v: pointer to type atomic64_t
345 * 370 *
346 * Atomically adds @i to @v and returns @i + @v 371 * Atomically adds @i to @v and returns @i + @v
347 */ 372 */
348static __inline__ int atomic_add_return(int i, atomic_t *v) 373static __inline__ long atomic64_add_return(long i, atomic64_t *v)
349{ 374{
350 int __i = i; 375 long __i = i;
351 __asm__ __volatile__( 376 __asm__ __volatile__(
352 LOCK "xaddl %0, %1;" 377 LOCK "xaddq %0, %1;"
353 :"=r"(i) 378 :"=r"(i)
354 :"m"(v->counter), "0"(i)); 379 :"m"(v->counter), "0"(i));
355 return i + __i; 380 return i + __i;
356} 381}
357 382
358static __inline__ int atomic_sub_return(int i, atomic_t *v) 383static __inline__ long atomic64_sub_return(long i, atomic64_t *v)
359{ 384{
360 return atomic_add_return(-i,v); 385 return atomic64_add_return(-i,v);
361} 386}
362 387
363#define atomic_inc_return(v) (atomic_add_return(1,v)) 388#define atomic64_inc_return(v) (atomic64_add_return(1,v))
364#define atomic_dec_return(v) (atomic_sub_return(1,v)) 389#define atomic64_dec_return(v) (atomic64_sub_return(1,v))
390
391#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new))
392
393/**
394 * atomic_add_unless - add unless the number is a given value
395 * @v: pointer of type atomic_t
396 * @a: the amount to add to v...
397 * @u: ...unless v is equal to u.
398 *
399 * Atomically adds @a to @v, so long as it was not @u.
400 * Returns non-zero if @v was not @u, and zero otherwise.
401 */
402#define atomic_add_unless(v, a, u) \
403({ \
404 int c, old; \
405 c = atomic_read(v); \
406 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
407 c = old; \
408 c != (u); \
409})
410#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
365 411
366/* These are x86-specific, used by some header files */ 412/* These are x86-specific, used by some header files */
367#define atomic_clear_mask(mask, addr) \ 413#define atomic_clear_mask(mask, addr) \
diff --git a/include/asm-x86_64/cache.h b/include/asm-x86_64/cache.h
index eda62bae1240..33e53424128b 100644
--- a/include/asm-x86_64/cache.h
+++ b/include/asm-x86_64/cache.h
@@ -9,6 +9,6 @@
9/* L1 cache line size */ 9/* L1 cache line size */
10#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) 10#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
11#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 11#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
12#define L1_CACHE_SHIFT_MAX 6 /* largest L1 which this arch supports */ 12#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
13 13
14#endif 14#endif
diff --git a/include/asm-x86_64/desc.h b/include/asm-x86_64/desc.h
index 68ac3c62fe3d..33764869387b 100644
--- a/include/asm-x86_64/desc.h
+++ b/include/asm-x86_64/desc.h
@@ -98,16 +98,19 @@ static inline void _set_gate(void *adr, unsigned type, unsigned long func, unsig
98 98
99static inline void set_intr_gate(int nr, void *func) 99static inline void set_intr_gate(int nr, void *func)
100{ 100{
101 BUG_ON((unsigned)nr > 0xFF);
101 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, 0); 102 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, 0);
102} 103}
103 104
104static inline void set_intr_gate_ist(int nr, void *func, unsigned ist) 105static inline void set_intr_gate_ist(int nr, void *func, unsigned ist)
105{ 106{
107 BUG_ON((unsigned)nr > 0xFF);
106 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, ist); 108 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 0, ist);
107} 109}
108 110
109static inline void set_system_gate(int nr, void *func) 111static inline void set_system_gate(int nr, void *func)
110{ 112{
113 BUG_ON((unsigned)nr > 0xFF);
111 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, 0); 114 _set_gate(&idt_table[nr], GATE_INTERRUPT, (unsigned long) func, 3, 0);
112} 115}
113 116
@@ -129,9 +132,16 @@ static inline void set_tssldt_descriptor(void *ptr, unsigned long tss, unsigned
129 132
130static inline void set_tss_desc(unsigned cpu, void *addr) 133static inline void set_tss_desc(unsigned cpu, void *addr)
131{ 134{
132 set_tssldt_descriptor(&cpu_gdt_table[cpu][GDT_ENTRY_TSS], (unsigned long)addr, 135 /*
133 DESC_TSS, 136 * sizeof(unsigned long) coming from an extra "long" at the end
134 sizeof(struct tss_struct) - 1); 137 * of the iobitmap. See tss_struct definition in processor.h
138 *
139 * -1? seg base+limit should be pointing to the address of the
140 * last valid byte
141 */
142 set_tssldt_descriptor(&cpu_gdt_table[cpu][GDT_ENTRY_TSS],
143 (unsigned long)addr, DESC_TSS,
144 IO_BITMAP_OFFSET + IO_BITMAP_BYTES + sizeof(unsigned long) - 1);
135} 145}
136 146
137static inline void set_ldt_desc(unsigned cpu, void *addr, int size) 147static inline void set_ldt_desc(unsigned cpu, void *addr, int size)
diff --git a/include/asm-x86_64/dma.h b/include/asm-x86_64/dma.h
index 16fa3a064d0c..6f2a817b6a7c 100644
--- a/include/asm-x86_64/dma.h
+++ b/include/asm-x86_64/dma.h
@@ -72,8 +72,15 @@
72 72
73#define MAX_DMA_CHANNELS 8 73#define MAX_DMA_CHANNELS 8
74 74
75/* The maximum address that we can perform a DMA transfer to on this platform */ 75
76#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x1000000) 76/* 16MB ISA DMA zone */
77#define MAX_DMA_PFN ((16*1024*1024) >> PAGE_SHIFT)
78
79/* 4GB broken PCI/AGP hardware bus master zone */
80#define MAX_DMA32_PFN ((4UL*1024*1024*1024) >> PAGE_SHIFT)
81
82/* Compat define for old dma zone */
83#define MAX_DMA_ADDRESS ((unsigned long)__va(MAX_DMA_PFN << PAGE_SHIFT))
77 84
78/* 8237 DMA controllers */ 85/* 8237 DMA controllers */
79#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ 86#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
diff --git a/include/asm-x86_64/hpet.h b/include/asm-x86_64/hpet.h
index a3877f570998..c20c28f5c7a0 100644
--- a/include/asm-x86_64/hpet.h
+++ b/include/asm-x86_64/hpet.h
@@ -14,18 +14,18 @@
14#define HPET_CFG 0x010 14#define HPET_CFG 0x010
15#define HPET_STATUS 0x020 15#define HPET_STATUS 0x020
16#define HPET_COUNTER 0x0f0 16#define HPET_COUNTER 0x0f0
17#define HPET_T0_CFG 0x100 17#define HPET_Tn_OFFSET 0x20
18#define HPET_T0_CMP 0x108 18#define HPET_Tn_CFG(n) (0x100 + (n) * HPET_Tn_OFFSET)
19#define HPET_T0_ROUTE 0x110 19#define HPET_Tn_ROUTE(n) (0x104 + (n) * HPET_Tn_OFFSET)
20#define HPET_T1_CFG 0x120 20#define HPET_Tn_CMP(n) (0x108 + (n) * HPET_Tn_OFFSET)
21#define HPET_T1_CMP 0x128 21#define HPET_T0_CFG HPET_Tn_CFG(0)
22#define HPET_T1_ROUTE 0x130 22#define HPET_T0_CMP HPET_Tn_CMP(0)
23#define HPET_T2_CFG 0x140 23#define HPET_T1_CFG HPET_Tn_CFG(1)
24#define HPET_T2_CMP 0x148 24#define HPET_T1_CMP HPET_Tn_CMP(1)
25#define HPET_T2_ROUTE 0x150
26 25
27#define HPET_ID_VENDOR 0xffff0000 26#define HPET_ID_VENDOR 0xffff0000
28#define HPET_ID_LEGSUP 0x00008000 27#define HPET_ID_LEGSUP 0x00008000
28#define HPET_ID_64BIT 0x00002000
29#define HPET_ID_NUMBER 0x00001f00 29#define HPET_ID_NUMBER 0x00001f00
30#define HPET_ID_REV 0x000000ff 30#define HPET_ID_REV 0x000000ff
31#define HPET_ID_NUMBER_SHIFT 8 31#define HPET_ID_NUMBER_SHIFT 8
@@ -38,11 +38,18 @@
38#define HPET_LEGACY_8254 2 38#define HPET_LEGACY_8254 2
39#define HPET_LEGACY_RTC 8 39#define HPET_LEGACY_RTC 8
40 40
41#define HPET_TN_ENABLE 0x004 41#define HPET_TN_LEVEL 0x0002
42#define HPET_TN_PERIODIC 0x008 42#define HPET_TN_ENABLE 0x0004
43#define HPET_TN_PERIODIC_CAP 0x010 43#define HPET_TN_PERIODIC 0x0008
44#define HPET_TN_SETVAL 0x040 44#define HPET_TN_PERIODIC_CAP 0x0010
45#define HPET_TN_32BIT 0x100 45#define HPET_TN_64BIT_CAP 0x0020
46#define HPET_TN_SETVAL 0x0040
47#define HPET_TN_32BIT 0x0100
48#define HPET_TN_ROUTE 0x3e00
49#define HPET_TN_FSB 0x4000
50#define HPET_TN_FSB_CAP 0x8000
51
52#define HPET_TN_ROUTE_SHIFT 9
46 53
47extern int is_hpet_enabled(void); 54extern int is_hpet_enabled(void);
48extern int hpet_rtc_timer_init(void); 55extern int hpet_rtc_timer_init(void);
diff --git a/include/asm-x86_64/hw_irq.h b/include/asm-x86_64/hw_irq.h
index dc97668ea0f9..c14a8c7267a6 100644
--- a/include/asm-x86_64/hw_irq.h
+++ b/include/asm-x86_64/hw_irq.h
@@ -55,7 +55,7 @@ struct hw_interrupt_type;
55#define CALL_FUNCTION_VECTOR 0xfc 55#define CALL_FUNCTION_VECTOR 0xfc
56#define KDB_VECTOR 0xfb /* reserved for KDB */ 56#define KDB_VECTOR 0xfb /* reserved for KDB */
57#define THERMAL_APIC_VECTOR 0xfa 57#define THERMAL_APIC_VECTOR 0xfa
58/* 0xf9 free */ 58#define THRESHOLD_APIC_VECTOR 0xf9
59#define INVALIDATE_TLB_VECTOR_END 0xf8 59#define INVALIDATE_TLB_VECTOR_END 0xf8
60#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f8 used for TLB flush */ 60#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f8 used for TLB flush */
61 61
diff --git a/include/asm-x86_64/ia32.h b/include/asm-x86_64/ia32.h
index 6efa00fe4e7b..c7bc9c0525ba 100644
--- a/include/asm-x86_64/ia32.h
+++ b/include/asm-x86_64/ia32.h
@@ -165,6 +165,11 @@ struct siginfo_t;
165int do_get_thread_area(struct thread_struct *t, struct user_desc __user *info); 165int do_get_thread_area(struct thread_struct *t, struct user_desc __user *info);
166int do_set_thread_area(struct thread_struct *t, struct user_desc __user *info); 166int do_set_thread_area(struct thread_struct *t, struct user_desc __user *info);
167int ia32_child_tls(struct task_struct *p, struct pt_regs *childregs); 167int ia32_child_tls(struct task_struct *p, struct pt_regs *childregs);
168
169struct linux_binprm;
170extern int ia32_setup_arg_pages(struct linux_binprm *bprm,
171 unsigned long stack_top, int exec_stack);
172
168#endif 173#endif
169 174
170#endif /* !CONFIG_IA32_SUPPORT */ 175#endif /* !CONFIG_IA32_SUPPORT */
diff --git a/include/asm-x86_64/mce.h b/include/asm-x86_64/mce.h
index 869249db6795..5d298b799a9f 100644
--- a/include/asm-x86_64/mce.h
+++ b/include/asm-x86_64/mce.h
@@ -67,6 +67,8 @@ struct mce_log {
67/* Software defined banks */ 67/* Software defined banks */
68#define MCE_EXTENDED_BANK 128 68#define MCE_EXTENDED_BANK 128
69#define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0 69#define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0
70#define MCE_THRESHOLD_BASE MCE_EXTENDED_BANK + 1 /* MCE_AMD */
71#define MCE_THRESHOLD_DRAM_ECC MCE_THRESHOLD_BASE + 4
70 72
71void mce_log(struct mce *m); 73void mce_log(struct mce *m);
72#ifdef CONFIG_X86_MCE_INTEL 74#ifdef CONFIG_X86_MCE_INTEL
@@ -77,4 +79,12 @@ static inline void mce_intel_feature_init(struct cpuinfo_x86 *c)
77} 79}
78#endif 80#endif
79 81
82#ifdef CONFIG_X86_MCE_AMD
83void mce_amd_feature_init(struct cpuinfo_x86 *c);
84#else
85static inline void mce_amd_feature_init(struct cpuinfo_x86 *c)
86{
87}
88#endif
89
80#endif 90#endif
diff --git a/include/asm-x86_64/mmzone.h b/include/asm-x86_64/mmzone.h
index b40c661f111e..69baaa8a3ce0 100644
--- a/include/asm-x86_64/mmzone.h
+++ b/include/asm-x86_64/mmzone.h
@@ -17,16 +17,15 @@
17/* Simple perfect hash to map physical addresses to node numbers */ 17/* Simple perfect hash to map physical addresses to node numbers */
18extern int memnode_shift; 18extern int memnode_shift;
19extern u8 memnodemap[NODEMAPSIZE]; 19extern u8 memnodemap[NODEMAPSIZE];
20extern int maxnode;
21 20
22extern struct pglist_data *node_data[]; 21extern struct pglist_data *node_data[];
23 22
24static inline __attribute__((pure)) int phys_to_nid(unsigned long addr) 23static inline __attribute__((pure)) int phys_to_nid(unsigned long addr)
25{ 24{
26 int nid; 25 unsigned nid;
27 VIRTUAL_BUG_ON((addr >> memnode_shift) >= NODEMAPSIZE); 26 VIRTUAL_BUG_ON((addr >> memnode_shift) >= NODEMAPSIZE);
28 nid = memnodemap[addr >> memnode_shift]; 27 nid = memnodemap[addr >> memnode_shift];
29 VIRTUAL_BUG_ON(nid > maxnode); 28 VIRTUAL_BUG_ON(nid >= MAX_NUMNODES || !node_data[nid]);
30 return nid; 29 return nid;
31} 30}
32 31
@@ -41,9 +40,7 @@ static inline __attribute__((pure)) int phys_to_nid(unsigned long addr)
41#define pfn_to_nid(pfn) phys_to_nid((unsigned long)(pfn) << PAGE_SHIFT) 40#define pfn_to_nid(pfn) phys_to_nid((unsigned long)(pfn) << PAGE_SHIFT)
42#define kvaddr_to_nid(kaddr) phys_to_nid(__pa(kaddr)) 41#define kvaddr_to_nid(kaddr) phys_to_nid(__pa(kaddr))
43 42
44/* AK: this currently doesn't deal with invalid addresses. We'll see 43/* Requires pfn_valid(pfn) to be true */
45 if the 2.5 kernel doesn't pass them
46 (2.4 used to). */
47#define pfn_to_page(pfn) ({ \ 44#define pfn_to_page(pfn) ({ \
48 int nid = phys_to_nid(((unsigned long)(pfn)) << PAGE_SHIFT); \ 45 int nid = phys_to_nid(((unsigned long)(pfn)) << PAGE_SHIFT); \
49 ((pfn) - node_start_pfn(nid)) + NODE_DATA(nid)->node_mem_map; \ 46 ((pfn) - node_start_pfn(nid)) + NODE_DATA(nid)->node_mem_map; \
diff --git a/include/asm-x86_64/mpspec.h b/include/asm-x86_64/mpspec.h
index f267e10c023d..6f8a17d105ab 100644
--- a/include/asm-x86_64/mpspec.h
+++ b/include/asm-x86_64/mpspec.h
@@ -16,7 +16,7 @@
16/* 16/*
17 * A maximum of 255 APICs with the current APIC ID architecture. 17 * A maximum of 255 APICs with the current APIC ID architecture.
18 */ 18 */
19#define MAX_APICS 128 19#define MAX_APICS 255
20 20
21struct intel_mp_floating 21struct intel_mp_floating
22{ 22{
@@ -157,7 +157,8 @@ struct mpc_config_lintsrc
157 */ 157 */
158 158
159#define MAX_MP_BUSSES 256 159#define MAX_MP_BUSSES 256
160#define MAX_IRQ_SOURCES 256 160/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
161#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
161enum mp_bustype { 162enum mp_bustype {
162 MP_BUS_ISA = 1, 163 MP_BUS_ISA = 1,
163 MP_BUS_EISA, 164 MP_BUS_EISA,
@@ -172,7 +173,7 @@ extern int smp_found_config;
172extern void find_smp_config (void); 173extern void find_smp_config (void);
173extern void get_smp_config (void); 174extern void get_smp_config (void);
174extern int nr_ioapics; 175extern int nr_ioapics;
175extern int apic_version [MAX_APICS]; 176extern unsigned char apic_version [MAX_APICS];
176extern int mp_irq_entries; 177extern int mp_irq_entries;
177extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES]; 178extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
178extern int mpc_default_type; 179extern int mpc_default_type;
diff --git a/include/asm-x86_64/msi.h b/include/asm-x86_64/msi.h
index 85c427e472bf..356e0e82f50b 100644
--- a/include/asm-x86_64/msi.h
+++ b/include/asm-x86_64/msi.h
@@ -11,8 +11,6 @@
11#include <asm/smp.h> 11#include <asm/smp.h>
12 12
13#define LAST_DEVICE_VECTOR 232 13#define LAST_DEVICE_VECTOR 232
14#define MSI_DEST_MODE MSI_LOGICAL_MODE 14#define MSI_TARGET_CPU_SHIFT 12
15#define MSI_TARGET_CPU_SHIFT 12
16#define MSI_TARGET_CPU logical_smp_processor_id()
17 15
18#endif /* ASM_MSI_H */ 16#endif /* ASM_MSI_H */
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h
index 5a7fe3c6c3d8..10f8b51cec8b 100644
--- a/include/asm-x86_64/msr.h
+++ b/include/asm-x86_64/msr.h
@@ -19,7 +19,7 @@
19 : "=a" (a__), "=d" (b__) \ 19 : "=a" (a__), "=d" (b__) \
20 : "c" (msr)); \ 20 : "c" (msr)); \
21 val = a__ | (b__<<32); \ 21 val = a__ | (b__<<32); \
22} while(0); 22} while(0)
23 23
24#define wrmsr(msr,val1,val2) \ 24#define wrmsr(msr,val1,val2) \
25 __asm__ __volatile__("wrmsr" \ 25 __asm__ __volatile__("wrmsr" \
@@ -56,7 +56,7 @@
56 ".section __ex_table,\"a\"\n" \ 56 ".section __ex_table,\"a\"\n" \
57 " .align 8\n" \ 57 " .align 8\n" \
58 " .quad 1b,3b\n" \ 58 " .quad 1b,3b\n" \
59 ".previous":"=&bDS" (ret__), "=a"(a), "=d"(b)\ 59 ".previous":"=&bDS" (ret__), "=a"(*(a)), "=d"(*(b))\
60 :"c"(msr), "i"(-EIO), "0"(0)); \ 60 :"c"(msr), "i"(-EIO), "0"(0)); \
61 ret__; }) 61 ret__; })
62 62
diff --git a/include/asm-x86_64/numa.h b/include/asm-x86_64/numa.h
index bcf55c3f7f7f..d51e56fdc3da 100644
--- a/include/asm-x86_64/numa.h
+++ b/include/asm-x86_64/numa.h
@@ -17,6 +17,8 @@ extern void numa_add_cpu(int cpu);
17extern void numa_init_array(void); 17extern void numa_init_array(void);
18extern int numa_off; 18extern int numa_off;
19 19
20extern void numa_set_node(int cpu, int node);
21
20extern unsigned char apicid_to_node[256]; 22extern unsigned char apicid_to_node[256];
21 23
22#define NUMA_NO_NODE 0xff 24#define NUMA_NO_NODE 0xff
diff --git a/include/asm-x86_64/page.h b/include/asm-x86_64/page.h
index e5ab4d231f2c..06e489f32472 100644
--- a/include/asm-x86_64/page.h
+++ b/include/asm-x86_64/page.h
@@ -11,7 +11,7 @@
11#define PAGE_SIZE (1UL << PAGE_SHIFT) 11#define PAGE_SIZE (1UL << PAGE_SHIFT)
12#endif 12#endif
13#define PAGE_MASK (~(PAGE_SIZE-1)) 13#define PAGE_MASK (~(PAGE_SIZE-1))
14#define PHYSICAL_PAGE_MASK (~(PAGE_SIZE-1) & (__PHYSICAL_MASK << PAGE_SHIFT)) 14#define PHYSICAL_PAGE_MASK (~(PAGE_SIZE-1) & __PHYSICAL_MASK)
15 15
16#define THREAD_ORDER 1 16#define THREAD_ORDER 1
17#ifdef __ASSEMBLY__ 17#ifdef __ASSEMBLY__
diff --git a/include/asm-x86_64/param.h b/include/asm-x86_64/param.h
index 40b11937180d..5956b23b57c2 100644
--- a/include/asm-x86_64/param.h
+++ b/include/asm-x86_64/param.h
@@ -1,9 +1,8 @@
1#include <linux/config.h>
2
3#ifndef _ASMx86_64_PARAM_H 1#ifndef _ASMx86_64_PARAM_H
4#define _ASMx86_64_PARAM_H 2#define _ASMx86_64_PARAM_H
5 3
6#ifdef __KERNEL__ 4#ifdef __KERNEL__
5# include <linux/config.h>
7# define HZ CONFIG_HZ /* Internal kernel timer frequency */ 6# define HZ CONFIG_HZ /* Internal kernel timer frequency */
8# define USER_HZ 100 /* .. some user interfaces are in "ticks */ 7# define USER_HZ 100 /* .. some user interfaces are in "ticks */
9#define CLOCKS_PER_SEC (USER_HZ) /* like times() */ 8#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
diff --git a/include/asm-x86_64/pda.h b/include/asm-x86_64/pda.h
index bbf89aa8a1af..8733ccfa442e 100644
--- a/include/asm-x86_64/pda.h
+++ b/include/asm-x86_64/pda.h
@@ -15,6 +15,7 @@ struct x8664_pda {
15 int irqcount; /* Irq nesting counter. Starts with -1 */ 15 int irqcount; /* Irq nesting counter. Starts with -1 */
16 int cpunumber; /* Logical CPU number */ 16 int cpunumber; /* Logical CPU number */
17 char *irqstackptr; /* top of irqstack */ 17 char *irqstackptr; /* top of irqstack */
18 int nodenumber; /* number of current node */
18 unsigned int __softirq_pending; 19 unsigned int __softirq_pending;
19 unsigned int __nmi_count; /* number of NMI on this CPUs */ 20 unsigned int __nmi_count; /* number of NMI on this CPUs */
20 struct mm_struct *active_mm; 21 struct mm_struct *active_mm;
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index 7309fffeec9a..ecf58c7c1650 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -16,6 +16,7 @@ extern pud_t level3_physmem_pgt[512];
16extern pud_t level3_ident_pgt[512]; 16extern pud_t level3_ident_pgt[512];
17extern pmd_t level2_kernel_pgt[512]; 17extern pmd_t level2_kernel_pgt[512];
18extern pgd_t init_level4_pgt[]; 18extern pgd_t init_level4_pgt[];
19extern pgd_t boot_level4_pgt[];
19extern unsigned long __supported_pte_mask; 20extern unsigned long __supported_pte_mask;
20 21
21#define swapper_pg_dir init_level4_pgt 22#define swapper_pg_dir init_level4_pgt
@@ -247,7 +248,7 @@ static inline unsigned long pud_bad(pud_t pud)
247#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) /* FIXME: is this 248#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) /* FIXME: is this
248 right? */ 249 right? */
249#define pte_page(x) pfn_to_page(pte_pfn(x)) 250#define pte_page(x) pfn_to_page(pte_pfn(x))
250#define pte_pfn(x) ((pte_val(x) >> PAGE_SHIFT) & __PHYSICAL_MASK) 251#define pte_pfn(x) ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
251 252
252static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 253static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
253{ 254{
@@ -354,7 +355,7 @@ static inline pud_t *__pud_offset_k(pud_t *pud, unsigned long address)
354#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) 355#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
355#define pmd_bad(x) ((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE ) 356#define pmd_bad(x) ((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE )
356#define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot))) 357#define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
357#define pmd_pfn(x) ((pmd_val(x) >> PAGE_SHIFT) & __PHYSICAL_MASK) 358#define pmd_pfn(x) ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
358 359
359#define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT) 360#define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
360#define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE }) 361#define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 03837d34fba0..4861246548f7 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -61,10 +61,12 @@ struct cpuinfo_x86 {
61 int x86_cache_alignment; 61 int x86_cache_alignment;
62 int x86_tlbsize; /* number of 4K pages in DTLB/ITLB combined(in pages)*/ 62 int x86_tlbsize; /* number of 4K pages in DTLB/ITLB combined(in pages)*/
63 __u8 x86_virt_bits, x86_phys_bits; 63 __u8 x86_virt_bits, x86_phys_bits;
64 __u8 x86_num_cores; 64 __u8 x86_max_cores; /* cpuid returned max cores value */
65 __u32 x86_power; 65 __u32 x86_power;
66 __u32 extended_cpuid_level; /* Max extended CPUID function supported */ 66 __u32 extended_cpuid_level; /* Max extended CPUID function supported */
67 unsigned long loops_per_jiffy; 67 unsigned long loops_per_jiffy;
68 __u8 apicid;
69 __u8 booted_cores; /* number of cores as seen by OS */
68} ____cacheline_aligned; 70} ____cacheline_aligned;
69 71
70#define X86_VENDOR_INTEL 0 72#define X86_VENDOR_INTEL 0
diff --git a/include/asm-x86_64/proto.h b/include/asm-x86_64/proto.h
index dbb37b0adb43..34501086afef 100644
--- a/include/asm-x86_64/proto.h
+++ b/include/asm-x86_64/proto.h
@@ -11,6 +11,8 @@ struct pt_regs;
11extern void start_kernel(void); 11extern void start_kernel(void);
12extern void pda_init(int); 12extern void pda_init(int);
13 13
14extern void zap_low_mappings(int cpu);
15
14extern void early_idt_handler(void); 16extern void early_idt_handler(void);
15 17
16extern void mcheck_init(struct cpuinfo_x86 *c); 18extern void mcheck_init(struct cpuinfo_x86 *c);
@@ -22,6 +24,8 @@ extern void mtrr_bp_init(void);
22#define mtrr_bp_init() do {} while (0) 24#define mtrr_bp_init() do {} while (0)
23#endif 25#endif
24extern void init_memory_mapping(unsigned long start, unsigned long end); 26extern void init_memory_mapping(unsigned long start, unsigned long end);
27extern void size_zones(unsigned long *z, unsigned long *h,
28 unsigned long start_pfn, unsigned long end_pfn);
25 29
26extern void system_call(void); 30extern void system_call(void);
27extern int kernel_syscall(void); 31extern int kernel_syscall(void);
diff --git a/include/asm-x86_64/rwlock.h b/include/asm-x86_64/rwlock.h
index 8a78a4ace53c..9942cc393064 100644
--- a/include/asm-x86_64/rwlock.h
+++ b/include/asm-x86_64/rwlock.h
@@ -64,7 +64,7 @@
64 ::"a" (rw) : "memory") 64 ::"a" (rw) : "memory")
65 65
66#define __build_write_lock_const(rw, helper) \ 66#define __build_write_lock_const(rw, helper) \
67 asm volatile(LOCK "subl $" RW_LOCK_BIAS_STR ",(%0)\n\t" \ 67 asm volatile(LOCK "subl $" RW_LOCK_BIAS_STR ",%0\n\t" \
68 "jnz 2f\n" \ 68 "jnz 2f\n" \
69 "1:\n" \ 69 "1:\n" \
70 LOCK_SECTION_START("") \ 70 LOCK_SECTION_START("") \
diff --git a/include/asm-x86_64/rwsem.h b/include/asm-x86_64/rwsem.h
deleted file mode 100644
index 46077e9c1910..000000000000
--- a/include/asm-x86_64/rwsem.h
+++ /dev/null
@@ -1,283 +0,0 @@
1/* rwsem.h: R/W semaphores implemented using XADD/CMPXCHG for x86_64+
2 *
3 * Written by David Howells (dhowells@redhat.com).
4 * Ported by Andi Kleen <ak@suse.de> to x86-64.
5 *
6 * Derived from asm-i386/semaphore.h and asm-i386/rwsem.h
7 *
8 *
9 * The MSW of the count is the negated number of active writers and waiting
10 * lockers, and the LSW is the total number of active locks
11 *
12 * The lock count is initialized to 0 (no active and no waiting lockers).
13 *
14 * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
15 * uncontended lock. This can be determined because XADD returns the old value.
16 * Readers increment by 1 and see a positive value when uncontended, negative
17 * if there are writers (and maybe) readers waiting (in which case it goes to
18 * sleep).
19 *
20 * The value of WAITING_BIAS supports up to 32766 waiting processes. This can
21 * be extended to 65534 by manually checking the whole MSW rather than relying
22 * on the S flag.
23 *
24 * The value of ACTIVE_BIAS supports up to 65535 active processes.
25 *
26 * This should be totally fair - if anything is waiting, a process that wants a
27 * lock will go to the back of the queue. When the currently active lock is
28 * released, if there's a writer at the front of the queue, then that and only
29 * that will be woken up; if there's a bunch of consecutive readers at the
30 * front, then they'll all be woken up, but no other readers will be.
31 */
32
33#ifndef _X8664_RWSEM_H
34#define _X8664_RWSEM_H
35
36#ifndef _LINUX_RWSEM_H
37#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
38#endif
39
40#ifdef __KERNEL__
41
42#include <linux/list.h>
43#include <linux/spinlock.h>
44
45struct rwsem_waiter;
46
47extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
48extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
49extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *);
50extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
51
52/*
53 * the semaphore definition
54 */
55struct rw_semaphore {
56 signed int count;
57#define RWSEM_UNLOCKED_VALUE 0x00000000
58#define RWSEM_ACTIVE_BIAS 0x00000001
59#define RWSEM_ACTIVE_MASK 0x0000ffff
60#define RWSEM_WAITING_BIAS (-0x00010000)
61#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
62#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
63 spinlock_t wait_lock;
64 struct list_head wait_list;
65#if RWSEM_DEBUG
66 int debug;
67#endif
68};
69
70/*
71 * initialisation
72 */
73#if RWSEM_DEBUG
74#define __RWSEM_DEBUG_INIT , 0
75#else
76#define __RWSEM_DEBUG_INIT /* */
77#endif
78
79#define __RWSEM_INITIALIZER(name) \
80{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) \
81 __RWSEM_DEBUG_INIT }
82
83#define DECLARE_RWSEM(name) \
84 struct rw_semaphore name = __RWSEM_INITIALIZER(name)
85
86static inline void init_rwsem(struct rw_semaphore *sem)
87{
88 sem->count = RWSEM_UNLOCKED_VALUE;
89 spin_lock_init(&sem->wait_lock);
90 INIT_LIST_HEAD(&sem->wait_list);
91#if RWSEM_DEBUG
92 sem->debug = 0;
93#endif
94}
95
96/*
97 * lock for reading
98 */
99static inline void __down_read(struct rw_semaphore *sem)
100{
101 __asm__ __volatile__(
102 "# beginning down_read\n\t"
103LOCK_PREFIX " incl (%%rdi)\n\t" /* adds 0x00000001, returns the old value */
104 " js 2f\n\t" /* jump if we weren't granted the lock */
105 "1:\n\t"
106 LOCK_SECTION_START("") \
107 "2:\n\t"
108 " call rwsem_down_read_failed_thunk\n\t"
109 " jmp 1b\n"
110 LOCK_SECTION_END \
111 "# ending down_read\n\t"
112 : "+m"(sem->count)
113 : "D"(sem)
114 : "memory", "cc");
115}
116
117
118/*
119 * trylock for reading -- returns 1 if successful, 0 if contention
120 */
121static inline int __down_read_trylock(struct rw_semaphore *sem)
122{
123 __s32 result, tmp;
124 __asm__ __volatile__(
125 "# beginning __down_read_trylock\n\t"
126 " movl %0,%1\n\t"
127 "1:\n\t"
128 " movl %1,%2\n\t"
129 " addl %3,%2\n\t"
130 " jle 2f\n\t"
131LOCK_PREFIX " cmpxchgl %2,%0\n\t"
132 " jnz 1b\n\t"
133 "2:\n\t"
134 "# ending __down_read_trylock\n\t"
135 : "+m"(sem->count), "=&a"(result), "=&r"(tmp)
136 : "i"(RWSEM_ACTIVE_READ_BIAS)
137 : "memory", "cc");
138 return result>=0 ? 1 : 0;
139}
140
141
142/*
143 * lock for writing
144 */
145static inline void __down_write(struct rw_semaphore *sem)
146{
147 int tmp;
148
149 tmp = RWSEM_ACTIVE_WRITE_BIAS;
150 __asm__ __volatile__(
151 "# beginning down_write\n\t"
152LOCK_PREFIX " xaddl %0,(%%rdi)\n\t" /* subtract 0x0000ffff, returns the old value */
153 " testl %0,%0\n\t" /* was the count 0 before? */
154 " jnz 2f\n\t" /* jump if we weren't granted the lock */
155 "1:\n\t"
156 LOCK_SECTION_START("")
157 "2:\n\t"
158 " call rwsem_down_write_failed_thunk\n\t"
159 " jmp 1b\n"
160 LOCK_SECTION_END
161 "# ending down_write"
162 : "=&r" (tmp)
163 : "0"(tmp), "D"(sem)
164 : "memory", "cc");
165}
166
167/*
168 * trylock for writing -- returns 1 if successful, 0 if contention
169 */
170static inline int __down_write_trylock(struct rw_semaphore *sem)
171{
172 signed long ret = cmpxchg(&sem->count,
173 RWSEM_UNLOCKED_VALUE,
174 RWSEM_ACTIVE_WRITE_BIAS);
175 if (ret == RWSEM_UNLOCKED_VALUE)
176 return 1;
177 return 0;
178}
179
180/*
181 * unlock after reading
182 */
183static inline void __up_read(struct rw_semaphore *sem)
184{
185 __s32 tmp = -RWSEM_ACTIVE_READ_BIAS;
186 __asm__ __volatile__(
187 "# beginning __up_read\n\t"
188LOCK_PREFIX " xaddl %[tmp],(%%rdi)\n\t" /* subtracts 1, returns the old value */
189 " js 2f\n\t" /* jump if the lock is being waited upon */
190 "1:\n\t"
191 LOCK_SECTION_START("")
192 "2:\n\t"
193 " decw %w[tmp]\n\t" /* do nothing if still outstanding active readers */
194 " jnz 1b\n\t"
195 " call rwsem_wake_thunk\n\t"
196 " jmp 1b\n"
197 LOCK_SECTION_END
198 "# ending __up_read\n"
199 : "+m"(sem->count), [tmp] "+r" (tmp)
200 : "D"(sem)
201 : "memory", "cc");
202}
203
204/*
205 * unlock after writing
206 */
207static inline void __up_write(struct rw_semaphore *sem)
208{
209 unsigned tmp;
210 __asm__ __volatile__(
211 "# beginning __up_write\n\t"
212 " movl %[bias],%[tmp]\n\t"
213LOCK_PREFIX " xaddl %[tmp],(%%rdi)\n\t" /* tries to transition 0xffff0001 -> 0x00000000 */
214 " jnz 2f\n\t" /* jump if the lock is being waited upon */
215 "1:\n\t"
216 LOCK_SECTION_START("")
217 "2:\n\t"
218 " decw %w[tmp]\n\t" /* did the active count reduce to 0? */
219 " jnz 1b\n\t" /* jump back if not */
220 " call rwsem_wake_thunk\n\t"
221 " jmp 1b\n"
222 LOCK_SECTION_END
223 "# ending __up_write\n"
224 : "+m"(sem->count), [tmp] "=r" (tmp)
225 : "D"(sem), [bias] "i"(-RWSEM_ACTIVE_WRITE_BIAS)
226 : "memory", "cc");
227}
228
229/*
230 * downgrade write lock to read lock
231 */
232static inline void __downgrade_write(struct rw_semaphore *sem)
233{
234 __asm__ __volatile__(
235 "# beginning __downgrade_write\n\t"
236LOCK_PREFIX " addl %[bias],(%%rdi)\n\t" /* transitions 0xZZZZ0001 -> 0xYYYY0001 */
237 " js 2f\n\t" /* jump if the lock is being waited upon */
238 "1:\n\t"
239 LOCK_SECTION_START("")
240 "2:\n\t"
241 " call rwsem_downgrade_thunk\n"
242 " jmp 1b\n"
243 LOCK_SECTION_END
244 "# ending __downgrade_write\n"
245 : "=m"(sem->count)
246 : "D"(sem), [bias] "i"(-RWSEM_WAITING_BIAS), "m"(sem->count)
247 : "memory", "cc");
248}
249
250/*
251 * implement atomic add functionality
252 */
253static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
254{
255 __asm__ __volatile__(
256LOCK_PREFIX "addl %1,%0"
257 :"=m"(sem->count)
258 :"ir"(delta), "m"(sem->count));
259}
260
261/*
262 * implement exchange and add functionality
263 */
264static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
265{
266 int tmp = delta;
267
268 __asm__ __volatile__(
269LOCK_PREFIX "xaddl %0,(%2)"
270 : "=r"(tmp), "=m"(sem->count)
271 : "r"(sem), "m"(sem->count), "0" (tmp)
272 : "memory");
273
274 return tmp+delta;
275}
276
277static inline int rwsem_is_locked(struct rw_semaphore *sem)
278{
279 return (sem->count != 0);
280}
281
282#endif /* __KERNEL__ */
283#endif /* _X8664_RWSEM_H */
diff --git a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h
index c57ce4071342..d030409a8fb5 100644
--- a/include/asm-x86_64/smp.h
+++ b/include/asm-x86_64/smp.h
@@ -47,7 +47,6 @@ extern void lock_ipi_call_lock(void);
47extern void unlock_ipi_call_lock(void); 47extern void unlock_ipi_call_lock(void);
48extern int smp_num_siblings; 48extern int smp_num_siblings;
49extern void smp_send_reschedule(int cpu); 49extern void smp_send_reschedule(int cpu);
50extern void zap_low_mappings(void);
51void smp_stop_cpu(void); 50void smp_stop_cpu(void);
52extern int smp_call_function_single(int cpuid, void (*func) (void *info), 51extern int smp_call_function_single(int cpuid, void (*func) (void *info),
53 void *info, int retry, int wait); 52 void *info, int retry, int wait);
@@ -82,6 +81,8 @@ extern int safe_smp_processor_id(void);
82extern int __cpu_disable(void); 81extern int __cpu_disable(void);
83extern void __cpu_die(unsigned int cpu); 82extern void __cpu_die(unsigned int cpu);
84extern void prefill_possible_map(void); 83extern void prefill_possible_map(void);
84extern unsigned num_processors;
85extern unsigned disabled_cpus;
85 86
86#endif /* !ASSEMBLY */ 87#endif /* !ASSEMBLY */
87 88
@@ -135,5 +136,11 @@ static __inline int logical_smp_processor_id(void)
135} 136}
136#endif 137#endif
137 138
139#ifdef CONFIG_SMP
140#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
141#else
142#define cpu_physical_id(cpu) boot_cpu_id
143#endif
144
138#endif 145#endif
139 146
diff --git a/include/asm-x86_64/spinlock.h b/include/asm-x86_64/spinlock.h
index 69636831ad2f..fe484a699cc3 100644
--- a/include/asm-x86_64/spinlock.h
+++ b/include/asm-x86_64/spinlock.h
@@ -18,22 +18,22 @@
18 */ 18 */
19 19
20#define __raw_spin_is_locked(x) \ 20#define __raw_spin_is_locked(x) \
21 (*(volatile signed char *)(&(x)->slock) <= 0) 21 (*(volatile signed int *)(&(x)->slock) <= 0)
22 22
23#define __raw_spin_lock_string \ 23#define __raw_spin_lock_string \
24 "\n1:\t" \ 24 "\n1:\t" \
25 "lock ; decb %0\n\t" \ 25 "lock ; decl %0\n\t" \
26 "js 2f\n" \ 26 "js 2f\n" \
27 LOCK_SECTION_START("") \ 27 LOCK_SECTION_START("") \
28 "2:\t" \ 28 "2:\t" \
29 "rep;nop\n\t" \ 29 "rep;nop\n\t" \
30 "cmpb $0,%0\n\t" \ 30 "cmpl $0,%0\n\t" \
31 "jle 2b\n\t" \ 31 "jle 2b\n\t" \
32 "jmp 1b\n" \ 32 "jmp 1b\n" \
33 LOCK_SECTION_END 33 LOCK_SECTION_END
34 34
35#define __raw_spin_unlock_string \ 35#define __raw_spin_unlock_string \
36 "movb $1,%0" \ 36 "movl $1,%0" \
37 :"=m" (lock->slock) : : "memory" 37 :"=m" (lock->slock) : : "memory"
38 38
39static inline void __raw_spin_lock(raw_spinlock_t *lock) 39static inline void __raw_spin_lock(raw_spinlock_t *lock)
@@ -47,10 +47,10 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
47 47
48static inline int __raw_spin_trylock(raw_spinlock_t *lock) 48static inline int __raw_spin_trylock(raw_spinlock_t *lock)
49{ 49{
50 char oldval; 50 int oldval;
51 51
52 __asm__ __volatile__( 52 __asm__ __volatile__(
53 "xchgb %b0,%1" 53 "xchgl %0,%1"
54 :"=q" (oldval), "=m" (lock->slock) 54 :"=q" (oldval), "=m" (lock->slock)
55 :"0" (0) : "memory"); 55 :"0" (0) : "memory");
56 56
diff --git a/include/asm-x86_64/topology.h b/include/asm-x86_64/topology.h
index 1c603cd7e4d0..7d82bc56b9fa 100644
--- a/include/asm-x86_64/topology.h
+++ b/include/asm-x86_64/topology.h
@@ -23,11 +23,13 @@ extern int __node_distance(int, int);
23 23
24#define cpu_to_node(cpu) (cpu_to_node[cpu]) 24#define cpu_to_node(cpu) (cpu_to_node[cpu])
25#define parent_node(node) (node) 25#define parent_node(node) (node)
26#define node_to_first_cpu(node) (__ffs(node_to_cpumask[node])) 26#define node_to_first_cpu(node) (first_cpu(node_to_cpumask[node]))
27#define node_to_cpumask(node) (node_to_cpumask[node]) 27#define node_to_cpumask(node) (node_to_cpumask[node])
28#define pcibus_to_node(bus) ((long)(bus->sysdata)) 28#define pcibus_to_node(bus) ((long)(bus->sysdata))
29#define pcibus_to_cpumask(bus) node_to_cpumask(pcibus_to_node(bus)); 29#define pcibus_to_cpumask(bus) node_to_cpumask(pcibus_to_node(bus));
30 30
31#define numa_node_id() read_pda(nodenumber)
32
31/* sched_domains SD_NODE_INIT for x86_64 machines */ 33/* sched_domains SD_NODE_INIT for x86_64 machines */
32#define SD_NODE_INIT (struct sched_domain) { \ 34#define SD_NODE_INIT (struct sched_domain) { \
33 .span = CPU_MASK_NONE, \ 35 .span = CPU_MASK_NONE, \
diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h
index 3c494b65d33a..2c42150bce0c 100644
--- a/include/asm-x86_64/unistd.h
+++ b/include/asm-x86_64/unistd.h
@@ -462,7 +462,7 @@ __SYSCALL(__NR_fremovexattr, sys_fremovexattr)
462#define __NR_tkill 200 462#define __NR_tkill 200
463__SYSCALL(__NR_tkill, sys_tkill) 463__SYSCALL(__NR_tkill, sys_tkill)
464#define __NR_time 201 464#define __NR_time 201
465__SYSCALL(__NR_time, sys_time64) 465__SYSCALL(__NR_time, sys_time)
466#define __NR_futex 202 466#define __NR_futex 202
467__SYSCALL(__NR_futex, sys_futex) 467__SYSCALL(__NR_futex, sys_futex)
468#define __NR_sched_setaffinity 203 468#define __NR_sched_setaffinity 203
@@ -608,6 +608,7 @@ do { \
608#define __ARCH_WANT_SYS_SIGPENDING 608#define __ARCH_WANT_SYS_SIGPENDING
609#define __ARCH_WANT_SYS_SIGPROCMASK 609#define __ARCH_WANT_SYS_SIGPROCMASK
610#define __ARCH_WANT_SYS_RT_SIGACTION 610#define __ARCH_WANT_SYS_RT_SIGACTION
611#define __ARCH_WANT_SYS_TIME
611#define __ARCH_WANT_COMPAT_SYS_TIME 612#define __ARCH_WANT_COMPAT_SYS_TIME
612#endif 613#endif
613 614
diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h
index 12b5732dc6e5..3670cc7695da 100644
--- a/include/asm-xtensa/atomic.h
+++ b/include/asm-xtensa/atomic.h
@@ -223,6 +223,26 @@ static inline int atomic_sub_return(int i, atomic_t * v)
223 */ 223 */
224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0) 224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
225 225
226#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
227
228/**
229 * atomic_add_unless - add unless the number is a given value
230 * @v: pointer of type atomic_t
231 * @a: the amount to add to v...
232 * @u: ...unless v is equal to u.
233 *
234 * Atomically adds @a to @v, so long as it was not @u.
235 * Returns non-zero if @v was not @u, and zero otherwise.
236 */
237#define atomic_add_unless(v, a, u) \
238({ \
239 int c, old; \
240 c = atomic_read(v); \
241 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
242 c = old; \
243 c != (u); \
244})
245#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
226 246
227static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) 247static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
228{ 248{
diff --git a/include/linux/acct.h b/include/linux/acct.h
index 93c5b3cdf951..9a66401073fc 100644
--- a/include/linux/acct.h
+++ b/include/linux/acct.h
@@ -16,6 +16,8 @@
16#define _LINUX_ACCT_H 16#define _LINUX_ACCT_H
17 17
18#include <linux/types.h> 18#include <linux/types.h>
19#include <linux/jiffies.h>
20
19#include <asm/param.h> 21#include <asm/param.h>
20#include <asm/byteorder.h> 22#include <asm/byteorder.h>
21 23
diff --git a/include/linux/aio.h b/include/linux/aio.h
index 403d71dcb7c8..49fd37629ee4 100644
--- a/include/linux/aio.h
+++ b/include/linux/aio.h
@@ -124,7 +124,7 @@ struct kiocb {
124 (x)->ki_users = 1; \ 124 (x)->ki_users = 1; \
125 (x)->ki_key = KIOCB_SYNC_KEY; \ 125 (x)->ki_key = KIOCB_SYNC_KEY; \
126 (x)->ki_filp = (filp); \ 126 (x)->ki_filp = (filp); \
127 (x)->ki_ctx = &tsk->active_mm->default_kioctx; \ 127 (x)->ki_ctx = NULL; \
128 (x)->ki_cancel = NULL; \ 128 (x)->ki_cancel = NULL; \
129 (x)->ki_dtor = NULL; \ 129 (x)->ki_dtor = NULL; \
130 (x)->ki_obj.tsk = tsk; \ 130 (x)->ki_obj.tsk = tsk; \
@@ -210,8 +210,15 @@ struct kioctx *lookup_ioctx(unsigned long ctx_id);
210int FASTCALL(io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb, 210int FASTCALL(io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb,
211 struct iocb *iocb)); 211 struct iocb *iocb));
212 212
213#define get_ioctx(kioctx) do { if (unlikely(atomic_read(&(kioctx)->users) <= 0)) BUG(); atomic_inc(&(kioctx)->users); } while (0) 213#define get_ioctx(kioctx) do { \
214#define put_ioctx(kioctx) do { if (unlikely(atomic_dec_and_test(&(kioctx)->users))) __put_ioctx(kioctx); else if (unlikely(atomic_read(&(kioctx)->users) < 0)) BUG(); } while (0) 214 BUG_ON(unlikely(atomic_read(&(kioctx)->users) <= 0)); \
215 atomic_inc(&(kioctx)->users); \
216} while (0)
217#define put_ioctx(kioctx) do { \
218 BUG_ON(unlikely(atomic_read(&(kioctx)->users) <= 0)); \
219 if (unlikely(atomic_dec_and_test(&(kioctx)->users))) \
220 __put_ioctx(kioctx); \
221} while (0)
215 222
216#define in_aio() !is_sync_wait(current->io_wait) 223#define in_aio() !is_sync_wait(current->io_wait)
217/* may be used for debugging */ 224/* may be used for debugging */
diff --git a/include/linux/atmdev.h b/include/linux/atmdev.h
index e7d0593bb576..b203ea82a0a8 100644
--- a/include/linux/atmdev.h
+++ b/include/linux/atmdev.h
@@ -7,7 +7,6 @@
7#define LINUX_ATMDEV_H 7#define LINUX_ATMDEV_H
8 8
9 9
10#include <linux/config.h>
11#include <linux/atmapi.h> 10#include <linux/atmapi.h>
12#include <linux/atm.h> 11#include <linux/atm.h>
13#include <linux/atmioc.h> 12#include <linux/atmioc.h>
@@ -210,6 +209,7 @@ struct atm_cirange {
210 209
211#ifdef __KERNEL__ 210#ifdef __KERNEL__
212 211
212#include <linux/config.h>
213#include <linux/wait.h> /* wait_queue_head_t */ 213#include <linux/wait.h> /* wait_queue_head_t */
214#include <linux/time.h> /* struct timeval */ 214#include <linux/time.h> /* struct timeval */
215#include <linux/net.h> 215#include <linux/net.h>
@@ -274,7 +274,7 @@ enum {
274 274
275 275
276enum { 276enum {
277 ATM_DF_CLOSE, /* close device when last VCC is closed */ 277 ATM_DF_REMOVED, /* device was removed from atm_devs list */
278}; 278};
279 279
280 280
@@ -415,7 +415,6 @@ struct atm_dev *atm_dev_register(const char *type,const struct atmdev_ops *ops,
415 int number,unsigned long *flags); /* number == -1: pick first available */ 415 int number,unsigned long *flags); /* number == -1: pick first available */
416struct atm_dev *atm_dev_lookup(int number); 416struct atm_dev *atm_dev_lookup(int number);
417void atm_dev_deregister(struct atm_dev *dev); 417void atm_dev_deregister(struct atm_dev *dev);
418void shutdown_atm_dev(struct atm_dev *dev);
419void vcc_insert_socket(struct sock *sk); 418void vcc_insert_socket(struct sock *sk);
420 419
421 420
@@ -457,18 +456,19 @@ static inline void atm_dev_hold(struct atm_dev *dev)
457 456
458static inline void atm_dev_put(struct atm_dev *dev) 457static inline void atm_dev_put(struct atm_dev *dev)
459{ 458{
460 atomic_dec(&dev->refcnt); 459 if (atomic_dec_and_test(&dev->refcnt)) {
461 460 BUG_ON(!test_bit(ATM_DF_REMOVED, &dev->flags));
462 if ((atomic_read(&dev->refcnt) == 1) && 461 if (dev->ops->dev_close)
463 test_bit(ATM_DF_CLOSE,&dev->flags)) 462 dev->ops->dev_close(dev);
464 shutdown_atm_dev(dev); 463 kfree(dev);
464 }
465} 465}
466 466
467 467
468int atm_charge(struct atm_vcc *vcc,int truesize); 468int atm_charge(struct atm_vcc *vcc,int truesize);
469struct sk_buff *atm_alloc_charge(struct atm_vcc *vcc,int pdu_size, 469struct sk_buff *atm_alloc_charge(struct atm_vcc *vcc,int pdu_size,
470 gfp_t gfp_flags); 470 gfp_t gfp_flags);
471int atm_pcr_goal(struct atm_trafprm *tp); 471int atm_pcr_goal(const struct atm_trafprm *tp);
472 472
473void vcc_release_async(struct atm_vcc *vcc, int reply); 473void vcc_release_async(struct atm_vcc *vcc, int reply);
474 474
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index cb3c3ef50f50..38c2fb7ebe09 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -84,6 +84,16 @@ static __inline__ int get_bitmask_order(unsigned int count)
84 return order; /* We could be slightly more clever with -1 here... */ 84 return order; /* We could be slightly more clever with -1 here... */
85} 85}
86 86
87static __inline__ int get_count_order(unsigned int count)
88{
89 int order;
90
91 order = fls(count) - 1;
92 if (count & (count - 1))
93 order++;
94 return order;
95}
96
87/* 97/*
88 * hweightN: returns the hamming weight (i.e. the number 98 * hweightN: returns the hamming weight (i.e. the number
89 * of bits set) of a N-bit word 99 * of bits set) of a N-bit word
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 025a7f084dbd..a33a31e71bbc 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -406,6 +406,7 @@ struct request_queue
406 406
407 atomic_t refcnt; 407 atomic_t refcnt;
408 408
409 unsigned int nr_sorted;
409 unsigned int in_flight; 410 unsigned int in_flight;
410 411
411 /* 412 /*
@@ -631,6 +632,7 @@ static inline void elv_dispatch_add_tail(struct request_queue *q,
631{ 632{
632 if (q->last_merge == rq) 633 if (q->last_merge == rq)
633 q->last_merge = NULL; 634 q->last_merge = NULL;
635 q->nr_sorted--;
634 636
635 q->end_sector = rq_end_sector(rq); 637 q->end_sector = rq_end_sector(rq);
636 q->boundary_rq = rq; 638 q->boundary_rq = rq;
diff --git a/include/linux/cache.h b/include/linux/cache.h
index f6b5a46c5f82..0b7ecf3af78a 100644
--- a/include/linux/cache.h
+++ b/include/linux/cache.h
@@ -13,7 +13,7 @@
13#define SMP_CACHE_BYTES L1_CACHE_BYTES 13#define SMP_CACHE_BYTES L1_CACHE_BYTES
14#endif 14#endif
15 15
16#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) 16#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64)
17#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 17#define __read_mostly __attribute__((__section__(".data.read_mostly")))
18#else 18#else
19#define __read_mostly 19#define __read_mostly
diff --git a/include/linux/cciss_ioctl.h b/include/linux/cciss_ioctl.h
index 424d5e622b43..6e27f42e3a57 100644
--- a/include/linux/cciss_ioctl.h
+++ b/include/linux/cciss_ioctl.h
@@ -10,8 +10,8 @@
10typedef struct _cciss_pci_info_struct 10typedef struct _cciss_pci_info_struct
11{ 11{
12 unsigned char bus; 12 unsigned char bus;
13 unsigned short domain;
14 unsigned char dev_fn; 13 unsigned char dev_fn;
14 unsigned short domain;
15 __u32 board_id; 15 __u32 board_id;
16} cciss_pci_info_struct; 16} cciss_pci_info_struct;
17 17
diff --git a/include/linux/cm4000_cs.h b/include/linux/cm4000_cs.h
new file mode 100644
index 000000000000..605ebe24bb2e
--- /dev/null
+++ b/include/linux/cm4000_cs.h
@@ -0,0 +1,66 @@
1#ifndef _CM4000_H_
2#define _CM4000_H_
3
4#define MAX_ATR 33
5
6#define CM4000_MAX_DEV 4
7
8/* those two structures are passed via ioctl() from/to userspace. They are
9 * used by existing userspace programs, so I kepth the awkward "bIFSD" naming
10 * not to break compilation of userspace apps. -HW */
11
12typedef struct atreq {
13 int32_t atr_len;
14 unsigned char atr[64];
15 int32_t power_act;
16 unsigned char bIFSD;
17 unsigned char bIFSC;
18} atreq_t;
19
20
21/* what is particularly stupid in the original driver is the arch-dependant
22 * member sizes. This leads to CONFIG_COMPAT breakage, since 32bit userspace
23 * will lay out the structure members differently than the 64bit kernel.
24 *
25 * I've changed "ptsreq.protocol" from "unsigned long" to "u_int32_t".
26 * On 32bit this will make no difference. With 64bit kernels, it will make
27 * 32bit apps work, too.
28 */
29
30typedef struct ptsreq {
31 u_int32_t protocol; /*T=0: 2^0, T=1: 2^1*/
32 unsigned char flags;
33 unsigned char pts1;
34 unsigned char pts2;
35 unsigned char pts3;
36} ptsreq_t;
37
38#define CM_IOC_MAGIC 'c'
39#define CM_IOC_MAXNR 255
40
41#define CM_IOCGSTATUS _IOR (CM_IOC_MAGIC, 0, unsigned char *)
42#define CM_IOCGATR _IOWR(CM_IOC_MAGIC, 1, atreq_t *)
43#define CM_IOCSPTS _IOW (CM_IOC_MAGIC, 2, ptsreq_t *)
44#define CM_IOCSRDR _IO (CM_IOC_MAGIC, 3)
45#define CM_IOCARDOFF _IO (CM_IOC_MAGIC, 4)
46
47#define CM_IOSDBGLVL _IOW(CM_IOC_MAGIC, 250, int*)
48
49/* card and device states */
50#define CM_CARD_INSERTED 0x01
51#define CM_CARD_POWERED 0x02
52#define CM_ATR_PRESENT 0x04
53#define CM_ATR_VALID 0x08
54#define CM_STATE_VALID 0x0f
55/* extra info only from CM4000 */
56#define CM_NO_READER 0x10
57#define CM_BAD_CARD 0x20
58
59
60#ifdef __KERNEL__
61
62#define DEVICE_NAME "cmm"
63#define MODULE_NAME "cm4000_cs"
64
65#endif /* __KERNEL__ */
66#endif /* _CM4000_H_ */
diff --git a/include/linux/cn_proc.h b/include/linux/cn_proc.h
index 70ab56317380..1417de935057 100644
--- a/include/linux/cn_proc.h
+++ b/include/linux/cn_proc.h
@@ -26,6 +26,7 @@
26#define CN_PROC_H 26#define CN_PROC_H
27 27
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/time.h>
29#include <linux/connector.h> 30#include <linux/connector.h>
30 31
31/* 32/*
@@ -65,6 +66,7 @@ struct proc_event {
65 PROC_EVENT_EXIT = 0x80000000 66 PROC_EVENT_EXIT = 0x80000000
66 } what; 67 } what;
67 __u32 cpu; 68 __u32 cpu;
69 struct timespec timestamp;
68 union { /* must be last field of proc_event struct */ 70 union { /* must be last field of proc_event struct */
69 struct { 71 struct {
70 __u32 err; 72 __u32 err;
@@ -86,12 +88,12 @@ struct proc_event {
86 pid_t process_pid; 88 pid_t process_pid;
87 pid_t process_tgid; 89 pid_t process_tgid;
88 union { 90 union {
89 uid_t ruid; /* current->uid */ 91 __u32 ruid; /* task uid */
90 gid_t rgid; /* current->gid */ 92 __u32 rgid; /* task gid */
91 } r; 93 } r;
92 union { 94 union {
93 uid_t euid; 95 __u32 euid;
94 gid_t egid; 96 __u32 egid;
95 } e; 97 } e;
96 } id; 98 } id;
97 99
diff --git a/include/linux/compat_ioctl.h b/include/linux/compat_ioctl.h
index 2209ad3499a3..119f9d064cc6 100644
--- a/include/linux/compat_ioctl.h
+++ b/include/linux/compat_ioctl.h
@@ -259,6 +259,14 @@ COMPATIBLE_IOCTL(RTC_RD_TIME)
259COMPATIBLE_IOCTL(RTC_SET_TIME) 259COMPATIBLE_IOCTL(RTC_SET_TIME)
260COMPATIBLE_IOCTL(RTC_WKALM_SET) 260COMPATIBLE_IOCTL(RTC_WKALM_SET)
261COMPATIBLE_IOCTL(RTC_WKALM_RD) 261COMPATIBLE_IOCTL(RTC_WKALM_RD)
262/*
263 * These two are only for the sbus rtc driver, but
264 * hwclock tries them on every rtc device first when
265 * running on sparc. On other architectures the entries
266 * are useless but harmless.
267 */
268COMPATIBLE_IOCTL(_IOR('p', 20, int[7])) /* RTCGET */
269COMPATIBLE_IOCTL(_IOW('p', 21, int[7])) /* RTCSET */
262/* Little m */ 270/* Little m */
263COMPATIBLE_IOCTL(MTIOCTOP) 271COMPATIBLE_IOCTL(MTIOCTOP)
264/* Socket level stuff */ 272/* Socket level stuff */
@@ -787,3 +795,70 @@ COMPATIBLE_IOCTL(HIDIOCGFLAG)
787COMPATIBLE_IOCTL(HIDIOCSFLAG) 795COMPATIBLE_IOCTL(HIDIOCSFLAG)
788COMPATIBLE_IOCTL(HIDIOCGCOLLECTIONINDEX) 796COMPATIBLE_IOCTL(HIDIOCGCOLLECTIONINDEX)
789COMPATIBLE_IOCTL(HIDIOCGCOLLECTIONINFO) 797COMPATIBLE_IOCTL(HIDIOCGCOLLECTIONINFO)
798/* dvb */
799COMPATIBLE_IOCTL(AUDIO_STOP)
800COMPATIBLE_IOCTL(AUDIO_PLAY)
801COMPATIBLE_IOCTL(AUDIO_PAUSE)
802COMPATIBLE_IOCTL(AUDIO_CONTINUE)
803COMPATIBLE_IOCTL(AUDIO_SELECT_SOURCE)
804COMPATIBLE_IOCTL(AUDIO_SET_MUTE)
805COMPATIBLE_IOCTL(AUDIO_SET_AV_SYNC)
806COMPATIBLE_IOCTL(AUDIO_SET_BYPASS_MODE)
807COMPATIBLE_IOCTL(AUDIO_CHANNEL_SELECT)
808COMPATIBLE_IOCTL(AUDIO_GET_STATUS)
809COMPATIBLE_IOCTL(AUDIO_GET_CAPABILITIES)
810COMPATIBLE_IOCTL(AUDIO_CLEAR_BUFFER)
811COMPATIBLE_IOCTL(AUDIO_SET_ID)
812COMPATIBLE_IOCTL(AUDIO_SET_MIXER)
813COMPATIBLE_IOCTL(AUDIO_SET_STREAMTYPE)
814COMPATIBLE_IOCTL(AUDIO_SET_EXT_ID)
815COMPATIBLE_IOCTL(AUDIO_SET_ATTRIBUTES)
816COMPATIBLE_IOCTL(AUDIO_SET_KARAOKE)
817COMPATIBLE_IOCTL(DMX_START)
818COMPATIBLE_IOCTL(DMX_STOP)
819COMPATIBLE_IOCTL(DMX_SET_FILTER)
820COMPATIBLE_IOCTL(DMX_SET_PES_FILTER)
821COMPATIBLE_IOCTL(DMX_SET_BUFFER_SIZE)
822COMPATIBLE_IOCTL(DMX_GET_PES_PIDS)
823COMPATIBLE_IOCTL(DMX_GET_CAPS)
824COMPATIBLE_IOCTL(DMX_SET_SOURCE)
825COMPATIBLE_IOCTL(DMX_GET_STC)
826COMPATIBLE_IOCTL(FE_GET_INFO)
827COMPATIBLE_IOCTL(FE_DISEQC_RESET_OVERLOAD)
828COMPATIBLE_IOCTL(FE_DISEQC_SEND_MASTER_CMD)
829COMPATIBLE_IOCTL(FE_DISEQC_RECV_SLAVE_REPLY)
830COMPATIBLE_IOCTL(FE_DISEQC_SEND_BURST)
831COMPATIBLE_IOCTL(FE_SET_TONE)
832COMPATIBLE_IOCTL(FE_SET_VOLTAGE)
833COMPATIBLE_IOCTL(FE_ENABLE_HIGH_LNB_VOLTAGE)
834COMPATIBLE_IOCTL(FE_READ_STATUS)
835COMPATIBLE_IOCTL(FE_READ_BER)
836COMPATIBLE_IOCTL(FE_READ_SIGNAL_STRENGTH)
837COMPATIBLE_IOCTL(FE_READ_SNR)
838COMPATIBLE_IOCTL(FE_READ_UNCORRECTED_BLOCKS)
839COMPATIBLE_IOCTL(FE_SET_FRONTEND)
840COMPATIBLE_IOCTL(FE_GET_FRONTEND)
841COMPATIBLE_IOCTL(FE_GET_EVENT)
842COMPATIBLE_IOCTL(FE_DISHNETWORK_SEND_LEGACY_CMD)
843COMPATIBLE_IOCTL(VIDEO_STOP)
844COMPATIBLE_IOCTL(VIDEO_PLAY)
845COMPATIBLE_IOCTL(VIDEO_FREEZE)
846COMPATIBLE_IOCTL(VIDEO_CONTINUE)
847COMPATIBLE_IOCTL(VIDEO_SELECT_SOURCE)
848COMPATIBLE_IOCTL(VIDEO_SET_BLANK)
849COMPATIBLE_IOCTL(VIDEO_GET_STATUS)
850COMPATIBLE_IOCTL(VIDEO_SET_DISPLAY_FORMAT)
851COMPATIBLE_IOCTL(VIDEO_FAST_FORWARD)
852COMPATIBLE_IOCTL(VIDEO_SLOWMOTION)
853COMPATIBLE_IOCTL(VIDEO_GET_CAPABILITIES)
854COMPATIBLE_IOCTL(VIDEO_CLEAR_BUFFER)
855COMPATIBLE_IOCTL(VIDEO_SET_ID)
856COMPATIBLE_IOCTL(VIDEO_SET_STREAMTYPE)
857COMPATIBLE_IOCTL(VIDEO_SET_FORMAT)
858COMPATIBLE_IOCTL(VIDEO_SET_SYSTEM)
859COMPATIBLE_IOCTL(VIDEO_SET_HIGHLIGHT)
860COMPATIBLE_IOCTL(VIDEO_SET_SPU)
861COMPATIBLE_IOCTL(VIDEO_GET_NAVI)
862COMPATIBLE_IOCTL(VIDEO_SET_ATTRIBUTES)
863COMPATIBLE_IOCTL(VIDEO_GET_SIZE)
864COMPATIBLE_IOCTL(VIDEO_GET_FRAME_RATE)
diff --git a/include/linux/connector.h b/include/linux/connector.h
index c5769c6585f4..ad1a22c1c42e 100644
--- a/include/linux/connector.h
+++ b/include/linux/connector.h
@@ -32,6 +32,8 @@
32 */ 32 */
33#define CN_IDX_PROC 0x1 33#define CN_IDX_PROC 0x1
34#define CN_VAL_PROC 0x1 34#define CN_VAL_PROC 0x1
35#define CN_IDX_CIFS 0x2
36#define CN_VAL_CIFS 0x1
35 37
36#define CN_NETLINK_USERS 1 38#define CN_NETLINK_USERS 1
37 39
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 43c44530ef9d..0ed1d4853c69 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -65,10 +65,9 @@ extern struct sysdev_class cpu_sysdev_class;
65 65
66#ifdef CONFIG_HOTPLUG_CPU 66#ifdef CONFIG_HOTPLUG_CPU
67/* Stop CPUs going up and down. */ 67/* Stop CPUs going up and down. */
68extern struct semaphore cpucontrol; 68extern void lock_cpu_hotplug(void);
69#define lock_cpu_hotplug() down(&cpucontrol) 69extern void unlock_cpu_hotplug(void);
70#define unlock_cpu_hotplug() up(&cpucontrol) 70extern int lock_cpu_hotplug_interruptible(void);
71#define lock_cpu_hotplug_interruptible() down_interruptible(&cpucontrol)
72#define hotcpu_notifier(fn, pri) { \ 71#define hotcpu_notifier(fn, pri) { \
73 static struct notifier_block fn##_nb = \ 72 static struct notifier_block fn##_nb = \
74 { .notifier_call = fn, .priority = pri }; \ 73 { .notifier_call = fn, .priority = pri }; \
diff --git a/include/linux/ds17287rtc.h b/include/linux/ds17287rtc.h
new file mode 100644
index 000000000000..c281ba42e28f
--- /dev/null
+++ b/include/linux/ds17287rtc.h
@@ -0,0 +1,67 @@
1/*
2 * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * (C) 2003 Guido Guenther <agx@sigxcpu.org>
9 */
10#ifndef __LINUX_DS17287RTC_H
11#define __LINUX_DS17287RTC_H
12
13#include <linux/rtc.h> /* get the user-level API */
14#include <linux/spinlock.h> /* spinlock_t */
15#include <linux/mc146818rtc.h>
16
17/* Register A */
18#define DS_REGA_DV2 0x40 /* countdown chain */
19#define DS_REGA_DV1 0x20 /* oscillator enable */
20#define DS_REGA_DV0 0x10 /* bank select */
21
22/* bank 1 registers */
23#define DS_B1_MODEL 0x40 /* model number byte */
24#define DS_B1_SN1 0x41 /* serial number byte 1 */
25#define DS_B1_SN2 0x42 /* serial number byte 2 */
26#define DS_B1_SN3 0x43 /* serial number byte 3 */
27#define DS_B1_SN4 0x44 /* serial number byte 4 */
28#define DS_B1_SN5 0x45 /* serial number byte 5 */
29#define DS_B1_SN6 0x46 /* serial number byte 6 */
30#define DS_B1_CRC 0x47 /* CRC byte */
31#define DS_B1_CENTURY 0x48 /* Century byte */
32#define DS_B1_DALARM 0x49 /* date alarm */
33#define DS_B1_XCTRL4A 0x4a /* extendec control register 4a */
34#define DS_B1_XCTRL4B 0x4b /* extendec control register 4b */
35#define DS_B1_RTCADDR2 0x4e /* rtc address 2 */
36#define DS_B1_RTCADDR3 0x4f /* rtc address 3 */
37#define DS_B1_RAMLSB 0x50 /* extended ram LSB */
38#define DS_B1_RAMMSB 0x51 /* extended ram MSB */
39#define DS_B1_RAMDPORT 0x53 /* extended ram data port */
40
41/* register details */
42/* extended control register 4a */
43#define DS_XCTRL4A_VRT2 0x80 /* valid ram and time */
44#define DS_XCTRL4A_INCR 0x40 /* increment progress status */
45#define DS_XCTRL4A_BME 0x20 /* burst mode enable */
46#define DS_XCTRL4A_PAB 0x08 /* power active bar ctrl */
47#define DS_XCTRL4A_RF 0x04 /* ram clear flag */
48#define DS_XCTRL4A_WF 0x02 /* wake up alarm flag */
49#define DS_XCTRL4A_KF 0x01 /* kickstart flag */
50
51/* interrupt causes */
52#define DS_XCTRL4A_IFS (DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF)
53
54/* extended control register 4b */
55#define DS_XCTRL4B_ABE 0x80 /* auxiliary battery enable */
56#define DS_XCTRL4B_E32K 0x40 /* enable 32.768 kHz Output */
57#define DS_XCTRL4B_CS 0x20 /* crystal select */
58#define DS_XCTRL4B_RCE 0x10 /* ram clear enable */
59#define DS_XCTRL4B_PRS 0x08 /* PAB resec select */
60#define DS_XCTRL4B_RIE 0x04 /* ram clear interrupt enable */
61#define DS_XCTRL4B_WFE 0x02 /* wake up alarm interrupt enable */
62#define DS_XCTRL4B_KFE 0x01 /* kickstart interrupt enable */
63
64/* interrupt enable bits */
65#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
66
67#endif /* __LINUX_DS17287RTC_H */
diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h
new file mode 100644
index 000000000000..a83cdd1cafc9
--- /dev/null
+++ b/include/linux/ds1742rtc.h
@@ -0,0 +1,53 @@
1/*
2 * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
3 *
4 * Copyright (C) 1999-2001 Toshiba Corporation
5 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
6 *
7 * Permission is hereby granted to copy, modify and redistribute this code
8 * in terms of the GNU Library General Public License, Version 2 or later,
9 * at your option.
10 */
11#ifndef __LINUX_DS1742RTC_H
12#define __LINUX_DS1742RTC_H
13
14#include <asm/ds1742.h>
15
16#define RTC_BRAM_SIZE 0x800
17#define RTC_OFFSET 0x7f8
18
19/*
20 * Register summary
21 */
22#define RTC_CONTROL (RTC_OFFSET + 0)
23#define RTC_CENTURY (RTC_OFFSET + 0)
24#define RTC_SECONDS (RTC_OFFSET + 1)
25#define RTC_MINUTES (RTC_OFFSET + 2)
26#define RTC_HOURS (RTC_OFFSET + 3)
27#define RTC_DAY (RTC_OFFSET + 4)
28#define RTC_DATE (RTC_OFFSET + 5)
29#define RTC_MONTH (RTC_OFFSET + 6)
30#define RTC_YEAR (RTC_OFFSET + 7)
31
32#define RTC_CENTURY_MASK 0x3f
33#define RTC_SECONDS_MASK 0x7f
34#define RTC_DAY_MASK 0x07
35
36/*
37 * Bits in the Control/Century register
38 */
39#define RTC_WRITE 0x80
40#define RTC_READ 0x40
41
42/*
43 * Bits in the Seconds register
44 */
45#define RTC_STOP 0x80
46
47/*
48 * Bits in the Day register
49 */
50#define RTC_BATT_FLAG 0x80
51#define RTC_FREQ_TEST 0x40
52
53#endif /* __LINUX_DS1742RTC_H */
diff --git a/include/linux/dvb/audio.h b/include/linux/dvb/audio.h
index cc314443f1c4..2b8797084685 100644
--- a/include/linux/dvb/audio.h
+++ b/include/linux/dvb/audio.h
@@ -32,39 +32,39 @@
32 32
33 33
34typedef enum { 34typedef enum {
35 AUDIO_SOURCE_DEMUX, /* Select the demux as the main source */ 35 AUDIO_SOURCE_DEMUX, /* Select the demux as the main source */
36 AUDIO_SOURCE_MEMORY /* Select internal memory as the main source */ 36 AUDIO_SOURCE_MEMORY /* Select internal memory as the main source */
37} audio_stream_source_t; 37} audio_stream_source_t;
38 38
39 39
40typedef enum { 40typedef enum {
41 AUDIO_STOPPED, /* Device is stopped */ 41 AUDIO_STOPPED, /* Device is stopped */
42 AUDIO_PLAYING, /* Device is currently playing */ 42 AUDIO_PLAYING, /* Device is currently playing */
43 AUDIO_PAUSED /* Device is paused */ 43 AUDIO_PAUSED /* Device is paused */
44} audio_play_state_t; 44} audio_play_state_t;
45 45
46 46
47typedef enum { 47typedef enum {
48 AUDIO_STEREO, 48 AUDIO_STEREO,
49 AUDIO_MONO_LEFT, 49 AUDIO_MONO_LEFT,
50 AUDIO_MONO_RIGHT 50 AUDIO_MONO_RIGHT
51} audio_channel_select_t; 51} audio_channel_select_t;
52 52
53 53
54typedef struct audio_mixer { 54typedef struct audio_mixer {
55 unsigned int volume_left; 55 unsigned int volume_left;
56 unsigned int volume_right; 56 unsigned int volume_right;
57 // what else do we need? bass, pass-through, ... 57 // what else do we need? bass, pass-through, ...
58} audio_mixer_t; 58} audio_mixer_t;
59 59
60 60
61typedef struct audio_status { 61typedef struct audio_status {
62 int AV_sync_state; /* sync audio and video? */ 62 int AV_sync_state; /* sync audio and video? */
63 int mute_state; /* audio is muted */ 63 int mute_state; /* audio is muted */
64 audio_play_state_t play_state; /* current playback state */ 64 audio_play_state_t play_state; /* current playback state */
65 audio_stream_source_t stream_source; /* current stream source */ 65 audio_stream_source_t stream_source; /* current stream source */
66 audio_channel_select_t channel_select; /* currently selected channel */ 66 audio_channel_select_t channel_select; /* currently selected channel */
67 int bypass_mode; /* pass on audio data to */ 67 int bypass_mode; /* pass on audio data to */
68 audio_mixer_t mixer_state; /* current mixer state */ 68 audio_mixer_t mixer_state; /* current mixer state */
69} audio_status_t; /* separate decoder hardware */ 69} audio_status_t; /* separate decoder hardware */
70 70
@@ -74,8 +74,8 @@ struct audio_karaoke{ /* if Vocal1 or Vocal2 are non-zero, they get mixed */
74 int vocal1; /* into left and right t at 70% each */ 74 int vocal1; /* into left and right t at 70% each */
75 int vocal2; /* if both, Vocal1 and Vocal2 are non-zero, Vocal1 gets*/ 75 int vocal2; /* if both, Vocal1 and Vocal2 are non-zero, Vocal1 gets*/
76 int melody; /* mixed into the left channel and */ 76 int melody; /* mixed into the left channel and */
77 /* Vocal2 into the right channel at 100% each. */ 77 /* Vocal2 into the right channel at 100% each. */
78 /* if Melody is non-zero, the melody channel gets mixed*/ 78 /* if Melody is non-zero, the melody channel gets mixed*/
79} audio_karaoke_t; /* into left and right */ 79} audio_karaoke_t; /* into left and right */
80 80
81 81
diff --git a/include/linux/dvb/ca.h b/include/linux/dvb/ca.h
index 558af0cc7692..c18537f3e449 100644
--- a/include/linux/dvb/ca.h
+++ b/include/linux/dvb/ca.h
@@ -27,16 +27,16 @@
27/* slot interface types and info */ 27/* slot interface types and info */
28 28
29typedef struct ca_slot_info { 29typedef struct ca_slot_info {
30 int num; /* slot number */ 30 int num; /* slot number */
31 31
32 int type; /* CA interface this slot supports */ 32 int type; /* CA interface this slot supports */
33#define CA_CI 1 /* CI high level interface */ 33#define CA_CI 1 /* CI high level interface */
34#define CA_CI_LINK 2 /* CI link layer level interface */ 34#define CA_CI_LINK 2 /* CI link layer level interface */
35#define CA_CI_PHYS 4 /* CI physical layer level interface */ 35#define CA_CI_PHYS 4 /* CI physical layer level interface */
36#define CA_DESCR 8 /* built-in descrambler */ 36#define CA_DESCR 8 /* built-in descrambler */
37#define CA_SC 128 /* simple smart card interface */ 37#define CA_SC 128 /* simple smart card interface */
38 38
39 unsigned int flags; 39 unsigned int flags;
40#define CA_CI_MODULE_PRESENT 1 /* module (or card) inserted */ 40#define CA_CI_MODULE_PRESENT 1 /* module (or card) inserted */
41#define CA_CI_MODULE_READY 2 41#define CA_CI_MODULE_READY 2
42} ca_slot_info_t; 42} ca_slot_info_t;
@@ -45,37 +45,37 @@ typedef struct ca_slot_info {
45/* descrambler types and info */ 45/* descrambler types and info */
46 46
47typedef struct ca_descr_info { 47typedef struct ca_descr_info {
48 unsigned int num; /* number of available descramblers (keys) */ 48 unsigned int num; /* number of available descramblers (keys) */
49 unsigned int type; /* type of supported scrambling system */ 49 unsigned int type; /* type of supported scrambling system */
50#define CA_ECD 1 50#define CA_ECD 1
51#define CA_NDS 2 51#define CA_NDS 2
52#define CA_DSS 4 52#define CA_DSS 4
53} ca_descr_info_t; 53} ca_descr_info_t;
54 54
55typedef struct ca_caps { 55typedef struct ca_caps {
56 unsigned int slot_num; /* total number of CA card and module slots */ 56 unsigned int slot_num; /* total number of CA card and module slots */
57 unsigned int slot_type; /* OR of all supported types */ 57 unsigned int slot_type; /* OR of all supported types */
58 unsigned int descr_num; /* total number of descrambler slots (keys) */ 58 unsigned int descr_num; /* total number of descrambler slots (keys) */
59 unsigned int descr_type; /* OR of all supported types */ 59 unsigned int descr_type; /* OR of all supported types */
60} ca_caps_t; 60} ca_caps_t;
61 61
62/* a message to/from a CI-CAM */ 62/* a message to/from a CI-CAM */
63typedef struct ca_msg { 63typedef struct ca_msg {
64 unsigned int index; 64 unsigned int index;
65 unsigned int type; 65 unsigned int type;
66 unsigned int length; 66 unsigned int length;
67 unsigned char msg[256]; 67 unsigned char msg[256];
68} ca_msg_t; 68} ca_msg_t;
69 69
70typedef struct ca_descr { 70typedef struct ca_descr {
71 unsigned int index; 71 unsigned int index;
72 unsigned int parity; /* 0 == even, 1 == odd */ 72 unsigned int parity; /* 0 == even, 1 == odd */
73 unsigned char cw[8]; 73 unsigned char cw[8];
74} ca_descr_t; 74} ca_descr_t;
75 75
76typedef struct ca_pid { 76typedef struct ca_pid {
77 unsigned int pid; 77 unsigned int pid;
78 int index; /* -1 == disable*/ 78 int index; /* -1 == disable*/
79} ca_pid_t; 79} ca_pid_t;
80 80
81#define CA_RESET _IO('o', 128) 81#define CA_RESET _IO('o', 128)
diff --git a/include/linux/dvb/dmx.h b/include/linux/dvb/dmx.h
index ce3f829da82c..2787b8a22ff1 100644
--- a/include/linux/dvb/dmx.h
+++ b/include/linux/dvb/dmx.h
@@ -1,4 +1,4 @@
1/* 1/*
2 * dmx.h 2 * dmx.h
3 * 3 *
4 * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de> 4 * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
@@ -38,10 +38,10 @@ typedef enum
38{ 38{
39 DMX_OUT_DECODER, /* Streaming directly to decoder. */ 39 DMX_OUT_DECODER, /* Streaming directly to decoder. */
40 DMX_OUT_TAP, /* Output going to a memory buffer */ 40 DMX_OUT_TAP, /* Output going to a memory buffer */
41 /* (to be retrieved via the read command).*/ 41 /* (to be retrieved via the read command).*/
42 DMX_OUT_TS_TAP /* Output multiplexed into a new TS */ 42 DMX_OUT_TS_TAP /* Output multiplexed into a new TS */
43 /* (to be retrieved by reading from the */ 43 /* (to be retrieved by reading from the */
44 /* logical DVR device). */ 44 /* logical DVR device). */
45} dmx_output_t; 45} dmx_output_t;
46 46
47 47
@@ -54,25 +54,25 @@ typedef enum
54 54
55typedef enum 55typedef enum
56{ 56{
57 DMX_PES_AUDIO0, 57 DMX_PES_AUDIO0,
58 DMX_PES_VIDEO0, 58 DMX_PES_VIDEO0,
59 DMX_PES_TELETEXT0, 59 DMX_PES_TELETEXT0,
60 DMX_PES_SUBTITLE0, 60 DMX_PES_SUBTITLE0,
61 DMX_PES_PCR0, 61 DMX_PES_PCR0,
62 62
63 DMX_PES_AUDIO1, 63 DMX_PES_AUDIO1,
64 DMX_PES_VIDEO1, 64 DMX_PES_VIDEO1,
65 DMX_PES_TELETEXT1, 65 DMX_PES_TELETEXT1,
66 DMX_PES_SUBTITLE1, 66 DMX_PES_SUBTITLE1,
67 DMX_PES_PCR1, 67 DMX_PES_PCR1,
68 68
69 DMX_PES_AUDIO2, 69 DMX_PES_AUDIO2,
70 DMX_PES_VIDEO2, 70 DMX_PES_VIDEO2,
71 DMX_PES_TELETEXT2, 71 DMX_PES_TELETEXT2,
72 DMX_PES_SUBTITLE2, 72 DMX_PES_SUBTITLE2,
73 DMX_PES_PCR2, 73 DMX_PES_PCR2,
74 74
75 DMX_PES_AUDIO3, 75 DMX_PES_AUDIO3,
76 DMX_PES_VIDEO3, 76 DMX_PES_VIDEO3,
77 DMX_PES_TELETEXT3, 77 DMX_PES_TELETEXT3,
78 DMX_PES_SUBTITLE3, 78 DMX_PES_SUBTITLE3,
@@ -90,8 +90,8 @@ typedef enum
90 90
91typedef enum 91typedef enum
92{ 92{
93 DMX_SCRAMBLING_EV, 93 DMX_SCRAMBLING_EV,
94 DMX_FRONTEND_EV 94 DMX_FRONTEND_EV
95} dmx_event_t; 95} dmx_event_t;
96 96
97 97
diff --git a/include/linux/dvb/osd.h b/include/linux/dvb/osd.h
index 0e1973d54a6b..880e68435832 100644
--- a/include/linux/dvb/osd.h
+++ b/include/linux/dvb/osd.h
@@ -98,43 +98,43 @@ typedef enum {
98} OSD_Command; 98} OSD_Command;
99 99
100typedef struct osd_cmd_s { 100typedef struct osd_cmd_s {
101 OSD_Command cmd; 101 OSD_Command cmd;
102 int x0; 102 int x0;
103 int y0; 103 int y0;
104 int x1; 104 int x1;
105 int y1; 105 int y1;
106 int color; 106 int color;
107 void __user *data; 107 void __user *data;
108} osd_cmd_t; 108} osd_cmd_t;
109 109
110/* OSD_OpenRaw: set 'color' to desired window type */ 110/* OSD_OpenRaw: set 'color' to desired window type */
111typedef enum { 111typedef enum {
112 OSD_BITMAP1, /* 1 bit bitmap */ 112 OSD_BITMAP1, /* 1 bit bitmap */
113 OSD_BITMAP2, /* 2 bit bitmap */ 113 OSD_BITMAP2, /* 2 bit bitmap */
114 OSD_BITMAP4, /* 4 bit bitmap */ 114 OSD_BITMAP4, /* 4 bit bitmap */
115 OSD_BITMAP8, /* 8 bit bitmap */ 115 OSD_BITMAP8, /* 8 bit bitmap */
116 OSD_BITMAP1HR, /* 1 Bit bitmap half resolution */ 116 OSD_BITMAP1HR, /* 1 Bit bitmap half resolution */
117 OSD_BITMAP2HR, /* 2 bit bitmap half resolution */ 117 OSD_BITMAP2HR, /* 2 bit bitmap half resolution */
118 OSD_BITMAP4HR, /* 4 bit bitmap half resolution */ 118 OSD_BITMAP4HR, /* 4 bit bitmap half resolution */
119 OSD_BITMAP8HR, /* 8 bit bitmap half resolution */ 119 OSD_BITMAP8HR, /* 8 bit bitmap half resolution */
120 OSD_YCRCB422, /* 4:2:2 YCRCB Graphic Display */ 120 OSD_YCRCB422, /* 4:2:2 YCRCB Graphic Display */
121 OSD_YCRCB444, /* 4:4:4 YCRCB Graphic Display */ 121 OSD_YCRCB444, /* 4:4:4 YCRCB Graphic Display */
122 OSD_YCRCB444HR, /* 4:4:4 YCRCB graphic half resolution */ 122 OSD_YCRCB444HR, /* 4:4:4 YCRCB graphic half resolution */
123 OSD_VIDEOTSIZE, /* True Size Normal MPEG Video Display */ 123 OSD_VIDEOTSIZE, /* True Size Normal MPEG Video Display */
124 OSD_VIDEOHSIZE, /* MPEG Video Display Half Resolution */ 124 OSD_VIDEOHSIZE, /* MPEG Video Display Half Resolution */
125 OSD_VIDEOQSIZE, /* MPEG Video Display Quarter Resolution */ 125 OSD_VIDEOQSIZE, /* MPEG Video Display Quarter Resolution */
126 OSD_VIDEODSIZE, /* MPEG Video Display Double Resolution */ 126 OSD_VIDEODSIZE, /* MPEG Video Display Double Resolution */
127 OSD_VIDEOTHSIZE, /* True Size MPEG Video Display Half Resolution */ 127 OSD_VIDEOTHSIZE, /* True Size MPEG Video Display Half Resolution */
128 OSD_VIDEOTQSIZE, /* True Size MPEG Video Display Quarter Resolution*/ 128 OSD_VIDEOTQSIZE, /* True Size MPEG Video Display Quarter Resolution*/
129 OSD_VIDEOTDSIZE, /* True Size MPEG Video Display Double Resolution */ 129 OSD_VIDEOTDSIZE, /* True Size MPEG Video Display Double Resolution */
130 OSD_VIDEONSIZE, /* Full Size MPEG Video Display */ 130 OSD_VIDEONSIZE, /* Full Size MPEG Video Display */
131 OSD_CURSOR /* Cursor */ 131 OSD_CURSOR /* Cursor */
132} osd_raw_window_t; 132} osd_raw_window_t;
133 133
134typedef struct osd_cap_s { 134typedef struct osd_cap_s {
135 int cmd; 135 int cmd;
136#define OSD_CAP_MEMSIZE 1 /* memory size */ 136#define OSD_CAP_MEMSIZE 1 /* memory size */
137 long val; 137 long val;
138} osd_cap_t; 138} osd_cap_t;
139 139
140 140
diff --git a/include/linux/dvb/video.h b/include/linux/dvb/video.h
index 941045e9ab89..b1999bfeaa56 100644
--- a/include/linux/dvb/video.h
+++ b/include/linux/dvb/video.h
@@ -36,7 +36,7 @@
36 36
37typedef enum { 37typedef enum {
38 VIDEO_FORMAT_4_3, /* Select 4:3 format */ 38 VIDEO_FORMAT_4_3, /* Select 4:3 format */
39 VIDEO_FORMAT_16_9, /* Select 16:9 format. */ 39 VIDEO_FORMAT_16_9, /* Select 16:9 format. */
40 VIDEO_FORMAT_221_1 /* 2.21:1 */ 40 VIDEO_FORMAT_221_1 /* 2.21:1 */
41} video_format_t; 41} video_format_t;
42 42
@@ -54,7 +54,7 @@ typedef enum {
54 54
55 55
56typedef enum { 56typedef enum {
57 VIDEO_PAN_SCAN, /* use pan and scan format */ 57 VIDEO_PAN_SCAN, /* use pan and scan format */
58 VIDEO_LETTER_BOX, /* use letterbox format */ 58 VIDEO_LETTER_BOX, /* use letterbox format */
59 VIDEO_CENTER_CUT_OUT /* use center cut out format */ 59 VIDEO_CENTER_CUT_OUT /* use center cut out format */
60} video_displayformat_t; 60} video_displayformat_t;
@@ -66,7 +66,7 @@ typedef struct {
66} video_size_t; 66} video_size_t;
67 67
68typedef enum { 68typedef enum {
69 VIDEO_SOURCE_DEMUX, /* Select the demux as the main source */ 69 VIDEO_SOURCE_DEMUX, /* Select the demux as the main source */
70 VIDEO_SOURCE_MEMORY /* If this source is selected, the stream 70 VIDEO_SOURCE_MEMORY /* If this source is selected, the stream
71 comes from the user through the write 71 comes from the user through the write
72 system call */ 72 system call */
@@ -75,35 +75,35 @@ typedef enum {
75 75
76typedef enum { 76typedef enum {
77 VIDEO_STOPPED, /* Video is stopped */ 77 VIDEO_STOPPED, /* Video is stopped */
78 VIDEO_PLAYING, /* Video is currently playing */ 78 VIDEO_PLAYING, /* Video is currently playing */
79 VIDEO_FREEZED /* Video is freezed */ 79 VIDEO_FREEZED /* Video is freezed */
80} video_play_state_t; 80} video_play_state_t;
81 81
82 82
83struct video_event { 83struct video_event {
84 int32_t type; 84 int32_t type;
85#define VIDEO_EVENT_SIZE_CHANGED 1 85#define VIDEO_EVENT_SIZE_CHANGED 1
86#define VIDEO_EVENT_FRAME_RATE_CHANGED 2 86#define VIDEO_EVENT_FRAME_RATE_CHANGED 2
87 time_t timestamp; 87 time_t timestamp;
88 union { 88 union {
89 video_size_t size; 89 video_size_t size;
90 unsigned int frame_rate; /* in frames per 1000sec */ 90 unsigned int frame_rate; /* in frames per 1000sec */
91 } u; 91 } u;
92}; 92};
93 93
94 94
95struct video_status { 95struct video_status {
96 int video_blank; /* blank video on freeze? */ 96 int video_blank; /* blank video on freeze? */
97 video_play_state_t play_state; /* current state of playback */ 97 video_play_state_t play_state; /* current state of playback */
98 video_stream_source_t stream_source; /* current source (demux/memory) */ 98 video_stream_source_t stream_source; /* current source (demux/memory) */
99 video_format_t video_format; /* current aspect ratio of stream*/ 99 video_format_t video_format; /* current aspect ratio of stream*/
100 video_displayformat_t display_format;/* selected cropping mode */ 100 video_displayformat_t display_format;/* selected cropping mode */
101}; 101};
102 102
103 103
104struct video_still_picture { 104struct video_still_picture {
105 char __user *iFrame; /* pointer to a single iframe in memory */ 105 char __user *iFrame; /* pointer to a single iframe in memory */
106 int32_t size; 106 int32_t size;
107}; 107};
108 108
109 109
@@ -111,19 +111,19 @@ typedef
111struct video_highlight { 111struct video_highlight {
112 int active; /* 1=show highlight, 0=hide highlight */ 112 int active; /* 1=show highlight, 0=hide highlight */
113 uint8_t contrast1; /* 7- 4 Pattern pixel contrast */ 113 uint8_t contrast1; /* 7- 4 Pattern pixel contrast */
114 /* 3- 0 Background pixel contrast */ 114 /* 3- 0 Background pixel contrast */
115 uint8_t contrast2; /* 7- 4 Emphasis pixel-2 contrast */ 115 uint8_t contrast2; /* 7- 4 Emphasis pixel-2 contrast */
116 /* 3- 0 Emphasis pixel-1 contrast */ 116 /* 3- 0 Emphasis pixel-1 contrast */
117 uint8_t color1; /* 7- 4 Pattern pixel color */ 117 uint8_t color1; /* 7- 4 Pattern pixel color */
118 /* 3- 0 Background pixel color */ 118 /* 3- 0 Background pixel color */
119 uint8_t color2; /* 7- 4 Emphasis pixel-2 color */ 119 uint8_t color2; /* 7- 4 Emphasis pixel-2 color */
120 /* 3- 0 Emphasis pixel-1 color */ 120 /* 3- 0 Emphasis pixel-1 color */
121 uint32_t ypos; /* 23-22 auto action mode */ 121 uint32_t ypos; /* 23-22 auto action mode */
122 /* 21-12 start y */ 122 /* 21-12 start y */
123 /* 9- 0 end y */ 123 /* 9- 0 end y */
124 uint32_t xpos; /* 23-22 button color number */ 124 uint32_t xpos; /* 23-22 button color number */
125 /* 21-12 start x */ 125 /* 21-12 start x */
126 /* 9- 0 end x */ 126 /* 9- 0 end x */
127} video_highlight_t; 127} video_highlight_t;
128 128
129 129
diff --git a/include/linux/fb.h b/include/linux/fb.h
index 04a58f33ec53..a973be2cfe61 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -617,6 +617,12 @@ struct fb_ops {
617 617
618 /* perform fb specific mmap */ 618 /* perform fb specific mmap */
619 int (*fb_mmap)(struct fb_info *info, struct file *file, struct vm_area_struct *vma); 619 int (*fb_mmap)(struct fb_info *info, struct file *file, struct vm_area_struct *vma);
620
621 /* save current hardware state */
622 void (*fb_save_state)(struct fb_info *info);
623
624 /* restore saved state */
625 void (*fb_restore_state)(struct fb_info *info);
620}; 626};
621 627
622#ifdef CONFIG_FB_TILEBLITTING 628#ifdef CONFIG_FB_TILEBLITTING
@@ -726,6 +732,18 @@ struct fb_tile_ops {
726 from userspace */ 732 from userspace */
727#define FBINFO_MISC_TILEBLITTING 0x20000 /* use tile blitting */ 733#define FBINFO_MISC_TILEBLITTING 0x20000 /* use tile blitting */
728 734
735/* A driver may set this flag to indicate that it does want a set_par to be
736 * called every time when fbcon_switch is executed. The advantage is that with
737 * this flag set you can really be shure that set_par is always called before
738 * any of the functions dependant on the correct hardware state or altering
739 * that state, even if you are using some broken X releases. The disadvantage
740 * is that it introduces unwanted delays to every console switch if set_par
741 * is slow. It is a good idea to try this flag in the drivers initialization
742 * code whenever there is a bug report related to switching between X and the
743 * framebuffer console.
744 */
745#define FBINFO_MISC_ALWAYS_SETPAR 0x40000
746
729struct fb_info { 747struct fb_info {
730 int node; 748 int node;
731 int flags; 749 int flags;
@@ -817,6 +835,18 @@ struct fb_info {
817 835
818#endif 836#endif
819 837
838#if defined (__BIG_ENDIAN)
839#define FB_LEFT_POS(bpp) (32 - bpp)
840#define FB_SHIFT_HIGH(val, bits) ((val) >> (bits))
841#define FB_SHIFT_LOW(val, bits) ((val) << (bits))
842#define FB_BIT_NR(b) (7 - (b))
843#else
844#define FB_LEFT_POS(bpp) (0)
845#define FB_SHIFT_HIGH(val, bits) ((val) << (bits))
846#define FB_SHIFT_LOW(val, bits) ((val) >> (bits))
847#define FB_BIT_NR(b) (b)
848#endif
849
820 /* 850 /*
821 * `Generic' versions of the frame buffer device operations 851 * `Generic' versions of the frame buffer device operations
822 */ 852 */
diff --git a/include/linux/file.h b/include/linux/file.h
index d3b1a15d5f21..418b6101b59a 100644
--- a/include/linux/file.h
+++ b/include/linux/file.h
@@ -33,13 +33,13 @@ struct fdtable {
33 * Open file table structure 33 * Open file table structure
34 */ 34 */
35struct files_struct { 35struct files_struct {
36 atomic_t count; 36 atomic_t count;
37 spinlock_t file_lock; /* Protects all the below members. Nests inside tsk->alloc_lock */
38 struct fdtable *fdt; 37 struct fdtable *fdt;
39 struct fdtable fdtab; 38 struct fdtable fdtab;
40 fd_set close_on_exec_init; 39 fd_set close_on_exec_init;
41 fd_set open_fds_init; 40 fd_set open_fds_init;
42 struct file * fd_array[NR_OPEN_DEFAULT]; 41 struct file * fd_array[NR_OPEN_DEFAULT];
42 spinlock_t file_lock; /* Protects concurrent writers. Nests inside tsk->alloc_lock */
43}; 43};
44 44
45#define files_fdtable(files) (rcu_dereference((files)->fdt)) 45#define files_fdtable(files) (rcu_dereference((files)->fdt))
diff --git a/include/linux/font.h b/include/linux/font.h
index 8aac48c37f3d..53b129f07f6f 100644
--- a/include/linux/font.h
+++ b/include/linux/font.h
@@ -31,7 +31,6 @@ struct font_desc {
31#define SUN12x22_IDX 7 31#define SUN12x22_IDX 7
32#define ACORN8x8_IDX 8 32#define ACORN8x8_IDX 8
33#define MINI4x6_IDX 9 33#define MINI4x6_IDX 9
34#define RL_IDX 10
35 34
36extern const struct font_desc font_vga_8x8, 35extern const struct font_desc font_vga_8x8,
37 font_vga_8x16, 36 font_vga_8x16,
@@ -42,7 +41,6 @@ extern const struct font_desc font_vga_8x8,
42 font_sun_8x16, 41 font_sun_8x16,
43 font_sun_12x22, 42 font_sun_12x22,
44 font_acorn_8x8, 43 font_acorn_8x8,
45 font_rl,
46 font_mini_4x6; 44 font_mini_4x6;
47 45
48/* Find a font with a specific name */ 46/* Find a font with a specific name */
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 114d5d59f695..934aa9bda481 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -4,7 +4,7 @@
4 * Definitions for any platform device related flags or structures for 4 * Definitions for any platform device related flags or structures for
5 * Freescale processor devices 5 * Freescale processor devices
6 * 6 *
7 * Maintainer: Kumar Gala (kumar.gala@freescale.com) 7 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
8 * 8 *
9 * Copyright 2004 Freescale Semiconductor, Inc 9 * Copyright 2004 Freescale Semiconductor, Inc
10 * 10 *
diff --git a/include/linux/genhd.h b/include/linux/genhd.h
index 8eeaa53a68c9..eef5ccdcd731 100644
--- a/include/linux/genhd.h
+++ b/include/linux/genhd.h
@@ -78,7 +78,7 @@ struct hd_struct {
78 sector_t start_sect; 78 sector_t start_sect;
79 sector_t nr_sects; 79 sector_t nr_sects;
80 struct kobject kobj; 80 struct kobject kobj;
81 unsigned ios[2], sectors[2]; 81 unsigned ios[2], sectors[2]; /* READs and WRITEs */
82 int policy, partno; 82 int policy, partno;
83}; 83};
84 84
@@ -89,7 +89,7 @@ struct hd_struct {
89#define GENHD_FL_SUPPRESS_PARTITION_INFO 32 89#define GENHD_FL_SUPPRESS_PARTITION_INFO 32
90 90
91struct disk_stats { 91struct disk_stats {
92 unsigned sectors[2]; 92 unsigned sectors[2]; /* READs and WRITEs */
93 unsigned ios[2]; 93 unsigned ios[2];
94 unsigned merges[2]; 94 unsigned merges[2];
95 unsigned ticks[2]; 95 unsigned ticks[2];
diff --git a/include/linux/gfp.h b/include/linux/gfp.h
index c3779432a723..8b2eab90abb6 100644
--- a/include/linux/gfp.h
+++ b/include/linux/gfp.h
@@ -11,9 +11,16 @@ struct vm_area_struct;
11/* 11/*
12 * GFP bitmasks.. 12 * GFP bitmasks..
13 */ 13 */
14/* Zone modifiers in GFP_ZONEMASK (see linux/mmzone.h - low two bits) */ 14/* Zone modifiers in GFP_ZONEMASK (see linux/mmzone.h - low three bits) */
15#define __GFP_DMA ((__force gfp_t)0x01u) 15#define __GFP_DMA ((__force gfp_t)0x01u)
16#define __GFP_HIGHMEM ((__force gfp_t)0x02u) 16#define __GFP_HIGHMEM ((__force gfp_t)0x02u)
17#ifdef CONFIG_DMA_IS_DMA32
18#define __GFP_DMA32 ((__force gfp_t)0x01) /* ZONE_DMA is ZONE_DMA32 */
19#elif BITS_PER_LONG < 64
20#define __GFP_DMA32 ((__force gfp_t)0x00) /* ZONE_NORMAL is ZONE_DMA32 */
21#else
22#define __GFP_DMA32 ((__force gfp_t)0x04) /* Has own ZONE_DMA32 */
23#endif
17 24
18/* 25/*
19 * Action modifiers - doesn't change the zoning 26 * Action modifiers - doesn't change the zoning
@@ -39,8 +46,7 @@ struct vm_area_struct;
39#define __GFP_COMP ((__force gfp_t)0x4000u)/* Add compound page metadata */ 46#define __GFP_COMP ((__force gfp_t)0x4000u)/* Add compound page metadata */
40#define __GFP_ZERO ((__force gfp_t)0x8000u)/* Return zeroed page on success */ 47#define __GFP_ZERO ((__force gfp_t)0x8000u)/* Return zeroed page on success */
41#define __GFP_NOMEMALLOC ((__force gfp_t)0x10000u) /* Don't use emergency reserves */ 48#define __GFP_NOMEMALLOC ((__force gfp_t)0x10000u) /* Don't use emergency reserves */
42#define __GFP_NORECLAIM ((__force gfp_t)0x20000u) /* No realy zone reclaim during allocation */ 49#define __GFP_HARDWALL ((__force gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */
43#define __GFP_HARDWALL ((__force gfp_t)0x40000u) /* Enforce hardwall cpuset memory allocs */
44 50
45#define __GFP_BITS_SHIFT 20 /* Room for 20 __GFP_FOO bits */ 51#define __GFP_BITS_SHIFT 20 /* Room for 20 __GFP_FOO bits */
46#define __GFP_BITS_MASK ((__force gfp_t)((1 << __GFP_BITS_SHIFT) - 1)) 52#define __GFP_BITS_MASK ((__force gfp_t)((1 << __GFP_BITS_SHIFT) - 1))
@@ -49,7 +55,7 @@ struct vm_area_struct;
49#define GFP_LEVEL_MASK (__GFP_WAIT|__GFP_HIGH|__GFP_IO|__GFP_FS| \ 55#define GFP_LEVEL_MASK (__GFP_WAIT|__GFP_HIGH|__GFP_IO|__GFP_FS| \
50 __GFP_COLD|__GFP_NOWARN|__GFP_REPEAT| \ 56 __GFP_COLD|__GFP_NOWARN|__GFP_REPEAT| \
51 __GFP_NOFAIL|__GFP_NORETRY|__GFP_NO_GROW|__GFP_COMP| \ 57 __GFP_NOFAIL|__GFP_NORETRY|__GFP_NO_GROW|__GFP_COMP| \
52 __GFP_NOMEMALLOC|__GFP_NORECLAIM|__GFP_HARDWALL) 58 __GFP_NOMEMALLOC|__GFP_HARDWALL)
53 59
54#define GFP_ATOMIC (__GFP_HIGH) 60#define GFP_ATOMIC (__GFP_HIGH)
55#define GFP_NOIO (__GFP_WAIT) 61#define GFP_NOIO (__GFP_WAIT)
@@ -64,7 +70,16 @@ struct vm_area_struct;
64 70
65#define GFP_DMA __GFP_DMA 71#define GFP_DMA __GFP_DMA
66 72
67#define gfp_zone(mask) ((__force int)((mask) & (__force gfp_t)GFP_ZONEMASK)) 73/* 4GB DMA on some platforms */
74#define GFP_DMA32 __GFP_DMA32
75
76
77static inline int gfp_zone(gfp_t gfp)
78{
79 int zone = GFP_ZONEMASK & (__force int) gfp;
80 BUG_ON(zone >= GFP_ZONETYPES);
81 return zone;
82}
68 83
69/* 84/*
70 * There is only one page-allocator function, and two main namespaces to 85 * There is only one page-allocator function, and two main namespaces to
diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h
index 5912874ca83c..71d2b8a723b9 100644
--- a/include/linux/hardirq.h
+++ b/include/linux/hardirq.h
@@ -90,6 +90,8 @@ extern void synchronize_irq(unsigned int irq);
90#define nmi_enter() irq_enter() 90#define nmi_enter() irq_enter()
91#define nmi_exit() sub_preempt_count(HARDIRQ_OFFSET) 91#define nmi_exit() sub_preempt_count(HARDIRQ_OFFSET)
92 92
93struct task_struct;
94
93#ifndef CONFIG_VIRT_CPU_ACCOUNTING 95#ifndef CONFIG_VIRT_CPU_ACCOUNTING
94static inline void account_user_vtime(struct task_struct *tsk) 96static inline void account_user_vtime(struct task_struct *tsk)
95{ 97{
diff --git a/include/linux/hdreg.h b/include/linux/hdreg.h
index b5d660089de4..2b54eac738ea 100644
--- a/include/linux/hdreg.h
+++ b/include/linux/hdreg.h
@@ -80,10 +80,12 @@
80/* 80/*
81 * Define standard taskfile in/out register 81 * Define standard taskfile in/out register
82 */ 82 */
83#define IDE_TASKFILE_STD_OUT_FLAGS 0xFE
84#define IDE_TASKFILE_STD_IN_FLAGS 0xFE 83#define IDE_TASKFILE_STD_IN_FLAGS 0xFE
85#define IDE_HOB_STD_OUT_FLAGS 0x3C
86#define IDE_HOB_STD_IN_FLAGS 0x3C 84#define IDE_HOB_STD_IN_FLAGS 0x3C
85#ifndef __KERNEL__
86#define IDE_TASKFILE_STD_OUT_FLAGS 0xFE
87#define IDE_HOB_STD_OUT_FLAGS 0x3C
88#endif
87 89
88typedef unsigned char task_ioreg_t; 90typedef unsigned char task_ioreg_t;
89typedef unsigned long sata_ioreg_t; 91typedef unsigned long sata_ioreg_t;
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 0cea162b08c0..1056717ee501 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -102,8 +102,8 @@ static inline unsigned long hugetlb_total_pages(void)
102#define hugetlb_fault(mm, vma, addr, write) ({ BUG(); 0; }) 102#define hugetlb_fault(mm, vma, addr, write) ({ BUG(); 0; })
103 103
104#ifndef HPAGE_MASK 104#ifndef HPAGE_MASK
105#define HPAGE_MASK 0 /* Keep the compiler happy */ 105#define HPAGE_MASK PAGE_MASK /* Keep the compiler happy */
106#define HPAGE_SIZE 0 106#define HPAGE_SIZE PAGE_SIZE
107#endif 107#endif
108 108
109#endif /* !CONFIG_HUGETLB_PAGE */ 109#endif /* !CONFIG_HUGETLB_PAGE */
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 74abaecdb572..006c81ef4d50 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -107,6 +107,8 @@
107#define I2C_DRIVERID_CX25840 71 /* cx2584x video encoder */ 107#define I2C_DRIVERID_CX25840 71 /* cx2584x video encoder */
108#define I2C_DRIVERID_SAA7127 72 /* saa7124 video encoder */ 108#define I2C_DRIVERID_SAA7127 72 /* saa7124 video encoder */
109#define I2C_DRIVERID_SAA711X 73 /* saa711x video encoders */ 109#define I2C_DRIVERID_SAA711X 73 /* saa711x video encoders */
110#define I2C_DRIVERID_AKITAIOEXP 74 /* IO Expander on Sharp SL-C1000 */
111#define I2C_DRIVERID_INFRARED 75 /* I2C InfraRed on Video boards */
110 112
111#define I2C_DRIVERID_EXP0 0xF0 /* experimental use id's */ 113#define I2C_DRIVERID_EXP0 0xF0 /* experimental use id's */
112#define I2C_DRIVERID_EXP1 0xF1 114#define I2C_DRIVERID_EXP1 0xF1
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 77ae55d4c13c..7b6a6a58e465 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -23,17 +23,6 @@
23#include <asm/io.h> 23#include <asm/io.h>
24#include <asm/semaphore.h> 24#include <asm/semaphore.h>
25 25
26/*
27 * This is the multiple IDE interface driver, as evolved from hd.c.
28 * It supports up to four IDE interfaces, on one or more IRQs (usually 14 & 15).
29 * There can be up to two drives per interface, as per the ATA-2 spec.
30 *
31 * Primary i/f: ide0: major=3; (hda) minor=0; (hdb) minor=64
32 * Secondary i/f: ide1: major=22; (hdc or hd1a) minor=0; (hdd or hd1b) minor=64
33 * Tertiary i/f: ide2: major=33; (hde) minor=0; (hdf) minor=64
34 * Quaternary i/f: ide3: major=34; (hdg) minor=0; (hdh) minor=64
35 */
36
37/****************************************************************************** 26/******************************************************************************
38 * IDE driver configuration options (play with these as desired): 27 * IDE driver configuration options (play with these as desired):
39 * 28 *
@@ -193,11 +182,6 @@ typedef unsigned char byte; /* used everywhere */
193#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */ 182#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
194#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */ 183#define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
195 184
196#define HOST(hwif,chipset) \
197{ \
198 return ((hwif)->chipset == chipset) ? 1 : 0; \
199}
200
201/* 185/*
202 * Check for an interrupt and acknowledge the interrupt status 186 * Check for an interrupt and acknowledge the interrupt status
203 */ 187 */
@@ -391,45 +375,6 @@ typedef union {
391} ata_nsector_t, ata_data_t, atapi_bcount_t, ata_index_t; 375} ata_nsector_t, ata_data_t, atapi_bcount_t, ata_index_t;
392 376
393/* 377/*
394 * ATA-IDE Error Register
395 *
396 * mark : Bad address mark
397 * tzero : Couldn't find track 0
398 * abrt : Aborted Command
399 * mcr : Media Change Request
400 * id : ID field not found
401 * mce : Media Change Event
402 * ecc : Uncorrectable ECC error
403 * bdd : dual meaing
404 */
405typedef union {
406 unsigned all :8;
407 struct {
408#if defined(__LITTLE_ENDIAN_BITFIELD)
409 unsigned mark :1;
410 unsigned tzero :1;
411 unsigned abrt :1;
412 unsigned mcr :1;
413 unsigned id :1;
414 unsigned mce :1;
415 unsigned ecc :1;
416 unsigned bdd :1;
417#elif defined(__BIG_ENDIAN_BITFIELD)
418 unsigned bdd :1;
419 unsigned ecc :1;
420 unsigned mce :1;
421 unsigned id :1;
422 unsigned mcr :1;
423 unsigned abrt :1;
424 unsigned tzero :1;
425 unsigned mark :1;
426#else
427#error "Please fix <asm/byteorder.h>"
428#endif
429 } b;
430} ata_error_t;
431
432/*
433 * ATA-IDE Select Register, aka Device-Head 378 * ATA-IDE Select Register, aka Device-Head
434 * 379 *
435 * head : always zeros here 380 * head : always zeros here
@@ -504,39 +449,6 @@ typedef union {
504} ata_status_t, atapi_status_t; 449} ata_status_t, atapi_status_t;
505 450
506/* 451/*
507 * ATA-IDE Control Register
508 *
509 * bit0 : Should be set to zero
510 * nIEN : device INTRQ to host
511 * SRST : host soft reset bit
512 * bit3 : ATA-2 thingy, Should be set to 1
513 * reserved456 : Reserved
514 * HOB : 48-bit address ordering, High Ordered Bit
515 */
516typedef union {
517 unsigned all : 8;
518 struct {
519#if defined(__LITTLE_ENDIAN_BITFIELD)
520 unsigned bit0 : 1;
521 unsigned nIEN : 1;
522 unsigned SRST : 1;
523 unsigned bit3 : 1;
524 unsigned reserved456 : 3;
525 unsigned HOB : 1;
526#elif defined(__BIG_ENDIAN_BITFIELD)
527 unsigned HOB : 1;
528 unsigned reserved456 : 3;
529 unsigned bit3 : 1;
530 unsigned SRST : 1;
531 unsigned nIEN : 1;
532 unsigned bit0 : 1;
533#else
534#error "Please fix <asm/byteorder.h>"
535#endif
536 } b;
537} ata_control_t;
538
539/*
540 * ATAPI Feature Register 452 * ATAPI Feature Register
541 * 453 *
542 * dma : Using DMA or PIO 454 * dma : Using DMA or PIO
@@ -618,39 +530,6 @@ typedef union {
618} atapi_error_t; 530} atapi_error_t;
619 531
620/* 532/*
621 * ATAPI floppy Drive Select Register
622 *
623 * sam_lun : Logical unit number
624 * reserved3 : Reserved
625 * drv : The responding drive will be drive 0 (0) or drive 1 (1)
626 * one5 : Should be set to 1
627 * reserved6 : Reserved
628 * one7 : Should be set to 1
629 */
630typedef union {
631 unsigned all :8;
632 struct {
633#if defined(__LITTLE_ENDIAN_BITFIELD)
634 unsigned sam_lun :3;
635 unsigned reserved3 :1;
636 unsigned drv :1;
637 unsigned one5 :1;
638 unsigned reserved6 :1;
639 unsigned one7 :1;
640#elif defined(__BIG_ENDIAN_BITFIELD)
641 unsigned one7 :1;
642 unsigned reserved6 :1;
643 unsigned one5 :1;
644 unsigned drv :1;
645 unsigned reserved3 :1;
646 unsigned sam_lun :3;
647#else
648#error "Please fix <asm/byteorder.h>"
649#endif
650 } b;
651} atapi_select_t;
652
653/*
654 * Status returned from various ide_ functions 533 * Status returned from various ide_ functions
655 */ 534 */
656typedef enum { 535typedef enum {
@@ -1089,9 +968,11 @@ enum {
1089 968
1090/* 969/*
1091 * Subdrivers support. 970 * Subdrivers support.
971 *
972 * The gendriver.owner field should be set to the module owner of this driver.
973 * The gendriver.name field should be set to the name of this driver
1092 */ 974 */
1093typedef struct ide_driver_s { 975typedef struct ide_driver_s {
1094 struct module *owner;
1095 const char *version; 976 const char *version;
1096 u8 media; 977 u8 media;
1097 unsigned supports_dsc_overlap : 1; 978 unsigned supports_dsc_overlap : 1;
@@ -1099,10 +980,7 @@ typedef struct ide_driver_s {
1099 int (*end_request)(ide_drive_t *, int, int); 980 int (*end_request)(ide_drive_t *, int, int);
1100 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8); 981 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
1101 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq); 982 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
1102 int (*ioctl)(ide_drive_t *, struct inode *, struct file *, unsigned int, unsigned long);
1103 ide_proc_entry_t *proc; 983 ide_proc_entry_t *proc;
1104 void (*ata_prebuilder)(ide_drive_t *);
1105 void (*atapi_prebuilder)(ide_drive_t *);
1106 struct device_driver gen_driver; 984 struct device_driver gen_driver;
1107} ide_driver_t; 985} ide_driver_t;
1108 986
@@ -1199,37 +1077,11 @@ extern u64 ide_get_error_location(ide_drive_t *, char *);
1199 */ 1077 */
1200typedef enum { 1078typedef enum {
1201 ide_wait, /* insert rq at end of list, and wait for it */ 1079 ide_wait, /* insert rq at end of list, and wait for it */
1202 ide_next, /* insert rq immediately after current request */
1203 ide_preempt, /* insert rq in front of current request */ 1080 ide_preempt, /* insert rq in front of current request */
1204 ide_head_wait, /* insert rq in front of current request and wait for it */ 1081 ide_head_wait, /* insert rq in front of current request and wait for it */
1205 ide_end /* insert rq at end of list, but don't wait for it */ 1082 ide_end /* insert rq at end of list, but don't wait for it */
1206} ide_action_t; 1083} ide_action_t;
1207 1084
1208/*
1209 * This function issues a special IDE device request
1210 * onto the request queue.
1211 *
1212 * If action is ide_wait, then the rq is queued at the end of the
1213 * request queue, and the function sleeps until it has been processed.
1214 * This is for use when invoked from an ioctl handler.
1215 *
1216 * If action is ide_preempt, then the rq is queued at the head of
1217 * the request queue, displacing the currently-being-processed
1218 * request and this function returns immediately without waiting
1219 * for the new rq to be completed. This is VERY DANGEROUS, and is
1220 * intended for careful use by the ATAPI tape/cdrom driver code.
1221 *
1222 * If action is ide_next, then the rq is queued immediately after
1223 * the currently-being-processed-request (if any), and the function
1224 * returns without waiting for the new rq to be completed. As above,
1225 * This is VERY DANGEROUS, and is intended for careful use by the
1226 * ATAPI tape/cdrom driver code.
1227 *
1228 * If action is ide_end, then the rq is queued at the end of the
1229 * request queue, and the function returns immediately without waiting
1230 * for the new rq to be completed. This is again intended for careful
1231 * use by the ATAPI tape/cdrom driver code.
1232 */
1233extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t); 1085extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
1234 1086
1235/* 1087/*
@@ -1322,14 +1174,14 @@ extern int ide_spin_wait_hwgroup(ide_drive_t *);
1322extern void ide_timer_expiry(unsigned long); 1174extern void ide_timer_expiry(unsigned long);
1323extern irqreturn_t ide_intr(int irq, void *dev_id, struct pt_regs *regs); 1175extern irqreturn_t ide_intr(int irq, void *dev_id, struct pt_regs *regs);
1324extern void do_ide_request(request_queue_t *); 1176extern void do_ide_request(request_queue_t *);
1325extern void ide_init_subdrivers(void);
1326 1177
1327void ide_init_disk(struct gendisk *, ide_drive_t *); 1178void ide_init_disk(struct gendisk *, ide_drive_t *);
1328 1179
1329extern int ideprobe_init(void); 1180extern int ideprobe_init(void);
1330 1181
1331extern void ide_scan_pcibus(int scan_direction) __init; 1182extern void ide_scan_pcibus(int scan_direction) __init;
1332extern int ide_pci_register_driver(struct pci_driver *driver); 1183extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner);
1184#define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE)
1333extern void ide_pci_unregister_driver(struct pci_driver *driver); 1185extern void ide_pci_unregister_driver(struct pci_driver *driver);
1334void ide_pci_setup_ports(struct pci_dev *, struct ide_pci_device_s *, int, ata_index_t *); 1186void ide_pci_setup_ports(struct pci_dev *, struct ide_pci_device_s *, int, ata_index_t *);
1335extern void ide_setup_pci_noise (struct pci_dev *dev, struct ide_pci_device_s *d); 1187extern void ide_setup_pci_noise (struct pci_dev *dev, struct ide_pci_device_s *d);
@@ -1394,6 +1246,12 @@ void ide_init_sg_cmd(ide_drive_t *, struct request *);
1394#define GOOD_DMA_DRIVE 1 1246#define GOOD_DMA_DRIVE 1
1395 1247
1396#ifdef CONFIG_BLK_DEV_IDEDMA 1248#ifdef CONFIG_BLK_DEV_IDEDMA
1249struct drive_list_entry {
1250 const char *id_model;
1251 const char *id_firmware;
1252};
1253
1254int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1397int __ide_dma_bad_drive(ide_drive_t *); 1255int __ide_dma_bad_drive(ide_drive_t *);
1398int __ide_dma_good_drive(ide_drive_t *); 1256int __ide_dma_good_drive(ide_drive_t *);
1399int ide_use_dma(ide_drive_t *); 1257int ide_use_dma(ide_drive_t *);
diff --git a/include/linux/idr.h b/include/linux/idr.h
index 7fb3ff9c7b0e..d37c8d808b0f 100644
--- a/include/linux/idr.h
+++ b/include/linux/idr.h
@@ -8,6 +8,10 @@
8 * Small id to pointer translation service avoiding fixed sized 8 * Small id to pointer translation service avoiding fixed sized
9 * tables. 9 * tables.
10 */ 10 */
11
12#ifndef __IDR_H__
13#define __IDR_H__
14
11#include <linux/types.h> 15#include <linux/types.h>
12#include <linux/bitops.h> 16#include <linux/bitops.h>
13 17
@@ -77,3 +81,5 @@ int idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id);
77void idr_remove(struct idr *idp, int id); 81void idr_remove(struct idr *idp, int id);
78void idr_destroy(struct idr *idp); 82void idr_destroy(struct idr *idp);
79void idr_init(struct idr *idp); 83void idr_init(struct idr *idp);
84
85#endif /* __IDR_H__ */
diff --git a/include/linux/if_ether.h b/include/linux/if_ether.h
index d21c305c6c64..fe26d431de87 100644
--- a/include/linux/if_ether.h
+++ b/include/linux/if_ether.h
@@ -21,6 +21,8 @@
21#ifndef _LINUX_IF_ETHER_H 21#ifndef _LINUX_IF_ETHER_H
22#define _LINUX_IF_ETHER_H 22#define _LINUX_IF_ETHER_H
23 23
24#include <linux/types.h>
25
24/* 26/*
25 * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble 27 * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble
26 * and FCS/CRC (frame check sequence). 28 * and FCS/CRC (frame check sequence).
@@ -100,7 +102,7 @@
100struct ethhdr { 102struct ethhdr {
101 unsigned char h_dest[ETH_ALEN]; /* destination eth addr */ 103 unsigned char h_dest[ETH_ALEN]; /* destination eth addr */
102 unsigned char h_source[ETH_ALEN]; /* source ether addr */ 104 unsigned char h_source[ETH_ALEN]; /* source ether addr */
103 unsigned short h_proto; /* packet type ID field */ 105 __be16 h_proto; /* packet type ID field */
104} __attribute__((packed)); 106} __attribute__((packed));
105 107
106#ifdef __KERNEL__ 108#ifdef __KERNEL__
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index 68ab5f2ab9cd..dcfd2ecccb5d 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -51,7 +51,6 @@
51 .page_table_lock = SPIN_LOCK_UNLOCKED, \ 51 .page_table_lock = SPIN_LOCK_UNLOCKED, \
52 .mmlist = LIST_HEAD_INIT(name.mmlist), \ 52 .mmlist = LIST_HEAD_INIT(name.mmlist), \
53 .cpu_vm_mask = CPU_MASK_ALL, \ 53 .cpu_vm_mask = CPU_MASK_ALL, \
54 .default_kioctx = INIT_KIOCTX(name.default_kioctx, name), \
55} 54}
56 55
57#define INIT_SIGNALS(sig) { \ 56#define INIT_SIGNALS(sig) { \
diff --git a/include/linux/inotify.h b/include/linux/inotify.h
index ee5b239092ed..267c88b5f742 100644
--- a/include/linux/inotify.h
+++ b/include/linux/inotify.h
@@ -47,6 +47,8 @@ struct inotify_event {
47#define IN_MOVE (IN_MOVED_FROM | IN_MOVED_TO) /* moves */ 47#define IN_MOVE (IN_MOVED_FROM | IN_MOVED_TO) /* moves */
48 48
49/* special flags */ 49/* special flags */
50#define IN_ONLYDIR 0x01000000 /* only watch the path if it is a directory */
51#define IN_DONT_FOLLOW 0x02000000 /* don't follow a sym link */
50#define IN_MASK_ADD 0x20000000 /* add to the mask of an already existing watch */ 52#define IN_MASK_ADD 0x20000000 /* add to the mask of an already existing watch */
51#define IN_ISDIR 0x40000000 /* event occurred against dir */ 53#define IN_ISDIR 0x40000000 /* event occurred against dir */
52#define IN_ONESHOT 0x80000000 /* only send event once */ 54#define IN_ONESHOT 0x80000000 /* only send event once */
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 0a90205184b0..41f150a3d2dd 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -9,6 +9,7 @@
9#include <linux/preempt.h> 9#include <linux/preempt.h>
10#include <linux/cpumask.h> 10#include <linux/cpumask.h>
11#include <linux/hardirq.h> 11#include <linux/hardirq.h>
12#include <linux/sched.h>
12#include <asm/atomic.h> 13#include <asm/atomic.h>
13#include <asm/ptrace.h> 14#include <asm/ptrace.h>
14#include <asm/system.h> 15#include <asm/system.h>
diff --git a/include/linux/ipv6_route.h b/include/linux/ipv6_route.h
index e2f935038013..d7c41d1d706a 100644
--- a/include/linux/ipv6_route.h
+++ b/include/linux/ipv6_route.h
@@ -18,6 +18,7 @@
18 fallback, no routers on link */ 18 fallback, no routers on link */
19#define RTF_ADDRCONF 0x00040000 /* addrconf route - RA */ 19#define RTF_ADDRCONF 0x00040000 /* addrconf route - RA */
20#define RTF_PREFIX_RT 0x00080000 /* A prefix only route - RA */ 20#define RTF_PREFIX_RT 0x00080000 /* A prefix only route - RA */
21#define RTF_ANYCAST 0x00100000 /* Anycast */
21 22
22#define RTF_NONEXTHOP 0x00200000 /* route with no nexthop */ 23#define RTF_NONEXTHOP 0x00200000 /* route with no nexthop */
23#define RTF_EXPIRES 0x00400000 24#define RTF_EXPIRES 0x00400000
diff --git a/include/linux/irq.h b/include/linux/irq.h
index c516382fbec2..f04ba20712a2 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -10,7 +10,7 @@
10 */ 10 */
11 11
12#include <linux/config.h> 12#include <linux/config.h>
13#include <asm/smp.h> /* cpu_online_map */ 13#include <linux/smp.h>
14 14
15#if !defined(CONFIG_ARCH_S390) 15#if !defined(CONFIG_ARCH_S390)
16 16
diff --git a/include/linux/jbd.h b/include/linux/jbd.h
index aa56172c6fed..dcde7adfdce5 100644
--- a/include/linux/jbd.h
+++ b/include/linux/jbd.h
@@ -16,8 +16,6 @@
16#ifndef _LINUX_JBD_H 16#ifndef _LINUX_JBD_H
17#define _LINUX_JBD_H 17#define _LINUX_JBD_H
18 18
19#if defined(CONFIG_JBD) || defined(CONFIG_JBD_MODULE) || !defined(__KERNEL__)
20
21/* Allow this file to be included directly into e2fsprogs */ 19/* Allow this file to be included directly into e2fsprogs */
22#ifndef __KERNEL__ 20#ifndef __KERNEL__
23#include "jfs_compat.h" 21#include "jfs_compat.h"
@@ -1083,19 +1081,4 @@ extern int jbd_blocks_per_page(struct inode *inode);
1083 1081
1084#endif /* __KERNEL__ */ 1082#endif /* __KERNEL__ */
1085 1083
1086#endif /* CONFIG_JBD || CONFIG_JBD_MODULE || !__KERNEL__ */
1087
1088/*
1089 * Compatibility no-ops which allow the kernel to compile without CONFIG_JBD
1090 * go here.
1091 */
1092
1093#if defined(__KERNEL__) && !(defined(CONFIG_JBD) || defined(CONFIG_JBD_MODULE))
1094
1095#define J_ASSERT(expr) do {} while (0)
1096#define J_ASSERT_BH(bh, expr) do {} while (0)
1097#define buffer_jbd(bh) 0
1098#define journal_buffer_journal_lru(bh) 0
1099
1100#endif /* defined(__KERNEL__) && !defined(CONFIG_JBD) */
1101#endif /* _LINUX_JBD_H */ 1084#endif /* _LINUX_JBD_H */
diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h
index e373c4a9de53..c03f2dc933de 100644
--- a/include/linux/kprobes.h
+++ b/include/linux/kprobes.h
@@ -37,6 +37,7 @@
37#include <linux/spinlock.h> 37#include <linux/spinlock.h>
38#include <linux/rcupdate.h> 38#include <linux/rcupdate.h>
39 39
40#ifdef CONFIG_KPROBES
40#include <asm/kprobes.h> 41#include <asm/kprobes.h>
41 42
42/* kprobe_status settings */ 43/* kprobe_status settings */
@@ -147,7 +148,6 @@ struct kretprobe_instance {
147 struct task_struct *task; 148 struct task_struct *task;
148}; 149};
149 150
150#ifdef CONFIG_KPROBES
151extern spinlock_t kretprobe_lock; 151extern spinlock_t kretprobe_lock;
152extern int arch_prepare_kprobe(struct kprobe *p); 152extern int arch_prepare_kprobe(struct kprobe *p);
153extern void arch_copy_kprobe(struct kprobe *p); 153extern void arch_copy_kprobe(struct kprobe *p);
@@ -158,6 +158,7 @@ extern int arch_init_kprobes(void);
158extern void show_registers(struct pt_regs *regs); 158extern void show_registers(struct pt_regs *regs);
159extern kprobe_opcode_t *get_insn_slot(void); 159extern kprobe_opcode_t *get_insn_slot(void);
160extern void free_insn_slot(kprobe_opcode_t *slot); 160extern void free_insn_slot(kprobe_opcode_t *slot);
161extern void kprobes_inc_nmissed_count(struct kprobe *p);
161 162
162/* Get the kprobe at this addr (if any) - called with preemption disabled */ 163/* Get the kprobe at this addr (if any) - called with preemption disabled */
163struct kprobe *get_kprobe(void *addr); 164struct kprobe *get_kprobe(void *addr);
@@ -195,6 +196,11 @@ void add_rp_inst(struct kretprobe_instance *ri);
195void kprobe_flush_task(struct task_struct *tk); 196void kprobe_flush_task(struct task_struct *tk);
196void recycle_rp_inst(struct kretprobe_instance *ri); 197void recycle_rp_inst(struct kretprobe_instance *ri);
197#else /* CONFIG_KPROBES */ 198#else /* CONFIG_KPROBES */
199
200#define __kprobes /**/
201struct jprobe;
202struct kretprobe;
203
198static inline struct kprobe *kprobe_running(void) 204static inline struct kprobe *kprobe_running(void)
199{ 205{
200 return NULL; 206 return NULL;
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 6f0752219f64..41ea7dbc1755 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -29,6 +29,7 @@
29#include <linux/delay.h> 29#include <linux/delay.h>
30#include <linux/interrupt.h> 30#include <linux/interrupt.h>
31#include <linux/pci.h> 31#include <linux/pci.h>
32#include <linux/dma-mapping.h>
32#include <asm/io.h> 33#include <asm/io.h>
33#include <linux/ata.h> 34#include <linux/ata.h>
34#include <linux/workqueue.h> 35#include <linux/workqueue.h>
@@ -58,6 +59,8 @@
58#define VPRINTK(fmt, args...) 59#define VPRINTK(fmt, args...)
59#endif /* ATA_DEBUG */ 60#endif /* ATA_DEBUG */
60 61
62#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args)
63
61#ifdef ATA_NDEBUG 64#ifdef ATA_NDEBUG
62#define assert(expr) 65#define assert(expr)
63#else 66#else
@@ -118,6 +121,8 @@ enum {
118 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */ 121 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */
119 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once 122 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once
120 * proper HSM is in place. */ 123 * proper HSM is in place. */
124 ATA_FLAG_DEBUGMSG = (1 << 10),
125 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */
121 126
122 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */ 127 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */
123 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */ 128 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */
@@ -398,12 +403,13 @@ struct ata_port_operations {
398}; 403};
399 404
400struct ata_port_info { 405struct ata_port_info {
401 struct scsi_host_template *sht; 406 struct scsi_host_template *sht;
402 unsigned long host_flags; 407 unsigned long host_flags;
403 unsigned long pio_mask; 408 unsigned long pio_mask;
404 unsigned long mwdma_mask; 409 unsigned long mwdma_mask;
405 unsigned long udma_mask; 410 unsigned long udma_mask;
406 const struct ata_port_operations *port_ops; 411 const struct ata_port_operations *port_ops;
412 void *private_data;
407}; 413};
408 414
409struct ata_timing { 415struct ata_timing {
@@ -657,6 +663,17 @@ static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, uns
657 tf->device = ATA_DEVICE_OBS | ATA_DEV1; 663 tf->device = ATA_DEVICE_OBS | ATA_DEV1;
658} 664}
659 665
666static inline void ata_qc_reinit(struct ata_queued_cmd *qc)
667{
668 qc->__sg = NULL;
669 qc->flags = 0;
670 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
671 qc->nsect = 0;
672 qc->nbytes = qc->curbytes = 0;
673
674 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno);
675}
676
660 677
661/** 678/**
662 * ata_irq_on - Enable interrupts on a port. 679 * ata_irq_on - Enable interrupts on a port.
diff --git a/include/linux/list.h b/include/linux/list.h
index fbfca73355a3..8e3388284530 100644
--- a/include/linux/list.h
+++ b/include/linux/list.h
@@ -202,12 +202,15 @@ static inline void list_del_rcu(struct list_head *entry)
202 * 202 *
203 * The old entry will be replaced with the new entry atomically. 203 * The old entry will be replaced with the new entry atomically.
204 */ 204 */
205static inline void list_replace_rcu(struct list_head *old, struct list_head *new){ 205static inline void list_replace_rcu(struct list_head *old,
206 struct list_head *new)
207{
206 new->next = old->next; 208 new->next = old->next;
207 new->prev = old->prev; 209 new->prev = old->prev;
208 smp_wmb(); 210 smp_wmb();
209 new->next->prev = new; 211 new->next->prev = new;
210 new->prev->next = new; 212 new->prev->next = new;
213 old->prev = LIST_POISON2;
211} 214}
212 215
213/** 216/**
@@ -578,6 +581,27 @@ static inline void hlist_del_init(struct hlist_node *n)
578 } 581 }
579} 582}
580 583
584/*
585 * hlist_replace_rcu - replace old entry by new one
586 * @old : the element to be replaced
587 * @new : the new element to insert
588 *
589 * The old entry will be replaced with the new entry atomically.
590 */
591static inline void hlist_replace_rcu(struct hlist_node *old,
592 struct hlist_node *new)
593{
594 struct hlist_node *next = old->next;
595
596 new->next = next;
597 new->pprev = old->pprev;
598 smp_wmb();
599 if (next)
600 new->next->pprev = &new->next;
601 *new->pprev = new;
602 old->pprev = LIST_POISON2;
603}
604
581static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h) 605static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
582{ 606{
583 struct hlist_node *first = h->first; 607 struct hlist_node *first = h->first;
diff --git a/include/linux/memory.h b/include/linux/memory.h
index 9a424383e6c6..dc4081b6f161 100644
--- a/include/linux/memory.h
+++ b/include/linux/memory.h
@@ -85,7 +85,6 @@ struct notifier_block;
85extern int register_memory_notifier(struct notifier_block *nb); 85extern int register_memory_notifier(struct notifier_block *nb);
86extern void unregister_memory_notifier(struct notifier_block *nb); 86extern void unregister_memory_notifier(struct notifier_block *nb);
87 87
88extern struct sysdev_class memory_sysdev_class;
89#endif /* CONFIG_MEMORY_HOTPLUG */ 88#endif /* CONFIG_MEMORY_HOTPLUG */
90 89
91#define hotplug_memory_notifier(fn, pri) { \ 90#define hotplug_memory_notifier(fn, pri) { \
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 7b115feca4df..a06a84d347fb 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -144,7 +144,8 @@ extern unsigned int kobjsize(const void *objp);
144 144
145#define VM_GROWSDOWN 0x00000100 /* general info on the segment */ 145#define VM_GROWSDOWN 0x00000100 /* general info on the segment */
146#define VM_GROWSUP 0x00000200 146#define VM_GROWSUP 0x00000200
147#define VM_SHM 0x00000400 /* shared memory area, don't swap out */ 147#define VM_SHM 0x00000000 /* Means nothing: delete it later */
148#define VM_PFNMAP 0x00000400 /* Page-ranges managed without "struct page", just pure PFN */
148#define VM_DENYWRITE 0x00000800 /* ETXTBSY on write attempts.. */ 149#define VM_DENYWRITE 0x00000800 /* ETXTBSY on write attempts.. */
149 150
150#define VM_EXECUTABLE 0x00001000 151#define VM_EXECUTABLE 0x00001000
@@ -157,11 +158,12 @@ extern unsigned int kobjsize(const void *objp);
157 158
158#define VM_DONTCOPY 0x00020000 /* Do not copy this vma on fork */ 159#define VM_DONTCOPY 0x00020000 /* Do not copy this vma on fork */
159#define VM_DONTEXPAND 0x00040000 /* Cannot expand with mremap() */ 160#define VM_DONTEXPAND 0x00040000 /* Cannot expand with mremap() */
160#define VM_RESERVED 0x00080000 /* Pages managed in a special way */ 161#define VM_RESERVED 0x00080000 /* Count as reserved_vm like IO */
161#define VM_ACCOUNT 0x00100000 /* Is a VM accounted object */ 162#define VM_ACCOUNT 0x00100000 /* Is a VM accounted object */
162#define VM_HUGETLB 0x00400000 /* Huge TLB Page VM */ 163#define VM_HUGETLB 0x00400000 /* Huge TLB Page VM */
163#define VM_NONLINEAR 0x00800000 /* Is non-linear (remap_file_pages) */ 164#define VM_NONLINEAR 0x00800000 /* Is non-linear (remap_file_pages) */
164#define VM_MAPPED_COPY 0x01000000 /* T if mapped copy of data (nommu mmap) */ 165#define VM_MAPPED_COPY 0x01000000 /* T if mapped copy of data (nommu mmap) */
166#define VM_INSERTPAGE 0x02000000 /* The vma has had "vm_insert_page()" done on it */
165 167
166#ifndef VM_STACK_DEFAULT_FLAGS /* arch can override this */ 168#ifndef VM_STACK_DEFAULT_FLAGS /* arch can override this */
167#define VM_STACK_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS 169#define VM_STACK_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS
@@ -206,12 +208,6 @@ struct vm_operations_struct {
206struct mmu_gather; 208struct mmu_gather;
207struct inode; 209struct inode;
208 210
209#ifdef ARCH_HAS_ATOMIC_UNSIGNED
210typedef unsigned page_flags_t;
211#else
212typedef unsigned long page_flags_t;
213#endif
214
215/* 211/*
216 * Each physical page in the system has a struct page associated with 212 * Each physical page in the system has a struct page associated with
217 * it to keep track of whatever it is we are using the page for at the 213 * it to keep track of whatever it is we are using the page for at the
@@ -219,7 +215,7 @@ typedef unsigned long page_flags_t;
219 * a page. 215 * a page.
220 */ 216 */
221struct page { 217struct page {
222 page_flags_t flags; /* Atomic flags, some possibly 218 unsigned long flags; /* Atomic flags, some possibly
223 * updated asynchronously */ 219 * updated asynchronously */
224 atomic_t _count; /* Usage count, see below. */ 220 atomic_t _count; /* Usage count, see below. */
225 atomic_t _mapcount; /* Count of ptes mapped in mms, 221 atomic_t _mapcount; /* Count of ptes mapped in mms,
@@ -317,8 +313,6 @@ struct page {
317 313
318extern void FASTCALL(__page_cache_release(struct page *)); 314extern void FASTCALL(__page_cache_release(struct page *));
319 315
320#ifdef CONFIG_HUGETLB_PAGE
321
322static inline int page_count(struct page *page) 316static inline int page_count(struct page *page)
323{ 317{
324 if (PageCompound(page)) 318 if (PageCompound(page))
@@ -335,23 +329,6 @@ static inline void get_page(struct page *page)
335 329
336void put_page(struct page *page); 330void put_page(struct page *page);
337 331
338#else /* CONFIG_HUGETLB_PAGE */
339
340#define page_count(p) (atomic_read(&(p)->_count) + 1)
341
342static inline void get_page(struct page *page)
343{
344 atomic_inc(&page->_count);
345}
346
347static inline void put_page(struct page *page)
348{
349 if (put_page_testzero(page))
350 __page_cache_release(page);
351}
352
353#endif /* CONFIG_HUGETLB_PAGE */
354
355/* 332/*
356 * Multiple processes may "see" the same page. E.g. for untouched 333 * Multiple processes may "see" the same page. E.g. for untouched
357 * mappings of /dev/null, all processes see the same page full of 334 * mappings of /dev/null, all processes see the same page full of
@@ -435,7 +412,7 @@ static inline void put_page(struct page *page)
435#endif 412#endif
436 413
437/* Page flags: | [SECTION] | [NODE] | ZONE | ... | FLAGS | */ 414/* Page flags: | [SECTION] | [NODE] | ZONE | ... | FLAGS | */
438#define SECTIONS_PGOFF ((sizeof(page_flags_t)*8) - SECTIONS_WIDTH) 415#define SECTIONS_PGOFF ((sizeof(unsigned long)*8) - SECTIONS_WIDTH)
439#define NODES_PGOFF (SECTIONS_PGOFF - NODES_WIDTH) 416#define NODES_PGOFF (SECTIONS_PGOFF - NODES_WIDTH)
440#define ZONES_PGOFF (NODES_PGOFF - ZONES_WIDTH) 417#define ZONES_PGOFF (NODES_PGOFF - ZONES_WIDTH)
441 418
@@ -688,6 +665,7 @@ struct zap_details {
688 unsigned long truncate_count; /* Compare vm_truncate_count */ 665 unsigned long truncate_count; /* Compare vm_truncate_count */
689}; 666};
690 667
668struct page *vm_normal_page(struct vm_area_struct *, unsigned long, pte_t);
691unsigned long zap_page_range(struct vm_area_struct *vma, unsigned long address, 669unsigned long zap_page_range(struct vm_area_struct *vma, unsigned long address,
692 unsigned long size, struct zap_details *); 670 unsigned long size, struct zap_details *);
693unsigned long unmap_vmas(struct mmu_gather **tlb, 671unsigned long unmap_vmas(struct mmu_gather **tlb,
@@ -764,6 +742,8 @@ struct shrinker;
764extern struct shrinker *set_shrinker(int, shrinker_t); 742extern struct shrinker *set_shrinker(int, shrinker_t);
765extern void remove_shrinker(struct shrinker *shrinker); 743extern void remove_shrinker(struct shrinker *shrinker);
766 744
745extern pte_t *FASTCALL(get_locked_pte(struct mm_struct *mm, unsigned long addr, spinlock_t **ptl));
746
767int __pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address); 747int __pud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long address);
768int __pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address); 748int __pmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long address);
769int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long address); 749int __pte_alloc(struct mm_struct *mm, pmd_t *pmd, unsigned long address);
@@ -946,7 +926,9 @@ unsigned long max_sane_readahead(unsigned long nr);
946 926
947/* Do stack extension */ 927/* Do stack extension */
948extern int expand_stack(struct vm_area_struct *vma, unsigned long address); 928extern int expand_stack(struct vm_area_struct *vma, unsigned long address);
929#ifdef CONFIG_IA64
949extern int expand_upwards(struct vm_area_struct *vma, unsigned long address); 930extern int expand_upwards(struct vm_area_struct *vma, unsigned long address);
931#endif
950 932
951/* Look up the first VMA which satisfies addr < vm_end, NULL if none. */ 933/* Look up the first VMA which satisfies addr < vm_end, NULL if none. */
952extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr); 934extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr);
@@ -974,8 +956,9 @@ struct page *vmalloc_to_page(void *addr);
974unsigned long vmalloc_to_pfn(void *addr); 956unsigned long vmalloc_to_pfn(void *addr);
975int remap_pfn_range(struct vm_area_struct *, unsigned long addr, 957int remap_pfn_range(struct vm_area_struct *, unsigned long addr,
976 unsigned long pfn, unsigned long size, pgprot_t); 958 unsigned long pfn, unsigned long size, pgprot_t);
959int vm_insert_page(struct vm_area_struct *, unsigned long addr, struct page *);
977 960
978struct page *follow_page(struct mm_struct *, unsigned long address, 961struct page *follow_page(struct vm_area_struct *, unsigned long address,
979 unsigned int foll_flags); 962 unsigned int foll_flags);
980#define FOLL_WRITE 0x01 /* check pte is writable */ 963#define FOLL_WRITE 0x01 /* check pte is writable */
981#define FOLL_TOUCH 0x02 /* mark page accessed */ 964#define FOLL_TOUCH 0x02 /* mark page accessed */
diff --git a/include/linux/mmc/protocol.h b/include/linux/mmc/protocol.h
index f819cae92266..a14dc306545b 100644
--- a/include/linux/mmc/protocol.h
+++ b/include/linux/mmc/protocol.h
@@ -63,7 +63,7 @@
63 /* class 5 */ 63 /* class 5 */
64#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ 64#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
65#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ 65#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
66#define MMC_ERASE 37 /* ac R1b */ 66#define MMC_ERASE 38 /* ac R1b */
67 67
68 /* class 9 */ 68 /* class 9 */
69#define MMC_FAST_IO 39 /* ac <Complex> R4 */ 69#define MMC_FAST_IO 39 /* ac <Complex> R4 */
@@ -74,7 +74,7 @@
74 74
75 /* class 8 */ 75 /* class 8 */
76#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ 76#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
77#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1b */ 77#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
78 78
79/* SD commands type argument response */ 79/* SD commands type argument response */
80 /* class 8 */ 80 /* class 8 */
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index f5fa3082fd6a..9f22090df7dd 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -71,10 +71,11 @@ struct per_cpu_pageset {
71#endif 71#endif
72 72
73#define ZONE_DMA 0 73#define ZONE_DMA 0
74#define ZONE_NORMAL 1 74#define ZONE_DMA32 1
75#define ZONE_HIGHMEM 2 75#define ZONE_NORMAL 2
76#define ZONE_HIGHMEM 3
76 77
77#define MAX_NR_ZONES 3 /* Sync this with ZONES_SHIFT */ 78#define MAX_NR_ZONES 4 /* Sync this with ZONES_SHIFT */
78#define ZONES_SHIFT 2 /* ceil(log2(MAX_NR_ZONES)) */ 79#define ZONES_SHIFT 2 /* ceil(log2(MAX_NR_ZONES)) */
79 80
80 81
@@ -90,27 +91,18 @@ struct per_cpu_pageset {
90 * will be a maximum of 4 (2 ** 2) zonelists, for 3 modifiers there will 91 * will be a maximum of 4 (2 ** 2) zonelists, for 3 modifiers there will
91 * be 8 (2 ** 3) zonelists. GFP_ZONETYPES defines the number of possible 92 * be 8 (2 ** 3) zonelists. GFP_ZONETYPES defines the number of possible
92 * combinations of zone modifiers in "zone modifier space". 93 * combinations of zone modifiers in "zone modifier space".
94 *
95 * NOTE! Make sure this matches the zones in <linux/gfp.h>
93 */ 96 */
94#define GFP_ZONEMASK 0x03 97#define GFP_ZONEMASK 0x07
95/* 98#define GFP_ZONETYPES 5
96 * As an optimisation any zone modifier bits which are only valid when
97 * no other zone modifier bits are set (loners) should be placed in
98 * the highest order bits of this field. This allows us to reduce the
99 * extent of the zonelists thus saving space. For example in the case
100 * of three zone modifier bits, we could require up to eight zonelists.
101 * If the left most zone modifier is a "loner" then the highest valid
102 * zonelist would be four allowing us to allocate only five zonelists.
103 * Use the first form when the left most bit is not a "loner", otherwise
104 * use the second.
105 */
106/* #define GFP_ZONETYPES (GFP_ZONEMASK + 1) */ /* Non-loner */
107#define GFP_ZONETYPES ((GFP_ZONEMASK + 1) / 2 + 1) /* Loner */
108 99
109/* 100/*
110 * On machines where it is needed (eg PCs) we divide physical memory 101 * On machines where it is needed (eg PCs) we divide physical memory
111 * into multiple physical zones. On a PC we have 3 zones: 102 * into multiple physical zones. On a PC we have 4 zones:
112 * 103 *
113 * ZONE_DMA < 16 MB ISA DMA capable memory 104 * ZONE_DMA < 16 MB ISA DMA capable memory
105 * ZONE_DMA32 0 MB Empty
114 * ZONE_NORMAL 16-896 MB direct mapped by the kernel 106 * ZONE_NORMAL 16-896 MB direct mapped by the kernel
115 * ZONE_HIGHMEM > 896 MB only page cache and user processes 107 * ZONE_HIGHMEM > 896 MB only page cache and user processes
116 */ 108 */
@@ -329,7 +321,7 @@ void get_zone_counts(unsigned long *active, unsigned long *inactive,
329void build_all_zonelists(void); 321void build_all_zonelists(void);
330void wakeup_kswapd(struct zone *zone, int order); 322void wakeup_kswapd(struct zone *zone, int order);
331int zone_watermark_ok(struct zone *z, int order, unsigned long mark, 323int zone_watermark_ok(struct zone *z, int order, unsigned long mark,
332 int alloc_type, int can_try_harder, gfp_t gfp_high); 324 int classzone_idx, int alloc_flags);
333 325
334#ifdef CONFIG_HAVE_MEMORY_PRESENT 326#ifdef CONFIG_HAVE_MEMORY_PRESENT
335void memory_present(int nid, unsigned long start, unsigned long end); 327void memory_present(int nid, unsigned long start, unsigned long end);
@@ -433,7 +425,9 @@ int lowmem_reserve_ratio_sysctl_handler(struct ctl_table *, int, struct file *,
433 425
434#include <linux/topology.h> 426#include <linux/topology.h>
435/* Returns the number of the current Node. */ 427/* Returns the number of the current Node. */
428#ifndef numa_node_id
436#define numa_node_id() (cpu_to_node(raw_smp_processor_id())) 429#define numa_node_id() (cpu_to_node(raw_smp_processor_id()))
430#endif
437 431
438#ifndef CONFIG_NEED_MULTIPLE_NODES 432#ifndef CONFIG_NEED_MULTIPLE_NODES
439 433
@@ -453,12 +447,12 @@ extern struct pglist_data contig_page_data;
453#include <asm/sparsemem.h> 447#include <asm/sparsemem.h>
454#endif 448#endif
455 449
456#if BITS_PER_LONG == 32 || defined(ARCH_HAS_ATOMIC_UNSIGNED) 450#if BITS_PER_LONG == 32
457/* 451/*
458 * with 32 bit page->flags field, we reserve 8 bits for node/zone info. 452 * with 32 bit page->flags field, we reserve 9 bits for node/zone info.
459 * there are 3 zones (2 bits) and this leaves 8-2=6 bits for nodes. 453 * there are 4 zones (3 bits) and this leaves 9-3=6 bits for nodes.
460 */ 454 */
461#define FLAGS_RESERVED 8 455#define FLAGS_RESERVED 9
462 456
463#elif BITS_PER_LONG == 64 457#elif BITS_PER_LONG == 64
464/* 458/*
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index 3c9ea4b7adda..23a568910341 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -1,7 +1,7 @@
1 1
2/* Common Flash Interface structures 2/* Common Flash Interface structures
3 * See http://support.intel.com/design/flash/technote/index.htm 3 * See http://support.intel.com/design/flash/technote/index.htm
4 * $Id: cfi.h,v 1.56 2005/11/07 11:14:54 gleixner Exp $ 4 * $Id: cfi.h,v 1.57 2005/11/15 23:28:17 tpoynor Exp $
5 */ 5 */
6 6
7#ifndef __MTD_CFI_H__ 7#ifndef __MTD_CFI_H__
@@ -426,6 +426,22 @@ static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
426 } 426 }
427} 427}
428 428
429static inline uint16_t cfi_read_query16(struct map_info *map, uint32_t addr)
430{
431 map_word val = map_read(map, addr);
432
433 if (map_bankwidth_is_1(map)) {
434 return val.x[0] & 0xff;
435 } else if (map_bankwidth_is_2(map)) {
436 return cfi16_to_cpu(val.x[0]);
437 } else {
438 /* No point in a 64-bit byteswap since that would just be
439 swapping the responses from different chips, and we are
440 only interested in one chip (a representative sample) */
441 return cfi32_to_cpu(val.x[0]);
442 }
443}
444
429static inline void cfi_udelay(int us) 445static inline void cfi_udelay(int us)
430{ 446{
431 if (us >= 1000) { 447 if (us >= 1000) {
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h
index f1fd4215686a..7419b5fab133 100644
--- a/include/linux/mtd/onenand.h
+++ b/include/linux/mtd/onenand.h
@@ -17,7 +17,6 @@
17#include <linux/mtd/bbm.h> 17#include <linux/mtd/bbm.h>
18 18
19#define MAX_BUFFERRAM 2 19#define MAX_BUFFERRAM 2
20#define MAX_ONENAND_PAGESIZE (2048 + 64)
21 20
22/* Scan and identify a OneNAND device */ 21/* Scan and identify a OneNAND device */
23extern int onenand_scan(struct mtd_info *mtd, int max_chips); 22extern int onenand_scan(struct mtd_info *mtd, int max_chips);
@@ -110,6 +109,7 @@ struct onenand_chip {
110 spinlock_t chip_lock; 109 spinlock_t chip_lock;
111 wait_queue_head_t wq; 110 wait_queue_head_t wq;
112 onenand_state_t state; 111 onenand_state_t state;
112 unsigned char *page_buf;
113 113
114 struct nand_oobinfo *autooob; 114 struct nand_oobinfo *autooob;
115 115
@@ -134,13 +134,12 @@ struct onenand_chip {
134 * Options bits 134 * Options bits
135 */ 135 */
136#define ONENAND_CONT_LOCK (0x0001) 136#define ONENAND_CONT_LOCK (0x0001)
137 137#define ONENAND_PAGEBUF_ALLOC (0x1000)
138 138
139/* 139/*
140 * OneNAND Flash Manufacturer ID Codes 140 * OneNAND Flash Manufacturer ID Codes
141 */ 141 */
142#define ONENAND_MFR_SAMSUNG 0xec 142#define ONENAND_MFR_SAMSUNG 0xec
143#define ONENAND_MFR_UNKNOWN 0x00
144 143
145/** 144/**
146 * struct nand_manufacturers - NAND Flash Manufacturer ID Structure 145 * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
diff --git a/include/linux/n_r3964.h b/include/linux/n_r3964.h
index 2352bcd31a06..db4f3776978a 100644
--- a/include/linux/n_r3964.h
+++ b/include/linux/n_r3964.h
@@ -13,6 +13,10 @@
13 * L. Haag 13 * L. Haag
14 * 14 *
15 * $Log: r3964.h,v $ 15 * $Log: r3964.h,v $
16 * Revision 1.4 2005/12/21 19:54:24 Kurt Huwig <kurt huwig de>
17 * Fixed HZ usage on 2.6 kernels
18 * Removed unnecessary include
19 *
16 * Revision 1.3 2001/03/18 13:02:24 dwmw2 20 * Revision 1.3 2001/03/18 13:02:24 dwmw2
17 * Fix timer usage, use spinlocks properly. 21 * Fix timer usage, use spinlocks properly.
18 * 22 *
@@ -45,9 +49,11 @@
45#define __LINUX_N_R3964_H__ 49#define __LINUX_N_R3964_H__
46 50
47/* line disciplines for r3964 protocol */ 51/* line disciplines for r3964 protocol */
48#include <asm/termios.h>
49 52
50#ifdef __KERNEL__ 53#ifdef __KERNEL__
54
55#include <linux/param.h>
56
51/* 57/*
52 * Common ascii handshake characters: 58 * Common ascii handshake characters:
53 */ 59 */
@@ -58,14 +64,14 @@
58#define NAK 0x15 64#define NAK 0x15
59 65
60/* 66/*
61 * Timeouts (msecs/10 msecs per timer interrupt): 67 * Timeouts (from milliseconds to jiffies)
62 */ 68 */
63 69
64#define R3964_TO_QVZ 550/10 70#define R3964_TO_QVZ ((550)*HZ/1000)
65#define R3964_TO_ZVZ 220/10 71#define R3964_TO_ZVZ ((220)*HZ/1000)
66#define R3964_TO_NO_BUF 400/10 72#define R3964_TO_NO_BUF ((400)*HZ/1000)
67#define R3964_NO_TX_ROOM 100/10 73#define R3964_NO_TX_ROOM ((100)*HZ/1000)
68#define R3964_TO_RX_PANIC 4000/10 74#define R3964_TO_RX_PANIC ((4000)*HZ/1000)
69#define R3964_MAX_RETRIES 5 75#define R3964_MAX_RETRIES 5
70 76
71#endif 77#endif
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index c6efce4a04a4..936f8b76114e 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -927,6 +927,13 @@ extern int netdev_max_backlog;
927extern int weight_p; 927extern int weight_p;
928extern int netdev_set_master(struct net_device *dev, struct net_device *master); 928extern int netdev_set_master(struct net_device *dev, struct net_device *master);
929extern int skb_checksum_help(struct sk_buff *skb, int inward); 929extern int skb_checksum_help(struct sk_buff *skb, int inward);
930#ifdef CONFIG_BUG
931extern void netdev_rx_csum_fault(struct net_device *dev);
932#else
933static inline void netdev_rx_csum_fault(struct net_device *dev)
934{
935}
936#endif
930/* rx skb timestamps */ 937/* rx skb timestamps */
931extern void net_enable_timestamp(void); 938extern void net_enable_timestamp(void);
932extern void net_disable_timestamp(void); 939extern void net_disable_timestamp(void);
diff --git a/include/linux/netfilter/nfnetlink.h b/include/linux/netfilter/nfnetlink.h
index 72975fa8795d..934a2479f160 100644
--- a/include/linux/netfilter/nfnetlink.h
+++ b/include/linux/netfilter/nfnetlink.h
@@ -112,7 +112,6 @@ struct nfnl_callback
112{ 112{
113 int (*call)(struct sock *nl, struct sk_buff *skb, 113 int (*call)(struct sock *nl, struct sk_buff *skb,
114 struct nlmsghdr *nlh, struct nfattr *cda[], int *errp); 114 struct nlmsghdr *nlh, struct nfattr *cda[], int *errp);
115 kernel_cap_t cap_required; /* capabilities required for this msg */
116 u_int16_t attr_count; /* number of nfattr's */ 115 u_int16_t attr_count; /* number of nfattr's */
117}; 116};
118 117
@@ -154,11 +153,14 @@ extern void nfattr_parse(struct nfattr *tb[], int maxattr,
154 153
155#define nfattr_bad_size(tb, max, cta_min) \ 154#define nfattr_bad_size(tb, max, cta_min) \
156({ int __i, __res = 0; \ 155({ int __i, __res = 0; \
157 for (__i=0; __i<max; __i++) \ 156 for (__i=0; __i<max; __i++) { \
157 if (!cta_min[__i]) \
158 continue; \
158 if (tb[__i] && NFA_PAYLOAD(tb[__i]) < cta_min[__i]){ \ 159 if (tb[__i] && NFA_PAYLOAD(tb[__i]) < cta_min[__i]){ \
159 __res = 1; \ 160 __res = 1; \
160 break; \ 161 break; \
161 } \ 162 } \
163 } \
162 __res; \ 164 __res; \
163}) 165})
164 166
diff --git a/include/linux/netfilter_ipv4/ipt_sctp.h b/include/linux/netfilter_ipv4/ipt_sctp.h
index e93a9ec99fc2..80b3dbacd193 100644
--- a/include/linux/netfilter_ipv4/ipt_sctp.h
+++ b/include/linux/netfilter_ipv4/ipt_sctp.h
@@ -7,8 +7,6 @@
7 7
8#define IPT_SCTP_VALID_FLAGS 0x07 8#define IPT_SCTP_VALID_FLAGS 0x07
9 9
10#define ELEMCOUNT(x) (sizeof(x)/sizeof(x[0]))
11
12 10
13struct ipt_sctp_flag_info { 11struct ipt_sctp_flag_info {
14 u_int8_t chunktype; 12 u_int8_t chunktype;
@@ -59,21 +57,21 @@ struct ipt_sctp_info {
59#define SCTP_CHUNKMAP_RESET(chunkmap) \ 57#define SCTP_CHUNKMAP_RESET(chunkmap) \
60 do { \ 58 do { \
61 int i; \ 59 int i; \
62 for (i = 0; i < ELEMCOUNT(chunkmap); i++) \ 60 for (i = 0; i < ARRAY_SIZE(chunkmap); i++) \
63 chunkmap[i] = 0; \ 61 chunkmap[i] = 0; \
64 } while (0) 62 } while (0)
65 63
66#define SCTP_CHUNKMAP_SET_ALL(chunkmap) \ 64#define SCTP_CHUNKMAP_SET_ALL(chunkmap) \
67 do { \ 65 do { \
68 int i; \ 66 int i; \
69 for (i = 0; i < ELEMCOUNT(chunkmap); i++) \ 67 for (i = 0; i < ARRAY_SIZE(chunkmap); i++) \
70 chunkmap[i] = ~0; \ 68 chunkmap[i] = ~0; \
71 } while (0) 69 } while (0)
72 70
73#define SCTP_CHUNKMAP_COPY(destmap, srcmap) \ 71#define SCTP_CHUNKMAP_COPY(destmap, srcmap) \
74 do { \ 72 do { \
75 int i; \ 73 int i; \
76 for (i = 0; i < ELEMCOUNT(chunkmap); i++) \ 74 for (i = 0; i < ARRAY_SIZE(chunkmap); i++) \
77 destmap[i] = srcmap[i]; \ 75 destmap[i] = srcmap[i]; \
78 } while (0) 76 } while (0)
79 77
@@ -81,7 +79,7 @@ struct ipt_sctp_info {
81({ \ 79({ \
82 int i; \ 80 int i; \
83 int flag = 1; \ 81 int flag = 1; \
84 for (i = 0; i < ELEMCOUNT(chunkmap); i++) { \ 82 for (i = 0; i < ARRAY_SIZE(chunkmap); i++) { \
85 if (chunkmap[i]) { \ 83 if (chunkmap[i]) { \
86 flag = 0; \ 84 flag = 0; \
87 break; \ 85 break; \
@@ -94,7 +92,7 @@ struct ipt_sctp_info {
94({ \ 92({ \
95 int i; \ 93 int i; \
96 int flag = 1; \ 94 int flag = 1; \
97 for (i = 0; i < ELEMCOUNT(chunkmap); i++) { \ 95 for (i = 0; i < ARRAY_SIZE(chunkmap); i++) { \
98 if (chunkmap[i] != ~0) { \ 96 if (chunkmap[i] != ~0) { \
99 flag = 0; \ 97 flag = 0; \
100 break; \ 98 break; \
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 12787a9b0259..2516adeccecf 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -291,6 +291,7 @@ static inline int nfs_verify_change_attribute(struct inode *inode, unsigned long
291/* 291/*
292 * linux/fs/nfs/inode.c 292 * linux/fs/nfs/inode.c
293 */ 293 */
294extern int nfs_sync_mapping(struct address_space *mapping);
294extern void nfs_zap_caches(struct inode *); 295extern void nfs_zap_caches(struct inode *);
295extern struct inode *nfs_fhget(struct super_block *, struct nfs_fh *, 296extern struct inode *nfs_fhget(struct super_block *, struct nfs_fh *,
296 struct nfs_fattr *); 297 struct nfs_fattr *);
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index f34767c5fc79..343083fec258 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -287,11 +287,7 @@ extern void __mod_page_state(unsigned long offset, unsigned long delta);
287#define ClearPageReclaim(page) clear_bit(PG_reclaim, &(page)->flags) 287#define ClearPageReclaim(page) clear_bit(PG_reclaim, &(page)->flags)
288#define TestClearPageReclaim(page) test_and_clear_bit(PG_reclaim, &(page)->flags) 288#define TestClearPageReclaim(page) test_and_clear_bit(PG_reclaim, &(page)->flags)
289 289
290#ifdef CONFIG_HUGETLB_PAGE
291#define PageCompound(page) test_bit(PG_compound, &(page)->flags) 290#define PageCompound(page) test_bit(PG_compound, &(page)->flags)
292#else
293#define PageCompound(page) 0
294#endif
295#define SetPageCompound(page) set_bit(PG_compound, &(page)->flags) 291#define SetPageCompound(page) set_bit(PG_compound, &(page)->flags)
296#define ClearPageCompound(page) clear_bit(PG_compound, &(page)->flags) 292#define ClearPageCompound(page) clear_bit(PG_compound, &(page)->flags)
297 293
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index ba6c310a055f..ee700c6eb442 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -53,12 +53,12 @@ void release_pages(struct page **pages, int nr, int cold);
53 53
54static inline struct page *page_cache_alloc(struct address_space *x) 54static inline struct page *page_cache_alloc(struct address_space *x)
55{ 55{
56 return alloc_pages(mapping_gfp_mask(x)|__GFP_NORECLAIM, 0); 56 return alloc_pages(mapping_gfp_mask(x), 0);
57} 57}
58 58
59static inline struct page *page_cache_alloc_cold(struct address_space *x) 59static inline struct page *page_cache_alloc_cold(struct address_space *x)
60{ 60{
61 return alloc_pages(mapping_gfp_mask(x)|__GFP_COLD|__GFP_NORECLAIM, 0); 61 return alloc_pages(mapping_gfp_mask(x)|__GFP_COLD, 0);
62} 62}
63 63
64typedef int filler_t(void *, struct page *); 64typedef int filler_t(void *, struct page *);
diff --git a/include/linux/parport_pc.h b/include/linux/parport_pc.h
index 7825c76cbd00..c6f762470879 100644
--- a/include/linux/parport_pc.h
+++ b/include/linux/parport_pc.h
@@ -86,7 +86,7 @@ extern __inline__ void dump_parport_state (char *str, struct parport *p)
86 unsigned char dcr = inb (CONTROL (p)); 86 unsigned char dcr = inb (CONTROL (p));
87 unsigned char dsr = inb (STATUS (p)); 87 unsigned char dsr = inb (STATUS (p));
88 static char *ecr_modes[] = {"SPP", "PS2", "PPFIFO", "ECP", "xXx", "yYy", "TST", "CFG"}; 88 static char *ecr_modes[] = {"SPP", "PS2", "PPFIFO", "ECP", "xXx", "yYy", "TST", "CFG"};
89 const struct parport_pc_private *priv = (parport_pc_private *)p->physport->private_data; 89 const struct parport_pc_private *priv = p->physport->private_data;
90 int i; 90 int i;
91 91
92 printk (KERN_DEBUG "*** parport state (%s): ecr=[%s", str, ecr_modes[(ecr & 0xe0) >> 5]); 92 printk (KERN_DEBUG "*** parport state (%s): ecr=[%s", str, ecr_modes[(ecr & 0xe0) >> 5]);
diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h
index 857126a36ecc..4877e35ae202 100644
--- a/include/linux/pci-acpi.h
+++ b/include/linux/pci-acpi.h
@@ -47,14 +47,15 @@
47 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL) 47 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL)
48 48
49#ifdef CONFIG_ACPI 49#ifdef CONFIG_ACPI
50extern acpi_status pci_osc_control_set(u32 flags); 50extern acpi_status pci_osc_control_set(acpi_handle handle, u32 flags);
51extern acpi_status pci_osc_support_set(u32 flags); 51extern acpi_status pci_osc_support_set(u32 flags);
52#else 52#else
53#if !defined(acpi_status) 53#if !defined(acpi_status)
54typedef u32 acpi_status; 54typedef u32 acpi_status;
55#define AE_ERROR (acpi_status) (0x0001) 55#define AE_ERROR (acpi_status) (0x0001)
56#endif 56#endif
57static inline acpi_status pci_osc_control_set(u32 flags) {return AE_ERROR;} 57static inline acpi_status pci_osc_control_set(acpi_handle handle, u32 flags)
58{return AE_ERROR;}
58static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;} 59static inline acpi_status pci_osc_support_set(u32 flags) {return AE_ERROR;}
59#endif 60#endif
60 61
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 3596ac94ecff..de690ca73d58 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -236,7 +236,6 @@ struct module;
236struct pci_driver { 236struct pci_driver {
237 struct list_head node; 237 struct list_head node;
238 char *name; 238 char *name;
239 struct module *owner;
240 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ 239 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
241 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ 240 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
242 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ 241 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
@@ -338,6 +337,7 @@ struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const
338struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from); 337struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
339struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn); 338struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
340int pci_find_capability (struct pci_dev *dev, int cap); 339int pci_find_capability (struct pci_dev *dev, int cap);
340int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
341int pci_find_ext_capability (struct pci_dev *dev, int cap); 341int pci_find_ext_capability (struct pci_dev *dev, int cap);
342struct pci_bus * pci_find_next_bus(const struct pci_bus *from); 342struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
343 343
@@ -432,8 +432,13 @@ int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
432 void *alignf_data); 432 void *alignf_data);
433void pci_enable_bridges(struct pci_bus *bus); 433void pci_enable_bridges(struct pci_bus *bus);
434 434
435/* New-style probing supporting hot-pluggable devices */ 435/* Proper probing supporting hot-pluggable devices */
436int pci_register_driver(struct pci_driver *); 436int __pci_register_driver(struct pci_driver *, struct module *);
437static inline int pci_register_driver(struct pci_driver *driver)
438{
439 return __pci_register_driver(driver, THIS_MODULE);
440}
441
437void pci_unregister_driver(struct pci_driver *); 442void pci_unregister_driver(struct pci_driver *);
438void pci_remove_behind_bridge(struct pci_dev *); 443void pci_remove_behind_bridge(struct pci_dev *);
439struct pci_driver *pci_dev_driver(const struct pci_dev *); 444struct pci_driver *pci_dev_driver(const struct pci_dev *);
@@ -547,9 +552,11 @@ static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
547static inline void pci_disable_device(struct pci_dev *dev) { } 552static inline void pci_disable_device(struct pci_dev *dev) { }
548static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; } 553static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
549static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;} 554static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
555static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
550static inline int pci_register_driver(struct pci_driver *drv) { return 0;} 556static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
551static inline void pci_unregister_driver(struct pci_driver *drv) { } 557static inline void pci_unregister_driver(struct pci_driver *drv) { }
552static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; } 558static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
559static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
553static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; } 560static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
554static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; } 561static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
555 562
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 4e06eb0f4451..4db67b3b05cc 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -442,6 +442,7 @@
442#define PCI_DEVICE_ID_IBM_SNIPE 0x0180 442#define PCI_DEVICE_ID_IBM_SNIPE 0x0180
443#define PCI_DEVICE_ID_IBM_CITRINE 0x028C 443#define PCI_DEVICE_ID_IBM_CITRINE 0x028C
444#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166 444#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166
445#define PCI_DEVICE_ID_IBM_OBSIDIAN 0x02BD
445#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031 446#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031
446#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219 447#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219
447#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A 448#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A
@@ -619,6 +620,7 @@
619#define PCI_DEVICE_ID_SI_961 0x0961 620#define PCI_DEVICE_ID_SI_961 0x0961
620#define PCI_DEVICE_ID_SI_962 0x0962 621#define PCI_DEVICE_ID_SI_962 0x0962
621#define PCI_DEVICE_ID_SI_963 0x0963 622#define PCI_DEVICE_ID_SI_963 0x0963
623#define PCI_DEVICE_ID_SI_965 0x0965
622#define PCI_DEVICE_ID_SI_5511 0x5511 624#define PCI_DEVICE_ID_SI_5511 0x5511
623#define PCI_DEVICE_ID_SI_5513 0x5513 625#define PCI_DEVICE_ID_SI_5513 0x5513
624#define PCI_DEVICE_ID_SI_5518 0x5518 626#define PCI_DEVICE_ID_SI_5518 0x5518
@@ -804,6 +806,10 @@
804#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051 806#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051
805#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058 807#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058
806#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059 808#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059
809#define PCI_DEVICE_ID_APPLE_IPID2_AGP 0x0066
810#define PCI_DEVICE_ID_APPLE_IPID2_ATA 0x0069
811#define PCI_DEVICE_ID_APPLE_IPID2_FW 0x006a
812#define PCI_DEVICE_ID_APPLE_IPID2_GMAC 0x006b
807#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645 813#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645
808 814
809#define PCI_VENDOR_ID_YAMAHA 0x1073 815#define PCI_VENDOR_ID_YAMAHA 0x1073
@@ -1193,6 +1199,7 @@
1193#define PCI_DEVICE_ID_VIA_3269_0 0x0269 1199#define PCI_DEVICE_ID_VIA_3269_0 0x0269
1194#define PCI_DEVICE_ID_VIA_K8T800PRO_0 0x0282 1200#define PCI_DEVICE_ID_VIA_K8T800PRO_0 0x0282
1195#define PCI_DEVICE_ID_VIA_8363_0 0x0305 1201#define PCI_DEVICE_ID_VIA_8363_0 0x0305
1202#define PCI_DEVICE_ID_VIA_P4M800CE 0x0314
1196#define PCI_DEVICE_ID_VIA_8371_0 0x0391 1203#define PCI_DEVICE_ID_VIA_8371_0 0x0391
1197#define PCI_DEVICE_ID_VIA_8501_0 0x0501 1204#define PCI_DEVICE_ID_VIA_8501_0 0x0501
1198#define PCI_DEVICE_ID_VIA_82C561 0x0561 1205#define PCI_DEVICE_ID_VIA_82C561 0x0561
@@ -1229,6 +1236,7 @@
1229#define PCI_DEVICE_ID_VIA_8703_51_0 0x3148 1236#define PCI_DEVICE_ID_VIA_8703_51_0 0x3148
1230#define PCI_DEVICE_ID_VIA_8237_SATA 0x3149 1237#define PCI_DEVICE_ID_VIA_8237_SATA 0x3149
1231#define PCI_DEVICE_ID_VIA_XN266 0x3156 1238#define PCI_DEVICE_ID_VIA_XN266 0x3156
1239#define PCI_DEVICE_ID_VIA_6410 0x3164
1232#define PCI_DEVICE_ID_VIA_8754C_0 0x3168 1240#define PCI_DEVICE_ID_VIA_8754C_0 0x3168
1233#define PCI_DEVICE_ID_VIA_8235 0x3177 1241#define PCI_DEVICE_ID_VIA_8235 0x3177
1234#define PCI_DEVICE_ID_VIA_8385_0 0x3188 1242#define PCI_DEVICE_ID_VIA_8385_0 0x3188
@@ -1236,6 +1244,7 @@
1236#define PCI_DEVICE_ID_VIA_8378_0 0x3205 1244#define PCI_DEVICE_ID_VIA_8378_0 0x3205
1237#define PCI_DEVICE_ID_VIA_8783_0 0x3208 1245#define PCI_DEVICE_ID_VIA_8783_0 0x3208
1238#define PCI_DEVICE_ID_VIA_8237 0x3227 1246#define PCI_DEVICE_ID_VIA_8237 0x3227
1247#define PCI_DEVICE_ID_VIA_8251 0x3287
1239#define PCI_DEVICE_ID_VIA_3296_0 0x0296 1248#define PCI_DEVICE_ID_VIA_3296_0 0x0296
1240#define PCI_DEVICE_ID_VIA_8231 0x8231 1249#define PCI_DEVICE_ID_VIA_8231 0x8231
1241#define PCI_DEVICE_ID_VIA_8231_4 0x8235 1250#define PCI_DEVICE_ID_VIA_8231_4 0x8235
@@ -1396,6 +1405,7 @@
1396#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 1405#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
1397 1406
1398#define PCI_VENDOR_ID_MARVELL 0x11ab 1407#define PCI_VENDOR_ID_MARVELL 0x11ab
1408#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
1399#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 1409#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
1400#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 1410#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
1401#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 1411#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480
@@ -2147,6 +2157,7 @@
2147#define PCI_DEVICE_ID_ADAPTEC2_7899B 0x00c1 2157#define PCI_DEVICE_ID_ADAPTEC2_7899B 0x00c1
2148#define PCI_DEVICE_ID_ADAPTEC2_7899D 0x00c3 2158#define PCI_DEVICE_ID_ADAPTEC2_7899D 0x00c3
2149#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf 2159#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf
2160#define PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN 0x0500
2150#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 2161#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503
2151 2162
2152 2163
diff --git a/include/linux/percpu.h b/include/linux/percpu.h
index 5451eb1e781d..fb8d2d24e4bb 100644
--- a/include/linux/percpu.h
+++ b/include/linux/percpu.h
@@ -38,7 +38,7 @@ extern void free_percpu(const void *);
38 38
39#else /* CONFIG_SMP */ 39#else /* CONFIG_SMP */
40 40
41#define per_cpu_ptr(ptr, cpu) (ptr) 41#define per_cpu_ptr(ptr, cpu) ({ (void)(cpu); (ptr); })
42 42
43static inline void *__alloc_percpu(size_t size, size_t align) 43static inline void *__alloc_percpu(size_t size, size_t align)
44{ 44{
diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h
index 1a165b7ae01b..17e336f40b47 100644
--- a/include/linux/platform_device.h
+++ b/include/linux/platform_device.h
@@ -43,4 +43,19 @@ extern int platform_device_add_data(struct platform_device *pdev, void *data, si
43extern int platform_device_add(struct platform_device *pdev); 43extern int platform_device_add(struct platform_device *pdev);
44extern void platform_device_put(struct platform_device *pdev); 44extern void platform_device_put(struct platform_device *pdev);
45 45
46struct platform_driver {
47 int (*probe)(struct platform_device *);
48 int (*remove)(struct platform_device *);
49 void (*shutdown)(struct platform_device *);
50 int (*suspend)(struct platform_device *, pm_message_t state);
51 int (*resume)(struct platform_device *);
52 struct device_driver driver;
53};
54
55extern int platform_driver_register(struct platform_driver *);
56extern void platform_driver_unregister(struct platform_driver *);
57
58#define platform_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev)
59#define platform_set_drvdata(_dev,data) dev_set_drvdata(&(_dev)->dev, (data))
60
46#endif /* _PLATFORM_DEVICE_H_ */ 61#endif /* _PLATFORM_DEVICE_H_ */
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 1514098d156d..5be87ba3b7ac 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -94,55 +94,6 @@ struct pm_dev
94 struct list_head entry; 94 struct list_head entry;
95}; 95};
96 96
97#ifdef CONFIG_PM
98
99extern int pm_active;
100
101#define PM_IS_ACTIVE() (pm_active != 0)
102
103/*
104 * Register a device with power management
105 */
106struct pm_dev __deprecated *
107pm_register(pm_dev_t type, unsigned long id, pm_callback callback);
108
109/*
110 * Unregister a device with power management
111 */
112void __deprecated pm_unregister(struct pm_dev *dev);
113
114/*
115 * Unregister all devices with matching callback
116 */
117void __deprecated pm_unregister_all(pm_callback callback);
118
119/*
120 * Send a request to all devices
121 */
122int __deprecated pm_send_all(pm_request_t rqst, void *data);
123
124#else /* CONFIG_PM */
125
126#define PM_IS_ACTIVE() 0
127
128static inline struct pm_dev *pm_register(pm_dev_t type,
129 unsigned long id,
130 pm_callback callback)
131{
132 return NULL;
133}
134
135static inline void pm_unregister(struct pm_dev *dev) {}
136
137static inline void pm_unregister_all(pm_callback callback) {}
138
139static inline int pm_send_all(pm_request_t rqst, void *data)
140{
141 return 0;
142}
143
144#endif /* CONFIG_PM */
145
146/* Functions above this comment are list-based old-style power 97/* Functions above this comment are list-based old-style power
147 * managment. Please avoid using them. */ 98 * managment. Please avoid using them. */
148 99
diff --git a/include/linux/pm_legacy.h b/include/linux/pm_legacy.h
new file mode 100644
index 000000000000..1252b45face1
--- /dev/null
+++ b/include/linux/pm_legacy.h
@@ -0,0 +1,56 @@
1#ifndef __LINUX_PM_LEGACY_H__
2#define __LINUX_PM_LEGACY_H__
3
4#include <linux/config.h>
5
6#ifdef CONFIG_PM_LEGACY
7
8extern int pm_active;
9
10#define PM_IS_ACTIVE() (pm_active != 0)
11
12/*
13 * Register a device with power management
14 */
15struct pm_dev __deprecated *
16pm_register(pm_dev_t type, unsigned long id, pm_callback callback);
17
18/*
19 * Unregister a device with power management
20 */
21void __deprecated pm_unregister(struct pm_dev *dev);
22
23/*
24 * Unregister all devices with matching callback
25 */
26void __deprecated pm_unregister_all(pm_callback callback);
27
28/*
29 * Send a request to all devices
30 */
31int __deprecated pm_send_all(pm_request_t rqst, void *data);
32
33#else /* CONFIG_PM_LEGACY */
34
35#define PM_IS_ACTIVE() 0
36
37static inline struct pm_dev *pm_register(pm_dev_t type,
38 unsigned long id,
39 pm_callback callback)
40{
41 return NULL;
42}
43
44static inline void pm_unregister(struct pm_dev *dev) {}
45
46static inline void pm_unregister_all(pm_callback callback) {}
47
48static inline int pm_send_all(pm_request_t rqst, void *data)
49{
50 return 0;
51}
52
53#endif /* CONFIG_PM_LEGACY */
54
55#endif /* __LINUX_PM_LEGACY_H__ */
56
diff --git a/include/linux/preempt.h b/include/linux/preempt.h
index dd98c54a23b4..5769d14d1e6a 100644
--- a/include/linux/preempt.h
+++ b/include/linux/preempt.h
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include <linux/config.h> 9#include <linux/config.h>
10#include <linux/thread_info.h>
10#include <linux/linkage.h> 11#include <linux/linkage.h>
11 12
12#ifdef CONFIG_DEBUG_PREEMPT 13#ifdef CONFIG_DEBUG_PREEMPT
@@ -47,6 +48,7 @@ do { \
47#define preempt_enable() \ 48#define preempt_enable() \
48do { \ 49do { \
49 preempt_enable_no_resched(); \ 50 preempt_enable_no_resched(); \
51 barrier(); \
50 preempt_check_resched(); \ 52 preempt_check_resched(); \
51} while (0) 53} while (0)
52 54
diff --git a/include/linux/raid_class.h b/include/linux/raid_class.h
index a71123c28272..48831eac2910 100644
--- a/include/linux/raid_class.h
+++ b/include/linux/raid_class.h
@@ -1,4 +1,9 @@
1/* 1/*
2 * raid_class.h - a generic raid visualisation class
3 *
4 * Copyright (c) 2005 - James Bottomley <James.Bottomley@steeleye.com>
5 *
6 * This file is licensed under GPLv2
2 */ 7 */
3#include <linux/transport_class.h> 8#include <linux/transport_class.h>
4 9
@@ -14,20 +19,35 @@ struct raid_function_template {
14}; 19};
15 20
16enum raid_state { 21enum raid_state {
17 RAID_ACTIVE = 1, 22 RAID_STATE_UNKNOWN = 0,
18 RAID_DEGRADED, 23 RAID_STATE_ACTIVE,
19 RAID_RESYNCING, 24 RAID_STATE_DEGRADED,
20 RAID_OFFLINE, 25 RAID_STATE_RESYNCING,
26 RAID_STATE_OFFLINE,
27};
28
29enum raid_level {
30 RAID_LEVEL_UNKNOWN = 0,
31 RAID_LEVEL_LINEAR,
32 RAID_LEVEL_0,
33 RAID_LEVEL_1,
34 RAID_LEVEL_3,
35 RAID_LEVEL_4,
36 RAID_LEVEL_5,
37 RAID_LEVEL_6,
21}; 38};
22 39
23struct raid_data { 40struct raid_data {
24 struct list_head component_list; 41 struct list_head component_list;
25 int component_count; 42 int component_count;
26 int level; 43 enum raid_level level;
27 enum raid_state state; 44 enum raid_state state;
28 int resync; 45 int resync;
29}; 46};
30 47
48/* resync complete goes from 0 to this */
49#define RAID_MAX_RESYNC (10000)
50
31#define DEFINE_RAID_ATTRIBUTE(type, attr) \ 51#define DEFINE_RAID_ATTRIBUTE(type, attr) \
32static inline void \ 52static inline void \
33raid_set_##attr(struct raid_template *r, struct device *dev, type value) { \ 53raid_set_##attr(struct raid_template *r, struct device *dev, type value) { \
@@ -48,7 +68,7 @@ raid_get_##attr(struct raid_template *r, struct device *dev) { \
48 return rd->attr; \ 68 return rd->attr; \
49} 69}
50 70
51DEFINE_RAID_ATTRIBUTE(int, level) 71DEFINE_RAID_ATTRIBUTE(enum raid_level, level)
52DEFINE_RAID_ATTRIBUTE(int, resync) 72DEFINE_RAID_ATTRIBUTE(int, resync)
53DEFINE_RAID_ATTRIBUTE(enum raid_state, state) 73DEFINE_RAID_ATTRIBUTE(enum raid_state, state)
54 74
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index cce25591eec2..a471f3bb713e 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -100,6 +100,7 @@ struct rcu_data {
100 struct rcu_head *donelist; 100 struct rcu_head *donelist;
101 struct rcu_head **donetail; 101 struct rcu_head **donetail;
102 int cpu; 102 int cpu;
103 struct rcu_head barrier;
103}; 104};
104 105
105DECLARE_PER_CPU(struct rcu_data, rcu_data); 106DECLARE_PER_CPU(struct rcu_data, rcu_data);
@@ -285,6 +286,7 @@ extern void FASTCALL(call_rcu_bh(struct rcu_head *head,
285extern __deprecated_for_modules void synchronize_kernel(void); 286extern __deprecated_for_modules void synchronize_kernel(void);
286extern void synchronize_rcu(void); 287extern void synchronize_rcu(void);
287void synchronize_idle(void); 288void synchronize_idle(void);
289extern void rcu_barrier(void);
288 290
289#endif /* __KERNEL__ */ 291#endif /* __KERNEL__ */
290#endif /* __LINUX_RCUPDATE_H */ 292#endif /* __LINUX_RCUPDATE_H */
diff --git a/include/linux/relayfs_fs.h b/include/linux/relayfs_fs.h
index cfafc3e76bc2..fb7e80737325 100644
--- a/include/linux/relayfs_fs.h
+++ b/include/linux/relayfs_fs.h
@@ -20,9 +20,9 @@
20#include <linux/kref.h> 20#include <linux/kref.h>
21 21
22/* 22/*
23 * Tracks changes to rchan_buf struct 23 * Tracks changes to rchan/rchan_buf structs
24 */ 24 */
25#define RELAYFS_CHANNEL_VERSION 5 25#define RELAYFS_CHANNEL_VERSION 6
26 26
27/* 27/*
28 * Per-cpu relay channel buffer 28 * Per-cpu relay channel buffer
@@ -60,6 +60,7 @@ struct rchan
60 struct rchan_callbacks *cb; /* client callbacks */ 60 struct rchan_callbacks *cb; /* client callbacks */
61 struct kref kref; /* channel refcount */ 61 struct kref kref; /* channel refcount */
62 void *private_data; /* for user-defined data */ 62 void *private_data; /* for user-defined data */
63 size_t last_toobig; /* tried to log event > subbuf size */
63 struct rchan_buf *buf[NR_CPUS]; /* per-cpu channel buffers */ 64 struct rchan_buf *buf[NR_CPUS]; /* per-cpu channel buffers */
64}; 65};
65 66
diff --git a/include/linux/rmap.h b/include/linux/rmap.h
index 35b30e6c8cf8..33261f1d2239 100644
--- a/include/linux/rmap.h
+++ b/include/linux/rmap.h
@@ -89,7 +89,7 @@ static inline void page_dup_rmap(struct page *page)
89/* 89/*
90 * Called from mm/vmscan.c to handle paging out 90 * Called from mm/vmscan.c to handle paging out
91 */ 91 */
92int page_referenced(struct page *, int is_locked, int ignore_token); 92int page_referenced(struct page *, int is_locked);
93int try_to_unmap(struct page *); 93int try_to_unmap(struct page *);
94 94
95/* 95/*
@@ -109,7 +109,7 @@ unsigned long page_address_in_vma(struct page *, struct vm_area_struct *);
109#define anon_vma_prepare(vma) (0) 109#define anon_vma_prepare(vma) (0)
110#define anon_vma_link(vma) do {} while (0) 110#define anon_vma_link(vma) do {} while (0)
111 111
112#define page_referenced(page,l,i) TestClearPageReferenced(page) 112#define page_referenced(page,l) TestClearPageReferenced(page)
113#define try_to_unmap(page) SWAP_FAIL 113#define try_to_unmap(page) SWAP_FAIL
114 114
115#endif /* CONFIG_MMU */ 115#endif /* CONFIG_MMU */
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index c231e9a08f0b..d50482ba27fe 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -866,6 +866,7 @@ enum rtnetlink_groups {
866#define RTNLGRP_IPV4_MROUTE RTNLGRP_IPV4_MROUTE 866#define RTNLGRP_IPV4_MROUTE RTNLGRP_IPV4_MROUTE
867 RTNLGRP_IPV4_ROUTE, 867 RTNLGRP_IPV4_ROUTE,
868#define RTNLGRP_IPV4_ROUTE RTNLGRP_IPV4_ROUTE 868#define RTNLGRP_IPV4_ROUTE RTNLGRP_IPV4_ROUTE
869 RTNLGRP_NOP1,
869 RTNLGRP_IPV6_IFADDR, 870 RTNLGRP_IPV6_IFADDR,
870#define RTNLGRP_IPV6_IFADDR RTNLGRP_IPV6_IFADDR 871#define RTNLGRP_IPV6_IFADDR RTNLGRP_IPV6_IFADDR
871 RTNLGRP_IPV6_MROUTE, 872 RTNLGRP_IPV6_MROUTE,
@@ -876,8 +877,11 @@ enum rtnetlink_groups {
876#define RTNLGRP_IPV6_IFINFO RTNLGRP_IPV6_IFINFO 877#define RTNLGRP_IPV6_IFINFO RTNLGRP_IPV6_IFINFO
877 RTNLGRP_DECnet_IFADDR, 878 RTNLGRP_DECnet_IFADDR,
878#define RTNLGRP_DECnet_IFADDR RTNLGRP_DECnet_IFADDR 879#define RTNLGRP_DECnet_IFADDR RTNLGRP_DECnet_IFADDR
880 RTNLGRP_NOP2,
879 RTNLGRP_DECnet_ROUTE, 881 RTNLGRP_DECnet_ROUTE,
880#define RTNLGRP_DECnet_ROUTE RTNLGRP_DECnet_ROUTE 882#define RTNLGRP_DECnet_ROUTE RTNLGRP_DECnet_ROUTE
883 RTNLGRP_NOP3,
884 RTNLGRP_NOP4,
881 RTNLGRP_IPV6_PREFIX, 885 RTNLGRP_IPV6_PREFIX,
882#define RTNLGRP_IPV6_PREFIX RTNLGRP_IPV6_PREFIX 886#define RTNLGRP_IPV6_PREFIX RTNLGRP_IPV6_PREFIX
883 __RTNLGRP_MAX 887 __RTNLGRP_MAX
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 2bbf968b23d9..b0ad6f30679e 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -357,7 +357,6 @@ struct mm_struct {
357 /* aio bits */ 357 /* aio bits */
358 rwlock_t ioctx_list_lock; 358 rwlock_t ioctx_list_lock;
359 struct kioctx *ioctx_list; 359 struct kioctx *ioctx_list;
360 struct kioctx default_kioctx;
361}; 360};
362 361
363struct sighand_struct { 362struct sighand_struct {
@@ -909,7 +908,6 @@ do { if (atomic_dec_and_test(&(tsk)->usage)) __put_task_struct(tsk); } while(0)
909#define PF_SYNCWRITE 0x00200000 /* I am doing a sync write */ 908#define PF_SYNCWRITE 0x00200000 /* I am doing a sync write */
910#define PF_BORROWED_MM 0x00400000 /* I am a kthread doing use_mm */ 909#define PF_BORROWED_MM 0x00400000 /* I am a kthread doing use_mm */
911#define PF_RANDOMIZE 0x00800000 /* randomize virtual address space */ 910#define PF_RANDOMIZE 0x00800000 /* randomize virtual address space */
912#define PF_HOTPLUG_CPU 0x01000000 /* Currently performing CPU hotplug */
913 911
914/* 912/*
915 * Only the _current_ task can read/write to tsk->flags, but other 913 * Only the _current_ task can read/write to tsk->flags, but other
@@ -1233,32 +1231,49 @@ static inline void task_unlock(struct task_struct *p)
1233 spin_unlock(&p->alloc_lock); 1231 spin_unlock(&p->alloc_lock);
1234} 1232}
1235 1233
1234#ifndef __HAVE_THREAD_FUNCTIONS
1235
1236#define task_thread_info(task) (task)->thread_info
1237
1238static inline void setup_thread_stack(struct task_struct *p, struct task_struct *org)
1239{
1240 *task_thread_info(p) = *task_thread_info(org);
1241 task_thread_info(p)->task = p;
1242}
1243
1244static inline unsigned long *end_of_stack(struct task_struct *p)
1245{
1246 return (unsigned long *)(p->thread_info + 1);
1247}
1248
1249#endif
1250
1236/* set thread flags in other task's structures 1251/* set thread flags in other task's structures
1237 * - see asm/thread_info.h for TIF_xxxx flags available 1252 * - see asm/thread_info.h for TIF_xxxx flags available
1238 */ 1253 */
1239static inline void set_tsk_thread_flag(struct task_struct *tsk, int flag) 1254static inline void set_tsk_thread_flag(struct task_struct *tsk, int flag)
1240{ 1255{
1241 set_ti_thread_flag(tsk->thread_info,flag); 1256 set_ti_thread_flag(task_thread_info(tsk), flag);
1242} 1257}
1243 1258
1244static inline void clear_tsk_thread_flag(struct task_struct *tsk, int flag) 1259static inline void clear_tsk_thread_flag(struct task_struct *tsk, int flag)
1245{ 1260{
1246 clear_ti_thread_flag(tsk->thread_info,flag); 1261 clear_ti_thread_flag(task_thread_info(tsk), flag);
1247} 1262}
1248 1263
1249static inline int test_and_set_tsk_thread_flag(struct task_struct *tsk, int flag) 1264static inline int test_and_set_tsk_thread_flag(struct task_struct *tsk, int flag)
1250{ 1265{
1251 return test_and_set_ti_thread_flag(tsk->thread_info,flag); 1266 return test_and_set_ti_thread_flag(task_thread_info(tsk), flag);
1252} 1267}
1253 1268
1254static inline int test_and_clear_tsk_thread_flag(struct task_struct *tsk, int flag) 1269static inline int test_and_clear_tsk_thread_flag(struct task_struct *tsk, int flag)
1255{ 1270{
1256 return test_and_clear_ti_thread_flag(tsk->thread_info,flag); 1271 return test_and_clear_ti_thread_flag(task_thread_info(tsk), flag);
1257} 1272}
1258 1273
1259static inline int test_tsk_thread_flag(struct task_struct *tsk, int flag) 1274static inline int test_tsk_thread_flag(struct task_struct *tsk, int flag)
1260{ 1275{
1261 return test_ti_thread_flag(tsk->thread_info,flag); 1276 return test_ti_thread_flag(task_thread_info(tsk), flag);
1262} 1277}
1263 1278
1264static inline void set_tsk_need_resched(struct task_struct *tsk) 1279static inline void set_tsk_need_resched(struct task_struct *tsk)
@@ -1329,12 +1344,12 @@ extern void signal_wake_up(struct task_struct *t, int resume_stopped);
1329 1344
1330static inline unsigned int task_cpu(const struct task_struct *p) 1345static inline unsigned int task_cpu(const struct task_struct *p)
1331{ 1346{
1332 return p->thread_info->cpu; 1347 return task_thread_info(p)->cpu;
1333} 1348}
1334 1349
1335static inline void set_task_cpu(struct task_struct *p, unsigned int cpu) 1350static inline void set_task_cpu(struct task_struct *p, unsigned int cpu)
1336{ 1351{
1337 p->thread_info->cpu = cpu; 1352 task_thread_info(p)->cpu = cpu;
1338} 1353}
1339 1354
1340#else 1355#else
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index a3ac92b19aca..e3710d7e260a 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -121,6 +121,9 @@
121 121
122#define PORT_IP3106 70 122#define PORT_IP3106 70
123 123
124/* Hilscher netx */
125#define PORT_NETX 71
126
124#ifdef __KERNEL__ 127#ifdef __KERNEL__
125 128
126#include <linux/config.h> 129#include <linux/config.h>
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 83010231db99..8c5d6001a923 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -206,6 +206,7 @@ enum {
206 * @nfct: Associated connection, if any 206 * @nfct: Associated connection, if any
207 * @ipvs_property: skbuff is owned by ipvs 207 * @ipvs_property: skbuff is owned by ipvs
208 * @nfctinfo: Relationship of this skb to the connection 208 * @nfctinfo: Relationship of this skb to the connection
209 * @nfct_reasm: netfilter conntrack re-assembly pointer
209 * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c 210 * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c
210 * @tc_index: Traffic control index 211 * @tc_index: Traffic control index
211 * @tc_verd: traffic control verdict 212 * @tc_verd: traffic control verdict
@@ -264,16 +265,14 @@ struct sk_buff {
264 nohdr:1, 265 nohdr:1,
265 nfctinfo:3; 266 nfctinfo:3;
266 __u8 pkt_type:3, 267 __u8 pkt_type:3,
267 fclone:2; 268 fclone:2,
269 ipvs_property:1;
268 __be16 protocol; 270 __be16 protocol;
269 271
270 void (*destructor)(struct sk_buff *skb); 272 void (*destructor)(struct sk_buff *skb);
271#ifdef CONFIG_NETFILTER 273#ifdef CONFIG_NETFILTER
272 __u32 nfmark; 274 __u32 nfmark;
273 struct nf_conntrack *nfct; 275 struct nf_conntrack *nfct;
274#if defined(CONFIG_IP_VS) || defined(CONFIG_IP_VS_MODULE)
275 __u8 ipvs_property:1;
276#endif
277#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) 276#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE)
278 struct sk_buff *nfct_reasm; 277 struct sk_buff *nfct_reasm;
279#endif 278#endif
@@ -1236,8 +1235,7 @@ extern unsigned int datagram_poll(struct file *file, struct socket *sock,
1236extern int skb_copy_datagram_iovec(const struct sk_buff *from, 1235extern int skb_copy_datagram_iovec(const struct sk_buff *from,
1237 int offset, struct iovec *to, 1236 int offset, struct iovec *to,
1238 int size); 1237 int size);
1239extern int skb_copy_and_csum_datagram_iovec(const 1238extern int skb_copy_and_csum_datagram_iovec(struct sk_buff *skb,
1240 struct sk_buff *skb,
1241 int hlen, 1239 int hlen,
1242 struct iovec *iov); 1240 struct iovec *iov);
1243extern void skb_free_datagram(struct sock *sk, struct sk_buff *skb); 1241extern void skb_free_datagram(struct sock *sk, struct sk_buff *skb);
@@ -1305,6 +1303,30 @@ static inline void skb_set_timestamp(struct sk_buff *skb, const struct timeval *
1305 1303
1306extern void __net_timestamp(struct sk_buff *skb); 1304extern void __net_timestamp(struct sk_buff *skb);
1307 1305
1306extern unsigned int __skb_checksum_complete(struct sk_buff *skb);
1307
1308/**
1309 * skb_checksum_complete - Calculate checksum of an entire packet
1310 * @skb: packet to process
1311 *
1312 * This function calculates the checksum over the entire packet plus
1313 * the value of skb->csum. The latter can be used to supply the
1314 * checksum of a pseudo header as used by TCP/UDP. It returns the
1315 * checksum.
1316 *
1317 * For protocols that contain complete checksums such as ICMP/TCP/UDP,
1318 * this function can be used to verify that checksum on received
1319 * packets. In that case the function should return zero if the
1320 * checksum is correct. In particular, this function will return zero
1321 * if skb->ip_summed is CHECKSUM_UNNECESSARY which indicates that the
1322 * hardware has already verified the correctness of the checksum.
1323 */
1324static inline unsigned int skb_checksum_complete(struct sk_buff *skb)
1325{
1326 return skb->ip_summed != CHECKSUM_UNNECESSARY &&
1327 __skb_checksum_complete(skb);
1328}
1329
1308#ifdef CONFIG_NETFILTER 1330#ifdef CONFIG_NETFILTER
1309static inline void nf_conntrack_put(struct nf_conntrack *nfct) 1331static inline void nf_conntrack_put(struct nf_conntrack *nfct)
1310{ 1332{
diff --git a/include/linux/smp_lock.h b/include/linux/smp_lock.h
index b63ce7014093..fa1ff3b165fe 100644
--- a/include/linux/smp_lock.h
+++ b/include/linux/smp_lock.h
@@ -2,11 +2,10 @@
2#define __LINUX_SMPLOCK_H 2#define __LINUX_SMPLOCK_H
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5#ifdef CONFIG_LOCK_KERNEL
5#include <linux/sched.h> 6#include <linux/sched.h>
6#include <linux/spinlock.h> 7#include <linux/spinlock.h>
7 8
8#ifdef CONFIG_LOCK_KERNEL
9
10#define kernel_locked() (current->lock_depth >= 0) 9#define kernel_locked() (current->lock_depth >= 0)
11 10
12extern int __lockfunc __reacquire_kernel_lock(void); 11extern int __lockfunc __reacquire_kernel_lock(void);
diff --git a/include/linux/swap.h b/include/linux/swap.h
index 20c975642cab..508668f840b6 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -239,6 +239,11 @@ static inline void put_swap_token(struct mm_struct *mm)
239 __put_swap_token(mm); 239 __put_swap_token(mm);
240} 240}
241 241
242static inline void disable_swap_token(void)
243{
244 put_swap_token(swap_token_mm);
245}
246
242#else /* CONFIG_SWAP */ 247#else /* CONFIG_SWAP */
243 248
244#define total_swap_pages 0 249#define total_swap_pages 0
@@ -283,6 +288,7 @@ static inline swp_entry_t get_swap_page(void)
283#define put_swap_token(x) do { } while(0) 288#define put_swap_token(x) do { } while(0)
284#define grab_swap_token() do { } while(0) 289#define grab_swap_token() do { } while(0)
285#define has_swap_token(x) 0 290#define has_swap_token(x) 0
291#define disable_swap_token() do { } while(0)
286 292
287#endif /* CONFIG_SWAP */ 293#endif /* CONFIG_SWAP */
288#endif /* __KERNEL__*/ 294#endif /* __KERNEL__*/
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index 22cf5e1ac987..4be34ef8c2f7 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -20,7 +20,6 @@
20 20
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/types.h> 22#include <linux/types.h>
23#include <linux/list.h>
24#include <linux/compiler.h> 23#include <linux/compiler.h>
25 24
26struct file; 25struct file;
@@ -390,6 +389,7 @@ enum
390 NET_TCP_BIC_BETA=108, 389 NET_TCP_BIC_BETA=108,
391 NET_IPV4_ICMP_ERRORS_USE_INBOUND_IFADDR=109, 390 NET_IPV4_ICMP_ERRORS_USE_INBOUND_IFADDR=109,
392 NET_TCP_CONG_CONTROL=110, 391 NET_TCP_CONG_CONTROL=110,
392 NET_TCP_ABC=111,
393}; 393};
394 394
395enum { 395enum {
@@ -670,6 +670,9 @@ enum {
670 NET_DECNET_DST_GC_INTERVAL = 9, 670 NET_DECNET_DST_GC_INTERVAL = 9,
671 NET_DECNET_CONF = 10, 671 NET_DECNET_CONF = 10,
672 NET_DECNET_NO_FC_MAX_CWND = 11, 672 NET_DECNET_NO_FC_MAX_CWND = 11,
673 NET_DECNET_MEM = 12,
674 NET_DECNET_RMEM = 13,
675 NET_DECNET_WMEM = 14,
673 NET_DECNET_DEBUG_LEVEL = 255 676 NET_DECNET_DEBUG_LEVEL = 255
674}; 677};
675 678
@@ -714,6 +717,7 @@ enum {
714 NET_SCTP_PRSCTP_ENABLE = 14, 717 NET_SCTP_PRSCTP_ENABLE = 14,
715 NET_SCTP_SNDBUF_POLICY = 15, 718 NET_SCTP_SNDBUF_POLICY = 15,
716 NET_SCTP_SACK_TIMEOUT = 16, 719 NET_SCTP_SACK_TIMEOUT = 16,
720 NET_SCTP_RCVBUF_POLICY = 17,
717}; 721};
718 722
719/* /proc/sys/net/bridge */ 723/* /proc/sys/net/bridge */
@@ -857,6 +861,7 @@ enum
857}; 861};
858 862
859#ifdef __KERNEL__ 863#ifdef __KERNEL__
864#include <linux/list.h>
860 865
861extern void sysctl_init(void); 866extern void sysctl_init(void);
862 867
diff --git a/include/linux/tcp.h b/include/linux/tcp.h
index ac4ca44c75ca..0e1da6602e05 100644
--- a/include/linux/tcp.h
+++ b/include/linux/tcp.h
@@ -307,6 +307,21 @@ struct tcp_sock {
307 struct tcp_sack_block duplicate_sack[1]; /* D-SACK block */ 307 struct tcp_sack_block duplicate_sack[1]; /* D-SACK block */
308 struct tcp_sack_block selective_acks[4]; /* The SACKS themselves*/ 308 struct tcp_sack_block selective_acks[4]; /* The SACKS themselves*/
309 309
310 struct tcp_sack_block recv_sack_cache[4];
311
312 /* from STCP, retrans queue hinting */
313 struct sk_buff* lost_skb_hint;
314
315 struct sk_buff *scoreboard_skb_hint;
316 struct sk_buff *retransmit_skb_hint;
317 struct sk_buff *forward_skb_hint;
318 struct sk_buff *fastpath_skb_hint;
319
320 int fastpath_cnt_hint;
321 int lost_cnt_hint;
322 int retransmit_cnt_hint;
323 int forward_cnt_hint;
324
310 __u16 advmss; /* Advertised MSS */ 325 __u16 advmss; /* Advertised MSS */
311 __u16 prior_ssthresh; /* ssthresh saved at recovery start */ 326 __u16 prior_ssthresh; /* ssthresh saved at recovery start */
312 __u32 lost_out; /* Lost packets */ 327 __u32 lost_out; /* Lost packets */
@@ -326,6 +341,7 @@ struct tcp_sock {
326 __u32 snd_up; /* Urgent pointer */ 341 __u32 snd_up; /* Urgent pointer */
327 342
328 __u32 total_retrans; /* Total retransmits for entire connection */ 343 __u32 total_retrans; /* Total retransmits for entire connection */
344 __u32 bytes_acked; /* Appropriate Byte Counting - RFC3465 */
329 345
330 unsigned int keepalive_time; /* time before keep alive takes place */ 346 unsigned int keepalive_time; /* time before keep alive takes place */
331 unsigned int keepalive_intvl; /* time interval between keep alive probes */ 347 unsigned int keepalive_intvl; /* time interval between keep alive probes */
diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
index d252f45a0f9b..1c4eb41dbd89 100644
--- a/include/linux/thread_info.h
+++ b/include/linux/thread_info.h
@@ -27,31 +27,6 @@ extern long do_no_restart_syscall(struct restart_block *parm);
27 * - pass TIF_xxxx constants to these functions 27 * - pass TIF_xxxx constants to these functions
28 */ 28 */
29 29
30static inline void set_thread_flag(int flag)
31{
32 set_bit(flag,&current_thread_info()->flags);
33}
34
35static inline void clear_thread_flag(int flag)
36{
37 clear_bit(flag,&current_thread_info()->flags);
38}
39
40static inline int test_and_set_thread_flag(int flag)
41{
42 return test_and_set_bit(flag,&current_thread_info()->flags);
43}
44
45static inline int test_and_clear_thread_flag(int flag)
46{
47 return test_and_clear_bit(flag,&current_thread_info()->flags);
48}
49
50static inline int test_thread_flag(int flag)
51{
52 return test_bit(flag,&current_thread_info()->flags);
53}
54
55static inline void set_ti_thread_flag(struct thread_info *ti, int flag) 30static inline void set_ti_thread_flag(struct thread_info *ti, int flag)
56{ 31{
57 set_bit(flag,&ti->flags); 32 set_bit(flag,&ti->flags);
@@ -77,15 +52,19 @@ static inline int test_ti_thread_flag(struct thread_info *ti, int flag)
77 return test_bit(flag,&ti->flags); 52 return test_bit(flag,&ti->flags);
78} 53}
79 54
80static inline void set_need_resched(void) 55#define set_thread_flag(flag) \
81{ 56 set_ti_thread_flag(current_thread_info(), flag)
82 set_thread_flag(TIF_NEED_RESCHED); 57#define clear_thread_flag(flag) \
83} 58 clear_ti_thread_flag(current_thread_info(), flag)
84 59#define test_and_set_thread_flag(flag) \
85static inline void clear_need_resched(void) 60 test_and_set_ti_thread_flag(current_thread_info(), flag)
86{ 61#define test_and_clear_thread_flag(flag) \
87 clear_thread_flag(TIF_NEED_RESCHED); 62 test_and_clear_ti_thread_flag(current_thread_info(), flag)
88} 63#define test_thread_flag(flag) \
64 test_ti_thread_flag(current_thread_info(), flag)
65
66#define set_need_resched() set_thread_flag(TIF_NEED_RESCHED)
67#define clear_need_resched() clear_thread_flag(TIF_NEED_RESCHED)
89 68
90#endif 69#endif
91 70
diff --git a/include/linux/time.h b/include/linux/time.h
index 8e83f4e778bb..797ccd813bb0 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -95,13 +95,14 @@ struct itimerval;
95extern int do_setitimer(int which, struct itimerval *value, struct itimerval *ovalue); 95extern int do_setitimer(int which, struct itimerval *value, struct itimerval *ovalue);
96extern int do_getitimer(int which, struct itimerval *value); 96extern int do_getitimer(int which, struct itimerval *value);
97extern void getnstimeofday (struct timespec *tv); 97extern void getnstimeofday (struct timespec *tv);
98extern void getnstimestamp(struct timespec *ts);
98 99
99extern struct timespec timespec_trunc(struct timespec t, unsigned gran); 100extern struct timespec timespec_trunc(struct timespec t, unsigned gran);
100 101
101static inline void 102static inline void
102set_normalized_timespec (struct timespec *ts, time_t sec, long nsec) 103set_normalized_timespec (struct timespec *ts, time_t sec, long nsec)
103{ 104{
104 while (nsec > NSEC_PER_SEC) { 105 while (nsec >= NSEC_PER_SEC) {
105 nsec -= NSEC_PER_SEC; 106 nsec -= NSEC_PER_SEC;
106 ++sec; 107 ++sec;
107 } 108 }
diff --git a/include/linux/uinput.h b/include/linux/uinput.h
index 84876077027f..0ff7ca68e5c5 100644
--- a/include/linux/uinput.h
+++ b/include/linux/uinput.h
@@ -34,8 +34,7 @@
34#define UINPUT_BUFFER_SIZE 16 34#define UINPUT_BUFFER_SIZE 16
35#define UINPUT_NUM_REQUESTS 16 35#define UINPUT_NUM_REQUESTS 16
36 36
37/* state flags => bit index for {set|clear|test}_bit ops */ 37enum uinput_state { UIST_NEW_DEVICE, UIST_SETUP_COMPLETE, UIST_CREATED };
38#define UIST_CREATED 0
39 38
40struct uinput_request { 39struct uinput_request {
41 int id; 40 int id;
@@ -52,11 +51,12 @@ struct uinput_request {
52 51
53struct uinput_device { 52struct uinput_device {
54 struct input_dev *dev; 53 struct input_dev *dev;
55 unsigned long state; 54 struct semaphore sem;
55 enum uinput_state state;
56 wait_queue_head_t waitq; 56 wait_queue_head_t waitq;
57 unsigned char ready, 57 unsigned char ready;
58 head, 58 unsigned char head;
59 tail; 59 unsigned char tail;
60 struct input_event buff[UINPUT_BUFFER_SIZE]; 60 struct input_event buff[UINPUT_BUFFER_SIZE];
61 61
62 struct uinput_request *requests[UINPUT_NUM_REQUESTS]; 62 struct uinput_request *requests[UINPUT_NUM_REQUESTS];
@@ -91,6 +91,7 @@ struct uinput_ff_erase {
91#define UI_SET_SNDBIT _IOW(UINPUT_IOCTL_BASE, 106, int) 91#define UI_SET_SNDBIT _IOW(UINPUT_IOCTL_BASE, 106, int)
92#define UI_SET_FFBIT _IOW(UINPUT_IOCTL_BASE, 107, int) 92#define UI_SET_FFBIT _IOW(UINPUT_IOCTL_BASE, 107, int)
93#define UI_SET_PHYS _IOW(UINPUT_IOCTL_BASE, 108, char*) 93#define UI_SET_PHYS _IOW(UINPUT_IOCTL_BASE, 108, char*)
94#define UI_SET_SWBIT _IOW(UINPUT_IOCTL_BASE, 109, int)
94 95
95#define UI_BEGIN_FF_UPLOAD _IOWR(UINPUT_IOCTL_BASE, 200, struct uinput_ff_upload) 96#define UI_BEGIN_FF_UPLOAD _IOWR(UINPUT_IOCTL_BASE, 200, struct uinput_ff_upload)
96#define UI_END_FF_UPLOAD _IOW(UINPUT_IOCTL_BASE, 201, struct uinput_ff_upload) 97#define UI_END_FF_UPLOAD _IOW(UINPUT_IOCTL_BASE, 201, struct uinput_ff_upload)
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 748d04385256..d81b050e5955 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -47,6 +47,7 @@ struct usb_driver;
47 * @urb_list: urbs queued to this endpoint; maintained by usbcore 47 * @urb_list: urbs queued to this endpoint; maintained by usbcore
48 * @hcpriv: for use by HCD; typically holds hardware dma queue head (QH) 48 * @hcpriv: for use by HCD; typically holds hardware dma queue head (QH)
49 * with one or more transfer descriptors (TDs) per urb 49 * with one or more transfer descriptors (TDs) per urb
50 * @kobj: kobject for sysfs info
50 * @extra: descriptors following this endpoint in the configuration 51 * @extra: descriptors following this endpoint in the configuration
51 * @extralen: how many bytes of "extra" are valid 52 * @extralen: how many bytes of "extra" are valid
52 * 53 *
@@ -819,7 +820,7 @@ typedef void (*usb_complete_t)(struct urb *, struct pt_regs *);
819 */ 820 */
820struct urb 821struct urb
821{ 822{
822 /* private, usb core and host controller only fields in the urb */ 823 /* private: usb core and host controller only fields in the urb */
823 struct kref kref; /* reference count of the URB */ 824 struct kref kref; /* reference count of the URB */
824 spinlock_t lock; /* lock for the URB */ 825 spinlock_t lock; /* lock for the URB */
825 void *hcpriv; /* private data for host controller */ 826 void *hcpriv; /* private data for host controller */
@@ -827,7 +828,7 @@ struct urb
827 atomic_t use_count; /* concurrent submissions counter */ 828 atomic_t use_count; /* concurrent submissions counter */
828 u8 reject; /* submissions will fail */ 829 u8 reject; /* submissions will fail */
829 830
830 /* public, documented fields in the urb that can be used by drivers */ 831 /* public: documented fields in the urb that can be used by drivers */
831 struct list_head urb_list; /* list head for use by the urb's 832 struct list_head urb_list; /* list head for use by the urb's
832 * current owner */ 833 * current owner */
833 struct usb_device *dev; /* (in) pointer to associated device */ 834 struct usb_device *dev; /* (in) pointer to associated device */
@@ -1045,7 +1046,7 @@ struct usb_sg_request {
1045 size_t bytes; 1046 size_t bytes;
1046 1047
1047 /* 1048 /*
1048 * members below are private to usbcore, 1049 * members below are private: to usbcore,
1049 * and are not provided for driver access! 1050 * and are not provided for driver access!
1050 */ 1051 */
1051 spinlock_t lock; 1052 spinlock_t lock;
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index a114fff6568b..1cded681eb6d 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -636,6 +636,7 @@ typedef __u64 v4l2_std_id;
636#define V4L2_STD_SECAM_K ((v4l2_std_id)0x00100000) 636#define V4L2_STD_SECAM_K ((v4l2_std_id)0x00100000)
637#define V4L2_STD_SECAM_K1 ((v4l2_std_id)0x00200000) 637#define V4L2_STD_SECAM_K1 ((v4l2_std_id)0x00200000)
638#define V4L2_STD_SECAM_L ((v4l2_std_id)0x00400000) 638#define V4L2_STD_SECAM_L ((v4l2_std_id)0x00400000)
639#define V4L2_STD_SECAM_LC ((v4l2_std_id)0x00800000)
639 640
640/* ATSC/HDTV */ 641/* ATSC/HDTV */
641#define V4L2_STD_ATSC_8_VSB ((v4l2_std_id)0x01000000) 642#define V4L2_STD_ATSC_8_VSB ((v4l2_std_id)0x01000000)
diff --git a/include/media/ir-common.h b/include/media/ir-common.h
index 0f1ba95ec8d6..ad3e9bb670c3 100644
--- a/include/media/ir-common.h
+++ b/include/media/ir-common.h
@@ -49,6 +49,7 @@ struct ir_input_state {
49 49
50extern IR_KEYTAB_TYPE ir_codes_rc5_tv[IR_KEYTAB_SIZE]; 50extern IR_KEYTAB_TYPE ir_codes_rc5_tv[IR_KEYTAB_SIZE];
51extern IR_KEYTAB_TYPE ir_codes_winfast[IR_KEYTAB_SIZE]; 51extern IR_KEYTAB_TYPE ir_codes_winfast[IR_KEYTAB_SIZE];
52extern IR_KEYTAB_TYPE ir_codes_pinnacle[IR_KEYTAB_SIZE];
52extern IR_KEYTAB_TYPE ir_codes_empty[IR_KEYTAB_SIZE]; 53extern IR_KEYTAB_TYPE ir_codes_empty[IR_KEYTAB_SIZE];
53extern IR_KEYTAB_TYPE ir_codes_hauppauge_new[IR_KEYTAB_SIZE]; 54extern IR_KEYTAB_TYPE ir_codes_hauppauge_new[IR_KEYTAB_SIZE];
54extern IR_KEYTAB_TYPE ir_codes_pixelview[IR_KEYTAB_SIZE]; 55extern IR_KEYTAB_TYPE ir_codes_pixelview[IR_KEYTAB_SIZE];
diff --git a/include/media/ir-kbd-i2c.h b/include/media/ir-kbd-i2c.h
index 00fa57eb9fde..730f21ed91db 100644
--- a/include/media/ir-kbd-i2c.h
+++ b/include/media/ir-kbd-i2c.h
@@ -19,4 +19,6 @@ struct IR_i2c {
19 char phys[32]; 19 char phys[32];
20 int (*get_key)(struct IR_i2c*, u32*, u32*); 20 int (*get_key)(struct IR_i2c*, u32*, u32*);
21}; 21};
22
23int get_key_pinnacle(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw);
22#endif 24#endif
diff --git a/include/media/saa7146.h b/include/media/saa7146.h
index 2a897c3a6a9a..e5be2b9b846b 100644
--- a/include/media/saa7146.h
+++ b/include/media/saa7146.h
@@ -14,7 +14,7 @@
14#include <linux/vmalloc.h> /* for vmalloc() */ 14#include <linux/vmalloc.h> /* for vmalloc() */
15#include <linux/mm.h> /* for vmalloc_to_page() */ 15#include <linux/mm.h> /* for vmalloc_to_page() */
16 16
17#define SAA7146_VERSION_CODE 0x000500 /* 0.5.0 */ 17#define SAA7146_VERSION_CODE 0x000500 /* 0.5.0 */
18 18
19#define saa7146_write(sxy,adr,dat) writel((dat),(sxy->mem+(adr))) 19#define saa7146_write(sxy,adr,dat) writel((dat),(sxy->mem+(adr)))
20#define saa7146_read(sxy,adr) readl(sxy->mem+(adr)) 20#define saa7146_read(sxy,adr) readl(sxy->mem+(adr))
@@ -112,7 +112,7 @@ struct saa7146_dev
112 112
113 /* different device locks */ 113 /* different device locks */
114 spinlock_t slock; 114 spinlock_t slock;
115 struct semaphore lock; 115 struct semaphore lock;
116 116
117 unsigned char __iomem *mem; /* pointer to mapped IO memory */ 117 unsigned char __iomem *mem; /* pointer to mapped IO memory */
118 int revision; /* chip revision; needed for bug-workarounds*/ 118 int revision; /* chip revision; needed for bug-workarounds*/
@@ -133,7 +133,7 @@ struct saa7146_dev
133 void (*vv_callback)(struct saa7146_dev *dev, unsigned long status); 133 void (*vv_callback)(struct saa7146_dev *dev, unsigned long status);
134 134
135 /* i2c-stuff */ 135 /* i2c-stuff */
136 struct semaphore i2c_lock; 136 struct semaphore i2c_lock;
137 u32 i2c_bitrate; 137 u32 i2c_bitrate;
138 struct saa7146_dma d_i2c; /* pointer to i2c memory */ 138 struct saa7146_dma d_i2c; /* pointer to i2c memory */
139 wait_queue_head_t i2c_wq; 139 wait_queue_head_t i2c_wq;
diff --git a/include/media/saa7146_vv.h b/include/media/saa7146_vv.h
index 64691753721e..16af9299315f 100644
--- a/include/media/saa7146_vv.h
+++ b/include/media/saa7146_vv.h
@@ -113,7 +113,7 @@ struct saa7146_vv
113 /* vbi capture */ 113 /* vbi capture */
114 struct saa7146_dmaqueue vbi_q; 114 struct saa7146_dmaqueue vbi_q;
115 /* vbi workaround interrupt queue */ 115 /* vbi workaround interrupt queue */
116 wait_queue_head_t vbi_wq; 116 wait_queue_head_t vbi_wq;
117 int vbi_fieldcount; 117 int vbi_fieldcount;
118 struct saa7146_fh *vbi_streaming; 118 struct saa7146_fh *vbi_streaming;
119 119
@@ -181,10 +181,10 @@ struct saa7146_ext_vv
181}; 181};
182 182
183struct saa7146_use_ops { 183struct saa7146_use_ops {
184 void (*init)(struct saa7146_dev *, struct saa7146_vv *); 184 void (*init)(struct saa7146_dev *, struct saa7146_vv *);
185 int(*open)(struct saa7146_dev *, struct file *); 185 int(*open)(struct saa7146_dev *, struct file *);
186 void (*release)(struct saa7146_dev *, struct file *); 186 void (*release)(struct saa7146_dev *, struct file *);
187 void (*irq_done)(struct saa7146_dev *, unsigned long status); 187 void (*irq_done)(struct saa7146_dev *, unsigned long status);
188 ssize_t (*read)(struct file *, char __user *, size_t, loff_t *); 188 ssize_t (*read)(struct file *, char __user *, size_t, loff_t *);
189}; 189};
190 190
diff --git a/include/media/tuner.h b/include/media/tuner.h
index 9184e534b7ef..faa0f8e3091b 100644
--- a/include/media/tuner.h
+++ b/include/media/tuner.h
@@ -113,6 +113,7 @@
113#define TUNER_PHILIPS_TD1316 67 113#define TUNER_PHILIPS_TD1316 67
114 114
115#define TUNER_PHILIPS_TUV1236D 68 /* ATI HDTV Wonder */ 115#define TUNER_PHILIPS_TUV1236D 68 /* ATI HDTV Wonder */
116#define TUNER_TNF_5335MF 69 /* Sabrent Bt848 */
116 117
117#define NOTUNER 0 118#define NOTUNER 0
118#define PAL 1 /* PAL_BG */ 119#define PAL 1 /* PAL_BG */
diff --git a/include/media/tveeprom.h b/include/media/tveeprom.h
index e2035c7da094..e9fc1a785497 100644
--- a/include/media/tveeprom.h
+++ b/include/media/tveeprom.h
@@ -4,12 +4,15 @@
4struct tveeprom { 4struct tveeprom {
5 u32 has_radio; 5 u32 has_radio;
6 u32 has_ir; /* 0: no IR, 1: IR present, 2: unknown */ 6 u32 has_ir; /* 0: no IR, 1: IR present, 2: unknown */
7 u32 has_MAC_address; /* 0: no MAC, 1: MAC present, 2: unknown */
7 8
8 u32 tuner_type; 9 u32 tuner_type;
9 u32 tuner_formats; 10 u32 tuner_formats;
11 u32 tuner_hauppauge_model;
10 12
11 u32 tuner2_type; 13 u32 tuner2_type;
12 u32 tuner2_formats; 14 u32 tuner2_formats;
15 u32 tuner2_hauppauge_model;
13 16
14 u32 digitizer; 17 u32 digitizer;
15 u32 digitizer_formats; 18 u32 digitizer_formats;
@@ -21,6 +24,7 @@ struct tveeprom {
21 u32 revision; 24 u32 revision;
22 u32 serial_number; 25 u32 serial_number;
23 char rev_str[5]; 26 char rev_str[5];
27 u8 MAC_address[6];
24}; 28};
25 29
26void tveeprom_hauppauge_analog(struct i2c_client *c, struct tveeprom *tvee, 30void tveeprom_hauppauge_analog(struct i2c_client *c, struct tveeprom *tvee,
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h
new file mode 100644
index 000000000000..d3fd48157eb8
--- /dev/null
+++ b/include/media/v4l2-common.h
@@ -0,0 +1,110 @@
1/*
2 v4l2 common internal API header
3
4 This header contains internal shared ioctl definitions for use by the
5 internal low-level v4l2 drivers.
6 Each ioctl begins with VIDIOC_INT_ to clearly mark that it is an internal
7 define,
8
9 Copyright (C) 2005 Hans Verkuil <hverkuil@xs4all.nl>
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25
26#ifndef V4L2_COMMON_H_
27#define V4L2_COMMON_H_
28
29/* VIDIOC_INT_AUDIO_CLOCK_FREQ */
30enum v4l2_audio_clock_freq {
31 V4L2_AUDCLK_32_KHZ = 32000,
32 V4L2_AUDCLK_441_KHZ = 44100,
33 V4L2_AUDCLK_48_KHZ = 48000,
34};
35
36/* VIDIOC_INT_G_REGISTER and VIDIOC_INT_S_REGISTER */
37struct v4l2_register {
38 u32 i2c_id; /* I2C driver ID of the I2C chip. 0 for the I2C adapter. */
39 unsigned long reg;
40 u32 val;
41};
42
43/* VIDIOC_INT_DECODE_VBI_LINE */
44struct v4l2_decode_vbi_line {
45 u32 is_second_field; /* Set to 0 for the first (odd) field,
46 set to 1 for the second (even) field. */
47 u8 *p; /* Pointer to the sliced VBI data from the decoder.
48 On exit points to the start of the payload. */
49 u32 line; /* Line number of the sliced VBI data (1-23) */
50 u32 type; /* VBI service type (V4L2_SLICED_*). 0 if no service found */
51};
52
53/* VIDIOC_INT_G_CHIP_IDENT: identifies the actual chip installed on the board */
54enum v4l2_chip_ident {
55 /* general idents: reserved range 0-49 */
56 V4L2_IDENT_UNKNOWN = 0,
57
58 /* module saa7115: reserved range 100-149 */
59 V4L2_IDENT_SAA7114 = 104,
60 V4L2_IDENT_SAA7115 = 105,
61
62 /* module saa7127: reserved range 150-199 */
63 V4L2_IDENT_SAA7127 = 157,
64 V4L2_IDENT_SAA7129 = 159,
65
66 /* module cx25840: reserved range 200-249 */
67 V4L2_IDENT_CX25840 = 240,
68 V4L2_IDENT_CX25841 = 241,
69 V4L2_IDENT_CX25842 = 242,
70 V4L2_IDENT_CX25843 = 243,
71};
72
73/* only implemented if CONFIG_VIDEO_ADV_DEBUG is defined */
74#define VIDIOC_INT_S_REGISTER _IOR ('d', 100, struct v4l2_register)
75#define VIDIOC_INT_G_REGISTER _IOWR('d', 101, struct v4l2_register)
76
77/* Reset the I2C chip */
78#define VIDIOC_INT_RESET _IO ('d', 102)
79
80/* Set the frequency of the audio clock output.
81 Used to slave an audio processor to the video decoder, ensuring that audio
82 and video remain synchronized. */
83#define VIDIOC_INT_AUDIO_CLOCK_FREQ _IOR ('d', 103, enum v4l2_audio_clock_freq)
84
85/* Video decoders that support sliced VBI need to implement this ioctl.
86 Field p of the v4l2_sliced_vbi_line struct is set to the start of the VBI
87 data that was generated by the decoder. The driver then parses the sliced
88 VBI data and sets the other fields in the struct accordingly. The pointer p
89 is updated to point to the start of the payload which can be copied
90 verbatim into the data field of the v4l2_sliced_vbi_data struct. If no
91 valid VBI data was found, then the type field is set to 0 on return. */
92#define VIDIOC_INT_DECODE_VBI_LINE _IOWR('d', 104, struct v4l2_decode_vbi_line)
93
94/* Used to generate VBI signals on a video signal. v4l2_sliced_vbi_data is
95 filled with the data packets that should be output. Note that if you set
96 the line field to 0, then that VBI signal is disabled. */
97#define VIDIOC_INT_S_VBI_DATA _IOW ('d', 105, struct v4l2_sliced_vbi_data)
98
99/* Used to obtain the sliced VBI packet from a readback register. Not all
100 video decoders support this. If no data is available because the readback
101 register contains invalid or erroneous data -EIO is returned. Note that
102 you must fill in the 'id' member and the 'field' member (to determine
103 whether CC data from the first or second field should be obtained). */
104#define VIDIOC_INT_G_VBI_DATA _IOWR('d', 106, struct v4l2_sliced_vbi_data *)
105
106/* Returns the chip identifier or V4L2_IDENT_UNKNOWN if no identification can
107 be made. */
108#define VIDIOC_INT_G_CHIP_IDENT _IOR ('d', 107, enum v4l2_chip_ident *)
109
110#endif /* V4L2_COMMON_H_ */
diff --git a/include/net/dn.h b/include/net/dn.h
index c1dbbd222793..a4b6168e1e25 100644
--- a/include/net/dn.h
+++ b/include/net/dn.h
@@ -234,4 +234,8 @@ extern int decnet_di_count;
234extern int decnet_dr_count; 234extern int decnet_dr_count;
235extern int decnet_no_fc_max_cwnd; 235extern int decnet_no_fc_max_cwnd;
236 236
237extern int sysctl_decnet_mem[3];
238extern int sysctl_decnet_wmem[3];
239extern int sysctl_decnet_rmem[3];
240
237#endif /* _NET_DN_H */ 241#endif /* _NET_DN_H */
diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h
index b93fd8c1d884..cde2f4f4f501 100644
--- a/include/net/ieee80211.h
+++ b/include/net/ieee80211.h
@@ -1042,7 +1042,7 @@ static inline u8 *ieee80211_get_payload(struct ieee80211_hdr *hdr)
1042 case IEEE80211_4ADDR_LEN: 1042 case IEEE80211_4ADDR_LEN:
1043 return ((struct ieee80211_hdr_4addr *)hdr)->payload; 1043 return ((struct ieee80211_hdr_4addr *)hdr)->payload;
1044 } 1044 }
1045 1045 return NULL;
1046} 1046}
1047 1047
1048static inline int ieee80211_is_ofdm_rate(u8 rate) 1048static inline int ieee80211_is_ofdm_rate(u8 rate)
diff --git a/include/net/if_inet6.h b/include/net/if_inet6.h
index e97a9accb71d..eb8afe3499a9 100644
--- a/include/net/if_inet6.h
+++ b/include/net/if_inet6.h
@@ -24,6 +24,7 @@
24#define IF_RA_MANAGED 0x40 24#define IF_RA_MANAGED 0x40
25#define IF_RA_RCVD 0x20 25#define IF_RA_RCVD 0x20
26#define IF_RS_SENT 0x10 26#define IF_RS_SENT 0x10
27#define IF_READY 0x80000000
27 28
28/* prefix flags */ 29/* prefix flags */
29#define IF_PREFIX_ONLINK 0x01 30#define IF_PREFIX_ONLINK 0x01
@@ -82,6 +83,7 @@ struct ipv6_mc_socklist
82 struct in6_addr addr; 83 struct in6_addr addr;
83 int ifindex; 84 int ifindex;
84 struct ipv6_mc_socklist *next; 85 struct ipv6_mc_socklist *next;
86 rwlock_t sflock;
85 unsigned int sfmode; /* MCAST_{INCLUDE,EXCLUDE} */ 87 unsigned int sfmode; /* MCAST_{INCLUDE,EXCLUDE} */
86 struct ip6_sf_socklist *sflist; 88 struct ip6_sf_socklist *sflist;
87}; 89};
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index 6addb4d464d6..0a2ad51cff82 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -237,6 +237,8 @@ extern struct ipv6_txoptions * ipv6_renew_options(struct sock *sk, struct ipv6_t
237 int newtype, 237 int newtype,
238 struct ipv6_opt_hdr __user *newopt, 238 struct ipv6_opt_hdr __user *newopt,
239 int newoptlen); 239 int newoptlen);
240struct ipv6_txoptions *ipv6_fixup_options(struct ipv6_txoptions *opt_space,
241 struct ipv6_txoptions *opt);
240 242
241extern int ip6_frag_nqueues; 243extern int ip6_frag_nqueues;
242extern atomic_t ip6_frag_mem; 244extern atomic_t ip6_frag_mem;
diff --git a/include/net/llc_pdu.h b/include/net/llc_pdu.h
index c7a959428b4f..8f6306581fa7 100644
--- a/include/net/llc_pdu.h
+++ b/include/net/llc_pdu.h
@@ -357,7 +357,7 @@ static inline void llc_pdu_init_as_test_rsp(struct sk_buff *skb,
357 357
358/* LLC Type 1 XID command/response information fields format */ 358/* LLC Type 1 XID command/response information fields format */
359struct llc_xid_info { 359struct llc_xid_info {
360 u8 fmt_id; /* always 0x18 for LLC */ 360 u8 fmt_id; /* always 0x81 for LLC */
361 u8 type; /* different if NULL/non-NULL LSAP */ 361 u8 type; /* different if NULL/non-NULL LSAP */
362 u8 rw; /* sender receive window */ 362 u8 rw; /* sender receive window */
363}; 363};
diff --git a/include/net/route.h b/include/net/route.h
index dbe79ca67d31..e3e5436f8017 100644
--- a/include/net/route.h
+++ b/include/net/route.h
@@ -126,6 +126,9 @@ extern int ip_rt_ioctl(unsigned int cmd, void __user *arg);
126extern void ip_rt_get_source(u8 *src, struct rtable *rt); 126extern void ip_rt_get_source(u8 *src, struct rtable *rt);
127extern int ip_rt_dump(struct sk_buff *skb, struct netlink_callback *cb); 127extern int ip_rt_dump(struct sk_buff *skb, struct netlink_callback *cb);
128 128
129struct in_ifaddr;
130extern void fib_add_ifaddr(struct in_ifaddr *);
131
129static inline void ip_rt_put(struct rtable * rt) 132static inline void ip_rt_put(struct rtable * rt)
130{ 133{
131 if (rt) 134 if (rt)
diff --git a/include/net/sctp/command.h b/include/net/sctp/command.h
index dc107ffad483..34a1a09e5aef 100644
--- a/include/net/sctp/command.h
+++ b/include/net/sctp/command.h
@@ -120,6 +120,7 @@ typedef union {
120 int error; 120 int error;
121 sctp_state_t state; 121 sctp_state_t state;
122 sctp_event_timeout_t to; 122 sctp_event_timeout_t to;
123 unsigned long zero;
123 void *ptr; 124 void *ptr;
124 struct sctp_chunk *chunk; 125 struct sctp_chunk *chunk;
125 struct sctp_association *asoc; 126 struct sctp_association *asoc;
@@ -148,17 +149,17 @@ static inline sctp_arg_t SCTP_NULL(void)
148} 149}
149static inline sctp_arg_t SCTP_NOFORCE(void) 150static inline sctp_arg_t SCTP_NOFORCE(void)
150{ 151{
151 sctp_arg_t retval; retval.i32 = 0; return retval; 152 sctp_arg_t retval = {.zero = 0UL}; retval.i32 = 0; return retval;
152} 153}
153static inline sctp_arg_t SCTP_FORCE(void) 154static inline sctp_arg_t SCTP_FORCE(void)
154{ 155{
155 sctp_arg_t retval; retval.i32 = 1; return retval; 156 sctp_arg_t retval = {.zero = 0UL}; retval.i32 = 1; return retval;
156} 157}
157 158
158#define SCTP_ARG_CONSTRUCTOR(name, type, elt) \ 159#define SCTP_ARG_CONSTRUCTOR(name, type, elt) \
159static inline sctp_arg_t \ 160static inline sctp_arg_t \
160SCTP_## name (type arg) \ 161SCTP_## name (type arg) \
161{ sctp_arg_t retval; retval.elt = arg; return retval; } 162{ sctp_arg_t retval = {.zero = 0UL}; retval.elt = arg; return retval; }
162 163
163SCTP_ARG_CONSTRUCTOR(I32, __s32, i32) 164SCTP_ARG_CONSTRUCTOR(I32, __s32, i32)
164SCTP_ARG_CONSTRUCTOR(U32, __u32, u32) 165SCTP_ARG_CONSTRUCTOR(U32, __u32, u32)
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index 9c385b6417c7..8e7794ee27ff 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -161,6 +161,13 @@ extern struct sctp_globals {
161 */ 161 */
162 int sndbuf_policy; 162 int sndbuf_policy;
163 163
164 /*
165 * Policy for preforming sctp/socket accounting
166 * 0 - do socket level accounting, all assocs share sk_rcvbuf
167 * 1 - do sctp accounting, each asoc may use sk_rcvbuf bytes
168 */
169 int rcvbuf_policy;
170
164 /* Delayed SACK timeout 200ms default*/ 171 /* Delayed SACK timeout 200ms default*/
165 int sack_timeout; 172 int sack_timeout;
166 173
@@ -218,6 +225,7 @@ extern struct sctp_globals {
218#define sctp_cookie_preserve_enable (sctp_globals.cookie_preserve_enable) 225#define sctp_cookie_preserve_enable (sctp_globals.cookie_preserve_enable)
219#define sctp_max_retrans_association (sctp_globals.max_retrans_association) 226#define sctp_max_retrans_association (sctp_globals.max_retrans_association)
220#define sctp_sndbuf_policy (sctp_globals.sndbuf_policy) 227#define sctp_sndbuf_policy (sctp_globals.sndbuf_policy)
228#define sctp_rcvbuf_policy (sctp_globals.rcvbuf_policy)
221#define sctp_max_retrans_path (sctp_globals.max_retrans_path) 229#define sctp_max_retrans_path (sctp_globals.max_retrans_path)
222#define sctp_max_retrans_init (sctp_globals.max_retrans_init) 230#define sctp_max_retrans_init (sctp_globals.max_retrans_init)
223#define sctp_sack_timeout (sctp_globals.sack_timeout) 231#define sctp_sack_timeout (sctp_globals.sack_timeout)
@@ -1222,11 +1230,11 @@ struct sctp_endpoint {
1222 int last_key; 1230 int last_key;
1223 int key_changed_at; 1231 int key_changed_at;
1224 1232
1225 /* Default timeouts. */
1226 int timeouts[SCTP_NUM_TIMEOUT_TYPES];
1227
1228 /* sendbuf acct. policy. */ 1233 /* sendbuf acct. policy. */
1229 __u32 sndbuf_policy; 1234 __u32 sndbuf_policy;
1235
1236 /* rcvbuf acct. policy. */
1237 __u32 rcvbuf_policy;
1230}; 1238};
1231 1239
1232/* Recover the outter endpoint structure. */ 1240/* Recover the outter endpoint structure. */
@@ -1553,6 +1561,11 @@ struct sctp_association {
1553 */ 1561 */
1554 int sndbuf_used; 1562 int sndbuf_used;
1555 1563
1564 /* This is the amount of memory that this association has allocated
1565 * in the receive path at any given time.
1566 */
1567 atomic_t rmem_alloc;
1568
1556 /* This is the wait queue head for send requests waiting on 1569 /* This is the wait queue head for send requests waiting on
1557 * the association sndbuf space. 1570 * the association sndbuf space.
1558 */ 1571 */
diff --git a/include/net/sock.h b/include/net/sock.h
index ff13c4cc287a..982b4ecd187b 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -1247,6 +1247,12 @@ static inline struct page *sk_stream_alloc_page(struct sock *sk)
1247 (skb != (struct sk_buff *)&(sk)->sk_write_queue); \ 1247 (skb != (struct sk_buff *)&(sk)->sk_write_queue); \
1248 skb = skb->next) 1248 skb = skb->next)
1249 1249
1250/*from STCP for fast SACK Process*/
1251#define sk_stream_for_retrans_queue_from(skb, sk) \
1252 for (; (skb != (sk)->sk_send_head) && \
1253 (skb != (struct sk_buff *)&(sk)->sk_write_queue); \
1254 skb = skb->next)
1255
1250/* 1256/*
1251 * Default write policy as shown to user space via poll/select/SIGIO 1257 * Default write policy as shown to user space via poll/select/SIGIO
1252 */ 1258 */
diff --git a/include/net/tcp.h b/include/net/tcp.h
index c24339c4e310..d78025f9fbea 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -27,6 +27,7 @@
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/cache.h> 28#include <linux/cache.h>
29#include <linux/percpu.h> 29#include <linux/percpu.h>
30#include <linux/skbuff.h>
30 31
31#include <net/inet_connection_sock.h> 32#include <net/inet_connection_sock.h>
32#include <net/inet_timewait_sock.h> 33#include <net/inet_timewait_sock.h>
@@ -88,10 +89,10 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo);
88 */ 89 */
89 90
90#define TCP_SYN_RETRIES 5 /* number of times to retry active opening a 91#define TCP_SYN_RETRIES 5 /* number of times to retry active opening a
91 * connection: ~180sec is RFC minumum */ 92 * connection: ~180sec is RFC minimum */
92 93
93#define TCP_SYNACK_RETRIES 5 /* number of times to retry passive opening a 94#define TCP_SYNACK_RETRIES 5 /* number of times to retry passive opening a
94 * connection: ~180sec is RFC minumum */ 95 * connection: ~180sec is RFC minimum */
95 96
96 97
97#define TCP_ORPHAN_RETRIES 7 /* number of times to retry on an orphaned 98#define TCP_ORPHAN_RETRIES 7 /* number of times to retry on an orphaned
@@ -179,7 +180,7 @@ extern void tcp_time_wait(struct sock *sk, int state, int timeo);
179/* Flags in tp->nonagle */ 180/* Flags in tp->nonagle */
180#define TCP_NAGLE_OFF 1 /* Nagle's algo is disabled */ 181#define TCP_NAGLE_OFF 1 /* Nagle's algo is disabled */
181#define TCP_NAGLE_CORK 2 /* Socket is corked */ 182#define TCP_NAGLE_CORK 2 /* Socket is corked */
182#define TCP_NAGLE_PUSH 4 /* Cork is overriden for already queued data */ 183#define TCP_NAGLE_PUSH 4 /* Cork is overridden for already queued data */
183 184
184extern struct inet_timewait_death_row tcp_death_row; 185extern struct inet_timewait_death_row tcp_death_row;
185 186
@@ -217,6 +218,7 @@ extern int sysctl_tcp_low_latency;
217extern int sysctl_tcp_nometrics_save; 218extern int sysctl_tcp_nometrics_save;
218extern int sysctl_tcp_moderate_rcvbuf; 219extern int sysctl_tcp_moderate_rcvbuf;
219extern int sysctl_tcp_tso_win_divisor; 220extern int sysctl_tcp_tso_win_divisor;
221extern int sysctl_tcp_abc;
220 222
221extern atomic_t tcp_memory_allocated; 223extern atomic_t tcp_memory_allocated;
222extern atomic_t tcp_sockets_allocated; 224extern atomic_t tcp_sockets_allocated;
@@ -550,13 +552,13 @@ extern u32 __tcp_select_window(struct sock *sk);
550 552
551/* TCP timestamps are only 32-bits, this causes a slight 553/* TCP timestamps are only 32-bits, this causes a slight
552 * complication on 64-bit systems since we store a snapshot 554 * complication on 64-bit systems since we store a snapshot
553 * of jiffies in the buffer control blocks below. We decidely 555 * of jiffies in the buffer control blocks below. We decided
554 * only use of the low 32-bits of jiffies and hide the ugly 556 * to use only the low 32-bits of jiffies and hide the ugly
555 * casts with the following macro. 557 * casts with the following macro.
556 */ 558 */
557#define tcp_time_stamp ((__u32)(jiffies)) 559#define tcp_time_stamp ((__u32)(jiffies))
558 560
559/* This is what the send packet queueing engine uses to pass 561/* This is what the send packet queuing engine uses to pass
560 * TCP per-packet control information to the transmission 562 * TCP per-packet control information to the transmission
561 * code. We also store the host-order sequence numbers in 563 * code. We also store the host-order sequence numbers in
562 * here too. This is 36 bytes on 32-bit architectures, 564 * here too. This is 36 bytes on 32-bit architectures,
@@ -596,7 +598,7 @@ struct tcp_skb_cb {
596#define TCPCB_EVER_RETRANS 0x80 /* Ever retransmitted frame */ 598#define TCPCB_EVER_RETRANS 0x80 /* Ever retransmitted frame */
597#define TCPCB_RETRANS (TCPCB_SACKED_RETRANS|TCPCB_EVER_RETRANS) 599#define TCPCB_RETRANS (TCPCB_SACKED_RETRANS|TCPCB_EVER_RETRANS)
598 600
599#define TCPCB_URG 0x20 /* Urgent pointer advenced here */ 601#define TCPCB_URG 0x20 /* Urgent pointer advanced here */
600 602
601#define TCPCB_AT_TAIL (TCPCB_URG) 603#define TCPCB_AT_TAIL (TCPCB_URG)
602 604
@@ -764,6 +766,33 @@ static inline __u32 tcp_current_ssthresh(const struct sock *sk)
764 (tp->snd_cwnd >> 2))); 766 (tp->snd_cwnd >> 2)));
765} 767}
766 768
769/*
770 * Linear increase during slow start
771 */
772static inline void tcp_slow_start(struct tcp_sock *tp)
773{
774 if (sysctl_tcp_abc) {
775 /* RFC3465: Slow Start
776 * TCP sender SHOULD increase cwnd by the number of
777 * previously unacknowledged bytes ACKed by each incoming
778 * acknowledgment, provided the increase is not more than L
779 */
780 if (tp->bytes_acked < tp->mss_cache)
781 return;
782
783 /* We MAY increase by 2 if discovered delayed ack */
784 if (sysctl_tcp_abc > 1 && tp->bytes_acked > 2*tp->mss_cache) {
785 if (tp->snd_cwnd < tp->snd_cwnd_clamp)
786 tp->snd_cwnd++;
787 }
788 }
789 tp->bytes_acked = 0;
790
791 if (tp->snd_cwnd < tp->snd_cwnd_clamp)
792 tp->snd_cwnd++;
793}
794
795
767static inline void tcp_sync_left_out(struct tcp_sock *tp) 796static inline void tcp_sync_left_out(struct tcp_sock *tp)
768{ 797{
769 if (tp->rx_opt.sack_ok && 798 if (tp->rx_opt.sack_ok &&
@@ -793,6 +822,7 @@ static inline void tcp_enter_cwr(struct sock *sk)
793 struct tcp_sock *tp = tcp_sk(sk); 822 struct tcp_sock *tp = tcp_sk(sk);
794 823
795 tp->prior_ssthresh = 0; 824 tp->prior_ssthresh = 0;
825 tp->bytes_acked = 0;
796 if (inet_csk(sk)->icsk_ca_state < TCP_CA_CWR) { 826 if (inet_csk(sk)->icsk_ca_state < TCP_CA_CWR) {
797 __tcp_enter_cwr(sk); 827 __tcp_enter_cwr(sk);
798 tcp_set_ca_state(sk, TCP_CA_CWR); 828 tcp_set_ca_state(sk, TCP_CA_CWR);
@@ -809,6 +839,27 @@ static __inline__ __u32 tcp_max_burst(const struct tcp_sock *tp)
809 return 3; 839 return 3;
810} 840}
811 841
842/* RFC2861 Check whether we are limited by application or congestion window
843 * This is the inverse of cwnd check in tcp_tso_should_defer
844 */
845static inline int tcp_is_cwnd_limited(const struct sock *sk, u32 in_flight)
846{
847 const struct tcp_sock *tp = tcp_sk(sk);
848 u32 left;
849
850 if (in_flight >= tp->snd_cwnd)
851 return 1;
852
853 if (!(sk->sk_route_caps & NETIF_F_TSO))
854 return 0;
855
856 left = tp->snd_cwnd - in_flight;
857 if (sysctl_tcp_tso_win_divisor)
858 return left * sysctl_tcp_tso_win_divisor < tp->snd_cwnd;
859 else
860 return left <= tcp_max_burst(tp);
861}
862
812static __inline__ void tcp_minshall_update(struct tcp_sock *tp, int mss, 863static __inline__ void tcp_minshall_update(struct tcp_sock *tp, int mss,
813 const struct sk_buff *skb) 864 const struct sk_buff *skb)
814{ 865{
@@ -852,7 +903,7 @@ static __inline__ u16 tcp_v4_check(struct tcphdr *th, int len,
852 903
853static __inline__ int __tcp_checksum_complete(struct sk_buff *skb) 904static __inline__ int __tcp_checksum_complete(struct sk_buff *skb)
854{ 905{
855 return (unsigned short)csum_fold(skb_checksum(skb, 0, skb->len, skb->csum)); 906 return __skb_checksum_complete(skb);
856} 907}
857 908
858static __inline__ int tcp_checksum_complete(struct sk_buff *skb) 909static __inline__ int tcp_checksum_complete(struct sk_buff *skb)
@@ -1156,6 +1207,15 @@ static inline void tcp_mib_init(void)
1156 TCP_ADD_STATS_USER(TCP_MIB_MAXCONN, -1); 1207 TCP_ADD_STATS_USER(TCP_MIB_MAXCONN, -1);
1157} 1208}
1158 1209
1210/*from STCP */
1211static inline void clear_all_retrans_hints(struct tcp_sock *tp){
1212 tp->lost_skb_hint = NULL;
1213 tp->scoreboard_skb_hint = NULL;
1214 tp->retransmit_skb_hint = NULL;
1215 tp->forward_skb_hint = NULL;
1216 tp->fastpath_skb_hint = NULL;
1217}
1218
1159/* /proc */ 1219/* /proc */
1160enum tcp_seq_states { 1220enum tcp_seq_states {
1161 TCP_SEQ_STATE_LISTENING, 1221 TCP_SEQ_STATE_LISTENING,
diff --git a/include/net/xfrm.h b/include/net/xfrm.h
index 5beae1ccd574..1cdb87912137 100644
--- a/include/net/xfrm.h
+++ b/include/net/xfrm.h
@@ -890,6 +890,7 @@ struct xfrm_state * xfrm_find_acq(u8 mode, u32 reqid, u8 proto,
890extern void xfrm_policy_flush(void); 890extern void xfrm_policy_flush(void);
891extern int xfrm_sk_policy_insert(struct sock *sk, int dir, struct xfrm_policy *pol); 891extern int xfrm_sk_policy_insert(struct sock *sk, int dir, struct xfrm_policy *pol);
892extern int xfrm_flush_bundles(void); 892extern int xfrm_flush_bundles(void);
893extern void xfrm_flush_all_bundles(void);
893extern int xfrm_bundle_ok(struct xfrm_dst *xdst, struct flowi *fl, int family); 894extern int xfrm_bundle_ok(struct xfrm_dst *xdst, struct flowi *fl, int family);
894extern void xfrm_init_pmtu(struct dst_entry *dst); 895extern void xfrm_init_pmtu(struct dst_entry *dst);
895 896
diff --git a/include/rdma/ib_user_verbs.h b/include/rdma/ib_user_verbs.h
index 072f3a2edace..5ff1490c08db 100644
--- a/include/rdma/ib_user_verbs.h
+++ b/include/rdma/ib_user_verbs.h
@@ -43,7 +43,7 @@
43 * Increment this value if any changes that break userspace ABI 43 * Increment this value if any changes that break userspace ABI
44 * compatibility are made. 44 * compatibility are made.
45 */ 45 */
46#define IB_USER_VERBS_ABI_VERSION 3 46#define IB_USER_VERBS_ABI_VERSION 4
47 47
48enum { 48enum {
49 IB_USER_VERBS_CMD_GET_CONTEXT, 49 IB_USER_VERBS_CMD_GET_CONTEXT,
@@ -333,6 +333,11 @@ struct ib_uverbs_create_qp {
333struct ib_uverbs_create_qp_resp { 333struct ib_uverbs_create_qp_resp {
334 __u32 qp_handle; 334 __u32 qp_handle;
335 __u32 qpn; 335 __u32 qpn;
336 __u32 max_send_wr;
337 __u32 max_recv_wr;
338 __u32 max_send_sge;
339 __u32 max_recv_sge;
340 __u32 max_inline_data;
336}; 341};
337 342
338/* 343/*
@@ -552,9 +557,7 @@ struct ib_uverbs_modify_srq {
552 __u32 srq_handle; 557 __u32 srq_handle;
553 __u32 attr_mask; 558 __u32 attr_mask;
554 __u32 max_wr; 559 __u32 max_wr;
555 __u32 max_sge;
556 __u32 srq_limit; 560 __u32 srq_limit;
557 __u32 reserved;
558 __u64 driver_data[0]; 561 __u64 driver_data[0];
559}; 562};
560 563
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index f72d46d54e0a..a7f4c355a91f 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -881,7 +881,7 @@ struct ib_device {
881 struct ib_ucontext *context, 881 struct ib_ucontext *context,
882 struct ib_udata *udata); 882 struct ib_udata *udata);
883 int (*destroy_cq)(struct ib_cq *cq); 883 int (*destroy_cq)(struct ib_cq *cq);
884 int (*resize_cq)(struct ib_cq *cq, int *cqe); 884 int (*resize_cq)(struct ib_cq *cq, int cqe);
885 int (*poll_cq)(struct ib_cq *cq, int num_entries, 885 int (*poll_cq)(struct ib_cq *cq, int num_entries,
886 struct ib_wc *wc); 886 struct ib_wc *wc);
887 int (*peek_cq)(struct ib_cq *cq, int wc_cnt); 887 int (*peek_cq)(struct ib_cq *cq, int wc_cnt);
diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
index 7529f4388bb4..20da282d4abb 100644
--- a/include/scsi/scsi_cmnd.h
+++ b/include/scsi/scsi_cmnd.h
@@ -151,5 +151,6 @@ extern struct scsi_cmnd *scsi_get_command(struct scsi_device *, gfp_t);
151extern void scsi_put_command(struct scsi_cmnd *); 151extern void scsi_put_command(struct scsi_cmnd *);
152extern void scsi_io_completion(struct scsi_cmnd *, unsigned int, unsigned int); 152extern void scsi_io_completion(struct scsi_cmnd *, unsigned int, unsigned int);
153extern void scsi_finish_command(struct scsi_cmnd *cmd); 153extern void scsi_finish_command(struct scsi_cmnd *cmd);
154extern void scsi_setup_blk_pc_cmnd(struct scsi_cmnd *cmd, int retries);
154 155
155#endif /* _SCSI_SCSI_CMND_H */ 156#endif /* _SCSI_SCSI_CMND_H */
diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h
index ecd53d7872d2..6cbb1982ed03 100644
--- a/include/scsi/scsi_host.h
+++ b/include/scsi/scsi_host.h
@@ -7,6 +7,7 @@
7#include <linux/workqueue.h> 7#include <linux/workqueue.h>
8 8
9struct block_device; 9struct block_device;
10struct completion;
10struct module; 11struct module;
11struct scsi_cmnd; 12struct scsi_cmnd;
12struct scsi_device; 13struct scsi_device;
@@ -467,10 +468,8 @@ struct Scsi_Host {
467 468
468 struct list_head eh_cmd_q; 469 struct list_head eh_cmd_q;
469 struct task_struct * ehandler; /* Error recovery thread. */ 470 struct task_struct * ehandler; /* Error recovery thread. */
470 struct semaphore * eh_action; /* Wait for specific actions on the 471 struct completion * eh_action; /* Wait for specific actions on the
471 host. */ 472 host. */
472 unsigned int eh_active:1; /* Indicates the eh thread is awake and active if
473 this is true. */
474 wait_queue_head_t host_wait; 473 wait_queue_head_t host_wait;
475 struct scsi_host_template *hostt; 474 struct scsi_host_template *hostt;
476 struct scsi_transport_template *transportt; 475 struct scsi_transport_template *transportt;
diff --git a/include/scsi/scsi_request.h b/include/scsi/scsi_request.h
index 2539debb7993..98d69fdb851c 100644
--- a/include/scsi/scsi_request.h
+++ b/include/scsi/scsi_request.h
@@ -47,9 +47,6 @@ struct scsi_request {
47 47
48extern struct scsi_request *scsi_allocate_request(struct scsi_device *, gfp_t); 48extern struct scsi_request *scsi_allocate_request(struct scsi_device *, gfp_t);
49extern void scsi_release_request(struct scsi_request *); 49extern void scsi_release_request(struct scsi_request *);
50extern void scsi_wait_req(struct scsi_request *, const void *cmnd,
51 void *buffer, unsigned bufflen,
52 int timeout, int retries);
53extern void scsi_do_req(struct scsi_request *, const void *cmnd, 50extern void scsi_do_req(struct scsi_request *, const void *cmnd,
54 void *buffer, unsigned bufflen, 51 void *buffer, unsigned bufflen,
55 void (*done) (struct scsi_cmnd *), 52 void (*done) (struct scsi_cmnd *),
diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h
index fac547d32a98..394f14a5b7cb 100644
--- a/include/scsi/scsi_transport_fc.h
+++ b/include/scsi/scsi_transport_fc.h
@@ -79,6 +79,7 @@ enum fc_port_state {
79 FC_PORTSTATE_LINKDOWN, 79 FC_PORTSTATE_LINKDOWN,
80 FC_PORTSTATE_ERROR, 80 FC_PORTSTATE_ERROR,
81 FC_PORTSTATE_LOOPBACK, 81 FC_PORTSTATE_LOOPBACK,
82 FC_PORTSTATE_DELETED,
82}; 83};
83 84
84 85
@@ -325,8 +326,14 @@ struct fc_host_attrs {
325 struct list_head rport_bindings; 326 struct list_head rport_bindings;
326 u32 next_rport_number; 327 u32 next_rport_number;
327 u32 next_target_id; 328 u32 next_target_id;
329 u8 flags;
330 struct work_struct rport_del_work;
328}; 331};
329 332
333/* values for struct fc_host_attrs "flags" field: */
334#define FC_SHOST_RPORT_DEL_SCHEDULED 0x01
335
336
330#define fc_host_node_name(x) \ 337#define fc_host_node_name(x) \
331 (((struct fc_host_attrs *)(x)->shost_data)->node_name) 338 (((struct fc_host_attrs *)(x)->shost_data)->node_name)
332#define fc_host_port_name(x) \ 339#define fc_host_port_name(x) \
@@ -365,6 +372,10 @@ struct fc_host_attrs {
365 (((struct fc_host_attrs *)(x)->shost_data)->next_rport_number) 372 (((struct fc_host_attrs *)(x)->shost_data)->next_rport_number)
366#define fc_host_next_target_id(x) \ 373#define fc_host_next_target_id(x) \
367 (((struct fc_host_attrs *)(x)->shost_data)->next_target_id) 374 (((struct fc_host_attrs *)(x)->shost_data)->next_target_id)
375#define fc_host_flags(x) \
376 (((struct fc_host_attrs *)(x)->shost_data)->flags)
377#define fc_host_rport_del_work(x) \
378 (((struct fc_host_attrs *)(x)->shost_data)->rport_del_work)
368 379
369 380
370/* The functions by which the transport class and the driver communicate */ 381/* The functions by which the transport class and the driver communicate */