diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/spi/spi_bitbang.h | 101 |
1 files changed, 0 insertions, 101 deletions
diff --git a/include/linux/spi/spi_bitbang.h b/include/linux/spi/spi_bitbang.h index 3274c507b8a9..f987a2bee16a 100644 --- a/include/linux/spi/spi_bitbang.h +++ b/include/linux/spi/spi_bitbang.h | |||
| @@ -1,24 +1,6 @@ | |||
| 1 | #ifndef __SPI_BITBANG_H | 1 | #ifndef __SPI_BITBANG_H |
| 2 | #define __SPI_BITBANG_H | 2 | #define __SPI_BITBANG_H |
| 3 | 3 | ||
| 4 | /* | ||
| 5 | * Mix this utility code with some glue code to get one of several types of | ||
| 6 | * simple SPI master driver. Two do polled word-at-a-time I/O: | ||
| 7 | * | ||
| 8 | * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](), | ||
| 9 | * expanding the per-word routines from the inline templates below. | ||
| 10 | * | ||
| 11 | * - Drivers for controllers resembling bare shift registers. Provide | ||
| 12 | * chipselect() and txrx_word[](), with custom setup()/cleanup() methods | ||
| 13 | * that use your controller's clock and chipselect registers. | ||
| 14 | * | ||
| 15 | * Some hardware works well with requests at spi_transfer scope: | ||
| 16 | * | ||
| 17 | * - Drivers leveraging smarter hardware, with fifos or DMA; or for half | ||
| 18 | * duplex (MicroWire) controllers. Provide chipselect() and txrx_bufs(), | ||
| 19 | * and custom setup()/cleanup() methods. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include <linux/workqueue.h> | 4 | #include <linux/workqueue.h> |
| 23 | 5 | ||
| 24 | struct spi_bitbang { | 6 | struct spi_bitbang { |
| @@ -68,86 +50,3 @@ extern int spi_bitbang_start(struct spi_bitbang *spi); | |||
| 68 | extern int spi_bitbang_stop(struct spi_bitbang *spi); | 50 | extern int spi_bitbang_stop(struct spi_bitbang *spi); |
| 69 | 51 | ||
| 70 | #endif /* __SPI_BITBANG_H */ | 52 | #endif /* __SPI_BITBANG_H */ |
| 71 | |||
| 72 | /*-------------------------------------------------------------------------*/ | ||
| 73 | |||
| 74 | #ifdef EXPAND_BITBANG_TXRX | ||
| 75 | |||
| 76 | /* | ||
| 77 | * The code that knows what GPIO pins do what should have declared four | ||
| 78 | * functions, ideally as inlines, before #defining EXPAND_BITBANG_TXRX | ||
| 79 | * and including this header: | ||
| 80 | * | ||
| 81 | * void setsck(struct spi_device *, int is_on); | ||
| 82 | * void setmosi(struct spi_device *, int is_on); | ||
| 83 | * int getmiso(struct spi_device *); | ||
| 84 | * void spidelay(unsigned); | ||
| 85 | * | ||
| 86 | * setsck()'s is_on parameter is a zero/nonzero boolean. | ||
| 87 | * | ||
| 88 | * setmosi()'s is_on parameter is a zero/nonzero boolean. | ||
| 89 | * | ||
| 90 | * getmiso() is required to return 0 or 1 only. Any other value is invalid | ||
| 91 | * and will result in improper operation. | ||
| 92 | * | ||
| 93 | * A non-inlined routine would call bitbang_txrx_*() routines. The | ||
| 94 | * main loop could easily compile down to a handful of instructions, | ||
| 95 | * especially if the delay is a NOP (to run at peak speed). | ||
| 96 | * | ||
| 97 | * Since this is software, the timings may not be exactly what your board's | ||
| 98 | * chips need ... there may be several reasons you'd need to tweak timings | ||
| 99 | * in these routines, not just make to make it faster or slower to match a | ||
| 100 | * particular CPU clock rate. | ||
| 101 | */ | ||
| 102 | |||
| 103 | static inline u32 | ||
| 104 | bitbang_txrx_be_cpha0(struct spi_device *spi, | ||
| 105 | unsigned nsecs, unsigned cpol, | ||
| 106 | u32 word, u8 bits) | ||
| 107 | { | ||
| 108 | /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */ | ||
| 109 | |||
| 110 | /* clock starts at inactive polarity */ | ||
| 111 | for (word <<= (32 - bits); likely(bits); bits--) { | ||
| 112 | |||
| 113 | /* setup MSB (to slave) on trailing edge */ | ||
| 114 | setmosi(spi, word & (1 << 31)); | ||
| 115 | spidelay(nsecs); /* T(setup) */ | ||
| 116 | |||
| 117 | setsck(spi, !cpol); | ||
| 118 | spidelay(nsecs); | ||
| 119 | |||
| 120 | /* sample MSB (from slave) on leading edge */ | ||
| 121 | word <<= 1; | ||
| 122 | word |= getmiso(spi); | ||
| 123 | setsck(spi, cpol); | ||
| 124 | } | ||
| 125 | return word; | ||
| 126 | } | ||
| 127 | |||
| 128 | static inline u32 | ||
| 129 | bitbang_txrx_be_cpha1(struct spi_device *spi, | ||
| 130 | unsigned nsecs, unsigned cpol, | ||
| 131 | u32 word, u8 bits) | ||
| 132 | { | ||
| 133 | /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */ | ||
| 134 | |||
| 135 | /* clock starts at inactive polarity */ | ||
| 136 | for (word <<= (32 - bits); likely(bits); bits--) { | ||
| 137 | |||
| 138 | /* setup MSB (to slave) on leading edge */ | ||
| 139 | setsck(spi, !cpol); | ||
| 140 | setmosi(spi, word & (1 << 31)); | ||
| 141 | spidelay(nsecs); /* T(setup) */ | ||
| 142 | |||
| 143 | setsck(spi, cpol); | ||
| 144 | spidelay(nsecs); | ||
| 145 | |||
| 146 | /* sample MSB (from slave) on trailing edge */ | ||
| 147 | word <<= 1; | ||
| 148 | word |= getmiso(spi); | ||
| 149 | } | ||
| 150 | return word; | ||
| 151 | } | ||
| 152 | |||
| 153 | #endif /* EXPAND_BITBANG_TXRX */ | ||
