aboutsummaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/asm-alpha/page.h16
-rw-r--r--include/asm-alpha/types.h2
-rw-r--r--include/asm-arm/page.h16
-rw-r--r--include/asm-arm/types.h2
-rw-r--r--include/asm-arm26/page.h16
-rw-r--r--include/asm-arm26/types.h2
-rw-r--r--include/asm-cris/page.h15
-rw-r--r--include/asm-cris/types.h2
-rw-r--r--include/asm-frv/page.h17
-rw-r--r--include/asm-frv/types.h2
-rw-r--r--include/asm-generic/page.h26
-rw-r--r--include/asm-generic/pgtable.h16
-rw-r--r--include/asm-generic/vmlinux.lds.h9
-rw-r--r--include/asm-h8300/page.h16
-rw-r--r--include/asm-h8300/types.h2
-rw-r--r--include/asm-i386/agp.h2
-rw-r--r--include/asm-i386/apicdef.h1
-rw-r--r--include/asm-i386/bugs.h5
-rw-r--r--include/asm-i386/desc.h33
-rw-r--r--include/asm-i386/kdebug.h11
-rw-r--r--include/asm-i386/mach-es7000/mach_mpparse.h30
-rw-r--r--include/asm-i386/mach-generic/mach_apic.h2
-rw-r--r--include/asm-i386/mpspec.h1
-rw-r--r--include/asm-i386/msr.h15
-rw-r--r--include/asm-i386/page.h17
-rw-r--r--include/asm-i386/pgtable-3level.h2
-rw-r--r--include/asm-i386/pgtable.h42
-rw-r--r--include/asm-i386/processor.h44
-rw-r--r--include/asm-i386/ptrace.h7
-rw-r--r--include/asm-i386/setup.h2
-rw-r--r--include/asm-i386/smp.h2
-rw-r--r--include/asm-i386/system.h36
-rw-r--r--include/asm-i386/thread_info.h5
-rw-r--r--include/asm-i386/timer.h3
-rw-r--r--include/asm-i386/types.h2
-rw-r--r--include/asm-i386/xor.h26
-rw-r--r--include/asm-ia64/types.h2
-rw-r--r--include/asm-m32r/page.h21
-rw-r--r--include/asm-m32r/types.h2
-rw-r--r--include/asm-m68k/cacheflush.h31
-rw-r--r--include/asm-m68k/page.h16
-rw-r--r--include/asm-m68k/string.h403
-rw-r--r--include/asm-m68k/types.h2
-rw-r--r--include/asm-m68knommu/page.h16
-rw-r--r--include/asm-mips/a.out.h4
-rw-r--r--include/asm-mips/addrspace.h2
-rw-r--r--include/asm-mips/asmmacro.h8
-rw-r--r--include/asm-mips/atomic.h4
-rw-r--r--include/asm-mips/bitops.h12
-rw-r--r--include/asm-mips/bugs.h2
-rw-r--r--include/asm-mips/checksum.h4
-rw-r--r--include/asm-mips/cpu-features.h4
-rw-r--r--include/asm-mips/ddb5xxx/ddb5477.h6
-rw-r--r--include/asm-mips/dec/prom.h12
-rw-r--r--include/asm-mips/delay.h6
-rw-r--r--include/asm-mips/elf.h16
-rw-r--r--include/asm-mips/fpregdef.h4
-rw-r--r--include/asm-mips/fpu.h8
-rw-r--r--include/asm-mips/hp-lj/asic.h7
-rw-r--r--include/asm-mips/ip32/mace.h8
-rw-r--r--include/asm-mips/lasat/serial.h4
-rw-r--r--include/asm-mips/local.h4
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h2
-rw-r--r--include/asm-mips/mach-db1x00/db1x00.h2
-rw-r--r--include/asm-mips/mach-generic/spaces.h8
-rw-r--r--include/asm-mips/mach-ip22/spaces.h8
-rw-r--r--include/asm-mips/mach-ip32/cpu-feature-overrides.h2
-rw-r--r--include/asm-mips/mach-jazz/floppy.h2
-rw-r--r--include/asm-mips/mach-pb1x00/pb1500.h4
-rw-r--r--include/asm-mips/mach-qemu/cpu-feature-overrides.h31
-rw-r--r--include/asm-mips/mach-qemu/param.h13
-rw-r--r--include/asm-mips/mach-vr41xx/timex.h18
-rw-r--r--include/asm-mips/mmu_context.h6
-rw-r--r--include/asm-mips/module.h4
-rw-r--r--include/asm-mips/msgbuf.h12
-rw-r--r--include/asm-mips/paccess.h4
-rw-r--r--include/asm-mips/page.h16
-rw-r--r--include/asm-mips/pci.h21
-rw-r--r--include/asm-mips/pgalloc.h4
-rw-r--r--include/asm-mips/pgtable.h4
-rw-r--r--include/asm-mips/processor.h4
-rw-r--r--include/asm-mips/ptrace.h2
-rw-r--r--include/asm-mips/qemu.h24
-rw-r--r--include/asm-mips/r4kcache.h68
-rw-r--r--include/asm-mips/reg.h6
-rw-r--r--include/asm-mips/resource.h2
-rw-r--r--include/asm-mips/rtc.h2
-rw-r--r--include/asm-mips/sgi/gio.h2
-rw-r--r--include/asm-mips/sgi/hpc3.h4
-rw-r--r--include/asm-mips/sgi/ioc.h4
-rw-r--r--include/asm-mips/sgi/ip22.h2
-rw-r--r--include/asm-mips/sgi/mc.h6
-rw-r--r--include/asm-mips/sgiarcs.h8
-rw-r--r--include/asm-mips/sibyte/carmel.h12
-rw-r--r--include/asm-mips/sibyte/sb1250_defs.h38
-rw-r--r--include/asm-mips/sibyte/sb1250_dma.h42
-rw-r--r--include/asm-mips/sibyte/sb1250_genbus.h24
-rw-r--r--include/asm-mips/sibyte/sb1250_int.h24
-rw-r--r--include/asm-mips/sibyte/sb1250_l2c.h22
-rw-r--r--include/asm-mips/sibyte/sb1250_ldt.h32
-rw-r--r--include/asm-mips/sibyte/sb1250_mac.h26
-rw-r--r--include/asm-mips/sibyte/sb1250_mc.h28
-rw-r--r--include/asm-mips/sibyte/sb1250_regs.h68
-rw-r--r--include/asm-mips/sibyte/sb1250_scd.h36
-rw-r--r--include/asm-mips/sibyte/sb1250_smbus.h24
-rw-r--r--include/asm-mips/sibyte/sb1250_syncser.h12
-rw-r--r--include/asm-mips/sibyte/sb1250_uart.h30
-rw-r--r--include/asm-mips/sigcontext.h4
-rw-r--r--include/asm-mips/siginfo.h4
-rw-r--r--include/asm-mips/sim.h8
-rw-r--r--include/asm-mips/socket.h2
-rw-r--r--include/asm-mips/stackframe.h22
-rw-r--r--include/asm-mips/statfs.h2
-rw-r--r--include/asm-mips/string.h8
-rw-r--r--include/asm-mips/system.h4
-rw-r--r--include/asm-mips/thread_info.h4
-rw-r--r--include/asm-mips/titan_dep.h2
-rw-r--r--include/asm-mips/tx4927/tx4927.h52
-rw-r--r--include/asm-mips/tx4927/tx4927_pci.h4
-rw-r--r--include/asm-mips/types.h4
-rw-r--r--include/asm-mips/uaccess.h8
-rw-r--r--include/asm-mips/unistd.h2
-rw-r--r--include/asm-mips/vr4181/irq.h122
-rw-r--r--include/asm-mips/vr4181/vr4181.h413
-rw-r--r--include/asm-mips/vr41xx/vr41xx.h16
-rw-r--r--include/asm-mips/vr41xx/vrc4173.h4
-rw-r--r--include/asm-mips/war.h4
-rw-r--r--include/asm-mips/xxs1500.h2
-rw-r--r--include/asm-parisc/page.h16
-rw-r--r--include/asm-parisc/types.h2
-rw-r--r--include/asm-ppc/dma-mapping.h3
-rw-r--r--include/asm-ppc/ibm4xx.h12
-rw-r--r--include/asm-ppc/ibm_ocp.h17
-rw-r--r--include/asm-ppc/irq.h1
-rw-r--r--include/asm-ppc/kmap_types.h1
-rw-r--r--include/asm-ppc/mpc8260.h18
-rw-r--r--include/asm-ppc/mpc8xx.h4
-rw-r--r--include/asm-ppc/mv64x60.h7
-rw-r--r--include/asm-ppc/mv64x60_defs.h9
-rw-r--r--include/asm-ppc/param.h4
-rw-r--r--include/asm-ppc/ppc_sys.h5
-rw-r--r--include/asm-ppc/serial.h2
-rw-r--r--include/asm-ppc/system.h5
-rw-r--r--include/asm-ppc/types.h2
-rw-r--r--include/asm-ppc64/lmb.h22
-rw-r--r--include/asm-ppc64/lppaca.h2
-rw-r--r--include/asm-ppc64/page.h17
-rw-r--r--include/asm-ppc64/types.h1
-rw-r--r--include/asm-s390/debug.h2
-rw-r--r--include/asm-s390/lowcore.h8
-rw-r--r--include/asm-s390/page.h16
-rw-r--r--include/asm-s390/spinlock.h4
-rw-r--r--include/asm-s390/types.h2
-rw-r--r--include/asm-sh/page.h20
-rw-r--r--include/asm-sh/types.h2
-rw-r--r--include/asm-sh64/page.h20
-rw-r--r--include/asm-sh64/types.h2
-rw-r--r--include/asm-sparc/page.h16
-rw-r--r--include/asm-sparc/pgtable.h3
-rw-r--r--include/asm-sparc/types.h2
-rw-r--r--include/asm-sparc64/cpudata.h4
-rw-r--r--include/asm-sparc64/hardirq.h16
-rw-r--r--include/asm-sparc64/io.h47
-rw-r--r--include/asm-sparc64/page.h16
-rw-r--r--include/asm-sparc64/pgtable.h3
-rw-r--r--include/asm-sparc64/types.h2
-rw-r--r--include/asm-um/mmu_context.h10
-rw-r--r--include/asm-um/page.h16
-rw-r--r--include/asm-um/pgalloc.h12
-rw-r--r--include/asm-um/pgtable-2level.h27
-rw-r--r--include/asm-um/pgtable-3level.h45
-rw-r--r--include/asm-um/pgtable.h54
-rw-r--r--include/asm-v850/page.h21
-rw-r--r--include/asm-v850/types.h2
-rw-r--r--include/asm-x86_64/page.h17
-rw-r--r--include/asm-x86_64/pgtable.h19
-rw-r--r--include/asm-x86_64/processor.h5
-rw-r--r--include/asm-x86_64/types.h2
-rw-r--r--include/asm-xtensa/atomic.h12
-rw-r--r--include/asm-xtensa/checksum.h4
-rw-r--r--include/asm-xtensa/delay.h2
-rw-r--r--include/asm-xtensa/io.h14
-rw-r--r--include/asm-xtensa/mmu_context.h18
-rw-r--r--include/asm-xtensa/page.h2
-rw-r--r--include/asm-xtensa/page.h.n135
-rw-r--r--include/asm-xtensa/pci.h4
-rw-r--r--include/asm-xtensa/pgtable.h6
-rw-r--r--include/asm-xtensa/semaphore.h10
-rw-r--r--include/asm-xtensa/string.h8
-rw-r--r--include/asm-xtensa/system.h10
-rw-r--r--include/asm-xtensa/tlbflush.h40
-rw-r--r--include/asm-xtensa/types.h2
-rw-r--r--include/asm-xtensa/uaccess.h10
-rw-r--r--include/linux/capability.h1
-rw-r--r--include/linux/crypto.h1
-rw-r--r--include/linux/efi.h14
-rw-r--r--include/linux/hugetlb.h6
-rw-r--r--include/linux/hwmon-sysfs.h15
-rw-r--r--include/linux/hwmon-vid.h45
-rw-r--r--include/linux/hwmon.h35
-rw-r--r--include/linux/i2c-id.h192
-rw-r--r--include/linux/i2c-isa.h36
-rw-r--r--include/linux/i2c-sensor.h263
-rw-r--r--include/linux/i2c-vid.h111
-rw-r--r--include/linux/i2c.h206
-rw-r--r--include/linux/if_tun.h1
-rw-r--r--include/linux/klist.h8
-rw-r--r--include/linux/libata.h2
-rw-r--r--include/linux/mempolicy.h3
-rw-r--r--include/linux/mmc/host.h6
-rw-r--r--include/linux/mmzone.h25
-rw-r--r--include/linux/mv643xx.h2
-rw-r--r--include/linux/page-flags.h2
-rw-r--r--include/linux/pci_ids.h3
-rw-r--r--include/linux/pm.h14
-rw-r--r--include/linux/ptrace.h2
-rw-r--r--include/linux/swap.h22
-rw-r--r--include/linux/swapops.h2
-rw-r--r--include/linux/vmalloc.h8
-rw-r--r--include/media/id.h5
-rw-r--r--include/net/ip_vs.h2
-rw-r--r--include/net/irda/irlan_filter.h2
-rw-r--r--include/net/sock.h18
-rw-r--r--include/net/tcp.h1
-rw-r--r--include/video/pmag-ba-fb.h41
-rw-r--r--include/video/pmagb-b-fb.h74
226 files changed, 1664 insertions, 2805 deletions
diff --git a/include/asm-alpha/page.h b/include/asm-alpha/page.h
index 0577daffc720..fa0b41b164a7 100644
--- a/include/asm-alpha/page.h
+++ b/include/asm-alpha/page.h
@@ -63,20 +63,6 @@ typedef unsigned long pgprot_t;
63 63
64#endif /* STRICT_MM_TYPECHECKS */ 64#endif /* STRICT_MM_TYPECHECKS */
65 65
66/* Pure 2^n version of get_order */
67extern __inline__ int get_order(unsigned long size)
68{
69 int order;
70
71 size = (size-1) >> (PAGE_SHIFT-1);
72 order = -1;
73 do {
74 size >>= 1;
75 order++;
76 } while (size);
77 return order;
78}
79
80#ifdef USE_48_BIT_KSEG 66#ifdef USE_48_BIT_KSEG
81#define PAGE_OFFSET 0xffff800000000000UL 67#define PAGE_OFFSET 0xffff800000000000UL
82#else 68#else
@@ -112,4 +98,6 @@ extern __inline__ int get_order(unsigned long size)
112 98
113#endif /* __KERNEL__ */ 99#endif /* __KERNEL__ */
114 100
101#include <asm-generic/page.h>
102
115#endif /* _ALPHA_PAGE_H */ 103#endif /* _ALPHA_PAGE_H */
diff --git a/include/asm-alpha/types.h b/include/asm-alpha/types.h
index 43264d219246..f5716139ec89 100644
--- a/include/asm-alpha/types.h
+++ b/include/asm-alpha/types.h
@@ -56,8 +56,6 @@ typedef unsigned long u64;
56typedef u64 dma_addr_t; 56typedef u64 dma_addr_t;
57typedef u64 dma64_addr_t; 57typedef u64 dma64_addr_t;
58 58
59typedef unsigned short kmem_bufctl_t;
60
61#endif /* __ASSEMBLY__ */ 59#endif /* __ASSEMBLY__ */
62#endif /* __KERNEL__ */ 60#endif /* __KERNEL__ */
63#endif /* _ALPHA_TYPES_H */ 61#endif /* _ALPHA_TYPES_H */
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 019c45d75730..4da1d532cbeb 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -163,20 +163,6 @@ typedef unsigned long pgprot_t;
163/* the upper-most page table pointer */ 163/* the upper-most page table pointer */
164extern pmd_t *top_pmd; 164extern pmd_t *top_pmd;
165 165
166/* Pure 2^n version of get_order */
167static inline int get_order(unsigned long size)
168{
169 int order;
170
171 size = (size-1) >> (PAGE_SHIFT-1);
172 order = -1;
173 do {
174 size >>= 1;
175 order++;
176 } while (size);
177 return order;
178}
179
180#include <asm/memory.h> 166#include <asm/memory.h>
181 167
182#endif /* !__ASSEMBLY__ */ 168#endif /* !__ASSEMBLY__ */
@@ -186,4 +172,6 @@ static inline int get_order(unsigned long size)
186 172
187#endif /* __KERNEL__ */ 173#endif /* __KERNEL__ */
188 174
175#include <asm-generic/page.h>
176
189#endif 177#endif
diff --git a/include/asm-arm/types.h b/include/asm-arm/types.h
index f4c92e4c8c02..22992ee0627a 100644
--- a/include/asm-arm/types.h
+++ b/include/asm-arm/types.h
@@ -52,8 +52,6 @@ typedef unsigned long long u64;
52typedef u32 dma_addr_t; 52typedef u32 dma_addr_t;
53typedef u32 dma64_addr_t; 53typedef u32 dma64_addr_t;
54 54
55typedef unsigned int kmem_bufctl_t;
56
57#endif /* __ASSEMBLY__ */ 55#endif /* __ASSEMBLY__ */
58 56
59#endif /* __KERNEL__ */ 57#endif /* __KERNEL__ */
diff --git a/include/asm-arm26/page.h b/include/asm-arm26/page.h
index c334079b082b..d3f23ac4d468 100644
--- a/include/asm-arm26/page.h
+++ b/include/asm-arm26/page.h
@@ -89,20 +89,6 @@ typedef unsigned long pgprot_t;
89#ifdef __KERNEL__ 89#ifdef __KERNEL__
90#ifndef __ASSEMBLY__ 90#ifndef __ASSEMBLY__
91 91
92/* Pure 2^n version of get_order */
93static inline int get_order(unsigned long size)
94{
95 int order;
96
97 size = (size-1) >> (PAGE_SHIFT-1);
98 order = -1;
99 do {
100 size >>= 1;
101 order++;
102 } while (size);
103 return order;
104}
105
106#include <asm/memory.h> 92#include <asm/memory.h>
107 93
108#endif /* !__ASSEMBLY__ */ 94#endif /* !__ASSEMBLY__ */
@@ -112,4 +98,6 @@ static inline int get_order(unsigned long size)
112 98
113#endif /* __KERNEL__ */ 99#endif /* __KERNEL__ */
114 100
101#include <asm-generic/page.h>
102
115#endif 103#endif
diff --git a/include/asm-arm26/types.h b/include/asm-arm26/types.h
index 56cbe573a234..81bd357ada02 100644
--- a/include/asm-arm26/types.h
+++ b/include/asm-arm26/types.h
@@ -52,8 +52,6 @@ typedef unsigned long long u64;
52typedef u32 dma_addr_t; 52typedef u32 dma_addr_t;
53typedef u32 dma64_addr_t; 53typedef u32 dma64_addr_t;
54 54
55typedef unsigned int kmem_bufctl_t;
56
57#endif /* __ASSEMBLY__ */ 55#endif /* __ASSEMBLY__ */
58 56
59#endif /* __KERNEL__ */ 57#endif /* __KERNEL__ */
diff --git a/include/asm-cris/page.h b/include/asm-cris/page.h
index bbf17bd39385..c99c478c482f 100644
--- a/include/asm-cris/page.h
+++ b/include/asm-cris/page.h
@@ -70,19 +70,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
70 70
71#ifndef __ASSEMBLY__ 71#ifndef __ASSEMBLY__
72 72
73/* Pure 2^n version of get_order */
74static inline int get_order(unsigned long size)
75{
76 int order;
77
78 size = (size-1) >> (PAGE_SHIFT-1);
79 order = -1;
80 do {
81 size >>= 1;
82 order++;
83 } while (size);
84 return order;
85}
86#endif /* __ASSEMBLY__ */ 73#endif /* __ASSEMBLY__ */
87 74
88#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 75#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
@@ -90,5 +77,7 @@ static inline int get_order(unsigned long size)
90 77
91#endif /* __KERNEL__ */ 78#endif /* __KERNEL__ */
92 79
80#include <asm-generic/page.h>
81
93#endif /* _CRIS_PAGE_H */ 82#endif /* _CRIS_PAGE_H */
94 83
diff --git a/include/asm-cris/types.h b/include/asm-cris/types.h
index 8fa6d6c7afce..84557c9bac93 100644
--- a/include/asm-cris/types.h
+++ b/include/asm-cris/types.h
@@ -52,8 +52,6 @@ typedef unsigned long long u64;
52typedef u32 dma_addr_t; 52typedef u32 dma_addr_t;
53typedef u32 dma64_addr_t; 53typedef u32 dma64_addr_t;
54 54
55typedef unsigned short kmem_bufctl_t;
56
57#endif /* __ASSEMBLY__ */ 55#endif /* __ASSEMBLY__ */
58 56
59#endif /* __KERNEL__ */ 57#endif /* __KERNEL__ */
diff --git a/include/asm-frv/page.h b/include/asm-frv/page.h
index f7914f1782b0..4feba567e7fd 100644
--- a/include/asm-frv/page.h
+++ b/include/asm-frv/page.h
@@ -45,21 +45,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
45/* to align the pointer to the (next) page boundary */ 45/* to align the pointer to the (next) page boundary */
46#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) 46#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
47 47
48/* Pure 2^n version of get_order */
49static inline int get_order(unsigned long size) __attribute_const__;
50static inline int get_order(unsigned long size)
51{
52 int order;
53
54 size = (size - 1) >> (PAGE_SHIFT - 1);
55 order = -1;
56 do {
57 size >>= 1;
58 order++;
59 } while (size);
60 return order;
61}
62
63#define devmem_is_allowed(pfn) 1 48#define devmem_is_allowed(pfn) 1
64 49
65#define __pa(vaddr) virt_to_phys((void *) vaddr) 50#define __pa(vaddr) virt_to_phys((void *) vaddr)
@@ -102,4 +87,6 @@ extern unsigned long max_pfn;
102#define WANT_PAGE_VIRTUAL 1 87#define WANT_PAGE_VIRTUAL 1
103#endif 88#endif
104 89
90#include <asm-generic/page.h>
91
105#endif /* _ASM_PAGE_H */ 92#endif /* _ASM_PAGE_H */
diff --git a/include/asm-frv/types.h b/include/asm-frv/types.h
index 1a5b6546bb41..50605df6d8ac 100644
--- a/include/asm-frv/types.h
+++ b/include/asm-frv/types.h
@@ -65,8 +65,6 @@ typedef u64 u_quad_t;
65 65
66typedef u32 dma_addr_t; 66typedef u32 dma_addr_t;
67 67
68typedef unsigned short kmem_bufctl_t;
69
70#endif /* __ASSEMBLY__ */ 68#endif /* __ASSEMBLY__ */
71 69
72#endif /* __KERNEL__ */ 70#endif /* __KERNEL__ */
diff --git a/include/asm-generic/page.h b/include/asm-generic/page.h
new file mode 100644
index 000000000000..a96b5d986b6e
--- /dev/null
+++ b/include/asm-generic/page.h
@@ -0,0 +1,26 @@
1#ifndef _ASM_GENERIC_PAGE_H
2#define _ASM_GENERIC_PAGE_H
3
4#ifdef __KERNEL__
5#ifndef __ASSEMBLY__
6
7#include <linux/compiler.h>
8
9/* Pure 2^n version of get_order */
10static __inline__ __attribute_const__ int get_order(unsigned long size)
11{
12 int order;
13
14 size = (size - 1) >> (PAGE_SHIFT - 1);
15 order = -1;
16 do {
17 size >>= 1;
18 order++;
19 } while (size);
20 return order;
21}
22
23#endif /* __ASSEMBLY__ */
24#endif /* __KERNEL__ */
25
26#endif /* _ASM_GENERIC_PAGE_H */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index f40593565173..f86c1e549466 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -101,6 +101,22 @@ do { \
101}) 101})
102#endif 102#endif
103 103
104#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
105#define ptep_get_and_clear_full(__mm, __address, __ptep, __full) \
106({ \
107 pte_t __pte; \
108 __pte = ptep_get_and_clear((__mm), (__address), (__ptep)); \
109 __pte; \
110})
111#endif
112
113#ifndef __HAVE_ARCH_PTE_CLEAR_FULL
114#define pte_clear_full(__mm, __address, __ptep, __full) \
115do { \
116 pte_clear((__mm), (__address), (__ptep)); \
117} while (0)
118#endif
119
104#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH 120#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
105#define ptep_clear_flush(__vma, __address, __ptep) \ 121#define ptep_clear_flush(__vma, __address, __ptep) \
106({ \ 122({ \
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index b3bb326ae5b6..3fa94288aa93 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -6,6 +6,9 @@
6#define VMLINUX_SYMBOL(_sym_) _sym_ 6#define VMLINUX_SYMBOL(_sym_) _sym_
7#endif 7#endif
8 8
9/* Align . to a 8 byte boundary equals to maximum function alignment. */
10#define ALIGN_FUNCTION() . = ALIGN(8)
11
9#define RODATA \ 12#define RODATA \
10 .rodata : AT(ADDR(.rodata) - LOAD_OFFSET) { \ 13 .rodata : AT(ADDR(.rodata) - LOAD_OFFSET) { \
11 *(.rodata) *(.rodata.*) \ 14 *(.rodata) *(.rodata.*) \
@@ -79,12 +82,18 @@
79 VMLINUX_SYMBOL(__security_initcall_end) = .; \ 82 VMLINUX_SYMBOL(__security_initcall_end) = .; \
80 } 83 }
81 84
85/* sched.text is aling to function alignment to secure we have same
86 * address even at second ld pass when generating System.map */
82#define SCHED_TEXT \ 87#define SCHED_TEXT \
88 ALIGN_FUNCTION(); \
83 VMLINUX_SYMBOL(__sched_text_start) = .; \ 89 VMLINUX_SYMBOL(__sched_text_start) = .; \
84 *(.sched.text) \ 90 *(.sched.text) \
85 VMLINUX_SYMBOL(__sched_text_end) = .; 91 VMLINUX_SYMBOL(__sched_text_end) = .;
86 92
93/* spinlock.text is aling to function alignment to secure we have same
94 * address even at second ld pass when generating System.map */
87#define LOCK_TEXT \ 95#define LOCK_TEXT \
96 ALIGN_FUNCTION(); \
88 VMLINUX_SYMBOL(__lock_text_start) = .; \ 97 VMLINUX_SYMBOL(__lock_text_start) = .; \
89 *(.spinlock.text) \ 98 *(.spinlock.text) \
90 VMLINUX_SYMBOL(__lock_text_end) = .; 99 VMLINUX_SYMBOL(__lock_text_end) = .;
diff --git a/include/asm-h8300/page.h b/include/asm-h8300/page.h
index e3b7960d445b..e8c02b8c2d99 100644
--- a/include/asm-h8300/page.h
+++ b/include/asm-h8300/page.h
@@ -54,20 +54,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
54/* to align the pointer to the (next) page boundary */ 54/* to align the pointer to the (next) page boundary */
55#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) 55#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
56 56
57/* Pure 2^n version of get_order */
58extern __inline__ int get_order(unsigned long size)
59{
60 int order;
61
62 size = (size-1) >> (PAGE_SHIFT-1);
63 order = -1;
64 do {
65 size >>= 1;
66 order++;
67 } while (size);
68 return order;
69}
70
71extern unsigned long memory_start; 57extern unsigned long memory_start;
72extern unsigned long memory_end; 58extern unsigned long memory_end;
73 59
@@ -101,4 +87,6 @@ extern unsigned long memory_end;
101 87
102#endif /* __KERNEL__ */ 88#endif /* __KERNEL__ */
103 89
90#include <asm-generic/page.h>
91
104#endif /* _H8300_PAGE_H */ 92#endif /* _H8300_PAGE_H */
diff --git a/include/asm-h8300/types.h b/include/asm-h8300/types.h
index 21f4fc07ac0e..bf91e0d4dde7 100644
--- a/include/asm-h8300/types.h
+++ b/include/asm-h8300/types.h
@@ -58,8 +58,6 @@ typedef u32 dma_addr_t;
58#define HAVE_SECTOR_T 58#define HAVE_SECTOR_T
59typedef u64 sector_t; 59typedef u64 sector_t;
60 60
61typedef unsigned int kmem_bufctl_t;
62
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
64 62
65#endif /* __ASSEMBLY__ */ 63#endif /* __ASSEMBLY__ */
diff --git a/include/asm-i386/agp.h b/include/asm-i386/agp.h
index b82f5f3ab887..9075083bab76 100644
--- a/include/asm-i386/agp.h
+++ b/include/asm-i386/agp.h
@@ -19,7 +19,7 @@ int unmap_page_from_agp(struct page *page);
19/* Could use CLFLUSH here if the cpu supports it. But then it would 19/* Could use CLFLUSH here if the cpu supports it. But then it would
20 need to be called for each cacheline of the whole page so it may not be 20 need to be called for each cacheline of the whole page so it may not be
21 worth it. Would need a page for it. */ 21 worth it. Would need a page for it. */
22#define flush_agp_cache() asm volatile("wbinvd":::"memory") 22#define flush_agp_cache() wbinvd()
23 23
24/* Convert a physical address to an address suitable for the GART. */ 24/* Convert a physical address to an address suitable for the GART. */
25#define phys_to_gart(x) (x) 25#define phys_to_gart(x) (x)
diff --git a/include/asm-i386/apicdef.h b/include/asm-i386/apicdef.h
index a96a8f48fbfc..03185cef8e0a 100644
--- a/include/asm-i386/apicdef.h
+++ b/include/asm-i386/apicdef.h
@@ -16,6 +16,7 @@
16#define GET_APIC_VERSION(x) ((x)&0xFF) 16#define GET_APIC_VERSION(x) ((x)&0xFF)
17#define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF) 17#define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF)
18#define APIC_INTEGRATED(x) ((x)&0xF0) 18#define APIC_INTEGRATED(x) ((x)&0xF0)
19#define APIC_XAPIC(x) ((x) >= 0x14)
19#define APIC_TASKPRI 0x80 20#define APIC_TASKPRI 0x80
20#define APIC_TPRI_MASK 0xFF 21#define APIC_TPRI_MASK 0xFF
21#define APIC_ARBPRI 0x90 22#define APIC_ARBPRI 0x90
diff --git a/include/asm-i386/bugs.h b/include/asm-i386/bugs.h
index 6789fc275da3..ea54540638d2 100644
--- a/include/asm-i386/bugs.h
+++ b/include/asm-i386/bugs.h
@@ -118,7 +118,10 @@ static void __init check_hlt(void)
118 printk("disabled\n"); 118 printk("disabled\n");
119 return; 119 return;
120 } 120 }
121 __asm__ __volatile__("hlt ; hlt ; hlt ; hlt"); 121 halt();
122 halt();
123 halt();
124 halt();
122 printk("OK.\n"); 125 printk("OK.\n");
123} 126}
124 127
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h
index 11e67811a990..6df1a53c190e 100644
--- a/include/asm-i386/desc.h
+++ b/include/asm-i386/desc.h
@@ -27,8 +27,18 @@ struct Xgt_desc_struct {
27 27
28extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; 28extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
29 29
30#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8)) 30#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
31#define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8)) 31#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
32
33#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
34#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
35#define load_tr(tr) __asm__ __volatile("ltr %0"::"mr" (tr))
36#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"mr" (ldt))
37
38#define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
39#define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
40#define store_tr(tr) __asm__ ("str %0":"=mr" (tr))
41#define store_ldt(ldt) __asm__ ("sldt %0":"=mr" (ldt))
32 42
33/* 43/*
34 * This is the ldt that every process will get unless we need 44 * This is the ldt that every process will get unless we need
@@ -39,14 +49,14 @@ extern void set_intr_gate(unsigned int irq, void * addr);
39 49
40#define _set_tssldt_desc(n,addr,limit,type) \ 50#define _set_tssldt_desc(n,addr,limit,type) \
41__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \ 51__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
42 "movw %%ax,2(%2)\n\t" \ 52 "movw %w1,2(%2)\n\t" \
43 "rorl $16,%%eax\n\t" \ 53 "rorl $16,%1\n\t" \
44 "movb %%al,4(%2)\n\t" \ 54 "movb %b1,4(%2)\n\t" \
45 "movb %4,5(%2)\n\t" \ 55 "movb %4,5(%2)\n\t" \
46 "movb $0,6(%2)\n\t" \ 56 "movb $0,6(%2)\n\t" \
47 "movb %%ah,7(%2)\n\t" \ 57 "movb %h1,7(%2)\n\t" \
48 "rorl $16,%%eax" \ 58 "rorl $16,%1" \
49 : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type)) 59 : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type))
50 60
51static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) 61static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
52{ 62{
@@ -86,6 +96,13 @@ static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
86 (info)->seg_not_present == 1 && \ 96 (info)->seg_not_present == 1 && \
87 (info)->useable == 0 ) 97 (info)->useable == 0 )
88 98
99static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 entry_b)
100{
101 __u32 *lp = (__u32 *)((char *)ldt + entry*8);
102 *lp = entry_a;
103 *(lp+1) = entry_b;
104}
105
89#if TLS_SIZE != 24 106#if TLS_SIZE != 24
90# error update this code. 107# error update this code.
91#endif 108#endif
diff --git a/include/asm-i386/kdebug.h b/include/asm-i386/kdebug.h
index b3f8d5f59d5d..316138e89910 100644
--- a/include/asm-i386/kdebug.h
+++ b/include/asm-i386/kdebug.h
@@ -41,9 +41,16 @@ enum die_val {
41 DIE_PAGE_FAULT, 41 DIE_PAGE_FAULT,
42}; 42};
43 43
44static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,long err,int trap, int sig) 44static inline int notify_die(enum die_val val, const char *str,
45 struct pt_regs *regs, long err, int trap, int sig)
45{ 46{
46 struct die_args args = { .regs=regs, .str=str, .err=err, .trapnr=trap,.signr=sig }; 47 struct die_args args = {
48 .regs = regs,
49 .str = str,
50 .err = err,
51 .trapnr = trap,
52 .signr = sig
53 };
47 return notifier_call_chain(&i386die_chain, val, &args); 54 return notifier_call_chain(&i386die_chain, val, &args);
48} 55}
49 56
diff --git a/include/asm-i386/mach-es7000/mach_mpparse.h b/include/asm-i386/mach-es7000/mach_mpparse.h
index 85809e0898d7..28a84f6185a7 100644
--- a/include/asm-i386/mach-es7000/mach_mpparse.h
+++ b/include/asm-i386/mach-es7000/mach_mpparse.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_MACH_MPPARSE_H 1#ifndef __ASM_MACH_MPPARSE_H
2#define __ASM_MACH_MPPARSE_H 2#define __ASM_MACH_MPPARSE_H
3 3
4#include <linux/acpi.h>
5
4static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, 6static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name,
5 struct mpc_config_translation *translation) 7 struct mpc_config_translation *translation)
6{ 8{
@@ -12,8 +14,9 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m,
12{ 14{
13} 15}
14 16
15extern int parse_unisys_oem (char *oemptr, int oem_entries); 17extern int parse_unisys_oem (char *oemptr);
16extern int find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length); 18extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
19extern void setup_unisys();
17 20
18static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, 21static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
19 char *productid) 22 char *productid)
@@ -22,18 +25,33 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
22 struct mp_config_oemtable *oem_table = 25 struct mp_config_oemtable *oem_table =
23 (struct mp_config_oemtable *)mpc->mpc_oemptr; 26 (struct mp_config_oemtable *)mpc->mpc_oemptr;
24 if (!strncmp(oem, "UNISYS", 6)) 27 if (!strncmp(oem, "UNISYS", 6))
25 return parse_unisys_oem((char *)oem_table, oem_table->oem_length); 28 return parse_unisys_oem((char *)oem_table);
26 } 29 }
27 return 0; 30 return 0;
28} 31}
29 32
33static inline int es7000_check_dsdt()
34{
35 struct acpi_table_header *header = NULL;
36 if(!acpi_get_table_header_early(ACPI_DSDT, &header))
37 acpi_table_print(header, 0);
38 if (!strncmp(header->oem_id, "UNISYS", 6))
39 return 1;
40 return 0;
41}
42
30/* Hook from generic ACPI tables.c */ 43/* Hook from generic ACPI tables.c */
31static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id) 44static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
32{ 45{
33 unsigned long oem_addr; 46 unsigned long oem_addr;
34 int oem_entries; 47 if (!find_unisys_acpi_oem_table(&oem_addr)) {
35 if (!find_unisys_acpi_oem_table(&oem_addr, &oem_entries)) 48 if (es7000_check_dsdt())
36 return parse_unisys_oem((char *)oem_addr, oem_entries); 49 return parse_unisys_oem((char *)oem_addr);
50 else {
51 setup_unisys();
52 return 1;
53 }
54 }
37 return 0; 55 return 0;
38} 56}
39 57
diff --git a/include/asm-i386/mach-generic/mach_apic.h b/include/asm-i386/mach-generic/mach_apic.h
index b13767a4e934..d9dc039da94a 100644
--- a/include/asm-i386/mach-generic/mach_apic.h
+++ b/include/asm-i386/mach-generic/mach_apic.h
@@ -28,4 +28,6 @@
28#define enable_apic_mode (genapic->enable_apic_mode) 28#define enable_apic_mode (genapic->enable_apic_mode)
29#define phys_pkg_id (genapic->phys_pkg_id) 29#define phys_pkg_id (genapic->phys_pkg_id)
30 30
31extern void generic_bigsmp_probe(void);
32
31#endif /* __ASM_MACH_APIC_H */ 33#endif /* __ASM_MACH_APIC_H */
diff --git a/include/asm-i386/mpspec.h b/include/asm-i386/mpspec.h
index d9fafba075bc..d84a9c326c22 100644
--- a/include/asm-i386/mpspec.h
+++ b/include/asm-i386/mpspec.h
@@ -11,6 +11,7 @@ extern int mp_bus_id_to_local [MAX_MP_BUSSES];
11extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; 11extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
12extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES]; 12extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
13 13
14extern unsigned int def_to_bigsmp;
14extern unsigned int boot_cpu_physical_apicid; 15extern unsigned int boot_cpu_physical_apicid;
15extern int smp_found_config; 16extern int smp_found_config;
16extern void find_smp_config (void); 17extern void find_smp_config (void);
diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h
index c76fce8badbb..62b76cd96957 100644
--- a/include/asm-i386/msr.h
+++ b/include/asm-i386/msr.h
@@ -47,6 +47,21 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
47 : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\ 47 : "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\
48 ret__; }) 48 ret__; })
49 49
50/* rdmsr with exception handling */
51#define rdmsr_safe(msr,a,b) ({ int ret__; \
52 asm volatile("2: rdmsr ; xorl %0,%0\n" \
53 "1:\n\t" \
54 ".section .fixup,\"ax\"\n\t" \
55 "3: movl %4,%0 ; jmp 1b\n\t" \
56 ".previous\n\t" \
57 ".section __ex_table,\"a\"\n" \
58 " .align 4\n\t" \
59 " .long 2b,3b\n\t" \
60 ".previous" \
61 : "=r" (ret__), "=a" (*(a)), "=d" (*(b)) \
62 : "c" (msr), "i" (-EFAULT));\
63 ret__; })
64
50#define rdtsc(low,high) \ 65#define rdtsc(low,high) \
51 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high)) 66 __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
52 67
diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h
index 8d93f732d72d..73296d9924fb 100644
--- a/include/asm-i386/page.h
+++ b/include/asm-i386/page.h
@@ -68,7 +68,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
68#define HPAGE_MASK (~(HPAGE_SIZE - 1)) 68#define HPAGE_MASK (~(HPAGE_SIZE - 1))
69#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 69#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
70#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA 70#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
71#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
72#endif 71#endif
73 72
74#define pgd_val(x) ((x).pgd) 73#define pgd_val(x) ((x).pgd)
@@ -104,20 +103,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
104 */ 103 */
105extern unsigned int __VMALLOC_RESERVE; 104extern unsigned int __VMALLOC_RESERVE;
106 105
107/* Pure 2^n version of get_order */
108static __inline__ int get_order(unsigned long size)
109{
110 int order;
111
112 size = (size-1) >> (PAGE_SHIFT-1);
113 order = -1;
114 do {
115 size >>= 1;
116 order++;
117 } while (size);
118 return order;
119}
120
121extern int sysctl_legacy_va_layout; 106extern int sysctl_legacy_va_layout;
122 107
123extern int page_is_ram(unsigned long pagenr); 108extern int page_is_ram(unsigned long pagenr);
@@ -156,4 +141,6 @@ extern int page_is_ram(unsigned long pagenr);
156 141
157#endif /* __KERNEL__ */ 142#endif /* __KERNEL__ */
158 143
144#include <asm-generic/page.h>
145
159#endif /* _I386_PAGE_H */ 146#endif /* _I386_PAGE_H */
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index d609f9c2c1f0..2e3f4a344a2d 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -64,7 +64,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
64#define set_pmd(pmdptr,pmdval) \ 64#define set_pmd(pmdptr,pmdval) \
65 set_64bit((unsigned long long *)(pmdptr),pmd_val(pmdval)) 65 set_64bit((unsigned long long *)(pmdptr),pmd_val(pmdval))
66#define set_pud(pudptr,pudval) \ 66#define set_pud(pudptr,pudval) \
67 set_64bit((unsigned long long *)(pudptr),pud_val(pudval)) 67 (*(pudptr) = (pudval))
68 68
69/* 69/*
70 * Pentium-II erratum A13: in PAE mode we explicitly have to flush 70 * Pentium-II erratum A13: in PAE mode we explicitly have to flush
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 77c6497f416e..47bc1ffa3d4c 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -86,9 +86,7 @@ void paging_init(void);
86#endif 86#endif
87 87
88/* 88/*
89 * The 4MB page is guessing.. Detailed in the infamous "Chapter H" 89 * _PAGE_PSE set in the page directory entry just means that
90 * of the Pentium details, but assuming intel did the straightforward
91 * thing, this bit set in the page directory entry just means that
92 * the page directory entry points directly to a 4MB-aligned block of 90 * the page directory entry points directly to a 4MB-aligned block of
93 * memory. 91 * memory.
94 */ 92 */
@@ -119,8 +117,10 @@ void paging_init(void);
119#define _PAGE_UNUSED2 0x400 117#define _PAGE_UNUSED2 0x400
120#define _PAGE_UNUSED3 0x800 118#define _PAGE_UNUSED3 0x800
121 119
122#define _PAGE_FILE 0x040 /* set:pagecache unset:swap */ 120/* If _PAGE_PRESENT is clear, we use these: */
123#define _PAGE_PROTNONE 0x080 /* If not present */ 121#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
122#define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
123 pte_present gives true */
124#ifdef CONFIG_X86_PAE 124#ifdef CONFIG_X86_PAE
125#define _PAGE_NX (1ULL<<_PAGE_BIT_NX) 125#define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
126#else 126#else
@@ -215,11 +215,13 @@ extern unsigned long pg0[];
215 * The following only work if pte_present() is true. 215 * The following only work if pte_present() is true.
216 * Undefined behaviour if not.. 216 * Undefined behaviour if not..
217 */ 217 */
218#define __LARGE_PTE (_PAGE_PSE | _PAGE_PRESENT)
218static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; } 219static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
219static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; } 220static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
220static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; } 221static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; }
221static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; } 222static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
222static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; } 223static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; }
224static inline int pte_huge(pte_t pte) { return ((pte).pte_low & __LARGE_PTE) == __LARGE_PTE; }
223 225
224/* 226/*
225 * The following only works if pte_present() is not true. 227 * The following only works if pte_present() is not true.
@@ -236,7 +238,7 @@ static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return
236static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; } 238static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
237static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; } 239static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
238static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; } 240static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
239static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PRESENT | _PAGE_PSE; return pte; } 241static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= __LARGE_PTE; return pte; }
240 242
241#ifdef CONFIG_X86_PAE 243#ifdef CONFIG_X86_PAE
242# include <asm/pgtable-3level.h> 244# include <asm/pgtable-3level.h>
@@ -258,12 +260,39 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned
258 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low); 260 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low);
259} 261}
260 262
263static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
264{
265 pte_t pte;
266 if (full) {
267 pte = *ptep;
268 *ptep = __pte(0);
269 } else {
270 pte = ptep_get_and_clear(mm, addr, ptep);
271 }
272 return pte;
273}
274
261static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 275static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
262{ 276{
263 clear_bit(_PAGE_BIT_RW, &ptep->pte_low); 277 clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
264} 278}
265 279
266/* 280/*
281 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
282 *
283 * dst - pointer to pgd range anwhere on a pgd page
284 * src - ""
285 * count - the number of pgds to copy.
286 *
287 * dst and src can be on the same page, but the range must not overlap,
288 * and must not cross a page boundary.
289 */
290static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
291{
292 memcpy(dst, src, count * sizeof(pgd_t));
293}
294
295/*
267 * Macro to mark a page protection value as "uncacheable". On processors which do not support 296 * Macro to mark a page protection value as "uncacheable". On processors which do not support
268 * it, this is a no-op. 297 * it, this is a no-op.
269 */ 298 */
@@ -415,6 +444,7 @@ extern void noexec_setup(const char *str);
415#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 444#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
416#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY 445#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
417#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 446#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
447#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
418#define __HAVE_ARCH_PTEP_SET_WRPROTECT 448#define __HAVE_ARCH_PTEP_SET_WRPROTECT
419#define __HAVE_ARCH_PTE_SAME 449#define __HAVE_ARCH_PTE_SAME
420#include <asm-generic/pgtable.h> 450#include <asm-generic/pgtable.h>
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index d0d8b0160090..37bef8ed7bed 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -203,9 +203,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
203 return edx; 203 return edx;
204} 204}
205 205
206#define load_cr3(pgdir) \ 206#define load_cr3(pgdir) write_cr3(__pa(pgdir))
207 asm volatile("movl %0,%%cr3": :"r" (__pa(pgdir)))
208
209 207
210/* 208/*
211 * Intel CPU features in CR4 209 * Intel CPU features in CR4
@@ -232,22 +230,20 @@ extern unsigned long mmu_cr4_features;
232 230
233static inline void set_in_cr4 (unsigned long mask) 231static inline void set_in_cr4 (unsigned long mask)
234{ 232{
233 unsigned cr4;
235 mmu_cr4_features |= mask; 234 mmu_cr4_features |= mask;
236 __asm__("movl %%cr4,%%eax\n\t" 235 cr4 = read_cr4();
237 "orl %0,%%eax\n\t" 236 cr4 |= mask;
238 "movl %%eax,%%cr4\n" 237 write_cr4(cr4);
239 : : "irg" (mask)
240 :"ax");
241} 238}
242 239
243static inline void clear_in_cr4 (unsigned long mask) 240static inline void clear_in_cr4 (unsigned long mask)
244{ 241{
242 unsigned cr4;
245 mmu_cr4_features &= ~mask; 243 mmu_cr4_features &= ~mask;
246 __asm__("movl %%cr4,%%eax\n\t" 244 cr4 = read_cr4();
247 "andl %0,%%eax\n\t" 245 cr4 &= ~mask;
248 "movl %%eax,%%cr4\n" 246 write_cr4(cr4);
249 : : "irg" (~mask)
250 :"ax");
251} 247}
252 248
253/* 249/*
@@ -281,6 +277,11 @@ static inline void clear_in_cr4 (unsigned long mask)
281 outb((data), 0x23); \ 277 outb((data), 0x23); \
282} while (0) 278} while (0)
283 279
280static inline void serialize_cpu(void)
281{
282 __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
283}
284
284static inline void __monitor(const void *eax, unsigned long ecx, 285static inline void __monitor(const void *eax, unsigned long ecx,
285 unsigned long edx) 286 unsigned long edx)
286{ 287{
@@ -454,6 +455,7 @@ struct thread_struct {
454 unsigned int saved_fs, saved_gs; 455 unsigned int saved_fs, saved_gs;
455/* IO permissions */ 456/* IO permissions */
456 unsigned long *io_bitmap_ptr; 457 unsigned long *io_bitmap_ptr;
458 unsigned long iopl;
457/* max allowed port in the bitmap, in bytes: */ 459/* max allowed port in the bitmap, in bytes: */
458 unsigned long io_bitmap_max; 460 unsigned long io_bitmap_max;
459}; 461};
@@ -474,7 +476,6 @@ struct thread_struct {
474 .esp0 = sizeof(init_stack) + (long)&init_stack, \ 476 .esp0 = sizeof(init_stack) + (long)&init_stack, \
475 .ss0 = __KERNEL_DS, \ 477 .ss0 = __KERNEL_DS, \
476 .ss1 = __KERNEL_CS, \ 478 .ss1 = __KERNEL_CS, \
477 .ldt = GDT_ENTRY_LDT, \
478 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \ 479 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \
479 .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \ 480 .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \
480} 481}
@@ -511,6 +512,21 @@ static inline void load_esp0(struct tss_struct *tss, struct thread_struct *threa
511 : /* no output */ \ 512 : /* no output */ \
512 :"r" (value)) 513 :"r" (value))
513 514
515/*
516 * Set IOPL bits in EFLAGS from given mask
517 */
518static inline void set_iopl_mask(unsigned mask)
519{
520 unsigned int reg;
521 __asm__ __volatile__ ("pushfl;"
522 "popl %0;"
523 "andl %1, %0;"
524 "orl %2, %0;"
525 "pushl %0;"
526 "popfl"
527 : "=&r" (reg)
528 : "i" (~X86_EFLAGS_IOPL), "r" (mask));
529}
514 530
515/* Forward declaration, a strange C thing */ 531/* Forward declaration, a strange C thing */
516struct task_struct; 532struct task_struct;
diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h
index 05532875e39e..7e0f2945d17d 100644
--- a/include/asm-i386/ptrace.h
+++ b/include/asm-i386/ptrace.h
@@ -61,6 +61,13 @@ struct pt_regs {
61struct task_struct; 61struct task_struct;
62extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code); 62extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code);
63 63
64/*
65 * user_mode_vm(regs) determines whether a register set came from user mode.
66 * This is true if V8086 mode was enabled OR if the register set was from
67 * protected mode with RPL-3 CS value. This tricky test checks that with
68 * one comparison. Many places in the kernel can bypass this full check
69 * if they have already ruled out V8086 mode, so user_mode(regs) can be used.
70 */
64static inline int user_mode(struct pt_regs *regs) 71static inline int user_mode(struct pt_regs *regs)
65{ 72{
66 return (regs->xcs & 3) != 0; 73 return (regs->xcs & 3) != 0;
diff --git a/include/asm-i386/setup.h b/include/asm-i386/setup.h
index 7a32184d54bf..826a8ca50ac8 100644
--- a/include/asm-i386/setup.h
+++ b/include/asm-i386/setup.h
@@ -44,7 +44,7 @@ extern unsigned char boot_params[PARAM_SIZE];
44#define EFI_SYSTAB ((efi_system_table_t *) *((unsigned long *)(PARAM+0x1c4))) 44#define EFI_SYSTAB ((efi_system_table_t *) *((unsigned long *)(PARAM+0x1c4)))
45#define EFI_MEMDESC_SIZE (*((unsigned long *) (PARAM+0x1c8))) 45#define EFI_MEMDESC_SIZE (*((unsigned long *) (PARAM+0x1c8)))
46#define EFI_MEMDESC_VERSION (*((unsigned long *) (PARAM+0x1cc))) 46#define EFI_MEMDESC_VERSION (*((unsigned long *) (PARAM+0x1cc)))
47#define EFI_MEMMAP ((efi_memory_desc_t *) *((unsigned long *)(PARAM+0x1d0))) 47#define EFI_MEMMAP ((void *) *((unsigned long *)(PARAM+0x1d0)))
48#define EFI_MEMMAP_SIZE (*((unsigned long *) (PARAM+0x1d4))) 48#define EFI_MEMMAP_SIZE (*((unsigned long *) (PARAM+0x1d4)))
49#define MOUNT_ROOT_RDONLY (*(unsigned short *) (PARAM+0x1F2)) 49#define MOUNT_ROOT_RDONLY (*(unsigned short *) (PARAM+0x1F2))
50#define RAMDISK_FLAGS (*(unsigned short *) (PARAM+0x1F8)) 50#define RAMDISK_FLAGS (*(unsigned short *) (PARAM+0x1F8))
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index a283738b80b3..13250199976d 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -59,7 +59,7 @@ extern void cpu_uninit(void);
59 59
60extern cpumask_t cpu_callout_map; 60extern cpumask_t cpu_callout_map;
61extern cpumask_t cpu_callin_map; 61extern cpumask_t cpu_callin_map;
62#define cpu_possible_map cpu_callout_map 62extern cpumask_t cpu_possible_map;
63 63
64/* We don't mark CPUs online until __cpu_up(), so we need another measure */ 64/* We don't mark CPUs online until __cpu_up(), so we need another measure */
65static inline int num_booting_cpus(void) 65static inline int num_booting_cpus(void)
diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h
index 3db717a244f0..acd5c26b69ba 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-i386/system.h
@@ -14,8 +14,7 @@ extern struct task_struct * FASTCALL(__switch_to(struct task_struct *prev, struc
14 14
15#define switch_to(prev,next,last) do { \ 15#define switch_to(prev,next,last) do { \
16 unsigned long esi,edi; \ 16 unsigned long esi,edi; \
17 asm volatile("pushfl\n\t" \ 17 asm volatile("pushl %%ebp\n\t" \
18 "pushl %%ebp\n\t" \
19 "movl %%esp,%0\n\t" /* save ESP */ \ 18 "movl %%esp,%0\n\t" /* save ESP */ \
20 "movl %5,%%esp\n\t" /* restore ESP */ \ 19 "movl %5,%%esp\n\t" /* restore ESP */ \
21 "movl $1f,%1\n\t" /* save EIP */ \ 20 "movl $1f,%1\n\t" /* save EIP */ \
@@ -23,7 +22,6 @@ extern struct task_struct * FASTCALL(__switch_to(struct task_struct *prev, struc
23 "jmp __switch_to\n" \ 22 "jmp __switch_to\n" \
24 "1:\t" \ 23 "1:\t" \
25 "popl %%ebp\n\t" \ 24 "popl %%ebp\n\t" \
26 "popfl" \
27 :"=m" (prev->thread.esp),"=m" (prev->thread.eip), \ 25 :"=m" (prev->thread.esp),"=m" (prev->thread.eip), \
28 "=a" (last),"=S" (esi),"=D" (edi) \ 26 "=a" (last),"=S" (esi),"=D" (edi) \
29 :"m" (next->thread.esp),"m" (next->thread.eip), \ 27 :"m" (next->thread.esp),"m" (next->thread.eip), \
@@ -93,13 +91,13 @@ static inline unsigned long _get_base(char * addr)
93 ".align 4\n\t" \ 91 ".align 4\n\t" \
94 ".long 1b,3b\n" \ 92 ".long 1b,3b\n" \
95 ".previous" \ 93 ".previous" \
96 : :"m" (value)) 94 : :"rm" (value))
97 95
98/* 96/*
99 * Save a segment register away 97 * Save a segment register away
100 */ 98 */
101#define savesegment(seg, value) \ 99#define savesegment(seg, value) \
102 asm volatile("mov %%" #seg ",%0":"=m" (value)) 100 asm volatile("mov %%" #seg ",%0":"=rm" (value))
103 101
104/* 102/*
105 * Clear and set 'TS' bit respectively 103 * Clear and set 'TS' bit respectively
@@ -107,13 +105,33 @@ static inline unsigned long _get_base(char * addr)
107#define clts() __asm__ __volatile__ ("clts") 105#define clts() __asm__ __volatile__ ("clts")
108#define read_cr0() ({ \ 106#define read_cr0() ({ \
109 unsigned int __dummy; \ 107 unsigned int __dummy; \
110 __asm__( \ 108 __asm__ __volatile__( \
111 "movl %%cr0,%0\n\t" \ 109 "movl %%cr0,%0\n\t" \
112 :"=r" (__dummy)); \ 110 :"=r" (__dummy)); \
113 __dummy; \ 111 __dummy; \
114}) 112})
115#define write_cr0(x) \ 113#define write_cr0(x) \
116 __asm__("movl %0,%%cr0": :"r" (x)); 114 __asm__ __volatile__("movl %0,%%cr0": :"r" (x));
115
116#define read_cr2() ({ \
117 unsigned int __dummy; \
118 __asm__ __volatile__( \
119 "movl %%cr2,%0\n\t" \
120 :"=r" (__dummy)); \
121 __dummy; \
122})
123#define write_cr2(x) \
124 __asm__ __volatile__("movl %0,%%cr2": :"r" (x));
125
126#define read_cr3() ({ \
127 unsigned int __dummy; \
128 __asm__ ( \
129 "movl %%cr3,%0\n\t" \
130 :"=r" (__dummy)); \
131 __dummy; \
132})
133#define write_cr3(x) \
134 __asm__ __volatile__("movl %0,%%cr3": :"r" (x));
117 135
118#define read_cr4() ({ \ 136#define read_cr4() ({ \
119 unsigned int __dummy; \ 137 unsigned int __dummy; \
@@ -123,7 +141,7 @@ static inline unsigned long _get_base(char * addr)
123 __dummy; \ 141 __dummy; \
124}) 142})
125#define write_cr4(x) \ 143#define write_cr4(x) \
126 __asm__("movl %0,%%cr4": :"r" (x)); 144 __asm__ __volatile__("movl %0,%%cr4": :"r" (x));
127#define stts() write_cr0(8 | read_cr0()) 145#define stts() write_cr0(8 | read_cr0())
128 146
129#endif /* __KERNEL__ */ 147#endif /* __KERNEL__ */
@@ -447,6 +465,8 @@ struct alt_instr {
447#define local_irq_enable() __asm__ __volatile__("sti": : :"memory") 465#define local_irq_enable() __asm__ __volatile__("sti": : :"memory")
448/* used in the idle loop; sti takes one instruction cycle to complete */ 466/* used in the idle loop; sti takes one instruction cycle to complete */
449#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory") 467#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory")
468/* used when interrupts are already enabled or to shutdown the processor */
469#define halt() __asm__ __volatile__("hlt": : :"memory")
450 470
451#define irqs_disabled() \ 471#define irqs_disabled() \
452({ \ 472({ \
diff --git a/include/asm-i386/thread_info.h b/include/asm-i386/thread_info.h
index 95add81237ea..e2cb9fa6f563 100644
--- a/include/asm-i386/thread_info.h
+++ b/include/asm-i386/thread_info.h
@@ -139,6 +139,7 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
139#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 139#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
140#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */ 140#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
141#define TIF_IRET 5 /* return with iret */ 141#define TIF_IRET 5 /* return with iret */
142#define TIF_SYSCALL_EMU 6 /* syscall emulation active */
142#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ 143#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */
143#define TIF_SECCOMP 8 /* secure computing */ 144#define TIF_SECCOMP 8 /* secure computing */
144#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 145#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
@@ -150,13 +151,15 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
150#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 151#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
151#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) 152#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
152#define _TIF_IRET (1<<TIF_IRET) 153#define _TIF_IRET (1<<TIF_IRET)
154#define _TIF_SYSCALL_EMU (1<<TIF_SYSCALL_EMU)
153#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) 155#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
154#define _TIF_SECCOMP (1<<TIF_SECCOMP) 156#define _TIF_SECCOMP (1<<TIF_SECCOMP)
155#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 157#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
156 158
157/* work to do on interrupt/exception return */ 159/* work to do on interrupt/exception return */
158#define _TIF_WORK_MASK \ 160#define _TIF_WORK_MASK \
159 (0x0000FFFF & ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|_TIF_SECCOMP)) 161 (0x0000FFFF & ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|\
162 _TIF_SECCOMP|_TIF_SYSCALL_EMU))
160/* work to do on any return to u-space */ 163/* work to do on any return to u-space */
161#define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP) 164#define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP)
162 165
diff --git a/include/asm-i386/timer.h b/include/asm-i386/timer.h
index dcf1e07db08a..aed16437479d 100644
--- a/include/asm-i386/timer.h
+++ b/include/asm-i386/timer.h
@@ -1,6 +1,7 @@
1#ifndef _ASMi386_TIMER_H 1#ifndef _ASMi386_TIMER_H
2#define _ASMi386_TIMER_H 2#define _ASMi386_TIMER_H
3#include <linux/init.h> 3#include <linux/init.h>
4#include <linux/pm.h>
4 5
5/** 6/**
6 * struct timer_ops - used to define a timer source 7 * struct timer_ops - used to define a timer source
@@ -23,6 +24,8 @@ struct timer_opts {
23 unsigned long long (*monotonic_clock)(void); 24 unsigned long long (*monotonic_clock)(void);
24 void (*delay)(unsigned long); 25 void (*delay)(unsigned long);
25 unsigned long (*read_timer)(void); 26 unsigned long (*read_timer)(void);
27 int (*suspend)(pm_message_t state);
28 int (*resume)(void);
26}; 29};
27 30
28struct init_timer_opts { 31struct init_timer_opts {
diff --git a/include/asm-i386/types.h b/include/asm-i386/types.h
index 901b77c42b8a..ced00fe8fe61 100644
--- a/include/asm-i386/types.h
+++ b/include/asm-i386/types.h
@@ -63,8 +63,6 @@ typedef u64 sector_t;
63#define HAVE_SECTOR_T 63#define HAVE_SECTOR_T
64#endif 64#endif
65 65
66typedef unsigned short kmem_bufctl_t;
67
68#endif /* __ASSEMBLY__ */ 66#endif /* __ASSEMBLY__ */
69 67
70#endif /* __KERNEL__ */ 68#endif /* __KERNEL__ */
diff --git a/include/asm-i386/xor.h b/include/asm-i386/xor.h
index f80e2dbe1b56..23c86cef3b25 100644
--- a/include/asm-i386/xor.h
+++ b/include/asm-i386/xor.h
@@ -535,14 +535,14 @@ static struct xor_block_template xor_block_p5_mmx = {
535 535
536#define XMMS_SAVE do { \ 536#define XMMS_SAVE do { \
537 preempt_disable(); \ 537 preempt_disable(); \
538 cr0 = read_cr0(); \
539 clts(); \
538 __asm__ __volatile__ ( \ 540 __asm__ __volatile__ ( \
539 "movl %%cr0,%0 ;\n\t" \ 541 "movups %%xmm0,(%0) ;\n\t" \
540 "clts ;\n\t" \ 542 "movups %%xmm1,0x10(%0) ;\n\t" \
541 "movups %%xmm0,(%1) ;\n\t" \ 543 "movups %%xmm2,0x20(%0) ;\n\t" \
542 "movups %%xmm1,0x10(%1) ;\n\t" \ 544 "movups %%xmm3,0x30(%0) ;\n\t" \
543 "movups %%xmm2,0x20(%1) ;\n\t" \ 545 : \
544 "movups %%xmm3,0x30(%1) ;\n\t" \
545 : "=&r" (cr0) \
546 : "r" (xmm_save) \ 546 : "r" (xmm_save) \
547 : "memory"); \ 547 : "memory"); \
548} while(0) 548} while(0)
@@ -550,14 +550,14 @@ static struct xor_block_template xor_block_p5_mmx = {
550#define XMMS_RESTORE do { \ 550#define XMMS_RESTORE do { \
551 __asm__ __volatile__ ( \ 551 __asm__ __volatile__ ( \
552 "sfence ;\n\t" \ 552 "sfence ;\n\t" \
553 "movups (%1),%%xmm0 ;\n\t" \ 553 "movups (%0),%%xmm0 ;\n\t" \
554 "movups 0x10(%1),%%xmm1 ;\n\t" \ 554 "movups 0x10(%0),%%xmm1 ;\n\t" \
555 "movups 0x20(%1),%%xmm2 ;\n\t" \ 555 "movups 0x20(%0),%%xmm2 ;\n\t" \
556 "movups 0x30(%1),%%xmm3 ;\n\t" \ 556 "movups 0x30(%0),%%xmm3 ;\n\t" \
557 "movl %0,%%cr0 ;\n\t" \
558 : \ 557 : \
559 : "r" (cr0), "r" (xmm_save) \ 558 : "r" (xmm_save) \
560 : "memory"); \ 559 : "memory"); \
560 write_cr0(cr0); \
561 preempt_enable(); \ 561 preempt_enable(); \
562} while(0) 562} while(0)
563 563
diff --git a/include/asm-ia64/types.h b/include/asm-ia64/types.h
index a677565aa954..902850d12424 100644
--- a/include/asm-ia64/types.h
+++ b/include/asm-ia64/types.h
@@ -67,8 +67,6 @@ typedef __u64 u64;
67 67
68typedef u64 dma_addr_t; 68typedef u64 dma_addr_t;
69 69
70typedef unsigned short kmem_bufctl_t;
71
72# endif /* __KERNEL__ */ 70# endif /* __KERNEL__ */
73#endif /* !__ASSEMBLY__ */ 71#endif /* !__ASSEMBLY__ */
74 72
diff --git a/include/asm-m32r/page.h b/include/asm-m32r/page.h
index 1c6abb9f3f1f..4ab578876361 100644
--- a/include/asm-m32r/page.h
+++ b/include/asm-m32r/page.h
@@ -61,25 +61,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
61 61
62/* This handles the memory map.. */ 62/* This handles the memory map.. */
63 63
64#ifndef __ASSEMBLY__
65
66/* Pure 2^n version of get_order */
67static __inline__ int get_order(unsigned long size)
68{
69 int order;
70
71 size = (size - 1) >> (PAGE_SHIFT - 1);
72 order = -1;
73 do {
74 size >>= 1;
75 order++;
76 } while (size);
77
78 return order;
79}
80
81#endif /* __ASSEMBLY__ */
82
83#define __MEMORY_START CONFIG_MEMORY_START 64#define __MEMORY_START CONFIG_MEMORY_START
84#define __MEMORY_SIZE CONFIG_MEMORY_SIZE 65#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
85 66
@@ -111,5 +92,7 @@ static __inline__ int get_order(unsigned long size)
111 92
112#endif /* __KERNEL__ */ 93#endif /* __KERNEL__ */
113 94
95#include <asm-generic/page.h>
96
114#endif /* _ASM_M32R_PAGE_H */ 97#endif /* _ASM_M32R_PAGE_H */
115 98
diff --git a/include/asm-m32r/types.h b/include/asm-m32r/types.h
index ca0a887d2237..fcf24c64c3ba 100644
--- a/include/asm-m32r/types.h
+++ b/include/asm-m32r/types.h
@@ -55,8 +55,6 @@ typedef unsigned long long u64;
55typedef u32 dma_addr_t; 55typedef u32 dma_addr_t;
56typedef u64 dma64_addr_t; 56typedef u64 dma64_addr_t;
57 57
58typedef unsigned short kmem_bufctl_t;
59
60#endif /* __ASSEMBLY__ */ 58#endif /* __ASSEMBLY__ */
61 59
62#endif /* __KERNEL__ */ 60#endif /* __KERNEL__ */
diff --git a/include/asm-m68k/cacheflush.h b/include/asm-m68k/cacheflush.h
index e4773946f10d..8aba971b1368 100644
--- a/include/asm-m68k/cacheflush.h
+++ b/include/asm-m68k/cacheflush.h
@@ -130,20 +130,25 @@ static inline void __flush_page_to_ram(void *vaddr)
130#define flush_dcache_mmap_lock(mapping) do { } while (0) 130#define flush_dcache_mmap_lock(mapping) do { } while (0)
131#define flush_dcache_mmap_unlock(mapping) do { } while (0) 131#define flush_dcache_mmap_unlock(mapping) do { } while (0)
132#define flush_icache_page(vma, page) __flush_page_to_ram(page_address(page)) 132#define flush_icache_page(vma, page) __flush_page_to_ram(page_address(page))
133#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
134
135#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
136 do { \
137 flush_cache_page(vma, vaddr, page_to_pfn(page));\
138 memcpy(dst, src, len); \
139 } while (0)
140
141#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
142 do { \
143 flush_cache_page(vma, vaddr, page_to_pfn(page));\
144 memcpy(dst, src, len); \
145 } while (0)
146 133
134extern void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
135 unsigned long addr, int len);
147extern void flush_icache_range(unsigned long address, unsigned long endaddr); 136extern void flush_icache_range(unsigned long address, unsigned long endaddr);
148 137
138static inline void copy_to_user_page(struct vm_area_struct *vma,
139 struct page *page, unsigned long vaddr,
140 void *dst, void *src, int len)
141{
142 flush_cache_page(vma, vaddr, page_to_pfn(page));
143 memcpy(dst, src, len);
144 flush_icache_user_range(vma, page, vaddr, len);
145}
146static inline void copy_from_user_page(struct vm_area_struct *vma,
147 struct page *page, unsigned long vaddr,
148 void *dst, void *src, int len)
149{
150 flush_cache_page(vma, vaddr, page_to_pfn(page));
151 memcpy(dst, src, len);
152}
153
149#endif /* _M68K_CACHEFLUSH_H */ 154#endif /* _M68K_CACHEFLUSH_H */
diff --git a/include/asm-m68k/page.h b/include/asm-m68k/page.h
index 206313e2a817..f206dfbc1d48 100644
--- a/include/asm-m68k/page.h
+++ b/include/asm-m68k/page.h
@@ -107,20 +107,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
107/* to align the pointer to the (next) page boundary */ 107/* to align the pointer to the (next) page boundary */
108#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) 108#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
109 109
110/* Pure 2^n version of get_order */
111static inline int get_order(unsigned long size)
112{
113 int order;
114
115 size = (size-1) >> (PAGE_SHIFT-1);
116 order = -1;
117 do {
118 size >>= 1;
119 order++;
120 } while (size);
121 return order;
122}
123
124#endif /* !__ASSEMBLY__ */ 110#endif /* !__ASSEMBLY__ */
125 111
126#include <asm/page_offset.h> 112#include <asm/page_offset.h>
@@ -192,4 +178,6 @@ static inline void *__va(unsigned long x)
192 178
193#endif /* __KERNEL__ */ 179#endif /* __KERNEL__ */
194 180
181#include <asm-generic/page.h>
182
195#endif /* _M68K_PAGE_H */ 183#endif /* _M68K_PAGE_H */
diff --git a/include/asm-m68k/string.h b/include/asm-m68k/string.h
index 44def078132a..6c59215b285e 100644
--- a/include/asm-m68k/string.h
+++ b/include/asm-m68k/string.h
@@ -80,43 +80,6 @@ static inline char * strchr(const char * s, int c)
80 return( (char *) s); 80 return( (char *) s);
81} 81}
82 82
83#if 0
84#define __HAVE_ARCH_STRPBRK
85static inline char *strpbrk(const char *cs,const char *ct)
86{
87 const char *sc1,*sc2;
88
89 for( sc1 = cs; *sc1 != '\0'; ++sc1)
90 for( sc2 = ct; *sc2 != '\0'; ++sc2)
91 if (*sc1 == *sc2)
92 return((char *) sc1);
93 return( NULL );
94}
95#endif
96
97#if 0
98#define __HAVE_ARCH_STRSPN
99static inline size_t strspn(const char *s, const char *accept)
100{
101 const char *p;
102 const char *a;
103 size_t count = 0;
104
105 for (p = s; *p != '\0'; ++p)
106 {
107 for (a = accept; *a != '\0'; ++a)
108 if (*p == *a)
109 break;
110 if (*a == '\0')
111 return count;
112 else
113 ++count;
114 }
115
116 return count;
117}
118#endif
119
120/* strstr !! */ 83/* strstr !! */
121 84
122#define __HAVE_ARCH_STRLEN 85#define __HAVE_ARCH_STRLEN
@@ -173,370 +136,18 @@ static inline int strncmp(const char * cs,const char * ct,size_t count)
173} 136}
174 137
175#define __HAVE_ARCH_MEMSET 138#define __HAVE_ARCH_MEMSET
176/* 139extern void *memset(void *, int, __kernel_size_t);
177 * This is really ugly, but its highly optimizatiable by the 140#define memset(d, c, n) __builtin_memset(d, c, n)
178 * compiler and is meant as compensation for gcc's missing
179 * __builtin_memset(). For the 680[23]0 it might be worth considering
180 * the optimal number of misaligned writes compared to the number of
181 * tests'n'branches needed to align the destination address. The
182 * 680[46]0 doesn't really care due to their copy-back caches.
183 * 10/09/96 - Jes Sorensen
184 */
185static inline void * __memset_g(void * s, int c, size_t count)
186{
187 void *xs = s;
188 size_t temp;
189
190 if (!count)
191 return xs;
192
193 c &= 0xff;
194 c |= c << 8;
195 c |= c << 16;
196
197 if (count < 36){
198 long *ls = s;
199
200 switch(count){
201 case 32: case 33: case 34: case 35:
202 *ls++ = c;
203 case 28: case 29: case 30: case 31:
204 *ls++ = c;
205 case 24: case 25: case 26: case 27:
206 *ls++ = c;
207 case 20: case 21: case 22: case 23:
208 *ls++ = c;
209 case 16: case 17: case 18: case 19:
210 *ls++ = c;
211 case 12: case 13: case 14: case 15:
212 *ls++ = c;
213 case 8: case 9: case 10: case 11:
214 *ls++ = c;
215 case 4: case 5: case 6: case 7:
216 *ls++ = c;
217 break;
218 default:
219 break;
220 }
221 s = ls;
222 if (count & 0x02){
223 short *ss = s;
224 *ss++ = c;
225 s = ss;
226 }
227 if (count & 0x01){
228 char *cs = s;
229 *cs++ = c;
230 s = cs;
231 }
232 return xs;
233 }
234
235 if ((long) s & 1)
236 {
237 char *cs = s;
238 *cs++ = c;
239 s = cs;
240 count--;
241 }
242 if (count > 2 && (long) s & 2)
243 {
244 short *ss = s;
245 *ss++ = c;
246 s = ss;
247 count -= 2;
248 }
249 temp = count >> 2;
250 if (temp)
251 {
252 long *ls = s;
253 temp--;
254 do
255 *ls++ = c;
256 while (temp--);
257 s = ls;
258 }
259 if (count & 2)
260 {
261 short *ss = s;
262 *ss++ = c;
263 s = ss;
264 }
265 if (count & 1)
266 {
267 char *cs = s;
268 *cs = c;
269 }
270 return xs;
271}
272
273/*
274 * __memset_page assumes that data is longword aligned. Most, if not
275 * all, of these page sized memsets are performed on page aligned
276 * areas, thus we do not need to check if the destination is longword
277 * aligned. Of course we suffer a serious performance loss if this is
278 * not the case but I think the risk of this ever happening is
279 * extremely small. We spend a lot of time clearing pages in
280 * get_empty_page() so I think it is worth it anyway. Besides, the
281 * 680[46]0 do not really care about misaligned writes due to their
282 * copy-back cache.
283 *
284 * The optimized case for the 680[46]0 is implemented using the move16
285 * instruction. My tests showed that this implementation is 35-45%
286 * faster than the original implementation using movel, the only
287 * caveat is that the destination address must be 16-byte aligned.
288 * 01/09/96 - Jes Sorensen
289 */
290static inline void * __memset_page(void * s,int c,size_t count)
291{
292 unsigned long data, tmp;
293 void *xs = s;
294
295 c = c & 255;
296 data = c | (c << 8);
297 data |= data << 16;
298
299#ifdef CPU_M68040_OR_M68060_ONLY
300
301 if (((unsigned long) s) & 0x0f)
302 __memset_g(s, c, count);
303 else{
304 unsigned long *sp = s;
305 *sp++ = data;
306 *sp++ = data;
307 *sp++ = data;
308 *sp++ = data;
309
310 __asm__ __volatile__("1:\t"
311 ".chip 68040\n\t"
312 "move16 %2@+,%0@+\n\t"
313 ".chip 68k\n\t"
314 "subqw #8,%2\n\t"
315 "subqw #8,%2\n\t"
316 "dbra %1,1b\n\t"
317 : "=a" (sp), "=d" (tmp)
318 : "a" (s), "0" (sp), "1" ((count - 16) / 16 - 1)
319 );
320 }
321
322#else
323 __asm__ __volatile__("1:\t"
324 "movel %2,%0@+\n\t"
325 "movel %2,%0@+\n\t"
326 "movel %2,%0@+\n\t"
327 "movel %2,%0@+\n\t"
328 "movel %2,%0@+\n\t"
329 "movel %2,%0@+\n\t"
330 "movel %2,%0@+\n\t"
331 "movel %2,%0@+\n\t"
332 "dbra %1,1b\n\t"
333 : "=a" (s), "=d" (tmp)
334 : "d" (data), "0" (s), "1" (count / 32 - 1)
335 );
336#endif
337
338 return xs;
339}
340
341extern void *memset(void *,int,__kernel_size_t);
342
343#define __memset_const(s,c,count) \
344((count==PAGE_SIZE) ? \
345 __memset_page((s),(c),(count)) : \
346 __memset_g((s),(c),(count)))
347
348#define memset(s, c, count) \
349(__builtin_constant_p(count) ? \
350 __memset_const((s),(c),(count)) : \
351 __memset_g((s),(c),(count)))
352 141
353#define __HAVE_ARCH_MEMCPY 142#define __HAVE_ARCH_MEMCPY
354extern void * memcpy(void *, const void *, size_t ); 143extern void *memcpy(void *, const void *, __kernel_size_t);
355/* 144#define memcpy(d, s, n) __builtin_memcpy(d, s, n)
356 * __builtin_memcpy() does not handle page-sized memcpys very well,
357 * thus following the same assumptions as for page-sized memsets, this
358 * function copies page-sized areas using an unrolled loop, without
359 * considering alignment.
360 *
361 * For the 680[46]0 only kernels we use the move16 instruction instead
362 * as it writes through the data-cache, invalidating the cache-lines
363 * touched. In this way we do not use up the entire data-cache (well,
364 * half of it on the 68060) by copying a page. An unrolled loop of two
365 * move16 instructions seem to the fastest. The only caveat is that
366 * both source and destination must be 16-byte aligned, if not we fall
367 * back to the generic memcpy function. - Jes
368 */
369static inline void * __memcpy_page(void * to, const void * from, size_t count)
370{
371 unsigned long tmp;
372 void *xto = to;
373
374#ifdef CPU_M68040_OR_M68060_ONLY
375
376 if (((unsigned long) to | (unsigned long) from) & 0x0f)
377 return memcpy(to, from, count);
378
379 __asm__ __volatile__("1:\t"
380 ".chip 68040\n\t"
381 "move16 %1@+,%0@+\n\t"
382 "move16 %1@+,%0@+\n\t"
383 ".chip 68k\n\t"
384 "dbra %2,1b\n\t"
385 : "=a" (to), "=a" (from), "=d" (tmp)
386 : "0" (to), "1" (from) , "2" (count / 32 - 1)
387 );
388#else
389 __asm__ __volatile__("1:\t"
390 "movel %1@+,%0@+\n\t"
391 "movel %1@+,%0@+\n\t"
392 "movel %1@+,%0@+\n\t"
393 "movel %1@+,%0@+\n\t"
394 "movel %1@+,%0@+\n\t"
395 "movel %1@+,%0@+\n\t"
396 "movel %1@+,%0@+\n\t"
397 "movel %1@+,%0@+\n\t"
398 "dbra %2,1b\n\t"
399 : "=a" (to), "=a" (from), "=d" (tmp)
400 : "0" (to), "1" (from) , "2" (count / 32 - 1)
401 );
402#endif
403 return xto;
404}
405
406#define __memcpy_const(to, from, n) \
407((n==PAGE_SIZE) ? \
408 __memcpy_page((to),(from),(n)) : \
409 __builtin_memcpy((to),(from),(n)))
410
411#define memcpy(to, from, n) \
412(__builtin_constant_p(n) ? \
413 __memcpy_const((to),(from),(n)) : \
414 memcpy((to),(from),(n)))
415 145
416#define __HAVE_ARCH_MEMMOVE 146#define __HAVE_ARCH_MEMMOVE
417static inline void * memmove(void * dest,const void * src, size_t n) 147extern void *memmove(void *, const void *, __kernel_size_t);
418{
419 void *xdest = dest;
420 size_t temp;
421
422 if (!n)
423 return xdest;
424
425 if (dest < src)
426 {
427 if ((long) dest & 1)
428 {
429 char *cdest = dest;
430 const char *csrc = src;
431 *cdest++ = *csrc++;
432 dest = cdest;
433 src = csrc;
434 n--;
435 }
436 if (n > 2 && (long) dest & 2)
437 {
438 short *sdest = dest;
439 const short *ssrc = src;
440 *sdest++ = *ssrc++;
441 dest = sdest;
442 src = ssrc;
443 n -= 2;
444 }
445 temp = n >> 2;
446 if (temp)
447 {
448 long *ldest = dest;
449 const long *lsrc = src;
450 temp--;
451 do
452 *ldest++ = *lsrc++;
453 while (temp--);
454 dest = ldest;
455 src = lsrc;
456 }
457 if (n & 2)
458 {
459 short *sdest = dest;
460 const short *ssrc = src;
461 *sdest++ = *ssrc++;
462 dest = sdest;
463 src = ssrc;
464 }
465 if (n & 1)
466 {
467 char *cdest = dest;
468 const char *csrc = src;
469 *cdest = *csrc;
470 }
471 }
472 else
473 {
474 dest = (char *) dest + n;
475 src = (const char *) src + n;
476 if ((long) dest & 1)
477 {
478 char *cdest = dest;
479 const char *csrc = src;
480 *--cdest = *--csrc;
481 dest = cdest;
482 src = csrc;
483 n--;
484 }
485 if (n > 2 && (long) dest & 2)
486 {
487 short *sdest = dest;
488 const short *ssrc = src;
489 *--sdest = *--ssrc;
490 dest = sdest;
491 src = ssrc;
492 n -= 2;
493 }
494 temp = n >> 2;
495 if (temp)
496 {
497 long *ldest = dest;
498 const long *lsrc = src;
499 temp--;
500 do
501 *--ldest = *--lsrc;
502 while (temp--);
503 dest = ldest;
504 src = lsrc;
505 }
506 if (n & 2)
507 {
508 short *sdest = dest;
509 const short *ssrc = src;
510 *--sdest = *--ssrc;
511 dest = sdest;
512 src = ssrc;
513 }
514 if (n & 1)
515 {
516 char *cdest = dest;
517 const char *csrc = src;
518 *--cdest = *--csrc;
519 }
520 }
521 return xdest;
522}
523 148
524#define __HAVE_ARCH_MEMCMP 149#define __HAVE_ARCH_MEMCMP
525extern int memcmp(const void * ,const void * ,size_t ); 150extern int memcmp(const void *, const void *, __kernel_size_t);
526#define memcmp(cs, ct, n) \ 151#define memcmp(d, s, n) __builtin_memcmp(d, s, n)
527(__builtin_constant_p(n) ? \
528 __builtin_memcmp((cs),(ct),(n)) : \
529 memcmp((cs),(ct),(n)))
530
531#define __HAVE_ARCH_MEMCHR
532static inline void *memchr(const void *cs, int c, size_t count)
533{
534 /* Someone else can optimize this, I don't care - tonym@mac.linux-m68k.org */
535 unsigned char *ret = (unsigned char *)cs;
536 for(;count>0;count--,ret++)
537 if(*ret == c) return ret;
538
539 return NULL;
540}
541 152
542#endif /* _M68K_STRING_H_ */ 153#endif /* _M68K_STRING_H_ */
diff --git a/include/asm-m68k/types.h b/include/asm-m68k/types.h
index f391cbe39b96..b5a1febc97d4 100644
--- a/include/asm-m68k/types.h
+++ b/include/asm-m68k/types.h
@@ -60,8 +60,6 @@ typedef unsigned long long u64;
60typedef u32 dma_addr_t; 60typedef u32 dma_addr_t;
61typedef u32 dma64_addr_t; 61typedef u32 dma64_addr_t;
62 62
63typedef unsigned short kmem_bufctl_t;
64
65#endif /* __ASSEMBLY__ */ 63#endif /* __ASSEMBLY__ */
66 64
67#endif /* __KERNEL__ */ 65#endif /* __KERNEL__ */
diff --git a/include/asm-m68knommu/page.h b/include/asm-m68knommu/page.h
index ff6a9265ed1c..942dfbead27f 100644
--- a/include/asm-m68knommu/page.h
+++ b/include/asm-m68knommu/page.h
@@ -48,20 +48,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
48/* to align the pointer to the (next) page boundary */ 48/* to align the pointer to the (next) page boundary */
49#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) 49#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
50 50
51/* Pure 2^n version of get_order */
52extern __inline__ int get_order(unsigned long size)
53{
54 int order;
55
56 size = (size-1) >> (PAGE_SHIFT-1);
57 order = -1;
58 do {
59 size >>= 1;
60 order++;
61 } while (size);
62 return order;
63}
64
65extern unsigned long memory_start; 51extern unsigned long memory_start;
66extern unsigned long memory_end; 52extern unsigned long memory_end;
67 53
@@ -93,4 +79,6 @@ extern unsigned long memory_end;
93 79
94#endif /* __KERNEL__ */ 80#endif /* __KERNEL__ */
95 81
82#include <asm-generic/page.h>
83
96#endif /* _M68KNOMMU_PAGE_H */ 84#endif /* _M68KNOMMU_PAGE_H */
diff --git a/include/asm-mips/a.out.h b/include/asm-mips/a.out.h
index e42b3093e903..2b3dc3bed4da 100644
--- a/include/asm-mips/a.out.h
+++ b/include/asm-mips/a.out.h
@@ -35,10 +35,10 @@ struct exec
35 35
36#ifdef __KERNEL__ 36#ifdef __KERNEL__
37 37
38#ifdef CONFIG_MIPS32 38#ifdef CONFIG_32BIT
39#define STACK_TOP TASK_SIZE 39#define STACK_TOP TASK_SIZE
40#endif 40#endif
41#ifdef CONFIG_MIPS64 41#ifdef CONFIG_64BIT
42#define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE) 42#define STACK_TOP (current->thread.mflags & MF_32BIT_ADDR ? TASK_SIZE32 : TASK_SIZE)
43#endif 43#endif
44 44
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 2caa8c427204..7dc2619f5006 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -48,7 +48,7 @@
48#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff) 48#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff)
49#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff) 49#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff)
50 50
51#ifdef CONFIG_MIPS64 51#ifdef CONFIG_64BIT
52 52
53/* 53/*
54 * Memory segments (64bit kernel mode addresses) 54 * Memory segments (64bit kernel mode addresses)
diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
index 37a460aa0378..30b18ea6cb11 100644
--- a/include/asm-mips/asmmacro.h
+++ b/include/asm-mips/asmmacro.h
@@ -7,14 +7,14 @@
7 */ 7 */
8#ifndef _ASM_ASMMACRO_H 8#ifndef _ASM_ASMMACRO_H
9#define _ASM_ASMMACRO_H 9#define _ASM_ASMMACRO_H
10 10
11#include <linux/config.h> 11#include <linux/config.h>
12#include <asm/hazards.h> 12#include <asm/hazards.h>
13 13
14#ifdef CONFIG_MIPS32 14#ifdef CONFIG_32BIT
15#include <asm/asmmacro-32.h> 15#include <asm/asmmacro-32.h>
16#endif 16#endif
17#ifdef CONFIG_MIPS64 17#ifdef CONFIG_64BIT
18#include <asm/asmmacro-64.h> 18#include <asm/asmmacro-64.h>
19#endif 19#endif
20 20
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 7d89e87bc8c6..c0bd8d014e14 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -334,7 +334,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
334 */ 334 */
335#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0) 335#define atomic_add_negative(i,v) (atomic_add_return(i, (v)) < 0)
336 336
337#ifdef CONFIG_MIPS64 337#ifdef CONFIG_64BIT
338 338
339typedef struct { volatile __s64 counter; } atomic64_t; 339typedef struct { volatile __s64 counter; } atomic64_t;
340 340
@@ -639,7 +639,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
639 */ 639 */
640#define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0) 640#define atomic64_add_negative(i,v) (atomic64_add_return(i, (v)) < 0)
641 641
642#endif /* CONFIG_MIPS64 */ 642#endif /* CONFIG_64BIT */
643 643
644/* 644/*
645 * atomic*_return operations are serializing but not the non-*_return 645 * atomic*_return operations are serializing but not the non-*_return
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 779d2187a6a4..eb8d79dba11c 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -20,13 +20,13 @@
20#define SZLONG_MASK 31UL 20#define SZLONG_MASK 31UL
21#define __LL "ll " 21#define __LL "ll "
22#define __SC "sc " 22#define __SC "sc "
23#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x)) 23#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
24#elif (_MIPS_SZLONG == 64) 24#elif (_MIPS_SZLONG == 64)
25#define SZLONG_LOG 6 25#define SZLONG_LOG 6
26#define SZLONG_MASK 63UL 26#define SZLONG_MASK 63UL
27#define __LL "lld " 27#define __LL "lld "
28#define __SC "scd " 28#define __SC "scd "
29#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x)) 29#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
30#endif 30#endif
31 31
32#ifdef __KERNEL__ 32#ifdef __KERNEL__
@@ -533,14 +533,14 @@ static inline unsigned long ffz(unsigned long word)
533 int b = 0, s; 533 int b = 0, s;
534 534
535 word = ~word; 535 word = ~word;
536#ifdef CONFIG_MIPS32 536#ifdef CONFIG_32BIT
537 s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s; 537 s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
538 s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s; 538 s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
539 s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s; 539 s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
540 s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s; 540 s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
541 s = 1; if (word << 31 != 0) s = 0; b += s; 541 s = 1; if (word << 31 != 0) s = 0; b += s;
542#endif 542#endif
543#ifdef CONFIG_MIPS64 543#ifdef CONFIG_64BIT
544 s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s; 544 s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
545 s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s; 545 s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s;
546 s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s; 546 s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s;
@@ -683,7 +683,7 @@ found_middle:
683 */ 683 */
684static inline int sched_find_first_bit(const unsigned long *b) 684static inline int sched_find_first_bit(const unsigned long *b)
685{ 685{
686#ifdef CONFIG_MIPS32 686#ifdef CONFIG_32BIT
687 if (unlikely(b[0])) 687 if (unlikely(b[0]))
688 return __ffs(b[0]); 688 return __ffs(b[0]);
689 if (unlikely(b[1])) 689 if (unlikely(b[1]))
@@ -694,7 +694,7 @@ static inline int sched_find_first_bit(const unsigned long *b)
694 return __ffs(b[3]) + 96; 694 return __ffs(b[3]) + 96;
695 return __ffs(b[4]) + 128; 695 return __ffs(b[4]) + 128;
696#endif 696#endif
697#ifdef CONFIG_MIPS64 697#ifdef CONFIG_64BIT
698 if (unlikely(b[0])) 698 if (unlikely(b[0]))
699 return __ffs(b[0]); 699 return __ffs(b[0]);
700 if (unlikely(b[1])) 700 if (unlikely(b[1]))
diff --git a/include/asm-mips/bugs.h b/include/asm-mips/bugs.h
index 18cced19cca4..b14b961c2100 100644
--- a/include/asm-mips/bugs.h
+++ b/include/asm-mips/bugs.h
@@ -15,7 +15,7 @@ extern void check_bugs64(void);
15static inline void check_bugs(void) 15static inline void check_bugs(void)
16{ 16{
17 check_bugs32(); 17 check_bugs32();
18#ifdef CONFIG_MIPS64 18#ifdef CONFIG_64BIT
19 check_bugs64(); 19 check_bugs64();
20#endif 20#endif
21} 21}
diff --git a/include/asm-mips/checksum.h b/include/asm-mips/checksum.h
index c25cc92b9950..c1ea5a8714f3 100644
--- a/include/asm-mips/checksum.h
+++ b/include/asm-mips/checksum.h
@@ -128,7 +128,7 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr,
128{ 128{
129 __asm__( 129 __asm__(
130 ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t" 130 ".set\tnoat\t\t\t# csum_tcpudp_nofold\n\t"
131#ifdef CONFIG_MIPS32 131#ifdef CONFIG_32BIT
132 "addu\t%0, %2\n\t" 132 "addu\t%0, %2\n\t"
133 "sltu\t$1, %0, %2\n\t" 133 "sltu\t$1, %0, %2\n\t"
134 "addu\t%0, $1\n\t" 134 "addu\t%0, $1\n\t"
@@ -141,7 +141,7 @@ static inline unsigned int csum_tcpudp_nofold(unsigned long saddr,
141 "sltu\t$1, %0, %4\n\t" 141 "sltu\t$1, %0, %4\n\t"
142 "addu\t%0, $1\n\t" 142 "addu\t%0, $1\n\t"
143#endif 143#endif
144#ifdef CONFIG_MIPS64 144#ifdef CONFIG_64BIT
145 "daddu\t%0, %2\n\t" 145 "daddu\t%0, %2\n\t"
146 "daddu\t%0, %3\n\t" 146 "daddu\t%0, %3\n\t"
147 "daddu\t%0, %4\n\t" 147 "daddu\t%0, %4\n\t"
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 1df2c299de82..9a2de642eee6 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -106,7 +106,7 @@
106#define PLAT_TRAMPOLINE_STUFF_LINE 0UL 106#define PLAT_TRAMPOLINE_STUFF_LINE 0UL
107#endif 107#endif
108 108
109#ifdef CONFIG_MIPS32 109#ifdef CONFIG_32BIT
110# ifndef cpu_has_nofpuex 110# ifndef cpu_has_nofpuex
111# define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX) 111# define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
112# endif 112# endif
@@ -124,7 +124,7 @@
124# endif 124# endif
125#endif 125#endif
126 126
127#ifdef CONFIG_MIPS64 127#ifdef CONFIG_64BIT
128# ifndef cpu_has_nofpuex 128# ifndef cpu_has_nofpuex
129# define cpu_has_nofpuex 0 129# define cpu_has_nofpuex 0
130# endif 130# endif
diff --git a/include/asm-mips/ddb5xxx/ddb5477.h b/include/asm-mips/ddb5xxx/ddb5477.h
index ae3e2a38fd5f..a438548e6ef3 100644
--- a/include/asm-mips/ddb5xxx/ddb5477.h
+++ b/include/asm-mips/ddb5xxx/ddb5477.h
@@ -247,7 +247,7 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
247 * All PCI irq but INTC are active low. 247 * All PCI irq but INTC are active low.
248 */ 248 */
249 249
250/* 250/*
251 * irq number block assignment 251 * irq number block assignment
252 */ 252 */
253 253
@@ -285,7 +285,7 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
285#define VRC5477_IRQ_IOPCI_INTB (17 + VRC5477_IRQ_BASE) /* USB-P */ 285#define VRC5477_IRQ_IOPCI_INTB (17 + VRC5477_IRQ_BASE) /* USB-P */
286#define VRC5477_IRQ_IOPCI_INTC (18 + VRC5477_IRQ_BASE) /* AC97 */ 286#define VRC5477_IRQ_IOPCI_INTC (18 + VRC5477_IRQ_BASE) /* AC97 */
287#define VRC5477_IRQ_IOPCI_INTD (19 + VRC5477_IRQ_BASE) /* Reserved */ 287#define VRC5477_IRQ_IOPCI_INTD (19 + VRC5477_IRQ_BASE) /* Reserved */
288#define VRC5477_IRQ_UART1 (20 + VRC5477_IRQ_BASE) 288#define VRC5477_IRQ_UART1 (20 + VRC5477_IRQ_BASE)
289#define VRC5477_IRQ_SPT0 (21 + VRC5477_IRQ_BASE) /* special purpose timer 0 */ 289#define VRC5477_IRQ_SPT0 (21 + VRC5477_IRQ_BASE) /* special purpose timer 0 */
290#define VRC5477_IRQ_GPT0 (22 + VRC5477_IRQ_BASE) /* general purpose timer 0 */ 290#define VRC5477_IRQ_GPT0 (22 + VRC5477_IRQ_BASE) /* general purpose timer 0 */
291#define VRC5477_IRQ_GPT1 (23 + VRC5477_IRQ_BASE) /* general purpose timer 1 */ 291#define VRC5477_IRQ_GPT1 (23 + VRC5477_IRQ_BASE) /* general purpose timer 1 */
@@ -301,7 +301,7 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq);
301/* 301/*
302 * i2859 irq assignment 302 * i2859 irq assignment
303 */ 303 */
304#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE) 304#define I8259_IRQ_RESERVED_0 (0 + I8259_IRQ_BASE)
305#define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */ 305#define I8259_IRQ_KEYBOARD (1 + I8259_IRQ_BASE) /* M1543 default */
306#define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE) 306#define I8259_IRQ_CASCADE (2 + I8259_IRQ_BASE)
307#define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */ 307#define I8259_IRQ_UART_B (3 + I8259_IRQ_BASE) /* M1543 default, may conflict with RTC according to schematic diagram */
diff --git a/include/asm-mips/dec/prom.h b/include/asm-mips/dec/prom.h
index b63e2f2317d1..a05d6d3395fe 100644
--- a/include/asm-mips/dec/prom.h
+++ b/include/asm-mips/dec/prom.h
@@ -48,15 +48,15 @@
48 */ 48 */
49#define REX_PROM_MAGIC 0x30464354 49#define REX_PROM_MAGIC 0x30464354
50 50
51#ifdef CONFIG_MIPS64 51#ifdef CONFIG_64BIT
52 52
53#define prom_is_rex(magic) 1 /* KN04 and KN05 are REX PROMs. */ 53#define prom_is_rex(magic) 1 /* KN04 and KN05 are REX PROMs. */
54 54
55#else /* !CONFIG_MIPS64 */ 55#else /* !CONFIG_64BIT */
56 56
57#define prom_is_rex(magic) ((magic) == REX_PROM_MAGIC) 57#define prom_is_rex(magic) ((magic) == REX_PROM_MAGIC)
58 58
59#endif /* !CONFIG_MIPS64 */ 59#endif /* !CONFIG_64BIT */
60 60
61 61
62/* 62/*
@@ -105,7 +105,7 @@ extern int (*__pmax_read)(int, void *, int);
105extern int (*__pmax_close)(int); 105extern int (*__pmax_close)(int);
106 106
107 107
108#ifdef CONFIG_MIPS64 108#ifdef CONFIG_64BIT
109 109
110/* 110/*
111 * On MIPS64 we have to call PROM functions via a helper 111 * On MIPS64 we have to call PROM functions via a helper
@@ -138,7 +138,7 @@ int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32;
138#define prom_getenv(x) _prom_getenv(__prom_getenv, x) 138#define prom_getenv(x) _prom_getenv(__prom_getenv, x)
139#define prom_printf(x...) _prom_printf(__prom_printf, x) 139#define prom_printf(x...) _prom_printf(__prom_printf, x)
140 140
141#else /* !CONFIG_MIPS64 */ 141#else /* !CONFIG_64BIT */
142 142
143/* 143/*
144 * On plain MIPS we just call PROM functions directly. 144 * On plain MIPS we just call PROM functions directly.
@@ -160,7 +160,7 @@ int _prom_printf(int (*)(char *, ...), char *, ...) __DEC_PROM_O32;
160#define pmax_read __pmax_read 160#define pmax_read __pmax_read
161#define pmax_close __pmax_close 161#define pmax_close __pmax_close
162 162
163#endif /* !CONFIG_MIPS64 */ 163#endif /* !CONFIG_64BIT */
164 164
165 165
166extern void prom_meminit(u32); 166extern void prom_meminit(u32);
diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h
index d0f68447e5a7..a606dbee0412 100644
--- a/include/asm-mips/delay.h
+++ b/include/asm-mips/delay.h
@@ -57,11 +57,11 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj)
57 * The common rates of 1000 and 128 are rounded wrongly by the 57 * The common rates of 1000 and 128 are rounded wrongly by the
58 * catchall case for 64-bit. Excessive precission? Probably ... 58 * catchall case for 64-bit. Excessive precission? Probably ...
59 */ 59 */
60#if defined(CONFIG_MIPS64) && (HZ == 128) 60#if defined(CONFIG_64BIT) && (HZ == 128)
61 usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */ 61 usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */
62#elif defined(CONFIG_MIPS64) && (HZ == 1000) 62#elif defined(CONFIG_64BIT) && (HZ == 1000)
63 usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */ 63 usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */
64#elif defined(CONFIG_MIPS64) 64#elif defined(CONFIG_64BIT)
65 usecs *= (0x8000000000000000UL / (500000 / HZ)); 65 usecs *= (0x8000000000000000UL / (500000 / HZ));
66#else /* 32-bit junk follows here */ 66#else /* 32-bit junk follows here */
67 usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) + 67 usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h
index 7b92c8045cc2..e48811440015 100644
--- a/include/asm-mips/elf.h
+++ b/include/asm-mips/elf.h
@@ -125,7 +125,7 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG];
125typedef double elf_fpreg_t; 125typedef double elf_fpreg_t;
126typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; 126typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
127 127
128#ifdef CONFIG_MIPS32 128#ifdef CONFIG_32BIT
129 129
130/* 130/*
131 * This is used to ensure we don't load something for the wrong architecture. 131 * This is used to ensure we don't load something for the wrong architecture.
@@ -153,9 +153,9 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
153 */ 153 */
154#define ELF_CLASS ELFCLASS32 154#define ELF_CLASS ELFCLASS32
155 155
156#endif /* CONFIG_MIPS32 */ 156#endif /* CONFIG_32BIT */
157 157
158#ifdef CONFIG_MIPS64 158#ifdef CONFIG_64BIT
159/* 159/*
160 * This is used to ensure we don't load something for the wrong architecture. 160 * This is used to ensure we don't load something for the wrong architecture.
161 */ 161 */
@@ -177,7 +177,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
177 */ 177 */
178#define ELF_CLASS ELFCLASS64 178#define ELF_CLASS ELFCLASS64
179 179
180#endif /* CONFIG_MIPS64 */ 180#endif /* CONFIG_64BIT */
181 181
182/* 182/*
183 * These are used to set parameters in the core dumps. 183 * These are used to set parameters in the core dumps.
@@ -193,7 +193,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
193 193
194#ifdef __KERNEL__ 194#ifdef __KERNEL__
195 195
196#ifdef CONFIG_MIPS32 196#ifdef CONFIG_32BIT
197 197
198#define SET_PERSONALITY(ex, ibcs2) \ 198#define SET_PERSONALITY(ex, ibcs2) \
199do { \ 199do { \
@@ -202,9 +202,9 @@ do { \
202 set_personality(PER_LINUX); \ 202 set_personality(PER_LINUX); \
203} while (0) 203} while (0)
204 204
205#endif /* CONFIG_MIPS32 */ 205#endif /* CONFIG_32BIT */
206 206
207#ifdef CONFIG_MIPS64 207#ifdef CONFIG_64BIT
208 208
209#define SET_PERSONALITY(ex, ibcs2) \ 209#define SET_PERSONALITY(ex, ibcs2) \
210do { current->thread.mflags &= ~MF_ABI_MASK; \ 210do { current->thread.mflags &= ~MF_ABI_MASK; \
@@ -222,7 +222,7 @@ do { current->thread.mflags &= ~MF_ABI_MASK; \
222 set_personality(PER_LINUX); \ 222 set_personality(PER_LINUX); \
223} while (0) 223} while (0)
224 224
225#endif /* CONFIG_MIPS64 */ 225#endif /* CONFIG_64BIT */
226 226
227extern void dump_regs(elf_greg_t *, struct pt_regs *regs); 227extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
228extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); 228extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
diff --git a/include/asm-mips/fpregdef.h b/include/asm-mips/fpregdef.h
index 1d9aa0979181..2b5fddc8f487 100644
--- a/include/asm-mips/fpregdef.h
+++ b/include/asm-mips/fpregdef.h
@@ -13,7 +13,7 @@
13#define _ASM_FPREGDEF_H 13#define _ASM_FPREGDEF_H
14 14
15#include <asm/sgidefs.h> 15#include <asm/sgidefs.h>
16 16
17#if _MIPS_SIM == _MIPS_SIM_ABI32 17#if _MIPS_SIM == _MIPS_SIM_ABI32
18 18
19/* 19/*
@@ -56,7 +56,7 @@
56#define fcr31 $31 /* FPU status register */ 56#define fcr31 $31 /* FPU status register */
57 57
58#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 58#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
59 59
60#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 60#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
61 61
62#define fv0 $f0 /* return value */ 62#define fv0 $f0 /* return value */
diff --git a/include/asm-mips/fpu.h b/include/asm-mips/fpu.h
index 6cb38d5c0407..ea24e733b1bc 100644
--- a/include/asm-mips/fpu.h
+++ b/include/asm-mips/fpu.h
@@ -82,7 +82,7 @@ do { \
82 82
83static inline int is_fpu_owner(void) 83static inline int is_fpu_owner(void)
84{ 84{
85 return cpu_has_fpu && test_thread_flag(TIF_USEDFPU); 85 return cpu_has_fpu && test_thread_flag(TIF_USEDFPU);
86} 86}
87 87
88static inline void own_fpu(void) 88static inline void own_fpu(void)
@@ -90,7 +90,7 @@ static inline void own_fpu(void)
90 if (cpu_has_fpu) { 90 if (cpu_has_fpu) {
91 __enable_fpu(); 91 __enable_fpu();
92 KSTK_STATUS(current) |= ST0_CU1; 92 KSTK_STATUS(current) |= ST0_CU1;
93 set_thread_flag(TIF_USEDFPU); 93 set_thread_flag(TIF_USEDFPU);
94 } 94 }
95} 95}
96 96
@@ -98,7 +98,7 @@ static inline void lose_fpu(void)
98{ 98{
99 if (cpu_has_fpu) { 99 if (cpu_has_fpu) {
100 KSTK_STATUS(current) &= ~ST0_CU1; 100 KSTK_STATUS(current) &= ~ST0_CU1;
101 clear_thread_flag(TIF_USEDFPU); 101 clear_thread_flag(TIF_USEDFPU);
102 __disable_fpu(); 102 __disable_fpu();
103 } 103 }
104} 104}
@@ -127,7 +127,7 @@ static inline void restore_fp(struct task_struct *tsk)
127static inline fpureg_t *get_fpu_regs(struct task_struct *tsk) 127static inline fpureg_t *get_fpu_regs(struct task_struct *tsk)
128{ 128{
129 if (cpu_has_fpu) { 129 if (cpu_has_fpu) {
130 if ((tsk == current) && is_fpu_owner()) 130 if ((tsk == current) && is_fpu_owner())
131 _save_fp(current); 131 _save_fp(current);
132 return tsk->thread.fpu.hard.fpr; 132 return tsk->thread.fpu.hard.fpr;
133 } 133 }
diff --git a/include/asm-mips/hp-lj/asic.h b/include/asm-mips/hp-lj/asic.h
deleted file mode 100644
index fc2ca656da00..000000000000
--- a/include/asm-mips/hp-lj/asic.h
+++ /dev/null
@@ -1,7 +0,0 @@
1
2typedef enum { IllegalAsic, UnknownAsic, AndrosAsic, HarmonyAsic } AsicId;
3
4AsicId GetAsicId(void);
5
6const char* const GetAsicName(void);
7
diff --git a/include/asm-mips/ip32/mace.h b/include/asm-mips/ip32/mace.h
index 2b7b0fdeac19..432011b16c26 100644
--- a/include/asm-mips/ip32/mace.h
+++ b/include/asm-mips/ip32/mace.h
@@ -94,7 +94,7 @@ struct mace_video {
94 unsigned long xxx; /* later... */ 94 unsigned long xxx; /* later... */
95}; 95};
96 96
97/* 97/*
98 * Ethernet interface 98 * Ethernet interface
99 */ 99 */
100struct mace_ethernet { 100struct mace_ethernet {
@@ -129,7 +129,7 @@ struct mace_ethernet {
129 volatile unsigned long rx_fifo; 129 volatile unsigned long rx_fifo;
130}; 130};
131 131
132/* 132/*
133 * Peripherals 133 * Peripherals
134 */ 134 */
135 135
@@ -251,7 +251,7 @@ struct mace_timers {
251 timer_reg audio_out2; 251 timer_reg audio_out2;
252 timer_reg video_in1; 252 timer_reg video_in1;
253 timer_reg video_in2; 253 timer_reg video_in2;
254 timer_reg video_out; 254 timer_reg video_out;
255}; 255};
256 256
257struct mace_perif { 257struct mace_perif {
@@ -272,7 +272,7 @@ struct mace_perif {
272}; 272};
273 273
274 274
275/* 275/*
276 * ISA peripherals 276 * ISA peripherals
277 */ 277 */
278 278
diff --git a/include/asm-mips/lasat/serial.h b/include/asm-mips/lasat/serial.h
index 21d0fb7cee64..9e88c7669c7a 100644
--- a/include/asm-mips/lasat/serial.h
+++ b/include/asm-mips/lasat/serial.h
@@ -1,13 +1,13 @@
1#include <asm/lasat/lasat.h> 1#include <asm/lasat/lasat.h>
2 2
3/* Lasat 100 boards serial configuration */ 3/* Lasat 100 boards serial configuration */
4#define LASAT_BASE_BAUD_100 ( 7372800 / 16 ) 4#define LASAT_BASE_BAUD_100 ( 7372800 / 16 )
5#define LASAT_UART_REGS_BASE_100 0x1c8b0000 5#define LASAT_UART_REGS_BASE_100 0x1c8b0000
6#define LASAT_UART_REGS_SHIFT_100 2 6#define LASAT_UART_REGS_SHIFT_100 2
7#define LASATINT_UART_100 8 7#define LASATINT_UART_100 8
8 8
9/* * LASAT 200 boards serial configuration */ 9/* * LASAT 200 boards serial configuration */
10#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12) 10#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
11#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300) 11#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
12#define LASAT_UART_REGS_SHIFT_200 3 12#define LASAT_UART_REGS_SHIFT_200 3
13#define LASATINT_UART_200 13 13#define LASATINT_UART_200 13
diff --git a/include/asm-mips/local.h b/include/asm-mips/local.h
index 7eb6bf661b80..c38844f615fc 100644
--- a/include/asm-mips/local.h
+++ b/include/asm-mips/local.h
@@ -5,7 +5,7 @@
5#include <linux/percpu.h> 5#include <linux/percpu.h>
6#include <asm/atomic.h> 6#include <asm/atomic.h>
7 7
8#ifdef CONFIG_MIPS32 8#ifdef CONFIG_32BIT
9 9
10typedef atomic_t local_t; 10typedef atomic_t local_t;
11 11
@@ -20,7 +20,7 @@ typedef atomic_t local_t;
20 20
21#endif 21#endif
22 22
23#ifdef CONFIG_MIPS64 23#ifdef CONFIG_64BIT
24 24
25typedef atomic64_t local_t; 25typedef atomic64_t local_t;
26 26
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 2b36ea346910..148bae2fa7d3 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -1383,7 +1383,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[];
1383#define PCI_IO_START 0 1383#define PCI_IO_START 0
1384#define PCI_IO_END 0 1384#define PCI_IO_END 0
1385#define PCI_MEM_START 0 1385#define PCI_MEM_START 0
1386#define PCI_MEM_END 0 1386#define PCI_MEM_END 0
1387#define PCI_FIRST_DEVFN 0 1387#define PCI_FIRST_DEVFN 0
1388#define PCI_LAST_DEVFN 0 1388#define PCI_LAST_DEVFN 0
1389#endif 1389#endif
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index 4691398a414f..efafe65258b6 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -23,7 +23,7 @@
23 * 23 *
24 * ######################################################################## 24 * ########################################################################
25 * 25 *
26 * 26 *
27 */ 27 */
28#ifndef __ASM_DB1X00_H 28#ifndef __ASM_DB1X00_H
29#define __ASM_DB1X00_H 29#define __ASM_DB1X00_H
diff --git a/include/asm-mips/mach-generic/spaces.h b/include/asm-mips/mach-generic/spaces.h
index 63c0a81c7832..5a2c1efb4eb7 100644
--- a/include/asm-mips/mach-generic/spaces.h
+++ b/include/asm-mips/mach-generic/spaces.h
@@ -12,7 +12,7 @@
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14 14
15#ifdef CONFIG_MIPS32 15#ifdef CONFIG_32BIT
16 16
17#define CAC_BASE 0x80000000 17#define CAC_BASE 0x80000000
18#define IO_BASE 0xa0000000 18#define IO_BASE 0xa0000000
@@ -32,9 +32,9 @@
32#define HIGHMEM_START 0x20000000UL 32#define HIGHMEM_START 0x20000000UL
33#endif 33#endif
34 34
35#endif /* CONFIG_MIPS32 */ 35#endif /* CONFIG_32BIT */
36 36
37#ifdef CONFIG_MIPS64 37#ifdef CONFIG_64BIT
38 38
39/* 39/*
40 * This handles the memory map. 40 * This handles the memory map.
@@ -67,6 +67,6 @@
67#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 67#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
68#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) 68#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
69 69
70#endif /* CONFIG_MIPS64 */ 70#endif /* CONFIG_64BIT */
71 71
72#endif /* __ASM_MACH_GENERIC_SPACES_H */ 72#endif /* __ASM_MACH_GENERIC_SPACES_H */
diff --git a/include/asm-mips/mach-ip22/spaces.h b/include/asm-mips/mach-ip22/spaces.h
index 30d42fcafe3d..e96166f27c49 100644
--- a/include/asm-mips/mach-ip22/spaces.h
+++ b/include/asm-mips/mach-ip22/spaces.h
@@ -12,7 +12,7 @@
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14 14
15#ifdef CONFIG_MIPS32 15#ifdef CONFIG_32BIT
16 16
17#define CAC_BASE 0x80000000 17#define CAC_BASE 0x80000000
18#define IO_BASE 0xa0000000 18#define IO_BASE 0xa0000000
@@ -32,9 +32,9 @@
32#define HIGHMEM_START 0x20000000UL 32#define HIGHMEM_START 0x20000000UL
33#endif 33#endif
34 34
35#endif /* CONFIG_MIPS32 */ 35#endif /* CONFIG_32BIT */
36 36
37#ifdef CONFIG_MIPS64 37#ifdef CONFIG_64BIT
38#define PAGE_OFFSET 0xffffffff80000000UL 38#define PAGE_OFFSET 0xffffffff80000000UL
39 39
40#ifndef HIGHMEM_START 40#ifndef HIGHMEM_START
@@ -50,6 +50,6 @@
50#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK)) 50#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
51#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK)) 51#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
52 52
53#endif /* CONFIG_MIPS64 */ 53#endif /* CONFIG_64BIT */
54 54
55#endif /* __ASM_MACH_IP22_SPACES_H */ 55#endif /* __ASM_MACH_IP22_SPACES_H */
diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
index b932237f2193..04713973c6c3 100644
--- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h
+++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h
@@ -18,7 +18,7 @@
18 * so, for 64bit IP32 kernel we just don't use ll/sc. 18 * so, for 64bit IP32 kernel we just don't use ll/sc.
19 * This does not affect luserland. 19 * This does not affect luserland.
20 */ 20 */
21#if defined(CONFIG_CPU_R5000) && defined(CONFIG_MIPS64) 21#if defined(CONFIG_CPU_R5000) && defined(CONFIG_64BIT)
22#define cpu_has_llsc 0 22#define cpu_has_llsc 0
23#else 23#else
24#define cpu_has_llsc 1 24#define cpu_has_llsc 1
diff --git a/include/asm-mips/mach-jazz/floppy.h b/include/asm-mips/mach-jazz/floppy.h
index 8cf0d042c864..c9dad99b1232 100644
--- a/include/asm-mips/mach-jazz/floppy.h
+++ b/include/asm-mips/mach-jazz/floppy.h
@@ -92,7 +92,7 @@ static inline int fd_request_irq(void)
92 return request_irq(FLOPPY_IRQ, floppy_interrupt, 92 return request_irq(FLOPPY_IRQ, floppy_interrupt,
93 SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL); 93 SA_INTERRUPT | SA_SAMPLE_RANDOM, "floppy", NULL);
94} 94}
95 95
96static inline void fd_free_irq(void) 96static inline void fd_free_irq(void)
97{ 97{
98 free_irq(FLOPPY_IRQ, NULL); 98 free_irq(FLOPPY_IRQ, NULL);
diff --git a/include/asm-mips/mach-pb1x00/pb1500.h b/include/asm-mips/mach-pb1x00/pb1500.h
index d6c779747b3c..ff6d40c87a25 100644
--- a/include/asm-mips/mach-pb1x00/pb1500.h
+++ b/include/asm-mips/mach-pb1x00/pb1500.h
@@ -33,11 +33,11 @@
33#define PCI_BOARD_REG 0xAE000010 33#define PCI_BOARD_REG 0xAE000010
34#define PCMCIA_BOARD_REG 0xAE000010 34#define PCMCIA_BOARD_REG 0xAE000010
35 #define PC_DEASSERT_RST 0x80 35 #define PC_DEASSERT_RST 0x80
36 #define PC_DRV_EN 0x10 36 #define PC_DRV_EN 0x10
37#define PB1500_G_CONTROL 0xAE000014 37#define PB1500_G_CONTROL 0xAE000014
38#define PB1500_RST_VDDI 0xAE00001C 38#define PB1500_RST_VDDI 0xAE00001C
39#define PB1500_LEDS 0xAE000018 39#define PB1500_LEDS 0xAE000018
40 40
41#define PB1500_HEX_LED 0xAF000004 41#define PB1500_HEX_LED 0xAF000004
42#define PB1500_HEX_LED_BLANK 0xAF000008 42#define PB1500_HEX_LED_BLANK 0xAF000008
43 43
diff --git a/include/asm-mips/mach-qemu/cpu-feature-overrides.h b/include/asm-mips/mach-qemu/cpu-feature-overrides.h
new file mode 100644
index 000000000000..f4e370e27168
--- /dev/null
+++ b/include/asm-mips/mach-qemu/cpu-feature-overrides.h
@@ -0,0 +1,31 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H
9#define __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H
10
11/*
12 * QEMU only comes with a hazard-free MIPS32 processor, so things are easy.
13 */
14#define cpu_has_mips16 0
15#define cpu_has_divec 0
16#define cpu_has_cache_cdex_p 0
17#define cpu_has_prefetch 0
18#define cpu_has_mcheck 0
19#define cpu_has_ejtag 0
20
21#define cpu_has_llsc 1
22#define cpu_has_vtag_icache 0
23#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
24#define cpu_has_ic_fills_f_dc 0
25
26#define cpu_has_dsp 0
27
28#define cpu_has_nofpuex 0
29#define cpu_has_64bits 0
30
31#endif /* __ASM_MACH_QEMU_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-qemu/param.h b/include/asm-mips/mach-qemu/param.h
new file mode 100644
index 000000000000..cb30ee490ae6
--- /dev/null
+++ b/include/asm-mips/mach-qemu/param.h
@@ -0,0 +1,13 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 by Ralf Baechle
7 */
8#ifndef __ASM_MACH_QEMU_PARAM_H
9#define __ASM_MACH_QEMU_PARAM_H
10
11#define HZ 100 /* Internal kernel timer frequency */
12
13#endif /* __ASM_MACH_QEMU_PARAM_H */
diff --git a/include/asm-mips/mach-vr41xx/timex.h b/include/asm-mips/mach-vr41xx/timex.h
deleted file mode 100644
index 8d71485d003a..000000000000
--- a/include/asm-mips/mach-vr41xx/timex.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 by Ralf Baechle
7 */
8/*
9 * Changes:
10 * Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
11 * - CLOCK_TICK_RATE is changed into 32768 from 6144000.
12 */
13#ifndef __ASM_MACH_VR41XX_TIMEX_H
14#define __ASM_MACH_VR41XX_TIMEX_H
15
16#define CLOCK_TICK_RATE 32768
17
18#endif /* __ASM_MACH_VR41XX_TIMEX_H */
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index 48b77c9fb4f2..45cd72d172e8 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -28,17 +28,17 @@ extern unsigned long pgd_current[];
28#define TLBMISS_HANDLER_SETUP_PGD(pgd) \ 28#define TLBMISS_HANDLER_SETUP_PGD(pgd) \
29 pgd_current[smp_processor_id()] = (unsigned long)(pgd) 29 pgd_current[smp_processor_id()] = (unsigned long)(pgd)
30 30
31#ifdef CONFIG_MIPS32 31#ifdef CONFIG_32BIT
32#define TLBMISS_HANDLER_SETUP() \ 32#define TLBMISS_HANDLER_SETUP() \
33 write_c0_context((unsigned long) smp_processor_id() << 23); \ 33 write_c0_context((unsigned long) smp_processor_id() << 23); \
34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 34 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
35#endif 35#endif
36#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) 36#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
37#define TLBMISS_HANDLER_SETUP() \ 37#define TLBMISS_HANDLER_SETUP() \
38 write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \ 38 write_c0_context((unsigned long) &pgd_current[smp_processor_id()] << 23); \
39 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 39 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
40#endif 40#endif
41#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) 41#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
42#define TLBMISS_HANDLER_SETUP() \ 42#define TLBMISS_HANDLER_SETUP() \
43 write_c0_context((unsigned long) smp_processor_id() << 23); \ 43 write_c0_context((unsigned long) smp_processor_id() << 23); \
44 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) 44 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h
index 90ee24aad955..0be58b2aeb9f 100644
--- a/include/asm-mips/module.h
+++ b/include/asm-mips/module.h
@@ -25,7 +25,7 @@ typedef struct
25 Elf64_Sxword r_addend; /* Addend. */ 25 Elf64_Sxword r_addend; /* Addend. */
26} Elf64_Mips_Rela; 26} Elf64_Mips_Rela;
27 27
28#ifdef CONFIG_MIPS32 28#ifdef CONFIG_32BIT
29 29
30#define Elf_Shdr Elf32_Shdr 30#define Elf_Shdr Elf32_Shdr
31#define Elf_Sym Elf32_Sym 31#define Elf_Sym Elf32_Sym
@@ -33,7 +33,7 @@ typedef struct
33 33
34#endif 34#endif
35 35
36#ifdef CONFIG_MIPS64 36#ifdef CONFIG_64BIT
37 37
38#define Elf_Shdr Elf64_Shdr 38#define Elf_Shdr Elf64_Shdr
39#define Elf_Sym Elf64_Sym 39#define Elf_Sym Elf64_Sym
diff --git a/include/asm-mips/msgbuf.h b/include/asm-mips/msgbuf.h
index 513b2824838b..a1533959742e 100644
--- a/include/asm-mips/msgbuf.h
+++ b/include/asm-mips/msgbuf.h
@@ -15,25 +15,25 @@
15 15
16struct msqid64_ds { 16struct msqid64_ds {
17 struct ipc64_perm msg_perm; 17 struct ipc64_perm msg_perm;
18#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) 18#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
19 unsigned long __unused1; 19 unsigned long __unused1;
20#endif 20#endif
21 __kernel_time_t msg_stime; /* last msgsnd time */ 21 __kernel_time_t msg_stime; /* last msgsnd time */
22#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) 22#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
23 unsigned long __unused1; 23 unsigned long __unused1;
24#endif 24#endif
25#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) 25#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
26 unsigned long __unused2; 26 unsigned long __unused2;
27#endif 27#endif
28 __kernel_time_t msg_rtime; /* last msgrcv time */ 28 __kernel_time_t msg_rtime; /* last msgrcv time */
29#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) 29#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
30 unsigned long __unused2; 30 unsigned long __unused2;
31#endif 31#endif
32#if defined(CONFIG_MIPS32) && !defined(CONFIG_CPU_LITTLE_ENDIAN) 32#if defined(CONFIG_32BIT) && !defined(CONFIG_CPU_LITTLE_ENDIAN)
33 unsigned long __unused3; 33 unsigned long __unused3;
34#endif 34#endif
35 __kernel_time_t msg_ctime; /* last change time */ 35 __kernel_time_t msg_ctime; /* last change time */
36#if defined(CONFIG_MIPS32) && defined(CONFIG_CPU_LITTLE_ENDIAN) 36#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_LITTLE_ENDIAN)
37 unsigned long __unused3; 37 unsigned long __unused3;
38#endif 38#endif
39 unsigned long msg_cbytes; /* current number of bytes on queue */ 39 unsigned long msg_cbytes; /* current number of bytes on queue */
diff --git a/include/asm-mips/paccess.h b/include/asm-mips/paccess.h
index 36cec9e31696..309bc3099f68 100644
--- a/include/asm-mips/paccess.h
+++ b/include/asm-mips/paccess.h
@@ -16,10 +16,10 @@
16#include <linux/config.h> 16#include <linux/config.h>
17#include <linux/errno.h> 17#include <linux/errno.h>
18 18
19#ifdef CONFIG_MIPS32 19#ifdef CONFIG_32BIT
20#define __PA_ADDR ".word" 20#define __PA_ADDR ".word"
21#endif 21#endif
22#ifdef CONFIG_MIPS64 22#ifdef CONFIG_64BIT
23#define __PA_ADDR ".dword" 23#define __PA_ADDR ".dword"
24#endif 24#endif
25 25
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 5cae35cd9ba9..652b6d67a571 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -103,20 +103,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
103#define __pgd(x) ((pgd_t) { (x) } ) 103#define __pgd(x) ((pgd_t) { (x) } )
104#define __pgprot(x) ((pgprot_t) { (x) } ) 104#define __pgprot(x) ((pgprot_t) { (x) } )
105 105
106/* Pure 2^n version of get_order */
107static __inline__ int get_order(unsigned long size)
108{
109 int order;
110
111 size = (size-1) >> (PAGE_SHIFT-1);
112 order = -1;
113 do {
114 size >>= 1;
115 order++;
116 } while (size);
117 return order;
118}
119
120#endif /* !__ASSEMBLY__ */ 106#endif /* !__ASSEMBLY__ */
121 107
122/* to align the pointer to the (next) page boundary */ 108/* to align the pointer to the (next) page boundary */
@@ -148,4 +134,6 @@ static __inline__ int get_order(unsigned long size)
148#define WANT_PAGE_VIRTUAL 134#define WANT_PAGE_VIRTUAL
149#endif 135#endif
150 136
137#include <asm-generic/page.h>
138
151#endif /* _ASM_PAGE_H */ 139#endif /* _ASM_PAGE_H */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index d70dc355c1f3..c9a00ca1c012 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -94,7 +94,7 @@ struct pci_dev;
94 */ 94 */
95extern unsigned int PCI_DMA_BUS_IS_PHYS; 95extern unsigned int PCI_DMA_BUS_IS_PHYS;
96 96
97#ifdef CONFIG_MAPPED_DMA_IO 97#ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
98 98
99/* pci_unmap_{single,page} is not a nop, thus... */ 99/* pci_unmap_{single,page} is not a nop, thus... */
100#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; 100#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
@@ -104,7 +104,7 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS;
104#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 104#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
105#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 105#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
106 106
107#else /* CONFIG_MAPPED_DMA_IO */ 107#else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
108 108
109/* pci_unmap_{page,single} is a nop so... */ 109/* pci_unmap_{page,single} is a nop so... */
110#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) 110#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
@@ -114,7 +114,7 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS;
114#define pci_unmap_len(PTR, LEN_NAME) (0) 114#define pci_unmap_len(PTR, LEN_NAME) (0)
115#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 115#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
116 116
117#endif /* CONFIG_MAPPED_DMA_IO */ 117#endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
118 118
119/* This is always fine. */ 119/* This is always fine. */
120#define pci_dac_dma_supported(pci_dev, mask) (1) 120#define pci_dac_dma_supported(pci_dev, mask) (1)
@@ -142,6 +142,8 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
142 142
143extern void pcibios_resource_to_bus(struct pci_dev *dev, 143extern void pcibios_resource_to_bus(struct pci_dev *dev,
144 struct pci_bus_region *region, struct resource *res); 144 struct pci_bus_region *region, struct resource *res);
145extern void pcibios_bus_to_resource(struct pci_dev *dev,
146 struct resource *res, struct pci_bus_region *region);
145 147
146#ifdef CONFIG_PCI_DOMAINS 148#ifdef CONFIG_PCI_DOMAINS
147 149
@@ -167,4 +169,17 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev)
167/* Do platform specific device initialization at pci_enable_device() time */ 169/* Do platform specific device initialization at pci_enable_device() time */
168extern int pcibios_plat_dev_init(struct pci_dev *dev); 170extern int pcibios_plat_dev_init(struct pci_dev *dev);
169 171
172static inline struct resource *
173pcibios_select_root(struct pci_dev *pdev, struct resource *res)
174{
175 struct resource *root = NULL;
176
177 if (res->flags & IORESOURCE_IO)
178 root = &ioport_resource;
179 if (res->flags & IORESOURCE_MEM)
180 root = &iomem_resource;
181
182 return root;
183}
184
170#endif /* _ASM_PCI_H */ 185#endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/pgalloc.h b/include/asm-mips/pgalloc.h
index 2d63f5ba403f..ce57288d43bd 100644
--- a/include/asm-mips/pgalloc.h
+++ b/include/asm-mips/pgalloc.h
@@ -85,7 +85,7 @@ static inline void pte_free(struct page *pte)
85 85
86#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 86#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
87 87
88#ifdef CONFIG_MIPS32 88#ifdef CONFIG_32BIT
89#define pgd_populate(mm, pmd, pte) BUG() 89#define pgd_populate(mm, pmd, pte) BUG()
90 90
91/* 91/*
@@ -97,7 +97,7 @@ static inline void pte_free(struct page *pte)
97#define __pmd_free_tlb(tlb,x) do { } while (0) 97#define __pmd_free_tlb(tlb,x) do { } while (0)
98#endif 98#endif
99 99
100#ifdef CONFIG_MIPS64 100#ifdef CONFIG_64BIT
101 101
102#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd)) 102#define pgd_populate(mm, pgd, pmd) set_pgd(pgd, __pgd(pmd))
103 103
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index e76ccd6e3a5d..dbe13da0bdad 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -11,10 +11,10 @@
11#include <asm-generic/4level-fixup.h> 11#include <asm-generic/4level-fixup.h>
12 12
13#include <linux/config.h> 13#include <linux/config.h>
14#ifdef CONFIG_MIPS32 14#ifdef CONFIG_32BIT
15#include <asm/pgtable-32.h> 15#include <asm/pgtable-32.h>
16#endif 16#endif
17#ifdef CONFIG_MIPS64 17#ifdef CONFIG_64BIT
18#include <asm/pgtable-64.h> 18#include <asm/pgtable-64.h>
19#endif 19#endif
20 20
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 13c54d5b3b48..d6466aa09fb7 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -33,7 +33,7 @@ extern void (*cpu_wait)(void);
33 33
34extern unsigned int vced_count, vcei_count; 34extern unsigned int vced_count, vcei_count;
35 35
36#ifdef CONFIG_MIPS32 36#ifdef CONFIG_32BIT
37/* 37/*
38 * User space process size: 2GB. This is hardcoded into a few places, 38 * User space process size: 2GB. This is hardcoded into a few places,
39 * so don't change it unless you know what you are doing. 39 * so don't change it unless you know what you are doing.
@@ -47,7 +47,7 @@ extern unsigned int vced_count, vcei_count;
47#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3)) 47#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
48#endif 48#endif
49 49
50#ifdef CONFIG_MIPS64 50#ifdef CONFIG_64BIT
51/* 51/*
52 * User space process size: 1TB. This is hardcoded into a few places, 52 * User space process size: 1TB. This is hardcoded into a few places,
53 * so don't change it unless you know what you are doing. TASK_SIZE 53 * so don't change it unless you know what you are doing. TASK_SIZE
diff --git a/include/asm-mips/ptrace.h b/include/asm-mips/ptrace.h
index d3c46d633826..2b5c624c3d4f 100644
--- a/include/asm-mips/ptrace.h
+++ b/include/asm-mips/ptrace.h
@@ -28,7 +28,7 @@
28 * system call/exception. As usual the registers k0/k1 aren't being saved. 28 * system call/exception. As usual the registers k0/k1 aren't being saved.
29 */ 29 */
30struct pt_regs { 30struct pt_regs {
31#ifdef CONFIG_MIPS32 31#ifdef CONFIG_32BIT
32 /* Pad bytes for argument save space on the stack. */ 32 /* Pad bytes for argument save space on the stack. */
33 unsigned long pad0[6]; 33 unsigned long pad0[6];
34#endif 34#endif
diff --git a/include/asm-mips/qemu.h b/include/asm-mips/qemu.h
new file mode 100644
index 000000000000..905c39585903
--- /dev/null
+++ b/include/asm-mips/qemu.h
@@ -0,0 +1,24 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 by Ralf Baechle (ralf@linux-mips.org)
7 */
8#ifndef __ASM_QEMU_H
9#define __ASM_QEMU_H
10
11/*
12 * Interrupt numbers
13 */
14#define Q_PIC_IRQ_BASE 0
15#define Q_COUNT_COMPARE_IRQ 16
16
17/*
18 * Qemu clock rate. Unlike on real MIPS this has no relation to the
19 * instruction issue rate, so the choosen value is pure fiction, just needs
20 * to match the value in Qemu itself.
21 */
22#define QEMU_C0_COUNTER_CLOCK 100000000
23
24#endif /* __ASM_QEMU_H */
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h
index da03a32c1ca7..5bea49feec66 100644
--- a/include/asm-mips/r4kcache.h
+++ b/include/asm-mips/r4kcache.h
@@ -171,11 +171,11 @@ static inline void blast_dcache16(void)
171 unsigned long start = INDEX_BASE; 171 unsigned long start = INDEX_BASE;
172 unsigned long end = start + current_cpu_data.dcache.waysize; 172 unsigned long end = start + current_cpu_data.dcache.waysize;
173 unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; 173 unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
174 unsigned long ws_end = current_cpu_data.dcache.ways << 174 unsigned long ws_end = current_cpu_data.dcache.ways <<
175 current_cpu_data.dcache.waybit; 175 current_cpu_data.dcache.waybit;
176 unsigned long ws, addr; 176 unsigned long ws, addr;
177 177
178 for (ws = 0; ws < ws_end; ws += ws_inc) 178 for (ws = 0; ws < ws_end; ws += ws_inc)
179 for (addr = start; addr < end; addr += 0x200) 179 for (addr = start; addr < end; addr += 0x200)
180 cache16_unroll32(addr|ws,Index_Writeback_Inv_D); 180 cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
181} 181}
@@ -200,8 +200,8 @@ static inline void blast_dcache16_page_indexed(unsigned long page)
200 current_cpu_data.dcache.waybit; 200 current_cpu_data.dcache.waybit;
201 unsigned long ws, addr; 201 unsigned long ws, addr;
202 202
203 for (ws = 0; ws < ws_end; ws += ws_inc) 203 for (ws = 0; ws < ws_end; ws += ws_inc)
204 for (addr = start; addr < end; addr += 0x200) 204 for (addr = start; addr < end; addr += 0x200)
205 cache16_unroll32(addr|ws,Index_Writeback_Inv_D); 205 cache16_unroll32(addr|ws,Index_Writeback_Inv_D);
206} 206}
207 207
@@ -214,8 +214,8 @@ static inline void blast_icache16(void)
214 current_cpu_data.icache.waybit; 214 current_cpu_data.icache.waybit;
215 unsigned long ws, addr; 215 unsigned long ws, addr;
216 216
217 for (ws = 0; ws < ws_end; ws += ws_inc) 217 for (ws = 0; ws < ws_end; ws += ws_inc)
218 for (addr = start; addr < end; addr += 0x200) 218 for (addr = start; addr < end; addr += 0x200)
219 cache16_unroll32(addr|ws,Index_Invalidate_I); 219 cache16_unroll32(addr|ws,Index_Invalidate_I);
220} 220}
221 221
@@ -239,8 +239,8 @@ static inline void blast_icache16_page_indexed(unsigned long page)
239 current_cpu_data.icache.waybit; 239 current_cpu_data.icache.waybit;
240 unsigned long ws, addr; 240 unsigned long ws, addr;
241 241
242 for (ws = 0; ws < ws_end; ws += ws_inc) 242 for (ws = 0; ws < ws_end; ws += ws_inc)
243 for (addr = start; addr < end; addr += 0x200) 243 for (addr = start; addr < end; addr += 0x200)
244 cache16_unroll32(addr|ws,Index_Invalidate_I); 244 cache16_unroll32(addr|ws,Index_Invalidate_I);
245} 245}
246 246
@@ -249,11 +249,11 @@ static inline void blast_scache16(void)
249 unsigned long start = INDEX_BASE; 249 unsigned long start = INDEX_BASE;
250 unsigned long end = start + current_cpu_data.scache.waysize; 250 unsigned long end = start + current_cpu_data.scache.waysize;
251 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 251 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
252 unsigned long ws_end = current_cpu_data.scache.ways << 252 unsigned long ws_end = current_cpu_data.scache.ways <<
253 current_cpu_data.scache.waybit; 253 current_cpu_data.scache.waybit;
254 unsigned long ws, addr; 254 unsigned long ws, addr;
255 255
256 for (ws = 0; ws < ws_end; ws += ws_inc) 256 for (ws = 0; ws < ws_end; ws += ws_inc)
257 for (addr = start; addr < end; addr += 0x200) 257 for (addr = start; addr < end; addr += 0x200)
258 cache16_unroll32(addr|ws,Index_Writeback_Inv_SD); 258 cache16_unroll32(addr|ws,Index_Writeback_Inv_SD);
259} 259}
@@ -278,8 +278,8 @@ static inline void blast_scache16_page_indexed(unsigned long page)
278 current_cpu_data.scache.waybit; 278 current_cpu_data.scache.waybit;
279 unsigned long ws, addr; 279 unsigned long ws, addr;
280 280
281 for (ws = 0; ws < ws_end; ws += ws_inc) 281 for (ws = 0; ws < ws_end; ws += ws_inc)
282 for (addr = start; addr < end; addr += 0x200) 282 for (addr = start; addr < end; addr += 0x200)
283 cache16_unroll32(addr|ws,Index_Writeback_Inv_SD); 283 cache16_unroll32(addr|ws,Index_Writeback_Inv_SD);
284} 284}
285 285
@@ -318,8 +318,8 @@ static inline void blast_dcache32(void)
318 current_cpu_data.dcache.waybit; 318 current_cpu_data.dcache.waybit;
319 unsigned long ws, addr; 319 unsigned long ws, addr;
320 320
321 for (ws = 0; ws < ws_end; ws += ws_inc) 321 for (ws = 0; ws < ws_end; ws += ws_inc)
322 for (addr = start; addr < end; addr += 0x400) 322 for (addr = start; addr < end; addr += 0x400)
323 cache32_unroll32(addr|ws,Index_Writeback_Inv_D); 323 cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
324} 324}
325 325
@@ -343,8 +343,8 @@ static inline void blast_dcache32_page_indexed(unsigned long page)
343 current_cpu_data.dcache.waybit; 343 current_cpu_data.dcache.waybit;
344 unsigned long ws, addr; 344 unsigned long ws, addr;
345 345
346 for (ws = 0; ws < ws_end; ws += ws_inc) 346 for (ws = 0; ws < ws_end; ws += ws_inc)
347 for (addr = start; addr < end; addr += 0x400) 347 for (addr = start; addr < end; addr += 0x400)
348 cache32_unroll32(addr|ws,Index_Writeback_Inv_D); 348 cache32_unroll32(addr|ws,Index_Writeback_Inv_D);
349} 349}
350 350
@@ -357,8 +357,8 @@ static inline void blast_icache32(void)
357 current_cpu_data.icache.waybit; 357 current_cpu_data.icache.waybit;
358 unsigned long ws, addr; 358 unsigned long ws, addr;
359 359
360 for (ws = 0; ws < ws_end; ws += ws_inc) 360 for (ws = 0; ws < ws_end; ws += ws_inc)
361 for (addr = start; addr < end; addr += 0x400) 361 for (addr = start; addr < end; addr += 0x400)
362 cache32_unroll32(addr|ws,Index_Invalidate_I); 362 cache32_unroll32(addr|ws,Index_Invalidate_I);
363} 363}
364 364
@@ -383,7 +383,7 @@ static inline void blast_icache32_page_indexed(unsigned long page)
383 unsigned long ws, addr; 383 unsigned long ws, addr;
384 384
385 for (ws = 0; ws < ws_end; ws += ws_inc) 385 for (ws = 0; ws < ws_end; ws += ws_inc)
386 for (addr = start; addr < end; addr += 0x400) 386 for (addr = start; addr < end; addr += 0x400)
387 cache32_unroll32(addr|ws,Index_Invalidate_I); 387 cache32_unroll32(addr|ws,Index_Invalidate_I);
388} 388}
389 389
@@ -392,11 +392,11 @@ static inline void blast_scache32(void)
392 unsigned long start = INDEX_BASE; 392 unsigned long start = INDEX_BASE;
393 unsigned long end = start + current_cpu_data.scache.waysize; 393 unsigned long end = start + current_cpu_data.scache.waysize;
394 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 394 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
395 unsigned long ws_end = current_cpu_data.scache.ways << 395 unsigned long ws_end = current_cpu_data.scache.ways <<
396 current_cpu_data.scache.waybit; 396 current_cpu_data.scache.waybit;
397 unsigned long ws, addr; 397 unsigned long ws, addr;
398 398
399 for (ws = 0; ws < ws_end; ws += ws_inc) 399 for (ws = 0; ws < ws_end; ws += ws_inc)
400 for (addr = start; addr < end; addr += 0x400) 400 for (addr = start; addr < end; addr += 0x400)
401 cache32_unroll32(addr|ws,Index_Writeback_Inv_SD); 401 cache32_unroll32(addr|ws,Index_Writeback_Inv_SD);
402} 402}
@@ -421,8 +421,8 @@ static inline void blast_scache32_page_indexed(unsigned long page)
421 current_cpu_data.scache.waybit; 421 current_cpu_data.scache.waybit;
422 unsigned long ws, addr; 422 unsigned long ws, addr;
423 423
424 for (ws = 0; ws < ws_end; ws += ws_inc) 424 for (ws = 0; ws < ws_end; ws += ws_inc)
425 for (addr = start; addr < end; addr += 0x400) 425 for (addr = start; addr < end; addr += 0x400)
426 cache32_unroll32(addr|ws,Index_Writeback_Inv_SD); 426 cache32_unroll32(addr|ws,Index_Writeback_Inv_SD);
427} 427}
428 428
@@ -461,8 +461,8 @@ static inline void blast_icache64(void)
461 current_cpu_data.icache.waybit; 461 current_cpu_data.icache.waybit;
462 unsigned long ws, addr; 462 unsigned long ws, addr;
463 463
464 for (ws = 0; ws < ws_end; ws += ws_inc) 464 for (ws = 0; ws < ws_end; ws += ws_inc)
465 for (addr = start; addr < end; addr += 0x800) 465 for (addr = start; addr < end; addr += 0x800)
466 cache64_unroll32(addr|ws,Index_Invalidate_I); 466 cache64_unroll32(addr|ws,Index_Invalidate_I);
467} 467}
468 468
@@ -487,7 +487,7 @@ static inline void blast_icache64_page_indexed(unsigned long page)
487 unsigned long ws, addr; 487 unsigned long ws, addr;
488 488
489 for (ws = 0; ws < ws_end; ws += ws_inc) 489 for (ws = 0; ws < ws_end; ws += ws_inc)
490 for (addr = start; addr < end; addr += 0x800) 490 for (addr = start; addr < end; addr += 0x800)
491 cache64_unroll32(addr|ws,Index_Invalidate_I); 491 cache64_unroll32(addr|ws,Index_Invalidate_I);
492} 492}
493 493
@@ -496,11 +496,11 @@ static inline void blast_scache64(void)
496 unsigned long start = INDEX_BASE; 496 unsigned long start = INDEX_BASE;
497 unsigned long end = start + current_cpu_data.scache.waysize; 497 unsigned long end = start + current_cpu_data.scache.waysize;
498 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 498 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
499 unsigned long ws_end = current_cpu_data.scache.ways << 499 unsigned long ws_end = current_cpu_data.scache.ways <<
500 current_cpu_data.scache.waybit; 500 current_cpu_data.scache.waybit;
501 unsigned long ws, addr; 501 unsigned long ws, addr;
502 502
503 for (ws = 0; ws < ws_end; ws += ws_inc) 503 for (ws = 0; ws < ws_end; ws += ws_inc)
504 for (addr = start; addr < end; addr += 0x800) 504 for (addr = start; addr < end; addr += 0x800)
505 cache64_unroll32(addr|ws,Index_Writeback_Inv_SD); 505 cache64_unroll32(addr|ws,Index_Writeback_Inv_SD);
506} 506}
@@ -525,8 +525,8 @@ static inline void blast_scache64_page_indexed(unsigned long page)
525 current_cpu_data.scache.waybit; 525 current_cpu_data.scache.waybit;
526 unsigned long ws, addr; 526 unsigned long ws, addr;
527 527
528 for (ws = 0; ws < ws_end; ws += ws_inc) 528 for (ws = 0; ws < ws_end; ws += ws_inc)
529 for (addr = start; addr < end; addr += 0x800) 529 for (addr = start; addr < end; addr += 0x800)
530 cache64_unroll32(addr|ws,Index_Writeback_Inv_SD); 530 cache64_unroll32(addr|ws,Index_Writeback_Inv_SD);
531} 531}
532 532
@@ -561,11 +561,11 @@ static inline void blast_scache128(void)
561 unsigned long start = INDEX_BASE; 561 unsigned long start = INDEX_BASE;
562 unsigned long end = start + current_cpu_data.scache.waysize; 562 unsigned long end = start + current_cpu_data.scache.waysize;
563 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 563 unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit;
564 unsigned long ws_end = current_cpu_data.scache.ways << 564 unsigned long ws_end = current_cpu_data.scache.ways <<
565 current_cpu_data.scache.waybit; 565 current_cpu_data.scache.waybit;
566 unsigned long ws, addr; 566 unsigned long ws, addr;
567 567
568 for (ws = 0; ws < ws_end; ws += ws_inc) 568 for (ws = 0; ws < ws_end; ws += ws_inc)
569 for (addr = start; addr < end; addr += 0x1000) 569 for (addr = start; addr < end; addr += 0x1000)
570 cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); 570 cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
571} 571}
@@ -590,8 +590,8 @@ static inline void blast_scache128_page_indexed(unsigned long page)
590 current_cpu_data.scache.waybit; 590 current_cpu_data.scache.waybit;
591 unsigned long ws, addr; 591 unsigned long ws, addr;
592 592
593 for (ws = 0; ws < ws_end; ws += ws_inc) 593 for (ws = 0; ws < ws_end; ws += ws_inc)
594 for (addr = start; addr < end; addr += 0x1000) 594 for (addr = start; addr < end; addr += 0x1000)
595 cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); 595 cache128_unroll32(addr|ws,Index_Writeback_Inv_SD);
596} 596}
597 597
diff --git a/include/asm-mips/reg.h b/include/asm-mips/reg.h
index 7b33bbca9585..6173004cc88e 100644
--- a/include/asm-mips/reg.h
+++ b/include/asm-mips/reg.h
@@ -14,7 +14,7 @@
14 14
15#include <linux/config.h> 15#include <linux/config.h>
16 16
17#if defined(CONFIG_MIPS32) || defined(WANT_COMPAT_REG_H) 17#if defined(CONFIG_32BIT) || defined(WANT_COMPAT_REG_H)
18 18
19#define EF_R0 6 19#define EF_R0 6
20#define EF_R1 7 20#define EF_R1 7
@@ -70,7 +70,7 @@
70 70
71#endif 71#endif
72 72
73#if CONFIG_MIPS64 73#ifdef CONFIG_64BIT
74 74
75#define EF_R0 0 75#define EF_R0 0
76#define EF_R1 1 76#define EF_R1 1
@@ -124,6 +124,6 @@
124 124
125#define EF_SIZE 304 /* size in bytes */ 125#define EF_SIZE 304 /* size in bytes */
126 126
127#endif /* CONFIG_MIPS64 */ 127#endif /* CONFIG_64BIT */
128 128
129#endif /* __ASM_MIPS_REG_H */ 129#endif /* __ASM_MIPS_REG_H */
diff --git a/include/asm-mips/resource.h b/include/asm-mips/resource.h
index fd3c6d17a5f6..1fba00c22077 100644
--- a/include/asm-mips/resource.h
+++ b/include/asm-mips/resource.h
@@ -27,7 +27,7 @@
27 * but we keep the old value on MIPS32, 27 * but we keep the old value on MIPS32,
28 * for compatibility: 28 * for compatibility:
29 */ 29 */
30#ifdef CONFIG_MIPS32 30#ifdef CONFIG_32BIT
31# define RLIM_INFINITY 0x7fffffffUL 31# define RLIM_INFINITY 0x7fffffffUL
32#endif 32#endif
33 33
diff --git a/include/asm-mips/rtc.h b/include/asm-mips/rtc.h
index 31c0c2347f4f..3c4b637fd925 100644
--- a/include/asm-mips/rtc.h
+++ b/include/asm-mips/rtc.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * include/asm-mips/rtc.h 2 * include/asm-mips/rtc.h
3 * 3 *
4 * (Really an interface for drivers/char/genrtc.c) 4 * (Really an interface for drivers/char/genrtc.c)
5 * 5 *
diff --git a/include/asm-mips/sgi/gio.h b/include/asm-mips/sgi/gio.h
index a38d66f99872..889cf028c95d 100644
--- a/include/asm-mips/sgi/gio.h
+++ b/include/asm-mips/sgi/gio.h
@@ -16,7 +16,7 @@
16 * 16 *
17 * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have 17 * The Indigo and Indy have two GIO bus connectors. Indigo2 (all models) have
18 * three physical connectors, but only two slots, GFX and EXP0. 18 * three physical connectors, but only two slots, GFX and EXP0.
19 * 19 *
20 * There is 10MB of GIO address space for GIO64 slot devices 20 * There is 10MB of GIO address space for GIO64 slot devices
21 * slot# slot type address range size 21 * slot# slot type address range size
22 * ----- --------- ----------------------- ----- 22 * ----- --------- ----------------------- -----
diff --git a/include/asm-mips/sgi/hpc3.h b/include/asm-mips/sgi/hpc3.h
index a5b988d7327a..ac3dfc7af5b0 100644
--- a/include/asm-mips/sgi/hpc3.h
+++ b/include/asm-mips/sgi/hpc3.h
@@ -221,7 +221,7 @@ struct hpc3_regs {
221#define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */ 221#define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */
222 222
223 u32 _unused1[0x14000/4 - 5]; /* padding */ 223 u32 _unused1[0x14000/4 - 5]; /* padding */
224 224
225 /* Now direct PIO per-HPC3 peripheral access to external regs. */ 225 /* Now direct PIO per-HPC3 peripheral access to external regs. */
226 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */ 226 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */
227 u32 _unused2[0x7c00/4]; 227 u32 _unused2[0x7c00/4];
@@ -304,7 +304,7 @@ struct hpc3_regs {
304 volatile u32 bbram[8192-50-14]; /* Battery backed ram */ 304 volatile u32 bbram[8192-50-14]; /* Battery backed ram */
305}; 305};
306 306
307/* 307/*
308 * It is possible to have two HPC3's within the address space on 308 * It is possible to have two HPC3's within the address space on
309 * one machine, though only having one is more likely on an Indy. 309 * one machine, though only having one is more likely on an Indy.
310 */ 310 */
diff --git a/include/asm-mips/sgi/ioc.h b/include/asm-mips/sgi/ioc.h
index 169187f53fbc..f3e3dc9bb732 100644
--- a/include/asm-mips/sgi/ioc.h
+++ b/include/asm-mips/sgi/ioc.h
@@ -16,7 +16,7 @@
16#include <linux/types.h> 16#include <linux/types.h>
17#include <asm/sgi/pi1.h> 17#include <asm/sgi/pi1.h>
18 18
19/* 19/*
20 * All registers are 8-bit wide alligned on 32-bit boundary. Bad things 20 * All registers are 8-bit wide alligned on 32-bit boundary. Bad things
21 * happen if you try word access them. You have been warned. 21 * happen if you try word access them. You have been warned.
22 */ 22 */
@@ -138,7 +138,7 @@ struct sgioc_regs {
138 u8 _sysid[3]; 138 u8 _sysid[3];
139 volatile u8 sysid; 139 volatile u8 sysid;
140#define SGIOC_SYSID_FULLHOUSE 0x01 140#define SGIOC_SYSID_FULLHOUSE 0x01
141#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5) 141#define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5)
142#define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1) 142#define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1)
143 u32 _unused2; 143 u32 _unused2;
144 u8 _read[3]; 144 u8 _read[3];
diff --git a/include/asm-mips/sgi/ip22.h b/include/asm-mips/sgi/ip22.h
index 97d73adb4e40..bbfc05c3cab9 100644
--- a/include/asm-mips/sgi/ip22.h
+++ b/include/asm-mips/sgi/ip22.h
@@ -12,7 +12,7 @@
12#ifndef _SGI_IP22_H 12#ifndef _SGI_IP22_H
13#define _SGI_IP22_H 13#define _SGI_IP22_H
14 14
15/* 15/*
16 * These are the virtual IRQ numbers, we divide all IRQ's into 16 * These are the virtual IRQ numbers, we divide all IRQ's into
17 * 'spaces', the 'space' determines where and how to enable/disable 17 * 'spaces', the 'space' determines where and how to enable/disable
18 * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups 18 * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups
diff --git a/include/asm-mips/sgi/mc.h b/include/asm-mips/sgi/mc.h
index fd98f930607c..c52f7834c7c8 100644
--- a/include/asm-mips/sgi/mc.h
+++ b/include/asm-mips/sgi/mc.h
@@ -182,14 +182,14 @@ struct sgimc_regs {
182 volatile u32 dtlb_hi3; 182 volatile u32 dtlb_hi3;
183 u32 _unused33; 183 u32 _unused33;
184 volatile u32 dtlb_lo3; 184 volatile u32 dtlb_lo3;
185 185
186 u32 _unused34[0x0392]; 186 u32 _unused34[0x0392];
187 187
188 u32 _unused35; 188 u32 _unused35;
189 volatile u32 rpsscounter; /* Chirps at 100ns */ 189 volatile u32 rpsscounter; /* Chirps at 100ns */
190 190
191 u32 _unused36[0x1000/4-2*4]; 191 u32 _unused36[0x1000/4-2*4];
192 192
193 u32 _unused37; 193 u32 _unused37;
194 volatile u32 maddronly; /* Address DMA goes at */ 194 volatile u32 maddronly; /* Address DMA goes at */
195 u32 _unused38; 195 u32 _unused38;
diff --git a/include/asm-mips/sgiarcs.h b/include/asm-mips/sgiarcs.h
index 59450335f049..722b77a8c5e5 100644
--- a/include/asm-mips/sgiarcs.h
+++ b/include/asm-mips/sgiarcs.h
@@ -367,7 +367,7 @@ struct linux_smonblock {
367 * Macros for calling a 32-bit ARC implementation from 64-bit code 367 * Macros for calling a 32-bit ARC implementation from 64-bit code
368 */ 368 */
369 369
370#if defined(CONFIG_MIPS64) && defined(CONFIG_ARC32) 370#if defined(CONFIG_64BIT) && defined(CONFIG_ARC32)
371 371
372#define __arc_clobbers \ 372#define __arc_clobbers \
373 "$2","$3" /* ... */, "$8","$9","$10","$11", \ 373 "$2","$3" /* ... */, "$8","$9","$10","$11", \
@@ -476,10 +476,10 @@ struct linux_smonblock {
476 __res; \ 476 __res; \
477}) 477})
478 478
479#endif /* defined(CONFIG_MIPS64) && defined(CONFIG_ARC32) */ 479#endif /* defined(CONFIG_64BIT) && defined(CONFIG_ARC32) */
480 480
481#if (defined(CONFIG_MIPS32) && defined(CONFIG_ARC32)) || \ 481#if (defined(CONFIG_32BIT) && defined(CONFIG_ARC32)) || \
482 (defined(CONFIG_MIPS64) && defined(CONFIG_ARC64)) 482 (defined(CONFIG_64BIT) && defined(CONFIG_ARC64))
483 483
484#define ARC_CALL0(dest) \ 484#define ARC_CALL0(dest) \
485({ long __res; \ 485({ long __res; \
diff --git a/include/asm-mips/sibyte/carmel.h b/include/asm-mips/sibyte/carmel.h
index 7ac5da13ce8a..b5e7dae19f0f 100644
--- a/include/asm-mips/sibyte/carmel.h
+++ b/include/asm-mips/sibyte/carmel.h
@@ -25,12 +25,12 @@
25 25
26#define SIBYTE_BOARD_NAME "Carmel" 26#define SIBYTE_BOARD_NAME "Carmel"
27 27
28#define GPIO_PHY_INTERRUPT 2 28#define GPIO_PHY_INTERRUPT 2
29#define GPIO_NONMASKABLE_INT 3 29#define GPIO_NONMASKABLE_INT 3
30#define GPIO_CF_INSERTED 6 30#define GPIO_CF_INSERTED 6
31#define GPIO_MONTEREY_RESET 7 31#define GPIO_MONTEREY_RESET 7
32#define GPIO_QUADUART_INT 8 32#define GPIO_QUADUART_INT 8
33#define GPIO_CF_INT 9 33#define GPIO_CF_INT 9
34#define GPIO_FPGA_CCLK 10 34#define GPIO_FPGA_CCLK 10
35#define GPIO_FPGA_DOUT 11 35#define GPIO_FPGA_DOUT 11
36#define GPIO_FPGA_DIN 12 36#define GPIO_FPGA_DIN 12
diff --git a/include/asm-mips/sibyte/sb1250_defs.h b/include/asm-mips/sibyte/sb1250_defs.h
index 96088fb074a4..40ef97c76c8b 100644
--- a/include/asm-mips/sibyte/sb1250_defs.h
+++ b/include/asm-mips/sibyte/sb1250_defs.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Global constants and macros File: sb1250_defs.h 4 * Global constants and macros File: sb1250_defs.h
5 * 5 *
6 * This file contains macros and definitions used by the other 6 * This file contains macros and definitions used by the other
7 * include files. 7 * include files.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -105,7 +105,7 @@
105#define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00 105#define SIBYTE_HDR_FMASK_112x_ALL 0x0000f00
106#define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100 106#define SIBYTE_HDR_FMASK_112x_PASS1 0x0000100
107 107
108/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ 108/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
109#define SIBYTE_HDR_FMASK(chip, pass) \ 109#define SIBYTE_HDR_FMASK(chip, pass) \
110 (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass) 110 (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
111#define SIBYTE_HDR_FMASK_ALLREVS(chip) \ 111#define SIBYTE_HDR_FMASK_ALLREVS(chip) \
@@ -150,31 +150,31 @@
150 150
151/* ********************************************************************* 151/* *********************************************************************
152 * Naming schemes for constants in these files: 152 * Naming schemes for constants in these files:
153 * 153 *
154 * M_xxx MASK constant (identifies bits in a register). 154 * M_xxx MASK constant (identifies bits in a register).
155 * For multi-bit fields, all bits in the field will 155 * For multi-bit fields, all bits in the field will
156 * be set. 156 * be set.
157 * 157 *
158 * K_xxx "Code" constant (value for data in a multi-bit 158 * K_xxx "Code" constant (value for data in a multi-bit
159 * field). The value is right justified. 159 * field). The value is right justified.
160 * 160 *
161 * V_xxx "Value" constant. This is the same as the 161 * V_xxx "Value" constant. This is the same as the
162 * corresponding "K_xxx" constant, except it is 162 * corresponding "K_xxx" constant, except it is
163 * shifted to the correct position in the register. 163 * shifted to the correct position in the register.
164 * 164 *
165 * S_xxx SHIFT constant. This is the number of bits that 165 * S_xxx SHIFT constant. This is the number of bits that
166 * a field value (code) needs to be shifted 166 * a field value (code) needs to be shifted
167 * (towards the left) to put the value in the right 167 * (towards the left) to put the value in the right
168 * position for the register. 168 * position for the register.
169 * 169 *
170 * A_xxx ADDRESS constant. This will be a physical 170 * A_xxx ADDRESS constant. This will be a physical
171 * address. Use the PHYS_TO_K1 macro to generate 171 * address. Use the PHYS_TO_K1 macro to generate
172 * a K1SEG address. 172 * a K1SEG address.
173 * 173 *
174 * R_xxx RELATIVE offset constant. This is an offset from 174 * R_xxx RELATIVE offset constant. This is an offset from
175 * an A_xxx constant (usually the first register in 175 * an A_xxx constant (usually the first register in
176 * a group). 176 * a group).
177 * 177 *
178 * G_xxx(X) GET value. This macro obtains a multi-bit field 178 * G_xxx(X) GET value. This macro obtains a multi-bit field
179 * from a register, masks it, and shifts it to 179 * from a register, masks it, and shifts it to
180 * the bottom of the register (retrieving a K_xxx 180 * the bottom of the register (retrieving a K_xxx
@@ -189,7 +189,7 @@
189 189
190 190
191/* 191/*
192 * Cast to 64-bit number. Presumably the syntax is different in 192 * Cast to 64-bit number. Presumably the syntax is different in
193 * assembly language. 193 * assembly language.
194 * 194 *
195 * Note: you'll need to define uint32_t and uint64_t in your headers. 195 * Note: you'll need to define uint32_t and uint64_t in your headers.
diff --git a/include/asm-mips/sibyte/sb1250_dma.h b/include/asm-mips/sibyte/sb1250_dma.h
index f1b08d32338d..3cdb48f50ed0 100644
--- a/include/asm-mips/sibyte/sb1250_dma.h
+++ b/include/asm-mips/sibyte/sb1250_dma.h
@@ -1,24 +1,24 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * DMA definitions File: sb1250_dma.h 4 * DMA definitions File: sb1250_dma.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * programming the SB1250's DMA controllers, both the data mover 7 * programming the SB1250's DMA controllers, both the data mover
8 * and the Ethernet DMA. 8 * and the Ethernet DMA.
9 * 9 *
10 * SB1250 specification level: User's manual 1/02/02 10 * SB1250 specification level: User's manual 1/02/02
11 * 11 *
12 * Author: Mitch Lichtenberg 12 * Author: Mitch Lichtenberg
13 * 13 *
14 ********************************************************************* 14 *********************************************************************
15 * 15 *
16 * Copyright 2000,2001,2002,2003 16 * Copyright 2000,2001,2002,2003
17 * Broadcom Corporation. All rights reserved. 17 * Broadcom Corporation. All rights reserved.
18 * 18 *
19 * This program is free software; you can redistribute it and/or 19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License as 20 * modify it under the terms of the GNU General Public License as
21 * published by the Free Software Foundation; either version 2 of 21 * published by the Free Software Foundation; either version 2 of
22 * the License, or (at your option) any later version. 22 * the License, or (at your option) any later version.
23 * 23 *
24 * This program is distributed in the hope that it will be useful, 24 * This program is distributed in the hope that it will be useful,
@@ -28,7 +28,7 @@
28 * 28 *
29 * You should have received a copy of the GNU General Public License 29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software 30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * MA 02111-1307 USA 32 * MA 02111-1307 USA
33 ********************************************************************* */ 33 ********************************************************************* */
34 34
@@ -43,9 +43,9 @@
43 * DMA Registers 43 * DMA Registers
44 ********************************************************************* */ 44 ********************************************************************* */
45 45
46/* 46/*
47 * Ethernet and Serial DMA Configuration Register 0 (Table 7-4) 47 * Ethernet and Serial DMA Configuration Register 0 (Table 7-4)
48 * Registers: DMA_CONFIG0_MAC_x_RX_CH_0 48 * Registers: DMA_CONFIG0_MAC_x_RX_CH_0
49 * Registers: DMA_CONFIG0_MAC_x_TX_CH_0 49 * Registers: DMA_CONFIG0_MAC_x_TX_CH_0
50 * Registers: DMA_CONFIG0_SER_x_RX 50 * Registers: DMA_CONFIG0_SER_x_RX
51 * Registers: DMA_CONFIG0_SER_x_TX 51 * Registers: DMA_CONFIG0_SER_x_TX
@@ -98,7 +98,7 @@
98 98
99/* 99/*
100 * Ethernet and Serial DMA Configuration Register 1 (Table 7-5) 100 * Ethernet and Serial DMA Configuration Register 1 (Table 7-5)
101 * Registers: DMA_CONFIG1_MAC_x_RX_CH_0 101 * Registers: DMA_CONFIG1_MAC_x_RX_CH_0
102 * Registers: DMA_CONFIG1_DMA_x_TX_CH_0 102 * Registers: DMA_CONFIG1_DMA_x_TX_CH_0
103 * Registers: DMA_CONFIG1_SER_x_RX 103 * Registers: DMA_CONFIG1_SER_x_RX
104 * Registers: DMA_CONFIG1_SER_x_TX 104 * Registers: DMA_CONFIG1_SER_x_TX
@@ -152,11 +152,11 @@
152/* 152/*
153 * DMA Descriptor Count Registers (Table 7-8) 153 * DMA Descriptor Count Registers (Table 7-8)
154 */ 154 */
155 155
156/* No bitfields */ 156/* No bitfields */
157 157
158 158
159/* 159/*
160 * Current Descriptor Address Register (Table 7-11) 160 * Current Descriptor Address Register (Table 7-11)
161 */ 161 */
162 162
@@ -275,14 +275,14 @@
275#define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS) 275#define V_DMA_DSCRB_STATUS(x) _SB_MAKEVALUE(x,S_DMA_DSCRB_STATUS)
276#define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS) 276#define G_DMA_DSCRB_STATUS(x) _SB_GETVALUE(x,S_DMA_DSCRB_STATUS,M_DMA_DSCRB_STATUS)
277 277
278/* 278/*
279 * Ethernet Descriptor Status Bits (Table 7-15) 279 * Ethernet Descriptor Status Bits (Table 7-15)
280 */ 280 */
281 281
282#define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51) 282#define M_DMA_ETHRX_BADIP4CS _SB_MAKEMASK1(51)
283#define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52) 283#define M_DMA_ETHRX_DSCRERR _SB_MAKEMASK1(52)
284 284
285#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 285#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
286/* Note: BADTCPCS is actually in DSCR_B options field */ 286/* Note: BADTCPCS is actually in DSCR_B options field */
287#define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0) 287#define M_DMA_ETHRX_BADTCPCS _SB_MAKEMASK1(0)
288#endif /* 1250 PASS2 || 112x PASS1 */ 288#endif /* 1250 PASS2 || 112x PASS1 */
@@ -324,7 +324,7 @@
324 324
325#define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63) 325#define M_DMA_ETHTX_SOP _SB_MAKEMASK1(63)
326 326
327/* 327/*
328 * Ethernet Transmit Options (Table 7-17) 328 * Ethernet Transmit Options (Table 7-17)
329 */ 329 */
330 330
@@ -377,7 +377,7 @@
377 * Data Mover Registers 377 * Data Mover Registers
378 ********************************************************************* */ 378 ********************************************************************* */
379 379
380/* 380/*
381 * Data Mover Descriptor Base Address Register (Table 7-22) 381 * Data Mover Descriptor Base Address Register (Table 7-22)
382 * Register: DM_DSCR_BASE_0 382 * Register: DM_DSCR_BASE_0
383 * Register: DM_DSCR_BASE_1 383 * Register: DM_DSCR_BASE_1
@@ -414,7 +414,7 @@
414#define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62) 414#define M_DM_DSCR_BASE_ABORT _SB_MAKEMASK1(62)
415#define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63) 415#define M_DM_DSCR_BASE_ENABL _SB_MAKEMASK1(63)
416 416
417/* 417/*
418 * Data Mover Descriptor Count Register (Table 7-25) 418 * Data Mover Descriptor Count Register (Table 7-25)
419 */ 419 */
420 420
diff --git a/include/asm-mips/sibyte/sb1250_genbus.h b/include/asm-mips/sibyte/sb1250_genbus.h
index 0d9dfac3d7db..f1f509f295c4 100644
--- a/include/asm-mips/sibyte/sb1250_genbus.h
+++ b/include/asm-mips/sibyte/sb1250_genbus.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Generic Bus Constants File: sb1250_genbus.h 4 * Generic Bus Constants File: sb1250_genbus.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the SB1250's Generic Bus interface 7 * manipulating the SB1250's Generic Bus interface
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
diff --git a/include/asm-mips/sibyte/sb1250_int.h b/include/asm-mips/sibyte/sb1250_int.h
index c3f74df211f4..e173e2ea4c98 100644
--- a/include/asm-mips/sibyte/sb1250_int.h
+++ b/include/asm-mips/sibyte/sb1250_int.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Interrupt Mapper definitions File: sb1250_int.h 4 * Interrupt Mapper definitions File: sb1250_int.h
5 * 5 *
6 * This module contains constants for manipulating the SB1250's 6 * This module contains constants for manipulating the SB1250's
7 * interrupt mapper and definitions for the interrupt sources. 7 * interrupt mapper and definitions for the interrupt sources.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -43,7 +43,7 @@
43 43
44/* 44/*
45 * Interrupt sources (Table 4-8, UM 0.2) 45 * Interrupt sources (Table 4-8, UM 0.2)
46 * 46 *
47 * First, the interrupt numbers. 47 * First, the interrupt numbers.
48 */ 48 */
49 49
diff --git a/include/asm-mips/sibyte/sb1250_l2c.h b/include/asm-mips/sibyte/sb1250_l2c.h
index 799db828d963..8afe8e01581b 100644
--- a/include/asm-mips/sibyte/sb1250_l2c.h
+++ b/include/asm-mips/sibyte/sb1250_l2c.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * L2 Cache constants and macros File: sb1250_l2c.h 4 * L2 Cache constants and macros File: sb1250_l2c.h
5 * 5 *
6 * This module contains constants useful for manipulating the 6 * This module contains constants useful for manipulating the
7 * level 2 cache. 7 * level 2 cache.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
diff --git a/include/asm-mips/sibyte/sb1250_ldt.h b/include/asm-mips/sibyte/sb1250_ldt.h
index d8753885df17..f2617ded0a8f 100644
--- a/include/asm-mips/sibyte/sb1250_ldt.h
+++ b/include/asm-mips/sibyte/sb1250_ldt.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * LDT constants File: sb1250_ldt.h 4 * LDT constants File: sb1250_ldt.h
5 * 5 *
6 * This module contains constants and macros to describe 6 * This module contains constants and macros to describe
7 * the LDT interface on the SB1250. 7 * the LDT interface on the SB1250.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -155,7 +155,7 @@
155 155
156/* 156/*
157 * LDT Status Register (Table 8-14). Note that these constants 157 * LDT Status Register (Table 8-14). Note that these constants
158 * assume you've read the command and status register 158 * assume you've read the command and status register
159 * together (32-bit read at offset 0x04) 159 * together (32-bit read at offset 0x04)
160 * 160 *
161 * These bits also apply to the secondary status 161 * These bits also apply to the secondary status
@@ -183,8 +183,8 @@
183#define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31) 183#define M_LDT_STATUS_DETPARERR _SB_MAKEMASK1_32(31)
184 184
185/* 185/*
186 * Bridge Control Register (Table 8-16). Note that these 186 * Bridge Control Register (Table 8-16). Note that these
187 * constants assume you've read the register as a 32-bit 187 * constants assume you've read the register as a 32-bit
188 * read (offset 0x3C) 188 * read (offset 0x3C)
189 */ 189 */
190 190
diff --git a/include/asm-mips/sibyte/sb1250_mac.h b/include/asm-mips/sibyte/sb1250_mac.h
index 81f603f03a98..18e74e43f4a2 100644
--- a/include/asm-mips/sibyte/sb1250_mac.h
+++ b/include/asm-mips/sibyte/sb1250_mac.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * MAC constants and macros File: sb1250_mac.h 4 * MAC constants and macros File: sb1250_mac.h
5 * 5 *
6 * This module contains constants and macros for the SB1250's 6 * This module contains constants and macros for the SB1250's
7 * ethernet controllers. 7 * ethernet controllers.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -311,7 +311,7 @@
311 311
312/* 312/*
313 * These constants are used to configure the fields within the Frame 313 * These constants are used to configure the fields within the Frame
314 * Configuration Register. 314 * Configuration Register.
315 */ 315 */
316 316
317#define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */ 317#define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */
@@ -393,7 +393,7 @@
393 * Register: MAC_INT_MASK_2 393 * Register: MAC_INT_MASK_2
394 */ 394 */
395 395
396/* 396/*
397 * Use these constants to shift the appropriate channel 397 * Use these constants to shift the appropriate channel
398 * into the CH0 position so the same tests can be used 398 * into the CH0 position so the same tests can be used
399 * on each channel. 399 * on each channel.
diff --git a/include/asm-mips/sibyte/sb1250_mc.h b/include/asm-mips/sibyte/sb1250_mc.h
index 93a48334b874..1dd41c927996 100644
--- a/include/asm-mips/sibyte/sb1250_mc.h
+++ b/include/asm-mips/sibyte/sb1250_mc.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Memory Controller constants File: sb1250_mc.h 4 * Memory Controller constants File: sb1250_mc.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * programming the memory controller. 7 * programming the memory controller.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -166,7 +166,7 @@
166 166
167#define K_MC_REF_RATE_100MHz 0x62 167#define K_MC_REF_RATE_100MHz 0x62
168#define K_MC_REF_RATE_133MHz 0x81 168#define K_MC_REF_RATE_133MHz 0x81
169#define K_MC_REF_RATE_200MHz 0xC4 169#define K_MC_REF_RATE_200MHz 0xC4
170 170
171#define V_MC_REF_RATE_100MHz V_MC_REF_RATE(K_MC_REF_RATE_100MHz) 171#define V_MC_REF_RATE_100MHz V_MC_REF_RATE(K_MC_REF_RATE_100MHz)
172#define V_MC_REF_RATE_133MHz V_MC_REF_RATE(K_MC_REF_RATE_133MHz) 172#define V_MC_REF_RATE_133MHz V_MC_REF_RATE(K_MC_REF_RATE_133MHz)
@@ -228,7 +228,7 @@
228 V_MC_ADDR_DRIVE_DEFAULT | \ 228 V_MC_ADDR_DRIVE_DEFAULT | \
229 V_MC_DATA_DRIVE_DEFAULT | \ 229 V_MC_DATA_DRIVE_DEFAULT | \
230 V_MC_CLOCK_DRIVE_DEFAULT | \ 230 V_MC_CLOCK_DRIVE_DEFAULT | \
231 V_MC_REF_RATE_DEFAULT 231 V_MC_REF_RATE_DEFAULT
232 232
233 233
234 234
diff --git a/include/asm-mips/sibyte/sb1250_regs.h b/include/asm-mips/sibyte/sb1250_regs.h
index 5d496c6faba6..9db80cd13a79 100644
--- a/include/asm-mips/sibyte/sb1250_regs.h
+++ b/include/asm-mips/sibyte/sb1250_regs.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * Register Definitions File: sb1250_regs.h 4 * Register Definitions File: sb1250_regs.h
5 * 5 *
6 * This module contains the addresses of the on-chip peripherals 6 * This module contains the addresses of the on-chip peripherals
7 * on the SB1250. 7 * on the SB1250.
8 * 8 *
9 * SB1250 specification level: 01/02/2002 9 * SB1250 specification level: 01/02/2002
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -40,20 +40,20 @@
40 40
41/* ********************************************************************* 41/* *********************************************************************
42 * Some general notes: 42 * Some general notes:
43 * 43 *
44 * For the most part, when there is more than one peripheral 44 * For the most part, when there is more than one peripheral
45 * of the same type on the SOC, the constants below will be 45 * of the same type on the SOC, the constants below will be
46 * offsets from the base of each peripheral. For example, 46 * offsets from the base of each peripheral. For example,
47 * the MAC registers are described as offsets from the first 47 * the MAC registers are described as offsets from the first
48 * MAC register, and there will be a MAC_REGISTER() macro 48 * MAC register, and there will be a MAC_REGISTER() macro
49 * to calculate the base address of a given MAC. 49 * to calculate the base address of a given MAC.
50 * 50 *
51 * The information in this file is based on the SB1250 SOC 51 * The information in this file is based on the SB1250 SOC
52 * manual version 0.2, July 2000. 52 * manual version 0.2, July 2000.
53 ********************************************************************* */ 53 ********************************************************************* */
54 54
55 55
56/* ********************************************************************* 56/* *********************************************************************
57 * Memory Controller Registers 57 * Memory Controller Registers
58 ********************************************************************* */ 58 ********************************************************************* */
59 59
@@ -101,7 +101,7 @@
101#define R_MC_TEST_ECC 0x0000000420 101#define R_MC_TEST_ECC 0x0000000420
102#define R_MC_MCLK_CFG 0x0000000500 102#define R_MC_MCLK_CFG 0x0000000500
103 103
104/* ********************************************************************* 104/* *********************************************************************
105 * L2 Cache Control Registers 105 * L2 Cache Control Registers
106 ********************************************************************* */ 106 ********************************************************************* */
107 107
@@ -126,7 +126,7 @@
126#define A_L2_EEC_ADDRESS A_L2_ECC_TAG 126#define A_L2_EEC_ADDRESS A_L2_ECC_TAG
127 127
128 128
129/* ********************************************************************* 129/* *********************************************************************
130 * PCI Interface Registers 130 * PCI Interface Registers
131 ********************************************************************* */ 131 ********************************************************************* */
132 132
@@ -134,7 +134,7 @@
134#define A_PCI_TYPE01_HEADER 0x00DE000800 134#define A_PCI_TYPE01_HEADER 0x00DE000800
135 135
136 136
137/* ********************************************************************* 137/* *********************************************************************
138 * Ethernet DMA and MACs 138 * Ethernet DMA and MACs
139 ********************************************************************* */ 139 ********************************************************************* */
140 140
@@ -184,7 +184,7 @@
184 (R_MAC_DMA_CHANNEL_BASE(txrx,chan) + \ 184 (R_MAC_DMA_CHANNEL_BASE(txrx,chan) + \
185 (reg)) 185 (reg))
186 186
187/* 187/*
188 * DMA channel registers, relative to A_MAC_DMA_CHANNEL_BASE 188 * DMA channel registers, relative to A_MAC_DMA_CHANNEL_BASE
189 */ 189 */
190 190
@@ -259,7 +259,7 @@
259#define MAC_CHMAP_COUNT 4 259#define MAC_CHMAP_COUNT 4
260 260
261 261
262/* ********************************************************************* 262/* *********************************************************************
263 * DUART Registers 263 * DUART Registers
264 ********************************************************************* */ 264 ********************************************************************* */
265 265
@@ -363,7 +363,7 @@
363#endif /* 1250 PASS2 || 112x PASS1 */ 363#endif /* 1250 PASS2 || 112x PASS1 */
364 364
365 365
366/* ********************************************************************* 366/* *********************************************************************
367 * Synchronous Serial Registers 367 * Synchronous Serial Registers
368 ********************************************************************* */ 368 ********************************************************************* */
369 369
@@ -397,7 +397,7 @@
397 (reg)) 397 (reg))
398 398
399 399
400/* 400/*
401 * DMA channel registers, relative to A_SER_DMA_CHANNEL_BASE 401 * DMA channel registers, relative to A_SER_DMA_CHANNEL_BASE
402 */ 402 */
403 403
@@ -457,7 +457,7 @@
457#define R_SER_RMON_RX_ERRORS 0x000001F0 457#define R_SER_RMON_RX_ERRORS 0x000001F0
458#define R_SER_RMON_RX_BADADDR 0x000001F8 458#define R_SER_RMON_RX_BADADDR 0x000001F8
459 459
460/* ********************************************************************* 460/* *********************************************************************
461 * Generic Bus Registers 461 * Generic Bus Registers
462 ********************************************************************* */ 462 ********************************************************************* */
463 463
@@ -513,7 +513,7 @@
513#define R_IO_PCMCIA_CFG 0x0A60 513#define R_IO_PCMCIA_CFG 0x0A60
514#define R_IO_PCMCIA_STATUS 0x0A70 514#define R_IO_PCMCIA_STATUS 0x0A70
515 515
516/* ********************************************************************* 516/* *********************************************************************
517 * GPIO Registers 517 * GPIO Registers
518 ********************************************************************* */ 518 ********************************************************************* */
519 519
@@ -537,7 +537,7 @@
537#define R_GPIO_PIN_CLR 0x30 537#define R_GPIO_PIN_CLR 0x30
538#define R_GPIO_PIN_SET 0x38 538#define R_GPIO_PIN_SET 0x38
539 539
540/* ********************************************************************* 540/* *********************************************************************
541 * SMBus Registers 541 * SMBus Registers
542 ********************************************************************* */ 542 ********************************************************************* */
543 543
@@ -573,7 +573,7 @@
573#define R_SMB_CONTROL 0x0000000060 573#define R_SMB_CONTROL 0x0000000060
574#define R_SMB_PEC 0x0000000070 574#define R_SMB_PEC 0x0000000070
575 575
576/* ********************************************************************* 576/* *********************************************************************
577 * Timer Registers 577 * Timer Registers
578 ********************************************************************* */ 578 ********************************************************************* */
579 579
@@ -641,7 +641,7 @@
641#endif /* 1250 PASS2 || 112x PASS1 */ 641#endif /* 1250 PASS2 || 112x PASS1 */
642 642
643 643
644/* ********************************************************************* 644/* *********************************************************************
645 * System Control Registers 645 * System Control Registers
646 ********************************************************************* */ 646 ********************************************************************* */
647 647
@@ -649,7 +649,7 @@
649#define A_SCD_SYSTEM_CFG 0x0010020008 649#define A_SCD_SYSTEM_CFG 0x0010020008
650#define A_SCD_SYSTEM_MANUF 0x0010038000 650#define A_SCD_SYSTEM_MANUF 0x0010038000
651 651
652/* ********************************************************************* 652/* *********************************************************************
653 * System Address Trap Registers 653 * System Address Trap Registers
654 ********************************************************************* */ 654 ********************************************************************* */
655 655
@@ -672,7 +672,7 @@
672#endif /* 1250 PASS2 || 112x PASS1 */ 672#endif /* 1250 PASS2 || 112x PASS1 */
673 673
674 674
675/* ********************************************************************* 675/* *********************************************************************
676 * System Interrupt Mapper Registers 676 * System Interrupt Mapper Registers
677 ********************************************************************* */ 677 ********************************************************************* */
678 678
@@ -701,7 +701,7 @@
701#define R_IMR_INTERRUPT_MAP_BASE 0x0200 701#define R_IMR_INTERRUPT_MAP_BASE 0x0200
702#define R_IMR_INTERRUPT_MAP_COUNT 64 702#define R_IMR_INTERRUPT_MAP_COUNT 64
703 703
704/* ********************************************************************* 704/* *********************************************************************
705 * System Performance Counter Registers 705 * System Performance Counter Registers
706 ********************************************************************* */ 706 ********************************************************************* */
707 707
@@ -711,7 +711,7 @@
711#define A_SCD_PERF_CNT_2 0x00100204E0 711#define A_SCD_PERF_CNT_2 0x00100204E0
712#define A_SCD_PERF_CNT_3 0x00100204E8 712#define A_SCD_PERF_CNT_3 0x00100204E8
713 713
714/* ********************************************************************* 714/* *********************************************************************
715 * System Bus Watcher Registers 715 * System Bus Watcher Registers
716 ********************************************************************* */ 716 ********************************************************************* */
717 717
@@ -726,13 +726,13 @@
726#define A_BUS_L2_ERRORS 0x00100208C0 726#define A_BUS_L2_ERRORS 0x00100208C0
727#define A_BUS_MEM_IO_ERRORS 0x00100208C8 727#define A_BUS_MEM_IO_ERRORS 0x00100208C8
728 728
729/* ********************************************************************* 729/* *********************************************************************
730 * System Debug Controller Registers 730 * System Debug Controller Registers
731 ********************************************************************* */ 731 ********************************************************************* */
732 732
733#define A_SCD_JTAG_BASE 0x0010000000 733#define A_SCD_JTAG_BASE 0x0010000000
734 734
735/* ********************************************************************* 735/* *********************************************************************
736 * System Trace Buffer Registers 736 * System Trace Buffer Registers
737 ********************************************************************* */ 737 ********************************************************************* */
738 738
@@ -755,7 +755,7 @@
755#define A_SCD_TRACE_SEQUENCE_6 0x0010020A90 755#define A_SCD_TRACE_SEQUENCE_6 0x0010020A90
756#define A_SCD_TRACE_SEQUENCE_7 0x0010020A98 756#define A_SCD_TRACE_SEQUENCE_7 0x0010020A98
757 757
758/* ********************************************************************* 758/* *********************************************************************
759 * System Generic DMA Registers 759 * System Generic DMA Registers
760 ********************************************************************* */ 760 ********************************************************************* */
761 761
diff --git a/include/asm-mips/sibyte/sb1250_scd.h b/include/asm-mips/sibyte/sb1250_scd.h
index 22e8041959e2..dbbd682fb47e 100644
--- a/include/asm-mips/sibyte/sb1250_scd.h
+++ b/include/asm-mips/sibyte/sb1250_scd.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * SCD Constants and Macros File: sb1250_scd.h 4 * SCD Constants and Macros File: sb1250_scd.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the System Control and Debug module on the 1250. 7 * manipulating the System Control and Debug module on the 1250.
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -130,40 +130,40 @@
130/* System Manufacturing Register 130/* System Manufacturing Register
131* Register: SCD_SYSTEM_MANUF 131* Register: SCD_SYSTEM_MANUF
132*/ 132*/
133 133
134/* Wafer ID: bits 31:0 */ 134/* Wafer ID: bits 31:0 */
135#define S_SYS_WAFERID1_200 _SB_MAKE64(0) 135#define S_SYS_WAFERID1_200 _SB_MAKE64(0)
136#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200) 136#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200)
137#define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID1_200) 137#define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID1_200)
138#define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x,S_SYS_WAFERID1_200,M_SYS_WAFERID1_200) 138#define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x,S_SYS_WAFERID1_200,M_SYS_WAFERID1_200)
139 139
140#define S_SYS_BIN _SB_MAKE64(32) 140#define S_SYS_BIN _SB_MAKE64(32)
141#define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN) 141#define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN)
142#define V_SYS_BIN _SB_MAKEVALUE(x,S_SYS_BIN) 142#define V_SYS_BIN _SB_MAKEVALUE(x,S_SYS_BIN)
143#define G_SYS_BIN _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN) 143#define G_SYS_BIN _SB_GETVALUE(x,S_SYS_BIN,M_SYS_BIN)
144 144
145/* Wafer ID: bits 39:36 */ 145/* Wafer ID: bits 39:36 */
146#define S_SYS_WAFERID2_200 _SB_MAKE64(36) 146#define S_SYS_WAFERID2_200 _SB_MAKE64(36)
147#define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200) 147#define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200)
148#define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID2_200) 148#define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x,S_SYS_WAFERID2_200)
149#define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x,S_SYS_WAFERID2_200,M_SYS_WAFERID2_200) 149#define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x,S_SYS_WAFERID2_200,M_SYS_WAFERID2_200)
150 150
151/* Wafer ID: bits 39:0 */ 151/* Wafer ID: bits 39:0 */
152#define S_SYS_WAFERID_300 _SB_MAKE64(0) 152#define S_SYS_WAFERID_300 _SB_MAKE64(0)
153#define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300) 153#define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300)
154#define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x,S_SYS_WAFERID_300) 154#define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x,S_SYS_WAFERID_300)
155#define G_SYS_WAFERID_300(x) _SB_GETVALUE(x,S_SYS_WAFERID_300,M_SYS_WAFERID_300) 155#define G_SYS_WAFERID_300(x) _SB_GETVALUE(x,S_SYS_WAFERID_300,M_SYS_WAFERID_300)
156 156
157#define S_SYS_XPOS _SB_MAKE64(40) 157#define S_SYS_XPOS _SB_MAKE64(40)
158#define M_SYS_XPOS _SB_MAKEMASK(6,S_SYS_XPOS) 158#define M_SYS_XPOS _SB_MAKEMASK(6,S_SYS_XPOS)
159#define V_SYS_XPOS(x) _SB_MAKEVALUE(x,S_SYS_XPOS) 159#define V_SYS_XPOS(x) _SB_MAKEVALUE(x,S_SYS_XPOS)
160#define G_SYS_XPOS(x) _SB_GETVALUE(x,S_SYS_XPOS,M_SYS_XPOS) 160#define G_SYS_XPOS(x) _SB_GETVALUE(x,S_SYS_XPOS,M_SYS_XPOS)
161 161
162#define S_SYS_YPOS _SB_MAKE64(46) 162#define S_SYS_YPOS _SB_MAKE64(46)
163#define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS) 163#define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS)
164#define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS) 164#define V_SYS_YPOS(x) _SB_MAKEVALUE(x,S_SYS_YPOS)
165#define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS) 165#define G_SYS_YPOS(x) _SB_GETVALUE(x,S_SYS_YPOS,M_SYS_YPOS)
166 166
167/* 167/*
168 * System Config Register (Table 4-2) 168 * System Config Register (Table 4-2)
169 * Register: SCD_SYSTEM_CFG 169 * Register: SCD_SYSTEM_CFG
diff --git a/include/asm-mips/sibyte/sb1250_smbus.h b/include/asm-mips/sibyte/sb1250_smbus.h
index 287cbfe9efa2..335c53e92936 100644
--- a/include/asm-mips/sibyte/sb1250_smbus.h
+++ b/include/asm-mips/sibyte/sb1250_smbus.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * SMBUS Constants File: sb1250_smbus.h 4 * SMBUS Constants File: sb1250_smbus.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the SB1250's SMbus devices. 7 * manipulating the SB1250's SMbus devices.
8 * 8 *
9 * SB1250 specification level: 01/02/2002 9 * SB1250 specification level: 01/02/2002
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
diff --git a/include/asm-mips/sibyte/sb1250_syncser.h b/include/asm-mips/sibyte/sb1250_syncser.h
index 8d5e8edd3c4b..fa2760d38b8b 100644
--- a/include/asm-mips/sibyte/sb1250_syncser.h
+++ b/include/asm-mips/sibyte/sb1250_syncser.h
@@ -7,17 +7,17 @@
7 * manipulating the SB1250's Synchronous Serial 7 * manipulating the SB1250's Synchronous Serial
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
diff --git a/include/asm-mips/sibyte/sb1250_uart.h b/include/asm-mips/sibyte/sb1250_uart.h
index 7655d6945cca..923ea4f44e0f 100644
--- a/include/asm-mips/sibyte/sb1250_uart.h
+++ b/include/asm-mips/sibyte/sb1250_uart.h
@@ -1,23 +1,23 @@
1/* ********************************************************************* 1/* *********************************************************************
2 * SB1250 Board Support Package 2 * SB1250 Board Support Package
3 * 3 *
4 * UART Constants File: sb1250_uart.h 4 * UART Constants File: sb1250_uart.h
5 * 5 *
6 * This module contains constants and macros useful for 6 * This module contains constants and macros useful for
7 * manipulating the SB1250's UARTs 7 * manipulating the SB1250's UARTs
8 * 8 *
9 * SB1250 specification level: User's manual 1/02/02 9 * SB1250 specification level: User's manual 1/02/02
10 * 10 *
11 * Author: Mitch Lichtenberg 11 * Author: Mitch Lichtenberg
12 * 12 *
13 ********************************************************************* 13 *********************************************************************
14 * 14 *
15 * Copyright 2000,2001,2002,2003 15 * Copyright 2000,2001,2002,2003
16 * Broadcom Corporation. All rights reserved. 16 * Broadcom Corporation. All rights reserved.
17 * 17 *
18 * This program is free software; you can redistribute it and/or 18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as 19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of 20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version. 21 * the License, or (at your option) any later version.
22 * 22 *
23 * This program is distributed in the hope that it will be useful, 23 * This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
27 * 27 *
28 * You should have received a copy of the GNU General Public License 28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software 29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA 31 * MA 02111-1307 USA
32 ********************************************************************* */ 32 ********************************************************************* */
33 33
@@ -37,7 +37,7 @@
37 37
38#include "sb1250_defs.h" 38#include "sb1250_defs.h"
39 39
40/* ********************************************************************** 40/* **********************************************************************
41 * DUART Registers 41 * DUART Registers
42 ********************************************************************** */ 42 ********************************************************************** */
43 43
@@ -145,7 +145,7 @@
145#define V_DUART_MISC_CMD_START_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK) 145#define V_DUART_MISC_CMD_START_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK)
146#define V_DUART_MISC_CMD_STOP_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK) 146#define V_DUART_MISC_CMD_STOP_BREAK V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK)
147 147
148#define M_DUART_CMD_RESERVED _SB_MAKEMASK1(7) 148#define M_DUART_CMD_RESERVED _SB_MAKEMASK1(7)
149 149
150/* 150/*
151 * DUART Status Register (Table 10-6) 151 * DUART Status Register (Table 10-6)
@@ -165,7 +165,7 @@
165 165
166/* 166/*
167 * DUART Baud Rate Register (Table 10-7) 167 * DUART Baud Rate Register (Table 10-7)
168 * Register: DUART_CLK_SEL_A 168 * Register: DUART_CLK_SEL_A
169 * Register: DUART_CLK_SEL_B 169 * Register: DUART_CLK_SEL_B
170 */ 170 */
171 171
@@ -332,7 +332,7 @@
332 (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1) 332 (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1)
333 333
334#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) 334#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
335/* 335/*
336 * Full Interrupt Control Register 336 * Full Interrupt Control Register
337 */ 337 */
338 338
diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
index 18939e84b6f2..f7fbebaa0744 100644
--- a/include/asm-mips/sigcontext.h
+++ b/include/asm-mips/sigcontext.h
@@ -10,7 +10,7 @@
10#define _ASM_SIGCONTEXT_H 10#define _ASM_SIGCONTEXT_H
11 11
12#include <asm/sgidefs.h> 12#include <asm/sgidefs.h>
13 13
14#if _MIPS_SIM == _MIPS_SIM_ABI32 14#if _MIPS_SIM == _MIPS_SIM_ABI32
15 15
16/* 16/*
@@ -38,7 +38,7 @@ struct sigcontext {
38}; 38};
39 39
40#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 40#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
41 41
42#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 42#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
43 43
44/* 44/*
diff --git a/include/asm-mips/siginfo.h b/include/asm-mips/siginfo.h
index a0e26e6c994d..698becab5a9e 100644
--- a/include/asm-mips/siginfo.h
+++ b/include/asm-mips/siginfo.h
@@ -25,10 +25,10 @@ struct siginfo;
25/* 25/*
26 * Careful to keep union _sifields from shifting ... 26 * Careful to keep union _sifields from shifting ...
27 */ 27 */
28#ifdef CONFIG_MIPS32 28#ifdef CONFIG_32BIT
29#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int)) 29#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
30#endif 30#endif
31#ifdef CONFIG_MIPS64 31#ifdef CONFIG_64BIT
32#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) 32#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
33#endif 33#endif
34 34
diff --git a/include/asm-mips/sim.h b/include/asm-mips/sim.h
index 6333169be329..3ccfe09fa744 100644
--- a/include/asm-mips/sim.h
+++ b/include/asm-mips/sim.h
@@ -16,7 +16,7 @@
16#define __str2(x) #x 16#define __str2(x) #x
17#define __str(x) __str2(x) 17#define __str(x) __str2(x)
18 18
19#ifdef CONFIG_MIPS32 19#ifdef CONFIG_32BIT
20 20
21#define save_static_function(symbol) \ 21#define save_static_function(symbol) \
22__asm__ ( \ 22__asm__ ( \
@@ -42,9 +42,9 @@ __asm__ ( \
42 42
43#define nabi_no_regargs 43#define nabi_no_regargs
44 44
45#endif /* CONFIG_MIPS32 */ 45#endif /* CONFIG_32BIT */
46 46
47#ifdef CONFIG_MIPS64 47#ifdef CONFIG_64BIT
48 48
49#define save_static_function(symbol) \ 49#define save_static_function(symbol) \
50__asm__ ( \ 50__asm__ ( \
@@ -78,6 +78,6 @@ __asm__ ( \
78 unsigned long __dummy6, \ 78 unsigned long __dummy6, \
79 unsigned long __dummy7, 79 unsigned long __dummy7,
80 80
81#endif /* CONFIG_MIPS64 */ 81#endif /* CONFIG_64BIT */
82 82
83#endif /* _ASM_SIM_H */ 83#endif /* _ASM_SIM_H */
diff --git a/include/asm-mips/socket.h b/include/asm-mips/socket.h
index d478a86294ee..753b6620e6fa 100644
--- a/include/asm-mips/socket.h
+++ b/include/asm-mips/socket.h
@@ -82,7 +82,7 @@ To add: #define SO_REUSEPORT 0x0200 /* Allow local address and port reuse. */
82 * @SOCK_STREAM - stream (connection) socket 82 * @SOCK_STREAM - stream (connection) socket
83 * @SOCK_RAW - raw socket 83 * @SOCK_RAW - raw socket
84 * @SOCK_RDM - reliably-delivered message 84 * @SOCK_RDM - reliably-delivered message
85 * @SOCK_SEQPACKET - sequential packet socket 85 * @SOCK_SEQPACKET - sequential packet socket
86 * @SOCK_PACKET - linux specific way of getting packets at the dev level. 86 * @SOCK_PACKET - linux specific way of getting packets at the dev level.
87 * For writing rarp and other similar things on the user level. 87 * For writing rarp and other similar things on the user level.
88 */ 88 */
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 86283c25fd5b..fb42f99f8527 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -26,7 +26,7 @@
26 26
27 .macro SAVE_TEMP 27 .macro SAVE_TEMP
28 mfhi v1 28 mfhi v1
29#ifdef CONFIG_MIPS32 29#ifdef CONFIG_32BIT
30 LONG_S $8, PT_R8(sp) 30 LONG_S $8, PT_R8(sp)
31 LONG_S $9, PT_R9(sp) 31 LONG_S $9, PT_R9(sp)
32#endif 32#endif
@@ -56,7 +56,7 @@
56 56
57#ifdef CONFIG_SMP 57#ifdef CONFIG_SMP
58 .macro get_saved_sp /* SMP variation */ 58 .macro get_saved_sp /* SMP variation */
59#ifdef CONFIG_MIPS32 59#ifdef CONFIG_32BIT
60 mfc0 k0, CP0_CONTEXT 60 mfc0 k0, CP0_CONTEXT
61 lui k1, %hi(kernelsp) 61 lui k1, %hi(kernelsp)
62 srl k0, k0, 23 62 srl k0, k0, 23
@@ -64,7 +64,7 @@
64 addu k1, k0 64 addu k1, k0
65 LONG_L k1, %lo(kernelsp)(k1) 65 LONG_L k1, %lo(kernelsp)(k1)
66#endif 66#endif
67#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) 67#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
68 MFC0 k1, CP0_CONTEXT 68 MFC0 k1, CP0_CONTEXT
69 dsra k1, 23 69 dsra k1, 23
70 lui k0, %hi(pgd_current) 70 lui k0, %hi(pgd_current)
@@ -74,7 +74,7 @@
74 daddu k1, k0 74 daddu k1, k0
75 LONG_L k1, %lo(kernelsp)(k1) 75 LONG_L k1, %lo(kernelsp)(k1)
76#endif 76#endif
77#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) 77#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
78 MFC0 k1, CP0_CONTEXT 78 MFC0 k1, CP0_CONTEXT
79 dsrl k1, 23 79 dsrl k1, 23
80 dsll k1, k1, 3 80 dsll k1, k1, 3
@@ -83,20 +83,20 @@
83 .endm 83 .endm
84 84
85 .macro set_saved_sp stackp temp temp2 85 .macro set_saved_sp stackp temp temp2
86#ifdef CONFIG_MIPS32 86#ifdef CONFIG_32BIT
87 mfc0 \temp, CP0_CONTEXT 87 mfc0 \temp, CP0_CONTEXT
88 srl \temp, 23 88 srl \temp, 23
89 sll \temp, 2 89 sll \temp, 2
90 LONG_S \stackp, kernelsp(\temp) 90 LONG_S \stackp, kernelsp(\temp)
91#endif 91#endif
92#if defined(CONFIG_MIPS64) && !defined(CONFIG_BUILD_ELF64) 92#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
93 lw \temp, TI_CPU(gp) 93 lw \temp, TI_CPU(gp)
94 dsll \temp, 3 94 dsll \temp, 3
95 lui \temp2, %hi(kernelsp) 95 lui \temp2, %hi(kernelsp)
96 daddu \temp, \temp2 96 daddu \temp, \temp2
97 LONG_S \stackp, %lo(kernelsp)(\temp) 97 LONG_S \stackp, %lo(kernelsp)(\temp)
98#endif 98#endif
99#if defined(CONFIG_MIPS64) && defined(CONFIG_BUILD_ELF64) 99#if defined(CONFIG_64BIT) && defined(CONFIG_BUILD_ELF64)
100 lw \temp, TI_CPU(gp) 100 lw \temp, TI_CPU(gp)
101 dsll \temp, 3 101 dsll \temp, 3
102 LONG_S \stackp, kernelsp(\temp) 102 LONG_S \stackp, kernelsp(\temp)
@@ -140,7 +140,7 @@
140 LONG_S $6, PT_R6(sp) 140 LONG_S $6, PT_R6(sp)
141 MFC0 v1, CP0_EPC 141 MFC0 v1, CP0_EPC
142 LONG_S $7, PT_R7(sp) 142 LONG_S $7, PT_R7(sp)
143#ifdef CONFIG_MIPS64 143#ifdef CONFIG_64BIT
144 LONG_S $8, PT_R8(sp) 144 LONG_S $8, PT_R8(sp)
145 LONG_S $9, PT_R9(sp) 145 LONG_S $9, PT_R9(sp)
146#endif 146#endif
@@ -169,7 +169,7 @@
169 169
170 .macro RESTORE_TEMP 170 .macro RESTORE_TEMP
171 LONG_L $24, PT_LO(sp) 171 LONG_L $24, PT_LO(sp)
172#ifdef CONFIG_MIPS32 172#ifdef CONFIG_32BIT
173 LONG_L $8, PT_R8(sp) 173 LONG_L $8, PT_R8(sp)
174 LONG_L $9, PT_R9(sp) 174 LONG_L $9, PT_R9(sp)
175#endif 175#endif
@@ -217,7 +217,7 @@
217 LONG_L $31, PT_R31(sp) 217 LONG_L $31, PT_R31(sp)
218 LONG_L $28, PT_R28(sp) 218 LONG_L $28, PT_R28(sp)
219 LONG_L $25, PT_R25(sp) 219 LONG_L $25, PT_R25(sp)
220#ifdef CONFIG_MIPS64 220#ifdef CONFIG_64BIT
221 LONG_L $8, PT_R8(sp) 221 LONG_L $8, PT_R8(sp)
222 LONG_L $9, PT_R9(sp) 222 LONG_L $9, PT_R9(sp)
223#endif 223#endif
@@ -262,7 +262,7 @@
262 LONG_L $31, PT_R31(sp) 262 LONG_L $31, PT_R31(sp)
263 LONG_L $28, PT_R28(sp) 263 LONG_L $28, PT_R28(sp)
264 LONG_L $25, PT_R25(sp) 264 LONG_L $25, PT_R25(sp)
265#ifdef CONFIG_MIPS64 265#ifdef CONFIG_64BIT
266 LONG_L $8, PT_R8(sp) 266 LONG_L $8, PT_R8(sp)
267 LONG_L $9, PT_R9(sp) 267 LONG_L $9, PT_R9(sp)
268#endif 268#endif
diff --git a/include/asm-mips/statfs.h b/include/asm-mips/statfs.h
index 5076fec65780..c3ddf973c1c0 100644
--- a/include/asm-mips/statfs.h
+++ b/include/asm-mips/statfs.h
@@ -57,7 +57,7 @@ struct statfs64 {
57}; 57};
58 58
59#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 59#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
60 60
61#if _MIPS_SIM == _MIPS_SIM_ABI64 61#if _MIPS_SIM == _MIPS_SIM_ABI64
62 62
63struct statfs64 { /* Same as struct statfs */ 63struct statfs64 { /* Same as struct statfs */
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index b18345504f8a..5a06f6d13899 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -16,7 +16,7 @@
16 * Most of the inline functions are rather naive implementations so I just 16 * Most of the inline functions are rather naive implementations so I just
17 * didn't bother updating them for 64-bit ... 17 * didn't bother updating them for 64-bit ...
18 */ 18 */
19#ifdef CONFIG_MIPS32 19#ifdef CONFIG_32BIT
20 20
21#ifndef IN_STRING_C 21#ifndef IN_STRING_C
22 22
@@ -130,7 +130,7 @@ strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
130 130
131 return __res; 131 return __res;
132} 132}
133#endif /* CONFIG_MIPS32 */ 133#endif /* CONFIG_32BIT */
134 134
135#define __HAVE_ARCH_MEMSET 135#define __HAVE_ARCH_MEMSET
136extern void *memset(void *__s, int __c, size_t __count); 136extern void *memset(void *__s, int __c, size_t __count);
@@ -141,7 +141,7 @@ extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
141#define __HAVE_ARCH_MEMMOVE 141#define __HAVE_ARCH_MEMMOVE
142extern void *memmove(void *__dest, __const__ void *__src, size_t __n); 142extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
143 143
144#ifdef CONFIG_MIPS32 144#ifdef CONFIG_32BIT
145#define __HAVE_ARCH_MEMSCAN 145#define __HAVE_ARCH_MEMSCAN
146static __inline__ void *memscan(void *__addr, int __c, size_t __size) 146static __inline__ void *memscan(void *__addr, int __c, size_t __size)
147{ 147{
@@ -161,6 +161,6 @@ static __inline__ void *memscan(void *__addr, int __c, size_t __size)
161 161
162 return __addr; 162 return __addr;
163} 163}
164#endif /* CONFIG_MIPS32 */ 164#endif /* CONFIG_32BIT */
165 165
166#endif /* _ASM_STRING_H */ 166#endif /* _ASM_STRING_H */
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 169f3d4265b1..6663efd49b27 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -208,7 +208,7 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
208 return retval; 208 return retval;
209} 209}
210 210
211#ifdef CONFIG_MIPS64 211#ifdef CONFIG_64BIT
212static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) 212static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
213{ 213{
214 __u64 retval; 214 __u64 retval;
@@ -330,7 +330,7 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
330 return retval; 330 return retval;
331} 331}
332 332
333#ifdef CONFIG_MIPS64 333#ifdef CONFIG_64BIT
334static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, 334static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
335 unsigned long new) 335 unsigned long new)
336{ 336{
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index 42fcd6f2c206..a70cb0854c8a 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -62,10 +62,10 @@ register struct thread_info *__current_thread_info __asm__("$28");
62#define current_thread_info() __current_thread_info 62#define current_thread_info() __current_thread_info
63 63
64/* thread information allocation */ 64/* thread information allocation */
65#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS32) 65#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
66#define THREAD_SIZE_ORDER (1) 66#define THREAD_SIZE_ORDER (1)
67#endif 67#endif
68#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS64) 68#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
69#define THREAD_SIZE_ORDER (2) 69#define THREAD_SIZE_ORDER (2)
70#endif 70#endif
71#ifdef CONFIG_PAGE_SIZE_8KB 71#ifdef CONFIG_PAGE_SIZE_8KB
diff --git a/include/asm-mips/titan_dep.h b/include/asm-mips/titan_dep.h
index fd9599e40a0a..fee1908c65d2 100644
--- a/include/asm-mips/titan_dep.h
+++ b/include/asm-mips/titan_dep.h
@@ -228,4 +228,4 @@ extern unsigned long ocd_base;
228#define RM9K_READ_8(ofs, val) *(val) = *(volatile u8 *)(RM9000x2_BASE_ADDR+ofs) 228#define RM9K_READ_8(ofs, val) *(val) = *(volatile u8 *)(RM9000x2_BASE_ADDR+ofs)
229#define RM9K_READ_16(ofs, val) *(val) = *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs) 229#define RM9K_READ_16(ofs, val) *(val) = *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs)
230 230
231#endif 231#endif
diff --git a/include/asm-mips/tx4927/tx4927.h b/include/asm-mips/tx4927/tx4927.h
index 5d939db6e220..3bb7f0087d68 100644
--- a/include/asm-mips/tx4927/tx4927.h
+++ b/include/asm-mips/tx4927/tx4927.h
@@ -45,14 +45,14 @@
45 45
46 46
47/* TX4927 SDRAM controller (64-bit registers) */ 47/* TX4927 SDRAM controller (64-bit registers) */
48#define TX4927_SDRAMC_BASE 0x8000 48#define TX4927_SDRAMC_BASE 0x8000
49#define TX4927_SDRAMC_SDCCR0 0x8000 49#define TX4927_SDRAMC_SDCCR0 0x8000
50#define TX4927_SDRAMC_SDCCR1 0x8008 50#define TX4927_SDRAMC_SDCCR1 0x8008
51#define TX4927_SDRAMC_SDCCR2 0x8010 51#define TX4927_SDRAMC_SDCCR2 0x8010
52#define TX4927_SDRAMC_SDCCR3 0x8018 52#define TX4927_SDRAMC_SDCCR3 0x8018
53#define TX4927_SDRAMC_SDCTR 0x8040 53#define TX4927_SDRAMC_SDCTR 0x8040
54#define TX4927_SDRAMC_SDCMD 0x8058 54#define TX4927_SDRAMC_SDCMD 0x8058
55#define TX4927_SDRAMC_LIMIT 0x8fff 55#define TX4927_SDRAMC_LIMIT 0x8fff
56 56
57 57
58/* TX4927 external bus controller (64-bit registers) */ 58/* TX4927 external bus controller (64-bit registers) */
@@ -289,8 +289,8 @@
289 289
290 290
291/* TX4927 serial port 0 (32-bit registers) */ 291/* TX4927 serial port 0 (32-bit registers) */
292#define TX4927_SIO0_BASE 0xf300 292#define TX4927_SIO0_BASE 0xf300
293#define TX4927_SIO0_SILCR0 0xf300 293#define TX4927_SIO0_SILCR0 0xf300
294#define TX4927_SIO0_SILCR0_RESERVED_16_31 BM_16_31 294#define TX4927_SIO0_SILCR0_RESERVED_16_31 BM_16_31
295#define TX4927_SIO0_SILCR0_RWUB BM_15_15 295#define TX4927_SIO0_SILCR0_RWUB BM_15_15
296#define TX4927_SIO0_SILCR0_TWUB BM_14_14 296#define TX4927_SIO0_SILCR0_TWUB BM_14_14
@@ -309,7 +309,7 @@
309#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT (~BM_00_01) 309#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT (~BM_00_01)
310#define TX4927_SIO0_SILCR0_UMODE_DATA_8_BIT_MC BM_01_01 310#define TX4927_SIO0_SILCR0_UMODE_DATA_8_BIT_MC BM_01_01
311#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT_MC BM_00_01 311#define TX4927_SIO0_SILCR0_UMODE_DATA_7_BIT_MC BM_00_01
312#define TX4927_SIO0_SIDICR0 0xf304 312#define TX4927_SIO0_SIDICR0 0xf304
313#define TX4927_SIO0_SIDICR0_RESERVED_16_31 BM_16_31 313#define TX4927_SIO0_SIDICR0_RESERVED_16_31 BM_16_31
314#define TX4927_SIO0_SIDICR0_TDE BM_15_15 314#define TX4927_SIO0_SIDICR0_TDE BM_15_15
315#define TX4927_SIO0_SIDICR0_RDE BM_14_14 315#define TX4927_SIO0_SIDICR0_RDE BM_14_14
@@ -330,7 +330,7 @@
330#define TX4927_SIO0_SIDICR0_STIE_TRDY BM_02_02 330#define TX4927_SIO0_SIDICR0_STIE_TRDY BM_02_02
331#define TX4927_SIO0_SIDICR0_STIE_TXALS BM_01_01 331#define TX4927_SIO0_SIDICR0_STIE_TXALS BM_01_01
332#define TX4927_SIO0_SIDICR0_STIE_UBRKD BM_00_00 332#define TX4927_SIO0_SIDICR0_STIE_UBRKD BM_00_00
333#define TX4927_SIO0_SIDISR0 0xf308 333#define TX4927_SIO0_SIDISR0 0xf308
334#define TX4927_SIO0_SIDISR0_RESERVED_16_31 BM_16_31 334#define TX4927_SIO0_SIDISR0_RESERVED_16_31 BM_16_31
335#define TX4927_SIO0_SIDISR0_UBRK BM_15_15 335#define TX4927_SIO0_SIDISR0_UBRK BM_15_15
336#define TX4927_SIO0_SIDISR0_UVALID BM_14_14 336#define TX4927_SIO0_SIDISR0_UVALID BM_14_14
@@ -344,7 +344,7 @@
344#define TX4927_SIO0_SIDISR0_STIS BM_06_06 344#define TX4927_SIO0_SIDISR0_STIS BM_06_06
345#define TX4927_SIO0_SIDISR0_RESERVED_05_05 BM_05_05 345#define TX4927_SIO0_SIDISR0_RESERVED_05_05 BM_05_05
346#define TX4927_SIO0_SIDISR0_RFDN BM_00_04 346#define TX4927_SIO0_SIDISR0_RFDN BM_00_04
347#define TX4927_SIO0_SISCISR0 0xf30c 347#define TX4927_SIO0_SISCISR0 0xf30c
348#define TX4927_SIO0_SISCISR0_RESERVED_06_31 BM_06_31 348#define TX4927_SIO0_SISCISR0_RESERVED_06_31 BM_06_31
349#define TX4927_SIO0_SISCISR0_OERS BM_05_05 349#define TX4927_SIO0_SISCISR0_OERS BM_05_05
350#define TX4927_SIO0_SISCISR0_CTSS BM_04_04 350#define TX4927_SIO0_SISCISR0_CTSS BM_04_04
@@ -352,7 +352,7 @@
352#define TX4927_SIO0_SISCISR0_TRDY BM_02_02 352#define TX4927_SIO0_SISCISR0_TRDY BM_02_02
353#define TX4927_SIO0_SISCISR0_TXALS BM_01_01 353#define TX4927_SIO0_SISCISR0_TXALS BM_01_01
354#define TX4927_SIO0_SISCISR0_UBRKD BM_00_00 354#define TX4927_SIO0_SISCISR0_UBRKD BM_00_00
355#define TX4927_SIO0_SIFCR0 0xf310 355#define TX4927_SIO0_SIFCR0 0xf310
356#define TX4927_SIO0_SIFCR0_RESERVED_16_31 BM_16_31 356#define TX4927_SIO0_SIFCR0_RESERVED_16_31 BM_16_31
357#define TX4927_SIO0_SIFCR0_SWRST BM_16_31 357#define TX4927_SIO0_SIFCR0_SWRST BM_16_31
358#define TX4927_SIO0_SIFCR0_RESERVED_09_14 BM_09_14 358#define TX4927_SIO0_SIFCR0_RESERVED_09_14 BM_09_14
@@ -370,7 +370,7 @@
370#define TX4927_SIO0_SIFCR0_TFRST BM_02_02 370#define TX4927_SIO0_SIFCR0_TFRST BM_02_02
371#define TX4927_SIO0_SIFCR0_RFRST BM_01_01 371#define TX4927_SIO0_SIFCR0_RFRST BM_01_01
372#define TX4927_SIO0_SIFCR0_FRSTE BM_00_00 372#define TX4927_SIO0_SIFCR0_FRSTE BM_00_00
373#define TX4927_SIO0_SIFLCR0 0xf314 373#define TX4927_SIO0_SIFLCR0 0xf314
374#define TX4927_SIO0_SIFLCR0_RESERVED_13_31 BM_13_31 374#define TX4927_SIO0_SIFLCR0_RESERVED_13_31 BM_13_31
375#define TX4927_SIO0_SIFLCR0_RCS BM_12_12 375#define TX4927_SIO0_SIFLCR0_RCS BM_12_12
376#define TX4927_SIO0_SIFLCR0_TES BM_11_11 376#define TX4927_SIO0_SIFLCR0_TES BM_11_11
@@ -381,7 +381,7 @@
381#define TX4927_SIO0_SIFLCR0_RESERVED_05_06 BM_05_06 381#define TX4927_SIO0_SIFLCR0_RESERVED_05_06 BM_05_06
382#define TX4927_SIO0_SIFLCR0_RTSTL BM_01_04 382#define TX4927_SIO0_SIFLCR0_RTSTL BM_01_04
383#define TX4927_SIO0_SIFLCR0_TBRK BM_00_00 383#define TX4927_SIO0_SIFLCR0_TBRK BM_00_00
384#define TX4927_SIO0_SIBGR0 0xf318 384#define TX4927_SIO0_SIBGR0 0xf318
385#define TX4927_SIO0_SIBGR0_RESERVED_10_31 BM_10_31 385#define TX4927_SIO0_SIBGR0_RESERVED_10_31 BM_10_31
386#define TX4927_SIO0_SIBGR0_BCLK BM_08_09 386#define TX4927_SIO0_SIBGR0_BCLK BM_08_09
387#define TX4927_SIO0_SIBGR0_BCLK_T0 (~BM_08_09) 387#define TX4927_SIO0_SIBGR0_BCLK_T0 (~BM_08_09)
@@ -389,28 +389,28 @@
389#define TX4927_SIO0_SIBGR0_BCLK_T4 BM_09_09 389#define TX4927_SIO0_SIBGR0_BCLK_T4 BM_09_09
390#define TX4927_SIO0_SIBGR0_BCLK_T6 BM_08_09 390#define TX4927_SIO0_SIBGR0_BCLK_T6 BM_08_09
391#define TX4927_SIO0_SIBGR0_BRD BM_00_07 391#define TX4927_SIO0_SIBGR0_BRD BM_00_07
392#define TX4927_SIO0_SITFIF00 0xf31c 392#define TX4927_SIO0_SITFIF00 0xf31c
393#define TX4927_SIO0_SITFIF00_RESERVED_08_31 BM_08_31 393#define TX4927_SIO0_SITFIF00_RESERVED_08_31 BM_08_31
394#define TX4927_SIO0_SITFIF00_TXD BM_00_07 394#define TX4927_SIO0_SITFIF00_TXD BM_00_07
395#define TX4927_SIO0_SIRFIFO0 0xf320 395#define TX4927_SIO0_SIRFIFO0 0xf320
396#define TX4927_SIO0_SIRFIFO0_RESERVED_08_31 BM_08_31 396#define TX4927_SIO0_SIRFIFO0_RESERVED_08_31 BM_08_31
397#define TX4927_SIO0_SIRFIFO0_RXD BM_00_07 397#define TX4927_SIO0_SIRFIFO0_RXD BM_00_07
398#define TX4927_SIO0_SIRFIFO0 0xf320 398#define TX4927_SIO0_SIRFIFO0 0xf320
399#define TX4927_SIO0_LIMIT 0xf3ff 399#define TX4927_SIO0_LIMIT 0xf3ff
400 400
401 401
402/* TX4927 serial port 1 (32-bit registers) */ 402/* TX4927 serial port 1 (32-bit registers) */
403#define TX4927_SIO1_BASE 0xf400 403#define TX4927_SIO1_BASE 0xf400
404#define TX4927_SIO1_SILCR1 0xf400 404#define TX4927_SIO1_SILCR1 0xf400
405#define TX4927_SIO1_SIDICR1 0xf404 405#define TX4927_SIO1_SIDICR1 0xf404
406#define TX4927_SIO1_SIDISR1 0xf408 406#define TX4927_SIO1_SIDISR1 0xf408
407#define TX4927_SIO1_SISCISR1 0xf40c 407#define TX4927_SIO1_SISCISR1 0xf40c
408#define TX4927_SIO1_SIFCR1 0xf410 408#define TX4927_SIO1_SIFCR1 0xf410
409#define TX4927_SIO1_SIFLCR1 0xf414 409#define TX4927_SIO1_SIFLCR1 0xf414
410#define TX4927_SIO1_SIBGR1 0xf418 410#define TX4927_SIO1_SIBGR1 0xf418
411#define TX4927_SIO1_SITFIF01 0xf41c 411#define TX4927_SIO1_SITFIF01 0xf41c
412#define TX4927_SIO1_SIRFIFO1 0xf420 412#define TX4927_SIO1_SIRFIFO1 0xf420
413#define TX4927_SIO1_LIMIT 0xf4ff 413#define TX4927_SIO1_LIMIT 0xf4ff
414 414
415 415
416/* TX4927 parallel port (32-bit registers) */ 416/* TX4927 parallel port (32-bit registers) */
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
index 170433492246..165f6b8b217f 100644
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ b/include/asm-mips/tx4927/tx4927_pci.h
@@ -5,8 +5,8 @@
5 * 5 *
6 * Copyright (C) 2000-2001 Toshiba Corporation 6 * Copyright (C) 2000-2001 Toshiba Corporation
7 */ 7 */
8#ifndef __ASM_TX4927_TX4927_PCI_H 8#ifndef __ASM_TX4927_TX4927_PCI_H
9#define __ASM_TX4927_TX4927_PCI_H 9#define __ASM_TX4927_TX4927_PCI_H
10 10
11#define TX4927_CCFG_TOE 0x00004000 11#define TX4927_CCFG_TOE 0x00004000
12 12
diff --git a/include/asm-mips/types.h b/include/asm-mips/types.h
index d2f0c76b00a9..421b3aea14cc 100644
--- a/include/asm-mips/types.h
+++ b/include/asm-mips/types.h
@@ -78,7 +78,7 @@ typedef unsigned long long u64;
78#endif 78#endif
79 79
80#if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \ 80#if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \
81 || defined(CONFIG_MIPS64) 81 || defined(CONFIG_64BIT)
82typedef u64 dma_addr_t; 82typedef u64 dma_addr_t;
83#else 83#else
84typedef u32 dma_addr_t; 84typedef u32 dma_addr_t;
@@ -99,8 +99,6 @@ typedef u64 sector_t;
99#define HAVE_SECTOR_T 99#define HAVE_SECTOR_T
100#endif 100#endif
101 101
102typedef unsigned short kmem_bufctl_t;
103
104#endif /* __ASSEMBLY__ */ 102#endif /* __ASSEMBLY__ */
105 103
106#endif /* __KERNEL__ */ 104#endif /* __KERNEL__ */
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h
index 07114898e065..a543ead72ecf 100644
--- a/include/asm-mips/uaccess.h
+++ b/include/asm-mips/uaccess.h
@@ -22,7 +22,7 @@
22 * 22 *
23 * For historical reasons, these macros are grossly misnamed. 23 * For historical reasons, these macros are grossly misnamed.
24 */ 24 */
25#ifdef CONFIG_MIPS32 25#ifdef CONFIG_32BIT
26 26
27#define __UA_LIMIT 0x80000000UL 27#define __UA_LIMIT 0x80000000UL
28 28
@@ -32,9 +32,9 @@
32#define __UA_t0 "$8" 32#define __UA_t0 "$8"
33#define __UA_t1 "$9" 33#define __UA_t1 "$9"
34 34
35#endif /* CONFIG_MIPS32 */ 35#endif /* CONFIG_32BIT */
36 36
37#ifdef CONFIG_MIPS64 37#ifdef CONFIG_64BIT
38 38
39#define __UA_LIMIT (- TASK_SIZE) 39#define __UA_LIMIT (- TASK_SIZE)
40 40
@@ -44,7 +44,7 @@
44#define __UA_t0 "$12" 44#define __UA_t0 "$12"
45#define __UA_t1 "$13" 45#define __UA_t1 "$13"
46 46
47#endif /* CONFIG_MIPS64 */ 47#endif /* CONFIG_64BIT */
48 48
49/* 49/*
50 * USER_DS is a bitmask that has the bits set that may not be set in a valid 50 * USER_DS is a bitmask that has the bits set that may not be set in a valid
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index 6d21cc964f76..ad4d48056307 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -1124,7 +1124,7 @@ type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
1124# ifndef __mips64 1124# ifndef __mips64
1125# define __ARCH_WANT_STAT64 1125# define __ARCH_WANT_STAT64
1126# endif 1126# endif
1127# ifdef CONFIG_MIPS32 1127# ifdef CONFIG_32BIT
1128# define __ARCH_WANT_SYS_TIME 1128# define __ARCH_WANT_SYS_TIME
1129# endif 1129# endif
1130# ifdef CONFIG_MIPS32_O32 1130# ifdef CONFIG_MIPS32_O32
diff --git a/include/asm-mips/vr4181/irq.h b/include/asm-mips/vr4181/irq.h
deleted file mode 100644
index 4bf0ea970ed0..000000000000
--- a/include/asm-mips/vr4181/irq.h
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * Macros for vr4181 IRQ numbers.
3 *
4 * Copyright (C) 2001 MontaVista Software Inc.
5 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14/*
15 * Strategy:
16 *
17 * Vr4181 has conceptually three levels of interrupt controllers:
18 * 1. the CPU itself with 8 intr level.
19 * 2. system interrupt controller, cascaded from int0 pin in CPU, 32 intrs
20 * 3. GPIO interrupts : forwarding external interrupts to sys intr controller
21 */
22
23/* decide the irq block assignment */
24#define VR4181_NUM_CPU_IRQ 8
25#define VR4181_NUM_SYS_IRQ 32
26#define VR4181_NUM_GPIO_IRQ 16
27
28#define VR4181_IRQ_BASE 0
29
30#define VR4181_CPU_IRQ_BASE VR4181_IRQ_BASE
31#define VR4181_SYS_IRQ_BASE (VR4181_CPU_IRQ_BASE + VR4181_NUM_CPU_IRQ)
32#define VR4181_GPIO_IRQ_BASE (VR4181_SYS_IRQ_BASE + VR4181_NUM_SYS_IRQ)
33
34/* CPU interrupts */
35
36/*
37 IP0 - Software interrupt
38 IP1 - Software interrupt
39 IP2 - All but battery, high speed modem, and real time clock
40 IP3 - RTC Long1 (system timer)
41 IP4 - RTC Long2
42 IP5 - High Speed Modem (unused on VR4181)
43 IP6 - Unused
44 IP7 - Timer interrupt from CPO_COMPARE
45*/
46
47#define VR4181_IRQ_SW1 (VR4181_CPU_IRQ_BASE + 0)
48#define VR4181_IRQ_SW2 (VR4181_CPU_IRQ_BASE + 1)
49#define VR4181_IRQ_INT0 (VR4181_CPU_IRQ_BASE + 2)
50#define VR4181_IRQ_INT1 (VR4181_CPU_IRQ_BASE + 3)
51#define VR4181_IRQ_INT2 (VR4181_CPU_IRQ_BASE + 4)
52#define VR4181_IRQ_INT3 (VR4181_CPU_IRQ_BASE + 5)
53#define VR4181_IRQ_INT4 (VR4181_CPU_IRQ_BASE + 6)
54#define VR4181_IRQ_TIMER (VR4181_CPU_IRQ_BASE + 7)
55
56
57/* Cascaded from VR4181_IRQ_INT0 (ICU mapped interrupts) */
58
59/*
60 IP2 - same as VR4181_IRQ_INT1
61 IP8 - This is a cascade to GPIO IRQ's. Do not use.
62 IP16 - same as VR4181_IRQ_INT2
63 IP18 - CompactFlash
64*/
65
66#define VR4181_IRQ_BATTERY (VR4181_SYS_IRQ_BASE + 0)
67#define VR4181_IRQ_POWER (VR4181_SYS_IRQ_BASE + 1)
68#define VR4181_IRQ_RTCL1 (VR4181_SYS_IRQ_BASE + 2)
69#define VR4181_IRQ_ETIMER (VR4181_SYS_IRQ_BASE + 3)
70#define VR4181_IRQ_RFU12 (VR4181_SYS_IRQ_BASE + 4)
71#define VR4181_IRQ_PIU (VR4181_SYS_IRQ_BASE + 5)
72#define VR4181_IRQ_AIU (VR4181_SYS_IRQ_BASE + 6)
73#define VR4181_IRQ_KIU (VR4181_SYS_IRQ_BASE + 7)
74#define VR4181_IRQ_GIU (VR4181_SYS_IRQ_BASE + 8)
75#define VR4181_IRQ_SIU (VR4181_SYS_IRQ_BASE + 9)
76#define VR4181_IRQ_RFU18 (VR4181_SYS_IRQ_BASE + 10)
77#define VR4181_IRQ_SOFT (VR4181_SYS_IRQ_BASE + 11)
78#define VR4181_IRQ_RFU20 (VR4181_SYS_IRQ_BASE + 12)
79#define VR4181_IRQ_DOZEPIU (VR4181_SYS_IRQ_BASE + 13)
80#define VR4181_IRQ_RFU22 (VR4181_SYS_IRQ_BASE + 14)
81#define VR4181_IRQ_RFU23 (VR4181_SYS_IRQ_BASE + 15)
82#define VR4181_IRQ_RTCL2 (VR4181_SYS_IRQ_BASE + 16)
83#define VR4181_IRQ_LED (VR4181_SYS_IRQ_BASE + 17)
84#define VR4181_IRQ_ECU (VR4181_SYS_IRQ_BASE + 18)
85#define VR4181_IRQ_CSU (VR4181_SYS_IRQ_BASE + 19)
86#define VR4181_IRQ_USB (VR4181_SYS_IRQ_BASE + 20)
87#define VR4181_IRQ_DMA (VR4181_SYS_IRQ_BASE + 21)
88#define VR4181_IRQ_LCD (VR4181_SYS_IRQ_BASE + 22)
89#define VR4181_IRQ_RFU31 (VR4181_SYS_IRQ_BASE + 23)
90#define VR4181_IRQ_RFU32 (VR4181_SYS_IRQ_BASE + 24)
91#define VR4181_IRQ_RFU33 (VR4181_SYS_IRQ_BASE + 25)
92#define VR4181_IRQ_RFU34 (VR4181_SYS_IRQ_BASE + 26)
93#define VR4181_IRQ_RFU35 (VR4181_SYS_IRQ_BASE + 27)
94#define VR4181_IRQ_RFU36 (VR4181_SYS_IRQ_BASE + 28)
95#define VR4181_IRQ_RFU37 (VR4181_SYS_IRQ_BASE + 29)
96#define VR4181_IRQ_RFU38 (VR4181_SYS_IRQ_BASE + 30)
97#define VR4181_IRQ_RFU39 (VR4181_SYS_IRQ_BASE + 31)
98
99/* Cascaded from VR4181_IRQ_GIU */
100#define VR4181_IRQ_GPIO0 (VR4181_GPIO_IRQ_BASE + 0)
101#define VR4181_IRQ_GPIO1 (VR4181_GPIO_IRQ_BASE + 1)
102#define VR4181_IRQ_GPIO2 (VR4181_GPIO_IRQ_BASE + 2)
103#define VR4181_IRQ_GPIO3 (VR4181_GPIO_IRQ_BASE + 3)
104#define VR4181_IRQ_GPIO4 (VR4181_GPIO_IRQ_BASE + 4)
105#define VR4181_IRQ_GPIO5 (VR4181_GPIO_IRQ_BASE + 5)
106#define VR4181_IRQ_GPIO6 (VR4181_GPIO_IRQ_BASE + 6)
107#define VR4181_IRQ_GPIO7 (VR4181_GPIO_IRQ_BASE + 7)
108#define VR4181_IRQ_GPIO8 (VR4181_GPIO_IRQ_BASE + 8)
109#define VR4181_IRQ_GPIO9 (VR4181_GPIO_IRQ_BASE + 9)
110#define VR4181_IRQ_GPIO10 (VR4181_GPIO_IRQ_BASE + 10)
111#define VR4181_IRQ_GPIO11 (VR4181_GPIO_IRQ_BASE + 11)
112#define VR4181_IRQ_GPIO12 (VR4181_GPIO_IRQ_BASE + 12)
113#define VR4181_IRQ_GPIO13 (VR4181_GPIO_IRQ_BASE + 13)
114#define VR4181_IRQ_GPIO14 (VR4181_GPIO_IRQ_BASE + 14)
115#define VR4181_IRQ_GPIO15 (VR4181_GPIO_IRQ_BASE + 15)
116
117
118// Alternative to above GPIO IRQ defines
119#define VR4181_IRQ_GPIO(pin) ((VR4181_IRQ_GPIO0) + (pin))
120
121#define VR4181_IRQ_MAX (VR4181_IRQ_BASE + VR4181_NUM_CPU_IRQ + \
122 VR4181_NUM_SYS_IRQ + VR4181_NUM_GPIO_IRQ)
diff --git a/include/asm-mips/vr4181/vr4181.h b/include/asm-mips/vr4181/vr4181.h
deleted file mode 100644
index 5c5d60741515..000000000000
--- a/include/asm-mips/vr4181/vr4181.h
+++ /dev/null
@@ -1,413 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1999 by Michael Klar
7 *
8 * Copyright 2001 MontaVista Software Inc.
9 * Author: jsun@mvista.com or jsun@junsun.net
10 *
11 */
12#ifndef __ASM_VR4181_VR4181_H
13#define __ASM_VR4181_VR4181_H
14
15#include <asm/addrspace.h>
16
17#include <asm/vr4181/irq.h>
18
19#ifndef __ASSEMBLY__
20#define __preg8 (volatile unsigned char*)
21#define __preg16 (volatile unsigned short*)
22#define __preg32 (volatile unsigned int*)
23#else
24#define __preg8
25#define __preg16
26#define __preg32
27#endif
28
29// Embedded CPU peripheral registers
30// Note that many of the registers have different physical address for VR4181
31
32// Bus Control Unit (BCU)
33#define VR4181_BCUCNTREG1 __preg16(KSEG1 + 0x0A000000) /* BCU control register 1 (R/W) */
34#define VR4181_CMUCLKMSK __preg16(KSEG1 + 0x0A000004) /* Clock mask register (R/W) */
35#define VR4181_CMUCLKMSK_MSKCSUPCLK 0x0040
36#define VR4181_CMUCLKMSK_MSKAIUPCLK 0x0020
37#define VR4181_CMUCLKMSK_MSKPIUPCLK 0x0010
38#define VR4181_CMUCLKMSK_MSKADUPCLK 0x0008
39#define VR4181_CMUCLKMSK_MSKSIU18M 0x0004
40#define VR4181_CMUCLKMSK_MSKADU18M 0x0002
41#define VR4181_CMUCLKMSK_MSKUSB 0x0001
42#define VR4181_CMUCLKMSK_MSKSIU VR4181_CMUCLKMSK_MSKSIU18M
43#define VR4181_BCUSPEEDREG __preg16(KSEG1 + 0x0A00000C) /* BCU access time parameter (R/W) */
44#define VR4181_BCURFCNTREG __preg16(KSEG1 + 0x0A000010) /* BCU refresh control register (R/W) */
45#define VR4181_REVIDREG __preg16(KSEG1 + 0x0A000014) /* Revision ID register (R) */
46#define VR4181_CLKSPEEDREG __preg16(KSEG1 + 0x0A000018) /* Clock speed register (R) */
47#define VR4181_EDOMCYTREG __preg16(KSEG1 + 0x0A000300) /* Memory cycle timing register (R/W) */
48#define VR4181_MEMCFG_REG __preg16(KSEG1 + 0x0A000304) /* Memory configuration register (R/W) */
49#define VR4181_MODE_REG __preg16(KSEG1 + 0x0A000308) /* SDRAM mode register (R/W) */
50#define VR4181_SDTIMINGREG __preg16(KSEG1 + 0x0A00030C) /* SDRAM timing register (R/W) */
51
52// DMA Control Unit (DCU)
53#define VR4181_MICDEST1REG1 __preg16(KSEG1 + 0x0A000020) /* Microphone destination 1 address register 1 (R/W) */
54#define VR4181_MICDEST1REG2 __preg16(KSEG1 + 0x0A000022) /* Microphone destination 1 address register 2 (R/W) */
55#define VR4181_MICDEST2REG1 __preg16(KSEG1 + 0x0A000024) /* Microphone destination 2 address register 1 (R/W) */
56#define VR4181_MICDEST2REG2 __preg16(KSEG1 + 0x0A000026) /* Microphone destination 2 address register 2 (R/W) */
57#define VR4181_SPKRRC1REG1 __preg16(KSEG1 + 0x0A000028) /* Speaker Source 1 address register 1 (R/W) */
58#define VR4181_SPKRRC1REG2 __preg16(KSEG1 + 0x0A00002A) /* Speaker Source 1 address register 2 (R/W) */
59#define VR4181_SPKRRC2REG1 __preg16(KSEG1 + 0x0A00002C) /* Speaker Source 2 address register 1 (R/W) */
60#define VR4181_SPKRRC2REG2 __preg16(KSEG1 + 0x0A00002E) /* Speaker Source 2 address register 2 (R/W) */
61#define VR4181_DMARSTREG __preg16(KSEG1 + 0x0A000040) /* DMA Reset register (R/W) */
62#define VR4181_AIUDMAMSKREG __preg16(KSEG1 + 0x0A000046) /* Audio DMA mask register (R/W) */
63#define VR4181_USBDMAMSKREG __preg16(KSEG1 + 0x0A000600) /* USB DMA Mask register (R/W) */
64#define VR4181_USBRXS1AREG1 __preg16(KSEG1 + 0x0A000602) /* USB Rx source 1 address register 1 (R/W) */
65#define VR4181_USBRXS1AREG2 __preg16(KSEG1 + 0x0A000604) /* USB Rx source 1 address register 2 (R/W) */
66#define VR4181_USBRXS2AREG1 __preg16(KSEG1 + 0x0A000606) /* USB Rx source 2 address register 1 (R/W) */
67#define VR4181_USBRXS2AREG2 __preg16(KSEG1 + 0x0A000608) /* USB Rx source 2 address register 2 (R/W) */
68#define VR4181_USBTXS1AREG1 __preg16(KSEG1 + 0x0A00060A) /* USB Tx source 1 address register 1 (R/W) */
69#define VR4181_USBTXS1AREG2 __preg16(KSEG1 + 0x0A00060C) /* USB Tx source 1 address register 2 (R/W) */
70#define VR4181_USBTXS2AREG1 __preg16(KSEG1 + 0x0A00060E) /* USB Tx source 2 address register 1 (R/W) */
71#define VR4181_USBTXS2AREG2 __preg16(KSEG1 + 0x0A000610) /* USB Tx source 2 address register 2 (R/W) */
72#define VR4181_USBRXD1AREG1 __preg16(KSEG1 + 0x0A00062A) /* USB Rx destination 1 address register 1 (R/W) */
73#define VR4181_USBRXD1AREG2 __preg16(KSEG1 + 0x0A00062C) /* USB Rx destination 1 address register 2 (R/W) */
74#define VR4181_USBRXD2AREG1 __preg16(KSEG1 + 0x0A00062E) /* USB Rx destination 2 address register 1 (R/W) */
75#define VR4181_USBRXD2AREG2 __preg16(KSEG1 + 0x0A000630) /* USB Rx destination 2 address register 2 (R/W) */
76#define VR4181_USBTXD1AREG1 __preg16(KSEG1 + 0x0A000632) /* USB Tx destination 1 address register 1 (R/W) */
77#define VR4181_USBTXD1AREG2 __preg16(KSEG1 + 0x0A000634) /* USB Tx destination 1 address register 2 (R/W) */
78#define VR4181_USBTXD2AREG1 __preg16(KSEG1 + 0x0A000636) /* USB Tx destination 2 address register 1 (R/W) */
79#define VR4181_USBTXD2AREG2 __preg16(KSEG1 + 0x0A000638) /* USB Tx destination 2 address register 2 (R/W) */
80#define VR4181_RxRCLENREG __preg16(KSEG1 + 0x0A000652) /* USB Rx record length register (R/W) */
81#define VR4181_TxRCLENREG __preg16(KSEG1 + 0x0A000654) /* USB Tx record length register (R/W) */
82#define VR4181_MICRCLENREG __preg16(KSEG1 + 0x0A000658) /* Microphone record length register (R/W) */
83#define VR4181_SPKRCLENREG __preg16(KSEG1 + 0x0A00065A) /* Speaker record length register (R/W) */
84#define VR4181_USBCFGREG __preg16(KSEG1 + 0x0A00065C) /* USB configuration register (R/W) */
85#define VR4181_MICDMACFGREG __preg16(KSEG1 + 0x0A00065E) /* Microphone DMA configuration register (R/W) */
86#define VR4181_SPKDMACFGREG __preg16(KSEG1 + 0x0A000660) /* Speaker DMA configuration register (R/W) */
87#define VR4181_DMAITRQREG __preg16(KSEG1 + 0x0A000662) /* DMA interrupt request register (R/W) */
88#define VR4181_DMACLTREG __preg16(KSEG1 + 0x0A000664) /* DMA control register (R/W) */
89#define VR4181_DMAITMKREG __preg16(KSEG1 + 0x0A000666) /* DMA interrupt mask register (R/W) */
90
91// ISA Bridge
92#define VR4181_ISABRGCTL __preg16(KSEG1 + 0x0B0002C0) /* ISA Bridge Control Register (R/W) */
93#define VR4181_ISABRGSTS __preg16(KSEG1 + 0x0B0002C2) /* ISA Bridge Status Register (R/W) */
94#define VR4181_XISACTL __preg16(KSEG1 + 0x0B0002C4) /* External ISA Control Register (R/W) */
95
96// Clocked Serial Interface (CSI)
97#define VR4181_CSIMODE __preg16(KSEG1 + 0x0B000900) /* CSI Mode Register (R/W) */
98#define VR4181_CSIRXDATA __preg16(KSEG1 + 0x0B000902) /* CSI Receive Data Register (R) */
99#define VR4181_CSITXDATA __preg16(KSEG1 + 0x0B000904) /* CSI Transmit Data Register (R/W) */
100#define VR4181_CSILSTAT __preg16(KSEG1 + 0x0B000906) /* CSI Line Status Register (R/W) */
101#define VR4181_CSIINTMSK __preg16(KSEG1 + 0x0B000908) /* CSI Interrupt Mask Register (R/W) */
102#define VR4181_CSIINTSTAT __preg16(KSEG1 + 0x0B00090a) /* CSI Interrupt Status Register (R/W) */
103#define VR4181_CSITXBLEN __preg16(KSEG1 + 0x0B00090c) /* CSI Transmit Burst Length Register (R/W) */
104#define VR4181_CSIRXBLEN __preg16(KSEG1 + 0x0B00090e) /* CSI Receive Burst Length Register (R/W) */
105
106// Interrupt Control Unit (ICU)
107#define VR4181_SYSINT1REG __preg16(KSEG1 + 0x0A000080) /* Level 1 System interrupt register 1 (R) */
108#define VR4181_MSYSINT1REG __preg16(KSEG1 + 0x0A00008C) /* Level 1 mask system interrupt register 1 (R/W) */
109#define VR4181_NMIREG __preg16(KSEG1 + 0x0A000098) /* NMI register (R/W) */
110#define VR4181_SOFTINTREG __preg16(KSEG1 + 0x0A00009A) /* Software interrupt register (R/W) */
111#define VR4181_SYSINT2REG __preg16(KSEG1 + 0x0A000200) /* Level 1 System interrupt register 2 (R) */
112#define VR4181_MSYSINT2REG __preg16(KSEG1 + 0x0A000206) /* Level 1 mask system interrupt register 2 (R/W) */
113#define VR4181_PIUINTREGro __preg16(KSEG1 + 0x0B000082) /* Level 2 PIU interrupt register (R) */
114#define VR4181_AIUINTREG __preg16(KSEG1 + 0x0B000084) /* Level 2 AIU interrupt register (R) */
115#define VR4181_MPIUINTREG __preg16(KSEG1 + 0x0B00008E) /* Level 2 mask PIU interrupt register (R/W) */
116#define VR4181_MAIUINTREG __preg16(KSEG1 + 0x0B000090) /* Level 2 mask AIU interrupt register (R/W) */
117#define VR4181_MKIUINTREG __preg16(KSEG1 + 0x0B000092) /* Level 2 mask KIU interrupt register (R/W) */
118#define VR4181_KIUINTREG __preg16(KSEG1 + 0x0B000198) /* Level 2 KIU interrupt register (R) */
119
120// Power Management Unit (PMU)
121#define VR4181_PMUINTREG __preg16(KSEG1 + 0x0B0000A0) /* PMU Status Register (R/W) */
122#define VR4181_PMUINT_POWERSW 0x1 /* Power switch */
123#define VR4181_PMUINT_BATT 0x2 /* Low batt during normal operation */
124#define VR4181_PMUINT_DEADMAN 0x4 /* Deadman's switch */
125#define VR4181_PMUINT_RESET 0x8 /* Reset switch */
126#define VR4181_PMUINT_RTCRESET 0x10 /* RTC Reset */
127#define VR4181_PMUINT_TIMEOUT 0x20 /* HAL Timer Reset */
128#define VR4181_PMUINT_BATTLOW 0x100 /* Battery low */
129#define VR4181_PMUINT_RTC 0x200 /* RTC Alarm */
130#define VR4181_PMUINT_DCD 0x400 /* DCD# */
131#define VR4181_PMUINT_GPIO0 0x1000 /* GPIO0 */
132#define VR4181_PMUINT_GPIO1 0x2000 /* GPIO1 */
133#define VR4181_PMUINT_GPIO2 0x4000 /* GPIO2 */
134#define VR4181_PMUINT_GPIO3 0x8000 /* GPIO3 */
135
136#define VR4181_PMUCNTREG __preg16(KSEG1 + 0x0B0000A2) /* PMU Control Register (R/W) */
137#define VR4181_PMUWAITREG __preg16(KSEG1 + 0x0B0000A8) /* PMU Wait Counter Register (R/W) */
138#define VR4181_PMUDIVREG __preg16(KSEG1 + 0x0B0000AC) /* PMU Divide Mode Register (R/W) */
139#define VR4181_DRAMHIBCTL __preg16(KSEG1 + 0x0B0000B2) /* DRAM Hibernate Control Register (R/W) */
140
141// Real Time Clock Unit (RTC)
142#define VR4181_ETIMELREG __preg16(KSEG1 + 0x0B0000C0) /* Elapsed Time L Register (R/W) */
143#define VR4181_ETIMEMREG __preg16(KSEG1 + 0x0B0000C2) /* Elapsed Time M Register (R/W) */
144#define VR4181_ETIMEHREG __preg16(KSEG1 + 0x0B0000C4) /* Elapsed Time H Register (R/W) */
145#define VR4181_ECMPLREG __preg16(KSEG1 + 0x0B0000C8) /* Elapsed Compare L Register (R/W) */
146#define VR4181_ECMPMREG __preg16(KSEG1 + 0x0B0000CA) /* Elapsed Compare M Register (R/W) */
147#define VR4181_ECMPHREG __preg16(KSEG1 + 0x0B0000CC) /* Elapsed Compare H Register (R/W) */
148#define VR4181_RTCL1LREG __preg16(KSEG1 + 0x0B0000D0) /* RTC Long 1 L Register (R/W) */
149#define VR4181_RTCL1HREG __preg16(KSEG1 + 0x0B0000D2) /* RTC Long 1 H Register (R/W) */
150#define VR4181_RTCL1CNTLREG __preg16(KSEG1 + 0x0B0000D4) /* RTC Long 1 Count L Register (R) */
151#define VR4181_RTCL1CNTHREG __preg16(KSEG1 + 0x0B0000D6) /* RTC Long 1 Count H Register (R) */
152#define VR4181_RTCL2LREG __preg16(KSEG1 + 0x0B0000D8) /* RTC Long 2 L Register (R/W) */
153#define VR4181_RTCL2HREG __preg16(KSEG1 + 0x0B0000DA) /* RTC Long 2 H Register (R/W) */
154#define VR4181_RTCL2CNTLREG __preg16(KSEG1 + 0x0B0000DC) /* RTC Long 2 Count L Register (R) */
155#define VR4181_RTCL2CNTHREG __preg16(KSEG1 + 0x0B0000DE) /* RTC Long 2 Count H Register (R) */
156#define VR4181_RTCINTREG __preg16(KSEG1 + 0x0B0001DE) /* RTC Interrupt Register (R/W) */
157
158// Deadman's Switch Unit (DSU)
159#define VR4181_DSUCNTREG __preg16(KSEG1 + 0x0B0000E0) /* DSU Control Register (R/W) */
160#define VR4181_DSUSETREG __preg16(KSEG1 + 0x0B0000E2) /* DSU Dead Time Set Register (R/W) */
161#define VR4181_DSUCLRREG __preg16(KSEG1 + 0x0B0000E4) /* DSU Clear Register (W) */
162#define VR4181_DSUTIMREG __preg16(KSEG1 + 0x0B0000E6) /* DSU Elapsed Time Register (R/W) */
163
164// General Purpose I/O Unit (GIU)
165#define VR4181_GPMD0REG __preg16(KSEG1 + 0x0B000300) /* GPIO Mode 0 Register (R/W) */
166#define VR4181_GPMD1REG __preg16(KSEG1 + 0x0B000302) /* GPIO Mode 1 Register (R/W) */
167#define VR4181_GPMD2REG __preg16(KSEG1 + 0x0B000304) /* GPIO Mode 2 Register (R/W) */
168#define VR4181_GPMD3REG __preg16(KSEG1 + 0x0B000306) /* GPIO Mode 3 Register (R/W) */
169#define VR4181_GPDATHREG __preg16(KSEG1 + 0x0B000308) /* GPIO Data High Register (R/W) */
170#define VR4181_GPDATHREG_GPIO16 0x0001
171#define VR4181_GPDATHREG_GPIO17 0x0002
172#define VR4181_GPDATHREG_GPIO18 0x0004
173#define VR4181_GPDATHREG_GPIO19 0x0008
174#define VR4181_GPDATHREG_GPIO20 0x0010
175#define VR4181_GPDATHREG_GPIO21 0x0020
176#define VR4181_GPDATHREG_GPIO22 0x0040
177#define VR4181_GPDATHREG_GPIO23 0x0080
178#define VR4181_GPDATHREG_GPIO24 0x0100
179#define VR4181_GPDATHREG_GPIO25 0x0200
180#define VR4181_GPDATHREG_GPIO26 0x0400
181#define VR4181_GPDATHREG_GPIO27 0x0800
182#define VR4181_GPDATHREG_GPIO28 0x1000
183#define VR4181_GPDATHREG_GPIO29 0x2000
184#define VR4181_GPDATHREG_GPIO30 0x4000
185#define VR4181_GPDATHREG_GPIO31 0x8000
186#define VR4181_GPDATLREG __preg16(KSEG1 + 0x0B00030A) /* GPIO Data Low Register (R/W) */
187#define VR4181_GPDATLREG_GPIO0 0x0001
188#define VR4181_GPDATLREG_GPIO1 0x0002
189#define VR4181_GPDATLREG_GPIO2 0x0004
190#define VR4181_GPDATLREG_GPIO3 0x0008
191#define VR4181_GPDATLREG_GPIO4 0x0010
192#define VR4181_GPDATLREG_GPIO5 0x0020
193#define VR4181_GPDATLREG_GPIO6 0x0040
194#define VR4181_GPDATLREG_GPIO7 0x0080
195#define VR4181_GPDATLREG_GPIO8 0x0100
196#define VR4181_GPDATLREG_GPIO9 0x0200
197#define VR4181_GPDATLREG_GPIO10 0x0400
198#define VR4181_GPDATLREG_GPIO11 0x0800
199#define VR4181_GPDATLREG_GPIO12 0x1000
200#define VR4181_GPDATLREG_GPIO13 0x2000
201#define VR4181_GPDATLREG_GPIO14 0x4000
202#define VR4181_GPDATLREG_GPIO15 0x8000
203#define VR4181_GPINTEN __preg16(KSEG1 + 0x0B00030C) /* GPIO Interrupt Enable Register (R/W) */
204#define VR4181_GPINTMSK __preg16(KSEG1 + 0x0B00030E) /* GPIO Interrupt Mask Register (R/W) */
205#define VR4181_GPINTTYPH __preg16(KSEG1 + 0x0B000310) /* GPIO Interrupt Type High Register (R/W) */
206#define VR4181_GPINTTYPL __preg16(KSEG1 + 0x0B000312) /* GPIO Interrupt Type Low Register (R/W) */
207#define VR4181_GPINTSTAT __preg16(KSEG1 + 0x0B000314) /* GPIO Interrupt Status Register (R/W) */
208#define VR4181_GPHIBSTH __preg16(KSEG1 + 0x0B000316) /* GPIO Hibernate Pin State High Register (R/W) */
209#define VR4181_GPHIBSTL __preg16(KSEG1 + 0x0B000318) /* GPIO Hibernate Pin State Low Register (R/W) */
210#define VR4181_GPSICTL __preg16(KSEG1 + 0x0B00031A) /* GPIO Serial Interface Control Register (R/W) */
211#define VR4181_KEYEN __preg16(KSEG1 + 0x0B00031C) /* Keyboard Scan Pin Enable Register (R/W) */
212#define VR4181_PCS0STRA __preg16(KSEG1 + 0x0B000320) /* Programmable Chip Select [0] Start Address Register (R/W) */
213#define VR4181_PCS0STPA __preg16(KSEG1 + 0x0B000322) /* Programmable Chip Select [0] Stop Address Register (R/W) */
214#define VR4181_PCS0HIA __preg16(KSEG1 + 0x0B000324) /* Programmable Chip Select [0] High Address Register (R/W) */
215#define VR4181_PCS1STRA __preg16(KSEG1 + 0x0B000326) /* Programmable Chip Select [1] Start Address Register (R/W) */
216#define VR4181_PCS1STPA __preg16(KSEG1 + 0x0B000328) /* Programmable Chip Select [1] Stop Address Register (R/W) */
217#define VR4181_PCS1HIA __preg16(KSEG1 + 0x0B00032A) /* Programmable Chip Select [1] High Address Register (R/W) */
218#define VR4181_PCSMODE __preg16(KSEG1 + 0x0B00032C) /* Programmable Chip Select Mode Register (R/W) */
219#define VR4181_LCDGPMODE __preg16(KSEG1 + 0x0B00032E) /* LCD General Purpose Mode Register (R/W) */
220#define VR4181_MISCREG0 __preg16(KSEG1 + 0x0B000330) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
221#define VR4181_MISCREG1 __preg16(KSEG1 + 0x0B000332) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
222#define VR4181_MISCREG2 __preg16(KSEG1 + 0x0B000334) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
223#define VR4181_MISCREG3 __preg16(KSEG1 + 0x0B000336) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
224#define VR4181_MISCREG4 __preg16(KSEG1 + 0x0B000338) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
225#define VR4181_MISCREG5 __preg16(KSEG1 + 0x0B00033A) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
226#define VR4181_MISCREG6 __preg16(KSEG1 + 0x0B00033C) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
227#define VR4181_MISCREG7 __preg16(KSEG1 + 0x0B00033D) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
228#define VR4181_MISCREG8 __preg16(KSEG1 + 0x0B000340) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
229#define VR4181_MISCREG9 __preg16(KSEG1 + 0x0B000342) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
230#define VR4181_MISCREG10 __preg16(KSEG1 + 0x0B000344) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
231#define VR4181_MISCREG11 __preg16(KSEG1 + 0x0B000346) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
232#define VR4181_MISCREG12 __preg16(KSEG1 + 0x0B000348) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
233#define VR4181_MISCREG13 __preg16(KSEG1 + 0x0B00034A) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
234#define VR4181_MISCREG14 __preg16(KSEG1 + 0x0B00034C) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
235#define VR4181_MISCREG15 __preg16(KSEG1 + 0x0B00034E) /* Misc. R/W Battery Backed Registers for Non-Volatile Storage (R/W) */
236#define VR4181_SECIRQMASKL VR4181_GPINTEN
237// No SECIRQMASKH for VR4181
238
239// Touch Panel Interface Unit (PIU)
240#define VR4181_PIUCNTREG __preg16(KSEG1 + 0x0B000122) /* PIU Control register (R/W) */
241#define VR4181_PIUCNTREG_PIUSEQEN 0x0004
242#define VR4181_PIUCNTREG_PIUPWR 0x0002
243#define VR4181_PIUCNTREG_PADRST 0x0001
244
245#define VR4181_PIUINTREG __preg16(KSEG1 + 0x0B000124) /* PIU Interrupt cause register (R/W) */
246#define VR4181_PIUINTREG_OVP 0x8000
247#define VR4181_PIUINTREG_PADCMD 0x0040
248#define VR4181_PIUINTREG_PADADP 0x0020
249#define VR4181_PIUINTREG_PADPAGE1 0x0010
250#define VR4181_PIUINTREG_PADPAGE0 0x0008
251#define VR4181_PIUINTREG_PADDLOST 0x0004
252#define VR4181_PIUINTREG_PENCHG 0x0001
253
254#define VR4181_PIUSIVLREG __preg16(KSEG1 + 0x0B000126) /* PIU Data sampling interval register (R/W) */
255#define VR4181_PIUSTBLREG __preg16(KSEG1 + 0x0B000128) /* PIU A/D converter start delay register (R/W) */
256#define VR4181_PIUCMDREG __preg16(KSEG1 + 0x0B00012A) /* PIU A/D command register (R/W) */
257#define VR4181_PIUASCNREG __preg16(KSEG1 + 0x0B000130) /* PIU A/D port scan register (R/W) */
258#define VR4181_PIUAMSKREG __preg16(KSEG1 + 0x0B000132) /* PIU A/D scan mask register (R/W) */
259#define VR4181_PIUCIVLREG __preg16(KSEG1 + 0x0B00013E) /* PIU Check interval register (R) */
260#define VR4181_PIUPB00REG __preg16(KSEG1 + 0x0B0002A0) /* PIU Page 0 Buffer 0 register (R/W) */
261#define VR4181_PIUPB01REG __preg16(KSEG1 + 0x0B0002A2) /* PIU Page 0 Buffer 1 register (R/W) */
262#define VR4181_PIUPB02REG __preg16(KSEG1 + 0x0B0002A4) /* PIU Page 0 Buffer 2 register (R/W) */
263#define VR4181_PIUPB03REG __preg16(KSEG1 + 0x0B0002A6) /* PIU Page 0 Buffer 3 register (R/W) */
264#define VR4181_PIUPB10REG __preg16(KSEG1 + 0x0B0002A8) /* PIU Page 1 Buffer 0 register (R/W) */
265#define VR4181_PIUPB11REG __preg16(KSEG1 + 0x0B0002AA) /* PIU Page 1 Buffer 1 register (R/W) */
266#define VR4181_PIUPB12REG __preg16(KSEG1 + 0x0B0002AC) /* PIU Page 1 Buffer 2 register (R/W) */
267#define VR4181_PIUPB13REG __preg16(KSEG1 + 0x0B0002AE) /* PIU Page 1 Buffer 3 register (R/W) */
268#define VR4181_PIUAB0REG __preg16(KSEG1 + 0x0B0002B0) /* PIU A/D scan Buffer 0 register (R/W) */
269#define VR4181_PIUAB1REG __preg16(KSEG1 + 0x0B0002B2) /* PIU A/D scan Buffer 1 register (R/W) */
270#define VR4181_PIUAB2REG __preg16(KSEG1 + 0x0B0002B4) /* PIU A/D scan Buffer 2 register (R/W) */
271#define VR4181_PIUAB3REG __preg16(KSEG1 + 0x0B0002B6) /* PIU A/D scan Buffer 3 register (R/W) */
272#define VR4181_PIUPB04REG __preg16(KSEG1 + 0x0B0002BC) /* PIU Page 0 Buffer 4 register (R/W) */
273#define VR4181_PIUPB14REG __preg16(KSEG1 + 0x0B0002BE) /* PIU Page 1 Buffer 4 register (R/W) */
274
275// Audio Interface Unit (AIU)
276#define VR4181_SODATREG __preg16(KSEG1 + 0x0B000166) /* Speaker Output Data Register (R/W) */
277#define VR4181_SCNTREG __preg16(KSEG1 + 0x0B000168) /* Speaker Output Control Register (R/W) */
278#define VR4181_MIDATREG __preg16(KSEG1 + 0x0B000170) /* Mike Input Data Register (R/W) */
279#define VR4181_MCNTREG __preg16(KSEG1 + 0x0B000172) /* Mike Input Control Register (R/W) */
280#define VR4181_DVALIDREG __preg16(KSEG1 + 0x0B000178) /* Data Valid Register (R/W) */
281#define VR4181_SEQREG __preg16(KSEG1 + 0x0B00017A) /* Sequential Register (R/W) */
282#define VR4181_INTREG __preg16(KSEG1 + 0x0B00017C) /* Interrupt Register (R/W) */
283#define VR4181_SDMADATREG __preg16(KSEG1 + 0x0B000160) /* Speaker DMA Data Register (R/W) */
284#define VR4181_MDMADATREG __preg16(KSEG1 + 0x0B000162) /* Microphone DMA Data Register (R/W) */
285#define VR4181_DAVREF_SETUP __preg16(KSEG1 + 0x0B000164) /* DAC Vref setup register (R/W) */
286#define VR4181_SCNVC_END __preg16(KSEG1 + 0x0B00016E) /* Speaker sample rate control (R/W) */
287#define VR4181_MIDATREG __preg16(KSEG1 + 0x0B000170) /* Microphone Input Data Register (R/W) */
288#define VR4181_MCNTREG __preg16(KSEG1 + 0x0B000172) /* Microphone Input Control Register (R/W) */
289#define VR4181_MCNVC_END __preg16(KSEG1 + 0x0B00017E) /* Microphone sample rate control (R/W) */
290
291// Keyboard Interface Unit (KIU)
292#define VR4181_KIUDAT0 __preg16(KSEG1 + 0x0B000180) /* KIU Data0 Register (R/W) */
293#define VR4181_KIUDAT1 __preg16(KSEG1 + 0x0B000182) /* KIU Data1 Register (R/W) */
294#define VR4181_KIUDAT2 __preg16(KSEG1 + 0x0B000184) /* KIU Data2 Register (R/W) */
295#define VR4181_KIUDAT3 __preg16(KSEG1 + 0x0B000186) /* KIU Data3 Register (R/W) */
296#define VR4181_KIUDAT4 __preg16(KSEG1 + 0x0B000188) /* KIU Data4 Register (R/W) */
297#define VR4181_KIUDAT5 __preg16(KSEG1 + 0x0B00018A) /* KIU Data5 Register (R/W) */
298#define VR4181_KIUSCANREP __preg16(KSEG1 + 0x0B000190) /* KIU Scan/Repeat Register (R/W) */
299#define VR4181_KIUSCANREP_KEYEN 0x8000
300#define VR4181_KIUSCANREP_SCANSTP 0x0008
301#define VR4181_KIUSCANREP_SCANSTART 0x0004
302#define VR4181_KIUSCANREP_ATSTP 0x0002
303#define VR4181_KIUSCANREP_ATSCAN 0x0001
304#define VR4181_KIUSCANS __preg16(KSEG1 + 0x0B000192) /* KIU Scan Status Register (R) */
305#define VR4181_KIUWKS __preg16(KSEG1 + 0x0B000194) /* KIU Wait Keyscan Stable Register (R/W) */
306#define VR4181_KIUWKI __preg16(KSEG1 + 0x0B000196) /* KIU Wait Keyscan Interval Register (R/W) */
307#define VR4181_KIUINT __preg16(KSEG1 + 0x0B000198) /* KIU Interrupt Register (R/W) */
308#define VR4181_KIUINT_KDATLOST 0x0004
309#define VR4181_KIUINT_KDATRDY 0x0002
310#define VR4181_KIUINT_SCANINT 0x0001
311#define VR4181_KIUDAT6 __preg16(KSEG1 + 0x0B00018C) /* Scan Line 6 Key Data Register (R) */
312#define VR4181_KIUDAT7 __preg16(KSEG1 + 0x0B00018E) /* Scan Line 7 Key Data Register (R) */
313
314// CompactFlash Controller
315#define VR4181_PCCARDINDEX __preg8(KSEG1 + 0x0B0008E0) /* PC Card Controller Index Register */
316#define VR4181_PCCARDDATA __preg8(KSEG1 + 0x0B0008E1) /* PC Card Controller Data Register */
317#define VR4181_INTSTATREG __preg16(KSEG1 + 0x0B0008F8) /* Interrupt Status Register (R/W) */
318#define VR4181_INTMSKREG __preg16(KSEG1 + 0x0B0008FA) /* Interrupt Mask Register (R/W) */
319#define VR4181_CFG_REG_1 __preg16(KSEG1 + 0x0B0008FE) /* Configuration Register 1 */
320
321// LED Control Unit (LED)
322#define VR4181_LEDHTSREG __preg16(KSEG1 + 0x0B000240) /* LED H Time Set register (R/W) */
323#define VR4181_LEDLTSREG __preg16(KSEG1 + 0x0B000242) /* LED L Time Set register (R/W) */
324#define VR4181_LEDCNTREG __preg16(KSEG1 + 0x0B000248) /* LED Control register (R/W) */
325#define VR4181_LEDASTCREG __preg16(KSEG1 + 0x0B00024A) /* LED Auto Stop Time Count register (R/W) */
326#define VR4181_LEDINTREG __preg16(KSEG1 + 0x0B00024C) /* LED Interrupt register (R/W) */
327
328// Serial Interface Unit (SIU / SIU1 and SIU2)
329#define VR4181_SIURB __preg8(KSEG1 + 0x0C000010) /* Receiver Buffer Register (Read) DLAB = 0 (R) */
330#define VR4181_SIUTH __preg8(KSEG1 + 0x0C000010) /* Transmitter Holding Register (Write) DLAB = 0 (W) */
331#define VR4181_SIUDLL __preg8(KSEG1 + 0x0C000010) /* Divisor Latch (Least Significant Byte) DLAB = 1 (R/W) */
332#define VR4181_SIUIE __preg8(KSEG1 + 0x0C000011) /* Interrupt Enable DLAB = 0 (R/W) */
333#define VR4181_SIUDLM __preg8(KSEG1 + 0x0C000011) /* Divisor Latch (Most Significant Byte) DLAB = 1 (R/W) */
334#define VR4181_SIUIID __preg8(KSEG1 + 0x0C000012) /* Interrupt Identification Register (Read) (R) */
335#define VR4181_SIUFC __preg8(KSEG1 + 0x0C000012) /* FIFO Control Register (Write) (W) */
336#define VR4181_SIULC __preg8(KSEG1 + 0x0C000013) /* Line Control Register (R/W) */
337#define VR4181_SIUMC __preg8(KSEG1 + 0x0C000014) /* MODEM Control Register (R/W) */
338#define VR4181_SIULS __preg8(KSEG1 + 0x0C000015) /* Line Status Register (R/W) */
339#define VR4181_SIUMS __preg8(KSEG1 + 0x0C000016) /* MODEM Status Register (R/W) */
340#define VR4181_SIUSC __preg8(KSEG1 + 0x0C000017) /* Scratch Register (R/W) */
341#define VR4181_SIURESET __preg8(KSEG1 + 0x0C000019) /* SIU Reset Register (R/W) */
342#define VR4181_SIUACTMSK __preg8(KSEG1 + 0x0C00001C) /* SIU Activity Mask (R/W) */
343#define VR4181_SIUACTTMR __preg8(KSEG1 + 0x0C00001E) /* SIU Activity Timer (R/W) */
344#define VR4181_SIURB_2 __preg8(KSEG1 + 0x0C000000) /* Receive Buffer Register (Read) (R) */
345#define VR4181_SIUTH_2 __preg8(KSEG1 + 0x0C000000) /* Transmitter Holding Register (Write) (W) */
346#define VR4181_SIUDLL_2 __preg8(KSEG1 + 0x0C000000) /* Divisor Latch (Least Significant Byte) (R/W) */
347#define VR4181_SIUIE_2 __preg8(KSEG1 + 0x0C000001) /* Interrupt Enable (DLAB = 0) (R/W) */
348#define VR4181_SIUDLM_2 __preg8(KSEG1 + 0x0C000001) /* Divisor Latch (Most Significant Byte) (DLAB = 1) (R/W) */
349#define VR4181_SIUIID_2 __preg8(KSEG1 + 0x0C000002) /* Interrupt Identification Register (Read) (R) */
350#define VR4181_SIUFC_2 __preg8(KSEG1 + 0x0C000002) /* FIFO Control Register (Write) (W) */
351#define VR4181_SIULC_2 __preg8(KSEG1 + 0x0C000003) /* Line Control Register (R/W) */
352#define VR4181_SIUMC_2 __preg8(KSEG1 + 0x0C000004) /* Modem Control Register (R/W) */
353#define VR4181_SIULS_2 __preg8(KSEG1 + 0x0C000005) /* Line Status Register (R/W) */
354#define VR4181_SIUMS_2 __preg8(KSEG1 + 0x0C000006) /* Modem Status Register (R/W) */
355#define VR4181_SIUSC_2 __preg8(KSEG1 + 0x0C000007) /* Scratch Register (R/W) */
356#define VR4181_SIUIRSEL_2 __preg8(KSEG1 + 0x0C000008) /* SIU IrDA Selectot (R/W) */
357#define VR4181_SIURESET_2 __preg8(KSEG1 + 0x0C000009) /* SIU Reset Register (R/W) */
358#define VR4181_SIUCSEL_2 __preg8(KSEG1 + 0x0C00000A) /* IrDA Echo-back Control (R/W) */
359#define VR4181_SIUACTMSK_2 __preg8(KSEG1 + 0x0C00000C) /* SIU Activity Mask Register (R/W) */
360#define VR4181_SIUACTTMR_2 __preg8(KSEG1 + 0x0C00000E) /* SIU Activity Timer Register (R/W) */
361
362
363// USB Module
364#define VR4181_USBINFIFO __preg16(KSEG1 + 0x0B000780) /* USB Bulk Input FIFO (Bulk In End Point) (W) */
365#define VR4181_USBOUTFIFO __preg16(KSEG1 + 0x0B000782) /* USB Bulk Output FIFO (Bulk Out End Point) (R) */
366#define VR4181_USBCTLFIFO __preg16(KSEG1 + 0x0B000784) /* USB Control FIFO (Control End Point) (W) */
367#define VR4181_USBSTAT __preg16(KSEG1 + 0x0B000786) /* Interrupt Status Register (R/W) */
368#define VR4181_USBINTMSK __preg16(KSEG1 + 0x0B000788) /* Interrupt Mask Register (R/W) */
369#define VR4181_USBCTLREG __preg16(KSEG1 + 0x0B00078A) /* Control Register (R/W) */
370#define VR4181_USBSTPREG __preg16(KSEG1 + 0x0B00078C) /* USB Transfer Stop Register (R/W) */
371
372// LCD Controller
373#define VR4181_HRTOTALREG __preg16(KSEG1 + 0x0A000400) /* Horizontal total Register (R/W) */
374#define VR4181_HRVISIBREG __preg16(KSEG1 + 0x0A000402) /* Horizontal Visible Register (R/W) */
375#define VR4181_LDCLKSTREG __preg16(KSEG1 + 0x0A000404) /* Load clock start Register (R/W) */
376#define VR4181_LDCLKNDREG __preg16(KSEG1 + 0x0A000406) /* Load clock end Register (R/W) */
377#define VR4181_VRTOTALREG __preg16(KSEG1 + 0x0A000408) /* Vertical Total Register (R/W) */
378#define VR4181_VRVISIBREG __preg16(KSEG1 + 0x0A00040A) /* Vertical Visible Register (R/W) */
379#define VR4181_FVSTARTREG __preg16(KSEG1 + 0x0A00040C) /* FLM vertical start Register (R/W) */
380#define VR4181_FVENDREG __preg16(KSEG1 + 0x0A00040E) /* FLM vertical end Register (R/W) */
381#define VR4181_LCDCTRLREG __preg16(KSEG1 + 0x0A000410) /* LCD control Register (R/W) */
382#define VR4181_LCDINRQREG __preg16(KSEG1 + 0x0A000412) /* LCD Interrupt request Register (R/W) */
383#define VR4181_LCDCFGREG0 __preg16(KSEG1 + 0x0A000414) /* LCD Configuration Register 0 (R/W) */
384#define VR4181_LCDCFGREG1 __preg16(KSEG1 + 0x0A000416) /* LCD Configuration Register 1 (R/W) */
385#define VR4181_FBSTAD1REG __preg16(KSEG1 + 0x0A000418) /* Frame Buffer Start Address 1 Register (R/W) */
386#define VR4181_FBSTAD2REG __preg16(KSEG1 + 0x0A00041A) /* Frame Buffer Start Address 2 Register (R/W) */
387#define VR4181_FBNDAD1REG __preg16(KSEG1 + 0x0A000420) /* Frame Buffer End Address 1 Register (R/W) */
388#define VR4181_FBNDAD2REG __preg16(KSEG1 + 0x0A000422) /* Frame Buffer End Address 2 register (R/W) */
389#define VR4181_FHSTARTREG __preg16(KSEG1 + 0x0A000424) /* FLM horizontal Start Register (R/W) */
390#define VR4181_FHENDREG __preg16(KSEG1 + 0x0A000426) /* FLM horizontal End Register (R/W) */
391#define VR4181_PWRCONREG1 __preg16(KSEG1 + 0x0A000430) /* Power Control register 1 (R/W) */
392#define VR4181_PWRCONREG2 __preg16(KSEG1 + 0x0A000432) /* Power Control register 2 (R/W) */
393#define VR4181_LCDIMSKREG __preg16(KSEG1 + 0x0A000434) /* LCD Interrupt Mask register (R/W) */
394#define VR4181_CPINDCTREG __preg16(KSEG1 + 0x0A00047E) /* Color palette Index and control Register (R/W) */
395#define VR4181_CPALDATREG __preg32(KSEG1 + 0x0A000480) /* Color palette data register (32bits Register) (R/W) */
396
397// physical address spaces
398#define VR4181_LCD 0x0a000000
399#define VR4181_INTERNAL_IO_2 0x0b000000
400#define VR4181_INTERNAL_IO_1 0x0c000000
401#define VR4181_ISA_MEM 0x10000000
402#define VR4181_ISA_IO 0x14000000
403#define VR4181_ROM 0x18000000
404
405// This is the base address for IO port decoding to which the 16 bit IO port address
406// is added. Defining it to 0 will usually cause a kernel oops any time port IO is
407// attempted, which can be handy for turning up parts of the kernel that make
408// incorrect architecture assumptions (by assuming that everything acts like a PC),
409// but we need it correctly defined to use the PCMCIA/CF controller:
410#define VR4181_PORT_BASE (KSEG1 + VR4181_ISA_IO)
411#define VR4181_ISAMEM_BASE (KSEG1 + VR4181_ISA_MEM)
412
413#endif /* __ASM_VR4181_VR4181_H */
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
index 7d41e44463f9..bd2723c30901 100644
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ b/include/asm-mips/vr41xx/vr41xx.h
@@ -7,7 +7,7 @@
7 * Copyright (C) 2001, 2002 Paul Mundt 7 * Copyright (C) 2001, 2002 Paul Mundt
8 * Copyright (C) 2002 MontaVista Software, Inc. 8 * Copyright (C) 2002 MontaVista Software, Inc.
9 * Copyright (C) 2002 TimeSys Corp. 9 * Copyright (C) 2002 TimeSys Corp.
10 * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> 10 * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
11 * 11 *
12 * This program is free software; you can redistribute it and/or modify it 12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the 13 * under the terms of the GNU General Public License as published by the
@@ -79,11 +79,11 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
79#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) 79#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
80#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) 80#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
81#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) 81#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
82#define INT0_CASCADE_IRQ MIPS_CPU_IRQ(2) 82#define INT0_IRQ MIPS_CPU_IRQ(2)
83#define INT1_CASCADE_IRQ MIPS_CPU_IRQ(3) 83#define INT1_IRQ MIPS_CPU_IRQ(3)
84#define INT2_CASCADE_IRQ MIPS_CPU_IRQ(4) 84#define INT2_IRQ MIPS_CPU_IRQ(4)
85#define INT3_CASCADE_IRQ MIPS_CPU_IRQ(5) 85#define INT3_IRQ MIPS_CPU_IRQ(5)
86#define INT4_CASCADE_IRQ MIPS_CPU_IRQ(6) 86#define INT4_IRQ MIPS_CPU_IRQ(6)
87#define TIMER_IRQ MIPS_CPU_IRQ(7) 87#define TIMER_IRQ MIPS_CPU_IRQ(7)
88 88
89/* SYINT1 Interrupt Numbers */ 89/* SYINT1 Interrupt Numbers */
@@ -97,7 +97,7 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
97#define PIU_IRQ SYSINT1_IRQ(5) 97#define PIU_IRQ SYSINT1_IRQ(5)
98#define AIU_IRQ SYSINT1_IRQ(6) 98#define AIU_IRQ SYSINT1_IRQ(6)
99#define KIU_IRQ SYSINT1_IRQ(7) 99#define KIU_IRQ SYSINT1_IRQ(7)
100#define GIUINT_CASCADE_IRQ SYSINT1_IRQ(8) 100#define GIUINT_IRQ SYSINT1_IRQ(8)
101#define SIU_IRQ SYSINT1_IRQ(9) 101#define SIU_IRQ SYSINT1_IRQ(9)
102#define BUSERR_IRQ SYSINT1_IRQ(10) 102#define BUSERR_IRQ SYSINT1_IRQ(10)
103#define SOFTINT_IRQ SYSINT1_IRQ(11) 103#define SOFTINT_IRQ SYSINT1_IRQ(11)
@@ -128,7 +128,7 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
128#define GIU_IRQ_LAST GIU_IRQ(31) 128#define GIU_IRQ_LAST GIU_IRQ(31)
129 129
130extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); 130extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
131extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)); 131extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *));
132 132
133#define PIUINT_COMMAND 0x0040 133#define PIUINT_COMMAND 0x0040
134#define PIUINT_DATA 0x0020 134#define PIUINT_DATA 0x0020
diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h
index 58e193c51b45..bb7a85c186e4 100644
--- a/include/asm-mips/vr41xx/vrc4173.h
+++ b/include/asm-mips/vr41xx/vrc4173.h
@@ -21,8 +21,8 @@
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */ 23 */
24#ifndef __NEC_VRC4173_H 24#ifndef __NEC_VRC4173_H
25#define __NEC_VRC4173_H 25#define __NEC_VRC4173_H
26 26
27#include <linux/config.h> 27#include <linux/config.h>
28#include <asm/io.h> 28#include <asm/io.h>
diff --git a/include/asm-mips/war.h b/include/asm-mips/war.h
index c4a704121343..04ee53b34c2e 100644
--- a/include/asm-mips/war.h
+++ b/include/asm-mips/war.h
@@ -113,7 +113,7 @@
113 */ 113 */
114#define BCM1250_M3_WAR 1 114#define BCM1250_M3_WAR 1
115 115
116/* 116/*
117 * This is a DUART workaround related to glitches around register accesses 117 * This is a DUART workaround related to glitches around register accesses
118 */ 118 */
119#define SIBYTE_1956_WAR 1 119#define SIBYTE_1956_WAR 1
@@ -122,7 +122,7 @@
122 122
123/* 123/*
124 * Fill buffers not flushed on CACHE instructions 124 * Fill buffers not flushed on CACHE instructions
125 * 125 *
126 * Hit_Invalidate_I cacheops invalidate an icache line but the refill 126 * Hit_Invalidate_I cacheops invalidate an icache line but the refill
127 * for that line can get stale data from the fill buffer instead of 127 * for that line can get stale data from the fill buffer instead of
128 * accessing memory if the previous icache miss was also to that line. 128 * accessing memory if the previous icache miss was also to that line.
diff --git a/include/asm-mips/xxs1500.h b/include/asm-mips/xxs1500.h
index 75c0ddfeca13..4d84a90b0f20 100644
--- a/include/asm-mips/xxs1500.h
+++ b/include/asm-mips/xxs1500.h
@@ -22,7 +22,7 @@
22 * 22 *
23 * ######################################################################## 23 * ########################################################################
24 * 24 *
25 * 25 *
26 */ 26 */
27#ifndef __ASM_XXS1500_H 27#ifndef __ASM_XXS1500_H
28#define __ASM_XXS1500_H 28#define __ASM_XXS1500_H
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h
index 4a12692f94b4..44eae9f8274d 100644
--- a/include/asm-parisc/page.h
+++ b/include/asm-parisc/page.h
@@ -74,20 +74,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
74#define __pgd(x) ((pgd_t) { (x) } ) 74#define __pgd(x) ((pgd_t) { (x) } )
75#define __pgprot(x) ((pgprot_t) { (x) } ) 75#define __pgprot(x) ((pgprot_t) { (x) } )
76 76
77/* Pure 2^n version of get_order */
78extern __inline__ int get_order(unsigned long size)
79{
80 int order;
81
82 size = (size-1) >> (PAGE_SHIFT-1);
83 order = -1;
84 do {
85 size >>= 1;
86 order++;
87 } while (size);
88 return order;
89}
90
91typedef struct __physmem_range { 77typedef struct __physmem_range {
92 unsigned long start_pfn; 78 unsigned long start_pfn;
93 unsigned long pages; /* PAGE_SIZE pages */ 79 unsigned long pages; /* PAGE_SIZE pages */
@@ -159,4 +145,6 @@ extern int npmem_ranges;
159 145
160#endif /* __KERNEL__ */ 146#endif /* __KERNEL__ */
161 147
148#include <asm-generic/page.h>
149
162#endif /* _PARISC_PAGE_H */ 150#endif /* _PARISC_PAGE_H */
diff --git a/include/asm-parisc/types.h b/include/asm-parisc/types.h
index 8fe7a44ea205..d21b9d0d63ea 100644
--- a/include/asm-parisc/types.h
+++ b/include/asm-parisc/types.h
@@ -56,8 +56,6 @@ typedef unsigned long long u64;
56typedef u32 dma_addr_t; 56typedef u32 dma_addr_t;
57typedef u64 dma64_addr_t; 57typedef u64 dma64_addr_t;
58 58
59typedef unsigned int kmem_bufctl_t;
60
61#endif /* __ASSEMBLY__ */ 59#endif /* __ASSEMBLY__ */
62 60
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-ppc/dma-mapping.h
index 6f74f59938d4..92b8ee78dcc2 100644
--- a/include/asm-ppc/dma-mapping.h
+++ b/include/asm-ppc/dma-mapping.h
@@ -60,7 +60,8 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
60} 60}
61 61
62static inline void *dma_alloc_coherent(struct device *dev, size_t size, 62static inline void *dma_alloc_coherent(struct device *dev, size_t size,
63 dma_addr_t * dma_handle, int gfp) 63 dma_addr_t * dma_handle,
64 unsigned int __nocast gfp)
64{ 65{
65#ifdef CONFIG_NOT_COHERENT_CACHE 66#ifdef CONFIG_NOT_COHERENT_CACHE
66 return __dma_alloc_coherent(size, dma_handle, gfp); 67 return __dma_alloc_coherent(size, dma_handle, gfp);
diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h
index e807be96e981..e992369cb8e9 100644
--- a/include/asm-ppc/ibm4xx.h
+++ b/include/asm-ppc/ibm4xx.h
@@ -19,10 +19,6 @@
19 19
20#ifdef CONFIG_40x 20#ifdef CONFIG_40x
21 21
22#if defined(CONFIG_ASH)
23#include <platforms/4xx/ash.h>
24#endif
25
26#if defined(CONFIG_BUBINGA) 22#if defined(CONFIG_BUBINGA)
27#include <platforms/4xx/bubinga.h> 23#include <platforms/4xx/bubinga.h>
28#endif 24#endif
@@ -35,14 +31,6 @@
35#include <platforms/4xx/ep405.h> 31#include <platforms/4xx/ep405.h>
36#endif 32#endif
37 33
38#if defined(CONFIG_OAK)
39#include <platforms/4xx/oak.h>
40#endif
41
42#if defined(CONFIG_REDWOOD_4)
43#include <platforms/4xx/redwood.h>
44#endif
45
46#if defined(CONFIG_REDWOOD_5) 34#if defined(CONFIG_REDWOOD_5)
47#include <platforms/4xx/redwood5.h> 35#include <platforms/4xx/redwood5.h>
48#endif 36#endif
diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h
index 3f7b5669e6d5..bd7656fa2026 100644
--- a/include/asm-ppc/ibm_ocp.h
+++ b/include/asm-ppc/ibm_ocp.h
@@ -67,6 +67,7 @@ struct ocp_func_emac_data {
67 int phy_mode; /* PHY type or configurable mode */ 67 int phy_mode; /* PHY type or configurable mode */
68 u8 mac_addr[6]; /* EMAC mac address */ 68 u8 mac_addr[6]; /* EMAC mac address */
69 u32 phy_map; /* EMAC phy map */ 69 u32 phy_map; /* EMAC phy map */
70 u32 phy_feat_exc; /* Excluded PHY features */
70}; 71};
71 72
72/* Sysfs support */ 73/* Sysfs support */
@@ -100,6 +101,19 @@ void ocp_show_emac_data(struct device *dev) \
100 device_create_file(dev, &dev_attr_emac_phy_map); \ 101 device_create_file(dev, &dev_attr_emac_phy_map); \
101} 102}
102 103
104/*
105 * PHY mode settings (EMAC <-> ZMII/RGMII bridge <-> PHY)
106 */
107#define PHY_MODE_NA 0
108#define PHY_MODE_MII 1
109#define PHY_MODE_RMII 2
110#define PHY_MODE_SMII 3
111#define PHY_MODE_RGMII 4
112#define PHY_MODE_TBI 5
113#define PHY_MODE_GMII 6
114#define PHY_MODE_RTBI 7
115#define PHY_MODE_SGMII 8
116
103#ifdef CONFIG_40x 117#ifdef CONFIG_40x
104/* 118/*
105 * Helper function to copy MAC addresses from the bd_t to OCP EMAC 119 * Helper function to copy MAC addresses from the bd_t to OCP EMAC
@@ -133,6 +147,7 @@ struct ocp_func_mal_data {
133 int txde_irq; /* TX Descriptor Error IRQ */ 147 int txde_irq; /* TX Descriptor Error IRQ */
134 int rxde_irq; /* RX Descriptor Error IRQ */ 148 int rxde_irq; /* RX Descriptor Error IRQ */
135 int serr_irq; /* MAL System Error IRQ */ 149 int serr_irq; /* MAL System Error IRQ */
150 int dcr_base; /* MALx_CFG DCR number */
136}; 151};
137 152
138#define OCP_SYSFS_MAL_DATA() \ 153#define OCP_SYSFS_MAL_DATA() \
@@ -143,6 +158,7 @@ OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxeob_irq) \
143OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txde_irq) \ 158OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txde_irq) \
144OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxde_irq) \ 159OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxde_irq) \
145OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, serr_irq) \ 160OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, serr_irq) \
161OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, dcr_base) \
146 \ 162 \
147void ocp_show_mal_data(struct device *dev) \ 163void ocp_show_mal_data(struct device *dev) \
148{ \ 164{ \
@@ -153,6 +169,7 @@ void ocp_show_mal_data(struct device *dev) \
153 device_create_file(dev, &dev_attr_mal_txde_irq); \ 169 device_create_file(dev, &dev_attr_mal_txde_irq); \
154 device_create_file(dev, &dev_attr_mal_rxde_irq); \ 170 device_create_file(dev, &dev_attr_mal_rxde_irq); \
155 device_create_file(dev, &dev_attr_mal_serr_irq); \ 171 device_create_file(dev, &dev_attr_mal_serr_irq); \
172 device_create_file(dev, &dev_attr_mal_dcr_base); \
156} 173}
157 174
158/* 175/*
diff --git a/include/asm-ppc/irq.h b/include/asm-ppc/irq.h
index a9b33324f562..a244d93ca953 100644
--- a/include/asm-ppc/irq.h
+++ b/include/asm-ppc/irq.h
@@ -337,6 +337,7 @@ static __inline__ int irq_canonicalize(int irq)
337#define SIU_INT_IDMA3 ((uint)0x08 + CPM_IRQ_OFFSET) 337#define SIU_INT_IDMA3 ((uint)0x08 + CPM_IRQ_OFFSET)
338#define SIU_INT_IDMA4 ((uint)0x09 + CPM_IRQ_OFFSET) 338#define SIU_INT_IDMA4 ((uint)0x09 + CPM_IRQ_OFFSET)
339#define SIU_INT_SDMA ((uint)0x0a + CPM_IRQ_OFFSET) 339#define SIU_INT_SDMA ((uint)0x0a + CPM_IRQ_OFFSET)
340#define SIU_INT_USB ((uint)0x0b + CPM_IRQ_OFFSET)
340#define SIU_INT_TIMER1 ((uint)0x0c + CPM_IRQ_OFFSET) 341#define SIU_INT_TIMER1 ((uint)0x0c + CPM_IRQ_OFFSET)
341#define SIU_INT_TIMER2 ((uint)0x0d + CPM_IRQ_OFFSET) 342#define SIU_INT_TIMER2 ((uint)0x0d + CPM_IRQ_OFFSET)
342#define SIU_INT_TIMER3 ((uint)0x0e + CPM_IRQ_OFFSET) 343#define SIU_INT_TIMER3 ((uint)0x0e + CPM_IRQ_OFFSET)
diff --git a/include/asm-ppc/kmap_types.h b/include/asm-ppc/kmap_types.h
index 2589f182a6ad..6d6fc78731e5 100644
--- a/include/asm-ppc/kmap_types.h
+++ b/include/asm-ppc/kmap_types.h
@@ -17,6 +17,7 @@ enum km_type {
17 KM_SOFTIRQ0, 17 KM_SOFTIRQ0,
18 KM_SOFTIRQ1, 18 KM_SOFTIRQ1,
19 KM_PPC_SYNC_PAGE, 19 KM_PPC_SYNC_PAGE,
20 KM_PPC_SYNC_ICACHE,
20 KM_TYPE_NR 21 KM_TYPE_NR
21}; 22};
22 23
diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
index 89eb8a2ac693..9694eca16e92 100644
--- a/include/asm-ppc/mpc8260.h
+++ b/include/asm-ppc/mpc8260.h
@@ -67,6 +67,24 @@
67#define IO_VIRT_ADDR IO_PHYS_ADDR 67#define IO_VIRT_ADDR IO_PHYS_ADDR
68#endif 68#endif
69 69
70enum ppc_sys_devices {
71 MPC82xx_CPM_FCC1,
72 MPC82xx_CPM_FCC2,
73 MPC82xx_CPM_FCC3,
74 MPC82xx_CPM_I2C,
75 MPC82xx_CPM_SCC1,
76 MPC82xx_CPM_SCC2,
77 MPC82xx_CPM_SCC3,
78 MPC82xx_CPM_SCC4,
79 MPC82xx_CPM_SPI,
80 MPC82xx_CPM_MCC1,
81 MPC82xx_CPM_MCC2,
82 MPC82xx_CPM_SMC1,
83 MPC82xx_CPM_SMC2,
84 MPC82xx_CPM_USB,
85 MPC82xx_SEC1,
86};
87
70#ifndef __ASSEMBLY__ 88#ifndef __ASSEMBLY__
71/* The "residual" data board information structure the boot loader 89/* The "residual" data board information structure the boot loader
72 * hands to us. 90 * hands to us.
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index 7c31f2d564a1..dc8e59896050 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -36,10 +36,6 @@
36#include <platforms/tqm8xx.h> 36#include <platforms/tqm8xx.h>
37#endif 37#endif
38 38
39#if defined(CONFIG_SPD823TS)
40#include <platforms/spd8xx.h>
41#endif
42
43#if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24) 39#if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)
44#include <platforms/ivms8.h> 40#include <platforms/ivms8.h>
45#endif 41#endif
diff --git a/include/asm-ppc/mv64x60.h b/include/asm-ppc/mv64x60.h
index cc25b921ad4f..835930d6faa1 100644
--- a/include/asm-ppc/mv64x60.h
+++ b/include/asm-ppc/mv64x60.h
@@ -278,6 +278,13 @@ mv64x60_modify(struct mv64x60_handle *bh, u32 offs, u32 data, u32 mask)
278#define mv64x60_set_bits(bh, offs, bits) mv64x60_modify(bh, offs, ~0, bits) 278#define mv64x60_set_bits(bh, offs, bits) mv64x60_modify(bh, offs, ~0, bits)
279#define mv64x60_clr_bits(bh, offs, bits) mv64x60_modify(bh, offs, 0, bits) 279#define mv64x60_clr_bits(bh, offs, bits) mv64x60_modify(bh, offs, 0, bits)
280 280
281#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
282#define MV64XXX_DEV_NAME "mv64xxx"
283
284struct mv64xxx_pdata {
285 u32 hs_reg_valid;
286};
287#endif
281 288
282/* Externally visible function prototypes */ 289/* Externally visible function prototypes */
283int mv64x60_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si); 290int mv64x60_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si);
diff --git a/include/asm-ppc/mv64x60_defs.h b/include/asm-ppc/mv64x60_defs.h
index 2f428746c02b..f8f7f16b9b53 100644
--- a/include/asm-ppc/mv64x60_defs.h
+++ b/include/asm-ppc/mv64x60_defs.h
@@ -333,7 +333,7 @@
333/* 333/*
334 ***************************************************************************** 334 *****************************************************************************
335 * 335 *
336 * SRAM Cotnroller Registers 336 * SRAM Controller Registers
337 * 337 *
338 ***************************************************************************** 338 *****************************************************************************
339 */ 339 */
@@ -352,7 +352,7 @@
352/* 352/*
353 ***************************************************************************** 353 *****************************************************************************
354 * 354 *
355 * SDRAM/MEM Cotnroller Registers 355 * SDRAM/MEM Controller Registers
356 * 356 *
357 ***************************************************************************** 357 *****************************************************************************
358 */ 358 */
@@ -375,6 +375,7 @@
375/* SDRAM Control Registers */ 375/* SDRAM Control Registers */
376#define MV64360_D_UNIT_CONTROL_LOW 0x1404 376#define MV64360_D_UNIT_CONTROL_LOW 0x1404
377#define MV64360_D_UNIT_CONTROL_HIGH 0x1424 377#define MV64360_D_UNIT_CONTROL_HIGH 0x1424
378#define MV64460_D_UNIT_MMASK 0x14b0
378 379
379/* SDRAM Error Report Registers (64360) */ 380/* SDRAM Error Report Registers (64360) */
380#define MV64360_SDRAM_ERR_DATA_LO 0x1444 381#define MV64360_SDRAM_ERR_DATA_LO 0x1444
@@ -388,7 +389,7 @@
388/* 389/*
389 ***************************************************************************** 390 *****************************************************************************
390 * 391 *
391 * Device/BOOT Cotnroller Registers 392 * Device/BOOT Controller Registers
392 * 393 *
393 ***************************************************************************** 394 *****************************************************************************
394 */ 395 */
@@ -680,6 +681,8 @@
680#define MV64x60_PCI1_SLAVE_P2P_IO_REMAP 0x0dec 681#define MV64x60_PCI1_SLAVE_P2P_IO_REMAP 0x0dec
681#define MV64x60_PCI1_SLAVE_CPU_REMAP 0x0df0 682#define MV64x60_PCI1_SLAVE_CPU_REMAP 0x0df0
682 683
684#define MV64360_PCICFG_CPCI_HOTSWAP 0x68
685
683/* 686/*
684 ***************************************************************************** 687 *****************************************************************************
685 * 688 *
diff --git a/include/asm-ppc/param.h b/include/asm-ppc/param.h
index b24a4e37196a..6198b1657a45 100644
--- a/include/asm-ppc/param.h
+++ b/include/asm-ppc/param.h
@@ -1,8 +1,10 @@
1#ifndef _ASM_PPC_PARAM_H 1#ifndef _ASM_PPC_PARAM_H
2#define _ASM_PPC_PARAM_H 2#define _ASM_PPC_PARAM_H
3 3
4#include <linux/config.h>
5
4#ifdef __KERNEL__ 6#ifdef __KERNEL__
5#define HZ 1000 /* internal timer frequency */ 7#define HZ CONFIG_HZ /* internal timer frequency */
6#define USER_HZ 100 /* for user interfaces in "ticks" */ 8#define USER_HZ 100 /* for user interfaces in "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ 9#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
8#endif /* __KERNEL__ */ 10#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 8ea624566231..048f7c8596ee 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -21,7 +21,9 @@
21#include <linux/device.h> 21#include <linux/device.h>
22#include <linux/types.h> 22#include <linux/types.h>
23 23
24#if defined(CONFIG_83xx) 24#if defined(CONFIG_8260)
25#include <asm/mpc8260.h>
26#elif defined(CONFIG_83xx)
25#include <asm/mpc83xx.h> 27#include <asm/mpc83xx.h>
26#elif defined(CONFIG_85xx) 28#elif defined(CONFIG_85xx)
27#include <asm/mpc85xx.h> 29#include <asm/mpc85xx.h>
@@ -50,6 +52,7 @@ extern struct ppc_sys_spec *cur_ppc_sys_spec;
50/* determine which specific SOC we are */ 52/* determine which specific SOC we are */
51extern void identify_ppc_sys_by_id(u32 id) __init; 53extern void identify_ppc_sys_by_id(u32 id) __init;
52extern void identify_ppc_sys_by_name(char *name) __init; 54extern void identify_ppc_sys_by_name(char *name) __init;
55extern void identify_ppc_sys_by_name_and_id(char *name, u32 id) __init;
53 56
54/* describes all devices that may exist in a given family of processors */ 57/* describes all devices that may exist in a given family of processors */
55extern struct platform_device ppc_sys_platform_devices[]; 58extern struct platform_device ppc_sys_platform_devices[];
diff --git a/include/asm-ppc/serial.h b/include/asm-ppc/serial.h
index 6d47438be58c..485a924e4d06 100644
--- a/include/asm-ppc/serial.h
+++ b/include/asm-ppc/serial.h
@@ -18,8 +18,6 @@
18#include <platforms/powerpmc250.h> 18#include <platforms/powerpmc250.h>
19#elif defined(CONFIG_LOPEC) 19#elif defined(CONFIG_LOPEC)
20#include <platforms/lopec.h> 20#include <platforms/lopec.h>
21#elif defined(CONFIG_MCPN765)
22#include <platforms/mcpn765.h>
23#elif defined(CONFIG_MVME5100) 21#elif defined(CONFIG_MVME5100)
24#include <platforms/mvme5100.h> 22#include <platforms/mvme5100.h>
25#elif defined(CONFIG_PAL4) 23#elif defined(CONFIG_PAL4)
diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h
index 82395f30004b..513a334c5810 100644
--- a/include/asm-ppc/system.h
+++ b/include/asm-ppc/system.h
@@ -84,9 +84,14 @@ extern void cvt_fd(float *from, double *to, unsigned long *fpscr);
84extern void cvt_df(double *from, float *to, unsigned long *fpscr); 84extern void cvt_df(double *from, float *to, unsigned long *fpscr);
85extern int call_rtas(const char *, int, int, unsigned long *, ...); 85extern int call_rtas(const char *, int, int, unsigned long *, ...);
86extern void cacheable_memzero(void *p, unsigned int nb); 86extern void cacheable_memzero(void *p, unsigned int nb);
87extern void *cacheable_memcpy(void *, const void *, unsigned int);
87extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long); 88extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
88extern void bad_page_fault(struct pt_regs *, unsigned long, int); 89extern void bad_page_fault(struct pt_regs *, unsigned long, int);
89extern void die(const char *, struct pt_regs *, long); 90extern void die(const char *, struct pt_regs *, long);
91#ifdef CONFIG_BOOKE_WDT
92extern u32 booke_wdt_enabled;
93extern u32 booke_wdt_period;
94#endif /* CONFIG_BOOKE_WDT */
90 95
91struct device_node; 96struct device_node;
92extern void note_scsi_host(struct device_node *, void *); 97extern void note_scsi_host(struct device_node *, void *);
diff --git a/include/asm-ppc/types.h b/include/asm-ppc/types.h
index a787bc032587..77dc24d7d2ad 100644
--- a/include/asm-ppc/types.h
+++ b/include/asm-ppc/types.h
@@ -62,8 +62,6 @@ typedef u64 sector_t;
62#define HAVE_SECTOR_T 62#define HAVE_SECTOR_T
63#endif 63#endif
64 64
65typedef unsigned int kmem_bufctl_t;
66
67#endif /* __ASSEMBLY__ */ 65#endif /* __ASSEMBLY__ */
68 66
69#endif /* __KERNEL__ */ 67#endif /* __KERNEL__ */
diff --git a/include/asm-ppc64/lmb.h b/include/asm-ppc64/lmb.h
index cb368bf0f264..de91e034bd98 100644
--- a/include/asm-ppc64/lmb.h
+++ b/include/asm-ppc64/lmb.h
@@ -56,4 +56,26 @@ extern void lmb_dump_all(void);
56 56
57extern unsigned long io_hole_start; 57extern unsigned long io_hole_start;
58 58
59static inline unsigned long
60lmb_size_bytes(struct lmb_region *type, unsigned long region_nr)
61{
62 return type->region[region_nr].size;
63}
64static inline unsigned long
65lmb_size_pages(struct lmb_region *type, unsigned long region_nr)
66{
67 return lmb_size_bytes(type, region_nr) >> PAGE_SHIFT;
68}
69static inline unsigned long
70lmb_start_pfn(struct lmb_region *type, unsigned long region_nr)
71{
72 return type->region[region_nr].base >> PAGE_SHIFT;
73}
74static inline unsigned long
75lmb_end_pfn(struct lmb_region *type, unsigned long region_nr)
76{
77 return lmb_start_pfn(type, region_nr) +
78 lmb_size_pages(type, region_nr);
79}
80
59#endif /* _PPC64_LMB_H */ 81#endif /* _PPC64_LMB_H */
diff --git a/include/asm-ppc64/lppaca.h b/include/asm-ppc64/lppaca.h
index 70766b5f26c1..9e2a6c0649a0 100644
--- a/include/asm-ppc64/lppaca.h
+++ b/include/asm-ppc64/lppaca.h
@@ -108,7 +108,7 @@ struct lppaca
108 volatile u32 virtual_decr; // Virtual DECR for shared procsx78-x7B 108 volatile u32 virtual_decr; // Virtual DECR for shared procsx78-x7B
109 u16 slb_count; // # of SLBs to maintain x7C-x7D 109 u16 slb_count; // # of SLBs to maintain x7C-x7D
110 u8 idle; // Indicate OS is idle x7E 110 u8 idle; // Indicate OS is idle x7E
111 u8 reserved5; // Reserved x7F 111 u8 vmxregs_in_use; // VMX registers in use x7F
112 112
113 113
114//============================================================================= 114//=============================================================================
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h
index a79a08df62bd..a15422bcf30d 100644
--- a/include/asm-ppc64/page.h
+++ b/include/asm-ppc64/page.h
@@ -172,20 +172,6 @@ typedef unsigned long pgprot_t;
172 172
173#endif 173#endif
174 174
175/* Pure 2^n version of get_order */
176static inline int get_order(unsigned long size)
177{
178 int order;
179
180 size = (size-1) >> (PAGE_SHIFT-1);
181 order = -1;
182 do {
183 size >>= 1;
184 order++;
185 } while (size);
186 return order;
187}
188
189#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) 175#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
190 176
191extern int page_is_ram(unsigned long pfn); 177extern int page_is_ram(unsigned long pfn);
@@ -270,4 +256,7 @@ extern u64 ppc64_pft_size; /* Log 2 of page table size */
270 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64) 256 VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
271 257
272#endif /* __KERNEL__ */ 258#endif /* __KERNEL__ */
259
260#include <asm-generic/page.h>
261
273#endif /* _PPC64_PAGE_H */ 262#endif /* _PPC64_PAGE_H */
diff --git a/include/asm-ppc64/types.h b/include/asm-ppc64/types.h
index 5b8c2cfa1138..bf294c1761b2 100644
--- a/include/asm-ppc64/types.h
+++ b/include/asm-ppc64/types.h
@@ -72,7 +72,6 @@ typedef struct {
72 unsigned long env; 72 unsigned long env;
73} func_descr_t; 73} func_descr_t;
74 74
75typedef unsigned int kmem_bufctl_t;
76#endif /* __ASSEMBLY__ */ 75#endif /* __ASSEMBLY__ */
77 76
78#endif /* __KERNEL__ */ 77#endif /* __KERNEL__ */
diff --git a/include/asm-s390/debug.h b/include/asm-s390/debug.h
index 92360d90144b..7127030ae162 100644
--- a/include/asm-s390/debug.h
+++ b/include/asm-s390/debug.h
@@ -52,8 +52,6 @@ struct __debug_entry{
52#define DEBUG_DATA(entry) (char*)(entry + 1) /* data is stored behind */ 52#define DEBUG_DATA(entry) (char*)(entry + 1) /* data is stored behind */
53 /* the entry information */ 53 /* the entry information */
54 54
55#define STCK(x) asm volatile ("STCK 0(%1)" : "=m" (x) : "a" (&(x)) : "cc")
56
57typedef struct __debug_entry debug_entry_t; 55typedef struct __debug_entry debug_entry_t;
58 56
59struct debug_view; 57struct debug_view;
diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h
index afe6a9f9b0ae..c6f51c9ce3ff 100644
--- a/include/asm-s390/lowcore.h
+++ b/include/asm-s390/lowcore.h
@@ -68,6 +68,7 @@
68#define __LC_SYSTEM_TIMER 0x270 68#define __LC_SYSTEM_TIMER 0x270
69#define __LC_LAST_UPDATE_CLOCK 0x278 69#define __LC_LAST_UPDATE_CLOCK 0x278
70#define __LC_STEAL_CLOCK 0x280 70#define __LC_STEAL_CLOCK 0x280
71#define __LC_RETURN_MCCK_PSW 0x288
71#define __LC_KERNEL_STACK 0xC40 72#define __LC_KERNEL_STACK 0xC40
72#define __LC_THREAD_INFO 0xC44 73#define __LC_THREAD_INFO 0xC44
73#define __LC_ASYNC_STACK 0xC48 74#define __LC_ASYNC_STACK 0xC48
@@ -90,6 +91,7 @@
90#define __LC_SYSTEM_TIMER 0x278 91#define __LC_SYSTEM_TIMER 0x278
91#define __LC_LAST_UPDATE_CLOCK 0x280 92#define __LC_LAST_UPDATE_CLOCK 0x280
92#define __LC_STEAL_CLOCK 0x288 93#define __LC_STEAL_CLOCK 0x288
94#define __LC_RETURN_MCCK_PSW 0x290
93#define __LC_KERNEL_STACK 0xD40 95#define __LC_KERNEL_STACK 0xD40
94#define __LC_THREAD_INFO 0xD48 96#define __LC_THREAD_INFO 0xD48
95#define __LC_ASYNC_STACK 0xD50 97#define __LC_ASYNC_STACK 0xD50
@@ -196,7 +198,8 @@ struct _lowcore
196 __u64 system_timer; /* 0x270 */ 198 __u64 system_timer; /* 0x270 */
197 __u64 last_update_clock; /* 0x278 */ 199 __u64 last_update_clock; /* 0x278 */
198 __u64 steal_clock; /* 0x280 */ 200 __u64 steal_clock; /* 0x280 */
199 __u8 pad8[0xc00-0x288]; /* 0x288 */ 201 psw_t return_mcck_psw; /* 0x288 */
202 __u8 pad8[0xc00-0x290]; /* 0x290 */
200 203
201 /* System info area */ 204 /* System info area */
202 __u32 save_area[16]; /* 0xc00 */ 205 __u32 save_area[16]; /* 0xc00 */
@@ -285,7 +288,8 @@ struct _lowcore
285 __u64 system_timer; /* 0x278 */ 288 __u64 system_timer; /* 0x278 */
286 __u64 last_update_clock; /* 0x280 */ 289 __u64 last_update_clock; /* 0x280 */
287 __u64 steal_clock; /* 0x288 */ 290 __u64 steal_clock; /* 0x288 */
288 __u8 pad8[0xc00-0x290]; /* 0x290 */ 291 psw_t return_mcck_psw; /* 0x290 */
292 __u8 pad8[0xc00-0x2a0]; /* 0x2a0 */
289 /* System info area */ 293 /* System info area */
290 __u64 save_area[16]; /* 0xc00 */ 294 __u64 save_area[16]; /* 0xc00 */
291 __u8 pad9[0xd40-0xc80]; /* 0xc80 */ 295 __u8 pad9[0xd40-0xc80]; /* 0xc80 */
diff --git a/include/asm-s390/page.h b/include/asm-s390/page.h
index 2be287b9df88..2430c561e021 100644
--- a/include/asm-s390/page.h
+++ b/include/asm-s390/page.h
@@ -111,20 +111,6 @@ static inline void copy_page(void *to, void *from)
111#define alloc_zeroed_user_highpage(vma, vaddr) alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO, vma, vaddr) 111#define alloc_zeroed_user_highpage(vma, vaddr) alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO, vma, vaddr)
112#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE 112#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
113 113
114/* Pure 2^n version of get_order */
115extern __inline__ int get_order(unsigned long size)
116{
117 int order;
118
119 size = (size-1) >> (PAGE_SHIFT-1);
120 order = -1;
121 do {
122 size >>= 1;
123 order++;
124 } while (size);
125 return order;
126}
127
128/* 114/*
129 * These are used to make use of C type-checking.. 115 * These are used to make use of C type-checking..
130 */ 116 */
@@ -207,4 +193,6 @@ page_get_storage_key(unsigned long addr)
207 193
208#endif /* __KERNEL__ */ 194#endif /* __KERNEL__ */
209 195
196#include <asm-generic/page.h>
197
210#endif /* _S390_PAGE_H */ 198#endif /* _S390_PAGE_H */
diff --git a/include/asm-s390/spinlock.h b/include/asm-s390/spinlock.h
index 8ff10300f7ee..321b23bba1ec 100644
--- a/include/asm-s390/spinlock.h
+++ b/include/asm-s390/spinlock.h
@@ -47,7 +47,7 @@ extern int _raw_spin_trylock_retry(spinlock_t *lp, unsigned int pc);
47 47
48static inline void _raw_spin_lock(spinlock_t *lp) 48static inline void _raw_spin_lock(spinlock_t *lp)
49{ 49{
50 unsigned long pc = (unsigned long) __builtin_return_address(0); 50 unsigned long pc = 1 | (unsigned long) __builtin_return_address(0);
51 51
52 if (unlikely(_raw_compare_and_swap(&lp->lock, 0, pc) != 0)) 52 if (unlikely(_raw_compare_and_swap(&lp->lock, 0, pc) != 0))
53 _raw_spin_lock_wait(lp, pc); 53 _raw_spin_lock_wait(lp, pc);
@@ -55,7 +55,7 @@ static inline void _raw_spin_lock(spinlock_t *lp)
55 55
56static inline int _raw_spin_trylock(spinlock_t *lp) 56static inline int _raw_spin_trylock(spinlock_t *lp)
57{ 57{
58 unsigned long pc = (unsigned long) __builtin_return_address(0); 58 unsigned long pc = 1 | (unsigned long) __builtin_return_address(0);
59 59
60 if (likely(_raw_compare_and_swap(&lp->lock, 0, pc) == 0)) 60 if (likely(_raw_compare_and_swap(&lp->lock, 0, pc) == 0))
61 return 1; 61 return 1;
diff --git a/include/asm-s390/types.h b/include/asm-s390/types.h
index 3fefd61416a5..d0be3e477013 100644
--- a/include/asm-s390/types.h
+++ b/include/asm-s390/types.h
@@ -79,8 +79,6 @@ typedef unsigned long u64;
79 79
80typedef u32 dma_addr_t; 80typedef u32 dma_addr_t;
81 81
82typedef unsigned int kmem_bufctl_t;
83
84#ifndef __s390x__ 82#ifndef __s390x__
85typedef union { 83typedef union {
86 unsigned long long pair; 84 unsigned long long pair;
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index 180467be8e7b..324e6cc5ecf7 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -122,24 +122,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
122#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 122#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
123 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 123 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
124 124
125#ifndef __ASSEMBLY__
126
127/* Pure 2^n version of get_order */
128static __inline__ int get_order(unsigned long size)
129{
130 int order;
131
132 size = (size-1) >> (PAGE_SHIFT-1);
133 order = -1;
134 do {
135 size >>= 1;
136 order++;
137 } while (size);
138 return order;
139}
140
141#endif
142
143#endif /* __KERNEL__ */ 125#endif /* __KERNEL__ */
144 126
127#include <asm-generic/page.h>
128
145#endif /* __ASM_SH_PAGE_H */ 129#endif /* __ASM_SH_PAGE_H */
diff --git a/include/asm-sh/types.h b/include/asm-sh/types.h
index c4dc126c5621..cb7e183a0a6b 100644
--- a/include/asm-sh/types.h
+++ b/include/asm-sh/types.h
@@ -58,8 +58,6 @@ typedef u64 sector_t;
58#define HAVE_SECTOR_T 58#define HAVE_SECTOR_T
59#endif 59#endif
60 60
61typedef unsigned int kmem_bufctl_t;
62
63#endif /* __ASSEMBLY__ */ 61#endif /* __ASSEMBLY__ */
64 62
65#endif /* __KERNEL__ */ 63#endif /* __KERNEL__ */
diff --git a/include/asm-sh64/page.h b/include/asm-sh64/page.h
index d6167f1c0e99..c86df90f7cbd 100644
--- a/include/asm-sh64/page.h
+++ b/include/asm-sh64/page.h
@@ -115,24 +115,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
115#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 115#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
116 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 116 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
117 117
118#ifndef __ASSEMBLY__
119
120/* Pure 2^n version of get_order */
121extern __inline__ int get_order(unsigned long size)
122{
123 int order;
124
125 size = (size-1) >> (PAGE_SHIFT-1);
126 order = -1;
127 do {
128 size >>= 1;
129 order++;
130 } while (size);
131 return order;
132}
133
134#endif
135
136#endif /* __KERNEL__ */ 118#endif /* __KERNEL__ */
137 119
120#include <asm-generic/page.h>
121
138#endif /* __ASM_SH64_PAGE_H */ 122#endif /* __ASM_SH64_PAGE_H */
diff --git a/include/asm-sh64/types.h b/include/asm-sh64/types.h
index 41d4d2f82aa9..8d41db2153b5 100644
--- a/include/asm-sh64/types.h
+++ b/include/asm-sh64/types.h
@@ -65,8 +65,6 @@ typedef u32 dma_addr_t;
65#endif 65#endif
66typedef u64 dma64_addr_t; 66typedef u64 dma64_addr_t;
67 67
68typedef unsigned int kmem_bufctl_t;
69
70#endif /* __ASSEMBLY__ */ 68#endif /* __ASSEMBLY__ */
71 69
72#define BITS_PER_LONG 32 70#define BITS_PER_LONG 32
diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h
index 383060e90d94..9122684f6c1e 100644
--- a/include/asm-sparc/page.h
+++ b/include/asm-sparc/page.h
@@ -132,20 +132,6 @@ BTFIXUPDEF_SETHI(sparc_unmapped_base)
132 132
133#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base) 133#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base)
134 134
135/* Pure 2^n version of get_order */
136extern __inline__ int get_order(unsigned long size)
137{
138 int order;
139
140 size = (size-1) >> (PAGE_SHIFT-1);
141 order = -1;
142 do {
143 size >>= 1;
144 order++;
145 } while (size);
146 return order;
147}
148
149#else /* !(__ASSEMBLY__) */ 135#else /* !(__ASSEMBLY__) */
150 136
151#define __pgprot(x) (x) 137#define __pgprot(x) (x)
@@ -178,4 +164,6 @@ extern unsigned long pfn_base;
178 164
179#endif /* __KERNEL__ */ 165#endif /* __KERNEL__ */
180 166
167#include <asm-generic/page.h>
168
181#endif /* _SPARC_PAGE_H */ 169#endif /* _SPARC_PAGE_H */
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index 40ed30a2b7c6..8f4f6a959651 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -435,9 +435,6 @@ extern unsigned long *sparc_valid_addr_bitmap;
435#define kern_addr_valid(addr) \ 435#define kern_addr_valid(addr) \
436 (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) 436 (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap))
437 437
438extern int io_remap_page_range(struct vm_area_struct *vma,
439 unsigned long from, unsigned long to,
440 unsigned long size, pgprot_t prot, int space);
441extern int io_remap_pfn_range(struct vm_area_struct *vma, 438extern int io_remap_pfn_range(struct vm_area_struct *vma,
442 unsigned long from, unsigned long pfn, 439 unsigned long from, unsigned long pfn,
443 unsigned long size, pgprot_t prot); 440 unsigned long size, pgprot_t prot);
diff --git a/include/asm-sparc/types.h b/include/asm-sparc/types.h
index 9eabf6e61ccc..42fc6ed98156 100644
--- a/include/asm-sparc/types.h
+++ b/include/asm-sparc/types.h
@@ -54,8 +54,6 @@ typedef unsigned long long u64;
54typedef u32 dma_addr_t; 54typedef u32 dma_addr_t;
55typedef u32 dma64_addr_t; 55typedef u32 dma64_addr_t;
56 56
57typedef unsigned short kmem_bufctl_t;
58
59#endif /* __ASSEMBLY__ */ 57#endif /* __ASSEMBLY__ */
60 58
61#endif /* __KERNEL__ */ 59#endif /* __KERNEL__ */
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index cc7198aaac50..9a3a81f1cc58 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -1,6 +1,6 @@
1/* cpudata.h: Per-cpu parameters. 1/* cpudata.h: Per-cpu parameters.
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2005 David S. Miller (davem@redhat.com)
4 */ 4 */
5 5
6#ifndef _SPARC64_CPUDATA_H 6#ifndef _SPARC64_CPUDATA_H
@@ -10,7 +10,7 @@
10 10
11typedef struct { 11typedef struct {
12 /* Dcache line 1 */ 12 /* Dcache line 1 */
13 unsigned int __pad0; /* bh_count moved to irq_stat for consistency. KAO */ 13 unsigned int __softirq_pending; /* must be 1st, see rtrap.S */
14 unsigned int multiplier; 14 unsigned int multiplier;
15 unsigned int counter; 15 unsigned int counter;
16 unsigned int idle_volume; 16 unsigned int idle_volume;
diff --git a/include/asm-sparc64/hardirq.h b/include/asm-sparc64/hardirq.h
index d6db1aed7645..f0cf71376ec5 100644
--- a/include/asm-sparc64/hardirq.h
+++ b/include/asm-sparc64/hardirq.h
@@ -1,22 +1,16 @@
1/* hardirq.h: 64-bit Sparc hard IRQ support. 1/* hardirq.h: 64-bit Sparc hard IRQ support.
2 * 2 *
3 * Copyright (C) 1997, 1998 David S. Miller (davem@caip.rutgers.edu) 3 * Copyright (C) 1997, 1998, 2005 David S. Miller (davem@davemloft.net)
4 */ 4 */
5 5
6#ifndef __SPARC64_HARDIRQ_H 6#ifndef __SPARC64_HARDIRQ_H
7#define __SPARC64_HARDIRQ_H 7#define __SPARC64_HARDIRQ_H
8 8
9#include <linux/config.h> 9#include <asm/cpudata.h>
10#include <linux/threads.h>
11#include <linux/spinlock.h>
12#include <linux/cache.h>
13 10
14/* rtrap.S is sensitive to the offsets of these fields */ 11#define __ARCH_IRQ_STAT
15typedef struct { 12#define local_softirq_pending() \
16 unsigned int __softirq_pending; 13 (local_cpu_data().__softirq_pending)
17} ____cacheline_aligned irq_cpustat_t;
18
19#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
20 14
21#define HARDIRQ_BITS 8 15#define HARDIRQ_BITS 8
22 16
diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h
index afdcea90707a..0056770e83ad 100644
--- a/include/asm-sparc64/io.h
+++ b/include/asm-sparc64/io.h
@@ -100,18 +100,41 @@ static __inline__ void _outl(u32 l, unsigned long addr)
100#define inl_p(__addr) inl(__addr) 100#define inl_p(__addr) inl(__addr)
101#define outl_p(__l, __addr) outl(__l, __addr) 101#define outl_p(__l, __addr) outl(__l, __addr)
102 102
103extern void outsb(void __iomem *addr, const void *src, unsigned long count); 103extern void outsb(unsigned long, const void *, unsigned long);
104extern void outsw(void __iomem *addr, const void *src, unsigned long count); 104extern void outsw(unsigned long, const void *, unsigned long);
105extern void outsl(void __iomem *addr, const void *src, unsigned long count); 105extern void outsl(unsigned long, const void *, unsigned long);
106extern void insb(void __iomem *addr, void *dst, unsigned long count); 106extern void insb(unsigned long, void *, unsigned long);
107extern void insw(void __iomem *addr, void *dst, unsigned long count); 107extern void insw(unsigned long, void *, unsigned long);
108extern void insl(void __iomem *addr, void *dst, unsigned long count); 108extern void insl(unsigned long, void *, unsigned long);
109#define ioread8_rep(a,d,c) insb(a,d,c) 109
110#define ioread16_rep(a,d,c) insw(a,d,c) 110static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count)
111#define ioread32_rep(a,d,c) insl(a,d,c) 111{
112#define iowrite8_rep(a,s,c) outsb(a,s,c) 112 insb((unsigned long __force)port, buf, count);
113#define iowrite16_rep(a,s,c) outsw(a,s,c) 113}
114#define iowrite32_rep(a,s,c) outsl(a,s,c) 114static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count)
115{
116 insw((unsigned long __force)port, buf, count);
117}
118
119static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count)
120{
121 insl((unsigned long __force)port, buf, count);
122}
123
124static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count)
125{
126 outsb((unsigned long __force)port, buf, count);
127}
128
129static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count)
130{
131 outsw((unsigned long __force)port, buf, count);
132}
133
134static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count)
135{
136 outsl((unsigned long __force)port, buf, count);
137}
115 138
116/* Memory functions, same as I/O accesses on Ultra. */ 139/* Memory functions, same as I/O accesses on Ultra. */
117static inline u8 _readb(const volatile void __iomem *addr) 140static inline u8 _readb(const volatile void __iomem *addr)
diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h
index b87dbbd64bc9..c9f8ef208ea5 100644
--- a/include/asm-sparc64/page.h
+++ b/include/asm-sparc64/page.h
@@ -150,20 +150,6 @@ struct sparc_phys_banks {
150 150
151extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS]; 151extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS];
152 152
153/* Pure 2^n version of get_order */
154static __inline__ int get_order(unsigned long size)
155{
156 int order;
157
158 size = (size-1) >> (PAGE_SHIFT-1);
159 order = -1;
160 do {
161 size >>= 1;
162 order++;
163 } while (size);
164 return order;
165}
166
167#endif /* !(__ASSEMBLY__) */ 153#endif /* !(__ASSEMBLY__) */
168 154
169#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 155#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
@@ -171,4 +157,6 @@ static __inline__ int get_order(unsigned long size)
171 157
172#endif /* !(__KERNEL__) */ 158#endif /* !(__KERNEL__) */
173 159
160#include <asm-generic/page.h>
161
174#endif /* !(_SPARC64_PAGE_H) */ 162#endif /* !(_SPARC64_PAGE_H) */
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 1ae00c5087f1..a2b4f5ed4625 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -410,9 +410,6 @@ extern unsigned long *sparc64_valid_addr_bitmap;
410#define kern_addr_valid(addr) \ 410#define kern_addr_valid(addr) \
411 (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap)) 411 (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
412 412
413extern int io_remap_page_range(struct vm_area_struct *vma, unsigned long from,
414 unsigned long offset,
415 unsigned long size, pgprot_t prot, int space);
416extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, 413extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
417 unsigned long pfn, 414 unsigned long pfn,
418 unsigned long size, pgprot_t prot); 415 unsigned long size, pgprot_t prot);
diff --git a/include/asm-sparc64/types.h b/include/asm-sparc64/types.h
index 6248ed1a9a7a..d0ee7f105838 100644
--- a/include/asm-sparc64/types.h
+++ b/include/asm-sparc64/types.h
@@ -56,8 +56,6 @@ typedef unsigned long u64;
56typedef u32 dma_addr_t; 56typedef u32 dma_addr_t;
57typedef u64 dma64_addr_t; 57typedef u64 dma64_addr_t;
58 58
59typedef unsigned short kmem_bufctl_t;
60
61#endif /* __ASSEMBLY__ */ 59#endif /* __ASSEMBLY__ */
62 60
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
diff --git a/include/asm-um/mmu_context.h b/include/asm-um/mmu_context.h
index 095bb627b96a..2edb4f1f789c 100644
--- a/include/asm-um/mmu_context.h
+++ b/include/asm-um/mmu_context.h
@@ -20,7 +20,15 @@ extern void force_flush_all(void);
20 20
21static inline void activate_mm(struct mm_struct *old, struct mm_struct *new) 21static inline void activate_mm(struct mm_struct *old, struct mm_struct *new)
22{ 22{
23 if (old != new) 23 /*
24 * This is called by fs/exec.c and fs/aio.c. In the first case, for an
25 * exec, we don't need to do anything as we're called from userspace
26 * and thus going to use a new host PID. In the second, we're called
27 * from a kernel thread, and thus need to go doing the mmap's on the
28 * host. Since they're very expensive, we want to avoid that as far as
29 * possible.
30 */
31 if (old != new && (current->flags & PF_BORROWED_MM))
24 force_flush_all(); 32 force_flush_all();
25} 33}
26 34
diff --git a/include/asm-um/page.h b/include/asm-um/page.h
index f58aedadeb4e..bd850a249183 100644
--- a/include/asm-um/page.h
+++ b/include/asm-um/page.h
@@ -116,24 +116,12 @@ extern void *to_virt(unsigned long phys);
116#define pfn_valid(pfn) ((pfn) < max_mapnr) 116#define pfn_valid(pfn) ((pfn) < max_mapnr)
117#define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v))) 117#define virt_addr_valid(v) pfn_valid(phys_to_pfn(__pa(v)))
118 118
119/* Pure 2^n version of get_order */
120static __inline__ int get_order(unsigned long size)
121{
122 int order;
123
124 size = (size-1) >> (PAGE_SHIFT-1);
125 order = -1;
126 do {
127 size >>= 1;
128 order++;
129 } while (size);
130 return order;
131}
132
133extern struct page *arch_validate(struct page *page, int mask, int order); 119extern struct page *arch_validate(struct page *page, int mask, int order);
134#define HAVE_ARCH_VALIDATE 120#define HAVE_ARCH_VALIDATE
135 121
136extern void arch_free_page(struct page *page, int order); 122extern void arch_free_page(struct page *page, int order);
137#define HAVE_ARCH_FREE_PAGE 123#define HAVE_ARCH_FREE_PAGE
138 124
125#include <asm-generic/page.h>
126
139#endif 127#endif
diff --git a/include/asm-um/pgalloc.h b/include/asm-um/pgalloc.h
index 8fcb2fc0a892..ea49411236dc 100644
--- a/include/asm-um/pgalloc.h
+++ b/include/asm-um/pgalloc.h
@@ -42,11 +42,13 @@ static inline void pte_free(struct page *pte)
42#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte)) 42#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
43 43
44#ifdef CONFIG_3_LEVEL_PGTABLES 44#ifdef CONFIG_3_LEVEL_PGTABLES
45/* 45
46 * In the 3-level case we free the pmds as part of the pgd. 46extern __inline__ void pmd_free(pmd_t *pmd)
47 */ 47{
48#define pmd_free(x) do { } while (0) 48 free_page((unsigned long)pmd);
49#define __pmd_free_tlb(tlb,x) do { } while (0) 49}
50
51#define __pmd_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
50#endif 52#endif
51 53
52#define check_pgt_cache() do { } while (0) 54#define check_pgt_cache() do { } while (0)
diff --git a/include/asm-um/pgtable-2level.h b/include/asm-um/pgtable-2level.h
index 9b3abc01d60e..ffe017f6b64b 100644
--- a/include/asm-um/pgtable-2level.h
+++ b/include/asm-um/pgtable-2level.h
@@ -35,35 +35,8 @@
35static inline int pgd_newpage(pgd_t pgd) { return 0; } 35static inline int pgd_newpage(pgd_t pgd) { return 0; }
36static inline void pgd_mkuptodate(pgd_t pgd) { } 36static inline void pgd_mkuptodate(pgd_t pgd) { }
37 37
38#define pte_present(x) (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
39
40static inline pte_t pte_mknewprot(pte_t pte)
41{
42 pte_val(pte) |= _PAGE_NEWPROT;
43 return(pte);
44}
45
46static inline pte_t pte_mknewpage(pte_t pte)
47{
48 pte_val(pte) |= _PAGE_NEWPAGE;
49 return(pte);
50}
51
52static inline void set_pte(pte_t *pteptr, pte_t pteval)
53{
54 /* If it's a swap entry, it needs to be marked _PAGE_NEWPAGE so
55 * fix_range knows to unmap it. _PAGE_NEWPROT is specific to
56 * mapped pages.
57 */
58 *pteptr = pte_mknewpage(pteval);
59 if(pte_present(*pteptr)) *pteptr = pte_mknewprot(*pteptr);
60}
61#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
62
63#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval)) 38#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval))
64 39
65#define pte_page(x) pfn_to_page(pte_pfn(x))
66#define pte_none(x) !(pte_val(x) & ~_PAGE_NEWPAGE)
67#define pte_pfn(x) phys_to_pfn(pte_val(x)) 40#define pte_pfn(x) phys_to_pfn(pte_val(x))
68#define pfn_pte(pfn, prot) __pte(pfn_to_phys(pfn) | pgprot_val(prot)) 41#define pfn_pte(pfn, prot) __pte(pfn_to_phys(pfn) | pgprot_val(prot))
69#define pfn_pmd(pfn, prot) __pmd(pfn_to_phys(pfn) | pgprot_val(prot)) 42#define pfn_pmd(pfn, prot) __pmd(pfn_to_phys(pfn) | pgprot_val(prot))
diff --git a/include/asm-um/pgtable-3level.h b/include/asm-um/pgtable-3level.h
index 65e8bfc55fc4..786c25727289 100644
--- a/include/asm-um/pgtable-3level.h
+++ b/include/asm-um/pgtable-3level.h
@@ -57,35 +57,6 @@ static inline int pgd_newpage(pgd_t pgd)
57 57
58static inline void pgd_mkuptodate(pgd_t pgd) { pgd_val(pgd) &= ~_PAGE_NEWPAGE; } 58static inline void pgd_mkuptodate(pgd_t pgd) { pgd_val(pgd) &= ~_PAGE_NEWPAGE; }
59 59
60
61#define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
62
63static inline pte_t pte_mknewprot(pte_t pte)
64{
65 pte_set_bits(pte, _PAGE_NEWPROT);
66 return(pte);
67}
68
69static inline pte_t pte_mknewpage(pte_t pte)
70{
71 pte_set_bits(pte, _PAGE_NEWPAGE);
72 return(pte);
73}
74
75static inline void set_pte(pte_t *pteptr, pte_t pteval)
76{
77 pte_copy(*pteptr, pteval);
78
79 /* If it's a swap entry, it needs to be marked _PAGE_NEWPAGE so
80 * fix_range knows to unmap it. _PAGE_NEWPROT is specific to
81 * mapped pages.
82 */
83
84 *pteptr = pte_mknewpage(*pteptr);
85 if(pte_present(*pteptr)) *pteptr = pte_mknewprot(*pteptr);
86}
87#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
88
89#define set_pmd(pmdptr, pmdval) set_64bit((phys_t *) (pmdptr), pmd_val(pmdval)) 60#define set_pmd(pmdptr, pmdval) set_64bit((phys_t *) (pmdptr), pmd_val(pmdval))
90 61
91static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) 62static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
@@ -98,14 +69,11 @@ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
98 return pmd; 69 return pmd;
99} 70}
100 71
101static inline void pmd_free(pmd_t *pmd){ 72extern inline void pud_clear (pud_t *pud)
102 free_page((unsigned long) pmd); 73{
74 set_pud(pud, __pud(0));
103} 75}
104 76
105#define __pmd_free_tlb(tlb,x) do { } while (0)
106
107static inline void pud_clear (pud_t * pud) { }
108
109#define pud_page(pud) \ 77#define pud_page(pud) \
110 ((struct page *) __va(pud_val(pud) & PAGE_MASK)) 78 ((struct page *) __va(pud_val(pud) & PAGE_MASK))
111 79
@@ -113,13 +81,6 @@ static inline void pud_clear (pud_t * pud) { }
113#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \ 81#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
114 pmd_index(address)) 82 pmd_index(address))
115 83
116#define pte_page(x) pfn_to_page(pte_pfn(x))
117
118static inline int pte_none(pte_t pte)
119{
120 return pte_is_zero(pte);
121}
122
123static inline unsigned long pte_pfn(pte_t pte) 84static inline unsigned long pte_pfn(pte_t pte)
124{ 85{
125 return phys_to_pfn(pte_val(pte)); 86 return phys_to_pfn(pte_val(pte));
diff --git a/include/asm-um/pgtable.h b/include/asm-um/pgtable.h
index a88040920311..b48e0966ecd7 100644
--- a/include/asm-um/pgtable.h
+++ b/include/asm-um/pgtable.h
@@ -16,13 +16,15 @@
16 16
17#define _PAGE_PRESENT 0x001 17#define _PAGE_PRESENT 0x001
18#define _PAGE_NEWPAGE 0x002 18#define _PAGE_NEWPAGE 0x002
19#define _PAGE_NEWPROT 0x004 19#define _PAGE_NEWPROT 0x004
20#define _PAGE_FILE 0x008 /* set:pagecache unset:swap */
21#define _PAGE_PROTNONE 0x010 /* If not present */
22#define _PAGE_RW 0x020 20#define _PAGE_RW 0x020
23#define _PAGE_USER 0x040 21#define _PAGE_USER 0x040
24#define _PAGE_ACCESSED 0x080 22#define _PAGE_ACCESSED 0x080
25#define _PAGE_DIRTY 0x100 23#define _PAGE_DIRTY 0x100
24/* If _PAGE_PRESENT is clear, we use these: */
25#define _PAGE_FILE 0x008 /* nonlinear file mapping, saved PTE; unset:swap */
26#define _PAGE_PROTNONE 0x010 /* if the user mapped it with PROT_NONE;
27 pte_present gives true */
26 28
27#ifdef CONFIG_3_LEVEL_PGTABLES 29#ifdef CONFIG_3_LEVEL_PGTABLES
28#include "asm/pgtable-3level.h" 30#include "asm/pgtable-3level.h"
@@ -151,10 +153,24 @@ extern unsigned long pg0[1024];
151 153
152#define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK) 154#define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK)
153 155
156#define pte_page(x) pfn_to_page(pte_pfn(x))
154#define pte_address(x) (__va(pte_val(x) & PAGE_MASK)) 157#define pte_address(x) (__va(pte_val(x) & PAGE_MASK))
155#define mk_phys(a, r) ((a) + (((unsigned long) r) << REGION_SHIFT)) 158#define mk_phys(a, r) ((a) + (((unsigned long) r) << REGION_SHIFT))
156#define phys_addr(p) ((p) & ~REGION_MASK) 159#define phys_addr(p) ((p) & ~REGION_MASK)
157 160
161#define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
162
163/*
164 * =================================
165 * Flags checking section.
166 * =================================
167 */
168
169static inline int pte_none(pte_t pte)
170{
171 return pte_is_zero(pte);
172}
173
158/* 174/*
159 * The following only work if pte_present() is true. 175 * The following only work if pte_present() is true.
160 * Undefined behaviour if not.. 176 * Undefined behaviour if not..
@@ -210,6 +226,18 @@ static inline int pte_newprot(pte_t pte)
210 return(pte_present(pte) && (pte_get_bits(pte, _PAGE_NEWPROT))); 226 return(pte_present(pte) && (pte_get_bits(pte, _PAGE_NEWPROT)));
211} 227}
212 228
229/*
230 * =================================
231 * Flags setting section.
232 * =================================
233 */
234
235static inline pte_t pte_mknewprot(pte_t pte)
236{
237 pte_set_bits(pte, _PAGE_NEWPROT);
238 return(pte);
239}
240
213static inline pte_t pte_rdprotect(pte_t pte) 241static inline pte_t pte_rdprotect(pte_t pte)
214{ 242{
215 pte_clear_bits(pte, _PAGE_USER); 243 pte_clear_bits(pte, _PAGE_USER);
@@ -278,6 +306,26 @@ static inline pte_t pte_mkuptodate(pte_t pte)
278 return(pte); 306 return(pte);
279} 307}
280 308
309static inline pte_t pte_mknewpage(pte_t pte)
310{
311 pte_set_bits(pte, _PAGE_NEWPAGE);
312 return(pte);
313}
314
315static inline void set_pte(pte_t *pteptr, pte_t pteval)
316{
317 pte_copy(*pteptr, pteval);
318
319 /* If it's a swap entry, it needs to be marked _PAGE_NEWPAGE so
320 * fix_range knows to unmap it. _PAGE_NEWPROT is specific to
321 * mapped pages.
322 */
323
324 *pteptr = pte_mknewpage(*pteptr);
325 if(pte_present(*pteptr)) *pteptr = pte_mknewprot(*pteptr);
326}
327#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
328
281extern phys_t page_to_phys(struct page *page); 329extern phys_t page_to_phys(struct page *page);
282 330
283/* 331/*
diff --git a/include/asm-v850/page.h b/include/asm-v850/page.h
index d6091622935d..b4bc85e7b91a 100644
--- a/include/asm-v850/page.h
+++ b/include/asm-v850/page.h
@@ -98,25 +98,6 @@ typedef unsigned long pgprot_t;
98#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK) 98#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
99 99
100 100
101#ifndef __ASSEMBLY__
102
103/* Pure 2^n version of get_order */
104extern __inline__ int get_order (unsigned long size)
105{
106 int order;
107
108 size = (size-1) >> (PAGE_SHIFT-1);
109 order = -1;
110 do {
111 size >>= 1;
112 order++;
113 } while (size);
114 return order;
115}
116
117#endif /* !__ASSEMBLY__ */
118
119
120/* No current v850 processor has virtual memory. */ 101/* No current v850 processor has virtual memory. */
121#define __virt_to_phys(addr) (addr) 102#define __virt_to_phys(addr) (addr)
122#define __phys_to_virt(addr) (addr) 103#define __phys_to_virt(addr) (addr)
@@ -144,4 +125,6 @@ extern __inline__ int get_order (unsigned long size)
144 125
145#endif /* KERNEL */ 126#endif /* KERNEL */
146 127
128#include <asm-generic/page.h>
129
147#endif /* __V850_PAGE_H__ */ 130#endif /* __V850_PAGE_H__ */
diff --git a/include/asm-v850/types.h b/include/asm-v850/types.h
index e7cfe5b33a10..dcef57196875 100644
--- a/include/asm-v850/types.h
+++ b/include/asm-v850/types.h
@@ -59,8 +59,6 @@ typedef unsigned long long u64;
59 59
60typedef u32 dma_addr_t; 60typedef u32 dma_addr_t;
61 61
62typedef unsigned int kmem_bufctl_t;
63
64#endif /* !__ASSEMBLY__ */ 62#endif /* !__ASSEMBLY__ */
65 63
66#endif /* __KERNEL__ */ 64#endif /* __KERNEL__ */
diff --git a/include/asm-x86_64/page.h b/include/asm-x86_64/page.h
index 431318764af6..135ffaa0393b 100644
--- a/include/asm-x86_64/page.h
+++ b/include/asm-x86_64/page.h
@@ -28,7 +28,6 @@
28#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) 28#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
29#define HPAGE_MASK (~(HPAGE_SIZE - 1)) 29#define HPAGE_MASK (~(HPAGE_SIZE - 1))
30#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 30#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
31#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
32 31
33#ifdef __KERNEL__ 32#ifdef __KERNEL__
34#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
@@ -92,20 +91,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
92 91
93#include <asm/bug.h> 92#include <asm/bug.h>
94 93
95/* Pure 2^n version of get_order */
96extern __inline__ int get_order(unsigned long size)
97{
98 int order;
99
100 size = (size-1) >> (PAGE_SHIFT-1);
101 order = -1;
102 do {
103 size >>= 1;
104 order++;
105 } while (size);
106 return order;
107}
108
109#endif /* __ASSEMBLY__ */ 94#endif /* __ASSEMBLY__ */
110 95
111#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET) 96#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
@@ -141,4 +126,6 @@ extern __inline__ int get_order(unsigned long size)
141 126
142#endif /* __KERNEL__ */ 127#endif /* __KERNEL__ */
143 128
129#include <asm-generic/page.h>
130
144#endif /* _X86_64_PAGE_H */ 131#endif /* _X86_64_PAGE_H */
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index 4e167b5ea8f3..5e0f2fdab0d3 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -104,6 +104,19 @@ extern inline void pgd_clear (pgd_t * pgd)
104((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK)) 104((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
105 105
106#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0)) 106#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
107
108static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
109{
110 pte_t pte;
111 if (full) {
112 pte = *ptep;
113 *ptep = __pte(0);
114 } else {
115 pte = ptep_get_and_clear(mm, addr, ptep);
116 }
117 return pte;
118}
119
107#define pte_same(a, b) ((a).pte == (b).pte) 120#define pte_same(a, b) ((a).pte == (b).pte)
108 121
109#define PMD_SIZE (1UL << PMD_SHIFT) 122#define PMD_SIZE (1UL << PMD_SHIFT)
@@ -143,7 +156,7 @@ extern inline void pgd_clear (pgd_t * pgd)
143#define _PAGE_ACCESSED 0x020 156#define _PAGE_ACCESSED 0x020
144#define _PAGE_DIRTY 0x040 157#define _PAGE_DIRTY 0x040
145#define _PAGE_PSE 0x080 /* 2MB page */ 158#define _PAGE_PSE 0x080 /* 2MB page */
146#define _PAGE_FILE 0x040 /* set:pagecache, unset:swap */ 159#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
147#define _PAGE_GLOBAL 0x100 /* Global TLB entry */ 160#define _PAGE_GLOBAL 0x100 /* Global TLB entry */
148 161
149#define _PAGE_PROTNONE 0x080 /* If not present */ 162#define _PAGE_PROTNONE 0x080 /* If not present */
@@ -247,6 +260,7 @@ static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
247 * The following only work if pte_present() is true. 260 * The following only work if pte_present() is true.
248 * Undefined behaviour if not.. 261 * Undefined behaviour if not..
249 */ 262 */
263#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
250static inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; } 264static inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
251extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; } 265extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
252extern inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; } 266extern inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
@@ -254,8 +268,8 @@ extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
254extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 268extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
255extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } 269extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
256static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 270static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
271static inline int pte_huge(pte_t pte) { return (pte_val(pte) & __LARGE_PTE) == __LARGE_PTE; }
257 272
258#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
259extern inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } 273extern inline pte_t pte_rdprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
260extern inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; } 274extern inline pte_t pte_exprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
261extern inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } 275extern inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
@@ -433,6 +447,7 @@ extern int kern_addr_valid(unsigned long addr);
433#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 447#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
434#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY 448#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
435#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 449#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
450#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
436#define __HAVE_ARCH_PTEP_SET_WRPROTECT 451#define __HAVE_ARCH_PTEP_SET_WRPROTECT
437#define __HAVE_ARCH_PTE_SAME 452#define __HAVE_ARCH_PTE_SAME
438#include <asm-generic/pgtable.h> 453#include <asm-generic/pgtable.h>
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 85549e656eeb..194160f6a43f 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -437,6 +437,11 @@ static inline void prefetchw(void *x)
437 outb((data), 0x23); \ 437 outb((data), 0x23); \
438} while (0) 438} while (0)
439 439
440static inline void serialize_cpu(void)
441{
442 __asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
443}
444
440static inline void __monitor(const void *eax, unsigned long ecx, 445static inline void __monitor(const void *eax, unsigned long ecx,
441 unsigned long edx) 446 unsigned long edx)
442{ 447{
diff --git a/include/asm-x86_64/types.h b/include/asm-x86_64/types.h
index 32bd1426b523..c86c2e6793e2 100644
--- a/include/asm-x86_64/types.h
+++ b/include/asm-x86_64/types.h
@@ -51,8 +51,6 @@ typedef u64 dma_addr_t;
51typedef u64 sector_t; 51typedef u64 sector_t;
52#define HAVE_SECTOR_T 52#define HAVE_SECTOR_T
53 53
54typedef unsigned short kmem_bufctl_t;
55
56#endif /* __ASSEMBLY__ */ 54#endif /* __ASSEMBLY__ */
57 55
58#endif /* __KERNEL__ */ 56#endif /* __KERNEL__ */
diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h
index d72bcb32ba4f..24f86f0e43cf 100644
--- a/include/asm-xtensa/atomic.h
+++ b/include/asm-xtensa/atomic.h
@@ -66,7 +66,7 @@ typedef struct { volatile int counter; } atomic_t;
66 * 66 *
67 * Atomically adds @i to @v. 67 * Atomically adds @i to @v.
68 */ 68 */
69extern __inline__ void atomic_add(int i, atomic_t * v) 69static inline void atomic_add(int i, atomic_t * v)
70{ 70{
71 unsigned int vval; 71 unsigned int vval;
72 72
@@ -90,7 +90,7 @@ extern __inline__ void atomic_add(int i, atomic_t * v)
90 * 90 *
91 * Atomically subtracts @i from @v. 91 * Atomically subtracts @i from @v.
92 */ 92 */
93extern __inline__ void atomic_sub(int i, atomic_t *v) 93static inline void atomic_sub(int i, atomic_t *v)
94{ 94{
95 unsigned int vval; 95 unsigned int vval;
96 96
@@ -111,7 +111,7 @@ extern __inline__ void atomic_sub(int i, atomic_t *v)
111 * We use atomic_{add|sub}_return to define other functions. 111 * We use atomic_{add|sub}_return to define other functions.
112 */ 112 */
113 113
114extern __inline__ int atomic_add_return(int i, atomic_t * v) 114static inline int atomic_add_return(int i, atomic_t * v)
115{ 115{
116 unsigned int vval; 116 unsigned int vval;
117 117
@@ -130,7 +130,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v)
130 return vval; 130 return vval;
131} 131}
132 132
133extern __inline__ int atomic_sub_return(int i, atomic_t * v) 133static inline int atomic_sub_return(int i, atomic_t * v)
134{ 134{
135 unsigned int vval; 135 unsigned int vval;
136 136
@@ -224,7 +224,7 @@ extern __inline__ int atomic_sub_return(int i, atomic_t * v)
224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0) 224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
225 225
226 226
227extern __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) 227static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
228{ 228{
229 unsigned int all_f = -1; 229 unsigned int all_f = -1;
230 unsigned int vval; 230 unsigned int vval;
@@ -243,7 +243,7 @@ extern __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v)
243 ); 243 );
244} 244}
245 245
246extern __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v) 246static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
247{ 247{
248 unsigned int vval; 248 unsigned int vval;
249 249
diff --git a/include/asm-xtensa/checksum.h b/include/asm-xtensa/checksum.h
index 1a00fad19929..81a797ae3abe 100644
--- a/include/asm-xtensa/checksum.h
+++ b/include/asm-xtensa/checksum.h
@@ -47,14 +47,14 @@ asmlinkage unsigned int csum_partial_copy_generic( const char *src, char *dst, i
47 * If you use these functions directly please don't forget the 47 * If you use these functions directly please don't forget the
48 * verify_area(). 48 * verify_area().
49 */ 49 */
50extern __inline__ 50static inline
51unsigned int csum_partial_copy_nocheck ( const char *src, char *dst, 51unsigned int csum_partial_copy_nocheck ( const char *src, char *dst,
52 int len, int sum) 52 int len, int sum)
53{ 53{
54 return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL); 54 return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL);
55} 55}
56 56
57extern __inline__ 57static inline
58unsigned int csum_partial_copy_from_user ( const char *src, char *dst, 58unsigned int csum_partial_copy_from_user ( const char *src, char *dst,
59 int len, int sum, int *err_ptr) 59 int len, int sum, int *err_ptr)
60{ 60{
diff --git a/include/asm-xtensa/delay.h b/include/asm-xtensa/delay.h
index 0a123d53a636..1bc601ec3621 100644
--- a/include/asm-xtensa/delay.h
+++ b/include/asm-xtensa/delay.h
@@ -18,7 +18,7 @@
18 18
19extern unsigned long loops_per_jiffy; 19extern unsigned long loops_per_jiffy;
20 20
21extern __inline__ void __delay(unsigned long loops) 21static inline void __delay(unsigned long loops)
22{ 22{
23 /* 2 cycles per loop. */ 23 /* 2 cycles per loop. */
24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 2, 1b" 24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 2, 1b"
diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h
index 2c471c42ecfc..c5c13985bbe1 100644
--- a/include/asm-xtensa/io.h
+++ b/include/asm-xtensa/io.h
@@ -41,12 +41,12 @@ static inline unsigned int _swapl (unsigned int v)
41 * These are trivial on the 1:1 Linux/Xtensa mapping 41 * These are trivial on the 1:1 Linux/Xtensa mapping
42 */ 42 */
43 43
44extern inline unsigned long virt_to_phys(volatile void * address) 44static inline unsigned long virt_to_phys(volatile void * address)
45{ 45{
46 return PHYSADDR((unsigned long)address); 46 return PHYSADDR((unsigned long)address);
47} 47}
48 48
49extern inline void * phys_to_virt(unsigned long address) 49static inline void * phys_to_virt(unsigned long address)
50{ 50{
51 return (void*) CACHED_ADDR(address); 51 return (void*) CACHED_ADDR(address);
52} 52}
@@ -55,12 +55,12 @@ extern inline void * phys_to_virt(unsigned long address)
55 * IO bus memory addresses are also 1:1 with the physical address 55 * IO bus memory addresses are also 1:1 with the physical address
56 */ 56 */
57 57
58extern inline unsigned long virt_to_bus(volatile void * address) 58static inline unsigned long virt_to_bus(volatile void * address)
59{ 59{
60 return PHYSADDR((unsigned long)address); 60 return PHYSADDR((unsigned long)address);
61} 61}
62 62
63extern inline void * bus_to_virt (unsigned long address) 63static inline void * bus_to_virt (unsigned long address)
64{ 64{
65 return (void *) CACHED_ADDR(address); 65 return (void *) CACHED_ADDR(address);
66} 66}
@@ -69,17 +69,17 @@ extern inline void * bus_to_virt (unsigned long address)
69 * Change "struct page" to physical address. 69 * Change "struct page" to physical address.
70 */ 70 */
71 71
72extern inline void *ioremap(unsigned long offset, unsigned long size) 72static inline void *ioremap(unsigned long offset, unsigned long size)
73{ 73{
74 return (void *) CACHED_ADDR_IO(offset); 74 return (void *) CACHED_ADDR_IO(offset);
75} 75}
76 76
77extern inline void *ioremap_nocache(unsigned long offset, unsigned long size) 77static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
78{ 78{
79 return (void *) BYPASS_ADDR_IO(offset); 79 return (void *) BYPASS_ADDR_IO(offset);
80} 80}
81 81
82extern inline void iounmap(void *addr) 82static inline void iounmap(void *addr)
83{ 83{
84} 84}
85 85
diff --git a/include/asm-xtensa/mmu_context.h b/include/asm-xtensa/mmu_context.h
index 1b0801548cd9..364a7b057bfa 100644
--- a/include/asm-xtensa/mmu_context.h
+++ b/include/asm-xtensa/mmu_context.h
@@ -199,13 +199,13 @@ extern pgd_t *current_pgd;
199#define ASID_FIRST_VERSION \ 199#define ASID_FIRST_VERSION \
200 ((unsigned long)(~ASID_VERSION_MASK) + 1 + ASID_FIRST_NONRESERVED) 200 ((unsigned long)(~ASID_VERSION_MASK) + 1 + ASID_FIRST_NONRESERVED)
201 201
202extern inline void set_rasid_register (unsigned long val) 202static inline void set_rasid_register (unsigned long val)
203{ 203{
204 __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t" 204 __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t"
205 " isync\n" : : "a" (val)); 205 " isync\n" : : "a" (val));
206} 206}
207 207
208extern inline unsigned long get_rasid_register (void) 208static inline unsigned long get_rasid_register (void)
209{ 209{
210 unsigned long tmp; 210 unsigned long tmp;
211 __asm__ __volatile__ (" rsr %0, "__stringify(RASID)"\n\t" : "=a" (tmp)); 211 __asm__ __volatile__ (" rsr %0, "__stringify(RASID)"\n\t" : "=a" (tmp));
@@ -215,7 +215,7 @@ extern inline unsigned long get_rasid_register (void)
215 215
216#if ((XCHAL_MMU_ASID_INVALID == 0) && (XCHAL_MMU_ASID_KERNEL == 1)) 216#if ((XCHAL_MMU_ASID_INVALID == 0) && (XCHAL_MMU_ASID_KERNEL == 1))
217 217
218extern inline void 218static inline void
219get_new_mmu_context(struct mm_struct *mm, unsigned long asid) 219get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
220{ 220{
221 extern void flush_tlb_all(void); 221 extern void flush_tlb_all(void);
@@ -234,7 +234,7 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
234/* XCHAL_MMU_ASID_INVALID == 0 and XCHAL_MMU_ASID_KERNEL ==1 are 234/* XCHAL_MMU_ASID_INVALID == 0 and XCHAL_MMU_ASID_KERNEL ==1 are
235 really the best, but if you insist... */ 235 really the best, but if you insist... */
236 236
237extern inline int validate_asid (unsigned long asid) 237static inline int validate_asid (unsigned long asid)
238{ 238{
239 switch (asid) { 239 switch (asid) {
240 case XCHAL_MMU_ASID_INVALID: 240 case XCHAL_MMU_ASID_INVALID:
@@ -247,7 +247,7 @@ extern inline int validate_asid (unsigned long asid)
247 return 1; /* valid */ 247 return 1; /* valid */
248} 248}
249 249
250extern inline void 250static inline void
251get_new_mmu_context(struct mm_struct *mm, unsigned long asid) 251get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
252{ 252{
253 extern void flush_tlb_all(void); 253 extern void flush_tlb_all(void);
@@ -274,14 +274,14 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
274 * instance. 274 * instance.
275 */ 275 */
276 276
277extern inline int 277static inline int
278init_new_context(struct task_struct *tsk, struct mm_struct *mm) 278init_new_context(struct task_struct *tsk, struct mm_struct *mm)
279{ 279{
280 mm->context = NO_CONTEXT; 280 mm->context = NO_CONTEXT;
281 return 0; 281 return 0;
282} 282}
283 283
284extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 284static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
285 struct task_struct *tsk) 285 struct task_struct *tsk)
286{ 286{
287 unsigned long asid = asid_cache; 287 unsigned long asid = asid_cache;
@@ -301,7 +301,7 @@ extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
301 * Destroy context related info for an mm_struct that is about 301 * Destroy context related info for an mm_struct that is about
302 * to be put to rest. 302 * to be put to rest.
303 */ 303 */
304extern inline void destroy_context(struct mm_struct *mm) 304static inline void destroy_context(struct mm_struct *mm)
305{ 305{
306 /* Nothing to do. */ 306 /* Nothing to do. */
307} 307}
@@ -310,7 +310,7 @@ extern inline void destroy_context(struct mm_struct *mm)
310 * After we have set current->mm to a new value, this activates 310 * After we have set current->mm to a new value, this activates
311 * the context for the new mm so we see the new mappings. 311 * the context for the new mm so we see the new mappings.
312 */ 312 */
313extern inline void 313static inline void
314activate_mm(struct mm_struct *prev, struct mm_struct *next) 314activate_mm(struct mm_struct *prev, struct mm_struct *next)
315{ 315{
316 /* Unconditionally get a new ASID. */ 316 /* Unconditionally get a new ASID. */
diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h
index b495e5b5a942..8ded36f255a2 100644
--- a/include/asm-xtensa/page.h
+++ b/include/asm-xtensa/page.h
@@ -55,7 +55,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
55 * Pure 2^n version of get_order 55 * Pure 2^n version of get_order
56 */ 56 */
57 57
58extern __inline__ int get_order(unsigned long size) 58static inline int get_order(unsigned long size)
59{ 59{
60 int order; 60 int order;
61#ifndef XCHAL_HAVE_NSU 61#ifndef XCHAL_HAVE_NSU
diff --git a/include/asm-xtensa/page.h.n b/include/asm-xtensa/page.h.n
deleted file mode 100644
index 546cc6624f24..000000000000
--- a/include/asm-xtensa/page.h.n
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * linux/include/asm-xtensa/page.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PAGE_H
12#define _XTENSA_PAGE_H
13
14#ifdef __KERNEL__
15
16#include <asm/processor.h>
17#include <linux/config.h>
18
19/*
20 * PAGE_SHIFT determines the page size
21 * PAGE_ALIGN(x) aligns the pointer to the (next) page boundary
22 */
23#define PAGE_SHIFT XCHAL_MMU_MIN_PTE_PAGE_SIZE
24#define PAGE_SIZE (1 << PAGE_SHIFT)
25#define PAGE_MASK (~(PAGE_SIZE-1))
26#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK)
27
28#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE / XCHAL_DCACHE_WAYS)
29#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR
30
31#ifdef __ASSEMBLY__
32
33#define __pgprot(x) (x)
34
35#else
36
37
38/*
39 * These are used to make use of C type-checking..
40 */
41typedef struct { unsigned long pte; } pte_t; /* page table entry */
42typedef struct { unsigned long pmd; } pmd_t; /* PMD table entry */
43typedef struct { unsigned long pgd; } pgd_t; /* PGD table entry */
44typedef struct { unsigned long pgprot; } pgprot_t;
45
46#define pte_val(x) ((x).pte)
47#define pmd_val(x) ((x).pmd)
48#define pgd_val(x) ((x).pgd)
49#define pgprot_val(x) ((x).pgprot)
50
51#define __pte(x) ((pte_t) { (x) } )
52#define __pmd(x) ((pmd_t) { (x) } )
53#define __pgd(x) ((pgd_t) { (x) } )
54#define __pgprot(x) ((pgprot_t) { (x) } )
55
56/*
57 * Pure 2^n version of get_order
58 */
59extern __inline__ int get_order(unsigned long size)
60{
61 int order;
62#ifndef XCHAL_HAVE_NSU
63 unsigned long x1, x2, x4, x8, x16;
64
65 size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
66 x1 = size & 0xAAAAAAAA;
67 x2 = size & 0xCCCCCCCC;
68 x4 = size & 0xF0F0F0F0;
69 x8 = size & 0xFF00FF00;
70 x16 = size & 0xFFFF0000;
71 order = x2 ? 2 : 0;
72 order += (x16 != 0) * 16;
73 order += (x8 != 0) * 8;
74 order += (x4 != 0) * 4;
75 order += (x1 != 0);
76
77 return order;
78#else
79 size = (size - 1) >> PAGE_SHIFT;
80 asm ("nsau %0, %1" : "=r" (order) : "r" (size));
81 return 32 - order;
82#endif
83}
84
85
86struct page;
87extern void clear_page(void *page);
88extern void copy_page(void *to, void *from);
89
90/*
91 * If we have cache aliasing and writeback caches, we might have to do
92 * some extra work
93 */
94
95#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
96void clear_user_page(void *addr, unsigned long vaddr, struct page* page);
97void copy_user_page(void *to, void* from, unsigned long vaddr, struct page* page);
98#else
99# define clear_user_page(page,vaddr,pg) clear_page(page)
100# define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
101#endif
102
103
104/*
105 * This handles the memory map. We handle pages at
106 * XCHAL_KSEG_CACHED_VADDR for kernels with 32 bit address space.
107 * These macros are for conversion of kernel address, not user
108 * addresses.
109 */
110
111#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
112#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
113#define pfn_valid(pfn) ((unsigned long)pfn < max_mapnr)
114#ifndef CONFIG_DISCONTIGMEM
115# define pfn_to_page(pfn) (mem_map + (pfn))
116# define page_to_pfn(page) ((unsigned long)((page) - mem_map))
117#else
118# error CONFIG_DISCONTIGMEM not supported
119#endif
120
121#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
122#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
123#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
124#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
125
126#define WANT_PAGE_VIRTUAL
127
128
129#endif /* __ASSEMBLY__ */
130
131#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
132 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
133
134#endif /* __KERNEL__ */
135#endif /* _XTENSA_PAGE_H */
diff --git a/include/asm-xtensa/pci.h b/include/asm-xtensa/pci.h
index 6817742301c2..24eb7fc25da8 100644
--- a/include/asm-xtensa/pci.h
+++ b/include/asm-xtensa/pci.h
@@ -22,12 +22,12 @@
22 22
23extern struct pci_controller* pcibios_alloc_controller(void); 23extern struct pci_controller* pcibios_alloc_controller(void);
24 24
25extern inline void pcibios_set_master(struct pci_dev *dev) 25static inline void pcibios_set_master(struct pci_dev *dev)
26{ 26{
27 /* No special bus mastering setup handling */ 27 /* No special bus mastering setup handling */
28} 28}
29 29
30extern inline void pcibios_penalize_isa_irq(int irq) 30static inline void pcibios_penalize_isa_irq(int irq)
31{ 31{
32 /* We don't do dynamic PCI IRQ allocation */ 32 /* We don't do dynamic PCI IRQ allocation */
33} 33}
diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h
index 0bb6416ae266..883ebc2d75d6 100644
--- a/include/asm-xtensa/pgtable.h
+++ b/include/asm-xtensa/pgtable.h
@@ -260,7 +260,7 @@ static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_RW; return pt
260#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 260#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
261#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 261#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
262 262
263extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 263static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
264{ 264{
265 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 265 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
266} 266}
@@ -278,14 +278,14 @@ static inline void update_pte(pte_t *ptep, pte_t pteval)
278#endif 278#endif
279} 279}
280 280
281extern inline void 281static inline void
282set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval) 282set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval)
283{ 283{
284 update_pte(ptep, pteval); 284 update_pte(ptep, pteval);
285} 285}
286 286
287 287
288extern inline void 288static inline void
289set_pmd(pmd_t *pmdp, pmd_t pmdval) 289set_pmd(pmd_t *pmdp, pmd_t pmdval)
290{ 290{
291 *pmdp = pmdval; 291 *pmdp = pmdval;
diff --git a/include/asm-xtensa/semaphore.h b/include/asm-xtensa/semaphore.h
index c8a7574a9a57..db740b8bc6f0 100644
--- a/include/asm-xtensa/semaphore.h
+++ b/include/asm-xtensa/semaphore.h
@@ -47,7 +47,7 @@ struct semaphore {
47#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) 47#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
48#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) 48#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
49 49
50extern inline void sema_init (struct semaphore *sem, int val) 50static inline void sema_init (struct semaphore *sem, int val)
51{ 51{
52/* 52/*
53 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); 53 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
@@ -79,7 +79,7 @@ asmlinkage void __up(struct semaphore * sem);
79 79
80extern spinlock_t semaphore_wake_lock; 80extern spinlock_t semaphore_wake_lock;
81 81
82extern __inline__ void down(struct semaphore * sem) 82static inline void down(struct semaphore * sem)
83{ 83{
84#if WAITQUEUE_DEBUG 84#if WAITQUEUE_DEBUG
85 CHECK_MAGIC(sem->__magic); 85 CHECK_MAGIC(sem->__magic);
@@ -89,7 +89,7 @@ extern __inline__ void down(struct semaphore * sem)
89 __down(sem); 89 __down(sem);
90} 90}
91 91
92extern __inline__ int down_interruptible(struct semaphore * sem) 92static inline int down_interruptible(struct semaphore * sem)
93{ 93{
94 int ret = 0; 94 int ret = 0;
95#if WAITQUEUE_DEBUG 95#if WAITQUEUE_DEBUG
@@ -101,7 +101,7 @@ extern __inline__ int down_interruptible(struct semaphore * sem)
101 return ret; 101 return ret;
102} 102}
103 103
104extern __inline__ int down_trylock(struct semaphore * sem) 104static inline int down_trylock(struct semaphore * sem)
105{ 105{
106 int ret = 0; 106 int ret = 0;
107#if WAITQUEUE_DEBUG 107#if WAITQUEUE_DEBUG
@@ -117,7 +117,7 @@ extern __inline__ int down_trylock(struct semaphore * sem)
117 * Note! This is subtle. We jump to wake people up only if 117 * Note! This is subtle. We jump to wake people up only if
118 * the semaphore was negative (== somebody was waiting on it). 118 * the semaphore was negative (== somebody was waiting on it).
119 */ 119 */
120extern __inline__ void up(struct semaphore * sem) 120static inline void up(struct semaphore * sem)
121{ 121{
122#if WAITQUEUE_DEBUG 122#if WAITQUEUE_DEBUG
123 CHECK_MAGIC(sem->__magic); 123 CHECK_MAGIC(sem->__magic);
diff --git a/include/asm-xtensa/string.h b/include/asm-xtensa/string.h
index 3f81b27d9809..5fb8c27cbef5 100644
--- a/include/asm-xtensa/string.h
+++ b/include/asm-xtensa/string.h
@@ -16,7 +16,7 @@
16#define _XTENSA_STRING_H 16#define _XTENSA_STRING_H
17 17
18#define __HAVE_ARCH_STRCPY 18#define __HAVE_ARCH_STRCPY
19extern __inline__ char *strcpy(char *__dest, const char *__src) 19static inline char *strcpy(char *__dest, const char *__src)
20{ 20{
21 register char *__xdest = __dest; 21 register char *__xdest = __dest;
22 unsigned long __dummy; 22 unsigned long __dummy;
@@ -35,7 +35,7 @@ extern __inline__ char *strcpy(char *__dest, const char *__src)
35} 35}
36 36
37#define __HAVE_ARCH_STRNCPY 37#define __HAVE_ARCH_STRNCPY
38extern __inline__ char *strncpy(char *__dest, const char *__src, size_t __n) 38static inline char *strncpy(char *__dest, const char *__src, size_t __n)
39{ 39{
40 register char *__xdest = __dest; 40 register char *__xdest = __dest;
41 unsigned long __dummy; 41 unsigned long __dummy;
@@ -60,7 +60,7 @@ extern __inline__ char *strncpy(char *__dest, const char *__src, size_t __n)
60} 60}
61 61
62#define __HAVE_ARCH_STRCMP 62#define __HAVE_ARCH_STRCMP
63extern __inline__ int strcmp(const char *__cs, const char *__ct) 63static inline int strcmp(const char *__cs, const char *__ct)
64{ 64{
65 register int __res; 65 register int __res;
66 unsigned long __dummy; 66 unsigned long __dummy;
@@ -82,7 +82,7 @@ extern __inline__ int strcmp(const char *__cs, const char *__ct)
82} 82}
83 83
84#define __HAVE_ARCH_STRNCMP 84#define __HAVE_ARCH_STRNCMP
85extern __inline__ int strncmp(const char *__cs, const char *__ct, size_t __n) 85static inline int strncmp(const char *__cs, const char *__ct, size_t __n)
86{ 86{
87 register int __res; 87 register int __res;
88 unsigned long __dummy; 88 unsigned long __dummy;
diff --git a/include/asm-xtensa/system.h b/include/asm-xtensa/system.h
index 690fe325e671..f09393232e5e 100644
--- a/include/asm-xtensa/system.h
+++ b/include/asm-xtensa/system.h
@@ -56,7 +56,7 @@ static inline int irqs_disabled(void)
56 56
57#define clear_cpenable() __clear_cpenable() 57#define clear_cpenable() __clear_cpenable()
58 58
59extern __inline__ void __clear_cpenable(void) 59static inline void __clear_cpenable(void)
60{ 60{
61#if XCHAL_HAVE_CP 61#if XCHAL_HAVE_CP
62 unsigned long i = 0; 62 unsigned long i = 0;
@@ -64,7 +64,7 @@ extern __inline__ void __clear_cpenable(void)
64#endif 64#endif
65} 65}
66 66
67extern __inline__ void enable_coprocessor(int i) 67static inline void enable_coprocessor(int i)
68{ 68{
69#if XCHAL_HAVE_CP 69#if XCHAL_HAVE_CP
70 int cp; 70 int cp;
@@ -74,7 +74,7 @@ extern __inline__ void enable_coprocessor(int i)
74#endif 74#endif
75} 75}
76 76
77extern __inline__ void disable_coprocessor(int i) 77static inline void disable_coprocessor(int i)
78{ 78{
79#if XCHAL_HAVE_CP 79#if XCHAL_HAVE_CP
80 int cp; 80 int cp;
@@ -123,7 +123,7 @@ do { \
123 * cmpxchg 123 * cmpxchg
124 */ 124 */
125 125
126extern __inline__ unsigned long 126static inline unsigned long
127__cmpxchg_u32(volatile int *p, int old, int new) 127__cmpxchg_u32(volatile int *p, int old, int new)
128{ 128{
129 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" 129 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
@@ -173,7 +173,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
173 * where no register reference will cause an overflow. 173 * where no register reference will cause an overflow.
174 */ 174 */
175 175
176extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) 176static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
177{ 177{
178 unsigned long tmp; 178 unsigned long tmp;
179 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" 179 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
diff --git a/include/asm-xtensa/tlbflush.h b/include/asm-xtensa/tlbflush.h
index 23bfe9db45f5..43f6ec859af9 100644
--- a/include/asm-xtensa/tlbflush.h
+++ b/include/asm-xtensa/tlbflush.h
@@ -39,7 +39,7 @@ extern void flush_tlb_range(struct vm_area_struct*,unsigned long,unsigned long);
39 * page-table pages. 39 * page-table pages.
40 */ 40 */
41 41
42extern inline void flush_tlb_pgtables(struct mm_struct *mm, 42static inline void flush_tlb_pgtables(struct mm_struct *mm,
43 unsigned long start, unsigned long end) 43 unsigned long start, unsigned long end)
44{ 44{
45} 45}
@@ -51,26 +51,26 @@ extern inline void flush_tlb_pgtables(struct mm_struct *mm,
51#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2) 51#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2)
52#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2) 52#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2)
53 53
54extern inline unsigned long itlb_probe(unsigned long addr) 54static inline unsigned long itlb_probe(unsigned long addr)
55{ 55{
56 unsigned long tmp; 56 unsigned long tmp;
57 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr)); 57 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
58 return tmp; 58 return tmp;
59} 59}
60 60
61extern inline unsigned long dtlb_probe(unsigned long addr) 61static inline unsigned long dtlb_probe(unsigned long addr)
62{ 62{
63 unsigned long tmp; 63 unsigned long tmp;
64 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr)); 64 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
65 return tmp; 65 return tmp;
66} 66}
67 67
68extern inline void invalidate_itlb_entry (unsigned long probe) 68static inline void invalidate_itlb_entry (unsigned long probe)
69{ 69{
70 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe)); 70 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe));
71} 71}
72 72
73extern inline void invalidate_dtlb_entry (unsigned long probe) 73static inline void invalidate_dtlb_entry (unsigned long probe)
74{ 74{
75 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe)); 75 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe));
76} 76}
@@ -80,68 +80,68 @@ extern inline void invalidate_dtlb_entry (unsigned long probe)
80 * caller must follow up with an 'isync', which can be relatively 80 * caller must follow up with an 'isync', which can be relatively
81 * expensive on some Xtensa implementations. 81 * expensive on some Xtensa implementations.
82 */ 82 */
83extern inline void invalidate_itlb_entry_no_isync (unsigned entry) 83static inline void invalidate_itlb_entry_no_isync (unsigned entry)
84{ 84{
85 /* Caller must follow up with 'isync'. */ 85 /* Caller must follow up with 'isync'. */
86 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) ); 86 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) );
87} 87}
88 88
89extern inline void invalidate_dtlb_entry_no_isync (unsigned entry) 89static inline void invalidate_dtlb_entry_no_isync (unsigned entry)
90{ 90{
91 /* Caller must follow up with 'isync'. */ 91 /* Caller must follow up with 'isync'. */
92 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) ); 92 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) );
93} 93}
94 94
95extern inline void set_itlbcfg_register (unsigned long val) 95static inline void set_itlbcfg_register (unsigned long val)
96{ 96{
97 __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t" 97 __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t"
98 : : "a" (val)); 98 : : "a" (val));
99} 99}
100 100
101extern inline void set_dtlbcfg_register (unsigned long val) 101static inline void set_dtlbcfg_register (unsigned long val)
102{ 102{
103 __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t" 103 __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t"
104 : : "a" (val)); 104 : : "a" (val));
105} 105}
106 106
107extern inline void set_ptevaddr_register (unsigned long val) 107static inline void set_ptevaddr_register (unsigned long val)
108{ 108{
109 __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n" 109 __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n"
110 : : "a" (val)); 110 : : "a" (val));
111} 111}
112 112
113extern inline unsigned long read_ptevaddr_register (void) 113static inline unsigned long read_ptevaddr_register (void)
114{ 114{
115 unsigned long tmp; 115 unsigned long tmp;
116 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp)); 116 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp));
117 return tmp; 117 return tmp;
118} 118}
119 119
120extern inline void write_dtlb_entry (pte_t entry, int way) 120static inline void write_dtlb_entry (pte_t entry, int way)
121{ 121{
122 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t" 122 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t"
123 : : "r" (way), "r" (entry) ); 123 : : "r" (way), "r" (entry) );
124} 124}
125 125
126extern inline void write_itlb_entry (pte_t entry, int way) 126static inline void write_itlb_entry (pte_t entry, int way)
127{ 127{
128 __asm__ __volatile__("witlb %1, %0; isync\n\t" 128 __asm__ __volatile__("witlb %1, %0; isync\n\t"
129 : : "r" (way), "r" (entry) ); 129 : : "r" (way), "r" (entry) );
130} 130}
131 131
132extern inline void invalidate_page_directory (void) 132static inline void invalidate_page_directory (void)
133{ 133{
134 invalidate_dtlb_entry (DTLB_WAY_PGTABLE); 134 invalidate_dtlb_entry (DTLB_WAY_PGTABLE);
135} 135}
136 136
137extern inline void invalidate_itlb_mapping (unsigned address) 137static inline void invalidate_itlb_mapping (unsigned address)
138{ 138{
139 unsigned long tlb_entry; 139 unsigned long tlb_entry;
140 while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS) 140 while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS)
141 invalidate_itlb_entry (tlb_entry); 141 invalidate_itlb_entry (tlb_entry);
142} 142}
143 143
144extern inline void invalidate_dtlb_mapping (unsigned address) 144static inline void invalidate_dtlb_mapping (unsigned address)
145{ 145{
146 unsigned long tlb_entry; 146 unsigned long tlb_entry;
147 while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS) 147 while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS)
@@ -165,28 +165,28 @@ extern inline void invalidate_dtlb_mapping (unsigned address)
165 * as[07..00] contain the asid 165 * as[07..00] contain the asid
166 */ 166 */
167 167
168extern inline unsigned long read_dtlb_virtual (int way) 168static inline unsigned long read_dtlb_virtual (int way)
169{ 169{
170 unsigned long tmp; 170 unsigned long tmp;
171 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 171 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
172 return tmp; 172 return tmp;
173} 173}
174 174
175extern inline unsigned long read_dtlb_translation (int way) 175static inline unsigned long read_dtlb_translation (int way)
176{ 176{
177 unsigned long tmp; 177 unsigned long tmp;
178 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 178 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
179 return tmp; 179 return tmp;
180} 180}
181 181
182extern inline unsigned long read_itlb_virtual (int way) 182static inline unsigned long read_itlb_virtual (int way)
183{ 183{
184 unsigned long tmp; 184 unsigned long tmp;
185 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 185 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
186 return tmp; 186 return tmp;
187} 187}
188 188
189extern inline unsigned long read_itlb_translation (int way) 189static inline unsigned long read_itlb_translation (int way)
190{ 190{
191 unsigned long tmp; 191 unsigned long tmp;
192 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 192 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
diff --git a/include/asm-xtensa/types.h b/include/asm-xtensa/types.h
index ebac00469852..9d99a8e9e337 100644
--- a/include/asm-xtensa/types.h
+++ b/include/asm-xtensa/types.h
@@ -58,8 +58,6 @@ typedef unsigned long long u64;
58 58
59typedef u32 dma_addr_t; 59typedef u32 dma_addr_t;
60 60
61typedef unsigned int kmem_bufctl_t;
62
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
64#endif 62#endif
65 63
diff --git a/include/asm-xtensa/uaccess.h b/include/asm-xtensa/uaccess.h
index 35576b25c7b2..fc268ac923c0 100644
--- a/include/asm-xtensa/uaccess.h
+++ b/include/asm-xtensa/uaccess.h
@@ -211,7 +211,7 @@
211#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size))) 211#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size)))
212#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size)) 212#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size))
213 213
214extern inline int verify_area(int type, const void * addr, unsigned long size) 214static inline int verify_area(int type, const void * addr, unsigned long size)
215{ 215{
216 return access_ok(type,addr,size) ? 0 : -EFAULT; 216 return access_ok(type,addr,size) ? 0 : -EFAULT;
217} 217}
@@ -464,7 +464,7 @@ __generic_copy_from_user(void *to, const void *from, unsigned long n)
464 * success. 464 * success.
465 */ 465 */
466 466
467extern inline unsigned long 467static inline unsigned long
468__xtensa_clear_user(void *addr, unsigned long size) 468__xtensa_clear_user(void *addr, unsigned long size)
469{ 469{
470 if ( ! memset(addr, 0, size) ) 470 if ( ! memset(addr, 0, size) )
@@ -472,7 +472,7 @@ __xtensa_clear_user(void *addr, unsigned long size)
472 return 0; 472 return 0;
473} 473}
474 474
475extern inline unsigned long 475static inline unsigned long
476clear_user(void *addr, unsigned long size) 476clear_user(void *addr, unsigned long size)
477{ 477{
478 if (access_ok(VERIFY_WRITE, addr, size)) 478 if (access_ok(VERIFY_WRITE, addr, size))
@@ -486,7 +486,7 @@ clear_user(void *addr, unsigned long size)
486extern long __strncpy_user(char *, const char *, long); 486extern long __strncpy_user(char *, const char *, long);
487#define __strncpy_from_user __strncpy_user 487#define __strncpy_from_user __strncpy_user
488 488
489extern inline long 489static inline long
490strncpy_from_user(char *dst, const char *src, long count) 490strncpy_from_user(char *dst, const char *src, long count)
491{ 491{
492 if (access_ok(VERIFY_READ, src, 1)) 492 if (access_ok(VERIFY_READ, src, 1))
@@ -502,7 +502,7 @@ strncpy_from_user(char *dst, const char *src, long count)
502 */ 502 */
503extern long __strnlen_user(const char *, long); 503extern long __strnlen_user(const char *, long);
504 504
505extern inline long strnlen_user(const char *str, long len) 505static inline long strnlen_user(const char *str, long len)
506{ 506{
507 unsigned long top = __kernel_ok ? ~0UL : TASK_SIZE - 1; 507 unsigned long top = __kernel_ok ? ~0UL : TASK_SIZE - 1;
508 508
diff --git a/include/linux/capability.h b/include/linux/capability.h
index 8d139f4acf23..6b4618902d3d 100644
--- a/include/linux/capability.h
+++ b/include/linux/capability.h
@@ -233,6 +233,7 @@ typedef __u32 kernel_cap_t;
233/* Allow enabling/disabling tagged queuing on SCSI controllers and sending 233/* Allow enabling/disabling tagged queuing on SCSI controllers and sending
234 arbitrary SCSI commands */ 234 arbitrary SCSI commands */
235/* Allow setting encryption key on loopback filesystem */ 235/* Allow setting encryption key on loopback filesystem */
236/* Allow setting zone reclaim policy */
236 237
237#define CAP_SYS_ADMIN 21 238#define CAP_SYS_ADMIN 21
238 239
diff --git a/include/linux/crypto.h b/include/linux/crypto.h
index 5e2bcc636a02..3c89df6e7768 100644
--- a/include/linux/crypto.h
+++ b/include/linux/crypto.h
@@ -45,6 +45,7 @@
45#define CRYPTO_TFM_MODE_CTR 0x00000008 45#define CRYPTO_TFM_MODE_CTR 0x00000008
46 46
47#define CRYPTO_TFM_REQ_WEAK_KEY 0x00000100 47#define CRYPTO_TFM_REQ_WEAK_KEY 0x00000100
48#define CRYPTO_TFM_REQ_MAY_SLEEP 0x00000200
48#define CRYPTO_TFM_RES_WEAK_KEY 0x00100000 49#define CRYPTO_TFM_RES_WEAK_KEY 0x00100000
49#define CRYPTO_TFM_RES_BAD_KEY_LEN 0x00200000 50#define CRYPTO_TFM_RES_BAD_KEY_LEN 0x00200000
50#define CRYPTO_TFM_RES_BAD_KEY_SCHED 0x00400000 51#define CRYPTO_TFM_RES_BAD_KEY_SCHED 0x00400000
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 73781ec165b4..c7c5dd316182 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -91,11 +91,6 @@ typedef struct {
91 91
92#define EFI_PAGE_SHIFT 12 92#define EFI_PAGE_SHIFT 12
93 93
94/*
95 * For current x86 implementations of EFI, there is
96 * additional padding in the mem descriptors. This is not
97 * the case in ia64. Need to have this fixed in the f/w.
98 */
99typedef struct { 94typedef struct {
100 u32 type; 95 u32 type;
101 u32 pad; 96 u32 pad;
@@ -103,9 +98,6 @@ typedef struct {
103 u64 virt_addr; 98 u64 virt_addr;
104 u64 num_pages; 99 u64 num_pages;
105 u64 attribute; 100 u64 attribute;
106#if defined (__i386__)
107 u64 pad1;
108#endif
109} efi_memory_desc_t; 101} efi_memory_desc_t;
110 102
111typedef int (*efi_freemem_callback_t) (unsigned long start, unsigned long end, void *arg); 103typedef int (*efi_freemem_callback_t) (unsigned long start, unsigned long end, void *arg);
@@ -240,10 +232,12 @@ typedef struct {
240} efi_system_table_t; 232} efi_system_table_t;
241 233
242struct efi_memory_map { 234struct efi_memory_map {
243 efi_memory_desc_t *phys_map; 235 void *phys_map;
244 efi_memory_desc_t *map; 236 void *map;
237 void *map_end;
245 int nr_map; 238 int nr_map;
246 unsigned long desc_version; 239 unsigned long desc_version;
240 unsigned long desc_size;
247}; 241};
248 242
249/* 243/*
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index f529d1442815..e670b0d13fe0 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -70,12 +70,6 @@ pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
70void hugetlb_prefault_arch_hook(struct mm_struct *mm); 70void hugetlb_prefault_arch_hook(struct mm_struct *mm);
71#endif 71#endif
72 72
73#ifndef ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
74#define hugetlb_clean_stale_pgtable(pte) BUG()
75#else
76void hugetlb_clean_stale_pgtable(pte_t *pte);
77#endif
78
79#else /* !CONFIG_HUGETLB_PAGE */ 73#else /* !CONFIG_HUGETLB_PAGE */
80 74
81static inline int is_vm_hugetlb_page(struct vm_area_struct *vma) 75static inline int is_vm_hugetlb_page(struct vm_area_struct *vma)
diff --git a/include/linux/hwmon-sysfs.h b/include/linux/hwmon-sysfs.h
index 1b5018a965f5..7eb4004b3601 100644
--- a/include/linux/hwmon-sysfs.h
+++ b/include/linux/hwmon-sysfs.h
@@ -33,4 +33,19 @@ struct sensor_device_attribute sensor_dev_attr_##_name = { \
33 .index = _index, \ 33 .index = _index, \
34} 34}
35 35
36struct sensor_device_attribute_2 {
37 struct device_attribute dev_attr;
38 u8 index;
39 u8 nr;
40};
41#define to_sensor_dev_attr_2(_dev_attr) \
42 container_of(_dev_attr, struct sensor_device_attribute_2, dev_attr)
43
44#define SENSOR_DEVICE_ATTR_2(_name,_mode,_show,_store,_nr,_index) \
45struct sensor_device_attribute_2 sensor_dev_attr_##_name = { \
46 .dev_attr = __ATTR(_name,_mode,_show,_store), \
47 .index = _index, \
48 .nr = _nr, \
49}
50
36#endif /* _LINUX_HWMON_SYSFS_H */ 51#endif /* _LINUX_HWMON_SYSFS_H */
diff --git a/include/linux/hwmon-vid.h b/include/linux/hwmon-vid.h
new file mode 100644
index 000000000000..cd4b7a042b86
--- /dev/null
+++ b/include/linux/hwmon-vid.h
@@ -0,0 +1,45 @@
1/*
2 hwmon-vid.h - VID/VRM/VRD voltage conversions
3
4 Originally part of lm_sensors
5 Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
6 With assistance from Trent Piepho <xyzzy@speakeasy.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23#ifndef _LINUX_HWMON_VID_H
24#define _LINUX_HWMON_VID_H
25
26int vid_from_reg(int val, int vrm);
27int vid_which_vrm(void);
28
29/* vrm is the VRM/VRD document version multiplied by 10.
30 val is in mV to avoid floating point in the kernel.
31 Returned value is the 4-, 5- or 6-bit VID code.
32 Note that only VRM 9.x is supported for now. */
33static inline int vid_to_reg(int val, int vrm)
34{
35 switch (vrm) {
36 case 91: /* VRM 9.1 */
37 case 90: /* VRM 9.0 */
38 return ((val >= 1100) && (val <= 1850) ?
39 ((18499 - val * 10) / 25 + 5) / 10 : -1);
40 default:
41 return -1;
42 }
43}
44
45#endif /* _LINUX_HWMON_VID_H */
diff --git a/include/linux/hwmon.h b/include/linux/hwmon.h
new file mode 100644
index 000000000000..0efd994c37f1
--- /dev/null
+++ b/include/linux/hwmon.h
@@ -0,0 +1,35 @@
1/*
2 hwmon.h - part of lm_sensors, Linux kernel modules for hardware monitoring
3
4 This file declares helper functions for the sysfs class "hwmon",
5 for use by sensors drivers.
6
7 Copyright (C) 2005 Mark M. Hoffman <mhoffman@lightlink.com>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; version 2 of the License.
12*/
13
14#ifndef _HWMON_H_
15#define _HWMON_H_
16
17#include <linux/device.h>
18
19struct class_device *hwmon_device_register(struct device *dev);
20
21void hwmon_device_unregister(struct class_device *cdev);
22
23/* Scale user input to sensible values */
24static inline int SENSORS_LIMIT(long value, long low, long high)
25{
26 if (value < low)
27 return low;
28 else if (value > high)
29 return high;
30 else
31 return value;
32}
33
34#endif
35
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 33f08258f22b..44f30876a1c9 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -1,6 +1,6 @@
1/* ------------------------------------------------------------------------- */ 1/* ------------------------------------------------------------------------- */
2/* */ 2/* */
3/* i2c.h - definitions for the i2c-bus interface */ 3/* i2c-id.h - identifier values for i2c drivers and adapters */
4/* */ 4/* */
5/* ------------------------------------------------------------------------- */ 5/* ------------------------------------------------------------------------- */
6/* Copyright (C) 1995-1999 Simon G. Vogl 6/* Copyright (C) 1995-1999 Simon G. Vogl
@@ -24,16 +24,6 @@
24#define LINUX_I2C_ID_H 24#define LINUX_I2C_ID_H
25 25
26/* 26/*
27 * This file is part of the i2c-bus package and contains the identifier
28 * values for drivers, adapters and other folk populating these serial
29 * worlds.
30 *
31 * These will change often (i.e. additions) , therefore this has been
32 * separated from the functional interface definitions of the i2c api.
33 *
34 */
35
36/*
37 * ---- Driver types ----------------------------------------------------- 27 * ---- Driver types -----------------------------------------------------
38 * device id name + number function description, i2c address(es) 28 * device id name + number function description, i2c address(es)
39 * 29 *
@@ -170,151 +160,113 @@
170 160
171/* 161/*
172 * ---- Adapter types ---------------------------------------------------- 162 * ---- Adapter types ----------------------------------------------------
173 *
174 * First, we distinguish between several algorithms to access the hardware
175 * interface types, as a PCF 8584 needs other care than a bit adapter.
176 */
177
178#define I2C_ALGO_NONE 0x000000
179#define I2C_ALGO_BIT 0x010000 /* bit style adapters */
180#define I2C_ALGO_PCF 0x020000 /* PCF 8584 style adapters */
181#define I2C_ALGO_ATI 0x030000 /* ATI video card */
182#define I2C_ALGO_SMBUS 0x040000
183#define I2C_ALGO_ISA 0x050000 /* lm_sensors ISA pseudo-adapter */
184#define I2C_ALGO_SAA7146 0x060000 /* SAA 7146 video decoder bus */
185#define I2C_ALGO_ACB 0x070000 /* ACCESS.bus algorithm */
186#define I2C_ALGO_IIC 0x080000 /* ITE IIC bus */
187#define I2C_ALGO_SAA7134 0x090000
188#define I2C_ALGO_MPC824X 0x0a0000 /* Motorola 8240 / 8245 */
189#define I2C_ALGO_IPMI 0x0b0000 /* IPMI dummy adapter */
190#define I2C_ALGO_IPMB 0x0c0000 /* IPMB adapter */
191#define I2C_ALGO_MPC107 0x0d0000
192#define I2C_ALGO_EC 0x100000 /* ACPI embedded controller */
193
194#define I2C_ALGO_MPC8XX 0x110000 /* MPC8xx PowerPC I2C algorithm */
195#define I2C_ALGO_OCP 0x120000 /* IBM or otherwise On-chip I2C algorithm */
196#define I2C_ALGO_BITHS 0x130000 /* enhanced bit style adapters */
197#define I2C_ALGO_IOP3XX 0x140000 /* XSCALE IOP3XX On-chip I2C alg */
198#define I2C_ALGO_SIBYTE 0x150000 /* Broadcom SiByte SOCs */
199#define I2C_ALGO_SGI 0x160000 /* SGI algorithm */
200
201#define I2C_ALGO_USB 0x170000 /* USB algorithm */
202#define I2C_ALGO_VIRT 0x180000 /* Virtual bus adapter */
203
204#define I2C_ALGO_MV64XXX 0x190000 /* Marvell mv64xxx i2c ctlr */
205#define I2C_ALGO_PCA 0x1a0000 /* PCA 9564 style adapters */
206#define I2C_ALGO_AU1550 0x1b0000 /* Au1550 PSC algorithm */
207
208#define I2C_ALGO_EXP 0x800000 /* experimental */
209
210#define I2C_ALGO_MASK 0xff0000 /* Mask for algorithms */
211#define I2C_ALGO_SHIFT 0x10 /* right shift to get index values */
212
213#define I2C_HW_ADAPS 0x10000 /* # adapter types */
214#define I2C_HW_MASK 0xffff
215
216
217/* hw specific modules that are defined per algorithm layer
218 */ 163 */
219 164
220/* --- Bit algorithm adapters */ 165/* --- Bit algorithm adapters */
221#define I2C_HW_B_LP 0x00 /* Parallel port Philips style adapter */ 166#define I2C_HW_B_LP 0x010000 /* Parallel port Philips style */
222#define I2C_HW_B_LPC 0x01 /* Parallel port, over control reg. */ 167#define I2C_HW_B_LPC 0x010001 /* Parallel port control reg. */
223#define I2C_HW_B_SER 0x02 /* Serial line interface */ 168#define I2C_HW_B_SER 0x010002 /* Serial line interface */
224#define I2C_HW_B_ELV 0x03 /* ELV Card */ 169#define I2C_HW_B_ELV 0x010003 /* ELV Card */
225#define I2C_HW_B_VELLE 0x04 /* Vellemann K8000 */ 170#define I2C_HW_B_VELLE 0x010004 /* Vellemann K8000 */
226#define I2C_HW_B_BT848 0x05 /* BT848 video boards */ 171#define I2C_HW_B_BT848 0x010005 /* BT848 video boards */
227#define I2C_HW_B_WNV 0x06 /* Winnov Videums */ 172#define I2C_HW_B_WNV 0x010006 /* Winnov Videums */
228#define I2C_HW_B_VIA 0x07 /* Via vt82c586b */ 173#define I2C_HW_B_VIA 0x010007 /* Via vt82c586b */
229#define I2C_HW_B_HYDRA 0x08 /* Apple Hydra Mac I/O */ 174#define I2C_HW_B_HYDRA 0x010008 /* Apple Hydra Mac I/O */
230#define I2C_HW_B_G400 0x09 /* Matrox G400 */ 175#define I2C_HW_B_G400 0x010009 /* Matrox G400 */
231#define I2C_HW_B_I810 0x0a /* Intel I810 */ 176#define I2C_HW_B_I810 0x01000a /* Intel I810 */
232#define I2C_HW_B_VOO 0x0b /* 3dfx Voodoo 3 / Banshee */ 177#define I2C_HW_B_VOO 0x01000b /* 3dfx Voodoo 3 / Banshee */
233#define I2C_HW_B_PPORT 0x0c /* Primitive parallel port adapter */ 178#define I2C_HW_B_PPORT 0x01000c /* Primitive parallel port adapter */
234#define I2C_HW_B_SAVG 0x0d /* Savage 4 */ 179#define I2C_HW_B_SAVG 0x01000d /* Savage 4 */
235#define I2C_HW_B_SCX200 0x0e /* Nat'l Semi SCx200 I2C */ 180#define I2C_HW_B_SCX200 0x01000e /* Nat'l Semi SCx200 I2C */
236#define I2C_HW_B_RIVA 0x10 /* Riva based graphics cards */ 181#define I2C_HW_B_RIVA 0x010010 /* Riva based graphics cards */
237#define I2C_HW_B_IOC 0x11 /* IOC bit-wiggling */ 182#define I2C_HW_B_IOC 0x010011 /* IOC bit-wiggling */
238#define I2C_HW_B_TSUNA 0x12 /* DEC Tsunami chipset */ 183#define I2C_HW_B_TSUNA 0x010012 /* DEC Tsunami chipset */
239#define I2C_HW_B_FRODO 0x13 /* 2d3D, Inc. SA-1110 Development Board */ 184#define I2C_HW_B_FRODO 0x010013 /* 2d3D SA-1110 Development Board */
240#define I2C_HW_B_OMAHA 0x14 /* Omaha I2C interface (ARM) */ 185#define I2C_HW_B_OMAHA 0x010014 /* Omaha I2C interface (ARM) */
241#define I2C_HW_B_GUIDE 0x15 /* Guide bit-basher */ 186#define I2C_HW_B_GUIDE 0x010015 /* Guide bit-basher */
242#define I2C_HW_B_IXP2000 0x16 /* GPIO on IXP2000 systems */ 187#define I2C_HW_B_IXP2000 0x010016 /* GPIO on IXP2000 systems */
243#define I2C_HW_B_IXP4XX 0x17 /* GPIO on IXP4XX systems */ 188#define I2C_HW_B_IXP4XX 0x010017 /* GPIO on IXP4XX systems */
244#define I2C_HW_B_S3VIA 0x18 /* S3Via ProSavage adapter */ 189#define I2C_HW_B_S3VIA 0x010018 /* S3Via ProSavage adapter */
245#define I2C_HW_B_ZR36067 0x19 /* Zoran-36057/36067 based boards */ 190#define I2C_HW_B_ZR36067 0x010019 /* Zoran-36057/36067 based boards */
246#define I2C_HW_B_PCILYNX 0x1a /* TI PCILynx I2C adapter */ 191#define I2C_HW_B_PCILYNX 0x01001a /* TI PCILynx I2C adapter */
247#define I2C_HW_B_CX2388x 0x1b /* connexant 2388x based tv cards */ 192#define I2C_HW_B_CX2388x 0x01001b /* connexant 2388x based tv cards */
193#define I2C_HW_B_NVIDIA 0x01001c /* nvidia framebuffer driver */
194#define I2C_HW_B_SAVAGE 0x01001d /* savage framebuffer driver */
195#define I2C_HW_B_RADEON 0x01001e /* radeon framebuffer driver */
248 196
249/* --- PCF 8584 based algorithms */ 197/* --- PCF 8584 based algorithms */
250#define I2C_HW_P_LP 0x00 /* Parallel port interface */ 198#define I2C_HW_P_LP 0x020000 /* Parallel port interface */
251#define I2C_HW_P_ISA 0x01 /* generic ISA Bus inteface card */ 199#define I2C_HW_P_ISA 0x020001 /* generic ISA Bus inteface card */
252#define I2C_HW_P_ELEK 0x02 /* Elektor ISA Bus inteface card */ 200#define I2C_HW_P_ELEK 0x020002 /* Elektor ISA Bus inteface card */
253 201
254/* --- PCA 9564 based algorithms */ 202/* --- PCA 9564 based algorithms */
255#define I2C_HW_A_ISA 0x00 /* generic ISA Bus interface card */ 203#define I2C_HW_A_ISA 0x1a0000 /* generic ISA Bus interface card */
256 204
257/* --- ACPI Embedded controller algorithms */ 205/* --- ACPI Embedded controller algorithms */
258#define I2C_HW_ACPI_EC 0x00 206#define I2C_HW_ACPI_EC 0x1f0000
259 207
260/* --- MPC824x PowerPC adapters */ 208/* --- MPC824x PowerPC adapters */
261#define I2C_HW_MPC824X 0x00 /* Motorola 8240 / 8245 */ 209#define I2C_HW_MPC824X 0x100001 /* Motorola 8240 / 8245 */
262 210
263/* --- MPC8xx PowerPC adapters */ 211/* --- MPC8xx PowerPC adapters */
264#define I2C_HW_MPC8XX_EPON 0x00 /* Eponymous MPC8xx I2C adapter */ 212#define I2C_HW_MPC8XX_EPON 0x110000 /* Eponymous MPC8xx I2C adapter */
265 213
266/* --- ITE based algorithms */ 214/* --- ITE based algorithms */
267#define I2C_HW_I_IIC 0x00 /* controller on the ITE */ 215#define I2C_HW_I_IIC 0x080000 /* controller on the ITE */
268 216
269/* --- PowerPC on-chip adapters */ 217/* --- PowerPC on-chip adapters */
270#define I2C_HW_OCP 0x00 /* IBM on-chip I2C adapter */ 218#define I2C_HW_OCP 0x120000 /* IBM on-chip I2C adapter */
271 219
272/* --- Broadcom SiByte adapters */ 220/* --- Broadcom SiByte adapters */
273#define I2C_HW_SIBYTE 0x00 221#define I2C_HW_SIBYTE 0x150000
274 222
275/* --- SGI adapters */ 223/* --- SGI adapters */
276#define I2C_HW_SGI_VINO 0x00 224#define I2C_HW_SGI_VINO 0x160000
277#define I2C_HW_SGI_MACE 0x01 225#define I2C_HW_SGI_MACE 0x160001
278 226
279/* --- XSCALE on-chip adapters */ 227/* --- XSCALE on-chip adapters */
280#define I2C_HW_IOP3XX 0x00 228#define I2C_HW_IOP3XX 0x140000
281 229
282/* --- Au1550 PSC adapters adapters */ 230/* --- Au1550 PSC adapters adapters */
283#define I2C_HW_AU1550_PSC 0x00 231#define I2C_HW_AU1550_PSC 0x1b0000
284 232
285/* --- SMBus only adapters */ 233/* --- SMBus only adapters */
286#define I2C_HW_SMBUS_PIIX4 0x00 234#define I2C_HW_SMBUS_PIIX4 0x040000
287#define I2C_HW_SMBUS_ALI15X3 0x01 235#define I2C_HW_SMBUS_ALI15X3 0x040001
288#define I2C_HW_SMBUS_VIA2 0x02 236#define I2C_HW_SMBUS_VIA2 0x040002
289#define I2C_HW_SMBUS_VOODOO3 0x03 237#define I2C_HW_SMBUS_VOODOO3 0x040003
290#define I2C_HW_SMBUS_I801 0x04 238#define I2C_HW_SMBUS_I801 0x040004
291#define I2C_HW_SMBUS_AMD756 0x05 239#define I2C_HW_SMBUS_AMD756 0x040005
292#define I2C_HW_SMBUS_SIS5595 0x06 240#define I2C_HW_SMBUS_SIS5595 0x040006
293#define I2C_HW_SMBUS_ALI1535 0x07 241#define I2C_HW_SMBUS_ALI1535 0x040007
294#define I2C_HW_SMBUS_SIS630 0x08 242#define I2C_HW_SMBUS_SIS630 0x040008
295#define I2C_HW_SMBUS_SIS96X 0x09 243#define I2C_HW_SMBUS_SIS96X 0x040009
296#define I2C_HW_SMBUS_AMD8111 0x0a 244#define I2C_HW_SMBUS_AMD8111 0x04000a
297#define I2C_HW_SMBUS_SCX200 0x0b 245#define I2C_HW_SMBUS_SCX200 0x04000b
298#define I2C_HW_SMBUS_NFORCE2 0x0c 246#define I2C_HW_SMBUS_NFORCE2 0x04000c
299#define I2C_HW_SMBUS_W9968CF 0x0d 247#define I2C_HW_SMBUS_W9968CF 0x04000d
300#define I2C_HW_SMBUS_OV511 0x0e /* OV511(+) USB 1.1 webcam ICs */ 248#define I2C_HW_SMBUS_OV511 0x04000e /* OV511(+) USB 1.1 webcam ICs */
301#define I2C_HW_SMBUS_OV518 0x0f /* OV518(+) USB 1.1 webcam ICs */ 249#define I2C_HW_SMBUS_OV518 0x04000f /* OV518(+) USB 1.1 webcam ICs */
302#define I2C_HW_SMBUS_OV519 0x10 /* OV519 USB 1.1 webcam IC */ 250#define I2C_HW_SMBUS_OV519 0x040010 /* OV519 USB 1.1 webcam IC */
303#define I2C_HW_SMBUS_OVFX2 0x11 /* Cypress/OmniVision FX2 webcam */ 251#define I2C_HW_SMBUS_OVFX2 0x040011 /* Cypress/OmniVision FX2 webcam */
304 252
305/* --- ISA pseudo-adapter */ 253/* --- ISA pseudo-adapter */
306#define I2C_HW_ISA 0x00 254#define I2C_HW_ISA 0x050000
307 255
308/* --- IPMI pseudo-adapter */ 256/* --- IPMI pseudo-adapter */
309#define I2C_HW_IPMI 0x00 257#define I2C_HW_IPMI 0x0b0000
310 258
311/* --- IPMB adapter */ 259/* --- IPMB adapter */
312#define I2C_HW_IPMB 0x00 260#define I2C_HW_IPMB 0x0c0000
313 261
314/* --- MCP107 adapter */ 262/* --- MCP107 adapter */
315#define I2C_HW_MPC107 0x00 263#define I2C_HW_MPC107 0x0d0000
316 264
317/* --- Marvell mv64xxx i2c adapter */ 265/* --- Marvell mv64xxx i2c adapter */
318#define I2C_HW_MV64XXX 0x00 266#define I2C_HW_MV64XXX 0x190000
267
268/* --- Miscellaneous adapters */
269#define I2C_HW_SAA7146 0x060000 /* SAA7146 video decoder bus */
270#define I2C_HW_SAA7134 0x090000 /* SAA7134 video decoder bus */
319 271
320#endif /* LINUX_I2C_ID_H */ 272#endif /* LINUX_I2C_ID_H */
diff --git a/include/linux/i2c-isa.h b/include/linux/i2c-isa.h
new file mode 100644
index 000000000000..67e3598c4cec
--- /dev/null
+++ b/include/linux/i2c-isa.h
@@ -0,0 +1,36 @@
1/*
2 * i2c-isa.h - definitions for the i2c-isa pseudo-i2c-adapter interface
3 *
4 * Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef _LINUX_I2C_ISA_H
22#define _LINUX_I2C_ISA_H
23
24#include <linux/i2c.h>
25
26extern int i2c_isa_add_driver(struct i2c_driver *driver);
27extern int i2c_isa_del_driver(struct i2c_driver *driver);
28
29/* Detect whether we are on the isa bus. This is only useful to hybrid
30 (i2c+isa) drivers. */
31#define i2c_is_isa_adapter(adapptr) \
32 ((adapptr)->id == I2C_HW_ISA)
33#define i2c_is_isa_client(clientptr) \
34 i2c_is_isa_adapter((clientptr)->adapter)
35
36#endif /* _LINUX_I2C_ISA_H */
diff --git a/include/linux/i2c-sensor.h b/include/linux/i2c-sensor.h
deleted file mode 100644
index 21b625204956..000000000000
--- a/include/linux/i2c-sensor.h
+++ /dev/null
@@ -1,263 +0,0 @@
1/*
2 i2c-sensor.h - Part of the i2c package
3 was originally sensors.h - Part of lm_sensors, Linux kernel modules
4 for hardware monitoring
5 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#ifndef _LINUX_I2C_SENSOR_H
23#define _LINUX_I2C_SENSOR_H
24
25/* A structure containing detect information.
26 Force variables overrule all other variables; they force a detection on
27 that place. If a specific chip is given, the module blindly assumes this
28 chip type is present; if a general force (kind == 0) is given, the module
29 will still try to figure out what type of chip is present. This is useful
30 if for some reasons the detect for SMBus or ISA address space filled
31 fails.
32 probe: insmod parameter. Initialize this list with I2C_CLIENT_ISA_END values.
33 A list of pairs. The first value is a bus number (ANY_I2C_ISA_BUS for
34 the ISA bus, -1 for any I2C bus), the second is the address.
35 kind: The kind of chip. 0 equals any chip.
36*/
37struct i2c_force_data {
38 unsigned short *force;
39 unsigned short kind;
40};
41
42/* A structure containing the detect information.
43 normal_i2c: filled in by the module writer. Terminated by I2C_CLIENT_ISA_END.
44 A list of I2C addresses which should normally be examined.
45 normal_isa: filled in by the module writer. Terminated by SENSORS_ISA_END.
46 A list of ISA addresses which should normally be examined.
47 probe: insmod parameter. Initialize this list with I2C_CLIENT_ISA_END values.
48 A list of pairs. The first value is a bus number (ANY_I2C_ISA_BUS for
49 the ISA bus, -1 for any I2C bus), the second is the address. These
50 addresses are also probed, as if they were in the 'normal' list.
51 ignore: insmod parameter. Initialize this list with I2C_CLIENT_ISA_END values.
52 A list of pairs. The first value is a bus number (ANY_I2C_ISA_BUS for
53 the ISA bus, -1 for any I2C bus), the second is the I2C address. These
54 addresses are never probed. This parameter overrules 'normal' and
55 'probe', but not the 'force' lists.
56 force_data: insmod parameters. A list, ending with an element of which
57 the force field is NULL.
58*/
59struct i2c_address_data {
60 unsigned short *normal_i2c;
61 unsigned int *normal_isa;
62 unsigned short *probe;
63 unsigned short *ignore;
64 struct i2c_force_data *forces;
65};
66
67#define SENSORS_MODULE_PARM_FORCE(name) \
68 I2C_CLIENT_MODULE_PARM(force_ ## name, \
69 "List of adapter,address pairs which are unquestionably" \
70 " assumed to contain a `" # name "' chip")
71
72
73/* This defines several insmod variables, and the addr_data structure */
74#define SENSORS_INSMOD \
75 I2C_CLIENT_MODULE_PARM(probe, \
76 "List of adapter,address pairs to scan additionally"); \
77 I2C_CLIENT_MODULE_PARM(ignore, \
78 "List of adapter,address pairs not to scan"); \
79 static struct i2c_address_data addr_data = { \
80 .normal_i2c = normal_i2c, \
81 .normal_isa = normal_isa, \
82 .probe = probe, \
83 .ignore = ignore, \
84 .forces = forces, \
85 }
86
87/* The following functions create an enum with the chip names as elements.
88 The first element of the enum is any_chip. These are the only macros
89 a module will want to use. */
90
91#define SENSORS_INSMOD_0 \
92 enum chips { any_chip }; \
93 I2C_CLIENT_MODULE_PARM(force, \
94 "List of adapter,address pairs to boldly assume " \
95 "to be present"); \
96 static struct i2c_force_data forces[] = {{force,any_chip},{NULL}}; \
97 SENSORS_INSMOD
98
99#define SENSORS_INSMOD_1(chip1) \
100 enum chips { any_chip, chip1 }; \
101 I2C_CLIENT_MODULE_PARM(force, \
102 "List of adapter,address pairs to boldly assume " \
103 "to be present"); \
104 SENSORS_MODULE_PARM_FORCE(chip1); \
105 static struct i2c_force_data forces[] = {{force,any_chip},\
106 {force_ ## chip1,chip1}, \
107 {NULL}}; \
108 SENSORS_INSMOD
109
110#define SENSORS_INSMOD_2(chip1,chip2) \
111 enum chips { any_chip, chip1, chip2 }; \
112 I2C_CLIENT_MODULE_PARM(force, \
113 "List of adapter,address pairs to boldly assume " \
114 "to be present"); \
115 SENSORS_MODULE_PARM_FORCE(chip1); \
116 SENSORS_MODULE_PARM_FORCE(chip2); \
117 static struct i2c_force_data forces[] = {{force,any_chip}, \
118 {force_ ## chip1,chip1}, \
119 {force_ ## chip2,chip2}, \
120 {NULL}}; \
121 SENSORS_INSMOD
122
123#define SENSORS_INSMOD_3(chip1,chip2,chip3) \
124 enum chips { any_chip, chip1, chip2, chip3 }; \
125 I2C_CLIENT_MODULE_PARM(force, \
126 "List of adapter,address pairs to boldly assume " \
127 "to be present"); \
128 SENSORS_MODULE_PARM_FORCE(chip1); \
129 SENSORS_MODULE_PARM_FORCE(chip2); \
130 SENSORS_MODULE_PARM_FORCE(chip3); \
131 static struct i2c_force_data forces[] = {{force,any_chip}, \
132 {force_ ## chip1,chip1}, \
133 {force_ ## chip2,chip2}, \
134 {force_ ## chip3,chip3}, \
135 {NULL}}; \
136 SENSORS_INSMOD
137
138#define SENSORS_INSMOD_4(chip1,chip2,chip3,chip4) \
139 enum chips { any_chip, chip1, chip2, chip3, chip4 }; \
140 I2C_CLIENT_MODULE_PARM(force, \
141 "List of adapter,address pairs to boldly assume " \
142 "to be present"); \
143 SENSORS_MODULE_PARM_FORCE(chip1); \
144 SENSORS_MODULE_PARM_FORCE(chip2); \
145 SENSORS_MODULE_PARM_FORCE(chip3); \
146 SENSORS_MODULE_PARM_FORCE(chip4); \
147 static struct i2c_force_data forces[] = {{force,any_chip}, \
148 {force_ ## chip1,chip1}, \
149 {force_ ## chip2,chip2}, \
150 {force_ ## chip3,chip3}, \
151 {force_ ## chip4,chip4}, \
152 {NULL}}; \
153 SENSORS_INSMOD
154
155#define SENSORS_INSMOD_5(chip1,chip2,chip3,chip4,chip5) \
156 enum chips { any_chip, chip1, chip2, chip3, chip4, chip5 }; \
157 I2C_CLIENT_MODULE_PARM(force, \
158 "List of adapter,address pairs to boldly assume " \
159 "to be present"); \
160 SENSORS_MODULE_PARM_FORCE(chip1); \
161 SENSORS_MODULE_PARM_FORCE(chip2); \
162 SENSORS_MODULE_PARM_FORCE(chip3); \
163 SENSORS_MODULE_PARM_FORCE(chip4); \
164 SENSORS_MODULE_PARM_FORCE(chip5); \
165 static struct i2c_force_data forces[] = {{force,any_chip}, \
166 {force_ ## chip1,chip1}, \
167 {force_ ## chip2,chip2}, \
168 {force_ ## chip3,chip3}, \
169 {force_ ## chip4,chip4}, \
170 {force_ ## chip5,chip5}, \
171 {NULL}}; \
172 SENSORS_INSMOD
173
174#define SENSORS_INSMOD_6(chip1,chip2,chip3,chip4,chip5,chip6) \
175 enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6 }; \
176 I2C_CLIENT_MODULE_PARM(force, \
177 "List of adapter,address pairs to boldly assume " \
178 "to be present"); \
179 SENSORS_MODULE_PARM_FORCE(chip1); \
180 SENSORS_MODULE_PARM_FORCE(chip2); \
181 SENSORS_MODULE_PARM_FORCE(chip3); \
182 SENSORS_MODULE_PARM_FORCE(chip4); \
183 SENSORS_MODULE_PARM_FORCE(chip5); \
184 SENSORS_MODULE_PARM_FORCE(chip6); \
185 static struct i2c_force_data forces[] = {{force,any_chip}, \
186 {force_ ## chip1,chip1}, \
187 {force_ ## chip2,chip2}, \
188 {force_ ## chip3,chip3}, \
189 {force_ ## chip4,chip4}, \
190 {force_ ## chip5,chip5}, \
191 {force_ ## chip6,chip6}, \
192 {NULL}}; \
193 SENSORS_INSMOD
194
195#define SENSORS_INSMOD_7(chip1,chip2,chip3,chip4,chip5,chip6,chip7) \
196 enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6, chip7 }; \
197 I2C_CLIENT_MODULE_PARM(force, \
198 "List of adapter,address pairs to boldly assume " \
199 "to be present"); \
200 SENSORS_MODULE_PARM_FORCE(chip1); \
201 SENSORS_MODULE_PARM_FORCE(chip2); \
202 SENSORS_MODULE_PARM_FORCE(chip3); \
203 SENSORS_MODULE_PARM_FORCE(chip4); \
204 SENSORS_MODULE_PARM_FORCE(chip5); \
205 SENSORS_MODULE_PARM_FORCE(chip6); \
206 SENSORS_MODULE_PARM_FORCE(chip7); \
207 static struct i2c_force_data forces[] = {{force,any_chip}, \
208 {force_ ## chip1,chip1}, \
209 {force_ ## chip2,chip2}, \
210 {force_ ## chip3,chip3}, \
211 {force_ ## chip4,chip4}, \
212 {force_ ## chip5,chip5}, \
213 {force_ ## chip6,chip6}, \
214 {force_ ## chip7,chip7}, \
215 {NULL}}; \
216 SENSORS_INSMOD
217
218#define SENSORS_INSMOD_8(chip1,chip2,chip3,chip4,chip5,chip6,chip7,chip8) \
219 enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6, chip7, chip8 }; \
220 I2C_CLIENT_MODULE_PARM(force, \
221 "List of adapter,address pairs to boldly assume " \
222 "to be present"); \
223 SENSORS_MODULE_PARM_FORCE(chip1); \
224 SENSORS_MODULE_PARM_FORCE(chip2); \
225 SENSORS_MODULE_PARM_FORCE(chip3); \
226 SENSORS_MODULE_PARM_FORCE(chip4); \
227 SENSORS_MODULE_PARM_FORCE(chip5); \
228 SENSORS_MODULE_PARM_FORCE(chip6); \
229 SENSORS_MODULE_PARM_FORCE(chip7); \
230 SENSORS_MODULE_PARM_FORCE(chip8); \
231 static struct i2c_force_data forces[] = {{force,any_chip}, \
232 {force_ ## chip1,chip1}, \
233 {force_ ## chip2,chip2}, \
234 {force_ ## chip3,chip3}, \
235 {force_ ## chip4,chip4}, \
236 {force_ ## chip5,chip5}, \
237 {force_ ## chip6,chip6}, \
238 {force_ ## chip7,chip7}, \
239 {force_ ## chip8,chip8}, \
240 {NULL}}; \
241 SENSORS_INSMOD
242
243/* Detect function. It iterates over all possible addresses itself. For
244 SMBus addresses, it will only call found_proc if some client is connected
245 to the SMBus (unless a 'force' matched); for ISA detections, this is not
246 done. */
247extern int i2c_detect(struct i2c_adapter *adapter,
248 struct i2c_address_data *address_data,
249 int (*found_proc) (struct i2c_adapter *, int, int));
250
251
252/* This macro is used to scale user-input to sensible values in almost all
253 chip drivers. */
254static inline int SENSORS_LIMIT(long value, long low, long high)
255{
256 if (value < low)
257 return low;
258 else if (value > high)
259 return high;
260 else
261 return value;
262}
263#endif /* def _LINUX_I2C_SENSOR_H */
diff --git a/include/linux/i2c-vid.h b/include/linux/i2c-vid.h
deleted file mode 100644
index 41d0635e0ba9..000000000000
--- a/include/linux/i2c-vid.h
+++ /dev/null
@@ -1,111 +0,0 @@
1/*
2 i2c-vid.h - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
5 With assistance from Trent Piepho <xyzzy@speakeasy.org>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22/*
23 This file contains common code for decoding VID pins.
24 This file is #included in various chip drivers in this directory.
25 As the user is unlikely to load more than one driver which
26 includes this code we don't worry about the wasted space.
27 Reference: VRM x.y DC-DC Converter Design Guidelines,
28 available at http://developer.intel.com
29*/
30
31/*
32 AMD Opteron processors don't follow the Intel VRM spec.
33 I'm going to "make up" 2.4 as the VRM spec for the Opterons.
34 No good reason just a mnemonic for the 24x Opteron processor
35 series
36
37 Opteron VID encoding is:
38
39 00000 = 1.550 V
40 00001 = 1.525 V
41 . . . .
42 11110 = 0.800 V
43 11111 = 0.000 V (off)
44 */
45
46/*
47 Legal val values 0x00 - 0x1f; except for VRD 10.0, 0x00 - 0x3f.
48 vrm is the Intel VRM document version.
49 Note: vrm version is scaled by 10 and the return value is scaled by 1000
50 to avoid floating point in the kernel.
51*/
52
53int i2c_which_vrm(void);
54
55#define DEFAULT_VRM 82
56
57static inline int vid_from_reg(int val, int vrm)
58{
59 int vid;
60
61 switch(vrm) {
62
63 case 0:
64 return 0;
65
66 case 100: /* VRD 10.0 */
67 if((val & 0x1f) == 0x1f)
68 return 0;
69 if((val & 0x1f) <= 0x09 || val == 0x0a)
70 vid = 10875 - (val & 0x1f) * 250;
71 else
72 vid = 18625 - (val & 0x1f) * 250;
73 if(val & 0x20)
74 vid -= 125;
75 vid /= 10; /* only return 3 dec. places for now */
76 return vid;
77
78 case 24: /* Opteron processor */
79 return(val == 0x1f ? 0 : 1550 - val * 25);
80
81 case 91: /* VRM 9.1 */
82 case 90: /* VRM 9.0 */
83 return(val == 0x1f ? 0 :
84 1850 - val * 25);
85
86 case 85: /* VRM 8.5 */
87 return((val & 0x10 ? 25 : 0) +
88 ((val & 0x0f) > 0x04 ? 2050 : 1250) -
89 ((val & 0x0f) * 50));
90
91 case 84: /* VRM 8.4 */
92 val &= 0x0f;
93 /* fall through */
94 default: /* VRM 8.2 */
95 return(val == 0x1f ? 0 :
96 val & 0x10 ? 5100 - (val) * 100 :
97 2050 - (val) * 50);
98 }
99}
100
101static inline int vid_to_reg(int val, int vrm)
102{
103 switch (vrm) {
104 case 91: /* VRM 9.1 */
105 case 90: /* VRM 9.0 */
106 return ((val >= 1100) && (val <= 1850) ?
107 ((18499 - val * 10) / 25 + 5) / 10 : -1);
108 default:
109 return -1;
110 }
111}
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index be837b13f297..be35332b67e6 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -34,6 +34,13 @@
34#include <linux/device.h> /* for struct device */ 34#include <linux/device.h> /* for struct device */
35#include <asm/semaphore.h> 35#include <asm/semaphore.h>
36 36
37/* --- For i2c-isa ---------------------------------------------------- */
38
39extern void i2c_adapter_dev_release(struct device *dev);
40extern struct device_driver i2c_adapter_driver;
41extern struct class i2c_adapter_class;
42extern struct bus_type i2c_bus_type;
43
37/* --- General options ------------------------------------------------ */ 44/* --- General options ------------------------------------------------ */
38 45
39struct i2c_msg; 46struct i2c_msg;
@@ -41,7 +48,6 @@ struct i2c_algorithm;
41struct i2c_adapter; 48struct i2c_adapter;
42struct i2c_client; 49struct i2c_client;
43struct i2c_driver; 50struct i2c_driver;
44struct i2c_client_address_data;
45union i2c_smbus_data; 51union i2c_smbus_data;
46 52
47/* 53/*
@@ -143,12 +149,9 @@ struct i2c_driver {
143 */ 149 */
144struct i2c_client { 150struct i2c_client {
145 unsigned int flags; /* div., see below */ 151 unsigned int flags; /* div., see below */
146 unsigned int addr; /* chip address - NOTE: 7bit */ 152 unsigned short addr; /* chip address - NOTE: 7bit */
147 /* addresses are stored in the */ 153 /* addresses are stored in the */
148 /* _LOWER_ 7 bits of this char */ 154 /* _LOWER_ 7 bits */
149 /* addr: unsigned int to make lm_sensors i2c-isa adapter work
150 more cleanly. It does not take any more memory space, due to
151 alignment considerations */
152 struct i2c_adapter *adapter; /* the adapter we sit on */ 155 struct i2c_adapter *adapter; /* the adapter we sit on */
153 struct i2c_driver *driver; /* and our access routines */ 156 struct i2c_driver *driver; /* and our access routines */
154 int usage_count; /* How many accesses currently */ 157 int usage_count; /* How many accesses currently */
@@ -160,6 +163,11 @@ struct i2c_client {
160}; 163};
161#define to_i2c_client(d) container_of(d, struct i2c_client, dev) 164#define to_i2c_client(d) container_of(d, struct i2c_client, dev)
162 165
166static inline struct i2c_client *kobj_to_i2c_client(struct kobject *kobj)
167{
168 return to_i2c_client(container_of(kobj, struct device, kobj));
169}
170
163static inline void *i2c_get_clientdata (struct i2c_client *dev) 171static inline void *i2c_get_clientdata (struct i2c_client *dev)
164{ 172{
165 return dev_get_drvdata (&dev->dev); 173 return dev_get_drvdata (&dev->dev);
@@ -170,13 +178,6 @@ static inline void i2c_set_clientdata (struct i2c_client *dev, void *data)
170 dev_set_drvdata (&dev->dev, data); 178 dev_set_drvdata (&dev->dev, data);
171} 179}
172 180
173#define I2C_DEVNAME(str) .name = str
174
175static inline char *i2c_clientname(struct i2c_client *c)
176{
177 return &c->name[0];
178}
179
180/* 181/*
181 * The following structs are for those who like to implement new bus drivers: 182 * The following structs are for those who like to implement new bus drivers:
182 * i2c_algorithm is the interface to a class of hardware solutions which can 183 * i2c_algorithm is the interface to a class of hardware solutions which can
@@ -184,9 +185,6 @@ static inline char *i2c_clientname(struct i2c_client *c)
184 * to name two of the most common. 185 * to name two of the most common.
185 */ 186 */
186struct i2c_algorithm { 187struct i2c_algorithm {
187 char name[32]; /* textual description */
188 unsigned int id;
189
190 /* If an adapter algorithm can't do I2C-level access, set master_xfer 188 /* If an adapter algorithm can't do I2C-level access, set master_xfer
191 to NULL. If an adapter algorithm can do SMBus access, set 189 to NULL. If an adapter algorithm can do SMBus access, set
192 smbus_xfer. If set to NULL, the SMBus protocol is simulated 190 smbus_xfer. If set to NULL, the SMBus protocol is simulated
@@ -214,8 +212,7 @@ struct i2c_algorithm {
214 */ 212 */
215struct i2c_adapter { 213struct i2c_adapter {
216 struct module *owner; 214 struct module *owner;
217 unsigned int id;/* == is algo->id | hwdep.struct->id, */ 215 unsigned int id;
218 /* for registered values see below */
219 unsigned int class; 216 unsigned int class;
220 struct i2c_algorithm *algo;/* the algorithm to access the bus */ 217 struct i2c_algorithm *algo;/* the algorithm to access the bus */
221 void *algo_data; 218 void *algo_data;
@@ -292,12 +289,11 @@ struct i2c_client_address_data {
292 unsigned short *normal_i2c; 289 unsigned short *normal_i2c;
293 unsigned short *probe; 290 unsigned short *probe;
294 unsigned short *ignore; 291 unsigned short *ignore;
295 unsigned short *force; 292 unsigned short **forces;
296}; 293};
297 294
298/* Internal numbers to terminate lists */ 295/* Internal numbers to terminate lists */
299#define I2C_CLIENT_END 0xfffeU 296#define I2C_CLIENT_END 0xfffeU
300#define I2C_CLIENT_ISA_END 0xfffefffeU
301 297
302/* The numbers to use to set I2C bus address */ 298/* The numbers to use to set I2C bus address */
303#define ANY_I2C_BUS 0xffff 299#define ANY_I2C_BUS 0xffff
@@ -356,10 +352,6 @@ extern int i2c_probe(struct i2c_adapter *adapter,
356 */ 352 */
357extern int i2c_control(struct i2c_client *,unsigned int, unsigned long); 353extern int i2c_control(struct i2c_client *,unsigned int, unsigned long);
358 354
359/* This call returns a unique low identifier for each registered adapter,
360 * or -1 if the adapter was not registered.
361 */
362extern int i2c_adapter_id(struct i2c_adapter *adap);
363extern struct i2c_adapter* i2c_get_adapter(int id); 355extern struct i2c_adapter* i2c_get_adapter(int id);
364extern void i2c_put_adapter(struct i2c_adapter *adap); 356extern void i2c_put_adapter(struct i2c_adapter *adap);
365 357
@@ -376,6 +368,12 @@ static inline int i2c_check_functionality(struct i2c_adapter *adap, u32 func)
376 return (func & i2c_get_functionality(adap)) == func; 368 return (func & i2c_get_functionality(adap)) == func;
377} 369}
378 370
371/* Return id number for a specific adapter */
372static inline int i2c_adapter_id(struct i2c_adapter *adap)
373{
374 return adap->nr;
375}
376
379/* 377/*
380 * I2C Message - used for pure i2c transaction, also from /dev interface 378 * I2C Message - used for pure i2c transaction, also from /dev interface
381 */ 379 */
@@ -510,9 +508,6 @@ union i2c_smbus_data {
510#define I2C_FUNCS 0x0705 /* Get the adapter functionality */ 508#define I2C_FUNCS 0x0705 /* Get the adapter functionality */
511#define I2C_RDWR 0x0707 /* Combined R/W transfer (one stop only)*/ 509#define I2C_RDWR 0x0707 /* Combined R/W transfer (one stop only)*/
512#define I2C_PEC 0x0708 /* != 0 for SMBus PEC */ 510#define I2C_PEC 0x0708 /* != 0 for SMBus PEC */
513#if 0
514#define I2C_ACK_TEST 0x0710 /* See if a slave is at a specific address */
515#endif
516 511
517#define I2C_SMBUS 0x0720 /* SMBus-level access */ 512#define I2C_SMBUS 0x0720 /* SMBus-level access */
518 513
@@ -556,27 +551,148 @@ union i2c_smbus_data {
556 module_param_array(var, short, &var##_num, 0); \ 551 module_param_array(var, short, &var##_num, 0); \
557 MODULE_PARM_DESC(var,desc) 552 MODULE_PARM_DESC(var,desc)
558 553
559/* This is the one you want to use in your own modules */ 554#define I2C_CLIENT_MODULE_PARM_FORCE(name) \
555I2C_CLIENT_MODULE_PARM(force_##name, \
556 "List of adapter,address pairs which are " \
557 "unquestionably assumed to contain a `" \
558 # name "' chip")
559
560
561#define I2C_CLIENT_INSMOD_COMMON \
562I2C_CLIENT_MODULE_PARM(probe, "List of adapter,address pairs to scan " \
563 "additionally"); \
564I2C_CLIENT_MODULE_PARM(ignore, "List of adapter,address pairs not to " \
565 "scan"); \
566static struct i2c_client_address_data addr_data = { \
567 .normal_i2c = normal_i2c, \
568 .probe = probe, \
569 .ignore = ignore, \
570 .forces = forces, \
571}
572
573/* These are the ones you want to use in your own drivers. Pick the one
574 which matches the number of devices the driver differenciates between. */
560#define I2C_CLIENT_INSMOD \ 575#define I2C_CLIENT_INSMOD \
561 I2C_CLIENT_MODULE_PARM(probe, \
562 "List of adapter,address pairs to scan additionally"); \
563 I2C_CLIENT_MODULE_PARM(ignore, \
564 "List of adapter,address pairs not to scan"); \
565 I2C_CLIENT_MODULE_PARM(force, \ 576 I2C_CLIENT_MODULE_PARM(force, \
566 "List of adapter,address pairs to boldly assume " \ 577 "List of adapter,address pairs to boldly assume " \
567 "to be present"); \ 578 "to be present"); \
568 static struct i2c_client_address_data addr_data = { \ 579 static unsigned short *forces[] = { \
569 .normal_i2c = normal_i2c, \ 580 force, \
570 .probe = probe, \ 581 NULL \
571 .ignore = ignore, \ 582 }; \
572 .force = force, \ 583I2C_CLIENT_INSMOD_COMMON
573 } 584
574 585#define I2C_CLIENT_INSMOD_1(chip1) \
575/* Detect whether we are on the isa bus. If this returns true, all i2c 586enum chips { any_chip, chip1 }; \
576 access will fail! */ 587I2C_CLIENT_MODULE_PARM(force, "List of adapter,address pairs to " \
577#define i2c_is_isa_client(clientptr) \ 588 "boldly assume to be present"); \
578 ((clientptr)->adapter->algo->id == I2C_ALGO_ISA) 589I2C_CLIENT_MODULE_PARM_FORCE(chip1); \
579#define i2c_is_isa_adapter(adapptr) \ 590static unsigned short *forces[] = { force, force_##chip1, NULL }; \
580 ((adapptr)->algo->id == I2C_ALGO_ISA) 591I2C_CLIENT_INSMOD_COMMON
592
593#define I2C_CLIENT_INSMOD_2(chip1, chip2) \
594enum chips { any_chip, chip1, chip2 }; \
595I2C_CLIENT_MODULE_PARM(force, "List of adapter,address pairs to " \
596 "boldly assume to be present"); \
597I2C_CLIENT_MODULE_PARM_FORCE(chip1); \
598I2C_CLIENT_MODULE_PARM_FORCE(chip2); \
599static unsigned short *forces[] = { force, force_##chip1, \
600 force_##chip2, NULL }; \
601I2C_CLIENT_INSMOD_COMMON
602
603#define I2C_CLIENT_INSMOD_3(chip1, chip2, chip3) \
604enum chips { any_chip, chip1, chip2, chip3 }; \
605I2C_CLIENT_MODULE_PARM(force, "List of adapter,address pairs to " \
606 "boldly assume to be present"); \
607I2C_CLIENT_MODULE_PARM_FORCE(chip1); \
608I2C_CLIENT_MODULE_PARM_FORCE(chip2); \
609I2C_CLIENT_MODULE_PARM_FORCE(chip3); \
610static unsigned short *forces[] = { force, force_##chip1, \
611 force_##chip2, force_##chip3, \
612 NULL }; \
613I2C_CLIENT_INSMOD_COMMON
614
615#define I2C_CLIENT_INSMOD_4(chip1, chip2, chip3, chip4) \
616enum chips { any_chip, chip1, chip2, chip3, chip4 }; \
617I2C_CLIENT_MODULE_PARM(force, "List of adapter,address pairs to " \
618 "boldly assume to be present"); \
619I2C_CLIENT_MODULE_PARM_FORCE(chip1); \
620I2C_CLIENT_MODULE_PARM_FORCE(chip2); \
621I2C_CLIENT_MODULE_PARM_FORCE(chip3); \
622I2C_CLIENT_MODULE_PARM_FORCE(chip4); \
623static unsigned short *forces[] = { force, force_##chip1, \
624 force_##chip2, force_##chip3, \
625 force_##chip4, NULL}; \
626I2C_CLIENT_INSMOD_COMMON
627
628#define I2C_CLIENT_INSMOD_5(chip1, chip2, chip3, chip4, chip5) \
629enum chips { any_chip, chip1, chip2, chip3, chip4, chip5 }; \
630I2C_CLIENT_MODULE_PARM(force, "List of adapter,address pairs to " \
631 "boldly assume to be present"); \
632I2C_CLIENT_MODULE_PARM_FORCE(chip1); \
633I2C_CLIENT_MODULE_PARM_FORCE(chip2); \
634I2C_CLIENT_MODULE_PARM_FORCE(chip3); \
635I2C_CLIENT_MODULE_PARM_FORCE(chip4); \
636I2C_CLIENT_MODULE_PARM_FORCE(chip5); \
637static unsigned short *forces[] = { force, force_##chip1, \
638 force_##chip2, force_##chip3, \
639 force_##chip4, force_##chip5, \
640 NULL }; \
641I2C_CLIENT_INSMOD_COMMON
642
643#define I2C_CLIENT_INSMOD_6(chip1, chip2, chip3, chip4, chip5, chip6) \
644enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6 }; \
645I2C_CLIENT_MODULE_PARM(force, "List of adapter,address pairs to " \
646 "boldly assume to be present"); \
647I2C_CLIENT_MODULE_PARM_FORCE(chip1); \
648I2C_CLIENT_MODULE_PARM_FORCE(chip2); \
649I2C_CLIENT_MODULE_PARM_FORCE(chip3); \
650I2C_CLIENT_MODULE_PARM_FORCE(chip4); \
651I2C_CLIENT_MODULE_PARM_FORCE(chip5); \
652I2C_CLIENT_MODULE_PARM_FORCE(chip6); \
653static unsigned short *forces[] = { force, force_##chip1, \
654 force_##chip2, force_##chip3, \
655 force_##chip4, force_##chip5, \
656 force_##chip6, NULL }; \
657I2C_CLIENT_INSMOD_COMMON
658
659#define I2C_CLIENT_INSMOD_7(chip1, chip2, chip3, chip4, chip5, chip6, chip7) \
660enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6, \
661 chip7 }; \
662I2C_CLIENT_MODULE_PARM(force, "List of adapter,address pairs to " \
663 "boldly assume to be present"); \
664I2C_CLIENT_MODULE_PARM_FORCE(chip1); \
665I2C_CLIENT_MODULE_PARM_FORCE(chip2); \
666I2C_CLIENT_MODULE_PARM_FORCE(chip3); \
667I2C_CLIENT_MODULE_PARM_FORCE(chip4); \
668I2C_CLIENT_MODULE_PARM_FORCE(chip5); \
669I2C_CLIENT_MODULE_PARM_FORCE(chip6); \
670I2C_CLIENT_MODULE_PARM_FORCE(chip7); \
671static unsigned short *forces[] = { force, force_##chip1, \
672 force_##chip2, force_##chip3, \
673 force_##chip4, force_##chip5, \
674 force_##chip6, force_##chip7, \
675 NULL }; \
676I2C_CLIENT_INSMOD_COMMON
677
678#define I2C_CLIENT_INSMOD_8(chip1, chip2, chip3, chip4, chip5, chip6, chip7, chip8) \
679enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6, \
680 chip7, chip8 }; \
681I2C_CLIENT_MODULE_PARM(force, "List of adapter,address pairs to " \
682 "boldly assume to be present"); \
683I2C_CLIENT_MODULE_PARM_FORCE(chip1); \
684I2C_CLIENT_MODULE_PARM_FORCE(chip2); \
685I2C_CLIENT_MODULE_PARM_FORCE(chip3); \
686I2C_CLIENT_MODULE_PARM_FORCE(chip4); \
687I2C_CLIENT_MODULE_PARM_FORCE(chip5); \
688I2C_CLIENT_MODULE_PARM_FORCE(chip6); \
689I2C_CLIENT_MODULE_PARM_FORCE(chip7); \
690I2C_CLIENT_MODULE_PARM_FORCE(chip8); \
691static unsigned short *forces[] = { force, force_##chip1, \
692 force_##chip2, force_##chip3, \
693 force_##chip4, force_##chip5, \
694 force_##chip6, force_##chip7, \
695 force_##chip8, NULL }; \
696I2C_CLIENT_INSMOD_COMMON
581 697
582#endif /* _LINUX_I2C_H */ 698#endif /* _LINUX_I2C_H */
diff --git a/include/linux/if_tun.h b/include/linux/if_tun.h
index 096a85a58ae5..88aef7b86ef4 100644
--- a/include/linux/if_tun.h
+++ b/include/linux/if_tun.h
@@ -77,6 +77,7 @@ struct tun_struct {
77#define TUNSETIFF _IOW('T', 202, int) 77#define TUNSETIFF _IOW('T', 202, int)
78#define TUNSETPERSIST _IOW('T', 203, int) 78#define TUNSETPERSIST _IOW('T', 203, int)
79#define TUNSETOWNER _IOW('T', 204, int) 79#define TUNSETOWNER _IOW('T', 204, int)
80#define TUNSETLINK _IOW('T', 205, int)
80 81
81/* TUNSETIFF ifr flags */ 82/* TUNSETIFF ifr flags */
82#define IFF_TUN 0x0001 83#define IFF_TUN 0x0001
diff --git a/include/linux/klist.h b/include/linux/klist.h
index eebf5e5696ec..c4d1fae4dd89 100644
--- a/include/linux/klist.h
+++ b/include/linux/klist.h
@@ -9,6 +9,9 @@
9 * This file is rleased under the GPL v2. 9 * This file is rleased under the GPL v2.
10 */ 10 */
11 11
12#ifndef _LINUX_KLIST_H
13#define _LINUX_KLIST_H
14
12#include <linux/spinlock.h> 15#include <linux/spinlock.h>
13#include <linux/completion.h> 16#include <linux/completion.h>
14#include <linux/kref.h> 17#include <linux/kref.h>
@@ -31,8 +34,8 @@ struct klist_node {
31 struct completion n_removed; 34 struct completion n_removed;
32}; 35};
33 36
34extern void klist_add_tail(struct klist * k, struct klist_node * n); 37extern void klist_add_tail(struct klist_node * n, struct klist * k);
35extern void klist_add_head(struct klist * k, struct klist_node * n); 38extern void klist_add_head(struct klist_node * n, struct klist * k);
36 39
37extern void klist_del(struct klist_node * n); 40extern void klist_del(struct klist_node * n);
38extern void klist_remove(struct klist_node * n); 41extern void klist_remove(struct klist_node * n);
@@ -53,3 +56,4 @@ extern void klist_iter_init_node(struct klist * k, struct klist_iter * i,
53extern void klist_iter_exit(struct klist_iter * i); 56extern void klist_iter_exit(struct klist_iter * i);
54extern struct klist_node * klist_next(struct klist_iter * i); 57extern struct klist_node * klist_next(struct klist_iter * i);
55 58
59#endif
diff --git a/include/linux/libata.h b/include/linux/libata.h
index fc05a9899288..022105c745fc 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -40,7 +40,6 @@
40#undef ATA_VERBOSE_DEBUG /* yet more debugging output */ 40#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
41#undef ATA_IRQ_TRAP /* define to ack screaming irqs */ 41#undef ATA_IRQ_TRAP /* define to ack screaming irqs */
42#undef ATA_NDEBUG /* define to disable quick runtime checks */ 42#undef ATA_NDEBUG /* define to disable quick runtime checks */
43#undef ATA_ENABLE_ATAPI /* define to enable ATAPI support */
44#undef ATA_ENABLE_PATA /* define to enable PATA support in some 43#undef ATA_ENABLE_PATA /* define to enable PATA support in some
45 * low-level drivers */ 44 * low-level drivers */
46#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */ 45#undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */
@@ -450,6 +449,7 @@ struct pci_bits {
450 unsigned long val; 449 unsigned long val;
451}; 450};
452 451
452extern void ata_pci_host_stop (struct ata_host_set *host_set);
453extern struct ata_probe_ent * 453extern struct ata_probe_ent *
454ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port); 454ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port);
455extern int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits); 455extern int pci_test_config_bits(struct pci_dev *pdev, struct pci_bits *bits);
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 8480aef10e62..94a46f38c532 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -150,6 +150,9 @@ void mpol_free_shared_policy(struct shared_policy *p);
150struct mempolicy *mpol_shared_policy_lookup(struct shared_policy *sp, 150struct mempolicy *mpol_shared_policy_lookup(struct shared_policy *sp,
151 unsigned long idx); 151 unsigned long idx);
152 152
153struct mempolicy *get_vma_policy(struct task_struct *task,
154 struct vm_area_struct *vma, unsigned long addr);
155
153extern void numa_default_policy(void); 156extern void numa_default_policy(void);
154extern void numa_policy_init(void); 157extern void numa_policy_init(void);
155 158
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 9a0893f3249e..30f68c0c8c6e 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -46,6 +46,12 @@ struct mmc_ios {
46#define MMC_BUSMODE_OPENDRAIN 1 46#define MMC_BUSMODE_OPENDRAIN 1
47#define MMC_BUSMODE_PUSHPULL 2 47#define MMC_BUSMODE_PUSHPULL 2
48 48
49 unsigned char chip_select; /* SPI chip select */
50
51#define MMC_CS_DONTCARE 0
52#define MMC_CS_HIGH 1
53#define MMC_CS_LOW 2
54
49 unsigned char power_mode; /* power supply mode */ 55 unsigned char power_mode; /* power supply mode */
50 56
51#define MMC_POWER_OFF 0 57#define MMC_POWER_OFF 0
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 6c90461ed99f..5ed471b58f4f 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -487,11 +487,27 @@ struct mem_section {
487 unsigned long section_mem_map; 487 unsigned long section_mem_map;
488}; 488};
489 489
490extern struct mem_section mem_section[NR_MEM_SECTIONS]; 490#ifdef CONFIG_SPARSEMEM_EXTREME
491#define SECTIONS_PER_ROOT (PAGE_SIZE / sizeof (struct mem_section))
492#else
493#define SECTIONS_PER_ROOT 1
494#endif
495
496#define SECTION_NR_TO_ROOT(sec) ((sec) / SECTIONS_PER_ROOT)
497#define NR_SECTION_ROOTS (NR_MEM_SECTIONS / SECTIONS_PER_ROOT)
498#define SECTION_ROOT_MASK (SECTIONS_PER_ROOT - 1)
499
500#ifdef CONFIG_SPARSEMEM_EXTREME
501extern struct mem_section *mem_section[NR_SECTION_ROOTS];
502#else
503extern struct mem_section mem_section[NR_SECTION_ROOTS][SECTIONS_PER_ROOT];
504#endif
491 505
492static inline struct mem_section *__nr_to_section(unsigned long nr) 506static inline struct mem_section *__nr_to_section(unsigned long nr)
493{ 507{
494 return &mem_section[nr]; 508 if (!mem_section[SECTION_NR_TO_ROOT(nr)])
509 return NULL;
510 return &mem_section[SECTION_NR_TO_ROOT(nr)][nr & SECTION_ROOT_MASK];
495} 511}
496 512
497/* 513/*
@@ -513,12 +529,12 @@ static inline struct page *__section_mem_map_addr(struct mem_section *section)
513 529
514static inline int valid_section(struct mem_section *section) 530static inline int valid_section(struct mem_section *section)
515{ 531{
516 return (section->section_mem_map & SECTION_MARKED_PRESENT); 532 return (section && (section->section_mem_map & SECTION_MARKED_PRESENT));
517} 533}
518 534
519static inline int section_has_mem_map(struct mem_section *section) 535static inline int section_has_mem_map(struct mem_section *section)
520{ 536{
521 return (section->section_mem_map & SECTION_HAS_MEM_MAP); 537 return (section && (section->section_mem_map & SECTION_HAS_MEM_MAP));
522} 538}
523 539
524static inline int valid_section_nr(unsigned long nr) 540static inline int valid_section_nr(unsigned long nr)
@@ -572,6 +588,7 @@ static inline int pfn_valid(unsigned long pfn)
572void sparse_init(void); 588void sparse_init(void);
573#else 589#else
574#define sparse_init() do {} while (0) 590#define sparse_init() do {} while (0)
591#define sparse_index_init(_sec, _nid) do {} while (0)
575#endif /* CONFIG_SPARSEMEM */ 592#endif /* CONFIG_SPARSEMEM */
576 593
577#ifdef CONFIG_NODES_SPAN_OTHER_NODES 594#ifdef CONFIG_NODES_SPAN_OTHER_NODES
diff --git a/include/linux/mv643xx.h b/include/linux/mv643xx.h
index 5773ea42f6e4..0b08cd692201 100644
--- a/include/linux/mv643xx.h
+++ b/include/linux/mv643xx.h
@@ -980,7 +980,7 @@
980/* I2C Registers */ 980/* I2C Registers */
981/****************************************/ 981/****************************************/
982 982
983#define MV64XXX_I2C_CTLR_NAME "mv64xxx i2c" 983#define MV64XXX_I2C_CTLR_NAME "mv64xxx_i2c"
984#define MV64XXX_I2C_OFFSET 0xc000 984#define MV64XXX_I2C_OFFSET 0xc000
985#define MV64XXX_I2C_REG_BLOCK_SIZE 0x0020 985#define MV64XXX_I2C_REG_BLOCK_SIZE 0x0020
986 986
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h
index f5a6695d4d21..f34767c5fc79 100644
--- a/include/linux/page-flags.h
+++ b/include/linux/page-flags.h
@@ -134,6 +134,7 @@ struct page_state {
134}; 134};
135 135
136extern void get_page_state(struct page_state *ret); 136extern void get_page_state(struct page_state *ret);
137extern void get_page_state_node(struct page_state *ret, int node);
137extern void get_full_page_state(struct page_state *ret); 138extern void get_full_page_state(struct page_state *ret);
138extern unsigned long __read_page_state(unsigned long offset); 139extern unsigned long __read_page_state(unsigned long offset);
139extern void __mod_page_state(unsigned long offset, unsigned long delta); 140extern void __mod_page_state(unsigned long offset, unsigned long delta);
@@ -194,6 +195,7 @@ extern void __mod_page_state(unsigned long offset, unsigned long delta);
194#define SetPageDirty(page) set_bit(PG_dirty, &(page)->flags) 195#define SetPageDirty(page) set_bit(PG_dirty, &(page)->flags)
195#define TestSetPageDirty(page) test_and_set_bit(PG_dirty, &(page)->flags) 196#define TestSetPageDirty(page) test_and_set_bit(PG_dirty, &(page)->flags)
196#define ClearPageDirty(page) clear_bit(PG_dirty, &(page)->flags) 197#define ClearPageDirty(page) clear_bit(PG_dirty, &(page)->flags)
198#define __ClearPageDirty(page) __clear_bit(PG_dirty, &(page)->flags)
197#define TestClearPageDirty(page) test_and_clear_bit(PG_dirty, &(page)->flags) 199#define TestClearPageDirty(page) test_and_clear_bit(PG_dirty, &(page)->flags)
198 200
199#define SetPageLRU(page) set_bit(PG_lru, &(page)->flags) 201#define SetPageLRU(page) set_bit(PG_lru, &(page)->flags)
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d513c1634006..95c941f8c747 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2147,6 +2147,9 @@
2147#define PCI_DEVICE_ID_ENE_1420 0x1420 2147#define PCI_DEVICE_ID_ENE_1420 0x1420
2148#define PCI_VENDOR_ID_CHELSIO 0x1425 2148#define PCI_VENDOR_ID_CHELSIO 0x1425
2149 2149
2150#define PCI_VENDOR_ID_MIPS 0x153f
2151#define PCI_DEVICE_ID_SOC_IT 0x0001
2152
2150#define PCI_VENDOR_ID_SYBA 0x1592 2153#define PCI_VENDOR_ID_SYBA 0x1592
2151#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 2154#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782
2152#define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783 2155#define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 7aeb208ed713..5cfb07648eca 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -186,7 +186,9 @@ extern int pm_suspend(suspend_state_t state);
186 186
187struct device; 187struct device;
188 188
189typedef u32 __bitwise pm_message_t; 189typedef struct pm_message {
190 int event;
191} pm_message_t;
190 192
191/* 193/*
192 * There are 4 important states driver can be in: 194 * There are 4 important states driver can be in:
@@ -207,9 +209,13 @@ typedef u32 __bitwise pm_message_t;
207 * or something similar soon. 209 * or something similar soon.
208 */ 210 */
209 211
210#define PMSG_FREEZE ((__force pm_message_t) 3) 212#define PM_EVENT_ON 0
211#define PMSG_SUSPEND ((__force pm_message_t) 3) 213#define PM_EVENT_FREEZE 1
212#define PMSG_ON ((__force pm_message_t) 0) 214#define PM_EVENT_SUSPEND 2
215
216#define PMSG_FREEZE ((struct pm_message){ .event = PM_EVENT_FREEZE, })
217#define PMSG_SUSPEND ((struct pm_message){ .event = PM_EVENT_SUSPEND, })
218#define PMSG_ON ((struct pm_message){ .event = PM_EVENT_ON, })
213 219
214struct dev_pm_info { 220struct dev_pm_info {
215 pm_message_t power_state; 221 pm_message_t power_state;
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index a373fc254df2..2afdafb62123 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -20,6 +20,8 @@
20#define PTRACE_DETACH 0x11 20#define PTRACE_DETACH 0x11
21 21
22#define PTRACE_SYSCALL 24 22#define PTRACE_SYSCALL 24
23#define PTRACE_SYSEMU 31
24#define PTRACE_SYSEMU_SINGLESTEP 32
23 25
24/* 0x4200-0x4300 are reserved for architecture-independent additions. */ 26/* 0x4200-0x4300 are reserved for architecture-independent additions. */
25#define PTRACE_SETOPTIONS 0x4200 27#define PTRACE_SETOPTIONS 0x4200
diff --git a/include/linux/swap.h b/include/linux/swap.h
index bfe3e763ccf2..3c9ff0048153 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -107,6 +107,8 @@ enum {
107 SWP_USED = (1 << 0), /* is slot in swap_info[] used? */ 107 SWP_USED = (1 << 0), /* is slot in swap_info[] used? */
108 SWP_WRITEOK = (1 << 1), /* ok to write to this swap? */ 108 SWP_WRITEOK = (1 << 1), /* ok to write to this swap? */
109 SWP_ACTIVE = (SWP_USED | SWP_WRITEOK), 109 SWP_ACTIVE = (SWP_USED | SWP_WRITEOK),
110 /* add others here before... */
111 SWP_SCANNING = (1 << 8), /* refcount in scan_swap_map */
110}; 112};
111 113
112#define SWAP_CLUSTER_MAX 32 114#define SWAP_CLUSTER_MAX 32
@@ -116,16 +118,13 @@ enum {
116 118
117/* 119/*
118 * The in-memory structure used to track swap areas. 120 * The in-memory structure used to track swap areas.
119 * extent_list.prev points at the lowest-index extent. That list is
120 * sorted.
121 */ 121 */
122struct swap_info_struct { 122struct swap_info_struct {
123 unsigned int flags; 123 unsigned int flags;
124 spinlock_t sdev_lock; 124 int prio; /* swap priority */
125 struct file *swap_file; 125 struct file *swap_file;
126 struct block_device *bdev; 126 struct block_device *bdev;
127 struct list_head extent_list; 127 struct list_head extent_list;
128 int nr_extents;
129 struct swap_extent *curr_swap_extent; 128 struct swap_extent *curr_swap_extent;
130 unsigned old_block_size; 129 unsigned old_block_size;
131 unsigned short * swap_map; 130 unsigned short * swap_map;
@@ -133,10 +132,9 @@ struct swap_info_struct {
133 unsigned int highest_bit; 132 unsigned int highest_bit;
134 unsigned int cluster_next; 133 unsigned int cluster_next;
135 unsigned int cluster_nr; 134 unsigned int cluster_nr;
136 int prio; /* swap priority */ 135 unsigned int pages;
137 int pages; 136 unsigned int max;
138 unsigned long max; 137 unsigned int inuse_pages;
139 unsigned long inuse_pages;
140 int next; /* next entry on swap list */ 138 int next; /* next entry on swap list */
141}; 139};
142 140
@@ -222,13 +220,7 @@ extern int can_share_swap_page(struct page *);
222extern int remove_exclusive_swap_page(struct page *); 220extern int remove_exclusive_swap_page(struct page *);
223struct backing_dev_info; 221struct backing_dev_info;
224 222
225extern struct swap_list_t swap_list; 223extern spinlock_t swap_lock;
226extern spinlock_t swaplock;
227
228#define swap_list_lock() spin_lock(&swaplock)
229#define swap_list_unlock() spin_unlock(&swaplock)
230#define swap_device_lock(p) spin_lock(&p->sdev_lock)
231#define swap_device_unlock(p) spin_unlock(&p->sdev_lock)
232 224
233/* linux/mm/thrash.c */ 225/* linux/mm/thrash.c */
234extern struct mm_struct * swap_token_mm; 226extern struct mm_struct * swap_token_mm;
diff --git a/include/linux/swapops.h b/include/linux/swapops.h
index d4c7db35e708..87b9d14c710d 100644
--- a/include/linux/swapops.h
+++ b/include/linux/swapops.h
@@ -4,7 +4,7 @@
4 * the low-order bits. 4 * the low-order bits.
5 * 5 *
6 * We arrange the `type' and `offset' fields so that `type' is at the five 6 * We arrange the `type' and `offset' fields so that `type' is at the five
7 * high-order bits of the smp_entry_t and `offset' is right-aligned in the 7 * high-order bits of the swp_entry_t and `offset' is right-aligned in the
8 * remaining bits. 8 * remaining bits.
9 * 9 *
10 * swp_entry_t's are *never* stored anywhere in their arch-dependent format. 10 * swp_entry_t's are *never* stored anywhere in their arch-dependent format.
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 6409d9cf5965..b244f69ef682 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -10,6 +10,14 @@
10#define VM_MAP 0x00000004 /* vmap()ed pages */ 10#define VM_MAP 0x00000004 /* vmap()ed pages */
11/* bits [20..32] reserved for arch specific ioremap internals */ 11/* bits [20..32] reserved for arch specific ioremap internals */
12 12
13/*
14 * Maximum alignment for ioremap() regions.
15 * Can be overriden by arch-specific value.
16 */
17#ifndef IOREMAP_MAX_ORDER
18#define IOREMAP_MAX_ORDER (7 + PAGE_SHIFT) /* 128 pages */
19#endif
20
13struct vm_struct { 21struct vm_struct {
14 void *addr; 22 void *addr;
15 unsigned long size; 23 unsigned long size;
diff --git a/include/media/id.h b/include/media/id.h
index a39a6423914b..801ddef301aa 100644
--- a/include/media/id.h
+++ b/include/media/id.h
@@ -34,8 +34,3 @@
34#ifndef I2C_DRIVERID_SAA6752HS 34#ifndef I2C_DRIVERID_SAA6752HS
35# define I2C_DRIVERID_SAA6752HS I2C_DRIVERID_EXP0+8 35# define I2C_DRIVERID_SAA6752HS I2C_DRIVERID_EXP0+8
36#endif 36#endif
37
38/* algorithms */
39#ifndef I2C_ALGO_SAA7134
40# define I2C_ALGO_SAA7134 0x090000
41#endif
diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h
index 7a3c43711a17..e426641c519f 100644
--- a/include/net/ip_vs.h
+++ b/include/net/ip_vs.h
@@ -958,7 +958,7 @@ static __inline__ int ip_vs_todrop(void)
958 */ 958 */
959#define IP_VS_FWD_METHOD(cp) (cp->flags & IP_VS_CONN_F_FWD_MASK) 959#define IP_VS_FWD_METHOD(cp) (cp->flags & IP_VS_CONN_F_FWD_MASK)
960 960
961extern __inline__ char ip_vs_fwd_tag(struct ip_vs_conn *cp) 961static inline char ip_vs_fwd_tag(struct ip_vs_conn *cp)
962{ 962{
963 char fwd; 963 char fwd;
964 964
diff --git a/include/net/irda/irlan_filter.h b/include/net/irda/irlan_filter.h
index 3afeb6c94ea4..492dedaa8ac1 100644
--- a/include/net/irda/irlan_filter.h
+++ b/include/net/irda/irlan_filter.h
@@ -28,6 +28,6 @@
28void irlan_check_command_param(struct irlan_cb *self, char *param, 28void irlan_check_command_param(struct irlan_cb *self, char *param,
29 char *value); 29 char *value);
30void irlan_filter_request(struct irlan_cb *self, struct sk_buff *skb); 30void irlan_filter_request(struct irlan_cb *self, struct sk_buff *skb);
31int irlan_print_filter(struct seq_file *seq, int filter_type); 31void irlan_print_filter(struct seq_file *seq, int filter_type);
32 32
33#endif /* IRLAN_FILTER_H */ 33#endif /* IRLAN_FILTER_H */
diff --git a/include/net/sock.h b/include/net/sock.h
index 312cb25cbd18..8c48fbecb7cf 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -709,6 +709,12 @@ static inline int sk_stream_rmem_schedule(struct sock *sk, struct sk_buff *skb)
709 sk_stream_mem_schedule(sk, skb->truesize, 1); 709 sk_stream_mem_schedule(sk, skb->truesize, 1);
710} 710}
711 711
712static inline int sk_stream_wmem_schedule(struct sock *sk, int size)
713{
714 return size <= sk->sk_forward_alloc ||
715 sk_stream_mem_schedule(sk, size, 0);
716}
717
712/* Used by processes to "lock" a socket state, so that 718/* Used by processes to "lock" a socket state, so that
713 * interrupts and bottom half handlers won't change it 719 * interrupts and bottom half handlers won't change it
714 * from under us. It essentially blocks any incoming 720 * from under us. It essentially blocks any incoming
@@ -1203,8 +1209,7 @@ static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk,
1203 skb = alloc_skb_fclone(size + hdr_len, gfp); 1209 skb = alloc_skb_fclone(size + hdr_len, gfp);
1204 if (skb) { 1210 if (skb) {
1205 skb->truesize += mem; 1211 skb->truesize += mem;
1206 if (sk->sk_forward_alloc >= (int)skb->truesize || 1212 if (sk_stream_wmem_schedule(sk, skb->truesize)) {
1207 sk_stream_mem_schedule(sk, skb->truesize, 0)) {
1208 skb_reserve(skb, hdr_len); 1213 skb_reserve(skb, hdr_len);
1209 return skb; 1214 return skb;
1210 } 1215 }
@@ -1227,10 +1232,8 @@ static inline struct page *sk_stream_alloc_page(struct sock *sk)
1227{ 1232{
1228 struct page *page = NULL; 1233 struct page *page = NULL;
1229 1234
1230 if (sk->sk_forward_alloc >= (int)PAGE_SIZE || 1235 page = alloc_pages(sk->sk_allocation, 0);
1231 sk_stream_mem_schedule(sk, PAGE_SIZE, 0)) 1236 if (!page) {
1232 page = alloc_pages(sk->sk_allocation, 0);
1233 else {
1234 sk->sk_prot->enter_memory_pressure(); 1237 sk->sk_prot->enter_memory_pressure();
1235 sk_stream_moderate_sndbuf(sk); 1238 sk_stream_moderate_sndbuf(sk);
1236 } 1239 }
@@ -1374,9 +1377,10 @@ extern void sk_init(void);
1374 1377
1375#ifdef CONFIG_SYSCTL 1378#ifdef CONFIG_SYSCTL
1376extern struct ctl_table core_table[]; 1379extern struct ctl_table core_table[];
1377extern int sysctl_optmem_max;
1378#endif 1380#endif
1379 1381
1382extern int sysctl_optmem_max;
1383
1380extern __u32 sysctl_wmem_default; 1384extern __u32 sysctl_wmem_default;
1381extern __u32 sysctl_rmem_default; 1385extern __u32 sysctl_rmem_default;
1382 1386
diff --git a/include/net/tcp.h b/include/net/tcp.h
index d6bcf1317a6a..97af77c4d096 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -454,6 +454,7 @@ extern int tcp_retransmit_skb(struct sock *, struct sk_buff *);
454extern void tcp_xmit_retransmit_queue(struct sock *); 454extern void tcp_xmit_retransmit_queue(struct sock *);
455extern void tcp_simple_retransmit(struct sock *); 455extern void tcp_simple_retransmit(struct sock *);
456extern int tcp_trim_head(struct sock *, struct sk_buff *, u32); 456extern int tcp_trim_head(struct sock *, struct sk_buff *, u32);
457extern int tcp_fragment(struct sock *, struct sk_buff *, u32, unsigned int);
457 458
458extern void tcp_send_probe0(struct sock *); 459extern void tcp_send_probe0(struct sock *);
459extern void tcp_send_partial(struct sock *); 460extern void tcp_send_partial(struct sock *);
diff --git a/include/video/pmag-ba-fb.h b/include/video/pmag-ba-fb.h
index cebef073b9a3..fceb6c0f6583 100644
--- a/include/video/pmag-ba-fb.h
+++ b/include/video/pmag-ba-fb.h
@@ -1,24 +1,27 @@
1/* 1/*
2 * linux/drivers/video/pmag-ba-fb.h 2 * linux/include/video/pmag-ba-fb.h
3 * 3 *
4 * TurboChannel PMAG-BA framebuffer card support, 4 * TURBOchannel PMAG-BA Color Frame Buffer (CFB) card support,
5 * Copyright (C) 1999,2000,2001 by 5 * Copyright (C) 1999, 2000, 2001 by
6 * Michael Engel <engel@unix-ag.org>, 6 * Michael Engel <engel@unix-ag.org>,
7 * Karsten Merker <merker@linuxtag.org> 7 * Karsten Merker <merker@linuxtag.org>
8 * This file is subject to the terms and conditions of the GNU General 8 * Copyright (c) 2005 Maciej W. Rozycki
9 * Public License. See the file COPYING in the main directory of this 9 *
10 * archive for more details. 10 * This file is subject to the terms and conditions of the GNU General
11 */ 11 * Public License. See the file COPYING in the main directory of this
12 12 * archive for more details.
13/*
14 * Bt459 RAM DAC register base offset (rel. to TC slot base address)
15 */ 13 */
16 14
17#define PMAG_BA_BT459_OFFSET 0x00200000 15/* IOmem resource offsets. */
18 16#define PMAG_BA_FBMEM 0x000000 /* frame buffer */
19/* 17#define PMAG_BA_BT459 0x200000 /* Bt459 RAMDAC */
20 * Begin of PMAG-BA framebuffer memory relative to TC slot address, 18#define PMAG_BA_IRQ 0x300000 /* IRQ acknowledge */
21 * resolution is 1024x864x8 19#define PMAG_BA_ROM 0x380000 /* REX option ROM */
22 */ 20#define PMAG_BA_BT438 0x380000 /* Bt438 clock chip reset */
21#define PMAG_BA_SIZE 0x400000 /* address space size */
23 22
24#define PMAG_BA_ONBOARD_FBMEM_OFFSET 0x00000000 23/* Bt459 register offsets, byte-wide registers. */
24#define BT459_ADDR_LO 0x0 /* address low */
25#define BT459_ADDR_HI 0x4 /* address high */
26#define BT459_DATA 0x8 /* data window register */
27#define BT459_CMAP 0xc /* color map window register */
diff --git a/include/video/pmagb-b-fb.h b/include/video/pmagb-b-fb.h
index 87b81a555139..7539b9087a80 100644
--- a/include/video/pmagb-b-fb.h
+++ b/include/video/pmagb-b-fb.h
@@ -1,32 +1,58 @@
1/* 1/*
2 * linux/drivers/video/pmagb-b-fb.h 2 * linux/include/video/pmagb-b-fb.h
3 * 3 *
4 * TurboChannel PMAGB-B framebuffer card support, 4 * TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support,
5 * Copyright (C) 1999, 2000, 2001 by 5 * Copyright (C) 1999, 2000, 2001 by
6 * Michael Engel <engel@unix-ag.org> and 6 * Michael Engel <engel@unix-ag.org> and
7 * Karsten Merker <merker@linuxtag.org> 7 * Karsten Merker <merker@linuxtag.org>
8 * This file is subject to the terms and conditions of the GNU General 8 * Copyright (c) 2005 Maciej W. Rozycki
9 * Public License. See the file COPYING in the main directory of this 9 *
10 * archive for more details. 10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
11 */ 13 */
12 14
15/* IOmem resource offsets. */
16#define PMAGB_B_ROM 0x000000 /* REX option ROM */
17#define PMAGB_B_SFB 0x100000 /* SFB ASIC */
18#define PMAGB_B_GP0 0x140000 /* general purpose output 0 */
19#define PMAGB_B_GP1 0x180000 /* general purpose output 1 */
20#define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */
21#define PMAGB_B_FBMEM 0x200000 /* frame buffer */
22#define PMAGB_B_SIZE 0x400000 /* address space size */
13 23
14/* 24/* IOmem register offsets. */
15 * Bt459 RAM DAC register base offset (rel. to TC slot base address) 25#define SFB_REG_VID_HOR 0x64 /* video horizontal setup */
16 */ 26#define SFB_REG_VID_VER 0x68 /* video vertical setup */
17#define PMAGB_B_BT459_OFFSET 0x001C0000 27#define SFB_REG_VID_BASE 0x6c /* video base address */
28#define SFB_REG_TCCLK_COUNT 0x78 /* TURBOchannel clock count */
29#define SFB_REG_VIDCLK_COUNT 0x7c /* video clock count */
18 30
19/* 31/* Video horizontal setup register constants. All bits are r/w. */
20 * Begin of PMAGB-B framebuffer memory, resolution is configurable: 32#define SFB_VID_HOR_BP_SHIFT 0x15 /* back porch */
21 * 1024x864x8 or 1280x1024x8, settable by jumper on the card 33#define SFB_VID_HOR_BP_MASK 0x7f
22 */ 34#define SFB_VID_HOR_SYN_SHIFT 0x0e /* sync pulse */
23#define PMAGB_B_ONBOARD_FBMEM_OFFSET 0x00201000 35#define SFB_VID_HOR_SYN_MASK 0x7f
36#define SFB_VID_HOR_FP_SHIFT 0x09 /* front porch */
37#define SFB_VID_HOR_FP_MASK 0x1f
38#define SFB_VID_HOR_PIX_SHIFT 0x00 /* active video */
39#define SFB_VID_HOR_PIX_MASK 0x1ff
24 40
25/* 41/* Video vertical setup register constants. All bits are r/w. */
26 * Bt459 register offsets, byte-wide registers 42#define SFB_VID_VER_BP_SHIFT 0x16 /* back porch */
27 */ 43#define SFB_VID_VER_BP_MASK 0x3f
44#define SFB_VID_VER_SYN_SHIFT 0x10 /* sync pulse */
45#define SFB_VID_VER_SYN_MASK 0x3f
46#define SFB_VID_VER_FP_SHIFT 0x0b /* front porch */
47#define SFB_VID_VER_FP_MASK 0x1f
48#define SFB_VID_VER_SL_SHIFT 0x00 /* active scan lines */
49#define SFB_VID_VER_SL_MASK 0x7ff
50
51/* Video base address register constants. All bits are r/w. */
52#define SFB_VID_BASE_MASK 0x1ff /* video base row address */
28 53
29#define BT459_ADR_LOW BT459_OFFSET + 0x00 /* addr. low */ 54/* Bt459 register offsets, byte-wide registers. */
30#define BT459_ADR_HIGH BT459_OFFSET + 0x04 /* addr. high */ 55#define BT459_ADDR_LO 0x0 /* address low */
31#define BT459_DATA BT459_OFFSET + 0x08 /* r/w data */ 56#define BT459_ADDR_HI 0x4 /* address high */
32#define BT459_CMAP BT459_OFFSET + 0x0C /* color map */ 57#define BT459_DATA 0x8 /* data window register */
58#define BT459_CMAP 0xc /* color map window register */