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-rw-r--r--include/linux/i2c/twl4030.h19
-rw-r--r--include/linux/mfd/twl4030-codec.h272
-rw-r--r--include/sound/Kbuild1
-rw-r--r--include/sound/aci.h90
-rw-r--r--include/sound/ak4113.h321
-rw-r--r--include/sound/ak4114.h12
-rw-r--r--include/sound/ak4xxx-adda.h5
-rw-r--r--include/sound/control.h5
-rw-r--r--include/sound/cs4231-regs.h1
-rw-r--r--include/sound/pcm.h3
-rw-r--r--include/sound/rawmidi.h2
-rw-r--r--include/sound/sh_dac_audio.h21
-rw-r--r--include/sound/soc-dai.h14
-rw-r--r--include/sound/soc-dapm.h17
-rw-r--r--include/sound/soc.h15
-rw-r--r--include/sound/sscape_ioctl.h21
-rw-r--r--include/sound/tlv320dac33-plat.h20
-rw-r--r--include/sound/tpa6130a2-plat.h30
-rw-r--r--include/sound/wss.h1
19 files changed, 828 insertions, 42 deletions
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index 508824ee35e6..5306a759cbde 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -401,6 +401,24 @@ struct twl4030_power_data {
401 401
402extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts); 402extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
403 403
404struct twl4030_codec_audio_data {
405 unsigned int audio_mclk;
406 unsigned int ramp_delay_value;
407 unsigned int hs_extmute:1;
408 void (*set_hs_extmute)(int mute);
409};
410
411struct twl4030_codec_vibra_data {
412 unsigned int audio_mclk;
413 unsigned int coexist;
414};
415
416struct twl4030_codec_data {
417 unsigned int audio_mclk;
418 struct twl4030_codec_audio_data *audio;
419 struct twl4030_codec_vibra_data *vibra;
420};
421
404struct twl4030_platform_data { 422struct twl4030_platform_data {
405 unsigned irq_base, irq_end; 423 unsigned irq_base, irq_end;
406 struct twl4030_bci_platform_data *bci; 424 struct twl4030_bci_platform_data *bci;
@@ -409,6 +427,7 @@ struct twl4030_platform_data {
409 struct twl4030_keypad_data *keypad; 427 struct twl4030_keypad_data *keypad;
410 struct twl4030_usb_data *usb; 428 struct twl4030_usb_data *usb;
411 struct twl4030_power_data *power; 429 struct twl4030_power_data *power;
430 struct twl4030_codec_data *codec;
412 431
413 /* LDO regulators */ 432 /* LDO regulators */
414 struct regulator_init_data *vdac; 433 struct regulator_init_data *vdac;
diff --git a/include/linux/mfd/twl4030-codec.h b/include/linux/mfd/twl4030-codec.h
new file mode 100644
index 000000000000..2ec317c68e59
--- /dev/null
+++ b/include/linux/mfd/twl4030-codec.h
@@ -0,0 +1,272 @@
1/*
2 * MFD driver for twl4030 codec submodule
3 *
4 * Author: Peter Ujfalusi <peter.ujfalusi@nokia.com>
5 *
6 * Copyright: (C) 2009 Nokia Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#ifndef __TWL4030_CODEC_H__
25#define __TWL4030_CODEC_H__
26
27/* Codec registers */
28#define TWL4030_REG_CODEC_MODE 0x01
29#define TWL4030_REG_OPTION 0x02
30#define TWL4030_REG_UNKNOWN 0x03
31#define TWL4030_REG_MICBIAS_CTL 0x04
32#define TWL4030_REG_ANAMICL 0x05
33#define TWL4030_REG_ANAMICR 0x06
34#define TWL4030_REG_AVADC_CTL 0x07
35#define TWL4030_REG_ADCMICSEL 0x08
36#define TWL4030_REG_DIGMIXING 0x09
37#define TWL4030_REG_ATXL1PGA 0x0A
38#define TWL4030_REG_ATXR1PGA 0x0B
39#define TWL4030_REG_AVTXL2PGA 0x0C
40#define TWL4030_REG_AVTXR2PGA 0x0D
41#define TWL4030_REG_AUDIO_IF 0x0E
42#define TWL4030_REG_VOICE_IF 0x0F
43#define TWL4030_REG_ARXR1PGA 0x10
44#define TWL4030_REG_ARXL1PGA 0x11
45#define TWL4030_REG_ARXR2PGA 0x12
46#define TWL4030_REG_ARXL2PGA 0x13
47#define TWL4030_REG_VRXPGA 0x14
48#define TWL4030_REG_VSTPGA 0x15
49#define TWL4030_REG_VRX2ARXPGA 0x16
50#define TWL4030_REG_AVDAC_CTL 0x17
51#define TWL4030_REG_ARX2VTXPGA 0x18
52#define TWL4030_REG_ARXL1_APGA_CTL 0x19
53#define TWL4030_REG_ARXR1_APGA_CTL 0x1A
54#define TWL4030_REG_ARXL2_APGA_CTL 0x1B
55#define TWL4030_REG_ARXR2_APGA_CTL 0x1C
56#define TWL4030_REG_ATX2ARXPGA 0x1D
57#define TWL4030_REG_BT_IF 0x1E
58#define TWL4030_REG_BTPGA 0x1F
59#define TWL4030_REG_BTSTPGA 0x20
60#define TWL4030_REG_EAR_CTL 0x21
61#define TWL4030_REG_HS_SEL 0x22
62#define TWL4030_REG_HS_GAIN_SET 0x23
63#define TWL4030_REG_HS_POPN_SET 0x24
64#define TWL4030_REG_PREDL_CTL 0x25
65#define TWL4030_REG_PREDR_CTL 0x26
66#define TWL4030_REG_PRECKL_CTL 0x27
67#define TWL4030_REG_PRECKR_CTL 0x28
68#define TWL4030_REG_HFL_CTL 0x29
69#define TWL4030_REG_HFR_CTL 0x2A
70#define TWL4030_REG_ALC_CTL 0x2B
71#define TWL4030_REG_ALC_SET1 0x2C
72#define TWL4030_REG_ALC_SET2 0x2D
73#define TWL4030_REG_BOOST_CTL 0x2E
74#define TWL4030_REG_SOFTVOL_CTL 0x2F
75#define TWL4030_REG_DTMF_FREQSEL 0x30
76#define TWL4030_REG_DTMF_TONEXT1H 0x31
77#define TWL4030_REG_DTMF_TONEXT1L 0x32
78#define TWL4030_REG_DTMF_TONEXT2H 0x33
79#define TWL4030_REG_DTMF_TONEXT2L 0x34
80#define TWL4030_REG_DTMF_TONOFF 0x35
81#define TWL4030_REG_DTMF_WANONOFF 0x36
82#define TWL4030_REG_I2S_RX_SCRAMBLE_H 0x37
83#define TWL4030_REG_I2S_RX_SCRAMBLE_M 0x38
84#define TWL4030_REG_I2S_RX_SCRAMBLE_L 0x39
85#define TWL4030_REG_APLL_CTL 0x3A
86#define TWL4030_REG_DTMF_CTL 0x3B
87#define TWL4030_REG_DTMF_PGA_CTL2 0x3C
88#define TWL4030_REG_DTMF_PGA_CTL1 0x3D
89#define TWL4030_REG_MISC_SET_1 0x3E
90#define TWL4030_REG_PCMBTMUX 0x3F
91#define TWL4030_REG_RX_PATH_SEL 0x43
92#define TWL4030_REG_VDL_APGA_CTL 0x44
93#define TWL4030_REG_VIBRA_CTL 0x45
94#define TWL4030_REG_VIBRA_SET 0x46
95#define TWL4030_REG_VIBRA_PWM_SET 0x47
96#define TWL4030_REG_ANAMIC_GAIN 0x48
97#define TWL4030_REG_MISC_SET_2 0x49
98
99/* Bitfield Definitions */
100
101/* TWL4030_CODEC_MODE (0x01) Fields */
102#define TWL4030_APLL_RATE 0xF0
103#define TWL4030_APLL_RATE_8000 0x00
104#define TWL4030_APLL_RATE_11025 0x10
105#define TWL4030_APLL_RATE_12000 0x20
106#define TWL4030_APLL_RATE_16000 0x40
107#define TWL4030_APLL_RATE_22050 0x50
108#define TWL4030_APLL_RATE_24000 0x60
109#define TWL4030_APLL_RATE_32000 0x80
110#define TWL4030_APLL_RATE_44100 0x90
111#define TWL4030_APLL_RATE_48000 0xA0
112#define TWL4030_APLL_RATE_96000 0xE0
113#define TWL4030_SEL_16K 0x08
114#define TWL4030_CODECPDZ 0x02
115#define TWL4030_OPT_MODE 0x01
116#define TWL4030_OPTION_1 (1 << 0)
117#define TWL4030_OPTION_2 (0 << 0)
118
119/* TWL4030_OPTION (0x02) Fields */
120#define TWL4030_ATXL1_EN (1 << 0)
121#define TWL4030_ATXR1_EN (1 << 1)
122#define TWL4030_ATXL2_VTXL_EN (1 << 2)
123#define TWL4030_ATXR2_VTXR_EN (1 << 3)
124#define TWL4030_ARXL1_VRX_EN (1 << 4)
125#define TWL4030_ARXR1_EN (1 << 5)
126#define TWL4030_ARXL2_EN (1 << 6)
127#define TWL4030_ARXR2_EN (1 << 7)
128
129/* TWL4030_REG_MICBIAS_CTL (0x04) Fields */
130#define TWL4030_MICBIAS2_CTL 0x40
131#define TWL4030_MICBIAS1_CTL 0x20
132#define TWL4030_HSMICBIAS_EN 0x04
133#define TWL4030_MICBIAS2_EN 0x02
134#define TWL4030_MICBIAS1_EN 0x01
135
136/* ANAMICL (0x05) Fields */
137#define TWL4030_CNCL_OFFSET_START 0x80
138#define TWL4030_OFFSET_CNCL_SEL 0x60
139#define TWL4030_OFFSET_CNCL_SEL_ARX1 0x00
140#define TWL4030_OFFSET_CNCL_SEL_ARX2 0x20
141#define TWL4030_OFFSET_CNCL_SEL_VRX 0x40
142#define TWL4030_OFFSET_CNCL_SEL_ALL 0x60
143#define TWL4030_MICAMPL_EN 0x10
144#define TWL4030_CKMIC_EN 0x08
145#define TWL4030_AUXL_EN 0x04
146#define TWL4030_HSMIC_EN 0x02
147#define TWL4030_MAINMIC_EN 0x01
148
149/* ANAMICR (0x06) Fields */
150#define TWL4030_MICAMPR_EN 0x10
151#define TWL4030_AUXR_EN 0x04
152#define TWL4030_SUBMIC_EN 0x01
153
154/* AVADC_CTL (0x07) Fields */
155#define TWL4030_ADCL_EN 0x08
156#define TWL4030_AVADC_CLK_PRIORITY 0x04
157#define TWL4030_ADCR_EN 0x02
158
159/* TWL4030_REG_ADCMICSEL (0x08) Fields */
160#define TWL4030_DIGMIC1_EN 0x08
161#define TWL4030_TX2IN_SEL 0x04
162#define TWL4030_DIGMIC0_EN 0x02
163#define TWL4030_TX1IN_SEL 0x01
164
165/* AUDIO_IF (0x0E) Fields */
166#define TWL4030_AIF_SLAVE_EN 0x80
167#define TWL4030_DATA_WIDTH 0x60
168#define TWL4030_DATA_WIDTH_16S_16W 0x00
169#define TWL4030_DATA_WIDTH_32S_16W 0x40
170#define TWL4030_DATA_WIDTH_32S_24W 0x60
171#define TWL4030_AIF_FORMAT 0x18
172#define TWL4030_AIF_FORMAT_CODEC 0x00
173#define TWL4030_AIF_FORMAT_LEFT 0x08
174#define TWL4030_AIF_FORMAT_RIGHT 0x10
175#define TWL4030_AIF_FORMAT_TDM 0x18
176#define TWL4030_AIF_TRI_EN 0x04
177#define TWL4030_CLK256FS_EN 0x02
178#define TWL4030_AIF_EN 0x01
179
180/* VOICE_IF (0x0F) Fields */
181#define TWL4030_VIF_SLAVE_EN 0x80
182#define TWL4030_VIF_DIN_EN 0x40
183#define TWL4030_VIF_DOUT_EN 0x20
184#define TWL4030_VIF_SWAP 0x10
185#define TWL4030_VIF_FORMAT 0x08
186#define TWL4030_VIF_TRI_EN 0x04
187#define TWL4030_VIF_SUB_EN 0x02
188#define TWL4030_VIF_EN 0x01
189
190/* EAR_CTL (0x21) */
191#define TWL4030_EAR_GAIN 0x30
192
193/* HS_GAIN_SET (0x23) Fields */
194#define TWL4030_HSR_GAIN 0x0C
195#define TWL4030_HSR_GAIN_PWR_DOWN 0x00
196#define TWL4030_HSR_GAIN_PLUS_6DB 0x04
197#define TWL4030_HSR_GAIN_0DB 0x08
198#define TWL4030_HSR_GAIN_MINUS_6DB 0x0C
199#define TWL4030_HSL_GAIN 0x03
200#define TWL4030_HSL_GAIN_PWR_DOWN 0x00
201#define TWL4030_HSL_GAIN_PLUS_6DB 0x01
202#define TWL4030_HSL_GAIN_0DB 0x02
203#define TWL4030_HSL_GAIN_MINUS_6DB 0x03
204
205/* HS_POPN_SET (0x24) Fields */
206#define TWL4030_VMID_EN 0x40
207#define TWL4030_EXTMUTE 0x20
208#define TWL4030_RAMP_DELAY 0x1C
209#define TWL4030_RAMP_DELAY_20MS 0x00
210#define TWL4030_RAMP_DELAY_40MS 0x04
211#define TWL4030_RAMP_DELAY_81MS 0x08
212#define TWL4030_RAMP_DELAY_161MS 0x0C
213#define TWL4030_RAMP_DELAY_323MS 0x10
214#define TWL4030_RAMP_DELAY_645MS 0x14
215#define TWL4030_RAMP_DELAY_1291MS 0x18
216#define TWL4030_RAMP_DELAY_2581MS 0x1C
217#define TWL4030_RAMP_EN 0x02
218
219/* PREDL_CTL (0x25) */
220#define TWL4030_PREDL_GAIN 0x30
221
222/* PREDR_CTL (0x26) */
223#define TWL4030_PREDR_GAIN 0x30
224
225/* PRECKL_CTL (0x27) */
226#define TWL4030_PRECKL_GAIN 0x30
227
228/* PRECKR_CTL (0x28) */
229#define TWL4030_PRECKR_GAIN 0x30
230
231/* HFL_CTL (0x29, 0x2A) Fields */
232#define TWL4030_HF_CTL_HB_EN 0x04
233#define TWL4030_HF_CTL_LOOP_EN 0x08
234#define TWL4030_HF_CTL_RAMP_EN 0x10
235#define TWL4030_HF_CTL_REF_EN 0x20
236
237/* APLL_CTL (0x3A) Fields */
238#define TWL4030_APLL_EN 0x10
239#define TWL4030_APLL_INFREQ 0x0F
240#define TWL4030_APLL_INFREQ_19200KHZ 0x05
241#define TWL4030_APLL_INFREQ_26000KHZ 0x06
242#define TWL4030_APLL_INFREQ_38400KHZ 0x0F
243
244/* REG_MISC_SET_1 (0x3E) Fields */
245#define TWL4030_CLK64_EN 0x80
246#define TWL4030_SCRAMBLE_EN 0x40
247#define TWL4030_FMLOOP_EN 0x20
248#define TWL4030_SMOOTH_ANAVOL_EN 0x02
249#define TWL4030_DIGMIC_LR_SWAP_EN 0x01
250
251/* VIBRA_CTL (0x45) */
252#define TWL4030_VIBRA_EN 0x01
253#define TWL4030_VIBRA_DIR 0x02
254#define TWL4030_VIBRA_AUDIO_SEL_L1 (0x00 << 2)
255#define TWL4030_VIBRA_AUDIO_SEL_R1 (0x01 << 2)
256#define TWL4030_VIBRA_AUDIO_SEL_L2 (0x02 << 2)
257#define TWL4030_VIBRA_AUDIO_SEL_R2 (0x03 << 2)
258#define TWL4030_VIBRA_SEL 0x10
259#define TWL4030_VIBRA_DIR_SEL 0x20
260
261/* TWL4030 codec resource IDs */
262enum twl4030_codec_res {
263 TWL4030_CODEC_RES_POWER = 0,
264 TWL4030_CODEC_RES_APLL,
265 TWL4030_CODEC_RES_MAX,
266};
267
268int twl4030_codec_disable_resource(enum twl4030_codec_res id);
269int twl4030_codec_enable_resource(enum twl4030_codec_res id);
270unsigned int twl4030_codec_get_mclk(void);
271
272#endif /* End of __TWL4030_CODEC_H__ */
diff --git a/include/sound/Kbuild b/include/sound/Kbuild
index fd054a344324..e9dd9369ecb9 100644
--- a/include/sound/Kbuild
+++ b/include/sound/Kbuild
@@ -2,7 +2,6 @@ header-y += asound_fm.h
2header-y += hdsp.h 2header-y += hdsp.h
3header-y += hdspm.h 3header-y += hdspm.h
4header-y += sfnt_info.h 4header-y += sfnt_info.h
5header-y += sscape_ioctl.h
6 5
7unifdef-y += asequencer.h 6unifdef-y += asequencer.h
8unifdef-y += asound.h 7unifdef-y += asound.h
diff --git a/include/sound/aci.h b/include/sound/aci.h
new file mode 100644
index 000000000000..ee639d355ef0
--- /dev/null
+++ b/include/sound/aci.h
@@ -0,0 +1,90 @@
1#ifndef _ACI_H_
2#define _ACI_H_
3
4#define ACI_REG_COMMAND 0 /* write register offset */
5#define ACI_REG_STATUS 1 /* read register offset */
6#define ACI_REG_BUSY 2 /* busy register offset */
7#define ACI_REG_RDS 2 /* PCM20: RDS register offset */
8#define ACI_MINTIME 500 /* ACI time out limit */
9
10#define ACI_SET_MUTE 0x0d
11#define ACI_SET_POWERAMP 0x0f
12#define ACI_SET_TUNERMUTE 0xa3
13#define ACI_SET_TUNERMONO 0xa4
14#define ACI_SET_IDE 0xd0
15#define ACI_SET_WSS 0xd1
16#define ACI_SET_SOLOMODE 0xd2
17#define ACI_SET_PREAMP 0x03
18#define ACI_GET_PREAMP 0x21
19#define ACI_WRITE_TUNE 0xa7
20#define ACI_READ_TUNERSTEREO 0xa8
21#define ACI_READ_TUNERSTATION 0xa9
22#define ACI_READ_VERSION 0xf1
23#define ACI_READ_IDCODE 0xf2
24#define ACI_INIT 0xff
25#define ACI_STATUS 0xf0
26#define ACI_S_GENERAL 0x00
27#define ACI_ERROR_OP 0xdf
28
29/* ACI Mixer */
30
31/* These are the values for the right channel GET registers.
32 Add an offset of 0x01 for the left channel register.
33 (left=right+0x01) */
34
35#define ACI_GET_MASTER 0x03
36#define ACI_GET_MIC 0x05
37#define ACI_GET_LINE 0x07
38#define ACI_GET_CD 0x09
39#define ACI_GET_SYNTH 0x0b
40#define ACI_GET_PCM 0x0d
41#define ACI_GET_LINE1 0x10 /* Radio on PCM20 */
42#define ACI_GET_LINE2 0x12
43
44#define ACI_GET_EQ1 0x22 /* from Bass ... */
45#define ACI_GET_EQ2 0x24
46#define ACI_GET_EQ3 0x26
47#define ACI_GET_EQ4 0x28
48#define ACI_GET_EQ5 0x2a
49#define ACI_GET_EQ6 0x2c
50#define ACI_GET_EQ7 0x2e /* ... to Treble */
51
52/* And these are the values for the right channel SET registers.
53 For left channel access you have to add an offset of 0x08.
54 MASTER is an exception, which needs an offset of 0x01 */
55
56#define ACI_SET_MASTER 0x00
57#define ACI_SET_MIC 0x30
58#define ACI_SET_LINE 0x31
59#define ACI_SET_CD 0x34
60#define ACI_SET_SYNTH 0x33
61#define ACI_SET_PCM 0x32
62#define ACI_SET_LINE1 0x35 /* Radio on PCM20 */
63#define ACI_SET_LINE2 0x36
64
65#define ACI_SET_EQ1 0x40 /* from Bass ... */
66#define ACI_SET_EQ2 0x41
67#define ACI_SET_EQ3 0x42
68#define ACI_SET_EQ4 0x43
69#define ACI_SET_EQ5 0x44
70#define ACI_SET_EQ6 0x45
71#define ACI_SET_EQ7 0x46 /* ... to Treble */
72
73struct snd_miro_aci {
74 unsigned long aci_port;
75 int aci_vendor;
76 int aci_product;
77 int aci_version;
78 int aci_amp;
79 int aci_preamp;
80 int aci_solomode;
81
82 struct mutex aci_mutex;
83};
84
85int snd_aci_cmd(struct snd_miro_aci *aci, int write1, int write2, int write3);
86
87struct snd_miro_aci *snd_aci_get_aci(void);
88
89#endif /* _ACI_H_ */
90
diff --git a/include/sound/ak4113.h b/include/sound/ak4113.h
new file mode 100644
index 000000000000..8988edae1609
--- /dev/null
+++ b/include/sound/ak4113.h
@@ -0,0 +1,321 @@
1#ifndef __SOUND_AK4113_H
2#define __SOUND_AK4113_H
3
4/*
5 * Routines for Asahi Kasei AK4113
6 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
7 * Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>,
8 *
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26/* AK4113 registers */
27/* power down */
28#define AK4113_REG_PWRDN 0x00
29/* format control */
30#define AK4113_REG_FORMAT 0x01
31/* input/output control */
32#define AK4113_REG_IO0 0x02
33/* input/output control */
34#define AK4113_REG_IO1 0x03
35/* interrupt0 mask */
36#define AK4113_REG_INT0_MASK 0x04
37/* interrupt1 mask */
38#define AK4113_REG_INT1_MASK 0x05
39/* DAT mask & DTS select */
40#define AK4113_REG_DATDTS 0x06
41/* receiver status 0 */
42#define AK4113_REG_RCS0 0x07
43/* receiver status 1 */
44#define AK4113_REG_RCS1 0x08
45/* receiver status 2 */
46#define AK4113_REG_RCS2 0x09
47/* RX channel status byte 0 */
48#define AK4113_REG_RXCSB0 0x0a
49/* RX channel status byte 1 */
50#define AK4113_REG_RXCSB1 0x0b
51/* RX channel status byte 2 */
52#define AK4113_REG_RXCSB2 0x0c
53/* RX channel status byte 3 */
54#define AK4113_REG_RXCSB3 0x0d
55/* RX channel status byte 4 */
56#define AK4113_REG_RXCSB4 0x0e
57/* burst preamble Pc byte 0 */
58#define AK4113_REG_Pc0 0x0f
59/* burst preamble Pc byte 1 */
60#define AK4113_REG_Pc1 0x10
61/* burst preamble Pd byte 0 */
62#define AK4113_REG_Pd0 0x11
63/* burst preamble Pd byte 1 */
64#define AK4113_REG_Pd1 0x12
65/* Q-subcode address + control */
66#define AK4113_REG_QSUB_ADDR 0x13
67/* Q-subcode track */
68#define AK4113_REG_QSUB_TRACK 0x14
69/* Q-subcode index */
70#define AK4113_REG_QSUB_INDEX 0x15
71/* Q-subcode minute */
72#define AK4113_REG_QSUB_MINUTE 0x16
73/* Q-subcode second */
74#define AK4113_REG_QSUB_SECOND 0x17
75/* Q-subcode frame */
76#define AK4113_REG_QSUB_FRAME 0x18
77/* Q-subcode zero */
78#define AK4113_REG_QSUB_ZERO 0x19
79/* Q-subcode absolute minute */
80#define AK4113_REG_QSUB_ABSMIN 0x1a
81/* Q-subcode absolute second */
82#define AK4113_REG_QSUB_ABSSEC 0x1b
83/* Q-subcode absolute frame */
84#define AK4113_REG_QSUB_ABSFRM 0x1c
85
86/* sizes */
87#define AK4113_REG_RXCSB_SIZE ((AK4113_REG_RXCSB4-AK4113_REG_RXCSB0)+1)
88#define AK4113_REG_QSUB_SIZE ((AK4113_REG_QSUB_ABSFRM-AK4113_REG_QSUB_ADDR)\
89 +1)
90
91#define AK4113_WRITABLE_REGS (AK4113_REG_DATDTS + 1)
92
93/* AK4113_REG_PWRDN bits */
94/* Channel Status Select */
95#define AK4113_CS12 (1<<7)
96/* Block Start & C/U Output Mode */
97#define AK4113_BCU (1<<6)
98/* Master Clock Operation Select */
99#define AK4113_CM1 (1<<5)
100/* Master Clock Operation Select */
101#define AK4113_CM0 (1<<4)
102/* Master Clock Frequency Select */
103#define AK4113_OCKS1 (1<<3)
104/* Master Clock Frequency Select */
105#define AK4113_OCKS0 (1<<2)
106/* 0 = power down, 1 = normal operation */
107#define AK4113_PWN (1<<1)
108/* 0 = reset & initialize (except thisregister), 1 = normal operation */
109#define AK4113_RST (1<<0)
110
111/* AK4113_REQ_FORMAT bits */
112/* V/TX Output select: 0 = Validity Flag Output, 1 = TX */
113#define AK4113_VTX (1<<7)
114/* Audio Data Control */
115#define AK4113_DIF2 (1<<6)
116/* Audio Data Control */
117#define AK4113_DIF1 (1<<5)
118/* Audio Data Control */
119#define AK4113_DIF0 (1<<4)
120/* Deemphasis Autodetect Enable (1 = enable) */
121#define AK4113_DEAU (1<<3)
122/* 32kHz-48kHz Deemphasis Control */
123#define AK4113_DEM1 (1<<2)
124/* 32kHz-48kHz Deemphasis Control */
125#define AK4113_DEM0 (1<<1)
126#define AK4113_DEM_OFF (AK4113_DEM0)
127#define AK4113_DEM_44KHZ (0)
128#define AK4113_DEM_48KHZ (AK4113_DEM1)
129#define AK4113_DEM_32KHZ (AK4113_DEM0|AK4113_DEM1)
130/* STDO: 16-bit, right justified */
131#define AK4113_DIF_16R (0)
132/* STDO: 18-bit, right justified */
133#define AK4113_DIF_18R (AK4113_DIF0)
134/* STDO: 20-bit, right justified */
135#define AK4113_DIF_20R (AK4113_DIF1)
136/* STDO: 24-bit, right justified */
137#define AK4113_DIF_24R (AK4113_DIF1|AK4113_DIF0)
138/* STDO: 24-bit, left justified */
139#define AK4113_DIF_24L (AK4113_DIF2)
140/* STDO: I2S */
141#define AK4113_DIF_24I2S (AK4113_DIF2|AK4113_DIF0)
142/* STDO: 24-bit, left justified; LRCLK, BICK = Input */
143#define AK4113_DIF_I24L (AK4113_DIF2|AK4113_DIF1)
144/* STDO: I2S; LRCLK, BICK = Input */
145#define AK4113_DIF_I24I2S (AK4113_DIF2|AK4113_DIF1|AK4113_DIF0)
146
147/* AK4113_REG_IO0 */
148/* XTL1=0,XTL0=0 -> 11.2896Mhz; XTL1=0,XTL0=1 -> 12.288Mhz */
149#define AK4113_XTL1 (1<<6)
150/* XTL1=1,XTL0=0 -> 24.576Mhz; XTL1=1,XTL0=1 -> use channel status */
151#define AK4113_XTL0 (1<<5)
152/* Block Start Signal Output: 0 = U-bit, 1 = C-bit (req. BCU = 1) */
153#define AK4113_UCE (1<<4)
154/* TX Output Enable (1 = enable) */
155#define AK4113_TXE (1<<3)
156/* Output Through Data Selector for TX pin */
157#define AK4113_OPS2 (1<<2)
158/* Output Through Data Selector for TX pin */
159#define AK4113_OPS1 (1<<1)
160/* Output Through Data Selector for TX pin */
161#define AK4113_OPS0 (1<<0)
162/* 11.2896 MHz ref. Xtal freq. */
163#define AK4113_XTL_11_2896M (0)
164/* 12.288 MHz ref. Xtal freq. */
165#define AK4113_XTL_12_288M (AK4113_XTL0)
166/* 24.576 MHz ref. Xtal freq. */
167#define AK4113_XTL_24_576M (AK4113_XTL1)
168
169/* AK4113_REG_IO1 */
170/* Interrupt 0 pin Hold */
171#define AK4113_EFH1 (1<<7)
172/* Interrupt 0 pin Hold */
173#define AK4113_EFH0 (1<<6)
174#define AK4113_EFH_512LRCLK (0)
175#define AK4113_EFH_1024LRCLK (AK4113_EFH0)
176#define AK4113_EFH_2048LRCLK (AK4113_EFH1)
177#define AK4113_EFH_4096LRCLK (AK4113_EFH1|AK4113_EFH0)
178/* PLL Lock Time: 0 = 384/fs, 1 = 1/fs */
179#define AK4113_FAST (1<<5)
180/* MCKO2 Output Select: 0 = CMx/OCKSx, 1 = Xtal */
181#define AK4113_XMCK (1<<4)
182/* MCKO2 Output Freq. Select: 0 = x1, 1 = x0.5 (req. XMCK = 1) */
183#define AK4113_DIV (1<<3)
184/* Input Recovery Data Select */
185#define AK4113_IPS2 (1<<2)
186/* Input Recovery Data Select */
187#define AK4113_IPS1 (1<<1)
188/* Input Recovery Data Select */
189#define AK4113_IPS0 (1<<0)
190#define AK4113_IPS(x) ((x)&7)
191
192/* AK4113_REG_INT0_MASK && AK4113_REG_INT1_MASK*/
193/* mask enable for QINT bit */
194#define AK4113_MQI (1<<7)
195/* mask enable for AUTO bit */
196#define AK4113_MAUT (1<<6)
197/* mask enable for CINT bit */
198#define AK4113_MCIT (1<<5)
199/* mask enable for UNLOCK bit */
200#define AK4113_MULK (1<<4)
201/* mask enable for V bit */
202#define AK4113_V (1<<3)
203/* mask enable for STC bit */
204#define AK4113_STC (1<<2)
205/* mask enable for AUDN bit */
206#define AK4113_MAN (1<<1)
207/* mask enable for PAR bit */
208#define AK4113_MPR (1<<0)
209
210/* AK4113_REG_DATDTS */
211/* DAT Start ID Counter */
212#define AK4113_DCNT (1<<4)
213/* DTS-CD 16-bit Sync Word Detect */
214#define AK4113_DTS16 (1<<3)
215/* DTS-CD 14-bit Sync Word Detect */
216#define AK4113_DTS14 (1<<2)
217/* mask enable for DAT bit (if 1, no INT1 effect */
218#define AK4113_MDAT1 (1<<1)
219/* mask enable for DAT bit (if 1, no INT0 effect */
220#define AK4113_MDAT0 (1<<0)
221
222/* AK4113_REG_RCS0 */
223/* Q-subcode buffer interrupt, 0 = no change, 1 = changed */
224#define AK4113_QINT (1<<7)
225/* Non-PCM or DTS stream auto detection, 0 = no detect, 1 = detect */
226#define AK4113_AUTO (1<<6)
227/* channel status buffer interrupt, 0 = no change, 1 = change */
228#define AK4113_CINT (1<<5)
229/* PLL lock status, 0 = lock, 1 = unlock */
230#define AK4113_UNLCK (1<<4)
231/* Validity bit, 0 = valid, 1 = invalid */
232#define AK4113_V (1<<3)
233/* sampling frequency or Pre-emphasis change, 0 = no detect, 1 = detect */
234#define AK4113_STC (1<<2)
235/* audio bit output, 0 = audio, 1 = non-audio */
236#define AK4113_AUDION (1<<1)
237/* parity error or biphase error status, 0 = no error, 1 = error */
238#define AK4113_PAR (1<<0)
239
240/* AK4113_REG_RCS1 */
241/* sampling frequency detection */
242#define AK4113_FS3 (1<<7)
243#define AK4113_FS2 (1<<6)
244#define AK4113_FS1 (1<<5)
245#define AK4113_FS0 (1<<4)
246/* Pre-emphasis detect, 0 = OFF, 1 = ON */
247#define AK4113_PEM (1<<3)
248/* DAT Start ID Detect, 0 = no detect, 1 = detect */
249#define AK4113_DAT (1<<2)
250/* DTS-CD bit audio stream detect, 0 = no detect, 1 = detect */
251#define AK4113_DTSCD (1<<1)
252/* Non-PCM bit stream detection, 0 = no detect, 1 = detect */
253#define AK4113_NPCM (1<<0)
254#define AK4113_FS_8000HZ (AK4113_FS3|AK4113_FS0)
255#define AK4113_FS_11025HZ (AK4113_FS2|AK4113_FS0)
256#define AK4113_FS_16000HZ (AK4113_FS2|AK4113_FS1|AK4113_FS0)
257#define AK4113_FS_22050HZ (AK4113_FS2)
258#define AK4113_FS_24000HZ (AK4113_FS2|AK4113_FS1)
259#define AK4113_FS_32000HZ (AK4113_FS1|AK4113_FS0)
260#define AK4113_FS_44100HZ (0)
261#define AK4113_FS_48000HZ (AK4113_FS1)
262#define AK4113_FS_64000HZ (AK4113_FS3|AK4113_FS1|AK4113_FS0)
263#define AK4113_FS_88200HZ (AK4113_FS3)
264#define AK4113_FS_96000HZ (AK4113_FS3|AK4113_FS1)
265#define AK4113_FS_176400HZ (AK4113_FS3|AK4113_FS2)
266#define AK4113_FS_192000HZ (AK4113_FS3|AK4113_FS2|AK4113_FS1)
267
268/* AK4113_REG_RCS2 */
269/* CRC for Q-subcode, 0 = no error, 1 = error */
270#define AK4113_QCRC (1<<1)
271/* CRC for channel status, 0 = no error, 1 = error */
272#define AK4113_CCRC (1<<0)
273
274/* flags for snd_ak4113_check_rate_and_errors() */
275#define AK4113_CHECK_NO_STAT (1<<0) /* no statistics */
276#define AK4113_CHECK_NO_RATE (1<<1) /* no rate check */
277
278#define AK4113_CONTROLS 13
279
280typedef void (ak4113_write_t)(void *private_data, unsigned char addr,
281 unsigned char data);
282typedef unsigned char (ak4113_read_t)(void *private_data, unsigned char addr);
283
284struct ak4113 {
285 struct snd_card *card;
286 ak4113_write_t *write;
287 ak4113_read_t *read;
288 void *private_data;
289 unsigned int init:1;
290 spinlock_t lock;
291 unsigned char regmap[AK4113_WRITABLE_REGS];
292 struct snd_kcontrol *kctls[AK4113_CONTROLS];
293 struct snd_pcm_substream *substream;
294 unsigned long parity_errors;
295 unsigned long v_bit_errors;
296 unsigned long qcrc_errors;
297 unsigned long ccrc_errors;
298 unsigned char rcs0;
299 unsigned char rcs1;
300 unsigned char rcs2;
301 struct delayed_work work;
302 unsigned int check_flags;
303 void *change_callback_private;
304 void (*change_callback)(struct ak4113 *ak4113, unsigned char c0,
305 unsigned char c1);
306};
307
308int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
309 ak4113_write_t *write,
310 const unsigned char pgm[AK4113_WRITABLE_REGS],
311 void *private_data, struct ak4113 **r_ak4113);
312void snd_ak4113_reg_write(struct ak4113 *ak4113, unsigned char reg,
313 unsigned char mask, unsigned char val);
314void snd_ak4113_reinit(struct ak4113 *ak4113);
315int snd_ak4113_build(struct ak4113 *ak4113,
316 struct snd_pcm_substream *capture_substream);
317int snd_ak4113_external_rate(struct ak4113 *ak4113);
318int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags);
319
320#endif /* __SOUND_AK4113_H */
321
diff --git a/include/sound/ak4114.h b/include/sound/ak4114.h
index d293d36a66b8..3ce69fd92523 100644
--- a/include/sound/ak4114.h
+++ b/include/sound/ak4114.h
@@ -95,13 +95,13 @@
95 95
96/* AK4114_REG_IO0 */ 96/* AK4114_REG_IO0 */
97#define AK4114_TX1E (1<<7) /* TX1 Output Enable (1 = enable) */ 97#define AK4114_TX1E (1<<7) /* TX1 Output Enable (1 = enable) */
98#define AK4114_OPS12 (1<<2) /* Output Though Data Selector for TX1 pin */ 98#define AK4114_OPS12 (1<<6) /* Output Data Selector for TX1 pin */
99#define AK4114_OPS11 (1<<1) /* Output Though Data Selector for TX1 pin */ 99#define AK4114_OPS11 (1<<5) /* Output Data Selector for TX1 pin */
100#define AK4114_OPS10 (1<<0) /* Output Though Data Selector for TX1 pin */ 100#define AK4114_OPS10 (1<<4) /* Output Data Selector for TX1 pin */
101#define AK4114_TX0E (1<<3) /* TX0 Output Enable (1 = enable) */ 101#define AK4114_TX0E (1<<3) /* TX0 Output Enable (1 = enable) */
102#define AK4114_OPS02 (1<<2) /* Output Though Data Selector for TX0 pin */ 102#define AK4114_OPS02 (1<<2) /* Output Data Selector for TX0 pin */
103#define AK4114_OPS01 (1<<1) /* Output Though Data Selector for TX0 pin */ 103#define AK4114_OPS01 (1<<1) /* Output Data Selector for TX0 pin */
104#define AK4114_OPS00 (1<<0) /* Output Though Data Selector for TX0 pin */ 104#define AK4114_OPS00 (1<<0) /* Output Data Selector for TX0 pin */
105 105
106/* AK4114_REG_IO1 */ 106/* AK4114_REG_IO1 */
107#define AK4114_EFH1 (1<<7) /* Interrupt 0 pin Hold */ 107#define AK4114_EFH1 (1<<7) /* Interrupt 0 pin Hold */
diff --git a/include/sound/ak4xxx-adda.h b/include/sound/ak4xxx-adda.h
index 891cf1aea8b1..030b87c2f6d4 100644
--- a/include/sound/ak4xxx-adda.h
+++ b/include/sound/ak4xxx-adda.h
@@ -68,7 +68,7 @@ struct snd_akm4xxx {
68 enum { 68 enum {
69 SND_AK4524, SND_AK4528, SND_AK4529, 69 SND_AK4524, SND_AK4528, SND_AK4529,
70 SND_AK4355, SND_AK4358, SND_AK4381, 70 SND_AK4355, SND_AK4358, SND_AK4381,
71 SND_AK5365 71 SND_AK5365, SND_AK4620,
72 } type; 72 } type;
73 73
74 /* (array) information of combined codecs */ 74 /* (array) information of combined codecs */
@@ -76,6 +76,9 @@ struct snd_akm4xxx {
76 const struct snd_akm4xxx_adc_channel *adc_info; 76 const struct snd_akm4xxx_adc_channel *adc_info;
77 77
78 struct snd_ak4xxx_ops ops; 78 struct snd_ak4xxx_ops ops;
79 unsigned int num_chips;
80 unsigned int total_regs;
81 const char *name;
79}; 82};
80 83
81void snd_akm4xxx_write(struct snd_akm4xxx *ak, int chip, unsigned char reg, 84void snd_akm4xxx_write(struct snd_akm4xxx *ak, int chip, unsigned char reg,
diff --git a/include/sound/control.h b/include/sound/control.h
index ef96f07aa03b..112374dc0c58 100644
--- a/include/sound/control.h
+++ b/include/sound/control.h
@@ -56,7 +56,6 @@ struct snd_kcontrol_new {
56 56
57struct snd_kcontrol_volatile { 57struct snd_kcontrol_volatile {
58 struct snd_ctl_file *owner; /* locked */ 58 struct snd_ctl_file *owner; /* locked */
59 pid_t owner_pid;
60 unsigned int access; /* access rights */ 59 unsigned int access; /* access rights */
61}; 60};
62 61
@@ -87,10 +86,12 @@ struct snd_kctl_event {
87 86
88#define snd_kctl_event(n) list_entry(n, struct snd_kctl_event, list) 87#define snd_kctl_event(n) list_entry(n, struct snd_kctl_event, list)
89 88
89struct pid;
90
90struct snd_ctl_file { 91struct snd_ctl_file {
91 struct list_head list; /* list of all control files */ 92 struct list_head list; /* list of all control files */
92 struct snd_card *card; 93 struct snd_card *card;
93 pid_t pid; 94 struct pid *pid;
94 int prefer_pcm_subdevice; 95 int prefer_pcm_subdevice;
95 int prefer_rawmidi_subdevice; 96 int prefer_rawmidi_subdevice;
96 wait_queue_head_t change_sleep; 97 wait_queue_head_t change_sleep;
diff --git a/include/sound/cs4231-regs.h b/include/sound/cs4231-regs.h
index 92647532c454..66d28c2cb53d 100644
--- a/include/sound/cs4231-regs.h
+++ b/include/sound/cs4231-regs.h
@@ -70,7 +70,6 @@
70#define AD1845_PWR_DOWN 0x1b /* power down control */ 70#define AD1845_PWR_DOWN 0x1b /* power down control */
71#define CS4235_LEFT_MASTER 0x1b /* left master output control */ 71#define CS4235_LEFT_MASTER 0x1b /* left master output control */
72#define CS4231_REC_FORMAT 0x1c /* clock and data format - record - bits 7-0 MCE */ 72#define CS4231_REC_FORMAT 0x1c /* clock and data format - record - bits 7-0 MCE */
73#define CS4231_PLY_VAR_FREQ 0x1d /* playback variable frequency */
74#define AD1845_CLOCK 0x1d /* crystal clock select and total power down */ 73#define AD1845_CLOCK 0x1d /* crystal clock select and total power down */
75#define CS4235_RIGHT_MASTER 0x1d /* right master output control */ 74#define CS4235_RIGHT_MASTER 0x1d /* right master output control */
76#define CS4231_REC_UPR_CNT 0x1e /* record upper count */ 75#define CS4231_REC_UPR_CNT 0x1e /* record upper count */
diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index de6d981de5d6..c83a4a79f16b 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -348,6 +348,8 @@ struct snd_pcm_group { /* keep linked substreams */
348 int count; 348 int count;
349}; 349};
350 350
351struct pid;
352
351struct snd_pcm_substream { 353struct snd_pcm_substream {
352 struct snd_pcm *pcm; 354 struct snd_pcm *pcm;
353 struct snd_pcm_str *pstr; 355 struct snd_pcm_str *pstr;
@@ -379,6 +381,7 @@ struct snd_pcm_substream {
379 atomic_t mmap_count; 381 atomic_t mmap_count;
380 unsigned int f_flags; 382 unsigned int f_flags;
381 void (*pcm_release)(struct snd_pcm_substream *); 383 void (*pcm_release)(struct snd_pcm_substream *);
384 struct pid *pid;
382#if defined(CONFIG_SND_PCM_OSS) || defined(CONFIG_SND_PCM_OSS_MODULE) 385#if defined(CONFIG_SND_PCM_OSS) || defined(CONFIG_SND_PCM_OSS_MODULE)
383 /* -- OSS things -- */ 386 /* -- OSS things -- */
384 struct snd_pcm_oss_substream oss; 387 struct snd_pcm_oss_substream oss;
diff --git a/include/sound/rawmidi.h b/include/sound/rawmidi.h
index c23c26585700..2480e7d10dcf 100644
--- a/include/sound/rawmidi.h
+++ b/include/sound/rawmidi.h
@@ -46,6 +46,7 @@
46struct snd_rawmidi; 46struct snd_rawmidi;
47struct snd_rawmidi_substream; 47struct snd_rawmidi_substream;
48struct snd_seq_port_info; 48struct snd_seq_port_info;
49struct pid;
49 50
50struct snd_rawmidi_ops { 51struct snd_rawmidi_ops {
51 int (*open) (struct snd_rawmidi_substream * substream); 52 int (*open) (struct snd_rawmidi_substream * substream);
@@ -97,6 +98,7 @@ struct snd_rawmidi_substream {
97 struct snd_rawmidi_str *pstr; 98 struct snd_rawmidi_str *pstr;
98 char name[32]; 99 char name[32];
99 struct snd_rawmidi_runtime *runtime; 100 struct snd_rawmidi_runtime *runtime;
101 struct pid *pid;
100 /* hardware layer */ 102 /* hardware layer */
101 struct snd_rawmidi_ops *ops; 103 struct snd_rawmidi_ops *ops;
102}; 104};
diff --git a/include/sound/sh_dac_audio.h b/include/sound/sh_dac_audio.h
new file mode 100644
index 000000000000..f5deaf1ddb9f
--- /dev/null
+++ b/include/sound/sh_dac_audio.h
@@ -0,0 +1,21 @@
1/*
2 * SH_DAC specific configuration, for the dac_audio platform_device
3 *
4 * Copyright (C) 2009 Rafael Ignacio Zurita <rizurita@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11#ifndef __INCLUDE_SH_DAC_AUDIO_H
12#define __INCLUDE_SH_DAC_AUDIO_H
13
14struct dac_audio_pdata {
15 int buffer_size;
16 int channel;
17 void (*start)(struct dac_audio_pdata *pd);
18 void (*stop)(struct dac_audio_pdata *pd);
19};
20
21#endif /* __INCLUDE_SH_DAC_AUDIO_H */
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index 97ca9af414dc..ca24e7f7a3f5 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -30,6 +30,7 @@ struct snd_pcm_substream;
30#define SND_SOC_DAIFMT_DSP_A 3 /* L data MSB after FRM LRC */ 30#define SND_SOC_DAIFMT_DSP_A 3 /* L data MSB after FRM LRC */
31#define SND_SOC_DAIFMT_DSP_B 4 /* L data MSB during FRM LRC */ 31#define SND_SOC_DAIFMT_DSP_B 4 /* L data MSB during FRM LRC */
32#define SND_SOC_DAIFMT_AC97 5 /* AC97 */ 32#define SND_SOC_DAIFMT_AC97 5 /* AC97 */
33#define SND_SOC_DAIFMT_PDM 6 /* Pulse density modulation */
33 34
34/* left and right justified also known as MSB and LSB respectively */ 35/* left and right justified also known as MSB and LSB respectively */
35#define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J 36#define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J
@@ -106,7 +107,7 @@ int snd_soc_dai_set_clkdiv(struct snd_soc_dai *dai,
106 int div_id, int div); 107 int div_id, int div);
107 108
108int snd_soc_dai_set_pll(struct snd_soc_dai *dai, 109int snd_soc_dai_set_pll(struct snd_soc_dai *dai,
109 int pll_id, unsigned int freq_in, unsigned int freq_out); 110 int pll_id, int source, unsigned int freq_in, unsigned int freq_out);
110 111
111/* Digital Audio interface formatting */ 112/* Digital Audio interface formatting */
112int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt); 113int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt);
@@ -114,6 +115,10 @@ int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt);
114int snd_soc_dai_set_tdm_slot(struct snd_soc_dai *dai, 115int snd_soc_dai_set_tdm_slot(struct snd_soc_dai *dai,
115 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width); 116 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width);
116 117
118int snd_soc_dai_set_channel_map(struct snd_soc_dai *dai,
119 unsigned int tx_num, unsigned int *tx_slot,
120 unsigned int rx_num, unsigned int *rx_slot);
121
117int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate); 122int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate);
118 123
119/* Digital Audio Interface mute */ 124/* Digital Audio Interface mute */
@@ -136,8 +141,8 @@ struct snd_soc_dai_ops {
136 */ 141 */
137 int (*set_sysclk)(struct snd_soc_dai *dai, 142 int (*set_sysclk)(struct snd_soc_dai *dai,
138 int clk_id, unsigned int freq, int dir); 143 int clk_id, unsigned int freq, int dir);
139 int (*set_pll)(struct snd_soc_dai *dai, 144 int (*set_pll)(struct snd_soc_dai *dai, int pll_id, int source,
140 int pll_id, unsigned int freq_in, unsigned int freq_out); 145 unsigned int freq_in, unsigned int freq_out);
141 int (*set_clkdiv)(struct snd_soc_dai *dai, int div_id, int div); 146 int (*set_clkdiv)(struct snd_soc_dai *dai, int div_id, int div);
142 147
143 /* 148 /*
@@ -148,6 +153,9 @@ struct snd_soc_dai_ops {
148 int (*set_tdm_slot)(struct snd_soc_dai *dai, 153 int (*set_tdm_slot)(struct snd_soc_dai *dai,
149 unsigned int tx_mask, unsigned int rx_mask, 154 unsigned int tx_mask, unsigned int rx_mask,
150 int slots, int slot_width); 155 int slots, int slot_width);
156 int (*set_channel_map)(struct snd_soc_dai *dai,
157 unsigned int tx_num, unsigned int *tx_slot,
158 unsigned int rx_num, unsigned int *rx_slot);
151 int (*set_tristate)(struct snd_soc_dai *dai, int tristate); 159 int (*set_tristate)(struct snd_soc_dai *dai, int tristate);
152 160
153 /* 161 /*
diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h
index c1410e3191e3..c5c95e1da65b 100644
--- a/include/sound/soc-dapm.h
+++ b/include/sound/soc-dapm.h
@@ -206,6 +206,12 @@
206 .get = snd_soc_dapm_get_enum_double, \ 206 .get = snd_soc_dapm_get_enum_double, \
207 .put = snd_soc_dapm_put_enum_double, \ 207 .put = snd_soc_dapm_put_enum_double, \
208 .private_value = (unsigned long)&xenum } 208 .private_value = (unsigned long)&xenum }
209#define SOC_DAPM_ENUM_VIRT(xname, xenum) \
210{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
211 .info = snd_soc_info_enum_double, \
212 .get = snd_soc_dapm_get_enum_virt, \
213 .put = snd_soc_dapm_put_enum_virt, \
214 .private_value = (unsigned long)&xenum }
209#define SOC_DAPM_VALUE_ENUM(xname, xenum) \ 215#define SOC_DAPM_VALUE_ENUM(xname, xenum) \
210{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 216{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
211 .info = snd_soc_info_enum_double, \ 217 .info = snd_soc_info_enum_double, \
@@ -260,6 +266,10 @@ int snd_soc_dapm_get_enum_double(struct snd_kcontrol *kcontrol,
260 struct snd_ctl_elem_value *ucontrol); 266 struct snd_ctl_elem_value *ucontrol);
261int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol, 267int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol,
262 struct snd_ctl_elem_value *ucontrol); 268 struct snd_ctl_elem_value *ucontrol);
269int snd_soc_dapm_get_enum_virt(struct snd_kcontrol *kcontrol,
270 struct snd_ctl_elem_value *ucontrol);
271int snd_soc_dapm_put_enum_virt(struct snd_kcontrol *kcontrol,
272 struct snd_ctl_elem_value *ucontrol);
263int snd_soc_dapm_get_value_enum_double(struct snd_kcontrol *kcontrol, 273int snd_soc_dapm_get_value_enum_double(struct snd_kcontrol *kcontrol,
264 struct snd_ctl_elem_value *ucontrol); 274 struct snd_ctl_elem_value *ucontrol);
265int snd_soc_dapm_put_value_enum_double(struct snd_kcontrol *kcontrol, 275int snd_soc_dapm_put_value_enum_double(struct snd_kcontrol *kcontrol,
@@ -333,6 +343,10 @@ struct snd_soc_dapm_route {
333 const char *sink; 343 const char *sink;
334 const char *control; 344 const char *control;
335 const char *source; 345 const char *source;
346
347 /* Note: currently only supported for links where source is a supply */
348 int (*connected)(struct snd_soc_dapm_widget *source,
349 struct snd_soc_dapm_widget *sink);
336}; 350};
337 351
338/* dapm audio path between two widgets */ 352/* dapm audio path between two widgets */
@@ -349,6 +363,9 @@ struct snd_soc_dapm_path {
349 u32 connect:1; /* source and sink widgets are connected */ 363 u32 connect:1; /* source and sink widgets are connected */
350 u32 walked:1; /* path has been walked */ 364 u32 walked:1; /* path has been walked */
351 365
366 int (*connected)(struct snd_soc_dapm_widget *source,
367 struct snd_soc_dapm_widget *sink);
368
352 struct list_head list_source; 369 struct list_head list_source;
353 struct list_head list_sink; 370 struct list_head list_sink;
354 struct list_head list; 371 struct list_head list;
diff --git a/include/sound/soc.h b/include/sound/soc.h
index 475cb7ed6bec..0d7718f9280d 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -223,15 +223,15 @@ int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
223 int addr_bits, int data_bits, 223 int addr_bits, int data_bits,
224 enum snd_soc_control_type control); 224 enum snd_soc_control_type control);
225 225
226#ifdef CONFIG_PM
227int snd_soc_suspend_device(struct device *dev);
228int snd_soc_resume_device(struct device *dev);
229#endif
230
231/* pcm <-> DAI connect */ 226/* pcm <-> DAI connect */
232void snd_soc_free_pcms(struct snd_soc_device *socdev); 227void snd_soc_free_pcms(struct snd_soc_device *socdev);
233int snd_soc_new_pcms(struct snd_soc_device *socdev, int idx, const char *xid); 228int snd_soc_new_pcms(struct snd_soc_device *socdev, int idx, const char *xid);
234int snd_soc_init_card(struct snd_soc_device *socdev); 229
230/* Utility functions to get clock rates from various things */
231int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
232int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params);
233int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots);
234int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
235 235
236/* set runtime hw params */ 236/* set runtime hw params */
237int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, 237int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
@@ -333,6 +333,8 @@ struct snd_soc_jack_gpio {
333 int debounce_time; 333 int debounce_time;
334 struct snd_soc_jack *jack; 334 struct snd_soc_jack *jack;
335 struct work_struct work; 335 struct work_struct work;
336
337 int (*jack_status_check)(void);
336}; 338};
337#endif 339#endif
338 340
@@ -413,6 +415,7 @@ struct snd_soc_codec {
413 unsigned int num_dai; 415 unsigned int num_dai;
414 416
415#ifdef CONFIG_DEBUG_FS 417#ifdef CONFIG_DEBUG_FS
418 struct dentry *debugfs_codec_root;
416 struct dentry *debugfs_reg; 419 struct dentry *debugfs_reg;
417 struct dentry *debugfs_pop_time; 420 struct dentry *debugfs_pop_time;
418 struct dentry *debugfs_dapm; 421 struct dentry *debugfs_dapm;
diff --git a/include/sound/sscape_ioctl.h b/include/sound/sscape_ioctl.h
deleted file mode 100644
index 0d8885969c64..000000000000
--- a/include/sound/sscape_ioctl.h
+++ /dev/null
@@ -1,21 +0,0 @@
1#ifndef SSCAPE_IOCTL_H
2#define SSCAPE_IOCTL_H
3
4
5struct sscape_bootblock
6{
7 unsigned char code[256];
8 unsigned version;
9};
10
11#define SSCAPE_MICROCODE_SIZE 65536
12
13struct sscape_microcode
14{
15 unsigned char __user *code;
16};
17
18#define SND_SSCAPE_LOAD_BOOTB _IOWR('P', 100, struct sscape_bootblock)
19#define SND_SSCAPE_LOAD_MCODE _IOW ('P', 101, struct sscape_microcode)
20
21#endif
diff --git a/include/sound/tlv320dac33-plat.h b/include/sound/tlv320dac33-plat.h
new file mode 100644
index 000000000000..5858d06a7ffa
--- /dev/null
+++ b/include/sound/tlv320dac33-plat.h
@@ -0,0 +1,20 @@
1/*
2 * Platform header for Texas Instruments TLV320DAC33 codec driver
3 *
4 * Author: Peter Ujfalusi <peter.ujfalusi@nokia.com>
5 *
6 * Copyright: (C) 2009 Nokia Corporation
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __TLV320DAC33_PLAT_H
14#define __TLV320DAC33_PLAT_H
15
16struct tlv320dac33_platform_data {
17 int power_gpio;
18};
19
20#endif /* __TLV320DAC33_PLAT_H */
diff --git a/include/sound/tpa6130a2-plat.h b/include/sound/tpa6130a2-plat.h
new file mode 100644
index 000000000000..e8c901e749d8
--- /dev/null
+++ b/include/sound/tpa6130a2-plat.h
@@ -0,0 +1,30 @@
1/*
2 * TPA6130A2 driver platform header
3 *
4 * Copyright (C) Nokia Corporation
5 *
6 * Written by Peter Ujfalusi <peter.ujfalusi@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 */
22
23#ifndef TPA6130A2_PLAT_H
24#define TPA6130A2_PLAT_H
25
26struct tpa6130a2_platform_data {
27 int power_gpio;
28};
29
30#endif
diff --git a/include/sound/wss.h b/include/sound/wss.h
index 6d65f322f1d5..fd01f22825cd 100644
--- a/include/sound/wss.h
+++ b/include/sound/wss.h
@@ -154,7 +154,6 @@ int snd_wss_create(struct snd_card *card,
154 unsigned short hardware, 154 unsigned short hardware,
155 unsigned short hwshare, 155 unsigned short hwshare,
156 struct snd_wss **rchip); 156 struct snd_wss **rchip);
157int snd_wss_free(struct snd_wss *chip);
158int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm); 157int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
159int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer); 158int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer);
160int snd_wss_mixer(struct snd_wss *chip); 159int snd_wss_mixer(struct snd_wss *chip);
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-28 02:57:16 -0400