diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mfd/si476x-core.h | 525 | ||||
-rw-r--r-- | include/media/davinci/dm355_ccdc.h | 6 | ||||
-rw-r--r-- | include/media/davinci/dm644x_ccdc.h | 24 | ||||
-rw-r--r-- | include/media/davinci/vpbe.h | 2 | ||||
-rw-r--r-- | include/media/davinci/vpbe_types.h | 3 | ||||
-rw-r--r-- | include/media/media-devnode.h | 1 | ||||
-rw-r--r-- | include/media/rc-core.h | 2 | ||||
-rw-r--r-- | include/media/s5p_fimc.h | 51 | ||||
-rw-r--r-- | include/media/saa7115.h | 32 | ||||
-rw-r--r-- | include/media/si476x.h | 426 | ||||
-rw-r--r-- | include/media/ths7303.h | 42 | ||||
-rw-r--r-- | include/media/tuner.h | 4 | ||||
-rw-r--r-- | include/media/uda1342.h | 29 | ||||
-rw-r--r-- | include/media/v4l2-chip-ident.h | 11 | ||||
-rw-r--r-- | include/media/v4l2-common.h | 1 | ||||
-rw-r--r-- | include/media/v4l2-ctrls.h | 29 | ||||
-rw-r--r-- | include/media/v4l2-device.h | 13 | ||||
-rw-r--r-- | include/media/v4l2-ioctl.h | 22 | ||||
-rw-r--r-- | include/media/v4l2-of.h | 111 | ||||
-rw-r--r-- | include/media/v4l2-subdev.h | 25 | ||||
-rw-r--r-- | include/media/videobuf2-core.h | 11 | ||||
-rw-r--r-- | include/uapi/linux/media.h | 2 | ||||
-rw-r--r-- | include/uapi/linux/v4l2-controls.h | 28 | ||||
-rw-r--r-- | include/uapi/linux/videodev2.h | 89 |
24 files changed, 1365 insertions, 124 deletions
diff --git a/include/linux/mfd/si476x-core.h b/include/linux/mfd/si476x-core.h new file mode 100644 index 000000000000..2136b2631dc3 --- /dev/null +++ b/include/linux/mfd/si476x-core.h | |||
@@ -0,0 +1,525 @@ | |||
1 | /* | ||
2 | * include/media/si476x-core.h -- Common definitions for si476x core | ||
3 | * device | ||
4 | * | ||
5 | * Copyright (C) 2012 Innovative Converged Devices(ICD) | ||
6 | * | ||
7 | * Author: Andrey Smirnov <andrey.smirnov@convergeddevices.net> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; version 2 of the License. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, but | ||
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
16 | * General Public License for more details. | ||
17 | * | ||
18 | */ | ||
19 | |||
20 | #ifndef SI476X_CORE_H | ||
21 | #define SI476X_CORE_H | ||
22 | |||
23 | #include <linux/kfifo.h> | ||
24 | #include <linux/atomic.h> | ||
25 | #include <linux/i2c.h> | ||
26 | #include <linux/regmap.h> | ||
27 | #include <linux/mutex.h> | ||
28 | #include <linux/mfd/core.h> | ||
29 | #include <linux/videodev2.h> | ||
30 | #include <linux/regulator/consumer.h> | ||
31 | |||
32 | #include <media/si476x.h> | ||
33 | |||
34 | /* Command Timeouts */ | ||
35 | #define SI476X_DEFAULT_TIMEOUT 100000 | ||
36 | #define SI476X_TIMEOUT_TUNE 700000 | ||
37 | #define SI476X_TIMEOUT_POWER_UP 330000 | ||
38 | #define SI476X_STATUS_POLL_US 0 | ||
39 | |||
40 | /* -------------------- si476x-i2c.c ----------------------- */ | ||
41 | |||
42 | enum si476x_freq_supported_chips { | ||
43 | SI476X_CHIP_SI4761 = 1, | ||
44 | SI476X_CHIP_SI4764, | ||
45 | SI476X_CHIP_SI4768, | ||
46 | }; | ||
47 | |||
48 | enum si476x_mfd_cells { | ||
49 | SI476X_RADIO_CELL = 0, | ||
50 | SI476X_CODEC_CELL, | ||
51 | SI476X_MFD_CELLS, | ||
52 | }; | ||
53 | |||
54 | /** | ||
55 | * enum si476x_power_state - possible power state of the si476x | ||
56 | * device. | ||
57 | * | ||
58 | * @SI476X_POWER_DOWN: In this state all regulators are turned off | ||
59 | * and the reset line is pulled low. The device is completely | ||
60 | * inactive. | ||
61 | * @SI476X_POWER_UP_FULL: In this state all the power regualtors are | ||
62 | * turned on, reset line pulled high, IRQ line is enabled(polling is | ||
63 | * active for polling use scenario) and device is turned on with | ||
64 | * POWER_UP command. The device is ready to be used. | ||
65 | * @SI476X_POWER_INCONSISTENT: This state indicates that previous | ||
66 | * power down was inconsistent, meaning some of the regulators were | ||
67 | * not turned down and thus use of the device, without power-cycling | ||
68 | * is impossible. | ||
69 | */ | ||
70 | enum si476x_power_state { | ||
71 | SI476X_POWER_DOWN = 0, | ||
72 | SI476X_POWER_UP_FULL = 1, | ||
73 | SI476X_POWER_INCONSISTENT = 2, | ||
74 | }; | ||
75 | |||
76 | /** | ||
77 | * struct si476x_core - internal data structure representing the | ||
78 | * underlying "core" device which all the MFD cell-devices use. | ||
79 | * | ||
80 | * @client: Actual I2C client used to transfer commands to the chip. | ||
81 | * @chip_id: Last digit of the chip model(E.g. "1" for SI4761) | ||
82 | * @cells: MFD cell devices created by this driver. | ||
83 | * @cmd_lock: Mutex used to serialize all the requests to the core | ||
84 | * device. This filed should not be used directly. Instead | ||
85 | * si476x_core_lock()/si476x_core_unlock() should be used to get | ||
86 | * exclusive access to the "core" device. | ||
87 | * @users: Active users counter(Used by the radio cell) | ||
88 | * @rds_read_queue: Wait queue used to wait for RDS data. | ||
89 | * @rds_fifo: FIFO in which all the RDS data received from the chip is | ||
90 | * placed. | ||
91 | * @rds_fifo_drainer: Worker that drains on-chip RDS FIFO. | ||
92 | * @rds_drainer_is_working: Flag used for launching only one instance | ||
93 | * of the @rds_fifo_drainer. | ||
94 | * @rds_drainer_status_lock: Lock used to guard access to the | ||
95 | * @rds_drainer_is_working variable. | ||
96 | * @command: Wait queue for wainting on the command comapletion. | ||
97 | * @cts: Clear To Send flag set upon receiving first status with CTS | ||
98 | * set. | ||
99 | * @tuning: Wait queue used for wainting for tune/seek comand | ||
100 | * completion. | ||
101 | * @stc: Similar to @cts, but for the STC bit of the status value. | ||
102 | * @power_up_parameters: Parameters used as argument for POWER_UP | ||
103 | * command when the device is started. | ||
104 | * @state: Current power state of the device. | ||
105 | * @supplues: Structure containing handles to all power supplies used | ||
106 | * by the device (NULL ones are ignored). | ||
107 | * @gpio_reset: GPIO pin connectet to the RSTB pin of the chip. | ||
108 | * @pinmux: Chip's configurable pins configuration. | ||
109 | * @diversity_mode: Chips role when functioning in diversity mode. | ||
110 | * @status_monitor: Polling worker used in polling use case scenarion | ||
111 | * (when IRQ is not avalible). | ||
112 | * @revision: Chip's running firmware revision number(Used for correct | ||
113 | * command set support). | ||
114 | */ | ||
115 | |||
116 | struct si476x_core { | ||
117 | struct i2c_client *client; | ||
118 | struct regmap *regmap; | ||
119 | int chip_id; | ||
120 | struct mfd_cell cells[SI476X_MFD_CELLS]; | ||
121 | |||
122 | struct mutex cmd_lock; /* for serializing fm radio operations */ | ||
123 | atomic_t users; | ||
124 | |||
125 | wait_queue_head_t rds_read_queue; | ||
126 | struct kfifo rds_fifo; | ||
127 | struct work_struct rds_fifo_drainer; | ||
128 | bool rds_drainer_is_working; | ||
129 | struct mutex rds_drainer_status_lock; | ||
130 | |||
131 | wait_queue_head_t command; | ||
132 | atomic_t cts; | ||
133 | |||
134 | wait_queue_head_t tuning; | ||
135 | atomic_t stc; | ||
136 | |||
137 | struct si476x_power_up_args power_up_parameters; | ||
138 | |||
139 | enum si476x_power_state power_state; | ||
140 | |||
141 | struct regulator_bulk_data supplies[4]; | ||
142 | |||
143 | int gpio_reset; | ||
144 | |||
145 | struct si476x_pinmux pinmux; | ||
146 | enum si476x_phase_diversity_mode diversity_mode; | ||
147 | |||
148 | atomic_t is_alive; | ||
149 | |||
150 | struct delayed_work status_monitor; | ||
151 | #define SI476X_WORK_TO_CORE(w) container_of(to_delayed_work(w), \ | ||
152 | struct si476x_core, \ | ||
153 | status_monitor) | ||
154 | |||
155 | int revision; | ||
156 | |||
157 | int rds_fifo_depth; | ||
158 | }; | ||
159 | |||
160 | static inline struct si476x_core *i2c_mfd_cell_to_core(struct device *dev) | ||
161 | { | ||
162 | struct i2c_client *client = to_i2c_client(dev->parent); | ||
163 | return i2c_get_clientdata(client); | ||
164 | } | ||
165 | |||
166 | |||
167 | /** | ||
168 | * si476x_core_lock() - lock the core device to get an exclusive access | ||
169 | * to it. | ||
170 | */ | ||
171 | static inline void si476x_core_lock(struct si476x_core *core) | ||
172 | { | ||
173 | mutex_lock(&core->cmd_lock); | ||
174 | } | ||
175 | |||
176 | /** | ||
177 | * si476x_core_unlock() - unlock the core device to relinquish an | ||
178 | * exclusive access to it. | ||
179 | */ | ||
180 | static inline void si476x_core_unlock(struct si476x_core *core) | ||
181 | { | ||
182 | mutex_unlock(&core->cmd_lock); | ||
183 | } | ||
184 | |||
185 | /* *_TUNE_FREQ family of commands accept frequency in multiples of | ||
186 | 10kHz */ | ||
187 | static inline u16 hz_to_si476x(struct si476x_core *core, int freq) | ||
188 | { | ||
189 | u16 result; | ||
190 | |||
191 | switch (core->power_up_parameters.func) { | ||
192 | default: | ||
193 | case SI476X_FUNC_FM_RECEIVER: | ||
194 | result = freq / 10000; | ||
195 | break; | ||
196 | case SI476X_FUNC_AM_RECEIVER: | ||
197 | result = freq / 1000; | ||
198 | break; | ||
199 | } | ||
200 | |||
201 | return result; | ||
202 | } | ||
203 | |||
204 | static inline int si476x_to_hz(struct si476x_core *core, u16 freq) | ||
205 | { | ||
206 | int result; | ||
207 | |||
208 | switch (core->power_up_parameters.func) { | ||
209 | default: | ||
210 | case SI476X_FUNC_FM_RECEIVER: | ||
211 | result = freq * 10000; | ||
212 | break; | ||
213 | case SI476X_FUNC_AM_RECEIVER: | ||
214 | result = freq * 1000; | ||
215 | break; | ||
216 | } | ||
217 | |||
218 | return result; | ||
219 | } | ||
220 | |||
221 | /* Since the V4L2_TUNER_CAP_LOW flag is supplied, V4L2 subsystem | ||
222 | * mesures frequency in 62.5 Hz units */ | ||
223 | |||
224 | static inline int hz_to_v4l2(int freq) | ||
225 | { | ||
226 | return (freq * 10) / 625; | ||
227 | } | ||
228 | |||
229 | static inline int v4l2_to_hz(int freq) | ||
230 | { | ||
231 | return (freq * 625) / 10; | ||
232 | } | ||
233 | |||
234 | static inline u16 v4l2_to_si476x(struct si476x_core *core, int freq) | ||
235 | { | ||
236 | return hz_to_si476x(core, v4l2_to_hz(freq)); | ||
237 | } | ||
238 | |||
239 | static inline int si476x_to_v4l2(struct si476x_core *core, u16 freq) | ||
240 | { | ||
241 | return hz_to_v4l2(si476x_to_hz(core, freq)); | ||
242 | } | ||
243 | |||
244 | |||
245 | |||
246 | /** | ||
247 | * struct si476x_func_info - structure containing result of the | ||
248 | * FUNC_INFO command. | ||
249 | * | ||
250 | * @firmware.major: Firmware major number. | ||
251 | * @firmware.minor[...]: Firmware minor numbers. | ||
252 | * @patch_id: | ||
253 | * @func: Mode tuner is working in. | ||
254 | */ | ||
255 | struct si476x_func_info { | ||
256 | struct { | ||
257 | u8 major, minor[2]; | ||
258 | } firmware; | ||
259 | u16 patch_id; | ||
260 | enum si476x_func func; | ||
261 | }; | ||
262 | |||
263 | /** | ||
264 | * struct si476x_power_down_args - structure used to pass parameters | ||
265 | * to POWER_DOWN command | ||
266 | * | ||
267 | * @xosc: true - Power down, but leav oscillator running. | ||
268 | * false - Full power down. | ||
269 | */ | ||
270 | struct si476x_power_down_args { | ||
271 | bool xosc; | ||
272 | }; | ||
273 | |||
274 | /** | ||
275 | * enum si476x_tunemode - enum representing possible tune modes for | ||
276 | * the chip. | ||
277 | * @SI476X_TM_VALIDATED_NORMAL_TUNE: Unconditionally stay on the new | ||
278 | * channel after tune, tune status is valid. | ||
279 | * @SI476X_TM_INVALIDATED_FAST_TUNE: Unconditionally stay in the new | ||
280 | * channel after tune, tune status invalid. | ||
281 | * @SI476X_TM_VALIDATED_AF_TUNE: Jump back to previous channel if | ||
282 | * metric thresholds are not met. | ||
283 | * @SI476X_TM_VALIDATED_AF_CHECK: Unconditionally jump back to the | ||
284 | * previous channel. | ||
285 | */ | ||
286 | enum si476x_tunemode { | ||
287 | SI476X_TM_VALIDATED_NORMAL_TUNE = 0, | ||
288 | SI476X_TM_INVALIDATED_FAST_TUNE = 1, | ||
289 | SI476X_TM_VALIDATED_AF_TUNE = 2, | ||
290 | SI476X_TM_VALIDATED_AF_CHECK = 3, | ||
291 | }; | ||
292 | |||
293 | /** | ||
294 | * enum si476x_smoothmetrics - enum containing the possible setting fo | ||
295 | * audio transitioning of the chip | ||
296 | * @SI476X_SM_INITIALIZE_AUDIO: Initialize audio state to match this | ||
297 | * new channel | ||
298 | * @SI476X_SM_TRANSITION_AUDIO: Transition audio state from previous | ||
299 | * channel values to the new values | ||
300 | */ | ||
301 | enum si476x_smoothmetrics { | ||
302 | SI476X_SM_INITIALIZE_AUDIO = 0, | ||
303 | SI476X_SM_TRANSITION_AUDIO = 1, | ||
304 | }; | ||
305 | |||
306 | /** | ||
307 | * struct si476x_rds_status_report - the structure representing the | ||
308 | * response to 'FM_RD_STATUS' command | ||
309 | * @rdstpptyint: Traffic program flag(TP) and/or program type(PTY) | ||
310 | * code has changed. | ||
311 | * @rdspiint: Program indentifiaction(PI) code has changed. | ||
312 | * @rdssyncint: RDS synchronization has changed. | ||
313 | * @rdsfifoint: RDS was received and the RDS FIFO has at least | ||
314 | * 'FM_RDS_INTERRUPT_FIFO_COUNT' elements in it. | ||
315 | * @tpptyvalid: TP flag and PTY code are valid falg. | ||
316 | * @pivalid: PI code is valid flag. | ||
317 | * @rdssync: RDS is currently synchronized. | ||
318 | * @rdsfifolost: On or more RDS groups have been lost/discarded flag. | ||
319 | * @tp: Current channel's TP flag. | ||
320 | * @pty: Current channel's PTY code. | ||
321 | * @pi: Current channel's PI code. | ||
322 | * @rdsfifoused: Number of blocks remaining in the RDS FIFO (0 if | ||
323 | * empty). | ||
324 | */ | ||
325 | struct si476x_rds_status_report { | ||
326 | bool rdstpptyint, rdspiint, rdssyncint, rdsfifoint; | ||
327 | bool tpptyvalid, pivalid, rdssync, rdsfifolost; | ||
328 | bool tp; | ||
329 | |||
330 | u8 pty; | ||
331 | u16 pi; | ||
332 | |||
333 | u8 rdsfifoused; | ||
334 | u8 ble[4]; | ||
335 | |||
336 | struct v4l2_rds_data rds[4]; | ||
337 | }; | ||
338 | |||
339 | struct si476x_rsq_status_args { | ||
340 | bool primary; | ||
341 | bool rsqack; | ||
342 | bool attune; | ||
343 | bool cancel; | ||
344 | bool stcack; | ||
345 | }; | ||
346 | |||
347 | enum si476x_injside { | ||
348 | SI476X_INJSIDE_AUTO = 0, | ||
349 | SI476X_INJSIDE_LOW = 1, | ||
350 | SI476X_INJSIDE_HIGH = 2, | ||
351 | }; | ||
352 | |||
353 | struct si476x_tune_freq_args { | ||
354 | bool zifsr; | ||
355 | bool hd; | ||
356 | enum si476x_injside injside; | ||
357 | int freq; | ||
358 | enum si476x_tunemode tunemode; | ||
359 | enum si476x_smoothmetrics smoothmetrics; | ||
360 | int antcap; | ||
361 | }; | ||
362 | |||
363 | int si476x_core_stop(struct si476x_core *, bool); | ||
364 | int si476x_core_start(struct si476x_core *, bool); | ||
365 | int si476x_core_set_power_state(struct si476x_core *, enum si476x_power_state); | ||
366 | bool si476x_core_has_am(struct si476x_core *); | ||
367 | bool si476x_core_has_diversity(struct si476x_core *); | ||
368 | bool si476x_core_is_a_secondary_tuner(struct si476x_core *); | ||
369 | bool si476x_core_is_a_primary_tuner(struct si476x_core *); | ||
370 | bool si476x_core_is_in_am_receiver_mode(struct si476x_core *core); | ||
371 | bool si476x_core_is_powered_up(struct si476x_core *core); | ||
372 | |||
373 | enum si476x_i2c_type { | ||
374 | SI476X_I2C_SEND, | ||
375 | SI476X_I2C_RECV | ||
376 | }; | ||
377 | |||
378 | int si476x_core_i2c_xfer(struct si476x_core *, | ||
379 | enum si476x_i2c_type, | ||
380 | char *, int); | ||
381 | |||
382 | |||
383 | /* -------------------- si476x-cmd.c ----------------------- */ | ||
384 | |||
385 | int si476x_core_cmd_func_info(struct si476x_core *, struct si476x_func_info *); | ||
386 | int si476x_core_cmd_set_property(struct si476x_core *, u16, u16); | ||
387 | int si476x_core_cmd_get_property(struct si476x_core *, u16); | ||
388 | int si476x_core_cmd_dig_audio_pin_cfg(struct si476x_core *, | ||
389 | enum si476x_dclk_config, | ||
390 | enum si476x_dfs_config, | ||
391 | enum si476x_dout_config, | ||
392 | enum si476x_xout_config); | ||
393 | int si476x_core_cmd_zif_pin_cfg(struct si476x_core *, | ||
394 | enum si476x_iqclk_config, | ||
395 | enum si476x_iqfs_config, | ||
396 | enum si476x_iout_config, | ||
397 | enum si476x_qout_config); | ||
398 | int si476x_core_cmd_ic_link_gpo_ctl_pin_cfg(struct si476x_core *, | ||
399 | enum si476x_icin_config, | ||
400 | enum si476x_icip_config, | ||
401 | enum si476x_icon_config, | ||
402 | enum si476x_icop_config); | ||
403 | int si476x_core_cmd_ana_audio_pin_cfg(struct si476x_core *, | ||
404 | enum si476x_lrout_config); | ||
405 | int si476x_core_cmd_intb_pin_cfg(struct si476x_core *, enum si476x_intb_config, | ||
406 | enum si476x_a1_config); | ||
407 | int si476x_core_cmd_fm_seek_start(struct si476x_core *, bool, bool); | ||
408 | int si476x_core_cmd_am_seek_start(struct si476x_core *, bool, bool); | ||
409 | int si476x_core_cmd_fm_rds_status(struct si476x_core *, bool, bool, bool, | ||
410 | struct si476x_rds_status_report *); | ||
411 | int si476x_core_cmd_fm_rds_blockcount(struct si476x_core *, bool, | ||
412 | struct si476x_rds_blockcount_report *); | ||
413 | int si476x_core_cmd_fm_tune_freq(struct si476x_core *, | ||
414 | struct si476x_tune_freq_args *); | ||
415 | int si476x_core_cmd_am_tune_freq(struct si476x_core *, | ||
416 | struct si476x_tune_freq_args *); | ||
417 | int si476x_core_cmd_am_rsq_status(struct si476x_core *, | ||
418 | struct si476x_rsq_status_args *, | ||
419 | struct si476x_rsq_status_report *); | ||
420 | int si476x_core_cmd_fm_rsq_status(struct si476x_core *, | ||
421 | struct si476x_rsq_status_args *, | ||
422 | struct si476x_rsq_status_report *); | ||
423 | int si476x_core_cmd_power_up(struct si476x_core *, | ||
424 | struct si476x_power_up_args *); | ||
425 | int si476x_core_cmd_power_down(struct si476x_core *, | ||
426 | struct si476x_power_down_args *); | ||
427 | int si476x_core_cmd_fm_phase_div_status(struct si476x_core *); | ||
428 | int si476x_core_cmd_fm_phase_diversity(struct si476x_core *, | ||
429 | enum si476x_phase_diversity_mode); | ||
430 | |||
431 | int si476x_core_cmd_fm_acf_status(struct si476x_core *, | ||
432 | struct si476x_acf_status_report *); | ||
433 | int si476x_core_cmd_am_acf_status(struct si476x_core *, | ||
434 | struct si476x_acf_status_report *); | ||
435 | int si476x_core_cmd_agc_status(struct si476x_core *, | ||
436 | struct si476x_agc_status_report *); | ||
437 | |||
438 | enum si476x_power_grid_type { | ||
439 | SI476X_POWER_GRID_50HZ = 0, | ||
440 | SI476X_POWER_GRID_60HZ, | ||
441 | }; | ||
442 | |||
443 | /* Properties */ | ||
444 | |||
445 | enum si476x_interrupt_flags { | ||
446 | SI476X_STCIEN = (1 << 0), | ||
447 | SI476X_ACFIEN = (1 << 1), | ||
448 | SI476X_RDSIEN = (1 << 2), | ||
449 | SI476X_RSQIEN = (1 << 3), | ||
450 | |||
451 | SI476X_ERRIEN = (1 << 6), | ||
452 | SI476X_CTSIEN = (1 << 7), | ||
453 | |||
454 | SI476X_STCREP = (1 << 8), | ||
455 | SI476X_ACFREP = (1 << 9), | ||
456 | SI476X_RDSREP = (1 << 10), | ||
457 | SI476X_RSQREP = (1 << 11), | ||
458 | }; | ||
459 | |||
460 | enum si476x_rdsint_sources { | ||
461 | SI476X_RDSTPPTY = (1 << 4), | ||
462 | SI476X_RDSPI = (1 << 3), | ||
463 | SI476X_RDSSYNC = (1 << 1), | ||
464 | SI476X_RDSRECV = (1 << 0), | ||
465 | }; | ||
466 | |||
467 | enum si476x_status_response_bits { | ||
468 | SI476X_CTS = (1 << 7), | ||
469 | SI476X_ERR = (1 << 6), | ||
470 | /* Status response for WB receiver */ | ||
471 | SI476X_WB_ASQ_INT = (1 << 4), | ||
472 | SI476X_RSQ_INT = (1 << 3), | ||
473 | /* Status response for FM receiver */ | ||
474 | SI476X_FM_RDS_INT = (1 << 2), | ||
475 | SI476X_ACF_INT = (1 << 1), | ||
476 | SI476X_STC_INT = (1 << 0), | ||
477 | }; | ||
478 | |||
479 | /* -------------------- si476x-prop.c ----------------------- */ | ||
480 | |||
481 | enum si476x_common_receiver_properties { | ||
482 | SI476X_PROP_INT_CTL_ENABLE = 0x0000, | ||
483 | SI476X_PROP_DIGITAL_IO_INPUT_SAMPLE_RATE = 0x0200, | ||
484 | SI476X_PROP_DIGITAL_IO_INPUT_FORMAT = 0x0201, | ||
485 | SI476X_PROP_DIGITAL_IO_OUTPUT_SAMPLE_RATE = 0x0202, | ||
486 | SI476X_PROP_DIGITAL_IO_OUTPUT_FORMAT = 0x0203, | ||
487 | |||
488 | SI476X_PROP_SEEK_BAND_BOTTOM = 0x1100, | ||
489 | SI476X_PROP_SEEK_BAND_TOP = 0x1101, | ||
490 | SI476X_PROP_SEEK_FREQUENCY_SPACING = 0x1102, | ||
491 | |||
492 | SI476X_PROP_VALID_MAX_TUNE_ERROR = 0x2000, | ||
493 | SI476X_PROP_VALID_SNR_THRESHOLD = 0x2003, | ||
494 | SI476X_PROP_VALID_RSSI_THRESHOLD = 0x2004, | ||
495 | }; | ||
496 | |||
497 | enum si476x_am_receiver_properties { | ||
498 | SI476X_PROP_AUDIO_PWR_LINE_FILTER = 0x0303, | ||
499 | }; | ||
500 | |||
501 | enum si476x_fm_receiver_properties { | ||
502 | SI476X_PROP_AUDIO_DEEMPHASIS = 0x0302, | ||
503 | |||
504 | SI476X_PROP_FM_RDS_INTERRUPT_SOURCE = 0x4000, | ||
505 | SI476X_PROP_FM_RDS_INTERRUPT_FIFO_COUNT = 0x4001, | ||
506 | SI476X_PROP_FM_RDS_CONFIG = 0x4002, | ||
507 | }; | ||
508 | |||
509 | enum si476x_prop_audio_pwr_line_filter_bits { | ||
510 | SI476X_PROP_PWR_HARMONICS_MASK = 0b0000000000011111, | ||
511 | SI476X_PROP_PWR_GRID_MASK = 0b0000000100000000, | ||
512 | SI476X_PROP_PWR_ENABLE_MASK = 0b0000001000000000, | ||
513 | SI476X_PROP_PWR_GRID_50HZ = 0b0000000000000000, | ||
514 | SI476X_PROP_PWR_GRID_60HZ = 0b0000000100000000, | ||
515 | }; | ||
516 | |||
517 | enum si476x_prop_fm_rds_config_bits { | ||
518 | SI476X_PROP_RDSEN_MASK = 0x1, | ||
519 | SI476X_PROP_RDSEN = 0x1, | ||
520 | }; | ||
521 | |||
522 | |||
523 | struct regmap *devm_regmap_init_si476x(struct si476x_core *); | ||
524 | |||
525 | #endif /* SI476X_CORE_H */ | ||
diff --git a/include/media/davinci/dm355_ccdc.h b/include/media/davinci/dm355_ccdc.h index adf2fe4bf0bb..c669a9fb75e5 100644 --- a/include/media/davinci/dm355_ccdc.h +++ b/include/media/davinci/dm355_ccdc.h | |||
@@ -38,7 +38,7 @@ enum ccdc_sample_line { | |||
38 | CCDC_SAMPLE_16LINES | 38 | CCDC_SAMPLE_16LINES |
39 | }; | 39 | }; |
40 | 40 | ||
41 | /* enum for Alaw gama width */ | 41 | /* enum for Alaw gamma width */ |
42 | enum ccdc_gamma_width { | 42 | enum ccdc_gamma_width { |
43 | CCDC_GAMMA_BITS_13_4, | 43 | CCDC_GAMMA_BITS_13_4, |
44 | CCDC_GAMMA_BITS_12_3, | 44 | CCDC_GAMMA_BITS_12_3, |
@@ -97,8 +97,8 @@ enum ccdc_mfilt2 { | |||
97 | struct ccdc_a_law { | 97 | struct ccdc_a_law { |
98 | /* Enable/disable A-Law */ | 98 | /* Enable/disable A-Law */ |
99 | unsigned char enable; | 99 | unsigned char enable; |
100 | /* Gama Width Input */ | 100 | /* Gamma Width Input */ |
101 | enum ccdc_gamma_width gama_wd; | 101 | enum ccdc_gamma_width gamma_wd; |
102 | }; | 102 | }; |
103 | 103 | ||
104 | /* structure for Black Clamping */ | 104 | /* structure for Black Clamping */ |
diff --git a/include/media/davinci/dm644x_ccdc.h b/include/media/davinci/dm644x_ccdc.h index 3e178eb52fb3..852e96c4bb46 100644 --- a/include/media/davinci/dm644x_ccdc.h +++ b/include/media/davinci/dm644x_ccdc.h | |||
@@ -38,17 +38,23 @@ enum ccdc_sample_line { | |||
38 | CCDC_SAMPLE_16LINES | 38 | CCDC_SAMPLE_16LINES |
39 | }; | 39 | }; |
40 | 40 | ||
41 | /* enum for Alaw gama width */ | 41 | /* enum for Alaw gamma width */ |
42 | enum ccdc_gama_width { | 42 | enum ccdc_gamma_width { |
43 | CCDC_GAMMA_BITS_15_6, | 43 | CCDC_GAMMA_BITS_15_6, /* use bits 15-6 for gamma */ |
44 | CCDC_GAMMA_BITS_14_5, | 44 | CCDC_GAMMA_BITS_14_5, |
45 | CCDC_GAMMA_BITS_13_4, | 45 | CCDC_GAMMA_BITS_13_4, |
46 | CCDC_GAMMA_BITS_12_3, | 46 | CCDC_GAMMA_BITS_12_3, |
47 | CCDC_GAMMA_BITS_11_2, | 47 | CCDC_GAMMA_BITS_11_2, |
48 | CCDC_GAMMA_BITS_10_1, | 48 | CCDC_GAMMA_BITS_10_1, |
49 | CCDC_GAMMA_BITS_09_0 | 49 | CCDC_GAMMA_BITS_09_0 /* use bits 9-0 for gamma */ |
50 | }; | 50 | }; |
51 | 51 | ||
52 | /* returns the highest bit used for the gamma */ | ||
53 | static inline u8 ccdc_gamma_width_max_bit(enum ccdc_gamma_width width) | ||
54 | { | ||
55 | return 15 - width; | ||
56 | } | ||
57 | |||
52 | enum ccdc_data_size { | 58 | enum ccdc_data_size { |
53 | CCDC_DATA_16BITS, | 59 | CCDC_DATA_16BITS, |
54 | CCDC_DATA_15BITS, | 60 | CCDC_DATA_15BITS, |
@@ -60,12 +66,18 @@ enum ccdc_data_size { | |||
60 | CCDC_DATA_8BITS | 66 | CCDC_DATA_8BITS |
61 | }; | 67 | }; |
62 | 68 | ||
69 | /* returns the highest bit used for this data size */ | ||
70 | static inline u8 ccdc_data_size_max_bit(enum ccdc_data_size sz) | ||
71 | { | ||
72 | return sz == CCDC_DATA_8BITS ? 7 : 15 - sz; | ||
73 | } | ||
74 | |||
63 | /* structure for ALaw */ | 75 | /* structure for ALaw */ |
64 | struct ccdc_a_law { | 76 | struct ccdc_a_law { |
65 | /* Enable/disable A-Law */ | 77 | /* Enable/disable A-Law */ |
66 | unsigned char enable; | 78 | unsigned char enable; |
67 | /* Gama Width Input */ | 79 | /* Gamma Width Input */ |
68 | enum ccdc_gama_width gama_wd; | 80 | enum ccdc_gamma_width gamma_wd; |
69 | }; | 81 | }; |
70 | 82 | ||
71 | /* structure for Black Clamping */ | 83 | /* structure for Black Clamping */ |
diff --git a/include/media/davinci/vpbe.h b/include/media/davinci/vpbe.h index a7ca4884c46c..57585c7004a4 100644 --- a/include/media/davinci/vpbe.h +++ b/include/media/davinci/vpbe.h | |||
@@ -132,7 +132,7 @@ struct vpbe_device_ops { | |||
132 | struct v4l2_enum_dv_timings *timings_info); | 132 | struct v4l2_enum_dv_timings *timings_info); |
133 | 133 | ||
134 | /* Set std at the output */ | 134 | /* Set std at the output */ |
135 | int (*s_std)(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id); | 135 | int (*s_std)(struct vpbe_device *vpbe_dev, v4l2_std_id std_id); |
136 | 136 | ||
137 | /* Get the current std at the output */ | 137 | /* Get the current std at the output */ |
138 | int (*g_std)(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id); | 138 | int (*g_std)(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id); |
diff --git a/include/media/davinci/vpbe_types.h b/include/media/davinci/vpbe_types.h index 9b85396514be..05dbe0ba514c 100644 --- a/include/media/davinci/vpbe_types.h +++ b/include/media/davinci/vpbe_types.h | |||
@@ -26,8 +26,7 @@ enum vpbe_version { | |||
26 | /* vpbe_timing_type - Timing types used in vpbe device */ | 26 | /* vpbe_timing_type - Timing types used in vpbe device */ |
27 | enum vpbe_enc_timings_type { | 27 | enum vpbe_enc_timings_type { |
28 | VPBE_ENC_STD = 0x1, | 28 | VPBE_ENC_STD = 0x1, |
29 | VPBE_ENC_DV_PRESET = 0x2, | 29 | VPBE_ENC_DV_TIMINGS = 0x4, |
30 | VPBE_ENC_CUSTOM_TIMINGS = 0x4, | ||
31 | /* Used when set timings through FB device interface */ | 30 | /* Used when set timings through FB device interface */ |
32 | VPBE_ENC_TIMINGS_INVALID = 0x8, | 31 | VPBE_ENC_TIMINGS_INVALID = 0x8, |
33 | }; | 32 | }; |
diff --git a/include/media/media-devnode.h b/include/media/media-devnode.h index f6caafc874cb..3446af279fca 100644 --- a/include/media/media-devnode.h +++ b/include/media/media-devnode.h | |||
@@ -46,6 +46,7 @@ struct media_file_operations { | |||
46 | ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *); | 46 | ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *); |
47 | unsigned int (*poll) (struct file *, struct poll_table_struct *); | 47 | unsigned int (*poll) (struct file *, struct poll_table_struct *); |
48 | long (*ioctl) (struct file *, unsigned int, unsigned long); | 48 | long (*ioctl) (struct file *, unsigned int, unsigned long); |
49 | long (*compat_ioctl) (struct file *, unsigned int, unsigned long); | ||
49 | int (*open) (struct file *); | 50 | int (*open) (struct file *); |
50 | int (*release) (struct file *); | 51 | int (*release) (struct file *); |
51 | }; | 52 | }; |
diff --git a/include/media/rc-core.h b/include/media/rc-core.h index f03445f3c767..06a75deff553 100644 --- a/include/media/rc-core.h +++ b/include/media/rc-core.h | |||
@@ -51,6 +51,7 @@ enum rc_driver_type { | |||
51 | * @driver_type: specifies if protocol decoding is done in hardware or software | 51 | * @driver_type: specifies if protocol decoding is done in hardware or software |
52 | * @idle: used to keep track of RX state | 52 | * @idle: used to keep track of RX state |
53 | * @allowed_protos: bitmask with the supported RC_BIT_* protocols | 53 | * @allowed_protos: bitmask with the supported RC_BIT_* protocols |
54 | * @enabled_protocols: bitmask with the enabled RC_BIT_* protocols | ||
54 | * @scanmask: some hardware decoders are not capable of providing the full | 55 | * @scanmask: some hardware decoders are not capable of providing the full |
55 | * scancode to the application. As this is a hardware limit, we can't do | 56 | * scancode to the application. As this is a hardware limit, we can't do |
56 | * anything with it. Yet, as the same keycode table can be used with other | 57 | * anything with it. Yet, as the same keycode table can be used with other |
@@ -99,6 +100,7 @@ struct rc_dev { | |||
99 | enum rc_driver_type driver_type; | 100 | enum rc_driver_type driver_type; |
100 | bool idle; | 101 | bool idle; |
101 | u64 allowed_protos; | 102 | u64 allowed_protos; |
103 | u64 enabled_protocols; | ||
102 | u32 scanmask; | 104 | u32 scanmask; |
103 | void *priv; | 105 | void *priv; |
104 | spinlock_t keylock; | 106 | spinlock_t keylock; |
diff --git a/include/media/s5p_fimc.h b/include/media/s5p_fimc.h index 28f3590aa031..2363aff24df7 100644 --- a/include/media/s5p_fimc.h +++ b/include/media/s5p_fimc.h | |||
@@ -13,6 +13,20 @@ | |||
13 | #define S5P_FIMC_H_ | 13 | #define S5P_FIMC_H_ |
14 | 14 | ||
15 | #include <media/media-entity.h> | 15 | #include <media/media-entity.h> |
16 | #include <media/v4l2-mediabus.h> | ||
17 | |||
18 | /* | ||
19 | * Enumeration of data inputs to the camera subsystem. | ||
20 | */ | ||
21 | enum fimc_input { | ||
22 | FIMC_INPUT_PARALLEL_0 = 1, | ||
23 | FIMC_INPUT_PARALLEL_1, | ||
24 | FIMC_INPUT_MIPI_CSI2_0 = 3, | ||
25 | FIMC_INPUT_MIPI_CSI2_1, | ||
26 | FIMC_INPUT_WRITEBACK_A = 5, | ||
27 | FIMC_INPUT_WRITEBACK_B, | ||
28 | FIMC_INPUT_WRITEBACK_ISP = 5, | ||
29 | }; | ||
16 | 30 | ||
17 | /* | 31 | /* |
18 | * Enumeration of the FIMC data bus types. | 32 | * Enumeration of the FIMC data bus types. |
@@ -32,6 +46,9 @@ enum fimc_bus_type { | |||
32 | FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B, | 46 | FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B, |
33 | }; | 47 | }; |
34 | 48 | ||
49 | #define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2) | ||
50 | #define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4) | ||
51 | |||
35 | struct i2c_board_info; | 52 | struct i2c_board_info; |
36 | 53 | ||
37 | /** | 54 | /** |
@@ -77,10 +94,44 @@ struct s5p_platform_fimc { | |||
77 | */ | 94 | */ |
78 | #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0) | 95 | #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0) |
79 | 96 | ||
97 | #define FIMC_MAX_PLANES 3 | ||
98 | |||
99 | /** | ||
100 | * struct fimc_fmt - color format data structure | ||
101 | * @mbus_code: media bus pixel code, -1 if not applicable | ||
102 | * @name: format description | ||
103 | * @fourcc: fourcc code for this format, 0 if not applicable | ||
104 | * @color: the driver's private color format id | ||
105 | * @memplanes: number of physically non-contiguous data planes | ||
106 | * @colplanes: number of physically contiguous data planes | ||
107 | * @depth: per plane driver's private 'number of bits per pixel' | ||
108 | * @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no) | ||
109 | * @flags: flags indicating which operation mode format applies to | ||
110 | */ | ||
111 | struct fimc_fmt { | ||
112 | enum v4l2_mbus_pixelcode mbus_code; | ||
113 | char *name; | ||
114 | u32 fourcc; | ||
115 | u32 color; | ||
116 | u16 memplanes; | ||
117 | u16 colplanes; | ||
118 | u8 depth[FIMC_MAX_PLANES]; | ||
119 | u16 mdataplanes; | ||
120 | u16 flags; | ||
121 | #define FMT_FLAGS_CAM (1 << 0) | ||
122 | #define FMT_FLAGS_M2M_IN (1 << 1) | ||
123 | #define FMT_FLAGS_M2M_OUT (1 << 2) | ||
124 | #define FMT_FLAGS_M2M (1 << 1 | 1 << 2) | ||
125 | #define FMT_HAS_ALPHA (1 << 3) | ||
126 | #define FMT_FLAGS_COMPRESSED (1 << 4) | ||
127 | #define FMT_FLAGS_WRITEBACK (1 << 5) | ||
128 | }; | ||
129 | |||
80 | enum fimc_subdev_index { | 130 | enum fimc_subdev_index { |
81 | IDX_SENSOR, | 131 | IDX_SENSOR, |
82 | IDX_CSIS, | 132 | IDX_CSIS, |
83 | IDX_FLITE, | 133 | IDX_FLITE, |
134 | IDX_IS_ISP, | ||
84 | IDX_FIMC, | 135 | IDX_FIMC, |
85 | IDX_MAX, | 136 | IDX_MAX, |
86 | }; | 137 | }; |
diff --git a/include/media/saa7115.h b/include/media/saa7115.h index bab212719591..407918625c80 100644 --- a/include/media/saa7115.h +++ b/include/media/saa7115.h | |||
@@ -21,6 +21,8 @@ | |||
21 | #ifndef _SAA7115_H_ | 21 | #ifndef _SAA7115_H_ |
22 | #define _SAA7115_H_ | 22 | #define _SAA7115_H_ |
23 | 23 | ||
24 | /* s_routing inputs, outputs, and config */ | ||
25 | |||
24 | /* SAA7111/3/4/5 HW inputs */ | 26 | /* SAA7111/3/4/5 HW inputs */ |
25 | #define SAA7115_COMPOSITE0 0 | 27 | #define SAA7115_COMPOSITE0 0 |
26 | #define SAA7115_COMPOSITE1 1 | 28 | #define SAA7115_COMPOSITE1 1 |
@@ -33,24 +35,34 @@ | |||
33 | #define SAA7115_SVIDEO2 8 | 35 | #define SAA7115_SVIDEO2 8 |
34 | #define SAA7115_SVIDEO3 9 | 36 | #define SAA7115_SVIDEO3 9 |
35 | 37 | ||
36 | /* SAA7115 v4l2_crystal_freq frequency values */ | 38 | /* outputs */ |
37 | #define SAA7115_FREQ_32_11_MHZ 32110000 /* 32.11 MHz crystal, SAA7114/5 only */ | ||
38 | #define SAA7115_FREQ_24_576_MHZ 24576000 /* 24.576 MHz crystal */ | ||
39 | |||
40 | /* SAA7115 v4l2_crystal_freq audio clock control flags */ | ||
41 | #define SAA7115_FREQ_FL_UCGC (1 << 0) /* SA 3A[7], UCGC, SAA7115 only */ | ||
42 | #define SAA7115_FREQ_FL_CGCDIV (1 << 1) /* SA 3A[6], CGCDIV, SAA7115 only */ | ||
43 | #define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */ | ||
44 | |||
45 | #define SAA7115_IPORT_ON 1 | 39 | #define SAA7115_IPORT_ON 1 |
46 | #define SAA7115_IPORT_OFF 0 | 40 | #define SAA7115_IPORT_OFF 0 |
47 | 41 | ||
48 | /* SAA7111 specific output flags */ | 42 | /* SAA7111 specific outputs. */ |
49 | #define SAA7111_VBI_BYPASS 2 | 43 | #define SAA7111_VBI_BYPASS 2 |
50 | #define SAA7111_FMT_YUV422 0x00 | 44 | #define SAA7111_FMT_YUV422 0x00 |
51 | #define SAA7111_FMT_RGB 0x40 | 45 | #define SAA7111_FMT_RGB 0x40 |
52 | #define SAA7111_FMT_CCIR 0x80 | 46 | #define SAA7111_FMT_CCIR 0x80 |
53 | #define SAA7111_FMT_YUV411 0xc0 | 47 | #define SAA7111_FMT_YUV411 0xc0 |
54 | 48 | ||
49 | /* config flags */ | ||
50 | /* Register 0x85 should set bit 0 to 0 (it's 1 by default). This bit | ||
51 | * controls the IDQ signal polarity which is set to 'inverted' if the bit | ||
52 | * it 1 and to 'default' if it is 0. */ | ||
53 | #define SAA7115_IDQ_IS_DEFAULT (1 << 0) | ||
54 | |||
55 | /* s_crystal_freq values and flags */ | ||
56 | |||
57 | /* SAA7115 v4l2_crystal_freq frequency values */ | ||
58 | #define SAA7115_FREQ_32_11_MHZ 32110000 /* 32.11 MHz crystal, SAA7114/5 only */ | ||
59 | #define SAA7115_FREQ_24_576_MHZ 24576000 /* 24.576 MHz crystal */ | ||
60 | |||
61 | /* SAA7115 v4l2_crystal_freq audio clock control flags */ | ||
62 | #define SAA7115_FREQ_FL_UCGC (1 << 0) /* SA 3A[7], UCGC, SAA7115 only */ | ||
63 | #define SAA7115_FREQ_FL_CGCDIV (1 << 1) /* SA 3A[6], CGCDIV, SAA7115 only */ | ||
64 | #define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */ | ||
65 | #define SAA7115_FREQ_FL_DOUBLE_ASCLK (1 << 3) /* SA 39, LRDIV, SAA7114/5 only */ | ||
66 | |||
55 | #endif | 67 | #endif |
56 | 68 | ||
diff --git a/include/media/si476x.h b/include/media/si476x.h new file mode 100644 index 000000000000..beb6433d6958 --- /dev/null +++ b/include/media/si476x.h | |||
@@ -0,0 +1,426 @@ | |||
1 | /* | ||
2 | * include/media/si476x.h -- Common definitions for si476x driver | ||
3 | * | ||
4 | * Copyright (C) 2012 Innovative Converged Devices(ICD) | ||
5 | * Copyright (C) 2013 Andrey Smirnov | ||
6 | * | ||
7 | * Author: Andrey Smirnov <andrew.smirnov@gmail.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; version 2 of the License. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, but | ||
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
16 | * General Public License for more details. | ||
17 | * | ||
18 | */ | ||
19 | |||
20 | #ifndef SI476X_H | ||
21 | #define SI476X_H | ||
22 | |||
23 | #include <linux/types.h> | ||
24 | #include <linux/videodev2.h> | ||
25 | |||
26 | struct si476x_device; | ||
27 | |||
28 | /* It is possible to select one of the four adresses using pins A0 | ||
29 | * and A1 on SI476x */ | ||
30 | #define SI476X_I2C_ADDR_1 0x60 | ||
31 | #define SI476X_I2C_ADDR_2 0x61 | ||
32 | #define SI476X_I2C_ADDR_3 0x62 | ||
33 | #define SI476X_I2C_ADDR_4 0x63 | ||
34 | |||
35 | enum si476x_iqclk_config { | ||
36 | SI476X_IQCLK_NOOP = 0, | ||
37 | SI476X_IQCLK_TRISTATE = 1, | ||
38 | SI476X_IQCLK_IQ = 21, | ||
39 | }; | ||
40 | enum si476x_iqfs_config { | ||
41 | SI476X_IQFS_NOOP = 0, | ||
42 | SI476X_IQFS_TRISTATE = 1, | ||
43 | SI476X_IQFS_IQ = 21, | ||
44 | }; | ||
45 | enum si476x_iout_config { | ||
46 | SI476X_IOUT_NOOP = 0, | ||
47 | SI476X_IOUT_TRISTATE = 1, | ||
48 | SI476X_IOUT_OUTPUT = 22, | ||
49 | }; | ||
50 | enum si476x_qout_config { | ||
51 | SI476X_QOUT_NOOP = 0, | ||
52 | SI476X_QOUT_TRISTATE = 1, | ||
53 | SI476X_QOUT_OUTPUT = 22, | ||
54 | }; | ||
55 | |||
56 | enum si476x_dclk_config { | ||
57 | SI476X_DCLK_NOOP = 0, | ||
58 | SI476X_DCLK_TRISTATE = 1, | ||
59 | SI476X_DCLK_DAUDIO = 10, | ||
60 | }; | ||
61 | |||
62 | enum si476x_dfs_config { | ||
63 | SI476X_DFS_NOOP = 0, | ||
64 | SI476X_DFS_TRISTATE = 1, | ||
65 | SI476X_DFS_DAUDIO = 10, | ||
66 | }; | ||
67 | |||
68 | enum si476x_dout_config { | ||
69 | SI476X_DOUT_NOOP = 0, | ||
70 | SI476X_DOUT_TRISTATE = 1, | ||
71 | SI476X_DOUT_I2S_OUTPUT = 12, | ||
72 | SI476X_DOUT_I2S_INPUT = 13, | ||
73 | }; | ||
74 | |||
75 | enum si476x_xout_config { | ||
76 | SI476X_XOUT_NOOP = 0, | ||
77 | SI476X_XOUT_TRISTATE = 1, | ||
78 | SI476X_XOUT_I2S_INPUT = 13, | ||
79 | SI476X_XOUT_MODE_SELECT = 23, | ||
80 | }; | ||
81 | |||
82 | |||
83 | enum si476x_icin_config { | ||
84 | SI476X_ICIN_NOOP = 0, | ||
85 | SI476X_ICIN_TRISTATE = 1, | ||
86 | SI476X_ICIN_GPO1_HIGH = 2, | ||
87 | SI476X_ICIN_GPO1_LOW = 3, | ||
88 | SI476X_ICIN_IC_LINK = 30, | ||
89 | }; | ||
90 | |||
91 | enum si476x_icip_config { | ||
92 | SI476X_ICIP_NOOP = 0, | ||
93 | SI476X_ICIP_TRISTATE = 1, | ||
94 | SI476X_ICIP_GPO2_HIGH = 2, | ||
95 | SI476X_ICIP_GPO2_LOW = 3, | ||
96 | SI476X_ICIP_IC_LINK = 30, | ||
97 | }; | ||
98 | |||
99 | enum si476x_icon_config { | ||
100 | SI476X_ICON_NOOP = 0, | ||
101 | SI476X_ICON_TRISTATE = 1, | ||
102 | SI476X_ICON_I2S = 10, | ||
103 | SI476X_ICON_IC_LINK = 30, | ||
104 | }; | ||
105 | |||
106 | enum si476x_icop_config { | ||
107 | SI476X_ICOP_NOOP = 0, | ||
108 | SI476X_ICOP_TRISTATE = 1, | ||
109 | SI476X_ICOP_I2S = 10, | ||
110 | SI476X_ICOP_IC_LINK = 30, | ||
111 | }; | ||
112 | |||
113 | |||
114 | enum si476x_lrout_config { | ||
115 | SI476X_LROUT_NOOP = 0, | ||
116 | SI476X_LROUT_TRISTATE = 1, | ||
117 | SI476X_LROUT_AUDIO = 2, | ||
118 | SI476X_LROUT_MPX = 3, | ||
119 | }; | ||
120 | |||
121 | |||
122 | enum si476x_intb_config { | ||
123 | SI476X_INTB_NOOP = 0, | ||
124 | SI476X_INTB_TRISTATE = 1, | ||
125 | SI476X_INTB_DAUDIO = 10, | ||
126 | SI476X_INTB_IRQ = 40, | ||
127 | }; | ||
128 | |||
129 | enum si476x_a1_config { | ||
130 | SI476X_A1_NOOP = 0, | ||
131 | SI476X_A1_TRISTATE = 1, | ||
132 | SI476X_A1_IRQ = 40, | ||
133 | }; | ||
134 | |||
135 | enum si476x_part_revisions { | ||
136 | SI476X_REVISION_A10 = 0, | ||
137 | SI476X_REVISION_A20 = 1, | ||
138 | SI476X_REVISION_A30 = 2, | ||
139 | }; | ||
140 | |||
141 | struct si476x_pinmux { | ||
142 | enum si476x_dclk_config dclk; | ||
143 | enum si476x_dfs_config dfs; | ||
144 | enum si476x_dout_config dout; | ||
145 | enum si476x_xout_config xout; | ||
146 | |||
147 | enum si476x_iqclk_config iqclk; | ||
148 | enum si476x_iqfs_config iqfs; | ||
149 | enum si476x_iout_config iout; | ||
150 | enum si476x_qout_config qout; | ||
151 | |||
152 | enum si476x_icin_config icin; | ||
153 | enum si476x_icip_config icip; | ||
154 | enum si476x_icon_config icon; | ||
155 | enum si476x_icop_config icop; | ||
156 | |||
157 | enum si476x_lrout_config lrout; | ||
158 | |||
159 | enum si476x_intb_config intb; | ||
160 | enum si476x_a1_config a1; | ||
161 | }; | ||
162 | |||
163 | /** | ||
164 | * enum si476x_phase_diversity_mode - possbile phase diversity modes | ||
165 | * for SI4764/5/6/7 chips. | ||
166 | * | ||
167 | * @SI476X_PHDIV_DISABLED: Phase diversity feature is | ||
168 | * disabled. | ||
169 | * @SI476X_PHDIV_PRIMARY_COMBINING: Tuner works as a primary tuner | ||
170 | * in combination with a | ||
171 | * secondary one. | ||
172 | * @SI476X_PHDIV_PRIMARY_ANTENNA: Tuner works as a primary tuner | ||
173 | * using only its own antenna. | ||
174 | * @SI476X_PHDIV_SECONDARY_ANTENNA: Tuner works as a primary tuner | ||
175 | * usning seconary tuner's antenna. | ||
176 | * @SI476X_PHDIV_SECONDARY_COMBINING: Tuner works as a secondary | ||
177 | * tuner in combination with the | ||
178 | * primary one. | ||
179 | */ | ||
180 | enum si476x_phase_diversity_mode { | ||
181 | SI476X_PHDIV_DISABLED = 0, | ||
182 | SI476X_PHDIV_PRIMARY_COMBINING = 1, | ||
183 | SI476X_PHDIV_PRIMARY_ANTENNA = 2, | ||
184 | SI476X_PHDIV_SECONDARY_ANTENNA = 3, | ||
185 | SI476X_PHDIV_SECONDARY_COMBINING = 5, | ||
186 | }; | ||
187 | |||
188 | enum si476x_ibias6x { | ||
189 | SI476X_IBIAS6X_OTHER = 0, | ||
190 | SI476X_IBIAS6X_RCVR1_NON_4MHZ_CLK = 1, | ||
191 | }; | ||
192 | |||
193 | enum si476x_xstart { | ||
194 | SI476X_XSTART_MULTIPLE_TUNER = 0x11, | ||
195 | SI476X_XSTART_NORMAL = 0x77, | ||
196 | }; | ||
197 | |||
198 | enum si476x_freq { | ||
199 | SI476X_FREQ_4_MHZ = 0, | ||
200 | SI476X_FREQ_37P209375_MHZ = 1, | ||
201 | SI476X_FREQ_36P4_MHZ = 2, | ||
202 | SI476X_FREQ_37P8_MHZ = 3, | ||
203 | }; | ||
204 | |||
205 | enum si476x_xmode { | ||
206 | SI476X_XMODE_CRYSTAL_RCVR1 = 1, | ||
207 | SI476X_XMODE_EXT_CLOCK = 2, | ||
208 | SI476X_XMODE_CRYSTAL_RCVR2_3 = 3, | ||
209 | }; | ||
210 | |||
211 | enum si476x_xbiashc { | ||
212 | SI476X_XBIASHC_SINGLE_RECEIVER = 0, | ||
213 | SI476X_XBIASHC_MULTIPLE_RECEIVER = 1, | ||
214 | }; | ||
215 | |||
216 | enum si476x_xbias { | ||
217 | SI476X_XBIAS_RCVR2_3 = 0, | ||
218 | SI476X_XBIAS_4MHZ_RCVR1 = 3, | ||
219 | SI476X_XBIAS_RCVR1 = 7, | ||
220 | }; | ||
221 | |||
222 | enum si476x_func { | ||
223 | SI476X_FUNC_BOOTLOADER = 0, | ||
224 | SI476X_FUNC_FM_RECEIVER = 1, | ||
225 | SI476X_FUNC_AM_RECEIVER = 2, | ||
226 | SI476X_FUNC_WB_RECEIVER = 3, | ||
227 | }; | ||
228 | |||
229 | |||
230 | /** | ||
231 | * @xcload: Selects the amount of additional on-chip capacitance to | ||
232 | * be connected between XTAL1 and gnd and between XTAL2 and | ||
233 | * GND. One half of the capacitance value shown here is the | ||
234 | * additional load capacitance presented to the xtal. The | ||
235 | * minimum step size is 0.277 pF. Recommended value is 0x28 | ||
236 | * but it will be layout dependent. Range is 0–0x3F i.e. | ||
237 | * (0–16.33 pF) | ||
238 | * @ctsien: enable CTSINT(interrupt request when CTS condition | ||
239 | * arises) when set | ||
240 | * @intsel: when set A1 pin becomes the interrupt pin; otherwise, | ||
241 | * INTB is the interrupt pin | ||
242 | * @func: selects the boot function of the device. I.e. | ||
243 | * SI476X_BOOTLOADER - Boot loader | ||
244 | * SI476X_FM_RECEIVER - FM receiver | ||
245 | * SI476X_AM_RECEIVER - AM receiver | ||
246 | * SI476X_WB_RECEIVER - Weatherband receiver | ||
247 | * @freq: oscillator's crystal frequency: | ||
248 | * SI476X_XTAL_37P209375_MHZ - 37.209375 Mhz | ||
249 | * SI476X_XTAL_36P4_MHZ - 36.4 Mhz | ||
250 | * SI476X_XTAL_37P8_MHZ - 37.8 Mhz | ||
251 | */ | ||
252 | struct si476x_power_up_args { | ||
253 | enum si476x_ibias6x ibias6x; | ||
254 | enum si476x_xstart xstart; | ||
255 | u8 xcload; | ||
256 | bool fastboot; | ||
257 | enum si476x_xbiashc xbiashc; | ||
258 | enum si476x_xbias xbias; | ||
259 | enum si476x_func func; | ||
260 | enum si476x_freq freq; | ||
261 | enum si476x_xmode xmode; | ||
262 | }; | ||
263 | |||
264 | |||
265 | enum si476x_ctrl_id { | ||
266 | V4L2_CID_SI476X_RSSI_THRESHOLD = (V4L2_CID_USER_SI476X_BASE + 1), | ||
267 | V4L2_CID_SI476X_SNR_THRESHOLD = (V4L2_CID_USER_SI476X_BASE + 2), | ||
268 | V4L2_CID_SI476X_MAX_TUNE_ERROR = (V4L2_CID_USER_SI476X_BASE + 3), | ||
269 | V4L2_CID_SI476X_HARMONICS_COUNT = (V4L2_CID_USER_SI476X_BASE + 4), | ||
270 | V4L2_CID_SI476X_DIVERSITY_MODE = (V4L2_CID_USER_SI476X_BASE + 5), | ||
271 | V4L2_CID_SI476X_INTERCHIP_LINK = (V4L2_CID_USER_SI476X_BASE + 6), | ||
272 | }; | ||
273 | |||
274 | /* | ||
275 | * Platform dependent definition | ||
276 | */ | ||
277 | struct si476x_platform_data { | ||
278 | int gpio_reset; /* < 0 if not used */ | ||
279 | |||
280 | struct si476x_power_up_args power_up_parameters; | ||
281 | enum si476x_phase_diversity_mode diversity_mode; | ||
282 | |||
283 | struct si476x_pinmux pinmux; | ||
284 | }; | ||
285 | |||
286 | /** | ||
287 | * struct si476x_rsq_status - structure containing received signal | ||
288 | * quality | ||
289 | * @multhint: Multipath Detect High. | ||
290 | * true - Indicatedes that the value is below | ||
291 | * FM_RSQ_MULTIPATH_HIGH_THRESHOLD | ||
292 | * false - Indicatedes that the value is above | ||
293 | * FM_RSQ_MULTIPATH_HIGH_THRESHOLD | ||
294 | * @multlint: Multipath Detect Low. | ||
295 | * true - Indicatedes that the value is below | ||
296 | * FM_RSQ_MULTIPATH_LOW_THRESHOLD | ||
297 | * false - Indicatedes that the value is above | ||
298 | * FM_RSQ_MULTIPATH_LOW_THRESHOLD | ||
299 | * @snrhint: SNR Detect High. | ||
300 | * true - Indicatedes that the value is below | ||
301 | * FM_RSQ_SNR_HIGH_THRESHOLD | ||
302 | * false - Indicatedes that the value is above | ||
303 | * FM_RSQ_SNR_HIGH_THRESHOLD | ||
304 | * @snrlint: SNR Detect Low. | ||
305 | * true - Indicatedes that the value is below | ||
306 | * FM_RSQ_SNR_LOW_THRESHOLD | ||
307 | * false - Indicatedes that the value is above | ||
308 | * FM_RSQ_SNR_LOW_THRESHOLD | ||
309 | * @rssihint: RSSI Detect High. | ||
310 | * true - Indicatedes that the value is below | ||
311 | * FM_RSQ_RSSI_HIGH_THRESHOLD | ||
312 | * false - Indicatedes that the value is above | ||
313 | * FM_RSQ_RSSI_HIGH_THRESHOLD | ||
314 | * @rssilint: RSSI Detect Low. | ||
315 | * true - Indicatedes that the value is below | ||
316 | * FM_RSQ_RSSI_LOW_THRESHOLD | ||
317 | * false - Indicatedes that the value is above | ||
318 | * FM_RSQ_RSSI_LOW_THRESHOLD | ||
319 | * @bltf: Band Limit. | ||
320 | * Set if seek command hits the band limit or wrapped to | ||
321 | * the original frequency. | ||
322 | * @snr_ready: SNR measurement in progress. | ||
323 | * @rssiready: RSSI measurement in progress. | ||
324 | * @afcrl: Set if FREQOFF >= MAX_TUNE_ERROR | ||
325 | * @valid: Set if the channel is valid | ||
326 | * rssi < FM_VALID_RSSI_THRESHOLD | ||
327 | * snr < FM_VALID_SNR_THRESHOLD | ||
328 | * tune_error < FM_VALID_MAX_TUNE_ERROR | ||
329 | * @readfreq: Current tuned frequency. | ||
330 | * @freqoff: Signed frequency offset. | ||
331 | * @rssi: Received Signal Strength Indicator(dBuV). | ||
332 | * @snr: RF SNR Indicator(dB). | ||
333 | * @lassi: | ||
334 | * @hassi: Low/High side Adjacent(100 kHz) Channel Strength Indicator | ||
335 | * @mult: Multipath indicator | ||
336 | * @dev: Who knows? But values may vary. | ||
337 | * @readantcap: Antenna tuning capacity value. | ||
338 | * @assi: Adjacent Channel(+/- 200kHz) Strength Indicator | ||
339 | * @usn: Ultrasonic Noise Inticator in -DBFS | ||
340 | */ | ||
341 | struct si476x_rsq_status_report { | ||
342 | __u8 multhint, multlint; | ||
343 | __u8 snrhint, snrlint; | ||
344 | __u8 rssihint, rssilint; | ||
345 | __u8 bltf; | ||
346 | __u8 snr_ready; | ||
347 | __u8 rssiready; | ||
348 | __u8 injside; | ||
349 | __u8 afcrl; | ||
350 | __u8 valid; | ||
351 | |||
352 | __u16 readfreq; | ||
353 | __s8 freqoff; | ||
354 | __s8 rssi; | ||
355 | __s8 snr; | ||
356 | __s8 issi; | ||
357 | __s8 lassi, hassi; | ||
358 | __s8 mult; | ||
359 | __u8 dev; | ||
360 | __u16 readantcap; | ||
361 | __s8 assi; | ||
362 | __s8 usn; | ||
363 | |||
364 | __u8 pilotdev; | ||
365 | __u8 rdsdev; | ||
366 | __u8 assidev; | ||
367 | __u8 strongdev; | ||
368 | __u16 rdspi; | ||
369 | } __packed; | ||
370 | |||
371 | /** | ||
372 | * si476x_acf_status_report - ACF report results | ||
373 | * | ||
374 | * @blend_int: If set, indicates that stereo separation has crossed | ||
375 | * below the blend threshold as set by FM_ACF_BLEND_THRESHOLD | ||
376 | * @hblend_int: If set, indicates that HiBlend cutoff frequency is | ||
377 | * lower than threshold as set by FM_ACF_HBLEND_THRESHOLD | ||
378 | * @hicut_int: If set, indicates that HiCut cutoff frequency is lower | ||
379 | * than the threshold set by ACF_ | ||
380 | |||
381 | */ | ||
382 | struct si476x_acf_status_report { | ||
383 | __u8 blend_int; | ||
384 | __u8 hblend_int; | ||
385 | __u8 hicut_int; | ||
386 | __u8 chbw_int; | ||
387 | __u8 softmute_int; | ||
388 | __u8 smute; | ||
389 | __u8 smattn; | ||
390 | __u8 chbw; | ||
391 | __u8 hicut; | ||
392 | __u8 hiblend; | ||
393 | __u8 pilot; | ||
394 | __u8 stblend; | ||
395 | } __packed; | ||
396 | |||
397 | enum si476x_fmagc { | ||
398 | SI476X_FMAGC_10K_OHM = 0, | ||
399 | SI476X_FMAGC_800_OHM = 1, | ||
400 | SI476X_FMAGC_400_OHM = 2, | ||
401 | SI476X_FMAGC_200_OHM = 4, | ||
402 | SI476X_FMAGC_100_OHM = 8, | ||
403 | SI476X_FMAGC_50_OHM = 16, | ||
404 | SI476X_FMAGC_25_OHM = 32, | ||
405 | SI476X_FMAGC_12P5_OHM = 64, | ||
406 | SI476X_FMAGC_6P25_OHM = 128, | ||
407 | }; | ||
408 | |||
409 | struct si476x_agc_status_report { | ||
410 | __u8 mxhi; | ||
411 | __u8 mxlo; | ||
412 | __u8 lnahi; | ||
413 | __u8 lnalo; | ||
414 | __u8 fmagc1; | ||
415 | __u8 fmagc2; | ||
416 | __u8 pgagain; | ||
417 | __u8 fmwblang; | ||
418 | } __packed; | ||
419 | |||
420 | struct si476x_rds_blockcount_report { | ||
421 | __u16 expected; | ||
422 | __u16 received; | ||
423 | __u16 uncorrectable; | ||
424 | } __packed; | ||
425 | |||
426 | #endif /* SI476X_H*/ | ||
diff --git a/include/media/ths7303.h b/include/media/ths7303.h new file mode 100644 index 000000000000..980ec51d574d --- /dev/null +++ b/include/media/ths7303.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2013 Texas Instruments Inc | ||
3 | * | ||
4 | * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. | ||
5 | * | ||
6 | * Contributors: | ||
7 | * Hans Verkuil <hans.verkuil@cisco.com> | ||
8 | * Lad, Prabhakar <prabhakar.lad@ti.com> | ||
9 | * Martin Bugge <marbugge@cisco.com> | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or | ||
12 | * modify it under the terms of the GNU General Public License as | ||
13 | * published by the Free Software Foundation version 2. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | */ | ||
24 | |||
25 | #ifndef THS7353_H | ||
26 | #define THS7353_H | ||
27 | |||
28 | /** | ||
29 | * struct ths7303_platform_data - Platform dependent data | ||
30 | * @ch_1: Bias value for channel one. | ||
31 | * @ch_2: Bias value for channel two. | ||
32 | * @ch_3: Bias value for channel three. | ||
33 | * @init_enable: initalize on init. | ||
34 | */ | ||
35 | struct ths7303_platform_data { | ||
36 | u8 ch_1; | ||
37 | u8 ch_2; | ||
38 | u8 ch_3; | ||
39 | u8 init_enable; | ||
40 | }; | ||
41 | |||
42 | #endif | ||
diff --git a/include/media/tuner.h b/include/media/tuner.h index 926aff9bdf65..24eaafe461bd 100644 --- a/include/media/tuner.h +++ b/include/media/tuner.h | |||
@@ -138,6 +138,10 @@ | |||
138 | #define TUNER_XC4000 87 /* Xceive Silicon Tuner */ | 138 | #define TUNER_XC4000 87 /* Xceive Silicon Tuner */ |
139 | #define TUNER_XC5000C 88 /* Xceive Silicon Tuner */ | 139 | #define TUNER_XC5000C 88 /* Xceive Silicon Tuner */ |
140 | 140 | ||
141 | #define TUNER_SONY_BTF_PG472Z 89 /* PAL+SECAM */ | ||
142 | #define TUNER_SONY_BTF_PK467Z 90 /* NTSC_JP */ | ||
143 | #define TUNER_SONY_BTF_PB463Z 91 /* NTSC */ | ||
144 | |||
141 | /* tv card specific */ | 145 | /* tv card specific */ |
142 | #define TDA9887_PRESENT (1<<0) | 146 | #define TDA9887_PRESENT (1<<0) |
143 | #define TDA9887_PORT1_INACTIVE (1<<1) | 147 | #define TDA9887_PORT1_INACTIVE (1<<1) |
diff --git a/include/media/uda1342.h b/include/media/uda1342.h new file mode 100644 index 000000000000..cd156403a368 --- /dev/null +++ b/include/media/uda1342.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * uda1342.h - definition for uda1342 inputs | ||
3 | * | ||
4 | * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you may redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; version 2 of the License. | ||
9 | * | ||
10 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
11 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
12 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
13 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
14 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
15 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
16 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
17 | * SOFTWARE. | ||
18 | * | ||
19 | */ | ||
20 | |||
21 | #ifndef _UDA1342_H_ | ||
22 | #define _UDA1342_H_ | ||
23 | |||
24 | /* The UDA1342 has 2 inputs */ | ||
25 | |||
26 | #define UDA1342_IN1 1 | ||
27 | #define UDA1342_IN2 2 | ||
28 | |||
29 | #endif | ||
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h index 4ee125bae719..c259b36bf1e9 100644 --- a/include/media/v4l2-chip-ident.h +++ b/include/media/v4l2-chip-ident.h | |||
@@ -96,12 +96,20 @@ enum { | |||
96 | /* module au0828 */ | 96 | /* module au0828 */ |
97 | V4L2_IDENT_AU0828 = 828, | 97 | V4L2_IDENT_AU0828 = 828, |
98 | 98 | ||
99 | /* module bttv: ident 848 + 849 */ | ||
100 | V4L2_IDENT_BT848 = 848, | ||
101 | V4L2_IDENT_BT849 = 849, | ||
102 | |||
99 | /* module bt856: just ident 856 */ | 103 | /* module bt856: just ident 856 */ |
100 | V4L2_IDENT_BT856 = 856, | 104 | V4L2_IDENT_BT856 = 856, |
101 | 105 | ||
102 | /* module bt866: just ident 866 */ | 106 | /* module bt866: just ident 866 */ |
103 | V4L2_IDENT_BT866 = 866, | 107 | V4L2_IDENT_BT866 = 866, |
104 | 108 | ||
109 | /* module bttv: ident 878 + 879 */ | ||
110 | V4L2_IDENT_BT878 = 878, | ||
111 | V4L2_IDENT_BT879 = 879, | ||
112 | |||
105 | /* module ks0127: reserved range 1120-1129 */ | 113 | /* module ks0127: reserved range 1120-1129 */ |
106 | V4L2_IDENT_KS0122S = 1122, | 114 | V4L2_IDENT_KS0122S = 1122, |
107 | V4L2_IDENT_KS0127 = 1127, | 115 | V4L2_IDENT_KS0127 = 1127, |
@@ -180,6 +188,9 @@ enum { | |||
180 | /* module adv7343: just ident 7343 */ | 188 | /* module adv7343: just ident 7343 */ |
181 | V4L2_IDENT_ADV7343 = 7343, | 189 | V4L2_IDENT_ADV7343 = 7343, |
182 | 190 | ||
191 | /* module ths7353: just ident 7353 */ | ||
192 | V4L2_IDENT_THS7353 = 7353, | ||
193 | |||
183 | /* module adv7393: just ident 7393 */ | 194 | /* module adv7393: just ident 7393 */ |
184 | V4L2_IDENT_ADV7393 = 7393, | 195 | V4L2_IDENT_ADV7393 = 7393, |
185 | 196 | ||
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h index ec7c9c00b256..1d93c48cb371 100644 --- a/include/media/v4l2-common.h +++ b/include/media/v4l2-common.h | |||
@@ -201,7 +201,6 @@ void v4l_bound_align_image(unsigned int *w, unsigned int wmin, | |||
201 | unsigned int *h, unsigned int hmin, | 201 | unsigned int *h, unsigned int hmin, |
202 | unsigned int hmax, unsigned int halign, | 202 | unsigned int hmax, unsigned int halign, |
203 | unsigned int salign); | 203 | unsigned int salign); |
204 | int v4l_fill_dv_preset_info(u32 preset, struct v4l2_dv_enum_preset *info); | ||
205 | 204 | ||
206 | struct v4l2_discrete_probe { | 205 | struct v4l2_discrete_probe { |
207 | const struct v4l2_frmsize_discrete *sizes; | 206 | const struct v4l2_frmsize_discrete *sizes; |
diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h index f00d42bc01a6..7343a27fe819 100644 --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h | |||
@@ -259,7 +259,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, | |||
259 | s32 *min, s32 *max, s32 *step, s32 *def, u32 *flags); | 259 | s32 *min, s32 *max, s32 *step, s32 *def, u32 *flags); |
260 | 260 | ||
261 | 261 | ||
262 | /** v4l2_ctrl_handler_init() - Initialize the control handler. | 262 | /** v4l2_ctrl_handler_init_class() - Initialize the control handler. |
263 | * @hdl: The control handler. | 263 | * @hdl: The control handler. |
264 | * @nr_of_controls_hint: A hint of how many controls this handler is | 264 | * @nr_of_controls_hint: A hint of how many controls this handler is |
265 | * expected to refer to. This is the total number, so including | 265 | * expected to refer to. This is the total number, so including |
@@ -268,12 +268,35 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, | |||
268 | * are allocated) or the control lookup becomes slower (not enough | 268 | * are allocated) or the control lookup becomes slower (not enough |
269 | * buckets are allocated, so there are more slow list lookups). | 269 | * buckets are allocated, so there are more slow list lookups). |
270 | * It will always work, though. | 270 | * It will always work, though. |
271 | * @key: Used by the lock validator if CONFIG_LOCKDEP is set. | ||
272 | * @name: Used by the lock validator if CONFIG_LOCKDEP is set. | ||
271 | * | 273 | * |
272 | * Returns an error if the buckets could not be allocated. This error will | 274 | * Returns an error if the buckets could not be allocated. This error will |
273 | * also be stored in @hdl->error. | 275 | * also be stored in @hdl->error. |
276 | * | ||
277 | * Never use this call directly, always use the v4l2_ctrl_handler_init | ||
278 | * macro that hides the @key and @name arguments. | ||
274 | */ | 279 | */ |
275 | int v4l2_ctrl_handler_init(struct v4l2_ctrl_handler *hdl, | 280 | int v4l2_ctrl_handler_init_class(struct v4l2_ctrl_handler *hdl, |
276 | unsigned nr_of_controls_hint); | 281 | unsigned nr_of_controls_hint, |
282 | struct lock_class_key *key, const char *name); | ||
283 | |||
284 | #ifdef CONFIG_LOCKDEP | ||
285 | #define v4l2_ctrl_handler_init(hdl, nr_of_controls_hint) \ | ||
286 | ( \ | ||
287 | ({ \ | ||
288 | static struct lock_class_key _key; \ | ||
289 | v4l2_ctrl_handler_init_class(hdl, nr_of_controls_hint, \ | ||
290 | &_key, \ | ||
291 | KBUILD_BASENAME ":" \ | ||
292 | __stringify(__LINE__) ":" \ | ||
293 | "(" #hdl ")->_lock"); \ | ||
294 | }) \ | ||
295 | ) | ||
296 | #else | ||
297 | #define v4l2_ctrl_handler_init(hdl, nr_of_controls_hint) \ | ||
298 | v4l2_ctrl_handler_init_class(hdl, nr_of_controls_hint, NULL, NULL) | ||
299 | #endif | ||
277 | 300 | ||
278 | /** v4l2_ctrl_handler_free() - Free all controls owned by the handler and free | 301 | /** v4l2_ctrl_handler_free() - Free all controls owned by the handler and free |
279 | * the control list. | 302 | * the control list. |
diff --git a/include/media/v4l2-device.h b/include/media/v4l2-device.h index d61febfb1668..c9b1593923f6 100644 --- a/include/media/v4l2-device.h +++ b/include/media/v4l2-device.h | |||
@@ -190,4 +190,17 @@ v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev); | |||
190 | ##args); \ | 190 | ##args); \ |
191 | }) | 191 | }) |
192 | 192 | ||
193 | #define v4l2_device_has_op(v4l2_dev, o, f) \ | ||
194 | ({ \ | ||
195 | struct v4l2_subdev *__sd; \ | ||
196 | bool __result = false; \ | ||
197 | list_for_each_entry(__sd, &(v4l2_dev)->subdevs, list) { \ | ||
198 | if (v4l2_subdev_has_op(__sd, o, f)) { \ | ||
199 | __result = true; \ | ||
200 | break; \ | ||
201 | } \ | ||
202 | } \ | ||
203 | __result; \ | ||
204 | }) | ||
205 | |||
193 | #endif | 206 | #endif |
diff --git a/include/media/v4l2-ioctl.h b/include/media/v4l2-ioctl.h index 4118ad1324c9..b273f0e81818 100644 --- a/include/media/v4l2-ioctl.h +++ b/include/media/v4l2-ioctl.h | |||
@@ -132,7 +132,7 @@ struct v4l2_ioctl_ops { | |||
132 | ENUMSTD is handled by videodev.c | 132 | ENUMSTD is handled by videodev.c |
133 | */ | 133 | */ |
134 | int (*vidioc_g_std) (struct file *file, void *fh, v4l2_std_id *norm); | 134 | int (*vidioc_g_std) (struct file *file, void *fh, v4l2_std_id *norm); |
135 | int (*vidioc_s_std) (struct file *file, void *fh, v4l2_std_id *norm); | 135 | int (*vidioc_s_std) (struct file *file, void *fh, v4l2_std_id norm); |
136 | int (*vidioc_querystd) (struct file *file, void *fh, v4l2_std_id *a); | 136 | int (*vidioc_querystd) (struct file *file, void *fh, v4l2_std_id *a); |
137 | 137 | ||
138 | /* Input handling */ | 138 | /* Input handling */ |
@@ -219,11 +219,11 @@ struct v4l2_ioctl_ops { | |||
219 | int (*vidioc_g_tuner) (struct file *file, void *fh, | 219 | int (*vidioc_g_tuner) (struct file *file, void *fh, |
220 | struct v4l2_tuner *a); | 220 | struct v4l2_tuner *a); |
221 | int (*vidioc_s_tuner) (struct file *file, void *fh, | 221 | int (*vidioc_s_tuner) (struct file *file, void *fh, |
222 | struct v4l2_tuner *a); | 222 | const struct v4l2_tuner *a); |
223 | int (*vidioc_g_frequency) (struct file *file, void *fh, | 223 | int (*vidioc_g_frequency) (struct file *file, void *fh, |
224 | struct v4l2_frequency *a); | 224 | struct v4l2_frequency *a); |
225 | int (*vidioc_s_frequency) (struct file *file, void *fh, | 225 | int (*vidioc_s_frequency) (struct file *file, void *fh, |
226 | struct v4l2_frequency *a); | 226 | const struct v4l2_frequency *a); |
227 | int (*vidioc_enum_freq_bands) (struct file *file, void *fh, | 227 | int (*vidioc_enum_freq_bands) (struct file *file, void *fh, |
228 | struct v4l2_frequency_band *band); | 228 | struct v4l2_frequency_band *band); |
229 | 229 | ||
@@ -242,11 +242,14 @@ struct v4l2_ioctl_ops { | |||
242 | int (*vidioc_g_register) (struct file *file, void *fh, | 242 | int (*vidioc_g_register) (struct file *file, void *fh, |
243 | struct v4l2_dbg_register *reg); | 243 | struct v4l2_dbg_register *reg); |
244 | int (*vidioc_s_register) (struct file *file, void *fh, | 244 | int (*vidioc_s_register) (struct file *file, void *fh, |
245 | struct v4l2_dbg_register *reg); | 245 | const struct v4l2_dbg_register *reg); |
246 | #endif | 246 | #endif |
247 | int (*vidioc_g_chip_ident) (struct file *file, void *fh, | 247 | int (*vidioc_g_chip_ident) (struct file *file, void *fh, |
248 | struct v4l2_dbg_chip_ident *chip); | 248 | struct v4l2_dbg_chip_ident *chip); |
249 | 249 | ||
250 | int (*vidioc_g_chip_name) (struct file *file, void *fh, | ||
251 | struct v4l2_dbg_chip_name *chip); | ||
252 | |||
250 | int (*vidioc_enum_framesizes) (struct file *file, void *fh, | 253 | int (*vidioc_enum_framesizes) (struct file *file, void *fh, |
251 | struct v4l2_frmsizeenum *fsize); | 254 | struct v4l2_frmsizeenum *fsize); |
252 | 255 | ||
@@ -254,15 +257,6 @@ struct v4l2_ioctl_ops { | |||
254 | struct v4l2_frmivalenum *fival); | 257 | struct v4l2_frmivalenum *fival); |
255 | 258 | ||
256 | /* DV Timings IOCTLs */ | 259 | /* DV Timings IOCTLs */ |
257 | int (*vidioc_enum_dv_presets) (struct file *file, void *fh, | ||
258 | struct v4l2_dv_enum_preset *preset); | ||
259 | |||
260 | int (*vidioc_s_dv_preset) (struct file *file, void *fh, | ||
261 | struct v4l2_dv_preset *preset); | ||
262 | int (*vidioc_g_dv_preset) (struct file *file, void *fh, | ||
263 | struct v4l2_dv_preset *preset); | ||
264 | int (*vidioc_query_dv_preset) (struct file *file, void *fh, | ||
265 | struct v4l2_dv_preset *qpreset); | ||
266 | int (*vidioc_s_dv_timings) (struct file *file, void *fh, | 260 | int (*vidioc_s_dv_timings) (struct file *file, void *fh, |
267 | struct v4l2_dv_timings *timings); | 261 | struct v4l2_dv_timings *timings); |
268 | int (*vidioc_g_dv_timings) (struct file *file, void *fh, | 262 | int (*vidioc_g_dv_timings) (struct file *file, void *fh, |
@@ -281,7 +275,7 @@ struct v4l2_ioctl_ops { | |||
281 | 275 | ||
282 | /* For other private ioctls */ | 276 | /* For other private ioctls */ |
283 | long (*vidioc_default) (struct file *file, void *fh, | 277 | long (*vidioc_default) (struct file *file, void *fh, |
284 | bool valid_prio, int cmd, void *arg); | 278 | bool valid_prio, unsigned int cmd, void *arg); |
285 | }; | 279 | }; |
286 | 280 | ||
287 | 281 | ||
diff --git a/include/media/v4l2-of.h b/include/media/v4l2-of.h new file mode 100644 index 000000000000..00f91473498c --- /dev/null +++ b/include/media/v4l2-of.h | |||
@@ -0,0 +1,111 @@ | |||
1 | /* | ||
2 | * V4L2 OF binding parsing library | ||
3 | * | ||
4 | * Copyright (C) 2012 Renesas Electronics Corp. | ||
5 | * Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de> | ||
6 | * | ||
7 | * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd. | ||
8 | * Sylwester Nawrocki <s.nawrocki@samsung.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of version 2 of the GNU General Public License as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | #ifndef _V4L2_OF_H | ||
15 | #define _V4L2_OF_H | ||
16 | |||
17 | #include <linux/list.h> | ||
18 | #include <linux/types.h> | ||
19 | #include <linux/errno.h> | ||
20 | |||
21 | #include <media/v4l2-mediabus.h> | ||
22 | |||
23 | struct device_node; | ||
24 | |||
25 | /** | ||
26 | * struct v4l2_of_bus_mipi_csi2 - MIPI CSI-2 bus data structure | ||
27 | * @flags: media bus (V4L2_MBUS_*) flags | ||
28 | * @data_lanes: an array of physical data lane indexes | ||
29 | * @clock_lane: physical lane index of the clock lane | ||
30 | * @num_data_lanes: number of data lanes | ||
31 | */ | ||
32 | struct v4l2_of_bus_mipi_csi2 { | ||
33 | unsigned int flags; | ||
34 | unsigned char data_lanes[4]; | ||
35 | unsigned char clock_lane; | ||
36 | unsigned short num_data_lanes; | ||
37 | }; | ||
38 | |||
39 | /** | ||
40 | * struct v4l2_of_bus_parallel - parallel data bus data structure | ||
41 | * @flags: media bus (V4L2_MBUS_*) flags | ||
42 | * @bus_width: bus width in bits | ||
43 | * @data_shift: data shift in bits | ||
44 | */ | ||
45 | struct v4l2_of_bus_parallel { | ||
46 | unsigned int flags; | ||
47 | unsigned char bus_width; | ||
48 | unsigned char data_shift; | ||
49 | }; | ||
50 | |||
51 | /** | ||
52 | * struct v4l2_of_endpoint - the endpoint data structure | ||
53 | * @port: identifier (value of reg property) of a port this endpoint belongs to | ||
54 | * @id: identifier (value of reg property) of this endpoint | ||
55 | * @local_node: pointer to device_node of this endpoint | ||
56 | * @remote: phandle to remote endpoint node | ||
57 | * @bus_type: bus type | ||
58 | * @bus: bus configuration data structure | ||
59 | * @head: list head for this structure | ||
60 | */ | ||
61 | struct v4l2_of_endpoint { | ||
62 | unsigned int port; | ||
63 | unsigned int id; | ||
64 | const struct device_node *local_node; | ||
65 | const __be32 *remote; | ||
66 | enum v4l2_mbus_type bus_type; | ||
67 | union { | ||
68 | struct v4l2_of_bus_parallel parallel; | ||
69 | struct v4l2_of_bus_mipi_csi2 mipi_csi2; | ||
70 | } bus; | ||
71 | struct list_head head; | ||
72 | }; | ||
73 | |||
74 | #ifdef CONFIG_OF | ||
75 | void v4l2_of_parse_endpoint(const struct device_node *node, | ||
76 | struct v4l2_of_endpoint *link); | ||
77 | struct device_node *v4l2_of_get_next_endpoint(const struct device_node *parent, | ||
78 | struct device_node *previous); | ||
79 | struct device_node *v4l2_of_get_remote_port_parent( | ||
80 | const struct device_node *node); | ||
81 | struct device_node *v4l2_of_get_remote_port(const struct device_node *node); | ||
82 | #else /* CONFIG_OF */ | ||
83 | |||
84 | static inline int v4l2_of_parse_endpoint(const struct device_node *node, | ||
85 | struct v4l2_of_endpoint *link) | ||
86 | { | ||
87 | return -ENOSYS; | ||
88 | } | ||
89 | |||
90 | static inline struct device_node *v4l2_of_get_next_endpoint( | ||
91 | const struct device_node *parent, | ||
92 | struct device_node *previous) | ||
93 | { | ||
94 | return NULL; | ||
95 | } | ||
96 | |||
97 | static inline struct device_node *v4l2_of_get_remote_port_parent( | ||
98 | const struct device_node *node) | ||
99 | { | ||
100 | return NULL; | ||
101 | } | ||
102 | |||
103 | static inline struct device_node *v4l2_of_get_remote_port( | ||
104 | const struct device_node *node) | ||
105 | { | ||
106 | return NULL; | ||
107 | } | ||
108 | |||
109 | #endif /* CONFIG_OF */ | ||
110 | |||
111 | #endif /* _V4L2_OF_H */ | ||
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h index b137a5e1151a..5298d678d0f3 100644 --- a/include/media/v4l2-subdev.h +++ b/include/media/v4l2-subdev.h | |||
@@ -165,7 +165,7 @@ struct v4l2_subdev_core_ops { | |||
165 | long (*ioctl)(struct v4l2_subdev *sd, unsigned int cmd, void *arg); | 165 | long (*ioctl)(struct v4l2_subdev *sd, unsigned int cmd, void *arg); |
166 | #ifdef CONFIG_VIDEO_ADV_DEBUG | 166 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
167 | int (*g_register)(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg); | 167 | int (*g_register)(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg); |
168 | int (*s_register)(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg); | 168 | int (*s_register)(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg); |
169 | #endif | 169 | #endif |
170 | int (*s_power)(struct v4l2_subdev *sd, int on); | 170 | int (*s_power)(struct v4l2_subdev *sd, int on); |
171 | int (*interrupt_service_routine)(struct v4l2_subdev *sd, | 171 | int (*interrupt_service_routine)(struct v4l2_subdev *sd, |
@@ -191,10 +191,10 @@ struct v4l2_subdev_core_ops { | |||
191 | */ | 191 | */ |
192 | struct v4l2_subdev_tuner_ops { | 192 | struct v4l2_subdev_tuner_ops { |
193 | int (*s_radio)(struct v4l2_subdev *sd); | 193 | int (*s_radio)(struct v4l2_subdev *sd); |
194 | int (*s_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq); | 194 | int (*s_frequency)(struct v4l2_subdev *sd, const struct v4l2_frequency *freq); |
195 | int (*g_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq); | 195 | int (*g_frequency)(struct v4l2_subdev *sd, struct v4l2_frequency *freq); |
196 | int (*g_tuner)(struct v4l2_subdev *sd, struct v4l2_tuner *vt); | 196 | int (*g_tuner)(struct v4l2_subdev *sd, struct v4l2_tuner *vt); |
197 | int (*s_tuner)(struct v4l2_subdev *sd, struct v4l2_tuner *vt); | 197 | int (*s_tuner)(struct v4l2_subdev *sd, const struct v4l2_tuner *vt); |
198 | int (*g_modulator)(struct v4l2_subdev *sd, struct v4l2_modulator *vm); | 198 | int (*g_modulator)(struct v4l2_subdev *sd, struct v4l2_modulator *vm); |
199 | int (*s_modulator)(struct v4l2_subdev *sd, const struct v4l2_modulator *vm); | 199 | int (*s_modulator)(struct v4l2_subdev *sd, const struct v4l2_modulator *vm); |
200 | int (*s_type_addr)(struct v4l2_subdev *sd, struct tuner_setup *type); | 200 | int (*s_type_addr)(struct v4l2_subdev *sd, struct tuner_setup *type); |
@@ -279,14 +279,6 @@ struct v4l2_mbus_frame_desc { | |||
279 | s_routing: see s_routing in audio_ops, except this version is for video | 279 | s_routing: see s_routing in audio_ops, except this version is for video |
280 | devices. | 280 | devices. |
281 | 281 | ||
282 | s_dv_preset: set dv (Digital Video) preset in the sub device. Similar to | ||
283 | s_std() | ||
284 | |||
285 | g_dv_preset: get current dv (Digital Video) preset in the sub device. | ||
286 | |||
287 | query_dv_preset: query dv preset in the sub device. This is similar to | ||
288 | querystd() | ||
289 | |||
290 | s_dv_timings(): Set custom dv timings in the sub device. This is used | 282 | s_dv_timings(): Set custom dv timings in the sub device. This is used |
291 | when sub device is capable of setting detailed timing information | 283 | when sub device is capable of setting detailed timing information |
292 | in the hardware to generate/detect the video signal. | 284 | in the hardware to generate/detect the video signal. |
@@ -331,14 +323,6 @@ struct v4l2_subdev_video_ops { | |||
331 | struct v4l2_subdev_frame_interval *interval); | 323 | struct v4l2_subdev_frame_interval *interval); |
332 | int (*enum_framesizes)(struct v4l2_subdev *sd, struct v4l2_frmsizeenum *fsize); | 324 | int (*enum_framesizes)(struct v4l2_subdev *sd, struct v4l2_frmsizeenum *fsize); |
333 | int (*enum_frameintervals)(struct v4l2_subdev *sd, struct v4l2_frmivalenum *fival); | 325 | int (*enum_frameintervals)(struct v4l2_subdev *sd, struct v4l2_frmivalenum *fival); |
334 | int (*enum_dv_presets) (struct v4l2_subdev *sd, | ||
335 | struct v4l2_dv_enum_preset *preset); | ||
336 | int (*s_dv_preset)(struct v4l2_subdev *sd, | ||
337 | struct v4l2_dv_preset *preset); | ||
338 | int (*g_dv_preset)(struct v4l2_subdev *sd, | ||
339 | struct v4l2_dv_preset *preset); | ||
340 | int (*query_dv_preset)(struct v4l2_subdev *sd, | ||
341 | struct v4l2_dv_preset *preset); | ||
342 | int (*s_dv_timings)(struct v4l2_subdev *sd, | 326 | int (*s_dv_timings)(struct v4l2_subdev *sd, |
343 | struct v4l2_dv_timings *timings); | 327 | struct v4l2_dv_timings *timings); |
344 | int (*g_dv_timings)(struct v4l2_subdev *sd, | 328 | int (*g_dv_timings)(struct v4l2_subdev *sd, |
@@ -687,4 +671,7 @@ void v4l2_subdev_init(struct v4l2_subdev *sd, | |||
687 | ((!(sd) || !(sd)->v4l2_dev || !(sd)->v4l2_dev->notify) ? -ENODEV : \ | 671 | ((!(sd) || !(sd)->v4l2_dev || !(sd)->v4l2_dev->notify) ? -ENODEV : \ |
688 | (sd)->v4l2_dev->notify((sd), (notification), (arg))) | 672 | (sd)->v4l2_dev->notify((sd), (notification), (arg))) |
689 | 673 | ||
674 | #define v4l2_subdev_has_op(sd, o, f) \ | ||
675 | ((sd)->ops->o && (sd)->ops->o->f) | ||
676 | |||
690 | #endif | 677 | #endif |
diff --git a/include/media/videobuf2-core.h b/include/media/videobuf2-core.h index 9cfd4ee9e56f..d88a098d1aff 100644 --- a/include/media/videobuf2-core.h +++ b/include/media/videobuf2-core.h | |||
@@ -27,7 +27,9 @@ struct vb2_fileio_data; | |||
27 | * return NULL on failure or a pointer to allocator private, | 27 | * return NULL on failure or a pointer to allocator private, |
28 | * per-buffer data on success; the returned private structure | 28 | * per-buffer data on success; the returned private structure |
29 | * will then be passed as buf_priv argument to other ops in this | 29 | * will then be passed as buf_priv argument to other ops in this |
30 | * structure | 30 | * structure. Additional gfp_flags to use when allocating the |
31 | * are also passed to this operation. These flags are from the | ||
32 | * gfp_flags field of vb2_queue. | ||
31 | * @put: inform the allocator that the buffer will no longer be used; | 33 | * @put: inform the allocator that the buffer will no longer be used; |
32 | * usually will result in the allocator freeing the buffer (if | 34 | * usually will result in the allocator freeing the buffer (if |
33 | * no other users of this buffer are present); the buf_priv | 35 | * no other users of this buffer are present); the buf_priv |
@@ -79,7 +81,7 @@ struct vb2_fileio_data; | |||
79 | * unmap_dmabuf. | 81 | * unmap_dmabuf. |
80 | */ | 82 | */ |
81 | struct vb2_mem_ops { | 83 | struct vb2_mem_ops { |
82 | void *(*alloc)(void *alloc_ctx, unsigned long size); | 84 | void *(*alloc)(void *alloc_ctx, unsigned long size, gfp_t gfp_flags); |
83 | void (*put)(void *buf_priv); | 85 | void (*put)(void *buf_priv); |
84 | struct dma_buf *(*get_dmabuf)(void *buf_priv); | 86 | struct dma_buf *(*get_dmabuf)(void *buf_priv); |
85 | 87 | ||
@@ -302,6 +304,9 @@ struct v4l2_fh; | |||
302 | * @buf_struct_size: size of the driver-specific buffer structure; | 304 | * @buf_struct_size: size of the driver-specific buffer structure; |
303 | * "0" indicates the driver doesn't want to use a custom buffer | 305 | * "0" indicates the driver doesn't want to use a custom buffer |
304 | * structure type, so sizeof(struct vb2_buffer) will is used | 306 | * structure type, so sizeof(struct vb2_buffer) will is used |
307 | * @gfp_flags: additional gfp flags used when allocating the buffers. | ||
308 | * Typically this is 0, but it may be e.g. GFP_DMA or __GFP_DMA32 | ||
309 | * to force the buffer allocation to a specific memory zone. | ||
305 | * | 310 | * |
306 | * @memory: current memory type used | 311 | * @memory: current memory type used |
307 | * @bufs: videobuf buffer structures | 312 | * @bufs: videobuf buffer structures |
@@ -326,6 +331,8 @@ struct vb2_queue { | |||
326 | const struct vb2_mem_ops *mem_ops; | 331 | const struct vb2_mem_ops *mem_ops; |
327 | void *drv_priv; | 332 | void *drv_priv; |
328 | unsigned int buf_struct_size; | 333 | unsigned int buf_struct_size; |
334 | u32 timestamp_type; | ||
335 | gfp_t gfp_flags; | ||
329 | 336 | ||
330 | /* private: internal use only */ | 337 | /* private: internal use only */ |
331 | enum v4l2_memory memory; | 338 | enum v4l2_memory memory; |
diff --git a/include/uapi/linux/media.h b/include/uapi/linux/media.h index 0ef883327de2..ed49574ad757 100644 --- a/include/uapi/linux/media.h +++ b/include/uapi/linux/media.h | |||
@@ -56,6 +56,8 @@ struct media_device_info { | |||
56 | #define MEDIA_ENT_T_V4L2_SUBDEV_SENSOR (MEDIA_ENT_T_V4L2_SUBDEV + 1) | 56 | #define MEDIA_ENT_T_V4L2_SUBDEV_SENSOR (MEDIA_ENT_T_V4L2_SUBDEV + 1) |
57 | #define MEDIA_ENT_T_V4L2_SUBDEV_FLASH (MEDIA_ENT_T_V4L2_SUBDEV + 2) | 57 | #define MEDIA_ENT_T_V4L2_SUBDEV_FLASH (MEDIA_ENT_T_V4L2_SUBDEV + 2) |
58 | #define MEDIA_ENT_T_V4L2_SUBDEV_LENS (MEDIA_ENT_T_V4L2_SUBDEV + 3) | 58 | #define MEDIA_ENT_T_V4L2_SUBDEV_LENS (MEDIA_ENT_T_V4L2_SUBDEV + 3) |
59 | /* A converter of analogue video to its digital representation. */ | ||
60 | #define MEDIA_ENT_T_V4L2_SUBDEV_DECODER (MEDIA_ENT_T_V4L2_SUBDEV + 4) | ||
59 | 61 | ||
60 | #define MEDIA_ENT_FL_DEFAULT (1 << 0) | 62 | #define MEDIA_ENT_FL_DEFAULT (1 << 0) |
61 | 63 | ||
diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index dcd63745e83a..69bd5bb0d5af 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h | |||
@@ -59,6 +59,7 @@ | |||
59 | #define V4L2_CTRL_CLASS_IMAGE_SOURCE 0x009e0000 /* Image source controls */ | 59 | #define V4L2_CTRL_CLASS_IMAGE_SOURCE 0x009e0000 /* Image source controls */ |
60 | #define V4L2_CTRL_CLASS_IMAGE_PROC 0x009f0000 /* Image processing controls */ | 60 | #define V4L2_CTRL_CLASS_IMAGE_PROC 0x009f0000 /* Image processing controls */ |
61 | #define V4L2_CTRL_CLASS_DV 0x00a00000 /* Digital Video controls */ | 61 | #define V4L2_CTRL_CLASS_DV 0x00a00000 /* Digital Video controls */ |
62 | #define V4L2_CTRL_CLASS_FM_RX 0x00a10000 /* Digital Video controls */ | ||
62 | 63 | ||
63 | /* User-class control IDs */ | 64 | /* User-class control IDs */ |
64 | 65 | ||
@@ -146,6 +147,19 @@ enum v4l2_colorfx { | |||
146 | * of controls. We reserve 16 controls for this driver. */ | 147 | * of controls. We reserve 16 controls for this driver. */ |
147 | #define V4L2_CID_USER_MEYE_BASE (V4L2_CID_USER_BASE + 0x1000) | 148 | #define V4L2_CID_USER_MEYE_BASE (V4L2_CID_USER_BASE + 0x1000) |
148 | 149 | ||
150 | /* The base for the bttv driver controls. | ||
151 | * We reserve 32 controls for this driver. */ | ||
152 | #define V4L2_CID_USER_BTTV_BASE (V4L2_CID_USER_BASE + 0x1010) | ||
153 | |||
154 | |||
155 | /* The base for the s2255 driver controls. | ||
156 | * We reserve 16 controls for this driver. */ | ||
157 | #define V4L2_CID_USER_S2255_BASE (V4L2_CID_USER_BASE + 0x1030) | ||
158 | |||
159 | /* The base for the si476x driver controls. See include/media/si476x.h for the list | ||
160 | * of controls. Total of 16 controls is reserved for this driver */ | ||
161 | #define V4L2_CID_USER_SI476X_BASE (V4L2_CID_USER_BASE + 0x1040) | ||
162 | |||
149 | /* MPEG-class control IDs */ | 163 | /* MPEG-class control IDs */ |
150 | 164 | ||
151 | #define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900) | 165 | #define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900) |
@@ -351,6 +365,7 @@ enum v4l2_mpeg_video_multi_slice_mode { | |||
351 | #define V4L2_CID_MPEG_VIDEO_DEC_PTS (V4L2_CID_MPEG_BASE+223) | 365 | #define V4L2_CID_MPEG_VIDEO_DEC_PTS (V4L2_CID_MPEG_BASE+223) |
352 | #define V4L2_CID_MPEG_VIDEO_DEC_FRAME (V4L2_CID_MPEG_BASE+224) | 366 | #define V4L2_CID_MPEG_VIDEO_DEC_FRAME (V4L2_CID_MPEG_BASE+224) |
353 | #define V4L2_CID_MPEG_VIDEO_VBV_DELAY (V4L2_CID_MPEG_BASE+225) | 367 | #define V4L2_CID_MPEG_VIDEO_VBV_DELAY (V4L2_CID_MPEG_BASE+225) |
368 | #define V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER (V4L2_CID_MPEG_BASE+226) | ||
354 | 369 | ||
355 | #define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP (V4L2_CID_MPEG_BASE+300) | 370 | #define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP (V4L2_CID_MPEG_BASE+300) |
356 | #define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP (V4L2_CID_MPEG_BASE+301) | 371 | #define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP (V4L2_CID_MPEG_BASE+301) |
@@ -643,6 +658,7 @@ enum v4l2_exposure_metering { | |||
643 | V4L2_EXPOSURE_METERING_AVERAGE = 0, | 658 | V4L2_EXPOSURE_METERING_AVERAGE = 0, |
644 | V4L2_EXPOSURE_METERING_CENTER_WEIGHTED = 1, | 659 | V4L2_EXPOSURE_METERING_CENTER_WEIGHTED = 1, |
645 | V4L2_EXPOSURE_METERING_SPOT = 2, | 660 | V4L2_EXPOSURE_METERING_SPOT = 2, |
661 | V4L2_EXPOSURE_METERING_MATRIX = 3, | ||
646 | }; | 662 | }; |
647 | 663 | ||
648 | #define V4L2_CID_SCENE_MODE (V4L2_CID_CAMERA_CLASS_BASE+26) | 664 | #define V4L2_CID_SCENE_MODE (V4L2_CID_CAMERA_CLASS_BASE+26) |
@@ -825,4 +841,16 @@ enum v4l2_dv_rgb_range { | |||
825 | #define V4L2_CID_DV_RX_POWER_PRESENT (V4L2_CID_DV_CLASS_BASE + 100) | 841 | #define V4L2_CID_DV_RX_POWER_PRESENT (V4L2_CID_DV_CLASS_BASE + 100) |
826 | #define V4L2_CID_DV_RX_RGB_RANGE (V4L2_CID_DV_CLASS_BASE + 101) | 842 | #define V4L2_CID_DV_RX_RGB_RANGE (V4L2_CID_DV_CLASS_BASE + 101) |
827 | 843 | ||
844 | #define V4L2_CID_FM_RX_CLASS_BASE (V4L2_CTRL_CLASS_FM_RX | 0x900) | ||
845 | #define V4L2_CID_FM_RX_CLASS (V4L2_CTRL_CLASS_FM_RX | 1) | ||
846 | |||
847 | #define V4L2_CID_TUNE_DEEMPHASIS (V4L2_CID_FM_RX_CLASS_BASE + 1) | ||
848 | enum v4l2_deemphasis { | ||
849 | V4L2_DEEMPHASIS_DISABLED = V4L2_PREEMPHASIS_DISABLED, | ||
850 | V4L2_DEEMPHASIS_50_uS = V4L2_PREEMPHASIS_50_uS, | ||
851 | V4L2_DEEMPHASIS_75_uS = V4L2_PREEMPHASIS_75_uS, | ||
852 | }; | ||
853 | |||
854 | #define V4L2_CID_RDS_RECEPTION (V4L2_CID_FM_RX_CLASS_BASE + 2) | ||
855 | |||
828 | #endif | 856 | #endif |
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index 234d1d870914..e9c49c5e6416 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h | |||
@@ -705,6 +705,7 @@ struct v4l2_buffer { | |||
705 | #define V4L2_BUF_FLAG_TIMESTAMP_MASK 0xe000 | 705 | #define V4L2_BUF_FLAG_TIMESTAMP_MASK 0xe000 |
706 | #define V4L2_BUF_FLAG_TIMESTAMP_UNKNOWN 0x0000 | 706 | #define V4L2_BUF_FLAG_TIMESTAMP_UNKNOWN 0x0000 |
707 | #define V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC 0x2000 | 707 | #define V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC 0x2000 |
708 | #define V4L2_BUF_FLAG_TIMESTAMP_COPY 0x4000 | ||
708 | 709 | ||
709 | /** | 710 | /** |
710 | * struct v4l2_exportbuffer - export of video buffer as DMABUF file descriptor | 711 | * struct v4l2_exportbuffer - export of video buffer as DMABUF file descriptor |
@@ -980,52 +981,6 @@ struct v4l2_standard { | |||
980 | __u32 reserved[4]; | 981 | __u32 reserved[4]; |
981 | }; | 982 | }; |
982 | 983 | ||
983 | /* The DV Preset API is deprecated in favor of the DV Timings API. | ||
984 | New drivers shouldn't use this anymore! */ | ||
985 | |||
986 | /* | ||
987 | * V I D E O T I M I N G S D V P R E S E T | ||
988 | */ | ||
989 | struct v4l2_dv_preset { | ||
990 | __u32 preset; | ||
991 | __u32 reserved[4]; | ||
992 | }; | ||
993 | |||
994 | /* | ||
995 | * D V P R E S E T S E N U M E R A T I O N | ||
996 | */ | ||
997 | struct v4l2_dv_enum_preset { | ||
998 | __u32 index; | ||
999 | __u32 preset; | ||
1000 | __u8 name[32]; /* Name of the preset timing */ | ||
1001 | __u32 width; | ||
1002 | __u32 height; | ||
1003 | __u32 reserved[4]; | ||
1004 | }; | ||
1005 | |||
1006 | /* | ||
1007 | * D V P R E S E T V A L U E S | ||
1008 | */ | ||
1009 | #define V4L2_DV_INVALID 0 | ||
1010 | #define V4L2_DV_480P59_94 1 /* BT.1362 */ | ||
1011 | #define V4L2_DV_576P50 2 /* BT.1362 */ | ||
1012 | #define V4L2_DV_720P24 3 /* SMPTE 296M */ | ||
1013 | #define V4L2_DV_720P25 4 /* SMPTE 296M */ | ||
1014 | #define V4L2_DV_720P30 5 /* SMPTE 296M */ | ||
1015 | #define V4L2_DV_720P50 6 /* SMPTE 296M */ | ||
1016 | #define V4L2_DV_720P59_94 7 /* SMPTE 274M */ | ||
1017 | #define V4L2_DV_720P60 8 /* SMPTE 274M/296M */ | ||
1018 | #define V4L2_DV_1080I29_97 9 /* BT.1120/ SMPTE 274M */ | ||
1019 | #define V4L2_DV_1080I30 10 /* BT.1120/ SMPTE 274M */ | ||
1020 | #define V4L2_DV_1080I25 11 /* BT.1120 */ | ||
1021 | #define V4L2_DV_1080I50 12 /* SMPTE 296M */ | ||
1022 | #define V4L2_DV_1080I60 13 /* SMPTE 296M */ | ||
1023 | #define V4L2_DV_1080P24 14 /* SMPTE 296M */ | ||
1024 | #define V4L2_DV_1080P25 15 /* SMPTE 296M */ | ||
1025 | #define V4L2_DV_1080P30 16 /* SMPTE 296M */ | ||
1026 | #define V4L2_DV_1080P50 17 /* BT.1120 */ | ||
1027 | #define V4L2_DV_1080P60 18 /* BT.1120 */ | ||
1028 | |||
1029 | /* | 984 | /* |
1030 | * D V B T T I M I N G S | 985 | * D V B T T I M I N G S |
1031 | */ | 986 | */ |
@@ -1239,7 +1194,6 @@ struct v4l2_input { | |||
1239 | #define V4L2_IN_ST_VTR 0x04000000 /* VTR time constant */ | 1194 | #define V4L2_IN_ST_VTR 0x04000000 /* VTR time constant */ |
1240 | 1195 | ||
1241 | /* capabilities flags */ | 1196 | /* capabilities flags */ |
1242 | #define V4L2_IN_CAP_PRESETS 0x00000001 /* Supports S_DV_PRESET */ | ||
1243 | #define V4L2_IN_CAP_DV_TIMINGS 0x00000002 /* Supports S_DV_TIMINGS */ | 1197 | #define V4L2_IN_CAP_DV_TIMINGS 0x00000002 /* Supports S_DV_TIMINGS */ |
1244 | #define V4L2_IN_CAP_CUSTOM_TIMINGS V4L2_IN_CAP_DV_TIMINGS /* For compatibility */ | 1198 | #define V4L2_IN_CAP_CUSTOM_TIMINGS V4L2_IN_CAP_DV_TIMINGS /* For compatibility */ |
1245 | #define V4L2_IN_CAP_STD 0x00000004 /* Supports S_STD */ | 1199 | #define V4L2_IN_CAP_STD 0x00000004 /* Supports S_STD */ |
@@ -1263,7 +1217,6 @@ struct v4l2_output { | |||
1263 | #define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY 3 | 1217 | #define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY 3 |
1264 | 1218 | ||
1265 | /* capabilities flags */ | 1219 | /* capabilities flags */ |
1266 | #define V4L2_OUT_CAP_PRESETS 0x00000001 /* Supports S_DV_PRESET */ | ||
1267 | #define V4L2_OUT_CAP_DV_TIMINGS 0x00000002 /* Supports S_DV_TIMINGS */ | 1220 | #define V4L2_OUT_CAP_DV_TIMINGS 0x00000002 /* Supports S_DV_TIMINGS */ |
1268 | #define V4L2_OUT_CAP_CUSTOM_TIMINGS V4L2_OUT_CAP_DV_TIMINGS /* For compatibility */ | 1221 | #define V4L2_OUT_CAP_CUSTOM_TIMINGS V4L2_OUT_CAP_DV_TIMINGS /* For compatibility */ |
1269 | #define V4L2_OUT_CAP_STD 0x00000004 /* Supports S_STD */ | 1222 | #define V4L2_OUT_CAP_STD 0x00000004 /* Supports S_STD */ |
@@ -1854,10 +1807,13 @@ struct v4l2_event_subscription { | |||
1854 | 1807 | ||
1855 | /* VIDIOC_DBG_G_REGISTER and VIDIOC_DBG_S_REGISTER */ | 1808 | /* VIDIOC_DBG_G_REGISTER and VIDIOC_DBG_S_REGISTER */ |
1856 | 1809 | ||
1857 | #define V4L2_CHIP_MATCH_HOST 0 /* Match against chip ID on host (0 for the host) */ | 1810 | #define V4L2_CHIP_MATCH_BRIDGE 0 /* Match against chip ID on the bridge (0 for the bridge) */ |
1858 | #define V4L2_CHIP_MATCH_I2C_DRIVER 1 /* Match against I2C driver name */ | 1811 | #define V4L2_CHIP_MATCH_HOST V4L2_CHIP_MATCH_BRIDGE |
1859 | #define V4L2_CHIP_MATCH_I2C_ADDR 2 /* Match against I2C 7-bit address */ | 1812 | #define V4L2_CHIP_MATCH_I2C_DRIVER 1 /* Match against I2C driver name */ |
1860 | #define V4L2_CHIP_MATCH_AC97 3 /* Match against anciliary AC97 chip */ | 1813 | #define V4L2_CHIP_MATCH_I2C_ADDR 2 /* Match against I2C 7-bit address */ |
1814 | #define V4L2_CHIP_MATCH_AC97 3 /* Match against anciliary AC97 chip */ | ||
1815 | #define V4L2_CHIP_MATCH_SUBDEV_NAME 4 /* Match against subdev name */ | ||
1816 | #define V4L2_CHIP_MATCH_SUBDEV_IDX 5 /* Match against subdev index */ | ||
1861 | 1817 | ||
1862 | struct v4l2_dbg_match { | 1818 | struct v4l2_dbg_match { |
1863 | __u32 type; /* Match type */ | 1819 | __u32 type; /* Match type */ |
@@ -1881,6 +1837,17 @@ struct v4l2_dbg_chip_ident { | |||
1881 | __u32 revision; /* chip revision, chip specific */ | 1837 | __u32 revision; /* chip revision, chip specific */ |
1882 | } __attribute__ ((packed)); | 1838 | } __attribute__ ((packed)); |
1883 | 1839 | ||
1840 | #define V4L2_CHIP_FL_READABLE (1 << 0) | ||
1841 | #define V4L2_CHIP_FL_WRITABLE (1 << 1) | ||
1842 | |||
1843 | /* VIDIOC_DBG_G_CHIP_NAME */ | ||
1844 | struct v4l2_dbg_chip_name { | ||
1845 | struct v4l2_dbg_match match; | ||
1846 | char name[32]; | ||
1847 | __u32 flags; | ||
1848 | __u32 reserved[8]; | ||
1849 | } __attribute__ ((packed)); | ||
1850 | |||
1884 | /** | 1851 | /** |
1885 | * struct v4l2_create_buffers - VIDIOC_CREATE_BUFS argument | 1852 | * struct v4l2_create_buffers - VIDIOC_CREATE_BUFS argument |
1886 | * @index: on return, index of the first created buffer | 1853 | * @index: on return, index of the first created buffer |
@@ -1958,15 +1925,12 @@ struct v4l2_create_buffers { | |||
1958 | #define VIDIOC_G_EXT_CTRLS _IOWR('V', 71, struct v4l2_ext_controls) | 1925 | #define VIDIOC_G_EXT_CTRLS _IOWR('V', 71, struct v4l2_ext_controls) |
1959 | #define VIDIOC_S_EXT_CTRLS _IOWR('V', 72, struct v4l2_ext_controls) | 1926 | #define VIDIOC_S_EXT_CTRLS _IOWR('V', 72, struct v4l2_ext_controls) |
1960 | #define VIDIOC_TRY_EXT_CTRLS _IOWR('V', 73, struct v4l2_ext_controls) | 1927 | #define VIDIOC_TRY_EXT_CTRLS _IOWR('V', 73, struct v4l2_ext_controls) |
1961 | #if 1 | ||
1962 | #define VIDIOC_ENUM_FRAMESIZES _IOWR('V', 74, struct v4l2_frmsizeenum) | 1928 | #define VIDIOC_ENUM_FRAMESIZES _IOWR('V', 74, struct v4l2_frmsizeenum) |
1963 | #define VIDIOC_ENUM_FRAMEINTERVALS _IOWR('V', 75, struct v4l2_frmivalenum) | 1929 | #define VIDIOC_ENUM_FRAMEINTERVALS _IOWR('V', 75, struct v4l2_frmivalenum) |
1964 | #define VIDIOC_G_ENC_INDEX _IOR('V', 76, struct v4l2_enc_idx) | 1930 | #define VIDIOC_G_ENC_INDEX _IOR('V', 76, struct v4l2_enc_idx) |
1965 | #define VIDIOC_ENCODER_CMD _IOWR('V', 77, struct v4l2_encoder_cmd) | 1931 | #define VIDIOC_ENCODER_CMD _IOWR('V', 77, struct v4l2_encoder_cmd) |
1966 | #define VIDIOC_TRY_ENCODER_CMD _IOWR('V', 78, struct v4l2_encoder_cmd) | 1932 | #define VIDIOC_TRY_ENCODER_CMD _IOWR('V', 78, struct v4l2_encoder_cmd) |
1967 | #endif | ||
1968 | 1933 | ||
1969 | #if 1 | ||
1970 | /* Experimental, meant for debugging, testing and internal use. | 1934 | /* Experimental, meant for debugging, testing and internal use. |
1971 | Only implemented if CONFIG_VIDEO_ADV_DEBUG is defined. | 1935 | Only implemented if CONFIG_VIDEO_ADV_DEBUG is defined. |
1972 | You must be root to use these ioctls. Never use these in applications! */ | 1936 | You must be root to use these ioctls. Never use these in applications! */ |
@@ -1974,18 +1938,13 @@ struct v4l2_create_buffers { | |||
1974 | #define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct v4l2_dbg_register) | 1938 | #define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct v4l2_dbg_register) |
1975 | 1939 | ||
1976 | /* Experimental, meant for debugging, testing and internal use. | 1940 | /* Experimental, meant for debugging, testing and internal use. |
1977 | Never use this ioctl in applications! */ | 1941 | Never use this ioctl in applications! |
1942 | Note: this ioctl is deprecated in favor of VIDIOC_DBG_G_CHIP_NAME and | ||
1943 | will go away in the future. */ | ||
1978 | #define VIDIOC_DBG_G_CHIP_IDENT _IOWR('V', 81, struct v4l2_dbg_chip_ident) | 1944 | #define VIDIOC_DBG_G_CHIP_IDENT _IOWR('V', 81, struct v4l2_dbg_chip_ident) |
1979 | #endif | ||
1980 | 1945 | ||
1981 | #define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct v4l2_hw_freq_seek) | 1946 | #define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct v4l2_hw_freq_seek) |
1982 | 1947 | ||
1983 | /* These four DV Preset ioctls are deprecated in favor of the DV Timings | ||
1984 | ioctls. */ | ||
1985 | #define VIDIOC_ENUM_DV_PRESETS _IOWR('V', 83, struct v4l2_dv_enum_preset) | ||
1986 | #define VIDIOC_S_DV_PRESET _IOWR('V', 84, struct v4l2_dv_preset) | ||
1987 | #define VIDIOC_G_DV_PRESET _IOWR('V', 85, struct v4l2_dv_preset) | ||
1988 | #define VIDIOC_QUERY_DV_PRESET _IOR('V', 86, struct v4l2_dv_preset) | ||
1989 | #define VIDIOC_S_DV_TIMINGS _IOWR('V', 87, struct v4l2_dv_timings) | 1948 | #define VIDIOC_S_DV_TIMINGS _IOWR('V', 87, struct v4l2_dv_timings) |
1990 | #define VIDIOC_G_DV_TIMINGS _IOWR('V', 88, struct v4l2_dv_timings) | 1949 | #define VIDIOC_G_DV_TIMINGS _IOWR('V', 88, struct v4l2_dv_timings) |
1991 | #define VIDIOC_DQEVENT _IOR('V', 89, struct v4l2_event) | 1950 | #define VIDIOC_DQEVENT _IOR('V', 89, struct v4l2_event) |
@@ -2016,6 +1975,10 @@ struct v4l2_create_buffers { | |||
2016 | versions. */ | 1975 | versions. */ |
2017 | #define VIDIOC_ENUM_FREQ_BANDS _IOWR('V', 101, struct v4l2_frequency_band) | 1976 | #define VIDIOC_ENUM_FREQ_BANDS _IOWR('V', 101, struct v4l2_frequency_band) |
2018 | 1977 | ||
1978 | /* Experimental, meant for debugging, testing and internal use. | ||
1979 | Never use these in applications! */ | ||
1980 | #define VIDIOC_DBG_G_CHIP_NAME _IOWR('V', 102, struct v4l2_dbg_chip_name) | ||
1981 | |||
2019 | /* Reminder: when adding new ioctls please add support for them to | 1982 | /* Reminder: when adding new ioctls please add support for them to |
2020 | drivers/media/video/v4l2-compat-ioctl32.c as well! */ | 1983 | drivers/media/video/v4l2-compat-ioctl32.c as well! */ |
2021 | 1984 | ||